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gf180mcu-pdk
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f4650d069ec0caefc1945055bddf225041f59dc6
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docs
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physical_verification
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design_manual
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drm_01.rst
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1.0
Purpose
===========
This
document provides topological layout rules to generate masks
in
a
0.18
μ
m
3.3V
/(
5V
)
6V
dual
-
gate MCU
Technology
Processes
.