| 11.1 5V SRAM |
| ============ |
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| SramCore layer is used to mark SRAM cells. 5V SRAM cells with marking layer V5_XTOR should follow below specific rules which is different from 3.3V/(5V)6V rules. |
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| .. csv-table:: SRAM RULES |
| :file: tables_clear/48_SRAM1_126.csv |
| :widths: 100, 800, 150 |
| :align: center |
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| Below Cell Description provides information about SRAM cell (1) and transistors. |
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| .. csv-table:: |
| :file: tables_clear/48_SRAM2_126.csv |
| :widths: 400, 250 |
| :align: center |
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| 1. SRMA devices are allowed to be inside or outside of DNWELL. |
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| 2. SRAM devices follow the logic 5V/6V SPICE models. |
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| .. image:: images/SRAM.png |
| :width: 800 |
| :align: center |
| :alt: SRAM |
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