Merge pull request #40 from mabrains/dependabot Adding dependabot.yml for auto update submodules

commit: 413d7e2c8d25c11128361d323f0de28042a10822 [log] [tgz]
author: Tim 'mithro' Ansell <tansell@google.com> Tue Aug 02 17:17:12 2022 -0700
committer: GitHub <noreply@github.com> Tue Aug 02 17:17:12 2022 -0700
tree: 0695c1edd43249048fb819702042364f7790b910
parent: db1e0222ef7f78c19d121311cc9e11bef7d65716 [diff]
parent: 7c2e547a7fb039f1d22915095902aaf96880674c [diff]
diff --git a/.readthedocs.yaml b/.readthedocs.yaml
new file mode 100644
index 0000000..55c224e
--- /dev/null
+++ b/.readthedocs.yaml

@@ -0,0 +1,23 @@
+# Copyright 2022 GlobalFoundries PDK Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+name: gf180mu-pdk-docs
+channels:
+- defaults
+dependencies:
+- python>=3.8
+- pip:
+  - -r docs/requirements.txt

diff --git a/docs/IPs/IO/gf180mcu_fd_io b/docs/IPs/IO/gf180mcu_fd_io
new file mode 120000
index 0000000..71edde5
--- /dev/null
+++ b/docs/IPs/IO/gf180mcu_fd_io

@@ -0,0 +1 @@
+../../../libraries/gf180mcu_fd_io/latest/docs
\ No newline at end of file

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io.rst
deleted file mode 100644
index b2d4c59..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io.rst
+++ /dev/null

@@ -1,20 +0,0 @@
-*********************************
-GF018_5vGreen_Inline non-CUP GPIO
-*********************************
-
-.. centered::
-   **GlobalFoundries 0.18µm Green Process**
-.. centered::
-   **5V Wide-Range Inline non-CUP GPIO Library**
-.. centered::
-   **Datasheet**
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_io__1
-    gf180mcu_fd_io__2
-    gf180mcu_fd_io__3
-    gf180mcu_fd_io__4
-    gf180mcu_fd_io__5
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__1.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__1.rst
deleted file mode 100644
index 4728b87..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__1.rst
+++ /dev/null

@@ -1,26 +0,0 @@
-1.0 Introduction
-================
-
-This document serves as the data sheet for **GlobalFoundries 0.18µm Green (5.0V) Process 5V Wide-Range Inline non-CUP GPIO Library.** This I/O cell library consists of bidirectional and input only I/O pad cells; analogue signal pad cells; I/O supply and ground pad cells; core supply and ground pad cells; corner, filler and breaker pad cells.
-
-1.1 Cell List
--------------
-
-
-.. csv-table::
-   :file: tables_clear/02_Cell_List.csv
-
-.. note::
-
-    gf180mcu_fd_io__fillnc can't be used as a standalone cell and it must be used with gf180mcu_fd_io__filln (n>=2).
-
-1.2 Device List
----------------
-
-nmos_6p0, pmos_6p0, pn_6p0, np_6p0, ppolyf_u, nmoscap_6p0, nmos_6p0_sab, pmos_6p0_sab.
-
-1.3 Design Manual
------------------
-
-This design is based on :ref:`DESIGN MANUAL`
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__2.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__2.rst
deleted file mode 100644
index feda6b2..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__2.rst
+++ /dev/null

@@ -1,16 +0,0 @@
-2.0 Library Features
-====================
-
-2.1 Technology Options
-----------------------
-
-The GlobalFoundries 0.18μm Green 5V I/O library is available in 3LM, 4LM, 5LM metal stack options. The bond pad is **non-CUP** due to design manual restriction on 3LM. The top metal thickness is available in 6kÅ and 9kA. The design grid used is 0.005μm.
-
-2.2 Cell Dimensions
--------------------
-
-.. csv-table::
-   :file: tables_clear/03_Cell_Dimensions.csv
-
-The I/O cell height of 350μm (est.) is inclusive of the bonding pad. The bond pad opening is 60μmx60μm.
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__3.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__3.rst
deleted file mode 100644
index f3926dd..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__3.rst
+++ /dev/null

@@ -1,36 +0,0 @@
-3.0 Naming Convention
-=====================
-
-3.1 Cell Naming Convention
---------------------------
-
-**Digital I/O Cell**
-
-.. csv-table::
-   :file: tables_clear/04_Digital_IO_Cell.csv
-
-**Analogue Signal Cell**
-
-.. csv-table::
-   :file: tables_clear/05_Analogue_Signal_Cell.csv
-
-**Support Cell**
-
-.. csv-table::
-   :file: tables_clear/06_Support_Cell.csv
-
-3.2 Pin Naming Convention
--------------------------
-
-**Digital I/O Cell**
-
-.. csv-table::
-   :file: tables_clear/07_Digital_IO_Cell.csv
-
-**Analogue Signal Cell**
-
-.. csv-table::
-   :file: tables_clear/08_Analogue_Signal_Cell.csv
-
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4.rst
deleted file mode 100644
index f755adf..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4.rst
+++ /dev/null

@@ -1,14 +0,0 @@
-4.0 Functional Description
-==========================
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_io__4_1.rst
-    gf180mcu_fd_io__4_2.rst
-    gf180mcu_fd_io__4_3.rst
-    gf180mcu_fd_io__4_4.rst
-    gf180mcu_fd_io__4_5.rst
-    gf180mcu_fd_io__4_6.rst
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_1.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_1.rst
deleted file mode 100644
index 65dd26e..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_1.rst
+++ /dev/null

@@ -1,18 +0,0 @@
-4.1 Digital I/O Cell Control Pins
-=================================
-
-.. csv-table::
-   :file: tables_clear/09_Control_Pins1.csv
-
-.. csv-table::
-   :file: tables_clear/09_Control_Pins2.csv
-
-.. csv-table::
-   :file: tables_clear/09_Control_Pins3.csv
-
-.. csv-table::
-   :file: tables_clear/09_Control_Pins4.csv
-
-.. csv-table::
-   :file: tables_clear/09_Control_Pins5.csv
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_2.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_2.rst
deleted file mode 100644
index 7b78733..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_2.rst
+++ /dev/null

@@ -1,24 +0,0 @@
-4.2 Tri-state Programmable Digital I/O Cell
-===========================================
-
-.. image:: images/tri_state1.png
-   :width: 600
-   :align: center
-   :alt: Tri-state Programmable Digital I/O Cell
-
-.. centered::
-   Figure 4.1 Functional Schematic of Tri-state Digital I/O Pad, gf180mcu_fd_io__bi_t
-
-The pad **gf180mcu_fd_io__bi_t** is a 5V tri-state bi-directional I/O pad with programmable output drive strengths of 4mA, 8mA, 12mA and 16mA. It can be programmed as CMOS input or CMOS Schmitt trigger input and with or without pull-up/down. In the fast slew 16mA drive strength mode, it can runs at a frequency of 100MHz with 30pF capacitive load. The use of the control pins PDRV0, PDRV1, SL, CS is as shown in section 4.1. The logical operation of the cell is as shown below.
-
-**Driver Function**
-
- .. csv-table::
-    :file: tables_clear/10_Driver_Function.csv
-
-**Receiver Function**
-
- .. csv-table::
-    :file: tables_clear/11_Receiver_Function.csv
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_3.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_3.rst
deleted file mode 100644
index 85d6cb8..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_3.rst
+++ /dev/null

@@ -1,24 +0,0 @@
-4.3 Tri-state 24mA Programmable Digital I/O Cell
-================================================
-
-.. image:: images/tri_state2.png
-   :width: 600
-   :align: center
-   :alt: Tri-state 24mA Programmable Digital I/O Cell
-
-.. centered::
-   Figure 4.2 Functional Schematic of Tri-state Digital I/O Pad, gf180mcu_fd_io__bi_24t
-
-The pad **gf180mcu_fd_io__bi_24t** is a 5V tri-state bi-directional I/O pad with output drive strength of 24mA. It can be programmed as CMOS input or CMOS Schmitt trigger input and with or without pull-up/down. In the fast slew mode, it can runs at a frequency of 100MHz with 50pF capacitive load. The use of the control pins PDRV0, PDRV1, SL, CS is as shown in section 4.1. The logical operation of the cell is as shown below.
-
-**Driver Function**
-
- .. csv-table::
-    :file: tables_clear/12_Driver_Function.csv
-
-**Receiver Function**
-
- .. csv-table::
-    :file: tables_clear/13_Receiver_Function.csv
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_4.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_4.rst
deleted file mode 100644
index ef2c3d7..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_4.rst
+++ /dev/null

@@ -1,24 +0,0 @@
-4.4 Input Only I/O Cell
-=======================
-
-.. image:: images/Input_IO_Cell1.png
-   :width: 600
-   :align: center
-   :alt: Input Only I/O Cell
-
-.. centered::
-   Figure 4.3 Functional Schematic of CMOS Input Only Pad, gf180mcu_fd_io__in_c
-
-.. image:: images/Input_IO_Cell2.png
-   :width: 600
-   :align: center
-   :alt: Input Only I/O Cell
-
-.. centered::
-   Figure 4.4 Functional Schematic of Schmitt Trigger Input Only Pad, gf180mcu_fd_io__in_s
-
-**gf180mcu_fd_io__in_c** and **gf180mcu_fd_io__in_s** are input only pads configured in CMOS and Schmitt trigger modes respectively. Both pads are equipped with pull-up/down programmability. The logical operation of the pad is as shown below.
-
- .. csv-table::
-    :file: tables_clear/14_Input_IO_Cell.csv
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_5.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_5.rst
deleted file mode 100644
index bf93590..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_5.rst
+++ /dev/null

@@ -1,26 +0,0 @@
-4.5 Analogue Signal Cells
-=========================
-
-The schematics for a 5.0V analogue signal pad cell is shown in Figure 5.5. The 5.0V analogue signal pad is meant for analogue circuits that use the thick-gate transistors.
-
-.. image:: images/Analogue_Signal_Cells1.png
-   :width: 600
-   :align: center
-   :alt: Analogue Signal Cells
-
-.. centered::
-   Figure 4.5 Functional schematic of 5V analogue signal pad (b)
-
-.. warning::
-   The analogue signal pads contain only HBM protection diodes. If they are connected to input gates, the designer needs to include CDM protection network near to these gates as shown in Figure 4.6.
-
-.. image:: images/Analogue_Signal_Cells2.png
-   :width: 600
-   :align: center
-   :alt: Analogue Signal Cells
-
-.. centered::
-   Figure 4.6 Illustration of CDM protection network that may be added to 5V analogue signal pad (b)
-
-If these analog signal pads are used with internal circuit, the user must add their own secondary ESD protection adjacent to the devices of the internal circuit being protected. The perimeter of the CDM diode should be larger than 25µm. The CDM resistor should be larger than 50 and should be realized using appropriate poly resistor.
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_6.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_6.rst
deleted file mode 100644
index 8c8705f..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__4_6.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-4.6 Power supply pads and Corner pad
-====================================
-
-Each power supply pad, DVDD and DVSS has one ESD protection circuit inside. The leakage current of one ESD protection circuit is 648 nA maximum from simulation. Simulation conditions: FF corner, 5.5V at 125C.
-
-Each corner pad has 2 ESD protection circuit inside. So total leakage current for each corner pad is 1296 nA maximum from simulation.
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5.rst
deleted file mode 100644
index 752fc56..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5.rst
+++ /dev/null

@@ -1,13 +0,0 @@
-5.0 Specifications
-==================
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_io__5_1.rst
-    gf180mcu_fd_io__5_2.rst
-    gf180mcu_fd_io__5_3.rst
-    gf180mcu_fd_io__5_4.rst
-    gf180mcu_fd_io__5_5.rst
-    gf180mcu_fd_io__5_6.rst
-    gf180mcu_fd_io__5_7.rst

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_1.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_1.rst
deleted file mode 100644
index a72ed6b..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-Operating Conditions
-====================
-
- .. csv-table::
-   :file: tables_clear/15_Operating_Conditions.csv
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_2.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_2.rst
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--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_2.rst
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@@ -1,8 +0,0 @@
-==============
-ESD Protection
-==============
-
- .. csv-table::
-   :file: tables_clear/16_ESD_Protection.csv
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_3.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_3.rst
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--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_3.rst
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@@ -1,7 +0,0 @@
-Latchup Immunity
-================
-
- .. csv-table::
-   :file: tables_clear/17_Latchup_Immunity.csv
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_4.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_4.rst
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index 7acac91..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_4.rst
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@@ -1,6 +0,0 @@
-Electrical Characteristics (DVDD = 4.50V to 5.50V, Temp = -40 degC to 125 degC)
-===============================================================================
-
- .. csv-table::
-   :file: tables_clear/18_Electrical_Characteristics.csv
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_5.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_5.rst
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index 58e1bfc..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_5.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-Input Propagation Delay (DVDD = 4.50V to 5.50V, Temp = -40 degC to 125 degC)
-============================================================================
-
- .. csv-table::
-   :file: tables_clear/19_Input_Propagation_Delay.csv
-
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_6.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_6.rst
deleted file mode 100644
index aa37957..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_6.rst
+++ /dev/null

@@ -1,6 +0,0 @@
-Output Propagation Delay (DVDD = 4.50V to 5.50V, Temp = -40 degC to 125 degC)
-=============================================================================
-
- .. csv-table::
-   :file: tables_clear/20_Output_Propagation_Delay.csv
-

diff --git a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_7.rst b/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_7.rst
deleted file mode 100644
index a915b01..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/gf180mcu_fd_io__5_7.rst
+++ /dev/null

@@ -1,8 +0,0 @@
-Characterization Corners
-========================
-
- .. csv-table::
-   :file: tables_clear/21_Characterization_Corners.csv
-
-.. note::
-   \* worst case leakage current

diff --git a/docs/IPs/IO/gf180mcu_fd_io/images/Analogue_Signal_Cells1.png b/docs/IPs/IO/gf180mcu_fd_io/images/Analogue_Signal_Cells1.png
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diff --git a/docs/IPs/IO/gf180mcu_fd_io/images/Analogue_Signal_Cells2.png b/docs/IPs/IO/gf180mcu_fd_io/images/Analogue_Signal_Cells2.png
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--- a/docs/IPs/IO/gf180mcu_fd_io/images/Analogue_Signal_Cells2.png
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diff --git a/docs/IPs/IO/gf180mcu_fd_io/images/Input_IO_Cell1.png b/docs/IPs/IO/gf180mcu_fd_io/images/Input_IO_Cell1.png
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diff --git a/docs/IPs/IO/gf180mcu_fd_io/images/Input_IO_Cell2.png b/docs/IPs/IO/gf180mcu_fd_io/images/Input_IO_Cell2.png
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--- a/docs/IPs/IO/gf180mcu_fd_io/images/Input_IO_Cell2.png
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diff --git a/docs/IPs/IO/gf180mcu_fd_io/images/tri_state1.png b/docs/IPs/IO/gf180mcu_fd_io/images/tri_state1.png
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--- a/docs/IPs/IO/gf180mcu_fd_io/images/tri_state1.png
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diff --git a/docs/IPs/IO/gf180mcu_fd_io/images/tri_state2.png b/docs/IPs/IO/gf180mcu_fd_io/images/tri_state2.png
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--- a/docs/IPs/IO/gf180mcu_fd_io/images/tri_state2.png
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diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/01_release.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/01_release.csv
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index 25d5897..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/01_release.csv
+++ /dev/null

@@ -1,3 +0,0 @@
-Rev.,Date,Description of Changes

-1.0,Apr 30 14,First release

-1.1,Jul 30 14,Updated the table of cell dimensions


diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/02_Cell_List.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/02_Cell_List.csv
deleted file mode 100644
index 5f320e4..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/02_Cell_List.csv
+++ /dev/null

@@ -1,30 +0,0 @@
-Cell Type,Cell Name,Description
-Bidirectional,gf180mcu_fd_io__bi_t,"5V WR bidirectional pad with programmable drive
-
-strength of 4mA, 8mA, 12mA and 16mA tri-state
-
-output buffer, fast/slow slew rate control, pull-
-
-up/down and selectable CMOS/Schmitt input."
-,gf180mcu_fd_io__bi_24t,"5V WR bidirectional pad with 24mA drive strength tri-
-
-state output buffer, fast/slow slew rate control, pull-
-
-up/down and selectable CMOS/Schmitt input."
-Input,gf180mcu_fd_io__in_c,5V WR CMOS input only pad with pull-up/down
-,gf180mcu_fd_io__in_s,"5V WR Schmitt Trigger input only pad with pull-
-
-up/down"
-Analog,gf180mcu_fd_io__asig_5p0,"5V WR analogue signal pad with double diode
-
-protection (DC current carrying capability 10mA)"
-"Power
-Supply",gf180mcu_fd_io__dvdd,Power supply cell (DC current carrying capability 60mA)
-,gf180mcu_fd_io__dvss,Ground cell (DC current carrying capability 60mA)
-Corner,gf180mcu_fd_io__cor,Corner cell
-Filler,gf180mcu_fd_io__fillnc *,Filler for gap width less than 1μm
-,gf180mcu_fd_io__fill1,1μm filler
-,gf180mcu_fd_io__fill5,5μm filler
-,gf180mcu_fd_io__fill10,10μm filler
-Breaker,gf180mcu_fd_io__brk2,2μm Breaker with VSS
-,gf180mcu_fd_io__brk5,5μm Breaker with VSS

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/03_Cell_Dimensions.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/03_Cell_Dimensions.csv
deleted file mode 100644
index 01725f3..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/03_Cell_Dimensions.csv
+++ /dev/null

@@ -1,15 +0,0 @@
-Pad Cell Name,Height (est.),Width (est.),Unit

-gf180mcu_fd_io__bi_t,350,75,μm

-gf180mcu_fd_io__bi_24t,350,75,μm

-gf180mcu_fd_io__in_c,350,75,μm

-gf180mcu_fd_io__in_s,350,75,μm

-gf180mcu_fd_io__asig_5p0,350,75,μm

-gf180mcu_fd_io__dvdd,350,75,μm

-gf180mcu_fd_io__dvss,350,75,μm

-gf180mcu_fd_io__cor,355,355,μm

-gf180mcu_fd_io__fillnc,350,0.1,μm

-gf180mcu_fd_io__fill1,350,1,μm

-gf180mcu_fd_io__fill5,350,5,μm

-gf180mcu_fd_io__fill10,350,10,μm

-gf180mcu_fd_io__brk2,350,2,μm

-gf180mcu_fd_io__brk5,350,5,μm


diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/04_Digital_IO_Cell.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/04_Digital_IO_Cell.csv
deleted file mode 100644
index 28ea5b4..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/04_Digital_IO_Cell.csv
+++ /dev/null

@@ -1,5 +0,0 @@
-,Symbol,Description
-Cell Type,GF,GF pad cell
-I/O Type,_in,Input
-I/O Type,_bi,Bidirectional
-Output Type,_xt,Tristate with drive strength of x mA

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/05_Analogue_Signal_Cell.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/05_Analogue_Signal_Cell.csv
deleted file mode 100644
index 8425c75..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/05_Analogue_Signal_Cell.csv
+++ /dev/null

@@ -1,3 +0,0 @@
-,,Symbol,Description
-Cell Type,,GF,GF pad cell
-Function,,_asig_5p0,Analogue I/O for 5.0V device

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/06_Support_Cell.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/06_Support_Cell.csv
deleted file mode 100644
index 4a487bb..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/06_Support_Cell.csv
+++ /dev/null

@@ -1,8 +0,0 @@
-,,Symbol,Description
-Cell Type,,GF,GF pad cell
-Power,,_dvdd,DVDD power cell
-,,_dvss,DVSS ground cell
-Corner,,_cor,Corner cell
-Filler,,_fillx,Filler cell with width = x μm
-Filler,,_fillnc,Filler cell for gap width less than 1μm
-Breaker,,_brkx,Breaker cell with width = x μm

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/07_Digital_IO_Cell.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/07_Digital_IO_Cell.csv
deleted file mode 100644
index 828df48..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/07_Digital_IO_Cell.csv
+++ /dev/null

@@ -1,16 +0,0 @@
-PIN,Function
-DVDD,5V supply for output drivers
-VDD,5V supply for pre-drive in I/O pads
-DVSS,Ground for output drivers
-VSS,Ground for pre-drive in I/O pads
-IE,Input enable
-PD,Pull-down enable
-PU,Pull-up enable
-Y,Data output to core
-PAD,Data input from/output to bond pad
-OE,Output enable
-A,Data input from core
-CS,CMOS/Schmitt trigger input select
-SL,Fast/Slow slew rate select
-PDRV0,Output drive strength selector
-PDRV1,Output drive strength selector

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/08_Analogue_Signal_Cell.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/08_Analogue_Signal_Cell.csv
deleted file mode 100644
index 17b2bf2..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/08_Analogue_Signal_Cell.csv
+++ /dev/null

@@ -1,3 +0,0 @@
-PIN,Function
-ASIG5V,5V analogue signal input from/output to core
-PAD,Data input from/output to bond pad

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins1.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins1.csv
deleted file mode 100644
index eeb5e1a..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins1.csv
+++ /dev/null

@@ -1,5 +0,0 @@
-IE,OE,Input/Output Control
-0,0,Input & Output Disable
-0,1,Output Enabled
-1,0,Input Enabled
-1,1,Disallowed

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins2.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins2.csv
deleted file mode 100644
index 1240545..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins2.csv
+++ /dev/null

@@ -1,3 +0,0 @@
-CS,Input Type
-0,CMOS Buffer
-1,Schmitt Trigger

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins3.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins3.csv
deleted file mode 100644
index d077b68..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins3.csv
+++ /dev/null

@@ -1,5 +0,0 @@
-PU,PD,Resistive Pulling
-0,0,Normal CMOS
-0,1,Pull Down
-1,0,Pull Up
-1,1,Normal CMOS

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins4.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins4.csv
deleted file mode 100644
index d03d46d..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins4.csv
+++ /dev/null

@@ -1,3 +0,0 @@
-SL,Output Slew Rate
-0,Fast
-1,Slow

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins5.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins5.csv
deleted file mode 100644
index 45b570f..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/09_Control_Pins5.csv
+++ /dev/null

@@ -1,5 +0,0 @@
-PDRV1,PDRV0,Output drive strength
-0,0,4mA
-0,1,8mA
-1,0,12mA
-1,1,16mA

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/10_Driver_Function.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/10_Driver_Function.csv
deleted file mode 100644
index cf06c8e..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/10_Driver_Function.csv
+++ /dev/null

@@ -1,8 +0,0 @@
-Input,,,,Output
-OE,PU ,PD,A,PAD
-0,0,0,X,Hi-Z
-0,0,1,X,weak 0
-0,1,0,X,weak 1
-0,1,1,X,Hi-Z
-1,X,X,0,0
-1,X,X,1,1

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/11_Receiver_Function.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/11_Receiver_Function.csv
deleted file mode 100644
index f1347ed..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/11_Receiver_Function.csv
+++ /dev/null

@@ -1,7 +0,0 @@
-Input,,,,Output
-IE   ,PU,PD,PAD,Y
-0,X,X,X,0
-1,X,X,0,0
-1,X,X,1,1
-1,0,1,weak 0,0
-1,1,0,weak 1,1

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/12_Driver_Function.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/12_Driver_Function.csv
deleted file mode 100644
index 6fd51f5..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/12_Driver_Function.csv
+++ /dev/null

@@ -1,8 +0,0 @@
-Input,,,,Output
-OE,PU, PD,A,PAD
-0,0,0,X,Hi-Z
-0,0,1,X,weak 0
-0,1,0,X,weak 1
-0,1,1,X,Hi-Z
-1,X, X,0,0
-1,X, X,1,1

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/13_Receiver_Function.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/13_Receiver_Function.csv
deleted file mode 100644
index e1c063e..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/13_Receiver_Function.csv
+++ /dev/null

@@ -1,7 +0,0 @@
-Input,,,,Output
-IE   ,PU,PD,PAD,Y
-0,X,X,X,0
-1,X,X,0,0
-1,X,X,1,1
-1,0,1,weak 0,0
-1,1,0, weak 1,1

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/14_Input_IO_Cell.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/14_Input_IO_Cell.csv
deleted file mode 100644
index b105ad4..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/14_Input_IO_Cell.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-,Input,,Output
-PU,PD ,PAD,Y
-X,X,0,0
-X,X,1,1
-0,1, weak 0,0
-1,0, weak 1,1

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/15_Operating_Conditions.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/15_Operating_Conditions.csv
deleted file mode 100644
index 6d40086..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/15_Operating_Conditions.csv
+++ /dev/null

@@ -1,3 +0,0 @@
-Parameter,Min,Typ,Max,Unit
-I/O DC Supply Voltage,4.5,5,5.5,V
-Junction Temperature,-40,25,125,°C

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/16_ESD_Protection.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/16_ESD_Protection.csv
deleted file mode 100644
index a531811..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/16_ESD_Protection.csv
+++ /dev/null

@@ -1,4 +0,0 @@
-ESD Model,Target
-Human Body Model (HBM),2000V
-Machine Model (MM),200V
-Charged Device Model (CDM),500V

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/17_Latchup_Immunity.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/17_Latchup_Immunity.csv
deleted file mode 100644
index 81c267c..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/17_Latchup_Immunity.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-Pads, Latch-up Testing Standard,Target
-Digital and Analog I/O, JESD78B,+/- 100mA @ 25~125 C

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/18_Electrical_Characteristics.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/18_Electrical_Characteristics.csv
deleted file mode 100644
index b8e1f7c..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/18_Electrical_Characteristics.csv
+++ /dev/null

@@ -1,70 +0,0 @@
-Parameter,Condition,Symbol,Min,Max,Unit
-Input Low Voltage,,VIL,-0.3,0.8,V
-Input High Voltage,"Normal
-
-CMOS/TTL input",VIH,2,DVDD+0.3,V
-Input Low Voltage,Schmitt trigger Input,VIL,-0.3,0.8,V
-Input High Voltage,,V_IH,2,DVDD+0.3,V
-Hysteresis,,V_HYS,0.4,0.6,V
-Input High Leakage Current,Vin = DVDD,IIH,-5,5,μA
-Input Low Leakage Current,Vin = DVSS,IIL,-5,5,μA
-Input Resistance with Pull-Down,Vin = DVDD,RPD,80,210,kΩ
-Input Resistance with Pull-Up,Vin = DVSS,RPU,80,210,kΩ
-"Output Low Current
-
-( DC drive strength of 4,8,12,16 or
-
-24mA only @ DVDD 4.5-5.5V )",V_OL = 0.5V,IOL,"4
-
-8
-
-12
-
-16
-
-24","\-
-
-\-
-
-\-
-
-\-
-
-\-","mA
-
-mA
-
-mA
-
-mA
-
-mA"
-"Output High Current
-
-( DC drive strength of 4,8,12,16 or
-
-24mA only @ DVDD 4.5-5.5V)",V_OH = DVDD-0.8V,I_OH,"4
-
-8
-
-12
-
-16
-
-24","\-
-
-\-
-
-\-
-
-\-
-
-\-","mA
-
-mA
-
-mA
-
-mA
-
-mA"

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/19_Input_Propagation_Delay.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/19_Input_Propagation_Delay.csv
deleted file mode 100644
index c64de74..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/19_Input_Propagation_Delay.csv
+++ /dev/null

@@ -1,5 +0,0 @@
-Configuration,Input, Output, Transition,Cload,Min,Typ,Max,Unit
-Input (CMOS),PAD,Y,L to H,0.5pF,\-,\-,3,ns
-,PAD,Y,H to L,0.5pF,\-,\-,3,ns
-Input (Schmitt),PAD,Y,L to H,0.5pF,\-,\-,3,ns
-,PAD,Y,H to L,0.5pF,\-,\-,3,ns

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/20_Output_Propagation_Delay.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/20_Output_Propagation_Delay.csv
deleted file mode 100644
index 78ea36e..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/20_Output_Propagation_Delay.csv
+++ /dev/null

@@ -1,25 +0,0 @@
-Configuration,Input ,Output ,Transition,Cload,Min,Typ,Max,Unit
-"4mA Drive Strength
-
-At Slow Slew",A ,PAD,L to H,30pF,\-,\-,12,ns
-,A ,PAD,H to L,30pF,\-,\-,12,ns
-"4mA Drive Strength
-
-At Fast Slew",A ,PAD,L to H,30pF,\-,\-,11,ns
-,A ,PAD,H to L,30pF,\-,\-,11,ns
-"16mA Drive Strength
-
-At Slow Slew",A ,PAD,L to H,30pF,\-,\-,10,ns
-,A ,PAD,H to L,30pF,\-,\-,10,ns
-"16mA Drive Strength
-
-At Fast Slew",A ,PAD,L to H,30pF,\-,\-,7,ns
-,A ,PAD,H to L,30pF,\-,\-,7,ns
-"24mA Drive Strength
-
-At Slow Slew",A ,PAD,L to H,50pF,\-,\-,10,ns
-,A ,PAD,H to L,50pF,\-,\-,10,ns
-"24mA Drive Strength
-
-At Fast Slew",A ,PAD,L to H,50pF,\-,\-,7,ns
-,A ,PAD,H to L,50pF,\-,\-,7,ns

diff --git a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/21_Characterization_Corners.csv b/docs/IPs/IO/gf180mcu_fd_io/tables_clear/21_Characterization_Corners.csv
deleted file mode 100644
index 7558463..0000000
--- a/docs/IPs/IO/gf180mcu_fd_io/tables_clear/21_Characterization_Corners.csv
+++ /dev/null

@@ -1,13 +0,0 @@
-oProcess corner  ,DVDD(V),Temperature( C)
-SS,4.5,125
-FF,5.5,-40
-TT,5,25
-FF*,5.5,125
-SS,2.97,125
-FF,3.63,-40
-TT,3.3,25
-FF*,3.63,125
-SS,2.25,125
-FF,2.75,-40
-TT,2.5,25
-FF*,2.75,125

diff --git a/docs/IPs/IO/io.rst b/docs/IPs/IO/io.rst
index 47eaef3..63dec4c 100644
--- a/docs/IPs/IO/io.rst
+++ b/docs/IPs/IO/io.rst

@@ -6,8 +6,5 @@
     :maxdepth: 2
     :glob:
 
-    gf180mcu_fd_io/gf180mcu_fd_io
-
-
-
+    gf180mcu_fd_io/index
 

diff --git a/docs/IPs/SRAM/gf180mcu_fd_ip_sram b/docs/IPs/SRAM/gf180mcu_fd_ip_sram
new file mode 120000
index 0000000..06ee05a
--- /dev/null
+++ b/docs/IPs/SRAM/gf180mcu_fd_ip_sram

@@ -0,0 +1 @@
+../../../macros/gf180mcu_fd_ip_sram/latest/docs
\ No newline at end of file

diff --git a/docs/IPs/SRAM/sram.rst b/docs/IPs/SRAM/sram.rst
new file mode 100644
index 0000000..889b173
--- /dev/null
+++ b/docs/IPs/SRAM/sram.rst

@@ -0,0 +1,10 @@
+
+*****
+SRAM
+*****
+
+.. toctree::
+    :maxdepth: 2
+    :glob:
+
+    gf180mcu_fd_ip_sram/index

diff --git a/docs/IPs/ips.rst b/docs/IPs/ips.rst
index ff4f4c4..c1f72b3 100644
--- a/docs/IPs/ips.rst
+++ b/docs/IPs/ips.rst

@@ -1,12 +1,13 @@
 
-****
-I/Os
-****
+************
+IPs / Macros
+************
+
 .. toctree::
-    :maxdepth: 2
+    :maxdepth: 3
     :glob:
 
     IO/io
-
+    SRAM/sram
 
 

diff --git a/docs/analog/model_parameters/HV/HV_4_1.rst b/docs/analog/model_parameters/HV/HV_4_1.rst
index ca996f5..97ee519 100644
--- a/docs/analog/model_parameters/HV/HV_4_1.rst
+++ b/docs/analog/model_parameters/HV/HV_4_1.rst

@@ -40,7 +40,7 @@
 
 The value of the fet_mc_skew parameter can be any real number greater than 0. When simulating MC parallel device, in order to get consistent mismatch results, both “m” and “par” multiplicity factors parameters are needed. It must instantiated as follows:
 
-- Xm11 2 0 0nmos_10p0_asymw=10u l=10u m=10
+- Xm11 2 0 0nfet_10v0_asymw=10u l=10u m=10
 
-- Xm21 2 0 0pmos_10p0_asymw=10u l=10u m=10
+- Xm21 2 0 0pfet_10v0_asymw=10u l=10u m=10
 

diff --git a/docs/analog/model_parameters/HV/tables_clear/1_MOSFETs.csv b/docs/analog/model_parameters/HV/tables_clear/1_MOSFETs.csv
index b88063f..3b9c67a 100644
--- a/docs/analog/model_parameters/HV/tables_clear/1_MOSFETs.csv
+++ b/docs/analog/model_parameters/HV/tables_clear/1_MOSFETs.csv

@@ -3,5 +3,5 @@
 Available","Global
 
 Statistical",NF scaling
-nmos_10p0_asym,Asymmetrical LDNMOS (10V),4.6,Y,Y,Y,N
-pmos_10p0_asym,Asymmetrical LDPMOS (10V),4.6,Y,Y,Y,N
+nfet_10v0_asym,Asymmetrical LDNMOS (10V),4.6,Y,Y,Y,N
+pfet_10v0_asym,Asymmetrical LDPMOS (10V),4.6,Y,Y,Y,N

diff --git a/docs/analog/model_parameters/HV/tables_clear/3_Instance_Parameter_Range.csv b/docs/analog/model_parameters/HV/tables_clear/3_Instance_Parameter_Range.csv
index 7512337..8e28b78 100644
--- a/docs/analog/model_parameters/HV/tables_clear/3_Instance_Parameter_Range.csv
+++ b/docs/analog/model_parameters/HV/tables_clear/3_Instance_Parameter_Range.csv

@@ -3,12 +3,12 @@
 (BSIM Version)","Parameter
 
 Value",W (um),L (um),M,as (m^2),ad (m^2),ps(m),pd (m)
-"nmos_10p0_asym
+"nfet_10v0_asym
 
 (BSIM 4.6)",Min,4,0.6,1,-,-,-,-
 ,Max,50,20,100,-,-,-,-
 ,Default,25,0.6,1,1.2E-11,3.7E-11,5.10E-05,5.30E-05
-"pmos_10p0_asym
+"pfet_10v0_asym
 
 (BSIM 4.6)",Min,4,0.6,1,-,-,-,-
 ,Max,50,20,100,-,-,-,-

diff --git a/docs/analog/model_parameters/HV/tables_clear/5_Nominal1.csv b/docs/analog/model_parameters/HV/tables_clear/5_Nominal1.csv
index 1f41a9f..9618fa6 100644
--- a/docs/analog/model_parameters/HV/tables_clear/5_Nominal1.csv
+++ b/docs/analog/model_parameters/HV/tables_clear/5_Nominal1.csv

@@ -1,11 +1,11 @@
 EP Specification,,,,Measurement,
 Device (W/L), Model,Idsat (uA/um),Vtlin,Idsat (uA/um),Vtlin (V)
-"nmos_10p0_asym
+"nfet_10v0_asym
 
  (25/0.6),nf=1",slow,444,0.97,\-,\-
 ,typical ,535,0.84,543,0.83
 , fast ,626,0.71,\-,\-
-"pmos_10p0_asym
+"pfet_10v0_asym
 
  (25/0.6),nf=1",slow ,-200,-0.88,\-,\-
 ,typical ,-260,-1.02,-268,-1.02

diff --git a/docs/analog/model_parameters/HV/tables_clear/6_Statistical_Models.csv b/docs/analog/model_parameters/HV/tables_clear/6_Statistical_Models.csv
index 2b0d1cf..05b2a54 100644
--- a/docs/analog/model_parameters/HV/tables_clear/6_Statistical_Models.csv
+++ b/docs/analog/model_parameters/HV/tables_clear/6_Statistical_Models.csv

@@ -1,5 +1,5 @@
 MOSFET Model,"Both Local
 
 and Global",Description
-nmos_10p0_asym,global only,Statistical BSIM4 model for Asym 10 V LDNMOS
-pmos_10p0_asym,global only,Statistical BSIM4 model for Asym 10V LDPMOS
+nfet_10v0_asym,global only,Statistical BSIM4 model for Asym 10 V LDNMOS
+pfet_10v0_asym,global only,Statistical BSIM4 model for Asym 10V LDPMOS

diff --git a/docs/analog/model_parameters/LV/LV_2_5.rst b/docs/analog/model_parameters/LV/LV_2_5.rst
index c1a78b2..bc490d2 100644
--- a/docs/analog/model_parameters/LV/LV_2_5.rst
+++ b/docs/analog/model_parameters/LV/LV_2_5.rst

@@ -7,20 +7,20 @@
 
 where
 
-- Vdd = 3.3V for nmos_3p3
+- Vdd = 3.3V for nfet_03v3
 
-- Vdd =-3.3V for pmos_3p3
+- Vdd =-3.3V for pfet_03v3
 
-- Vdd = 6V for nmos_6p0
+- Vdd = 6V for nfet_06v0
 
-- Vdd =-6V for pmos_6p0
+- Vdd =-6V for pfet_06v0
 
-- Vdd = 6V for nmos_6p0_nat
+- Vdd = 6V for nfet_06v0_nvt
 
 .. note::
    Vth0 is the measured or simulated threshold voltage obtained using the max Gm method at Vd = 0.05V. For 6.0V native NMOS, Vth0 is measured and simulated at Vd=0.1V. Vth1 is the simulated threshold voltage obtained using the BSIM equation. These two values may have a difference.
 
-2.5.1 nmos_3p3 and pmos_3p3 (3.3V)
+2.5.1 nfet_03v3 and pfet_03v3 (3.3V)
 ..................................
 
 .. csv-table::
@@ -35,11 +35,11 @@
 
 .. note::
 
-   - nmos_3p3_sab SAB Length on Drain side SAB DOP: 1.78um , Source Side SAB SOP: 0.48um
+   - nfet_03v3_dss SAB Length on Drain side SAB DOP: 1.78um , Source Side SAB SOP: 0.48um
 
-   - pmos_3p3_sab SAB Length on Drain side SAB DOP: 1.78um, Source Side SAB SOP: 0.48um
+   - pfet_03v3_dss SAB Length on Drain side SAB DOP: 1.78um, Source Side SAB SOP: 0.48um
 
-2.5.3 nmos_6p0 and pmos_6p0 (6V)
+2.5.3 nfet_06v0 and pfet_06v0 (6V)
 ................................
 
 .. csv-table::
@@ -47,11 +47,11 @@
 
 .. note::
 
-   - nmos_6p0_sab Length of SAB on Drain side : 3.78um, Length of SAB on Source side: 0.28um
+   - nfet_06v0_dss Length of SAB on Drain side : 3.78um, Length of SAB on Source side: 0.28um
 
-   - pmos_6p0_sab Length of SAB on Drain side : 2.78um, Length of SAB on Source side: 0.28um
+   - pfet_06v0_dss Length of SAB on Drain side : 2.78um, Length of SAB on Source side: 0.28um
 
-2.5.4 nmos_6p0 and pmos_6p0 (5V)
+2.5.4 nfet_06v0 and pfet_06v0 (5V)
 ................................
 
 .. csv-table::

diff --git a/docs/analog/model_parameters/LV/LV_6.rst b/docs/analog/model_parameters/LV/LV_6.rst
index 773d92d..ab19485 100644
--- a/docs/analog/model_parameters/LV/LV_6.rst
+++ b/docs/analog/model_parameters/LV/LV_6.rst

@@ -21,7 +21,7 @@
 
 **Examples:**
 
-Xc1 1 2 nmoscap_3p3 w=50u l=50u
+Xc1 1 2 cap_nmos_03v3 w=50u l=50u
 
 6.2 How to use the Models
 -------------------------

diff --git a/docs/analog/model_parameters/LV/LV_8_1.rst b/docs/analog/model_parameters/LV/LV_8_1.rst
index 1fb81b2..7a57403 100644
--- a/docs/analog/model_parameters/LV/LV_8_1.rst
+++ b/docs/analog/model_parameters/LV/LV_8_1.rst

@@ -1,7 +1,7 @@
 8.1 MOSFETs
 ===========
 
-8.1.1 nmos_3p3 (3.3V)
+8.1.1 nfet_03v3 (3.3V)
 .....................
 
 8.1.1.1 CV - Characteristics
@@ -88,7 +88,7 @@
    :align: center
    :alt: I/f Noise - Characteristics
 
-8.1.2 pmos_3p3 (3.3V)
+8.1.2 pfet_03v3 (3.3V)
 .....................
 
 8.1.2.1 CV - Characteristics
@@ -175,7 +175,7 @@
    :align: center
    :alt: I/f Noise - Characteristics
 
-8.1.3 nmos_6p0 (6.0V)
+8.1.3 nfet_06v0 (6.0V)
 .....................
 
 8.1.3.1 CV - Characteristics
@@ -216,7 +216,7 @@
    :align: center
    :alt: I/f Noise - Characteristics
 
-8.1.4 pmos_6p0 (6.0V)
+8.1.4 pfet_06v0 (6.0V)
 .....................
 
 8.1.4.1 CV - Characteristics
@@ -263,7 +263,7 @@
    :align: center
    :alt: I/f Noise - Characteristics
 
-8.1.5 nmos_6p0_nat (6.0V)
+8.1.5 nfet_06v0_nvt (6.0V)
 .........................
 
 8.1.5.1 IV - Characteristics

diff --git a/docs/analog/model_parameters/LV/tables_clear/00_rev.csv b/docs/analog/model_parameters/LV/tables_clear/00_rev.csv
index 0e980a4..e8fab9c 100644
--- a/docs/analog/model_parameters/LV/tables_clear/00_rev.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/00_rev.csv

@@ -124,9 +124,9 @@
 
 1. Updated leakage current for 6V PMOS
 
-2. Added paper model SAB devices nmos_3p3_sab, pmos_3p3_sab, nmos_6p0_sab,
+2. Added paper model SAB devices nfet_03v3_dss, pfet_03v3_dss, nfet_06v0_dss,
 
-pmos_6p0_sab for 3.3V NMOS/PMOS and 6V NMOS/PMOS
+pfet_06v0_dss for 3.3V NMOS/PMOS and 6V NMOS/PMOS
 
 3. Added instance parameter ""s"" to allow defining resistors in series connection
 "
@@ -173,11 +173,11 @@
 
 4. Added mismatch model for pplus_u/npolyf_u/ppolyf_u/nplus_u
 
-5. Added global statistical model for mim_1p0fF/mim_1p5fF/mim_2p0fF
+5. Added global statistical model for cap_mim_1p0fF/cap_mim_1p5fF/cap_mim_2p0fF
 
-6. Added global & mismatch model for vpnp_5x5/ vpnp_0p42x10/ vpnp_0p42x5/
+6. Added global & mismatch model for pnp_05p00x05p00/ pnp_10p00x00p42/ pnp_05p00x00p42/
 
-vpnp_10x10
+pnp_10p00x10p00
 
 7. Added global statistical model for VNPN
 "

diff --git a/docs/analog/model_parameters/LV/tables_clear/03_MOSFETs.csv b/docs/analog/model_parameters/LV/tables_clear/03_MOSFETs.csv
index 89cd711..a44822e 100644
--- a/docs/analog/model_parameters/LV/tables_clear/03_MOSFETs.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/03_MOSFETs.csv

@@ -5,12 +5,12 @@
 Statistical","Local
 
 Statistical"
-nmos_3p3,BSIM4 model for 0.18um 3.3V NMOS,Y,Y,Y,Y
-pmos_3p3,BSIM4 model for 0.18um 3.3V PMOS,Y,Y,Y,Y
-nmos_6p0,BSIM4 model for 0.18um 6V NMOS,Y,Y,Y,Y
-pmos_6p0,BSIM4 model for 0.18um 6V PMOS,Y,Y,Y,Y
-nmos_3p3_sab,Subcircuit model for 3.3V NMOS with SAB,Y,Y,Y,Y
-pmos_3p3_sab,Subcircuit model for 3.3V PMOS with SAB,Y,Y,Y,Y
-nmos_6p0_sab,Subcircuit model for 6.0V NMOS with SAB,Y,Y,Y,Y
-pmos_6p0_sab,Subcircuit model for 6.0V PMOS with SAB,Y,Y,Y,Y
-nmos_6p0_nat,BSIM4 model for 0.18um 6V native NMOS,Y,Y,Y,N
+nfet_03v3,BSIM4 model for 0.18um 3.3V NMOS,Y,Y,Y,Y
+pfet_03v3,BSIM4 model for 0.18um 3.3V PMOS,Y,Y,Y,Y
+nfet_06v0,BSIM4 model for 0.18um 6V NMOS,Y,Y,Y,Y
+pfet_06v0,BSIM4 model for 0.18um 6V PMOS,Y,Y,Y,Y
+nfet_03v3_dss,Subcircuit model for 3.3V NMOS with SAB,Y,Y,Y,Y
+pfet_03v3_dss,Subcircuit model for 3.3V PMOS with SAB,Y,Y,Y,Y
+nfet_06v0_dss,Subcircuit model for 6.0V NMOS with SAB,Y,Y,Y,Y
+pfet_06v0_dss,Subcircuit model for 6.0V PMOS with SAB,Y,Y,Y,Y
+nfet_06v0_nvt,BSIM4 model for 0.18um 6V native NMOS,Y,Y,Y,N

diff --git a/docs/analog/model_parameters/LV/tables_clear/04_Diodes.csv b/docs/analog/model_parameters/LV/tables_clear/04_Diodes.csv
index e401a69..7d92cb4 100644
--- a/docs/analog/model_parameters/LV/tables_clear/04_Diodes.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/04_Diodes.csv

@@ -3,12 +3,12 @@
 Model","Global
 
 Statistical"
-np_3p3,Model for thin gate N+/Psub diode,Y,Y,N
-pn_3p3,Model for thin gate P+/Nwell diode,Y,Y,N
-np_6p0,Model for thin gate N+/Psub diode,Y,Y,N
-pn_6p0,Model for thin gate P+/Nwell diode,Y,Y,N
-nwp_3p3,Model for 3.3V Nwell/Psub diode,Y,Y,N
-nwp_6p0,Model for 6V Nwell/Psub diode,Y,Y,N
-dnwpw,Model for PWELL/DNWELL diode,Y,Y,N
-dnwps,Model for DNWELL/Psub diode,Y,Y,N
+diode_nd2ps_03v3,Model for thin gate N+/Psub diode,Y,Y,N
+diode_pd2nw_03v3,Model for thin gate P+/Nwell diode,Y,Y,N
+diode_nd2ps_06v0,Model for thin gate N+/Psub diode,Y,Y,N
+diode_pd2nw_06v0,Model for thin gate P+/Nwell diode,Y,Y,N
+diode_nw2ps_03v3,Model for 3.3V Nwell/Psub diode,Y,Y,N
+diode_nw2ps_06v0,Model for 6V Nwell/Psub diode,Y,Y,N
+diode_pw2dw,Model for PWELL/DNWELL diode,Y,Y,N
+diode_dw2ps,Model for DNWELL/Psub diode,Y,Y,N
 sc_diode,Model for Schottky diode,Y,Y,N

diff --git a/docs/analog/model_parameters/LV/tables_clear/05_BJTs.csv b/docs/analog/model_parameters/LV/tables_clear/05_BJTs.csv
index f71976f..ec0030d 100644
--- a/docs/analog/model_parameters/LV/tables_clear/05_BJTs.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/05_BJTs.csv

@@ -5,10 +5,10 @@
 Statistical","Local
 
 Statistical"
-vpnp_10x10,"GP model for vertical PNP with
+pnp_10p00x10p00,"GP model for vertical PNP with
 
 emitter size of 10um x 10um",N,Y,Y,Y
-vpnp_5x5,"GP model for vertical PNP with
+pnp_05p00x05p00,"GP model for vertical PNP with
 
 emitter size of 5um x 5um",N,Y,Y,Y
 vpnp_0.42x10,"GP model for vertical PNP with
@@ -17,21 +17,21 @@
 vpnp_0.42x5,"GP model for vertical PNP with
 
 Emitter size of 0.42um x 5um",N,Y,Y,Y
-vnpn_10x10,"GP model for vertical NPN with
+npn_10p00x10p00,"GP model for vertical NPN with
 
 emitter size of 10umx10um",N,Y,Y,N
-vnpn_5x5,"GP model for vertical NPN with
+npn_05p00x05p00,"GP model for vertical NPN with
 
 emitter size of 5umx5um",N,Y,Y,N
-vnpn_0p54x16,"GP model for VNPN with
+npn_00p54x16p00,"GP model for VNPN with
 
 emitter size of 0.54umx16um",N,Y,Y,N
-vnpn_0p54x8,"GP model for VNPN with
+npn_00p54x08p00,"GP model for VNPN with
 
 emitter size of 0.54umx8um",N,Y,Y,N
-vnpn_0p54x4,"GP model for VNPN with
+npn_00p54x04p00,"GP model for VNPN with
 
 emitter size of 0.54umx4um",N,Y,Y,N
-vnpn_0p54x2,"GP model for VNPN with
+npn_00p54x02p00,"GP model for VNPN with
 
 emitter size of 0.54umx2um",N,Y,Y,N

diff --git a/docs/analog/model_parameters/LV/tables_clear/07_MOSCAP.csv b/docs/analog/model_parameters/LV/tables_clear/07_MOSCAP.csv
index dfb12f5..e24436b 100644
--- a/docs/analog/model_parameters/LV/tables_clear/07_MOSCAP.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/07_MOSCAP.csv

@@ -3,11 +3,11 @@
 Model","Statistical
 
 Model"
-nmoscap_3p3,Model for nominal IO 3.3V inversion-mode NMOS capacitor,Y,Y,N
-pmoscap_3p3,Model for nominal IO 3.3V inversion-mode PMOS capacitor,Y,Y,N
-nmoscap_6p0,Model for nominal IO 6V inversion -mode NMOS capacitor,Y,Y,N
-pmoscap_6p0,Model for nominal IO 6V inversion -mode PMOS capacitor,Y,Y,N
-nmoscap_3p3_b,Model for nominal IO 3.3V NMOS in Nwell capacitor,Y,Y,N
-pmoscap_3p3_b,Model for nominal IO 3.3V PMOS in Pwell capacitor,Y,Y,N
-nmoscap_6p0_b,Model for nominal IO 6V NMOS in Nwell capacitor,Y,Y,N
-pmoscap_6p0_b,Model for nominal IO 6V PMOS in Pwell capacitor,Y,Y,N
+cap_nmos_03v3,Model for nominal IO 3.3V inversion-mode NMOS capacitor,Y,Y,N
+cap_pmos_03v3,Model for nominal IO 3.3V inversion-mode PMOS capacitor,Y,Y,N
+cap_nmos_06v0,Model for nominal IO 6V inversion -mode NMOS capacitor,Y,Y,N
+cap_pmos_06v0,Model for nominal IO 6V inversion -mode PMOS capacitor,Y,Y,N
+cap_nmos_03v3_b,Model for nominal IO 3.3V NMOS in Nwell capacitor,Y,Y,N
+cap_pmos_03v3_b,Model for nominal IO 3.3V PMOS in Pwell capacitor,Y,Y,N
+cap_nmos_06v0_b,Model for nominal IO 6V NMOS in Nwell capacitor,Y,Y,N
+cap_pmos_06v0_b,Model for nominal IO 6V PMOS in Pwell capacitor,Y,Y,N

diff --git a/docs/analog/model_parameters/LV/tables_clear/08_MIM.csv b/docs/analog/model_parameters/LV/tables_clear/08_MIM.csv
index 7b838e0..ed50570 100644
--- a/docs/analog/model_parameters/LV/tables_clear/08_MIM.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/08_MIM.csv

@@ -5,17 +5,17 @@
 Statistical","Local
 
 Statistical"
-nmoscap_3p3,"Model for 1.5fF/um2 MIM
+cap_nmos_03v3,"Model for 1.5fF/um2 MIM
 
 (*)-usable for Volt <=6V
 
 across capacitor",Y,Y,Y,N
-pmoscap_3p3,"Model for 1.0fF/um2 MIM
+cap_pmos_03v3,"Model for 1.0fF/um2 MIM
 
 (*)-usable for Volt <=6V
 
 across capacitor",Y,Y,Y,N
-nmoscap_6p0,"Model for 2.0fF/um2 MIM
+cap_nmos_06v0,"Model for 2.0fF/um2 MIM
 
 (*)-usable for Volt <=6V
 

diff --git a/docs/analog/model_parameters/LV/tables_clear/10_LV_NMOS.csv b/docs/analog/model_parameters/LV/tables_clear/10_LV_NMOS.csv
index 2f27eaf..220861a 100644
--- a/docs/analog/model_parameters/LV/tables_clear/10_LV_NMOS.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/10_LV_NMOS.csv

@@ -3,12 +3,12 @@
 (BSIM Version)","Parameter
 
 Value",W,L,nf,as,ad,ps,pd,nrs,nrd,dtemp
-"nmos_3p3
+"nfet_03v3
 
 (BSIM 4.5)",Min,0.22,0.28,1,-,-,-,-,-,-,-
 ,Max,100,50,-,-,-,-,-,-,-,-
 ,Default,0,0,1,0,0,0,0,0,0,0
-"pmos_3p3
+"pfet_03v3
 
 (BSIM 4.5)",Min,0.22,0.28,1,-,-,-,-,-,-,-
 ,Max,50,100,-,-,-,-,-,-,-,-

diff --git a/docs/analog/model_parameters/LV/tables_clear/11_MV_NMOS.csv b/docs/analog/model_parameters/LV/tables_clear/11_MV_NMOS.csv
index 9c7fb2f..f1b0b7f 100644
--- a/docs/analog/model_parameters/LV/tables_clear/11_MV_NMOS.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/11_MV_NMOS.csv

@@ -3,17 +3,17 @@
 (BSIM Version)","Parameter
 
 Value",W,L,nf,as,ad,ps,pd,nrs,nrd,dtemp
-"nmos_6p0
+"nfet_06v0
 
 (BSIM 4.5)",Min,0.3,0.6,1,-,-,-,-,-,-,-
 ,Max,100,50,-,-,-,-,-,-,-,-
 ,Default,0,0,1,0,0,0,0,0,0,0
-"pmos_6p0
+"pfet_06v0
 
 (BSIM 4.5)",Min,0.3,0.5,1,-,-,-,-,-,-,-
 ,Max,100,50,-,-,-,-,-,-,-,-
 ,Default,0,0,1,0,0,0,0,0,0,0
-"nmos_6p0_nat
+"nfet_06v0_nvt
 
 (BSIM 4.6)",Min,0.8,1.8,1,-,-,-,-,-,-,-
 ,Max,100,50,-,-,-,-,-,-,-,-

diff --git a/docs/analog/model_parameters/LV/tables_clear/17_Noise.csv b/docs/analog/model_parameters/LV/tables_clear/17_Noise.csv
index 7b5f7aa..a97314b 100644
--- a/docs/analog/model_parameters/LV/tables_clear/17_Noise.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/17_Noise.csv

@@ -1,6 +1,6 @@
 Device,Vds (V),Vgs (V),W x L (um x um)
-nmos_3p3,"0.1, 1.8, 3.3","0.8, 1.8, 3.3",10x0.28
-pmos_3p3,"-0.1, -1.8, -3.3","-0.8, -1.8, -3.3",10x0.28
-nmos_6p0,"0.1, 3, 6","1, 3, 6",10x0.7
-pmos_6p0,"-0.1, -3, -6","-1, -3, -6",10x0.55
-nmos_6p0_nat,"0.1, 3, 6","0.3, 3, 6",10x1.8
+nfet_03v3,"0.1, 1.8, 3.3","0.8, 1.8, 3.3",10x0.28
+pfet_03v3,"-0.1, -1.8, -3.3","-0.8, -1.8, -3.3",10x0.28
+nfet_06v0,"0.1, 3, 6","1, 3, 6",10x0.7
+pfet_06v0,"-0.1, -3, -6","-1, -3, -6",10x0.55
+nfet_06v0_nvt,"0.1, 3, 6","0.3, 3, 6",10x1.8

diff --git a/docs/analog/model_parameters/LV/tables_clear/19_mos_3p3.csv b/docs/analog/model_parameters/LV/tables_clear/19_mos_3p3.csv
index 383f999..ac7b132 100644
--- a/docs/analog/model_parameters/LV/tables_clear/19_mos_3p3.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/19_mos_3p3.csv

@@ -1,11 +1,11 @@
 EP Specification,,,,Measurement,
 Device (W/L) ,Model,Idsat (uA/um),Vth0 (V),Idsat (uA/um),Vth0  (V)
-"nmos_3p3
+"nfet_03v3
 
 (10/0.28)",slow ,430,0.73,\-,\-
 ,typical,510,0.63,508,0.644
 ,fast ,590,0.53,\-,\-
-"pmos_3p3
+"pfet_03v3
 
 (10/0.28)",slow,-210,-0.85,\-,\-
 ,typical,-250,-0.73,-254.1,-0.733

diff --git a/docs/analog/model_parameters/LV/tables_clear/20_MOS_3p3_SAB.csv b/docs/analog/model_parameters/LV/tables_clear/20_MOS_3p3_SAB.csv
index c3f2011..275bf38 100644
--- a/docs/analog/model_parameters/LV/tables_clear/20_MOS_3p3_SAB.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/20_MOS_3p3_SAB.csv

@@ -1,11 +1,11 @@
 EP Specification,,,,
 Device (W/L) ,Model,Idsat (uA/um),Vth0 (V),Idlin (uA/um)
-"nmos_3p3_sab \*
+"nfet_03v3_dss \*
 
 (10/0.28)",slow,426,0.73,52
 ,typical ,505,0.63,57
 ,fast ,586,0.53,63
-"pmos_3p3_sab
+"pfet_03v3_dss
 
 (10/0.28)",slow ,-206,-0.84,-18
 ,typical ,-245,-0.72,-20

diff --git a/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0.csv b/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0.csv
index e34866b..2aeed51 100644
--- a/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0.csv

@@ -1,16 +1,16 @@
 EP Specification,,,,Measurement,
 Device (W/L) ,Model,Idsat (uA/um),Vth0 (V),Idsat (uA/um),Vth0  (V)
-"nmos_6p0
+"nfet_06v0
 
 (10/0.7)",slow ,480,0.85,\-,\-
 ,typical,570,0.73,579.6,0.738
 ,fast,660,0.61,\-,\-
-"nmos_6p0_nat
+"nfet_06v0_nvt
 
 (10/1.8)",slow ,430,0.08,\-,\-
 ,typical,535,-0.12,543,-0.12
 ,fast,640,-0.32,\-,\-
-"pmos_6p0
+"pfet_06v0
 
 (10/0.55)",slow ,-240,-0.98,\-,\-
 ,typical,-290,-0.85,-297.4,-0.849

diff --git a/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0_2.csv b/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0_2.csv
index 9951170..18c64d8 100644
--- a/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0_2.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/21_mos_6p0_2.csv

@@ -1,11 +1,11 @@
 EP Specification,,,,
 Device (W/L) ,Model,Idsat (uA/um),Vth0 (V),Idlin (uA/um)
-"nmos_6p0_sab \*\*
+"nfet_06v0_dss \*\*
 
 (10/0.7)",slow ,477,0.85,38
 ,typical ,568,0.73,44
 ,fast ,657,0.6,49
-"pmos_6p0_sab \*\*
+"pfet_06v0_dss \*\*
 
 (10/0.55)",slow ,-238,-0.98,-12
 ,typical ,-288,-0.85,-15

diff --git a/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_1.csv b/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_1.csv
index 7ae9aae..0f00921 100644
--- a/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_1.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_1.csv

@@ -1,11 +1,11 @@
 EP Specification,,,,Measurement,
 Device (W/L) ,Model,Idsat (uA/um),Vth0 (V),Idsat (uA/um),Vth0  (V)
-"nmos_6p0
+"nfet_06v0
 
 (10/0.6)",slow ,400,0.82,\-,\-
 ,typical ,500,0.7,,
 ,fast ,600,0.58,\-,\-
-"pmos_6p0
+"pfet_06v0
 
 (10/0.5)",slow ,-200,-0.96,\-,\-
 ,typical ,-240,-0.83,,

diff --git a/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_2.csv b/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_2.csv
index fd4e159..5bc3d70 100644
--- a/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_2.csv
+++ b/docs/analog/model_parameters/LV/tables_clear/22_mos_6p0_2.csv

@@ -1,11 +1,11 @@
 EP Specification,,,,
 Device (W/L) ,Model,Idsat (uA/um),Vth0 (V),Idlin (uA/um)
-"nmos_6p0_sab
+"nfet_06v0_dss
 
 (10/0.6)",Slow,398,0.84,39
 ,typical ,498,0.72,46
 ,fast,598,0.58,53
-"pmos_6p0_sab
+"pfet_06v0_dss
 
 (10/0.5)",slow ,-187,-0.97,-12
 ,typical ,-233,-0.84,-14

diff --git a/docs/digital/Digital.rst b/docs/digital/Digital.rst
index e65532d..46192ec 100644
--- a/docs/digital/Digital.rst
+++ b/docs/digital/Digital.rst

@@ -8,7 +8,5 @@
     :glob:
 
     standard_cells/standard_cells
-    SRAM/sram
-
 
 

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1.rst
deleted file mode 100644
index d0d798f..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1.rst
+++ /dev/null

@@ -1,48 +0,0 @@
-***********************************
-gf180mcu_fd_ip_sram__sram128x8m8wm1
-***********************************
-
-.. centered::
-   **gf180mcu_fd_ip_sram__sram128x8m8wm1**
-.. centered::
-   **180nm 5V Green synchronous single port SRAM**
-.. centered::
-   **Memory Macro IP**
-.. centered::
-   **Datasheet**
-
-====
-
-**Features**
-
-- Uses 180nm 5V Green CMOS 13.5um2 6 transistors bitcell
-
-- 128 words X 8 bits, mux 8 Instance
-
-- Periphery circuitry uses 5V transistors
-
-- Operating voltage is 1.62V to 5.50V
-
-- Operating temperature is -40 degC to 125 degC
-
-- Minimum 3 layers of metals required: Metal1, Metal2, Metal3
-
-- Bit write mask
-
-- Self timed operation to reduce power
-
-- Separate data in and data out ports
-
-- Macro cell name: gf180mcu_fd_ip_sram__sram128x8m8wm1
-
-
-.. toctree::
-    :maxdepth: 2
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_1
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_2
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_3
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_4
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_5
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_6

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_1.rst
deleted file mode 100644
index be4ade7..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-====================
-1.0 Pins Description
-====================
-
-.. csv-table::
-   :file: tables_clear/1_pins_desc.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_2.rst
deleted file mode 100644
index 0e9bf34..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_2.rst
+++ /dev/null

@@ -1,11 +0,0 @@
-===============
-2.0 Truth Table
-===============
-
-.. csv-table::
-   :file: tables_clear/2_truth_table.csv
-
-.. note::
-
-    X: don't care
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_3.rst
deleted file mode 100644
index 1260dc5..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_3.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-=========================================
-3.0 Capacitance loading ( fF ) @ TT, 25°c
-=========================================
-
-.. csv-table::
-   :file: tables_clear/3_Capacitance_loading.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4.rst
deleted file mode 100644
index 6c27331..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4.rst
+++ /dev/null

@@ -1,12 +0,0 @@
-============================
-4.0 Power Consumption ( uW )
-============================
-
-Condition of AC Write power is all data input pins switch and AC Read power is all address input and data output pins switch at 1MHz
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_4_1
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_4_2
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_4_3

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_1.rst
deleted file mode 100644
index a906a19..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.1 5.0V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_2.rst
deleted file mode 100644
index b2ab442..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_2.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.2 3.3V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_3.rst
deleted file mode 100644
index f427211..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_4_3.rst
+++ /dev/null

@@ -1,6 +0,0 @@
-==============
-4.3 1.8V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption3.csv

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5.rst
deleted file mode 100644
index 371d220..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5.rst
+++ /dev/null

@@ -1,12 +0,0 @@
-======================
-5.0 AC Characteristics
-======================
-
-The timing and power values measured from the input slew of 20ps on clock pin, 20ps on signal and output load .01pF.
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_5_1
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_5_2
-    gf180mcu_fd_ip_sram__sram128x8m8wm1_5_3

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_1.rst
deleted file mode 100644
index d4ae331..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-===========================
-5.1 5.0V AC Characteristics
-===========================
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_2.rst
deleted file mode 100644
index beb5c6b..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_2.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-===========================
-5.2 3.3V AC Characteristics
-===========================
-
- .. csv-table::
-    :file: tables_clear/5_AC_Characteristics2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_3.rst
deleted file mode 100644
index b82a8e6..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_5_3.rst
+++ /dev/null

@@ -1,15 +0,0 @@
-===========================
-5.3 1.8V AC Characteristics
-===========================
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics3.csv
-
-.. centered::
-    **AC Timing Waveform Chart**
-
-.. image:: images/ac_timing.png
-   :width: 600
-   :align: center
-   :alt: AC Timing Waveform Chart
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_6.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_6.rst
deleted file mode 100644
index f5af473..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1_6.rst
+++ /dev/null

@@ -1,8 +0,0 @@
-=======================
-6.0 Physical Dimensions
-=======================
-
-.. csv-table::
-   :file: tables_clear/6_Physical_Dimensions.csv
-
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/images/ac_timing.png b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/images/ac_timing.png
deleted file mode 100644
index 102954e..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/images/ac_timing.png
+++ /dev/null
Binary files differ

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/0_release.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/0_release.csv
deleted file mode 100644
index f51ecb0..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/0_release.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-,Date,Description
-1,2014/06/20,Release

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/1_pins_desc.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/1_pins_desc.csv
deleted file mode 100644
index 4859265..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/1_pins_desc.csv
+++ /dev/null

@@ -1,44 +0,0 @@
-Signal,Direction,Description
-CLK,Input,"Clock for the memory. Rising edge triggers
-
-operation. All inputs are latched at rising edge of the
-
-clock signal"
-CEN,Input,"Memory Enable, Active Low. When CEN is Low, the
-
-memory is enabled. When CEN input is High, the
-
-memory is deactivated but internal states are
-
-retained. CEN must be high before 1st running cycle."
-A[6:0],Input,"Address Input. This Address input port is used to
-
-address the location to be written during the write
-
-cycle and read during the read cycle."
-GWEN,Input,"Write Enable Input. The RAM is in write cycle when
-
-GWEN is low. The RAM is in read cycle when
-
-GWEN is high."
-WEN[7:0],Input,"Bit Write Mask, Active Low. When the memory is in
-
-the write cycle, selectively write into individual
-
-outputs are controlled by WEN[7:0]. For example, if
-
-CEN, GWEN, WEN[0] are low and WEN[7:1] are
-
-high, only D[0] will write into the addressed location and
-
-D[7:1] will be ignored during CLK low to high transition."
-D[7:0],Input,"Data input bus. The data input bus is used to write
-
-data into the memory location specified by address
-
-input port during the write cycle."
-Q[7:0],output,"Data output bus. It outputs the contents of the
-
-memory location addressed by the Address Input signals."
-VDD,Power,Power pin.
-VSS,Ground,Ground pin.

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/2_truth_table.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/2_truth_table.csv
deleted file mode 100644
index 94ed477..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/2_truth_table.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-CLK,CEN,GWEN,WEN,A,D,Q,status
-,H,X,X,X,X,Hold previous data,Standby mode
-,L,H,X,A,X,Q,Read mode
-,L,L,H,A,D,Hold previous data,Write mode
-,L,L,L,A,D,Hold previous data,Mask mode
-other,X,X,X,X,X,Hold previous data,Unchanged

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/3_Capacitance_loading.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/3_Capacitance_loading.csv
deleted file mode 100644
index 072de75..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/3_Capacitance_loading.csv
+++ /dev/null

@@ -1,4 +0,0 @@
-Voltage,CLK,CEN,GWEN,WEN,A,D
-5.0v,298.116,17.4878,49.6559,7.84667,38.8545,16.7359
-3.3v,293.691,17.5673,48.1696,7.649,38.934,16.7013
-1.8v,282.833,17.5504,44.4816,7.15846,38.9171,16.0438

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption1.csv
deleted file mode 100644
index 8a1ec6f..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption1.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 5.00v, 25°c",0.0002,897.5,805.25
-"SS corner, 4.50v, -40°c",0.00016,702.945,632.295
-"SS corner, 4.50v, 125°c",0.00021,731.97,662.018
-"FF corner, 5.50v, 125°c",0.01252,1146.72,1036.97
-"FF corner, 5.50v, -40°c",0.00024,1091.34,983.758

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption2.csv
deleted file mode 100644
index faf466c..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption2.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 3.3v, 25°c",0.00009,357.571,324.472
-"SS corner, 3.0v, -40°c",0.00007,284.31,262.08
-"SS corner, 3.6v, 125°c",0.0001,303.885,276.39
-"FF corner, 3.6v, 125°c",0.00491,460.764,413.478
-"FF corner, 3.6v, -40°c",0.0001,427.68,386.604

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption3.csv
deleted file mode 100644
index a1b4de9..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/4_Power_Consumption3.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 1.8v, 25°c",0.00003,96.498,88.7733
-"SS corner, 1.62v, -40°c",0.00002,76.3255,70.9123
-"SS corner, 1.62v, 125°c",0.00003,81.5346,74.767
-"FF corner, 1.98v, 125°c",0.00159,125.948,114.038
-"FF corner,1.98v, -40°c",0.00003,115.503,105.088

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics1.csv
deleted file mode 100644
index 8cd4a65..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics1.csv
+++ /dev/null

@@ -1,92 +0,0 @@
-Symbol,"Parameter
-
-Description","SNSP
-
-Process
-
-4.5v, -40C","SNSP
-
-Process
-
-4.5v, 125C","Typical
-
-Process
-
-5.0v, 25C","FNFP
-
-Process
-
-5.5v, 125C","FNFP
-
-Process
-
-5.5v, -40C",unit
-Tcyc,Min clock period,7.2968,10.5483,5.8805,5.4403,3.8099,ns
-Tckh,Min clock high time,2.557,4.5174,2.2464,2.1763,1.411,ns
-Tckl,Min clock low time,2.5652,4.5311,2.3734,2.3048,1.3029,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",0.459,0.5874,0.4066,0.3895,0.3233,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.2324,1.8522,1.1095,1.0791,0.7647,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.5119,0.6595,0.4349,0.411,0.3372,ns
-Tchh,"CEN hold time
-
-( CEN = H )",1.2853,1.9179,1.1378,1.1006,0.7786,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",0.7164,1.014,0.6277,0.5876,0.4544,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",0.9936,1.3718,0.8367,0.7948,0.5965,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",0.6741,0.9339,0.5892,0.5612,0.4344,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.5303,0.6896,0.4644,0.4611,0.3654,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.2801,0.3526,0.2642,0.2408,0.2218,ns
-Twihl,"WEN hold time
-
-( WEN = L )",0.9957,1.3718,0.8367,0.7948,0.5965,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.5303,0.6924,0.4646,0.4611,0.3654,ns
-Tasl,"A set up time
-
-( A = L )",0.8834,1.1569,0.7313,0.6558,0.5337,ns
-Tahl,"A hold time
-
-( A = L )",0.6364,0.8155,0.5345,0.4939,0.4013,ns
-Tash,"A set up time
-
-( A = H )",0.6186,0.8442,0.5154,0.4813,0.3834,ns
-Tahh,"A hold time
-
-( A = H )",0.6573,0.8495,0.5472,0.5023,0.4071,ns
-Tdsl,"D set up time
-
-( D = L )",0.1168,0.099,0.1188,0.1022,0.1285,ns
-Tdhl,"D hold time
-
-( D = L )",0.5183,0.6714,0.4622,0.472,0.3631,ns
-Tdsh,"D set up time
-
-( D = H )",0.5947,0.7737,0.4831,0.4111,0.359,ns
-Tdhh,"D hold time
-
-( D= H )",0.7521,1.0224,0.6506,0.6352,0.4843,ns
-Tah,"Clock high 
-
-to Q high",5.399,7.9528,4.4262,4.1233,2.8427,ns
-Tal,"Clock high
-
- to Q low",5.5834,8.2156,4.5722,4.2356,2.93,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics2.csv
deleted file mode 100644
index 79dde90..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics2.csv
+++ /dev/null

@@ -1,80 +0,0 @@
-Symbol,"Parameter
-description","SNSP
-Process
-3.0v, -40C","SNSP
-Process
-3.0, 125C","Typical
-Process
-3.3v, 25C","FNFP
-Process
-3.6v, 125C","FNFP
-Process
-3.6v, -40C",unit
-Tcyc,Min clock period,11.287,16.6365,8.4053,7.2375,4.8961,ns
-Tckh,Min clock high time,3.6774,4.7153,2.7639,2.5493,2.4443,ns
-Tckl,Min clock low time,4.4364,5.9546,2.8652,3.328,1.9857,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",0.6575,0.8523,0.5421,0.4968,0.4053,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.9064,2.8563,1.594,1.4782,1.0188,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.8066,1.0749,0.6133,0.5368,0.4259,ns
-Tchh,"CEN hold time
-( CEN = H )",2.0101,2.9791,1.6398,1.5029,1.0368,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",1.1592,1.6428,0.9199,0.8121,0.5999,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",1.4433,2.0627,1.138,1.024,0.7538,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",1.0287,1.4302,0.8238,0.742,0.557,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.7157,0.9902,0.592,0.5628,0.4407,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.441,0.5252,0.3732,0.3322,0.287,ns
-Twihl,"WEN hold time
-
-( WEN = L )",1.4443,2.0643,1.138,1.024,0.7538,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.7158,0.9902,0.592,0.5628,0.4407,ns
-Tasl,"A set up time
-
-( A = L )",1.32,1.6823,1.0068,0.8583,0.6762,ns
-Tahl,"A hold time
-
-( A = L )",0.8788,1.1411,0.6955,0.6157,0.4954,ns
-Tash,"A set up time
-
-( A = H )",0.9908,1.2941,0.7507,0.6486,0.5052,ns
-Tahh,"A hold time
-
-( A = H )",0.9417,1.2293,0.7292,0.637,0.5084,ns
-Tdsl,"D set up time
-
-( D = L )",0.1738,0.1041,0.156,0.1357,0.1612,ns
-Tdhl,"D hold time
-
-( D = L )",0.6128,0.8611,0.5512,0.5437,0.4224,ns
-Tdsh,"D set up time
-
-( D = H )",1.0132,1.2631,0.7156,0.5732,0.4724,ns
-Tdhh,"D hold time
-
-( D= H )",1.0883,1.5344,0.8666,0.8014,0.5999,ns
-Tah,"Clock high 
-
-to Q high",8.3652,12.1944,6.298,5.501,3.7381,ns
-Tal,"Clock high
-
- To Q low",8.7238,12.7032,6.5484,5.6867,3.873,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics3.csv
deleted file mode 100644
index 44a99b0..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/5_AC_Characteristics3.csv
+++ /dev/null

@@ -1,84 +0,0 @@
-Symbol,"Parameter
-description","SNSP
-Process
-1.62v, -40C","SNSP
-Process
-1.62v,
-125C","Typical
-Process
-1.8v, 25C","FNFP
-Process
-1.98v,
-125C","FNFP
-Process
-1.98v, -40C",unit
-Tcyc,Min clock period,48.0305,51.9626,21.8315,14.0727,10.2767,ns
-Tckh,Min clock high time,21.8197,13.4605,10.6663,3.7733,2.6968,ns
-Tckl,Min clock low time,22.5675,21.362,10.6844,5.1485,3.7226,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",2.3724,2.4562,1.1519,0.8005,0.6534,ns
-Tchl,"CEN hold time
-
-( CEN = L )",7.2717,8.1123,3.8274,2.746,2.0001,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",3.5899,3.621,1.5559,0.9713,0.7968,ns
-Tchh,"CEN hold time
-
-( CEN = H )",8.1139,8.8496,4.0504,2.8068,2.0571,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",5.4203,5.5914,2.4142,1.5341,1.1897,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",6.5279,7.0068,2.5795,1.764,1.3151,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",3.7875,4.1574,1.8835,1.3011,1.0048,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",3.7942,4.0118,1.2881,0.8686,0.6835,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0,0.0413,0.6956,0.5569,0.4878,ns
-Twihl,"WEN hold time
-
-( WEN = L )",6.5574,7.0283,2.5901,1.764,1.3173,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",3.8062,4.024,1.2894,0.8686,0.6835,ns
-Tasl,"A set up time
-
-( A = L )",2.7688,2.9848,2.0331,1.4547,1.1882,ns
-Tahl,"A hold time
-
-( A = L )",2.4697,2.6801,1.3163,0.9482,0.7648,ns
-Tash,"A set up time
-
-( A = H )",3.5404,3.5743,1.6536,1.1654,0.9602,ns
-Tahh,"A hold time
-
-( A = H )",3.0635,3.2382,1.5118,1.0362,0.8406,ns
-Tdsl,"D set up time
-
-( D = L )",0,0,0.0154,0.1334,0.1847,ns
-Tdhl,"D hold time
-
-( D = L )",3.0741,3.1426,0.9688,0.7561,0.5574,ns
-Tdsh,"D set up time
-
-( D = H )",3.4192,3.2969,1.8301,1.0588,0.9275,ns
-Tdhh,"D hold time
-
-( D= H )",5.7672,5.9734,2.1079,1.3541,1.0484,ns
-Tah,"Clock high
-
- to Q High
-",32.9568,36.3012,15.606,10.2752,7.5431,ns
-Tal,"Clock high
-
- To Q low",35.4984,38.5848,16.5192,10.751,7.9138,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/6_Physical_Dimensions.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/6_Physical_Dimensions.csv
deleted file mode 100644
index 4be6293..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram128x8m8wm1/tables_clear/6_Physical_Dimensions.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-Width(um),Height(um),Area(um^2)

-431.86,268.88,116118.5168


diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1.rst
deleted file mode 100644
index b97aa88..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1.rst
+++ /dev/null

@@ -1,46 +0,0 @@
-***********************************
-gf180mcu_fd_ip_sram__sram256x8m8wm1
-***********************************
-
-.. centered::
-   **gf180mcu_fd_ip_sram__sram256x8m8wm1**
-.. centered::
-   **180nm 5V Green synchronous single port SRAM**
-.. centered::
-   **Memory Macro IP**
-.. centered::
-   **Datasheet**
-
-====
-
-**Features**
-
-- Uses 180nm 5V Green CMOS 13.5um2 6 transistors bitcell
-
-- 256 words X 8 bits, mux 8 Instance
-
-- Periphery circuitry uses 5V transistors
-
-- Operating voltage is 1.62V to 5.50V
-
-- Operating temperature is -40 degC to 125 degC
-
-- Minimum 3 layers of metals required: Metal1, Metal2, Metal3
-
-- Bit write mask
-
-- Self timed operation to reduce power
-
-- Separate data in and data out ports
-
-- Macro cell name: gf180mcu_fd_ip_sram__sram256x8m8wm1
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_1
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_2
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_3
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_4
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_5
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_6

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_1.rst
deleted file mode 100644
index c8ffabd..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_1.rst
+++ /dev/null

@@ -1,8 +0,0 @@
-====================
-1.0 Pins Description
-====================
-
-.. csv-table::
-   :file: tables_clear/1_pins_desc.csv
-
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_2.rst
deleted file mode 100644
index 0e9bf34..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_2.rst
+++ /dev/null

@@ -1,11 +0,0 @@
-===============
-2.0 Truth Table
-===============
-
-.. csv-table::
-   :file: tables_clear/2_truth_table.csv
-
-.. note::
-
-    X: don't care
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_3.rst
deleted file mode 100644
index 1260dc5..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_3.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-=========================================
-3.0 Capacitance loading ( fF ) @ TT, 25°c
-=========================================
-
-.. csv-table::
-   :file: tables_clear/3_Capacitance_loading.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4.rst
deleted file mode 100644
index ff57087..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4.rst
+++ /dev/null

@@ -1,12 +0,0 @@
-============================
-4.0 Power Consumption ( uW )
-============================
-
-Condition of AC Write power is all data input pins switch and AC Read power is all address input and data output pins switch at 1MHz
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_4_1
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_4_2
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_4_3

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_1.rst
deleted file mode 100644
index a906a19..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.1 5.0V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_2.rst
deleted file mode 100644
index b2ab442..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_2.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.2 3.3V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_3.rst
deleted file mode 100644
index 82fcff1..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_4_3.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.3 1.8V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption3.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5.rst
deleted file mode 100644
index cc20f2f..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5.rst
+++ /dev/null

@@ -1,12 +0,0 @@
-======================
-5.0 AC Characteristics
-======================
-
-The timing and power values measured from the input slew of 20ps on clock pin, 20ps on signal and output load .01pF.
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_5_1
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_5_2
-    gf180mcu_fd_ip_sram__sram256x8m8wm1_5_3

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_1.rst
deleted file mode 100644
index d4ae331..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-===========================
-5.1 5.0V AC Characteristics
-===========================
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_2.rst
deleted file mode 100644
index beb5c6b..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_2.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-===========================
-5.2 3.3V AC Characteristics
-===========================
-
- .. csv-table::
-    :file: tables_clear/5_AC_Characteristics2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_3.rst
deleted file mode 100644
index b82a8e6..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_5_3.rst
+++ /dev/null

@@ -1,15 +0,0 @@
-===========================
-5.3 1.8V AC Characteristics
-===========================
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics3.csv
-
-.. centered::
-    **AC Timing Waveform Chart**
-
-.. image:: images/ac_timing.png
-   :width: 600
-   :align: center
-   :alt: AC Timing Waveform Chart
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_6.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_6.rst
deleted file mode 100644
index f5af473..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1_6.rst
+++ /dev/null

@@ -1,8 +0,0 @@
-=======================
-6.0 Physical Dimensions
-=======================
-
-.. csv-table::
-   :file: tables_clear/6_Physical_Dimensions.csv
-
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/images/ac_timing.png b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/images/ac_timing.png
deleted file mode 100644
index d0751e8..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/images/ac_timing.png
+++ /dev/null
Binary files differ

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/0_release.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/0_release.csv
deleted file mode 100644
index cc8d44f..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/0_release.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-"",Date,Description

-1.0,2014/06/20,Release


diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/1_pins_desc.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/1_pins_desc.csv
deleted file mode 100644
index 4859265..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/1_pins_desc.csv
+++ /dev/null

@@ -1,44 +0,0 @@
-Signal,Direction,Description
-CLK,Input,"Clock for the memory. Rising edge triggers
-
-operation. All inputs are latched at rising edge of the
-
-clock signal"
-CEN,Input,"Memory Enable, Active Low. When CEN is Low, the
-
-memory is enabled. When CEN input is High, the
-
-memory is deactivated but internal states are
-
-retained. CEN must be high before 1st running cycle."
-A[6:0],Input,"Address Input. This Address input port is used to
-
-address the location to be written during the write
-
-cycle and read during the read cycle."
-GWEN,Input,"Write Enable Input. The RAM is in write cycle when
-
-GWEN is low. The RAM is in read cycle when
-
-GWEN is high."
-WEN[7:0],Input,"Bit Write Mask, Active Low. When the memory is in
-
-the write cycle, selectively write into individual
-
-outputs are controlled by WEN[7:0]. For example, if
-
-CEN, GWEN, WEN[0] are low and WEN[7:1] are
-
-high, only D[0] will write into the addressed location and
-
-D[7:1] will be ignored during CLK low to high transition."
-D[7:0],Input,"Data input bus. The data input bus is used to write
-
-data into the memory location specified by address
-
-input port during the write cycle."
-Q[7:0],output,"Data output bus. It outputs the contents of the
-
-memory location addressed by the Address Input signals."
-VDD,Power,Power pin.
-VSS,Ground,Ground pin.

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/2_truth_table.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/2_truth_table.csv
deleted file mode 100644
index 94ed477..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/2_truth_table.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-CLK,CEN,GWEN,WEN,A,D,Q,status
-,H,X,X,X,X,Hold previous data,Standby mode
-,L,H,X,A,X,Q,Read mode
-,L,L,H,A,D,Hold previous data,Write mode
-,L,L,L,A,D,Hold previous data,Mask mode
-other,X,X,X,X,X,Hold previous data,Unchanged

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/3_Capacitance_loading.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/3_Capacitance_loading.csv
deleted file mode 100644
index 84b0125..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/3_Capacitance_loading.csv
+++ /dev/null

@@ -1,4 +0,0 @@
-Voltage,CLK,CEN,GWEN,WEN,A,D
-5.0v,298.056,18.2857,49.4975,7.84667,40.4163,16.4131
-3.3v,293.631,18.3651,48.0112,7.649,40.4958,16.3071
-1.8v,282.773,18.3483,44.3232,7.15846,40.4789,16.0437

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption1.csv
deleted file mode 100644
index 81d0b12..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption1.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 5.00v, 25°c",0.00034,939.625,841.225
-"SS corner, 4.50v, -40°c",0.00028,735.458,662.67
-"SS corner, 4.50v, 125°c",0.00034,761.49,693.63
-"FF corner, 5.50v, 125°c",0.01866,1195.51,1079.29
-"FF corner, 5.50v, -40°c",0.00041,1140.56,1025.26

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption2.csv
deleted file mode 100644
index ffce61b..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption2.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 3.3v, 25°c",0.00015,375.012,338.663
-"SS corner, 3.0v, -40°c",0.00012,300.42,275.565
-"SS corner, 3.6v, 125°c",0.00016,318.3,288.78
-"FF corner, 3.6v, 125°c",0.00732,478.296,430.812
-"FF corner, 3.6v, -40°c",0.00018,446.67,403.308

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption3.csv
deleted file mode 100644
index b764f5a..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/4_Power_Consumption3.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 1.8v, 25°c",0.00004,102.006,93.51
-"SS corner, 1.62v, -40°c",0.00004,81.2349,75.087
-"SS corner, 1.62v, 125°c",0.00005,86.0949,79.1103
-"FF corner, 1.98v, 125°c",0.00236,130.858,119.087
-"FF corner,1.98v, -40°c",0.00005,120.602,110.454

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics1.csv
deleted file mode 100644
index e7e744c..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics1.csv
+++ /dev/null

@@ -1,91 +0,0 @@
-Symbol,"Parameter
-
-Description","SNSP 
-
-Process
-
-4.5v, -40C","SNSP
-
-Process
-
-4.5v, 125C","Typical
-
-Process
-
-5.0v, 25C","FNFP
-
-Process
-
-5.5v, 125C","FNFP
-
-Process
-
-5.5v, -40C",unit
-Tcyc,Min clock period,7.5946,11,6.1181,5.6608,3.957,ns
-Tckh,Min clock high time,3.3401,5.4009,2.6907,2.0829,1.4546,ns
-Tckl,Min clock low time,3.5036,4.9693,2.6661,1.9737,1.5862,ns
-,,,,,,,
-Tcsl,"CEN set up time
-
-( CEN = L )",0.4584,0.5869,0.406,0.3883,0.3228,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.2328,1.8527,1.1081,1.0768,0.7655,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.5124,0.6616,0.435,0.411,0.3369,ns
-Tchh,"CEN hold time
-
-( CEN = H )",1.2868,1.9188,1.1371,1.0995,0.7797,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",0.718,1.0143,0.6281,0.5888,0.4541,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",1.0062,1.3936,0.8467,0.8056,0.6051,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",0.6753,0.9358,0.5903,0.5619,0.4329,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.5421,0.712,0.4752,0.4717,0.3744,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.2681,0.3326,0.2552,0.2318,0.2132,ns
-Twihl,"WEN hold time
-
-( WEN = L )",1.0093,1.3936,0.8467,0.8056,0.6051,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.5428,0.7142,0.4752,0.4717,0.3744,ns
-Tasl,"A set up time
-
-( A = L )",0.8176,1.0609,0.6825,0.6069,0.4999,ns
-Tahl,"A hold time
-
-( A = L )",0.6347,0.8154,0.5351,0.4936,0.4026,ns
-Tash,"A set up time
-
-( A = H )",0.6116,0.8236,0.5149,0.4745,0.3738,ns
-Tahh,"A hold time
-
-( A = H )",0.6556,0.8491,0.5475,0.5017,0.4073,ns
-Tdsl,"D set up time
-
-( D = L )",0.1068,0.0793,0.1079,0.0931,0.1215,ns
-Tdhl,"D hold time
-
-( D = L )",0.5319,0.6948,0.4699,0.4799,0.3698,ns
-Tdsh,"D set up time
-
-( D = H )",0.5818,0.7537,0.4744,0.4028,0.3544,ns
-Tdhh,"D hold time
-
-( D= H )",0.7624,1.0445,0.659,0.6446,0.491,ns
-Tah,"Clock high to Q
-
-high",5.5913,8.2512,4.5692,4.2569,2.9344,ns
-Tal,Clock high to Q low,5.7745,8.5132,4.7158,4.3699,3.025,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics2.csv
deleted file mode 100644
index 6f29a3a..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics2.csv
+++ /dev/null

@@ -1,79 +0,0 @@
-Symbol,"Parameter
-description","SNSP
-Process
-3.0v, -40C","SNSP
-Process
-3.0, 125C","Typical
-Process
-3.3v, 25C","FNFP
-Process
-3.6v, 125C","FNFP
-Process
-3.6v, -40C",unit
-Tcyc,Min clock period,11.6044,17.0863,8.5597,7.3978,5.1007,ns
-Tckh,Min clock high time,4.1518,5.1878,3.2873,2.8975,1.8998,ns
-Tckl,Min clock low time,4.2752,6.2768,3.891,2.9738,1.8573,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",0.6591,0.8517,0.542,0.4951,0.4047,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.9054,2.849,1.592,1.4784,1.0184,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.8058,1.0775,0.6175,0.5341,0.4262,ns
-Tchh,"CEN hold time
-
-( CEN = H )",2.0065,2.9742,1.64,1.5046,1.0375,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",1.1586,1.6455,0.9198,0.8113,0.6012,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",1.4693,2.0948,1.1528,1.039,0.7639,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",1.0285,1.4295,0.8241,0.741,0.5578,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.7347,1.0252,0.6061,0.5779,0.4516,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.4276,0.4945,0.36,0.3185,0.2767,ns
-Twihl,"WEN hold time
-
-( WEN = L )",1.47,2.0958,1.1533,1.039,0.7639,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.7364,1.0252,0.6064,0.5779,0.4516,ns
-Tasl,"A set up time
-
-( A = L )",1.2239,1.5436,0.9321,0.793,0.634,ns
-Tahl,"A hold time
-
-( A = L )",0.883,1.1501,0.6944,0.6117,0.4942,ns
-Tash,"A set up time
-
-( A = H )",0.9765,1.2625,0.7394,0.6387,0.497,ns
-Tahh,"A hold time
-
-( A = H )",0.9455,1.2363,0.7301,0.6353,0.5077,ns
-Tdsl,"D set up time
-
-( D = L )",0.151,0.0675,0.1406,0.1223,0.1528,ns
-Tdhl,"D hold time
-
-( D = L )",0.6331,0.8795,0.5685,0.56,0.4337,ns
-Tdsh,"D set up time
-
-( D = H )",0.9896,1.2399,0.694,0.5587,0.4635,ns
-Tdhh,"D hold time
-
-( D= H )",1.1116,1.5609,0.8826,0.8138,0.6107,ns
-Tah,"Clock high to Q
-
-high",8.6801,12.588,6.501,5.6753,3.8609,ns
-Tal,Clock high to Q low,9.039,13.1052,6.7522,5.8621,3.994,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics3.csv
deleted file mode 100644
index cfd9a8a..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/5_AC_Characteristics3.csv
+++ /dev/null

@@ -1,81 +0,0 @@
-Symbol,"Parameter
-description","SNSP
-Process
-1.62v, -40C","SNSP
-Process
-1.62v,
-125C","Typical
-Process
-1.8v, 25C","FNFP
-Process
-1.98v,
-125C","FNFP
-Process
-1.98v, -40C",unit
-Tcyc,Min clock period,49.6236,53.6235,22.4703,14.439,10.5548,ns
-Tckh,Min clock high time,18.4434,25.7785,10.9148,3.8319,4.6646,ns
-Tckl,Min clock low time,24.2445,20.8014,10.2887,5.3502,4.7431,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",2.3681,2.4651,1.1518,0.7912,0.6521,ns
-Tchl,"CEN hold time
-
-( CEN = L )",7.2637,8.1415,3.8285,2.745,1.9932,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",3.5818,3.6043,1.5568,0.9701,0.7982,ns
-Tchh,"CEN hold time
-
-( CEN = H )",8.1245,8.8521,4.0462,2.8098,2.0519,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",5.3918,5.595,2.4131,1.5312,1.1886,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",6.6902,7.1843,2.641,1.7922,1.3425,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",3.788,4.1484,1.8898,1.3037,1.0054,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",3.9825,4.2086,1.3454,0.9058,0.7109,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0,0,0.635,0.5269,0.4594,ns
-Twihl,"WEN hold time
-
-( WEN = L )",6.7241,7.2059,2.6513,1.7922,1.345,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",3.9825,4.2086,1.3498,0.9058,0.7109,ns
-Tasl,"A set up time
-
-( A = L )",2.5026,2.5937,1.8544,1.345,1.102,ns
-Tahl,"A hold time
-
-( A = L )",2.4783,2.6941,1.3189,0.9519,0.7682,ns
-Tash,"A set up time
-
-( A = H )",3.5235,3.5752,1.5839,1.1347,0.92,ns
-Tahh,"A hold time
-
-( A = H )",3.0774,3.2544,1.517,1.0314,0.8371,ns
-Tdsl,"D set up time
-
-( D = L )",0,0,0,0.1068,0.1609,ns
-Tdhl,"D hold time
-
-( D = L )",3.233,3.3177,1.0226,0.7713,0.5799,ns
-Tdsh,"D set up time
-
-( D = H )",3.2797,3.1593,1.7976,1.0285,0.9057,ns
-Tdhh,"D hold time
-
-( D= H )",5.9233,6.148,2.1673,1.38,1.0712,ns
-Tah,"Clock high to Q
-
-high",34.2708,37.734,16.1892,10.6138,7.8157,ns
-Tal,Clock high to Q low,36.8388,39.9912,17.106,11.0951,8.1864,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/6_Physical_Dimensions.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/6_Physical_Dimensions.csv
deleted file mode 100644
index e21ac1d..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram256x8m8wm1/tables_clear/6_Physical_Dimensions.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-Width(um),Height(um),Area(um^2)

-431.86,340.88,147212.4368


diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1.rst
deleted file mode 100644
index 857621e..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1.rst
+++ /dev/null

@@ -1,46 +0,0 @@
-***********************************
-gf180mcu_fd_ip_sram__sram512x8m8wm1
-***********************************
-
-.. centered::
-   **gf180mcu_fd_ip_sram__sram512x8m8wm1**
-.. centered::
-   **180nm 5V Green synchronous single port SRAM**
-.. centered::
-   **Memory Macro IP**
-.. centered::
-   **Datasheet**
-
-====
-
-**Features**
-
-- Uses 180nm 5V Green CMOS 13.5um2 6 transistors bitcell
-
-- 512 words X 8 bits, mux 8 Instance
-
-- Periphery circuitry uses 5V transistors
-
-- Operating voltage is 1.62V to 5.50V
-
-- Operating temperature is -40 degC to 125 degC
-
-- Minimum 3 layers of metals required: Metal1, Metal2, Metal3
-
-- Bit write mask
-
-- Self timed operation to reduce power
-
-- Separate data in and data out ports
-
-- Macro cell name: gf180mcu_fd_ip_sram__sram512x8m8wm1
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_1
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_2
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_3
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_4
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_5
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_6

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_1.rst
deleted file mode 100644
index be4ade7..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-====================
-1.0 Pins Description
-====================
-
-.. csv-table::
-   :file: tables_clear/1_pins_desc.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_2.rst
deleted file mode 100644
index 0e9bf34..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_2.rst
+++ /dev/null

@@ -1,11 +0,0 @@
-===============
-2.0 Truth Table
-===============
-
-.. csv-table::
-   :file: tables_clear/2_truth_table.csv
-
-.. note::
-
-    X: don't care
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_3.rst
deleted file mode 100644
index 1260dc5..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_3.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-=========================================
-3.0 Capacitance loading ( fF ) @ TT, 25°c
-=========================================
-
-.. csv-table::
-   :file: tables_clear/3_Capacitance_loading.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4.rst
deleted file mode 100644
index f87d965..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4.rst
+++ /dev/null

@@ -1,12 +0,0 @@
-============================
-4.0 Power Consumption ( uW )
-============================
-
-Condition of AC Write power is all data input pins switch and AC Read power is all address input and data output pins switch at 1MHz
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_4_1
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_4_2
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_4_3

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_1.rst
deleted file mode 100644
index a906a19..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.1 5.0V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_2.rst
deleted file mode 100644
index b2ab442..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_2.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.2 3.3V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_3.rst
deleted file mode 100644
index 82fcff1..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_4_3.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.3 1.8V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption3.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5.rst
deleted file mode 100644
index 181f2b4..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5.rst
+++ /dev/null

@@ -1,13 +0,0 @@
-======================
-5.0 AC Characteristics
-======================
-
-The timing and power values measured from the input slew of 20ps on clock pin, 20ps on signal and output load .01pF.
-
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_5_1
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_5_2
-    gf180mcu_fd_ip_sram__sram512x8m8wm1_5_3

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_1.rst
deleted file mode 100644
index cbcd7e2..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_1.rst
+++ /dev/null

@@ -1,6 +0,0 @@
-5.1 5.0V AC Characteristics
----------------------------
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_2.rst
deleted file mode 100644
index 616177c..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_2.rst
+++ /dev/null

@@ -1,6 +0,0 @@
-5.2 3.3V AC Characteristics
----------------------------
-
- .. csv-table::
-    :file: tables_clear/5_AC_Characteristics2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_3.rst
deleted file mode 100644
index e37c313..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_5_3.rst
+++ /dev/null

@@ -1,14 +0,0 @@
-5.3 1.8V AC Characteristics
----------------------------
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics3.csv
-
-.. centered::
-    **AC Timing Waveform Chart**
-
-.. image:: images/ac_timing.png
-   :width: 600
-   :align: center
-   :alt: AC Timing Waveform Chart
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_6.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_6.rst
deleted file mode 100644
index f5af473..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1_6.rst
+++ /dev/null

@@ -1,8 +0,0 @@
-=======================
-6.0 Physical Dimensions
-=======================
-
-.. csv-table::
-   :file: tables_clear/6_Physical_Dimensions.csv
-
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/images/ac_timing.png b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/images/ac_timing.png
deleted file mode 100644
index 6058584..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/images/ac_timing.png
+++ /dev/null
Binary files differ

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/0_release.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/0_release.csv
deleted file mode 100644
index cc8d44f..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/0_release.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-"",Date,Description

-1.0,2014/06/20,Release


diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/1_pins_desc.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/1_pins_desc.csv
deleted file mode 100644
index 4859265..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/1_pins_desc.csv
+++ /dev/null

@@ -1,44 +0,0 @@
-Signal,Direction,Description
-CLK,Input,"Clock for the memory. Rising edge triggers
-
-operation. All inputs are latched at rising edge of the
-
-clock signal"
-CEN,Input,"Memory Enable, Active Low. When CEN is Low, the
-
-memory is enabled. When CEN input is High, the
-
-memory is deactivated but internal states are
-
-retained. CEN must be high before 1st running cycle."
-A[6:0],Input,"Address Input. This Address input port is used to
-
-address the location to be written during the write
-
-cycle and read during the read cycle."
-GWEN,Input,"Write Enable Input. The RAM is in write cycle when
-
-GWEN is low. The RAM is in read cycle when
-
-GWEN is high."
-WEN[7:0],Input,"Bit Write Mask, Active Low. When the memory is in
-
-the write cycle, selectively write into individual
-
-outputs are controlled by WEN[7:0]. For example, if
-
-CEN, GWEN, WEN[0] are low and WEN[7:1] are
-
-high, only D[0] will write into the addressed location and
-
-D[7:1] will be ignored during CLK low to high transition."
-D[7:0],Input,"Data input bus. The data input bus is used to write
-
-data into the memory location specified by address
-
-input port during the write cycle."
-Q[7:0],output,"Data output bus. It outputs the contents of the
-
-memory location addressed by the Address Input signals."
-VDD,Power,Power pin.
-VSS,Ground,Ground pin.

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/2_truth_table.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/2_truth_table.csv
deleted file mode 100644
index 94ed477..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/2_truth_table.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-CLK,CEN,GWEN,WEN,A,D,Q,status
-,H,X,X,X,X,Hold previous data,Standby mode
-,L,H,X,A,X,Q,Read mode
-,L,L,H,A,D,Hold previous data,Write mode
-,L,L,L,A,D,Hold previous data,Mask mode
-other,X,X,X,X,X,Hold previous data,Unchanged

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/3_Capacitance_loading.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/3_Capacitance_loading.csv
deleted file mode 100644
index 1ac9491..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/3_Capacitance_loading.csv
+++ /dev/null

@@ -1,4 +0,0 @@
-Voltage,CLK,CEN,GWEN,WEN,A,D
-5.0v,297.584,18.1905,49.4974,7.84667,40.1181,16.7494
-3.3v,293.159,18.27,48.0111,7.64901,40.1976,16.6433
-1.8v,282.301,18.2531,44.3231,7.15847,40.1807,16.0497

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption1.csv
deleted file mode 100644
index 014d518..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption1.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 5.00v, 25°c",0.00062,1017.1,908.1
-"SS corner, 4.50v, -40°c",0.0005,800.37,721.237
-"SS corner, 4.50v, 125°c",0.00062,830.363,746.438
-"FF corner, 5.50v, 125°c",0.0309,1293.85,1165.42
-"FF corner, 5.50v, -40°c",0.00075,1231.09,1109.16

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption2.csv
deleted file mode 100644
index 1b4f582..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption2.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 3.3v, 25°c",0.00027,408.606,369.6
-"SS corner, 3.0v, -40°c",0.00022,330.795,301.665
-"SS corner, 3.6v, 125°c",0.00028,347.865,314.25
-"FF corner, 3.6v, 125°c",0.01212,520.218,468.576
-"FF corner, 3.6v, -40°c",0.00032,487.188,437.886

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption3.csv
deleted file mode 100644
index ede4448..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/4_Power_Consumption3.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 1.8v, 25°c",0.00008,112.563,103.176
-"SS corner, 1.62v, -40°c",0.00006,91.53,84.2238
-"SS corner, 1.62v, 125°c",0.00009,95.2317,87.8526
-"FF corner, 1.98v, 125°c",0.00394,144.174,130.433
-"FF corner,1.98v, -40°c",0.0001,133.709,121.344

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics1.csv
deleted file mode 100644
index 294e01b..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics1.csv
+++ /dev/null

@@ -1,90 +0,0 @@
-Symbol,"Parameter
-
-Description","SNSP 
-
-Process
-
-4.5v, -40C","SNSP
-
-Process
-
-4.5v, 125C","Typical
-
-Process
-
-5.0v, 25C","FNFP
-
-Process
-
-5.5v, 125C","FNFP
-
-Process
-
-5.5v, -40C",unit
-Tcyc,Min clock period,11.8901,6.5937,6.077,4.2421,11.8901,ns
-Tckh,Min clock high time,4.3873,2.3769,2.1038,1.8983,4.3873,ns
-Tckl,Min clock low time,5.7235,2.2522,1.9814,1.4532,5.7235,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",0.4582,0.5864,0.4059,0.3889,0.3231,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.2316,1.8518,1.1086,1.0775,0.7646,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.5133,0.6606,0.4354,0.411,0.3375,ns
-Tchh,"CEN hold time
-
-( CEN = H )",1.2867,1.9195,1.1381,1.0996,0.779,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",0.7179,1.0125,0.6271,0.5879,0.4532,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",1.0255,1.4235,0.8652,0.819,0.6148,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",0.6755,0.9341,0.5901,0.5622,0.433,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.5605,0.7418,0.4925,0.4851,0.3836,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.2494,0.3009,0.2391,0.218,0.2038,ns
-Twihl,"WEN hold time
-
-( WEN = L )",1.0282,1.4235,0.8652,0.819,0.6148,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.5605,0.7418,0.4931,0.4851,0.3837,ns
-Tasl,"A set up time
-
-( A = L )",1.1558,1.5283,0.9474,0.8643,0.679,ns
-Tahl,"A hold time
-
-( A = L )",0.6375,0.8184,0.5362,0.4959,0.4032,ns
-Tash,"A set up time
-
-( A = H )",0.7684,1.0405,0.6332,0.5787,0.4539,ns
-Tahh,"A hold time
-
-( A = H )",0.659,0.8526,0.549,0.5055,0.4089,ns
-Tdsl,"D set up time
-
-( D = L )",0.0889,0.0487,0.094,0.0803,0.1129,ns
-Tdhl,"D hold time
-
-( D = L )",0.5488,0.7168,0.4841,0.4914,0.3799,ns
-Tdsh,"D set up time
-
-( D = H )",0.5634,0.7242,0.4577,0.3912,0.3446,ns
-Tdhh,"D hold time
-
-( D= H )",0.7802,1.0735,0.6741,0.6581,0.5006,ns
-Tah,"Clock high to Q
-
-high",5.953,8.7955,4.8599,4.5151,3.1066,ns
-Tal,Clock high to Q low,6.1438,9.0608,5.008,4.6284,3.2005,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics2.csv
deleted file mode 100644
index 45c8971..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics2.csv
+++ /dev/null

@@ -1,79 +0,0 @@
-Symbol,"Parameter
-description","SNSP
-Process
-3.0v, -40C","SNSP
-Process
-3.0, 125C","Typical
-Process
-3.3v, 25C","FNFP
-Process
-3.6v, 125C","FNFP
-Process
-3.6v, -40C",unit
-Tcyc,Min clock period,12.5529,18.2595,9.2406,7.9594,5.48,ns
-Tckh,Min clock high time,4.5988,5.6648,3.5802,3.2438,2.1235,ns
-Tckl,Min clock low time,5.8235,5.4055,3.3345,3.7782,2.5263,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",0.658,0.8516,0.5415,0.497,0.4053,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.9061,2.8524,1.5935,1.4765,1.0184,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.8032,1.076,0.6128,0.5388,0.4264,ns
-Tchh,"CEN hold time
-
-( CEN = H )",2.0053,2.9771,1.6396,1.5031,1.037,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",1.1636,1.645,0.9175,0.8121,0.5997,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",1.5057,2.1524,1.1825,1.061,0.7786,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",1.0276,1.4295,0.8238,0.742,0.5564,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.7708,1.0797,0.6333,0.5996,0.4649,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.3907,0.444,0.3367,0.2966,0.2662,ns
-Twihl,"WEN hold time
-
-( WEN = L )",1.5067,2.1547,1.1829,1.061,0.7786,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.7718,1.0797,0.6336,0.5996,0.4649,ns
-Tasl,"A set up time
-
-( A = L )",1.6927,2.2075,1.2815,1.1145,0.8544,ns
-Tahl,"A hold time
-
-( A = L )",0.884,1.1506,0.6974,0.6173,0.4955,ns
-Tash,"A set up time
-
-( A = H )",1.2458,1.6418,0.9275,0.7869,0.6093,ns
-Tahh,"A hold time
-
-( A = H )",0.9477,1.2387,0.7323,0.6397,0.5087,ns
-Tdsl,"D set up time
-
-( D = L )",0.1197,0.0318,0.1189,0.1044,0.1415,ns
-Tdhl,"D hold time
-
-( D = L )",0.668,0.9388,0.5924,0.576,0.4429,ns
-Tdsh,"D set up time
-
-( D = H )",0.9612,1.1874,0.6739,0.5391,0.4509,ns
-Tdhh,"D hold time
-
-( D= H )",1.1461,1.6115,0.9064,0.8323,0.6202,ns
-Tah,"Clock high to Q
-
-high",13.464,6.9234,6.0334,4.09,13.464,ns
-Tal,Clock high to Q low,13.974,7.1773,6.2146,4.2304,13.974,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics3.csv
deleted file mode 100644
index ec2bd94..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/5_AC_Characteristics3.csv
+++ /dev/null

@@ -1,81 +0,0 @@
-Symbol,"Parameter
-description","SNSP
-Process
-1.62v, -40C","SNSP
-Process
-1.62v,
-125C","Typical
-Process
-1.8v, 25C","FNFP
-Process
-1.98v,
-125C","FNFP
-Process
-1.98v, -40C",unit
-Tcyc,Min clock period,52.6523,56.5713,23.5606,14.9291,10.9449,ns
-Tckh,Min clock high time,17.8208,13.3554,11.779,7.4108,4.2538,ns
-Tckl,Min clock low time,24.5821,27.1047,10.0614,6.1401,4.34,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",2.3698,2.4602,1.1516,0.801,0.6549,ns
-Tchl,"CEN hold time
-
-( CEN = L )",7.2664,8.1591,3.8304,2.7423,2.0008,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",3.5768,3.5842,1.5564,0.9737,0.7969,ns
-Tchh,"CEN hold time
-
-( CEN = H )",8.1164,8.8542,4.0473,2.8046,2.056,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",5.3954,5.5797,2.4116,1.5291,1.1932,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",6.8571,7.3684,2.7234,1.8466,1.3762,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",3.7876,4.1535,1.8907,1.2981,1.0047,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",4.1373,4.3563,1.4279,0.9502,0.7447,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0,0,0.5579,0.4839,0.4286,ns
-Twihl,"WEN hold time
-
-( WEN = L )",6.895,7.3911,2.7323,1.8466,1.3786,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",4.1449,4.3647,1.4331,0.9502,0.7447,ns
-Tasl,"A set up time
-
-( A = L )",3.7675,4.186,2.5915,1.8749,1.4826,ns
-Tahl,"A hold time
-
-( A = L )",2.4888,2.7025,1.3228,0.954,0.7737,ns
-Tash,"A set up time
-
-( A = H )",3.5248,3.6466,2.1665,1.4549,1.1977,ns
-Tahh,"A hold time
-
-( A = H )",3.0827,3.2603,1.5182,1.0367,0.8439,ns
-Tdsl,"D set up time
-
-( D = L )",0,0,0,0.0668,0.1388,ns
-Tdhl,"D hold time
-
-( D = L )",3.3868,3.4901,1.0901,0.8321,0.6123,ns
-Tdsh,"D set up time
-
-( D = H )",3.1979,3.0367,1.745,0.9832,0.8835,ns
-Tdhh,"D hold time
-
-( D= H )",6.0875,6.3089,2.2346,1.4269,1.1036,ns
-Tah,"Clock high to Q
-
-high",36.7512,40.5756,17.2992,11.3022,8.3234,ns
-Tal,Clock high to Q low,39.2964,42.84,18.2016,11.7799,8.7016,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/6_Physical_Dimensions.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/6_Physical_Dimensions.csv
deleted file mode 100644
index b1fec58..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram512x8m8wm1/tables_clear/6_Physical_Dimensions.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-Width(um),Height(um),Area(um^2)

-431.86,484.88,209400.2768


diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1.rst
deleted file mode 100644
index 0134868..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1.rst
+++ /dev/null

@@ -1,48 +0,0 @@
-**********************************
-gf180mcu_fd_ip_sram__sram64x8m8wm1
-**********************************
-
-.. centered::
-   **gf180mcu_fd_ip_sram__sram64x8m8wm1**
-.. centered::
-   **180nm 5V Green synchronous single port SRAM**
-.. centered::
-   **Memory Macro IP**
-.. centered::
-   **Datasheet**
-
-====
-
-**Features**
-
-- Uses 180nm 5V Green CMOS 13.5um2 6 transistors bitcell
-
-- 64 words X 8 bits, mux 8 Instance
-
-- Periphery circuitry uses 5V transistors
-
-- Operating voltage is 1.62V to 5.50V
-
-- Operating temperature is -40 degC to 125 degC
-
-- Minimum 3 layers of metals required: Metal1, Metal2, Metal3
-
-- Bit write mask
-
-- Self timed operation to reduce power
-
-- Separate data in and data out ports
-
-- Macro cell name: gf180mcu_fd_ip_sram__sram64x8m8wm1
-
-
-.. toctree::
-    :maxdepth: 2
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_1.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_2.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_3.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_4.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_5.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_6.rst

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_1.rst
deleted file mode 100644
index 37d6534..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-1.0 Pins Description
-====================
-
-.. csv-table::
-   :file: tables_clear/1_pins_desc.csv
-
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_2.rst
deleted file mode 100644
index 9b8d424..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_2.rst
+++ /dev/null

@@ -1,10 +0,0 @@
-2.0 Truth Table
-===============
-
-.. csv-table::
-   :file: tables_clear/2_truth_table.csv
-
-.. note::
-
-    X: don't care
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_3.rst
deleted file mode 100644
index d65b940..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_3.rst
+++ /dev/null

@@ -1,6 +0,0 @@
-3.0 Capacitance loading ( fF ) @ TT, 25°c
-=========================================
-
-.. csv-table::
-   :file: tables_clear/3_Capacitance_loading.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4.rst
deleted file mode 100644
index 8de5d56..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4.rst
+++ /dev/null

@@ -1,12 +0,0 @@
-============================
-4.0 Power Consumption ( uW )
-============================
-
-Condition of AC Write power is all data input pins switch and AC Read power is all address input and data output pins switch at 1MHz
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_4_1.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_4_2.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_4_3.rst

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_1.rst
deleted file mode 100644
index 74b1a2d..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-===============
- 4.1 5.0V Power
-===============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_2.rst
deleted file mode 100644
index b2ab442..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_2.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.2 3.3V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_3.rst
deleted file mode 100644
index 82fcff1..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_4_3.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-==============
-4.3 1.8V Power
-==============
-
-.. csv-table::
-   :file: tables_clear/4_Power_Consumption3.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5.rst
deleted file mode 100644
index d670385..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5.rst
+++ /dev/null

@@ -1,12 +0,0 @@
-======================
-5.0 AC Characteristics
-======================
-
-The timing and power values measured from the input slew of 20ps on clock pin, 20ps on signal and output load .01pF.
-
-.. toctree::
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_5_1.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_5_2.rst
-    gf180mcu_fd_ip_sram__sram64x8m8wm1_5_3.rst

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_1.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_1.rst
deleted file mode 100644
index d4ae331..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_1.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-===========================
-5.1 5.0V AC Characteristics
-===========================
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics1.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_2.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_2.rst
deleted file mode 100644
index beb5c6b..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_2.rst
+++ /dev/null

@@ -1,7 +0,0 @@
-===========================
-5.2 3.3V AC Characteristics
-===========================
-
- .. csv-table::
-    :file: tables_clear/5_AC_Characteristics2.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_3.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_3.rst
deleted file mode 100644
index e37c313..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_5_3.rst
+++ /dev/null

@@ -1,14 +0,0 @@
-5.3 1.8V AC Characteristics
----------------------------
-
-.. csv-table::
-   :file: tables_clear/5_AC_Characteristics3.csv
-
-.. centered::
-    **AC Timing Waveform Chart**
-
-.. image:: images/ac_timing.png
-   :width: 600
-   :align: center
-   :alt: AC Timing Waveform Chart
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_6.rst b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_6.rst
deleted file mode 100644
index 1147001..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1_6.rst
+++ /dev/null

@@ -1,6 +0,0 @@
-6.0 Physical Dimensions
-=======================
-
-.. csv-table::
-   :file: tables_clear/6_Physical_Dimensions.csv
-

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/images/ac_timing.png b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/images/ac_timing.png
deleted file mode 100644
index 30ebd6b..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/images/ac_timing.png
+++ /dev/null
Binary files differ

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/0_release.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/0_release.csv
deleted file mode 100644
index cc8d44f..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/0_release.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-"",Date,Description

-1.0,2014/06/20,Release


diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/1_pins_desc.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/1_pins_desc.csv
deleted file mode 100644
index 4859265..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/1_pins_desc.csv
+++ /dev/null

@@ -1,44 +0,0 @@
-Signal,Direction,Description
-CLK,Input,"Clock for the memory. Rising edge triggers
-
-operation. All inputs are latched at rising edge of the
-
-clock signal"
-CEN,Input,"Memory Enable, Active Low. When CEN is Low, the
-
-memory is enabled. When CEN input is High, the
-
-memory is deactivated but internal states are
-
-retained. CEN must be high before 1st running cycle."
-A[6:0],Input,"Address Input. This Address input port is used to
-
-address the location to be written during the write
-
-cycle and read during the read cycle."
-GWEN,Input,"Write Enable Input. The RAM is in write cycle when
-
-GWEN is low. The RAM is in read cycle when
-
-GWEN is high."
-WEN[7:0],Input,"Bit Write Mask, Active Low. When the memory is in
-
-the write cycle, selectively write into individual
-
-outputs are controlled by WEN[7:0]. For example, if
-
-CEN, GWEN, WEN[0] are low and WEN[7:1] are
-
-high, only D[0] will write into the addressed location and
-
-D[7:1] will be ignored during CLK low to high transition."
-D[7:0],Input,"Data input bus. The data input bus is used to write
-
-data into the memory location specified by address
-
-input port during the write cycle."
-Q[7:0],output,"Data output bus. It outputs the contents of the
-
-memory location addressed by the Address Input signals."
-VDD,Power,Power pin.
-VSS,Ground,Ground pin.

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/2_truth_table.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/2_truth_table.csv
deleted file mode 100644
index 94ed477..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/2_truth_table.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-CLK,CEN,GWEN,WEN,A,D,Q,status
-,H,X,X,X,X,Hold previous data,Standby mode
-,L,H,X,A,X,Q,Read mode
-,L,L,H,A,D,Hold previous data,Write mode
-,L,L,L,A,D,Hold previous data,Mask mode
-other,X,X,X,X,X,Hold previous data,Unchanged

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/3_Capacitance_loading.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/3_Capacitance_loading.csv
deleted file mode 100644
index e20daac..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/3_Capacitance_loading.csv
+++ /dev/null

@@ -1,4 +0,0 @@
-Voltage,CLK,CEN,GWEN,WEN,A,D
-5.0v,296.201,17.6988,49.6735,7.84667,34.5188,16.5528
-3.3v,291.776,17.7783,48.1872,7.64901,34.5983,16.4468
-1.8v,280.919,17.7614,44.4991,7.15847,34.5814,16.1834

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption1.csv
deleted file mode 100644
index 4ff1314..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption1.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 5.00v, 25°c",0.00013,859.2,770.85
-"SS corner, 4.50v, -40°c",0.00011,670.77,603.675
-"SS corner, 4.50v, 125°c",0.00014,701.798,630.697
-"FF corner, 5.50v, 125°c",0.00946,1103.25,991.21
-"FF corner, 5.50v, -40°c",0.00016,1046.15,940.445

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption2.csv
deleted file mode 100644
index 43691c3..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption2.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 3.3v, 25°c",0.00006,342.144,310.2
-"SS corner, 3.0v, -40°c",0.00005,273.045,249.09
-"SS corner, 3.6v, 125°c",0.00006,289.68,263.76
-"FF corner, 3.6v, 125°c",0.0037,441.252,395.91
-"FF corner, 3.6v, -40°c",0.00007,409.23,368.748

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption3.csv
deleted file mode 100644
index 3ee41ca..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/4_Power_Consumption3.csv
+++ /dev/null

@@ -1,6 +0,0 @@
-Condition,DC standby,AC Write,AC Read
-"TT corner, 1.8v, 25°c",0.00002,92.043,84.3399
-"SS corner, 1.62v, -40°c",0.00001,72.2552,67.2535
-"SS corner, 1.62v, 125°c",0.00002,77.4279,71.1626
-"FF corner, 1.98v, 125°c",0.0012,120.582,108.841
-"FF corner,1.98v, -40°c",0.00002,110.484,100.495

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics1.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics1.csv
deleted file mode 100644
index b46892f..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics1.csv
+++ /dev/null

@@ -1,90 +0,0 @@
-Symbol,"Parameter
-
-Description","SNSP 
-
-Process
-
-4.5v, -40C","SNSP
-
-Process
-
-4.5v, 125C","Typical
-
-Process
-
-5.0v, 25C","FNFP
-
-Process
-
-5.5v, 125C","FNFP
-
-Process
-
-5.5v, -40C",unit
-Tcyc,Min clock period,7.1094,10.2796,5.7473,5.3301,3.7332,ns
-Tckh,Min clock high time,3.2696,3.9625,2.2315,2.3664,1.4138,ns
-Tckl,Min clock low time,2.723,4.8463,2.5397,2.4258,1.355,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",0.4573,0.5866,0.4058,0.3883,0.3234,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.2309,1.8505,1.1082,1.0785,0.764,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.514,0.6623,0.4352,0.4114,0.3381,ns
-Tchh,"CEN hold time
-
-( CEN = H )",1.2875,1.9179,1.1376,1.1016,0.7788,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",0.719,1.015,0.63,0.5885,0.4551,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",0.9841,1.3576,0.8289,0.7912,0.5933,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",0.6762,0.9362,0.592,0.563,0.4351,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.5182,0.6761,0.456,0.4575,0.3629,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.2931,0.3655,0.2719,0.244,0.2246,ns
-Twihl,"WEN hold time
-
-( WEN = L )",0.9867,1.3576,0.8289,0.7912,0.5933,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.5225,0.6786,0.4561,0.4575,0.3629,ns
-Tasl,"A set up time
-
-( A = L )",0.8445,1.095,0.7027,0.6325,0.5165,ns
-Tahl,"A hold time
-
-( A = L )",0.6188,0.7925,0.5272,0.492,0.4005,ns
-Tash,"A set up time
-
-( A = H )",0.6391,0.8833,0.537,0.4936,0.3872,ns
-Tahh,"A hold time
-
-( A = H )",0.6421,0.8303,0.5416,0.5018,0.406,ns
-Tdsl,"D set up time
-
-( D = L )",0.1233,0.1049,0.1234,0.1046,0.1296,ns
-Tdhl,"D hold time
-
-( D = L )",0.5086,0.6605,0.4518,0.4675,0.3608,ns
-Tdsh,"D set up time
-
-( D = H )",0.6006,0.7833,0.4892,0.4136,0.3622,ns
-Tdhh,"D hold time
-
-( D= H )",0.7431,1.0139,0.6432,0.6316,0.4818,ns
-Tah,"Clock high to Q
-
-high",5.2963,7.7968,4.339,4.0561,2.7985,ns
-Tal,Clock high to Q low,5.4809,8.0592,4.4822,4.1672,2.8862,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics2.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics2.csv
deleted file mode 100644
index 86e8c8a..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics2.csv
+++ /dev/null

@@ -1,90 +0,0 @@
-Symbol,"Parameter
-
-description","SNSP
-
-Process
-
-3.0v, -40C","SNSP
-
-Process
-
-3.0, 125C","Typical
-
-Process
-
-3.3v, 25C","FNFP
-
-Process
-
-3.6v, 125C","FNFP
-
-Process
-
-3.6v, -40C",unit
-Tcyc,Min clock period,11.0881,16.3302,8.2602,7.1405,4.8003,ns
-Tckh,Min clock high time,5.2766,4.546,2.6935,3.4945,2.3063,ns
-Tckl,Min clock low time,4.0239,7.031,3.0279,3.1873,2.0473,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",0.6574,0.8496,0.5408,0.497,0.4055,ns
-Tchl,"CEN hold time
-
-( CEN = L )",1.8972,2.8488,1.5921,1.4759,1.0202,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",0.8078,1.078,0.6156,0.5383,0.4256,ns
-Tchh,"CEN hold time
-
-( CEN = H )",2.0022,2.9741,1.6413,1.5021,1.0371,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",1.1603,1.6477,0.9192,0.8133,0.601,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",1.426,2.0375,1.1276,1.0157,0.7499,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",1.0297,1.4308,0.8248,0.742,0.5575,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",0.6921,0.962,0.5782,0.5566,0.4374,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.4664,0.5547,0.3886,0.337,0.2926,ns
-Twihl,"WEN hold time
-
-( WEN = L )",1.4269,2.0375,1.1276,1.016,0.7505,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",0.6944,0.962,0.5789,0.5566,0.4374,ns
-Tasl,"A set up time
-
-( A = L )",1.2506,1.5795,0.9573,0.8183,0.6528,ns
-Tahl,"A hold time
-
-( A = L )",0.8435,1.1028,0.6808,0.6072,0.4906,ns
-Tash,"A set up time
-
-( A = H )",1.0439,1.3746,0.7931,0.6787,0.5232,ns
-Tahh,"A hold time
-
-( A = H )",0.9133,1.1999,0.7195,0.6323,0.5058,ns
-Tdsl,"D set up time
-
-( D = L )",0.182,0.1272,0.1649,0.1445,0.1652,ns
-Tdhl,"D hold time
-
-( D = L )",0.5964,0.8295,0.5427,0.5413,0.421,ns
-Tdsh,"D set up time
-
-( D = H )",1.0245,1.2872,0.7225,0.5774,0.4764,ns
-Tdhh,"D hold time
-
-( D= H )",1.0708,1.5056,0.8569,0.7908,0.5979,ns
-Tah,"Clock high to Q
-
-high",8.1919,11.9542,6.1696,5.4029,3.6754,ns
-Tal,Clock high to Q low,8.5514,12.456,6.417,5.5901,3.8098,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics3.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics3.csv
deleted file mode 100644
index 4aacb66..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/5_AC_Characteristics3.csv
+++ /dev/null

@@ -1,92 +0,0 @@
-Symbol,"Parameter
-
-description","SNSP
-
-Process
-
-1.62v, -40C","SNSP
-
-Process
-
-1.62v,
-125C","Typical
-
-Process
-
-1.8v, 25C","FNFP
-
-Process
-
-1.98v,
-125C","FNFP
-
-Process
-
-1.98v, -40C",unit
-Tcyc,Min clock period,46.9428,50.9738,21.4387,13.8797,10.1117,ns
-Tckh,Min clock high time,17.8048,12.4148,5.5918,3.916,4.9481,ns
-Tckl,Min clock low time,20.3458,23.4901,9.3467,5.9066,4.7369,ns
-Tcsl,"CEN set up time
-
-( CEN = L )",2.3723,2.4627,1.1531,0.8039,0.6538,ns
-Tchl,"CEN hold time
-
-( CEN = L )",7.2625,8.1371,3.8299,2.7467,2.0012,ns
-Tcsh,"CEN set up time
-
-( CEN = H )",3.5906,3.6093,1.5645,0.973,0.7991,ns
-Tchh,"CEN hold time
-
-( CEN = H )",8.1157,8.8493,4.0493,2.806,2.0585,ns
-Twsl,"GWEN set up time
-
-( GWEN = L )",5.437,5.6091,2.4169,1.5313,1.1881,ns
-Twhl,"GWEN hold time
-
-( GWEN = L )",6.4375,6.9235,2.5611,1.7504,1.3035,ns
-Twsh,"GWEN set up time
-
-( GWEN = H )",3.7804,4.1608,1.8848,1.2969,1.004,ns
-Twhh,"GWEN hold time
-
-( GWEN = H )",3.7001,3.9258,1.2605,0.8555,0.6691,ns
-Twisl,"WEN set up time
-
-( WEN = L )",0.089,0.1242,0.7187,0.566,0.5008,ns
-Twihl,"WEN hold time
-
-( WEN = L )",6.47,6.9448,2.572,1.7504,1.3079,ns
-Twish,"WEN set up time
-
-( WEN = H )",0,0,0,0,0,ns
-Twihh,"WEN hold time
-
-( WEN = H )",3.7346,3.9386,1.2609,0.8555,0.6691,ns
-Tasl,"A set up time
-
-( A = L )",2.7499,2.7972,1.9241,1.362,1.1243,ns
-Tahl,"A hold time
-
-( A = L )",2.3664,2.566,1.276,0.938,0.7583,ns
-Tash,"A set up time
-
-( A = H )",3.4976,3.5401,1.811,1.2267,1.0163,ns
-Tahh,"A hold time
-
-( A = H )",2.9875,3.1533,1.4855,1.0268,0.8386,ns
-Tdsl,"D set up time
-
-( D = L )",0,0,0.0245,0.1435,0.1899,ns
-Tdhl,"D hold time
-
-( D = L )",2.9813,3.0888,0.9452,0.7355,0.5491,ns
-Tdsh,"D set up time
-
-( D = H )",3.4777,3.3172,1.841,1.061,0.9368,ns
-Tdhh,"D hold time
-
-( D= H )",5.6811,5.9063,2.0886,1.3397,1.0391,ns
-Tah,"Clock high to Q
-
-high",32.2344,35.5512,15.2892,10.1268,7.4477,ns
-Tal,Clock high to Q low,34.7448,37.83,16.1808,10.5967,7.8205,ns

diff --git a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/6_Physical_Dimensions.csv b/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/6_Physical_Dimensions.csv
deleted file mode 100644
index 40954de..0000000
--- a/docs/digital/SRAM/gf180mcu_fd_ip_sram__sram64x8m8wm1/tables_clear/6_Physical_Dimensions.csv
+++ /dev/null

@@ -1,2 +0,0 @@
-Width(um),Height(um),Area(um^2)

-431.86,232.88,100571.5568


diff --git a/docs/digital/SRAM/sram.rst b/docs/digital/SRAM/sram.rst
deleted file mode 100644
index 3bf9d65..0000000
--- a/docs/digital/SRAM/sram.rst
+++ /dev/null

@@ -1,14 +0,0 @@
-
-*****
-SRAM
-*****
-
-.. toctree::
-    :maxdepth: 2
-    :glob:
-
-    gf180mcu_fd_ip_sram__sram64x8m8wm1/gf180mcu_fd_ip_sram__sram64x8m8wm1.rst
-    gf180mcu_fd_ip_sram__sram128x8m8wm1/gf180mcu_fd_ip_sram__sram128x8m8wm1.rst
-    gf180mcu_fd_ip_sram__sram256x8m8wm1/gf180mcu_fd_ip_sram__sram256x8m8wm1.rst
-    gf180mcu_fd_ip_sram__sram512x8m8wm1/gf180mcu_fd_ip_sram__sram512x8m8wm1.rst
-

diff --git a/docs/physical_verification/design_manual/tables_clear/01_Document_rev2_3_4.csv b/docs/physical_verification/design_manual/tables_clear/01_Document_rev2_3_4.csv
index 299e271..e81956c 100644
--- a/docs/physical_verification/design_manual/tables_clear/01_Document_rev2_3_4.csv
+++ b/docs/physical_verification/design_manual/tables_clear/01_Document_rev2_3_4.csv

@@ -11,11 +11,11 @@
  ,Section 10.9,Add  LVS_BJT Mark Layer
  ,            ,Add  LVS_BJT.1 Minimum LVS_BJT enclosure of  NPN or PNP Emitter COMP layers: 0
  ,Appendix A  ,Add  Below devices to the device list:
- ,            ,nmos_6p0_nat 6V Native NMOS
- ,            ,nmoscap_3p3_b 3.3V NMOS capacitor (inside Nwell)
- ,            ,pmoscap_3p3_b 3.3V PMOS capacitor (inside Psub)
- ,            ,nmoscap_6p0_b 6V NMOS capacitor (inside NWell)
- ,            ,pmoscap_6p0_b 6V PMOS capacitor (inside Psub)
+ ,            ,nfet_06v0_nvt 6V Native NMOS
+ ,            ,cap_nmos_03v3_b 3.3V NMOS capacitor (inside Nwell)
+ ,            ,cap_pmos_03v3_b 3.3V PMOS capacitor (inside Psub)
+ ,            ,cap_nmos_06v0_b 6V NMOS capacitor (inside NWell)
+ ,            ,cap_pmos_06v0_b 6V PMOS capacitor (inside Psub)
  ,Section 13.4 and 13.5, Add  ESD related design rules.
 4,Section 4   ,Add MCU SONOS related layer information
 ,Section 4    ,Define OTP_MK in the notes of drawn layer table.

diff --git a/docs/physical_verification/design_manual/tables_clear/08_Topological_Truth_Table15.csv b/docs/physical_verification/design_manual/tables_clear/08_Topological_Truth_Table15.csv
index 21fd70c..0c80e02 100644
--- a/docs/physical_verification/design_manual/tables_clear/08_Topological_Truth_Table15.csv
+++ b/docs/physical_verification/design_manual/tables_clear/08_Topological_Truth_Table15.csv

@@ -81,17 +81,17 @@
 (7) N+ Poly Fuse (Optional):,X,0,X,X,X,1,1,0,0,X,1,X,0,1,0,0,X,0,0,0,0,0,0,0,0,0,0,0,0,0
 (8) Metal Fuse (Optional):,X,0,X,X,X,0,X,X,X,X,X,X,1,0,0,0,X,0,0,0,0,0,0,0,0,0,0,0,0,0
 (9) ESD,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
-nmos_3p3_dw_sab (SAB 3.3V NMOS inside DNWELL),1,1,0,1,0,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-nmos_3p3_sab (SAB 3.3V NMOS outside DNWELL),0,1,0,X,0,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-nmos_5p0_dw_sab (SAB 5V NMOS inside DNWELL),1,1,0,1,1,1,1,0,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-nmos_5p0_sab (SAB 5V NMOS outside DNWELL),0,1,0,X,1,1,1,0,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-nmos_6p0_dw_sab (SAB 6V NMOS inside DNWELL),1,1,0,1,1,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-nmos_6p0_sab (SAB 6V NMOS outside DNWELL),0,1,0,X,1,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-pmos_3p3_dw_sab (SAB 3.3V PMOS inside DNWELL),1,1,X,0,0,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-pmos_3p3_sab (SAB 3.3V PMOS outside DNWELL),0,1,1,0,0,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-pmos_5p0_dw_sab (SAB 5V PMOS inside DNWELL),1,1,X,0,1,1,0,1,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-pmos_5p0_sab (SAB 5V PMOS outside DNWELL),0,1,1,0,1,1,0,1,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-pmos_6p0_dw_sab (SAB 6V PMOS inside DNWELL),1,1,X,0,1,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
-pmos_6p0_sab (SAB 6V PMOS outside DNWELL),0,1,1,0,1,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+nfet_03v3_dn_dss (SAB 3.3V NMOS inside DNWELL),1,1,0,1,0,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+nfet_03v3_dss (SAB 3.3V NMOS outside DNWELL),0,1,0,X,0,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+nfet_05v0_dn_dss (SAB 5V NMOS inside DNWELL),1,1,0,1,1,1,1,0,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+nfet_05v0_dss (SAB 5V NMOS outside DNWELL),0,1,0,X,1,1,1,0,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+nfet_06v0_dn_dss (SAB 6V NMOS inside DNWELL),1,1,0,1,1,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+nfet_06v0_dss (SAB 6V NMOS outside DNWELL),0,1,0,X,1,1,1,0,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+pfet_03v3_dn_dss (SAB 3.3V PMOS inside DNWELL),1,1,X,0,0,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+pfet_03v3_dss (SAB 3.3V PMOS outside DNWELL),0,1,1,0,0,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+pfet_05v0_dn_dss (SAB 5V PMOS inside DNWELL),1,1,X,0,1,1,0,1,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+pfet_05v0_dss (SAB 5V PMOS outside DNWELL),0,1,1,0,1,1,0,1,0,X,1,X,0,0,0,1,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+pfet_06v0_dn_dss (SAB 6V PMOS inside DNWELL),1,1,X,0,1,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
+pfet_06v0_dss (SAB 6V PMOS outside DNWELL),0,1,1,0,1,1,0,1,0,X,1,X,0,0,0,0,X,0,0,0,0,1,1,X,0,0,0,0,0,0
 (10) eFuse,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,
 eFuse,X,0,0,X,X,1,0,1,0,0,0,0,0,0,0,X,0,0,0,0,0,0,1,0,1,1,0,0,0,0

diff --git a/docs/physical_verification/design_manual/tables_clear/69_Device_List_184.csv b/docs/physical_verification/design_manual/tables_clear/69_Device_List_184.csv
index 79c28e0..235ac54 100644
--- a/docs/physical_verification/design_manual/tables_clear/69_Device_List_184.csv
+++ b/docs/physical_verification/design_manual/tables_clear/69_Device_List_184.csv

@@ -1,46 +1,46 @@
 No.,Device Name,Model Name,Description,Spec
 MOSFET,,,,
-,nmos_3p3,nmos_3p3,3.3V NMOS (Outside DNWELL),YI-141-SM064
-,nmos_3p3_dw,nmos_3p3,3.3V NMOS (Inside DNWELL),YI-141-SM064
-,pmos_3p3,pmos_3p3,3.3V PMOS (Outside DNWELL),YI-141-SM064
-,pmos_3p3_dw,pmos_3p3,3.3V PMOS (Inside DNWELL),YI-141-SM064
-,nmos_5p0,nmos_6p0,5V NMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,nmos_5p0_dw,nmos_6p0,5V NMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,pmos_5p0,pmos_6p0,5V PMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,pmos_5p0_dw,pmos_6p0,5V PMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,nmos_6p0,nmos_6p0,6V NMOS (Outside DNWELL),YI-141-SM064
-,nmos_6p0_dw,nmos_6p0,6V NMOS (Inside DNWELL),YI-141-SM064
-,pmos_6p0,pmos_6p0,6V PMOS (Outside DNWELL),YI-141-SM064
-,pmos_6p0_dw,pmos_6p0,6V PMOS (Inside DNWELL),YI-141-SM064
-,nmos_6p0_nat,nmos_6p0_nat,6V Native NMOS,YI-141-SM064
-,nmos_10p0_asym,nmos_10p0_asym,LD-NMOS (Asymmetrical),SM-BB-000149
-,pmos_10p0_asym,pmos_10p0_asym,LD-PMOS (Asymmetrical),SM-BB-000149
+,nfet_03v3,nfet_03v3,3.3V NMOS (Outside DNWELL),YI-141-SM064
+,nfet_03v3_dn,nfet_03v3,3.3V NMOS (Inside DNWELL),YI-141-SM064
+,pfet_03v3,pfet_03v3,3.3V PMOS (Outside DNWELL),YI-141-SM064
+,pfet_03v3_dn,pfet_03v3,3.3V PMOS (Inside DNWELL),YI-141-SM064
+,nfet_05v0,nfet_06v0,5V NMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,nfet_05v0_dn,nfet_06v0,5V NMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,pfet_05v0,pfet_06v0,5V PMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,pfet_05v0_dn,pfet_06v0,5V PMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,nfet_06v0,nfet_06v0,6V NMOS (Outside DNWELL),YI-141-SM064
+,nfet_06v0_dn,nfet_06v0,6V NMOS (Inside DNWELL),YI-141-SM064
+,pfet_06v0,pfet_06v0,6V PMOS (Outside DNWELL),YI-141-SM064
+,pfet_06v0_dn,pfet_06v0,6V PMOS (Inside DNWELL),YI-141-SM064
+,nfet_06v0_nvt,nfet_06v0_nvt,6V Native NMOS,YI-141-SM064
+,nfet_10v0_asym,nfet_10v0_asym,LD-NMOS (Asymmetrical),SM-BB-000149
+,pfet_10v0_asym,pfet_10v0_asym,LD-PMOS (Asymmetrical),SM-BB-000149
 BJT,,,,
-,vnpn_10x10,vnpn_10x10,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 10um x 10um",YI-141-SM064
-,vnpn_5x5,vnpn_5x5,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 5um x 5um",YI-141-SM064
-,vnpn_0p54x16,vnpn_0p54x16,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 16um",YI-141-SM064
-,vnpn_0p54x8,vnpn_0p54x8,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 8um",YI-141-SM064
-,vnpn_0p54x4,vnpn_0p54x4,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 4um",YI-141-SM064
-,vnpn_0p54x2,vnpn_0p54x2,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 2um",YI-141-SM064
-,vpnp_10x10,vpnp_10x10,"VPNP (Pplus-Nwell-Psub), emitter size 10um x 10um",YI-141-SM064
-,vpnp_5x5,vpnp_5x5,"VPNP (Pplus-Nwell-Psub), emitter size 5um x 5um",YI-141-SM064
-,vpnp_0p42x10,vpnp_0p42x10,"VPNP (Pplus-Nwell-Psub), emitter size 0p42um x 10um",YI-141-SM064
-,vpnp_0p42x5,vpnp_0p42x5,"VPNP (Pplus-Nwell-Psub), emitter size 0p42um x 5um",YI-141-SM064
+,npn_10p00x10p00,npn_10p00x10p00,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 10um x 10um",YI-141-SM064
+,npn_05p00x05p00,npn_05p00x05p00,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 5um x 5um",YI-141-SM064
+,npn_00p54x16p00,npn_00p54x16p00,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 16um",YI-141-SM064
+,npn_00p54x08p00,npn_00p54x08p00,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 8um",YI-141-SM064
+,npn_00p54x04p00,npn_00p54x04p00,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 4um",YI-141-SM064
+,npn_00p54x02p00,npn_00p54x02p00,"VNPN (Nplus-LVPWELL-DNWELL), emitter size 0p54um x 2um",YI-141-SM064
+,pnp_10p00x10p00,pnp_10p00x10p00,"VPNP (Pplus-Nwell-Psub), emitter size 10um x 10um",YI-141-SM064
+,pnp_05p00x05p00,pnp_05p00x05p00,"VPNP (Pplus-Nwell-Psub), emitter size 5um x 5um",YI-141-SM064
+,pnp_10p00x00p42,pnp_10p00x00p42,"VPNP (Pplus-Nwell-Psub), emitter size 0p42um x 10um",YI-141-SM064
+,pnp_05p00x00p42,pnp_05p00x00p42,"VPNP (Pplus-Nwell-Psub), emitter size 0p42um x 5um",YI-141-SM064
 DIODE,,,,
-,np_3p3,np_3p3,3.3V N+/LVPWELL diode (Outside DNWELL),YI-141-SM064
-,np_3p3_dw,np_3p3,3.3V N+/LVPWELL diode (Inside DNWELL),YI-141-SM064
-,np_6p0,np_6p0,5V/6V N+/LVPWELL Diode (Outside DNWELL),YI-141-SM064
-,np_6p0_dw,np_6p0,5V/6V N+/LVPWELL Diode (Inside DNWELL),YI-141-SM064
-,pn_3p3,pn_3p3,3.3V  P+/Nwell diode (Outside DNWELL),YI-141-SM064
-,pn_3p3_dw,pn_3p3,3.3V  P+/Nwell diode (Inside DNWELL),YI-141-SM064
-,pn_6p0,pn_6p0,5V/6V P+/Nwell diode (Outside DNWELL),YI-141-SM064
-,pn_6p0_dw,pn_6p0,5V/6V P+/Nwell diode (Inside DNWELL),YI-141-SM064
-,nwp_3p3,nwp_3p3,3.3V Nwell/Psub diode,YI-141-SM064
-,nwp_6p0,nwp_6p0,5V/6V Nwell/Psub diode,YI-141-SM064
-,dnwpw_3p3,dnwpw,3.3V LVPWELL/DNWELL diode,YI-141-SM064
-,dnwpw_6p0,dnwpw,5V/6V LVPWELL/DNWELL diode,YI-141-SM064
-,dnwps_3p3,dnwps,3.3V DWENLL/Psub diode,YI-141-SM064
-,dnwps_6p0,dnwps,5V/6V DWENLL/Psub diode,YI-141-SM064
+,diode_nd2ps_03v3,diode_nd2ps_03v3,3.3V N+/LVPWELL diode (Outside DNWELL),YI-141-SM064
+,diode_nd2ps_03v3_dn,diode_nd2ps_03v3,3.3V N+/LVPWELL diode (Inside DNWELL),YI-141-SM064
+,diode_nd2ps_06v0,diode_nd2ps_06v0,5V/6V N+/LVPWELL Diode (Outside DNWELL),YI-141-SM064
+,diode_nd2ps_06v0_dn,diode_nd2ps_06v0,5V/6V N+/LVPWELL Diode (Inside DNWELL),YI-141-SM064
+,diode_pd2nw_03v3,diode_pd2nw_03v3,3.3V  P+/Nwell diode (Outside DNWELL),YI-141-SM064
+,diode_pd2nw_03v3_dn,diode_pd2nw_03v3,3.3V  P+/Nwell diode (Inside DNWELL),YI-141-SM064
+,diode_pd2nw_06v0,diode_pd2nw_06v0,5V/6V P+/Nwell diode (Outside DNWELL),YI-141-SM064
+,diode_pd2nw_06v0_dn,diode_pd2nw_06v0,5V/6V P+/Nwell diode (Inside DNWELL),YI-141-SM064
+,diode_nw2ps_03v3,diode_nw2ps_03v3,3.3V Nwell/Psub diode,YI-141-SM064
+,diode_nw2ps_06v0,diode_nw2ps_06v0,5V/6V Nwell/Psub diode,YI-141-SM064
+,diode_pw2dw_03v3,diode_pw2dw,3.3V LVPWELL/DNWELL diode,YI-141-SM064
+,diode_pw2dw_06v0,diode_pw2dw,5V/6V LVPWELL/DNWELL diode,YI-141-SM064
+,diode_dw2ps_03v3,diode_dw2ps,3.3V DWENLL/Psub diode,YI-141-SM064
+,diode_dw2ps_06v0,diode_dw2ps,5V/6V DWENLL/Psub diode,YI-141-SM064
 ,sc_diode,sc_diode,Schottky diode,YI-141-SM064
 RESISTOR,,,,
 ,nplus_u,nplus_u,3-terminal unsalicided n+ diffusion resistor (Outside DNWELL),YI-141-SM064
@@ -81,35 +81,35 @@
 ,tm11k,tm11k,2-terminal 11K Metal Top resistor,YI-141-SM064
 ,tm30k,tm30k,2-terminal 30K Top Metal resistor,YI-141-SM064
 CAPACITOR (MIM),,,,
-,mim_1p0fF,mim_1p0fF,1.0fF/um2 MIM capacitor,YI-141-SM064
-,mim_1p5fF,mim_1p5fF,1.5fF/um2 MIM capacitor,YI-141-SM064
-,mim_single_2p0fF,mim_2p0fF,2.0fF/um2 MIM capacitor,YI-141-SM064
+,cap_mim_1p0fF,cap_mim_1p0fF,1.0fF/um2 MIM capacitor,YI-141-SM064
+,cap_mim_1p5fF,cap_mim_1p5fF,1.5fF/um2 MIM capacitor,YI-141-SM064
+,cap_cap_mim_2p0fF,cap_mim_2p0fF,2.0fF/um2 MIM capacitor,YI-141-SM064
 CAPACITOR (MOS),,,,
-,nmoscap_3p3,nmoscap_3p3,3.3V NMOS capacitor (Outside DNWELL),YI-141-SM064
-,nmoscap_3p3_dw,nmoscap_3p3,3.3V NMOS capacitor (Inside DNWELL),YI-141-SM064
-,pmoscap_3p3,pmoscap_3p3,3.3V PMOS capacitor (Outside DNWELL),YI-141-SM064
-,pmoscap_3p3_dw,pmoscap_3p3,3.3V PMOS capacitor (Inside DNWELL),YI-141-SM064
-,nmoscap_6p0,nmoscap_6p0,5V/6V NMOS capacitor (Outside DNWELL),YI-141-SM064
-,nmoscap_6p0_dw,nmoscap_6p0,5V/6V NMOS capacitor (inside DNWELL),YI-141-SM064
-,pmoscap_6p0,pmoscap_6p0,5V/6V PMOS capacitor (Outside DNWELL),YI-141-SM064
-,pmoscap_6p0_dw,pmoscap_6p0,5V/6V PMOS capacitor (Outside DNWELL),YI-141-SM064
-,nmoscap_3p3_b,nmoscap_3p3_b,3.3V NMOS capacitor (inside NWell),YI-141-SM064
-,pmoscap_3p3_b,pmoscap_3p3_b,3.3V PMOS capacitor (inside Psub),YI-141-SM064
+,cap_nmos_03v3,cap_nmos_03v3,3.3V NMOS capacitor (Outside DNWELL),YI-141-SM064
+,cap_nmos_03v3_dn,cap_nmos_03v3,3.3V NMOS capacitor (Inside DNWELL),YI-141-SM064
+,cap_pmos_03v3,cap_pmos_03v3,3.3V PMOS capacitor (Outside DNWELL),YI-141-SM064
+,cap_pmos_03v3_dn,cap_pmos_03v3,3.3V PMOS capacitor (Inside DNWELL),YI-141-SM064
+,cap_nmos_06v0,cap_nmos_06v0,5V/6V NMOS capacitor (Outside DNWELL),YI-141-SM064
+,cap_nmos_06v0_dn,cap_nmos_06v0,5V/6V NMOS capacitor (inside DNWELL),YI-141-SM064
+,cap_pmos_06v0,cap_pmos_06v0,5V/6V PMOS capacitor (Outside DNWELL),YI-141-SM064
+,cap_pmos_06v0_dn,cap_pmos_06v0,5V/6V PMOS capacitor (Outside DNWELL),YI-141-SM064
+,cap_nmos_03v3_b,cap_nmos_03v3_b,3.3V NMOS capacitor (inside NWell),YI-141-SM064
+,cap_pmos_03v3_b,cap_pmos_03v3_b,3.3V PMOS capacitor (inside Psub),YI-141-SM064
 ,,,,
-,nmoscap_6p0_b,nmoscap_6p0_b,5V/6V NMOS capacitor (inside NWell),YI-141-SM064
-,pmoscap_6p0_b,pmoscap_6p0_b,5V/6V PMOS capacitor (inside Psub),YI-141-SM064
+,cap_nmos_06v0_b,cap_nmos_06v0_b,5V/6V NMOS capacitor (inside NWell),YI-141-SM064
+,cap_pmos_06v0_b,cap_pmos_06v0_b,5V/6V PMOS capacitor (inside Psub),YI-141-SM064
 ESD (SAB MOSFET),,,,
-,nmos_3p3_sab,nmos_3p3_sab,3.3V SAB NMOS (Outside DNWELL),YI-141-SM064
-,nmos_3p3_dw_sab,nmos_3p3_sab,3.3V SAB NMOS (Inside DNWELL),YI-141-SM064
-,nmos_5p0_sab,nmos_6p0_sab,5V SAB NMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,nmos_5p0_dw_sab,nmos_6p0_sab,5V SAB NMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,nmos_6p0_sab,nmos_6p0_sab,6V SAB NMOS (Outside DNWELL),YI-141-SM064
-,nmos_6p0_dw_sab,nmos_6p0_sab,6V SAB NMOS (Inside DNWELL),YI-141-SM064
-,pmos_3p3_sab,pmos_3p3_sab,3.3V SAB PMOS (Outside DNWELL),YI-141-SM064
-,pmos_3p3_dw_sab,pmos_3p3_sab,3.3V SAB PMOS (Inside DNWELL),YI-141-SM064
-,pmos_5p0_sab,pmos_6p0_sab,5V SAB PMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,pmos_5p0_dw_sab,pmos_6p0_sab,5V SAB PMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
-,pmos_6p0_sab,pmos_6p0_sab,6V SAB PMOS (Outside DNWELL),YI-141-SM064
-,pmos_6p0_dw_sab,pmos_6p0_sab,6V SAB PMOS (Inside DNWELL),YI-141-SM064
+,nfet_03v3_dss,nfet_03v3_dss,3.3V SAB NMOS (Outside DNWELL),YI-141-SM064
+,nfet_03v3_dn_dss,nfet_03v3_dss,3.3V SAB NMOS (Inside DNWELL),YI-141-SM064
+,nfet_05v0_dss,nfet_06v0_dss,5V SAB NMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,nfet_05v0_dn_dss,nfet_06v0_dss,5V SAB NMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,nfet_06v0_dss,nfet_06v0_dss,6V SAB NMOS (Outside DNWELL),YI-141-SM064
+,nfet_06v0_dn_dss,nfet_06v0_dss,6V SAB NMOS (Inside DNWELL),YI-141-SM064
+,pfet_03v3_dss,pfet_03v3_dss,3.3V SAB PMOS (Outside DNWELL),YI-141-SM064
+,pfet_03v3_dn_dss,pfet_03v3_dss,3.3V SAB PMOS (Inside DNWELL),YI-141-SM064
+,pfet_05v0_dss,pfet_06v0_dss,5V SAB PMOS (Outside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,pfet_05v0_dn_dss,pfet_06v0_dss,5V SAB PMOS (Inside DNWELL) (with V5_XTOR mark layer),YI-141-SM064
+,pfet_06v0_dss,pfet_06v0_dss,6V SAB PMOS (Outside DNWELL),YI-141-SM064
+,pfet_06v0_dn_dss,pfet_06v0_dss,6V SAB PMOS (Inside DNWELL),YI-141-SM064
 eFuse,,,,
 ,eFuse,efuse,Eletrically programmable fuse element,YI-141-SM064

diff --git a/libraries/gf180mcu_fd_io/latest b/libraries/gf180mcu_fd_io/latest
index 5cc5339..ac11a25 160000
--- a/libraries/gf180mcu_fd_io/latest
+++ b/libraries/gf180mcu_fd_io/latest

@@ -1 +1 @@
-Subproject commit 5cc533968c9d03972f92a461af0edc80118b1e9c
+Subproject commit ac11a2506a6657e5674048ba2be44224c74b9e9e

diff --git a/macros/gf180mcu_fd_ip_sram/latest b/macros/gf180mcu_fd_ip_sram/latest
index 343ab45..678a0f3 160000
--- a/macros/gf180mcu_fd_ip_sram/latest
+++ b/macros/gf180mcu_fd_ip_sram/latest

@@ -1 +1 @@
-Subproject commit 343ab45497682f3f3f808ee4c79a8f92c5010636
+Subproject commit 678a0f3ee0404b980980871f98bac85434933990
commit	413d7e2c8d25c11128361d323f0de28042a10822	[log] [tgz]
author	Tim 'mithro' Ansell <tansell@google.com>	Tue Aug 02 17:17:12 2022 -0700
committer	GitHub <noreply@github.com>	Tue Aug 02 17:17:12 2022 -0700
tree	0695c1edd43249048fb819702042364f7790b910
parent	db1e0222ef7f78c19d121311cc9e11bef7d65716 [diff]
parent	7c2e547a7fb039f1d22915095902aaf96880674c [diff]