| 10.5 Native Vt NMOS (Optional) |
| ============================== |
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| This section describes Native NMOS rules. This process supports 3.3V and 5V/6V native Vt NMOS. The difference between 3.3V and 5V/6V native Vt transistor is that the 5V/6V native Vt NMOS need Dualgate layer. |
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| Native Vt NMOS is recognized by NCOMP outside NWELL, interact with Poly2 and NAT. |
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| .. csv-table:: Native Vt NMOS |
| :file: tables_clear/36_Native_Vt_NMOS_90.csv |
| :widths: 100, 800, 100 |
| :align: center |
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| .. image:: images/nat.png |
| :width: 900 |
| :align: center |
| :alt: Native Vt NMOS |
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