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foss-eda-tools / efabless / openlane / refs/heads/old/develop / . / test / floorplan.lef
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#-------------------------------------------------------
# SkyWater
#-------------------------------------------------------
# Technology LEF file for
# Process: S8 130nm / 180nm hybrid
# Metal stack option: 5 metal layers + local interconnect
# Standard cell libraries: high density (efs8hd)
# Date: January 22, 2020
#------------------------------------------------------
VERSION 5.7 ;
BUSBITCHARS "[]" ;
DIVIDERCHAR "/" ;
UNITS
TIME NANOSECONDS 1 ;
CAPACITANCE PICOFARADS 1 ;
RESISTANCE OHMS 1 ;
DATABASE MICRONS 1000 ;
END UNITS
MANUFACTURINGGRID 0.005 ;
CLEARANCEMEASURE EUCLIDEAN ;
SITE unitehd
SYMMETRY Y ;
CLASS CORE ;
SIZE 0.460 BY 3.400 ;
END unitehd
LAYER li1
TYPE ROUTING ;
DIRECTION VERTICAL ;
PITCH 0.46 ;
OFFSET 0.23 ;
WIDTH 0.170 ; # LI 1
# SPACING 0.170 ; # LI 2
SPACINGTABLE
PARALLELRUNLENGTH 0
WIDTH 0 0.170000 ;
AREA 0.0561 ; # LI 6
THICKNESS 0.10 ;
RESISTANCE RPERSQ 12.8 ;
END li1
LAYER mcon
TYPE CUT ;
WIDTH 0.17 ; # Mcon 1
SPACING 0.17 ; # Mcon 2
ENCLOSURE BELOW 0.0 0.0 ; # Mcon 4
ENCLOSURE ABOVE 0.030 0.060 ; # Met1 4 / Met1 5
END mcon
LAYER met1
TYPE ROUTING ;
DIRECTION HORIZONTAL ;
PITCH 0.34 ;
OFFSET 0.17 ;
WIDTH 0.140 ; # Met1 1
#SPACING 0.140 ; # Met1 2
#SPACING 0.280 RANGE 3.001 100 ; # Met1 3b
SPACINGTABLE
PARALLELRUNLENGTH 0.000
WIDTH 0.000 0.140000
WIDTH 3.000000 0.280000
;
AREA 0.083 ; # Met1 6
THICKNESS 0.36 ;
ANTENNAMODEL OXIDE1 ;
ANTENNACUMAREARATIO 2200 ;
ANTENNAAREARATIO 400 ;
ANTENNADIFFAREARATIO 400 ;
MAXIMUMDENSITY 70.0 ;
DENSITYCHECKWINDOW 700.0 700.0 ;
DENSITYCHECKSTEP 70.0 ;
RESISTANCE RPERSQ 0.125 ;
END met1
LAYER via1
TYPE CUT ;
WIDTH 0.15 ; # Via 1a
SPACING 0.17 ; # Via 2
ENCLOSURE BELOW 0.055 0.085 ; # Via 4a / Via 5a
ENCLOSURE ABOVE 0.055 0.085 ; # Met2 4 / Met2 5
END via1
LAYER met2
TYPE ROUTING ;
DIRECTION VERTICAL ;
PITCH 0.46 ;
OFFSET 0.23 ;
WIDTH 0.140 ; # Met2 1
#SPACING 0.140 ; # Met2 2
#SPACING 0.280 RANGE 3.001 100 ; # Met2 3b
SPACINGTABLE
PARALLELRUNLENGTH 0.000
WIDTH 0.000 0.140000
WIDTH 3.000000 0.28000 ;
AREA 0.0676 ; # Met2 6
THICKNESS 0.36 ;
ANTENNAMODEL OXIDE1 ;
ANTENNACUMAREARATIO 2200 ;
ANTENNAAREARATIO 400 ;
ANTENNADIFFAREARATIO 400 ;
MAXIMUMDENSITY 70.0 ;
DENSITYCHECKWINDOW 700.0 700.0 ;
DENSITYCHECKSTEP 70.0 ;
RESISTANCE RPERSQ 0.125 ;
END met2
LAYER via2
TYPE CUT ;
WIDTH 0.20 ; # Via2 1
SPACING 0.20 ; # Via2 2
ENCLOSURE BELOW 0.040 0.085 ; # Via2 4
ENCLOSURE ABOVE 0.065 0.065 ; # Met3 4
END via2
LAYER met3
TYPE ROUTING ;
DIRECTION HORIZONTAL ;
PITCH 0.68 ;
OFFSET 0.34 ;
WIDTH 0.300 ; # Met3 1
#SPACING 0.300 ; # Met3 2
SPACINGTABLE
PARALLELRUNLENGTH 0
WIDTH 0 0.30000 ;
AREA 0.240 ; # Met3 6
THICKNESS 0.845 ;
ANTENNAMODEL OXIDE1 ;
ANTENNACUMAREARATIO 2200 ;
ANTENNAAREARATIO 400 ;
ANTENNADIFFAREARATIO 400 ;
MAXIMUMDENSITY 70.0 ;
DENSITYCHECKWINDOW 700.0 700.0 ;
DENSITYCHECKSTEP 70.0 ;
RESISTANCE RPERSQ 0.047 ;
END met3
LAYER via3
TYPE CUT ;
WIDTH 0.20 ; # Via3 1
SPACING 0.20 ; # Via3 2
ENCLOSURE BELOW 0.060 0.090 ; # Via3 4 / Via3 5
ENCLOSURE ABOVE 0.065 0.065 ; # Met4 3
END via3
LAYER met4
TYPE ROUTING ;
DIRECTION VERTICAL ;
PITCH 0.92 ;
OFFSET 0.46 ;
WIDTH 0.300 ; # Met4 1
#SPACING 0.300 ; # Met4 2
SPACINGTABLE
PARALLELRUNLENGTH 0
WIDTH 0 0.30000 ;
AREA 0.240 ; # Met4 4a
THICKNESS 0.845 ;
ANTENNAMODEL OXIDE1 ;
ANTENNACUMAREARATIO 2200 ;
ANTENNAAREARATIO 400 ;
ANTENNADIFFAREARATIO 400 ;
MAXIMUMDENSITY 70.0 ;
DENSITYCHECKWINDOW 700.0 700.0 ;
DENSITYCHECKSTEP 70.0 ;
RESISTANCE RPERSQ 0.047 ;
END met4
LAYER via4
TYPE CUT ;
WIDTH 0.80 ; # Via4 1
SPACING 0.80 ; # Via4 2
ENCLOSURE BELOW 0.190 0.190 ; # Via4 4
ENCLOSURE ABOVE 0.310 0.310 ; # Met5 3
END via4
LAYER met5
TYPE ROUTING ;
DIRECTION HORIZONTAL ;
PITCH 3.4 ;
OFFSET 1.7 ;
WIDTH 1.600 ; # Met5 1
#SPACING 1.600 ; # Met5 2
SPACINGTABLE
PARALLELRUNLENGTH 0
WIDTH 0 1.600 ;
AREA 4.000 ; # Met5 4
THICKNESS 1.26 ;
ANTENNAMODEL OXIDE1 ;
ANTENNACUMAREARATIO 2200 ;
ANTENNAAREARATIO 400 ;
ANTENNADIFFAREARATIO 400 ;
RESISTANCE RPERSQ 0.0285 ;
END met5
LAYER PR_bndry
TYPE MASTERSLICE ;
END PR_bndry
#---------------------------------
# Via Definitions
#---------------------------------
#---------------------------------
# MCON
#---------------------------------
VIA MCON_HH DEFAULT
LAYER mcon ;
RECT -0.085 -0.085 0.085 0.085 ;
LAYER li1 ;
RECT -0.165 -0.085 0.165 0.085 ;
LAYER met1 ;
RECT -0.16 -0.13 0.16 0.13 ;
END MCON_HH
VIA MCON_HV DEFAULT
LAYER mcon ;
RECT -0.085 -0.085 0.085 0.085 ;
LAYER li1 ;
RECT -0.165 -0.085 0.165 0.085 ;
LAYER met1 ;
RECT -0.13 -0.16 0.13 0.16 ;
END MCON_HV
VIA MCON_VH DEFAULT
LAYER mcon ;
RECT -0.085 -0.085 0.085 0.085 ;
LAYER li1 ;
RECT -0.085 -0.165 -0.085 0.165 ;
LAYER met1 ;
RECT -0.16 -0.13 0.16 0.13 ;
END MCON_VH
VIA MCON_VV DEFAULT
LAYER mcon ;
RECT -0.085 -0.085 0.085 0.085 ;
LAYER li1 ;
RECT -0.085 -0.165 -0.085 0.165 ;
LAYER met1 ;
RECT -0.13 -0.16 0.13 0.16 ;
END MCON_VV
VIARULE MCON_GEN GENERATE
LAYER li1 ;
ENCLOSURE 0.000 0.080 ;
LAYER met1 ;
ENCLOSURE 0.030 0.060 ;
LAYER mcon ;
RECT -0.085 -0.085 0.085 0.085 ;
SPACING 0.360 BY 0.360 ;
END MCON_GEN
#---------------------------------
# VIA1
#---------------------------------
VIA VIA1_HH DEFAULT
LAYER via1 ;
RECT -0.075 -0.075 0.075 0.075 ;
LAYER met1 ;
RECT -0.16 -0.13 0.16 0.13 ;
LAYER met2 ;
RECT -0.16 -0.13 0.16 0.13 ;
END VIA1_HH
VIA VIA1_HV DEFAULT
LAYER via1 ;
RECT -0.075 -0.075 0.075 0.075 ;
LAYER met1 ;
RECT -0.16 -0.13 0.16 0.13 ;
LAYER met2 ;
RECT -0.13 -0.16 0.13 0.16 ;
END VIA1_HV
VIA VIA1_VH DEFAULT
LAYER via1 ;
RECT -0.075 -0.075 0.075 0.075 ;
LAYER met1 ;
RECT -0.13 -0.16 0.13 0.16 ;
LAYER met2 ;
RECT -0.16 -0.13 0.16 0.13 ;
END VIA1_VH
VIA VIA1_VV DEFAULT
LAYER via1 ;
RECT -0.075 -0.075 0.075 0.075 ;
LAYER met1 ;
RECT -0.13 -0.16 0.13 0.16 ;
LAYER met2 ;
RECT -0.13 -0.16 0.13 0.16 ;
END VIA1_VV
VIARULE VIA1_GEN GENERATE
LAYER met1 ;
ENCLOSURE 0.055 0.085 ;
LAYER met2 ;
ENCLOSURE 0.055 0.085 ;
LAYER via1 ;
RECT -0.075 -0.075 0.075 0.075 ;
SPACING 0.320 BY 0.320 ;
END VIA1_GEN
#---------------------------------
# VIA2
#---------------------------------
VIA VIA2_H DEFAULT
LAYER via2 ;
RECT -0.1 -0.1 0.1 0.1 ;
LAYER met2 ;
RECT -0.185 -0.14 0.185 0.14 ;
LAYER met3 ;
RECT -0.165 -0.165 0.165 0.165 ;
END VIA2_H
VIA VIA2_V DEFAULT
LAYER via2 ;
RECT -0.1 -0.1 0.1 0.1 ;
LAYER met2 ;
RECT -0.14 -0.185 0.14 0.185 ;
LAYER met3 ;
RECT -0.165 -0.165 0.165 0.165 ;
END VIA2_V
VIARULE VIA2_GEN GENERATE
LAYER met2 ;
ENCLOSURE 0.040 0.085 ;
LAYER met3 ;
ENCLOSURE 0.065 0.065 ;
LAYER via2 ;
RECT -0.1 -0.1 0.1 0.1 ;
SPACING 0.40 BY 0.40 ;
END VIA2_GEN
#---------------------------------
# VIA3
#---------------------------------
VIA VIA3_H DEFAULT
LAYER via3 ;
RECT -0.1 -0.1 0.1 0.1 ;
LAYER met3 ;
RECT -0.19 -0.16 0.19 0.16 ;
LAYER met4 ;
RECT -0.165 -0.165 0.165 0.165 ;
END VIA3_H
VIA VIA3_V DEFAULT
LAYER via3 ;
RECT -0.1 -0.1 0.1 0.1 ;
LAYER met3 ;
RECT -0.16 -0.19 0.16 0.19 ;
LAYER met4 ;
RECT -0.165 -0.165 0.165 0.165 ;
END VIA3_V
VIARULE VIA3_GEN GENERATE
LAYER met3 ;
ENCLOSURE 0.06 0.09 ;
LAYER met4 ;
ENCLOSURE 0.065 0.065 ;
LAYER via3 ;
RECT -0.1 -0.1 0.1 0.1 ;
SPACING 0.40 BY 0.40 ;
END VIA3_GEN
#---------------------------------
# VIA4
#---------------------------------
VIA VIA4_O DEFAULT
LAYER via4 ;
RECT -0.4 -0.4 0.4 0.4 ;
LAYER met4 ;
RECT -0.59 -0.59 0.59 0.59 ;
LAYER met5 ;
RECT -0.71 -0.71 0.71 0.71 ;
END VIA4_O
VIARULE VIA4_GEN GENERATE
LAYER met4 ;
ENCLOSURE 0.190 0.190 ;
LAYER met5 ;
ENCLOSURE 0.310 0.310 ;
LAYER via4 ;
RECT -0.4 -0.4 0.4 0.4 ;
SPACING 1.60 BY 1.60 ;
END VIA4_GEN
MACRO efs8hd_sdfxtp_2
CLASS CORE ;
FOREIGN efs8hd_sdfxtp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.04 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.975 0.105 2.305 0.555 ;
RECT 3.76 0.105 3.96 0.655 ;
RECT 5.72 0.105 6.09 0.73 ;
RECT 7.745 0.105 8.115 0.77 ;
RECT 8.905 0.105 9.075 0.87 ;
RECT 9.775 0.105 9.945 1.165 ;
RECT 0 -0.105 10.12 0.105 ;
LAYER met1 ;
RECT 0 -0.3 10.12 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 10.12 3.505 ;
RECT 0.52 2.67 0.85 3.295 ;
RECT 1.88 2.805 2.21 3.295 ;
RECT 3.755 2.705 3.925 3.295 ;
RECT 5.93 2.295 6.1 3.295 ;
RECT 7.81 2.67 8.115 3.295 ;
RECT 8.905 2.03 9.08 3.295 ;
RECT 9.775 1.755 9.945 3.295 ;
LAYER met1 ;
RECT 0 3.1 10.12 3.7 ;
END
END vpwr
PIN SCD
PORT
LAYER li1 ;
RECT 3.53 1.295 4.02 2.07 ;
END
END SCD
PIN D
PORT
LAYER li1 ;
RECT 2.46 1.695 2.79 2.105 ;
END
END D
PIN SCE
PORT
LAYER li1 ;
RECT 1.78 0.98 1.95 2.105 ;
RECT 3.08 0.98 3.25 1.395 ;
RECT 1.78 0.77 3.25 0.98 ;
RECT 2.475 0.38 2.65 0.77 ;
END
END SCE
PIN CLK
PORT
LAYER li1 ;
RECT 0.095 1.22 0.445 2.03 ;
END
END CLK
PIN Q
PORT
LAYER li1 ;
RECT 9.26 1.88 9.605 2.995 ;
RECT 9.435 1.025 9.605 1.88 ;
RECT 9.26 0.38 9.605 1.025 ;
END
END Q
OBS
LAYER li1 ;
RECT 0.18 2.455 0.35 3.08 ;
RECT 0.18 2.245 0.845 2.455 ;
RECT 0.615 1.215 0.845 2.245 ;
RECT 0.615 1.005 0.81 1.215 ;
RECT 0.175 0.795 0.81 1.005 ;
RECT 1.02 0.895 1.245 3.08 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.245 0.895 ;
RECT 1.435 2.595 1.71 3.055 ;
RECT 2.69 2.805 3.585 3.02 ;
RECT 1.435 2.325 3.245 2.595 ;
RECT 1.435 0.555 1.605 2.325 ;
RECT 2.12 1.405 2.29 2.325 ;
RECT 3.075 2.105 3.245 2.325 ;
RECT 3.415 2.495 3.585 2.805 ;
RECT 4.21 2.58 4.445 3.05 ;
RECT 4.69 2.74 5.76 2.95 ;
RECT 4.21 2.495 4.38 2.58 ;
RECT 3.415 2.28 4.38 2.495 ;
RECT 3.075 1.695 3.27 2.105 ;
RECT 2.12 1.195 2.46 1.405 ;
RECT 4.21 1.08 4.38 2.28 ;
RECT 3.42 0.87 4.38 1.08 ;
RECT 4.55 1.295 4.79 2.38 ;
RECT 4.98 2.07 5.42 2.515 ;
RECT 5.59 1.97 5.76 2.74 ;
RECT 6.27 2.67 6.52 3.08 ;
RECT 6.745 2.705 7.63 2.92 ;
RECT 5.59 1.855 6.1 1.97 ;
RECT 5.3 1.645 6.1 1.855 ;
RECT 4.55 0.88 5.13 1.295 ;
RECT 3.42 0.555 3.59 0.87 ;
RECT 1.435 0.345 1.805 0.555 ;
RECT 2.82 0.345 3.59 0.555 ;
RECT 4.21 0.67 4.38 0.87 ;
RECT 5.3 0.67 5.47 1.645 ;
RECT 5.93 1.555 6.1 1.645 ;
RECT 5.64 1.33 5.81 1.37 ;
RECT 6.27 1.33 6.44 2.67 ;
RECT 6.61 1.555 6.8 2.455 ;
RECT 6.97 1.97 7.29 2.38 ;
RECT 5.64 0.955 6.44 1.33 ;
RECT 6.97 1.295 7.16 1.97 ;
RECT 7.46 1.755 7.63 2.705 ;
RECT 8.465 2.38 8.735 3.07 ;
RECT 7.8 1.97 8.735 2.38 ;
RECT 4.21 0.455 4.56 0.67 ;
RECT 4.73 0.455 5.47 0.67 ;
RECT 6.27 0.67 6.44 0.955 ;
RECT 6.61 0.88 7.16 1.295 ;
RECT 7.33 1.655 7.63 1.755 ;
RECT 8.565 1.655 8.735 1.97 ;
RECT 7.33 1.245 8.395 1.655 ;
RECT 8.565 1.245 9.265 1.655 ;
RECT 7.33 0.67 7.5 1.245 ;
RECT 8.565 1.03 8.735 1.245 ;
RECT 6.27 0.455 6.73 0.67 ;
RECT 6.96 0.455 7.5 0.67 ;
RECT 8.385 0.375 8.735 1.03 ;
LAYER met1 ;
RECT 0.58 2.425 0.87 2.48 ;
RECT 5.145 2.425 5.435 2.48 ;
RECT 6.56 2.425 6.85 2.48 ;
RECT 0.58 2.25 6.85 2.425 ;
RECT 0.58 2.195 0.87 2.25 ;
RECT 5.145 2.195 5.435 2.25 ;
RECT 6.56 2.195 6.85 2.25 ;
RECT 0.99 1.15 1.28 1.205 ;
RECT 4.685 1.15 4.975 1.205 ;
RECT 6.57 1.15 6.86 1.205 ;
RECT 0.99 0.975 6.86 1.15 ;
RECT 0.99 0.92 1.28 0.975 ;
RECT 4.685 0.92 4.975 0.975 ;
RECT 6.57 0.92 6.86 0.975 ;
END
END efs8hd_sdfxtp_2
MACRO efs8hd_xnor3_1
CLASS CORE ;
FOREIGN efs8hd_xnor3_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 9.2 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 1.615 1.345 2.18 1.655 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 7.045 1.345 7.455 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 6.125 1.785 6.805 2.02 ;
RECT 6.125 1.245 6.395 1.785 ;
END
END B
PIN X
PORT
LAYER li1 ;
RECT 0.085 1.8 0.365 3.08 ;
RECT 0.085 1.155 0.33 1.8 ;
RECT 0.085 0.44 0.345 1.155 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.765 0.655 ;
RECT 3.475 0.105 3.645 1.08 ;
RECT 7.475 0.105 7.645 0.705 ;
RECT 0.515 0.085 7.645 0.105 ;
RECT 0 -0.085 8.28 0.085 ;
LAYER met1 ;
RECT 0 -0.3 8.28 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 8.28 3.485 ;
RECT 0.535 3.295 7.73 3.315 ;
RECT 0.535 2.77 0.87 3.295 ;
RECT 3.225 2.795 3.555 3.295 ;
RECT 7.395 2.845 7.73 3.295 ;
LAYER met1 ;
RECT 0 3.1 8.28 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.05 2.795 2.52 3.005 ;
RECT 3.89 2.845 6.985 3.055 ;
RECT 1.05 2.555 1.22 2.795 ;
RECT 3.89 2.58 4.06 2.845 ;
RECT 0.535 2.345 1.22 2.555 ;
RECT 1.56 2.37 4.06 2.58 ;
RECT 0.535 1.655 0.705 2.345 ;
RECT 0.935 1.92 2.52 2.13 ;
RECT 0.5 1.245 0.705 1.655 ;
RECT 0.53 1.08 0.705 1.245 ;
RECT 0.53 0.87 1.105 1.08 ;
RECT 0.935 0.53 1.105 0.87 ;
RECT 1.275 0.745 1.445 1.92 ;
RECT 2.35 1.655 2.52 1.92 ;
RECT 2.69 1.905 3.075 2.12 ;
RECT 2.795 1.72 3.075 1.905 ;
RECT 2.35 1.245 2.625 1.655 ;
RECT 1.745 0.995 2.125 1.13 ;
RECT 2.795 0.995 2.965 1.72 ;
RECT 3.245 1.505 3.415 2.37 ;
RECT 3.645 1.805 4.065 2.145 ;
RECT 1.745 0.78 2.965 0.995 ;
RECT 3.135 1.295 3.415 1.505 ;
RECT 3.135 0.57 3.305 1.295 ;
RECT 2.07 0.53 2.505 0.57 ;
RECT 0.935 0.32 2.505 0.53 ;
RECT 2.675 0.355 3.305 0.57 ;
RECT 3.825 0.52 4.065 1.805 ;
RECT 4.245 0.745 4.415 2.63 ;
RECT 4.585 1.075 4.755 2.845 ;
RECT 7.9 2.63 8.195 3.08 ;
RECT 4.935 2.02 5.35 2.555 ;
RECT 5.785 2.42 8.195 2.63 ;
RECT 4.935 1.805 5.615 2.02 ;
RECT 4.95 1.245 5.275 1.595 ;
RECT 4.585 0.9 4.935 1.075 ;
RECT 5.105 0.99 5.275 1.245 ;
RECT 4.625 0.855 4.935 0.9 ;
RECT 4.245 0.555 4.455 0.745 ;
RECT 4.625 0.725 4.995 0.855 ;
RECT 4.245 0.33 4.655 0.555 ;
RECT 4.825 0.4 4.995 0.725 ;
RECT 5.445 0.53 5.615 1.805 ;
RECT 5.785 0.745 5.955 2.42 ;
RECT 7.71 2.345 8.195 2.42 ;
RECT 6.975 1.87 7.795 2.13 ;
RECT 7.625 1.655 7.795 1.87 ;
RECT 6.565 1.18 6.875 1.595 ;
RECT 7.625 1.245 7.855 1.655 ;
RECT 6.565 0.915 6.77 1.18 ;
RECT 7.625 1.13 7.795 1.245 ;
RECT 7.055 0.94 7.795 1.13 ;
RECT 7.015 0.92 7.795 0.94 ;
RECT 6.225 0.53 6.69 0.58 ;
RECT 5.445 0.32 6.69 0.53 ;
RECT 7.015 0.37 7.305 0.92 ;
RECT 8.025 0.73 8.195 2.345 ;
RECT 7.895 0.32 8.195 0.73 ;
LAYER met1 ;
RECT 2.845 2 3.135 2.055 ;
RECT 5.145 2 5.435 2.055 ;
RECT 2.845 1.825 5.435 2 ;
RECT 2.845 1.77 3.135 1.825 ;
RECT 5.145 1.77 5.435 1.825 ;
RECT 3.765 1.19 4.055 1.205 ;
RECT 5.105 1.19 5.435 1.205 ;
RECT 3.765 1.15 5.435 1.19 ;
RECT 6.525 1.15 6.815 1.205 ;
RECT 3.765 0.975 6.815 1.15 ;
RECT 3.765 0.96 5.435 0.975 ;
RECT 3.765 0.92 4.055 0.96 ;
RECT 5.105 0.92 5.435 0.96 ;
RECT 6.525 0.92 6.815 0.975 ;
RECT 4.225 0.725 4.515 0.78 ;
RECT 6.985 0.725 7.275 0.78 ;
RECT 4.225 0.55 7.275 0.725 ;
RECT 4.225 0.495 4.515 0.55 ;
RECT 6.985 0.495 7.275 0.55 ;
END
END efs8hd_xnor3_1
MACRO efs8hd_or4bb_2
CLASS CORE ;
FOREIGN efs8hd_or4bb_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN CN
PORT
LAYER li1 ;
RECT 0.43 1.105 0.78 2.12 ;
END
END CN
PIN DN
PORT
LAYER li1 ;
RECT 0.95 1.105 1.24 1.655 ;
END
END DN
PIN A
PORT
LAYER li1 ;
RECT 2.64 1.105 3.295 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 3.805 1.87 4.08 3.08 ;
RECT 3.91 0.95 4.08 1.87 ;
RECT 3.805 0.52 4.08 0.95 ;
END
END X
PIN B
PORT
LAYER li1 ;
RECT 2.445 2.465 3.145 3.07 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.66 0.105 0.83 0.935 ;
RECT 1.495 0.105 1.85 0.595 ;
RECT 2.395 0.105 2.725 0.595 ;
RECT 3.235 0.105 3.615 0.595 ;
RECT 4.25 0.105 4.42 1.28 ;
RECT 0.66 0.085 4.42 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.515 3.295 4.42 3.315 ;
RECT 0.515 2.755 0.845 3.295 ;
RECT 3.315 2.295 3.595 3.295 ;
RECT 4.25 1.8 4.42 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.545 0.345 3.07 ;
RECT 1.535 2.755 2.275 2.97 ;
RECT 0.085 2.33 1.935 2.545 ;
RECT 0.085 0.935 0.26 2.33 ;
RECT 0.995 1.905 1.595 2.12 ;
RECT 1.41 1.555 1.595 1.905 ;
RECT 1.765 1.955 1.935 2.33 ;
RECT 2.105 2.295 2.275 2.755 ;
RECT 2.105 2.125 3.145 2.295 ;
RECT 2.975 2.08 3.145 2.125 ;
RECT 1.765 1.77 2.42 1.955 ;
RECT 2.975 1.87 3.635 2.08 ;
RECT 1.41 1.345 1.855 1.555 ;
RECT 1.41 0.935 1.6 1.345 ;
RECT 2.25 1.245 2.42 1.77 ;
RECT 3.465 1.655 3.635 1.87 ;
RECT 3.465 1.245 3.74 1.655 ;
RECT 3.465 0.935 3.635 1.245 ;
RECT 0.085 0.565 0.465 0.935 ;
RECT 1.08 0.765 1.6 0.935 ;
RECT 2.025 0.765 3.635 0.935 ;
RECT 1.08 0.565 1.25 0.765 ;
RECT 2.025 0.38 2.195 0.765 ;
RECT 2.895 0.38 3.065 0.765 ;
END
END efs8hd_or4bb_2
MACRO efs8hd_xnor2_2
CLASS CORE ;
FOREIGN efs8hd_xnor2_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 1.255 1.345 2.705 1.615 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 0.79 1.785 3.1 2.02 ;
RECT 0.79 1.605 0.96 1.785 ;
RECT 0.485 1.345 0.96 1.605 ;
RECT 2.93 1.605 3.1 1.785 ;
RECT 2.93 1.345 3.955 1.605 ;
END
END B
PIN Y
PORT
LAYER li1 ;
RECT 3.725 2.455 3.935 2.655 ;
RECT 5.045 2.455 5.295 2.655 ;
RECT 3.725 2.245 5.295 2.455 ;
RECT 5.045 2.03 5.295 2.245 ;
RECT 5.045 1.77 5.895 2.03 ;
RECT 5.505 0.595 5.895 1.77 ;
RECT 4.585 0.38 5.895 0.595 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 1.45 0.105 1.62 0.695 ;
RECT 2.43 0.105 2.6 1.13 ;
RECT 3.27 0.105 3.44 0.695 ;
RECT 4.145 0.105 4.315 0.695 ;
RECT 1.45 0.085 4.315 0.105 ;
RECT 0 -0.085 5.98 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.98 3.485 ;
RECT 0.57 3.295 5.895 3.315 ;
RECT 0.57 2.67 0.82 3.295 ;
RECT 1.41 2.67 1.66 3.295 ;
RECT 2.81 2.67 3.06 3.295 ;
RECT 4.625 2.67 4.875 3.295 ;
RECT 5.465 2.245 5.895 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.455 0.4 3.08 ;
RECT 0.99 2.455 1.24 3.08 ;
RECT 1.83 2.455 2.08 3.08 ;
RECT 2.39 2.655 2.64 3.08 ;
RECT 3.23 2.87 4.355 3.08 ;
RECT 3.23 2.655 3.555 2.87 ;
RECT 4.105 2.67 4.355 2.87 ;
RECT 0.085 2.445 2.08 2.455 ;
RECT 0.085 2.23 3.48 2.445 ;
RECT 0.085 1.12 0.315 2.23 ;
RECT 3.31 2.03 3.48 2.23 ;
RECT 3.31 1.82 4.805 2.03 ;
RECT 4.635 1.555 4.805 1.82 ;
RECT 4.635 1.345 5.295 1.555 ;
RECT 0.085 0.805 0.86 1.12 ;
RECT 1.03 0.905 2.12 1.13 ;
RECT 1.03 0.595 1.28 0.905 ;
RECT 0.105 0.32 1.28 0.595 ;
RECT 1.79 0.32 2.12 0.905 ;
RECT 2.77 0.905 5.335 1.13 ;
RECT 2.77 0.32 3.1 0.905 ;
RECT 3.61 0.32 3.975 0.905 ;
RECT 5.005 0.805 5.335 0.905 ;
LAYER met1 ;
RECT 2.405 2.85 2.695 2.905 ;
RECT 3.325 2.85 3.615 2.905 ;
RECT 2.405 2.675 3.615 2.85 ;
RECT 2.405 2.62 2.695 2.675 ;
RECT 3.325 2.62 3.615 2.675 ;
END
END efs8hd_xnor2_2
MACRO efs8hd_clkbuf_4
CLASS CORE ;
FOREIGN efs8hd_clkbuf_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.68 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.425 0.765 0.775 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 1.045 2.505 1.305 3.08 ;
RECT 1.905 2.505 2.165 3.08 ;
RECT 1.045 2.295 2.165 2.505 ;
RECT 1.905 1.98 2.165 2.295 ;
RECT 1.905 1.77 2.66 1.98 ;
RECT 2.255 1.13 2.66 1.77 ;
RECT 1.01 0.92 2.66 1.13 ;
RECT 1.01 0.43 1.305 0.92 ;
RECT 1.905 0.43 2.165 0.92 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.595 0.105 0.83 0.595 ;
RECT 1.475 0.105 1.73 0.705 ;
RECT 2.335 0.105 2.615 0.705 ;
RECT 0.595 0.085 2.615 0.105 ;
RECT 0 -0.085 2.76 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.76 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.76 3.485 ;
RECT 0.565 3.295 2.62 3.315 ;
RECT 0.565 2.295 0.875 3.295 ;
RECT 1.475 2.72 1.73 3.295 ;
RECT 2.335 2.205 2.62 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.76 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.08 0.395 3.08 ;
RECT 0.085 1.87 1.115 2.08 ;
RECT 0.085 0.595 0.255 1.87 ;
RECT 0.945 1.555 1.115 1.87 ;
RECT 0.945 1.345 2.085 1.555 ;
RECT 0.085 0.32 0.425 0.595 ;
END
END efs8hd_clkbuf_4
MACRO efs8hd_fill_4
CLASS CORE ;
FOREIGN efs8hd_fill_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 1.8400 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0000 -0.0850 1.8400 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 1.8400 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 1.8400 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 1.8400 3.7000 ;
END
END vpwr
END efs8hd_fill_4
MACRO efs8hd_clkinv_4
CLASS CORE ;
FOREIGN efs8hd_clkinv_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.605 2.04 0.86 3.045 ;
RECT 1.465 2.04 1.72 3.045 ;
RECT 2.32 2.04 2.58 3.045 ;
RECT 0.105 1.825 3.135 2.04 ;
RECT 0.105 1.12 0.275 1.825 ;
RECT 2.835 1.12 3.135 1.825 ;
RECT 0.105 0.905 3.135 1.12 ;
RECT 1.03 0.35 1.29 0.905 ;
RECT 1.89 0.35 2.145 0.905 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.445 1.33 2.66 1.615 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.565 0.105 0.86 0.695 ;
RECT 1.46 0.105 1.72 0.695 ;
RECT 2.315 0.105 2.615 0.695 ;
RECT 0.565 0.085 2.615 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.085 3.295 3.135 3.315 ;
RECT 0.085 2.25 0.43 3.295 ;
RECT 1.03 2.25 1.29 3.295 ;
RECT 1.89 2.25 2.15 3.295 ;
RECT 2.75 2.25 3.135 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
END efs8hd_clkinv_4
MACRO efs8hd_dlymetal6s2s_1
CLASS CORE ;
FOREIGN efs8hd_dlymetal6s2s_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 1.245 2.095 1.67 3.08 ;
RECT 1.245 1.87 2.155 2.095 ;
RECT 1.32 1.245 2.155 1.87 ;
RECT 1.32 1.03 1.67 1.245 ;
RECT 1.245 0.32 1.67 1.03 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.105 0.57 2.125 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.69 0.105 1.075 0.595 ;
RECT 2.285 0.105 2.67 0.605 ;
RECT 3.7 0.105 4.085 0.605 ;
RECT 0.69 0.085 4.085 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.69 3.295 4.085 3.315 ;
RECT 0.69 2.765 1.075 3.295 ;
RECT 2.285 2.765 2.67 3.295 ;
RECT 3.7 2.765 4.085 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.55 0.52 3.08 ;
RECT 1.84 2.55 2.115 3.08 ;
RECT 0.085 2.34 1.075 2.55 ;
RECT 0.74 1.655 1.075 2.34 ;
RECT 1.84 2.305 2.67 2.55 ;
RECT 2.325 1.655 2.67 2.305 ;
RECT 2.84 2.095 3.085 3.08 ;
RECT 3.275 2.55 3.53 3.08 ;
RECT 3.275 2.305 4.085 2.55 ;
RECT 2.84 1.87 3.565 2.095 ;
RECT 0.74 1.245 1.15 1.655 ;
RECT 2.325 1.245 2.745 1.655 ;
RECT 2.915 1.245 3.565 1.87 ;
RECT 3.735 1.655 4.085 2.305 ;
RECT 4.255 1.87 4.515 3.08 ;
RECT 3.735 1.245 4.16 1.655 ;
RECT 0.74 0.935 1.075 1.245 ;
RECT 2.325 1.03 2.67 1.245 ;
RECT 2.915 1.03 3.085 1.245 ;
RECT 3.735 1.03 4.085 1.245 ;
RECT 4.33 1.03 4.515 1.87 ;
RECT 0.085 0.765 1.075 0.935 ;
RECT 1.86 0.82 2.67 1.03 ;
RECT 0.085 0.32 0.52 0.765 ;
RECT 1.86 0.32 2.115 0.82 ;
RECT 2.84 0.32 3.085 1.03 ;
RECT 3.275 0.82 4.085 1.03 ;
RECT 3.275 0.32 3.53 0.82 ;
RECT 4.255 0.32 4.515 1.03 ;
END
END efs8hd_dlymetal6s2s_1
MACRO efs8hd_and4b_2
CLASS CORE ;
FOREIGN efs8hd_and4b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN B
PORT
LAYER li1 ;
RECT 1.525 0.525 1.745 2.18 ;
END
END B
PIN C
PORT
LAYER li1 ;
RECT 1.96 0.525 2.275 2.12 ;
END
END C
PIN X
PORT
LAYER li1 ;
RECT 3.34 2.18 3.545 3.08 ;
RECT 3.34 1.92 4.055 2.18 ;
RECT 3.425 1.03 4.055 1.92 ;
RECT 3.26 0.8 4.055 1.03 ;
RECT 3.26 0.32 3.545 0.8 ;
END
END X
PIN AN
PORT
LAYER li1 ;
RECT 0.135 0.925 0.335 2.04 ;
END
END AN
PIN D
PORT
LAYER li1 ;
RECT 2.445 0.805 2.775 2.02 ;
END
END D
PIN vgnd
PORT
LAYER li1 ;
RECT 0.095 0.105 0.425 0.58 ;
RECT 2.76 0.105 3.09 0.58 ;
RECT 3.715 0.105 4.05 0.58 ;
RECT 0.095 0.085 4.05 0.105 ;
RECT 0 -0.085 4.14 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.14 3.485 ;
RECT 0.515 3.295 4.05 3.315 ;
RECT 0.515 2.745 0.845 3.295 ;
RECT 1.555 2.82 2.225 3.295 ;
RECT 2.84 2.745 3.17 3.295 ;
RECT 3.715 2.395 4.05 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.5 0.345 3.08 ;
RECT 1.015 2.605 1.185 3.08 ;
RECT 2.44 2.605 2.61 3.08 ;
RECT 0.175 2.29 0.805 2.5 ;
RECT 0.635 1.655 0.805 2.29 ;
RECT 1.015 2.455 2.61 2.605 ;
RECT 1.015 2.395 3.165 2.455 ;
RECT 1.015 2.075 1.315 2.395 ;
RECT 2.44 2.245 3.165 2.395 ;
RECT 0.635 1.245 0.975 1.655 ;
RECT 0.635 0.73 0.805 1.245 ;
RECT 1.145 0.73 1.315 2.075 ;
RECT 2.995 1.655 3.165 2.245 ;
RECT 2.995 1.245 3.255 1.655 ;
RECT 0.595 0.32 0.805 0.73 ;
RECT 1.095 0.32 1.315 0.73 ;
END
END efs8hd_and4b_2
MACRO efs8hd_sdfrbp_2
CLASS CORE ;
FOREIGN efs8hd_sdfrbp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 14.26 BY 3.4 ;
PIN RESETB
PORT
LAYER li1 ;
RECT 9.525 1.33 10.115 1.615 ;
RECT 6.505 0.955 7.035 1.305 ;
RECT 9.805 0.765 10.115 1.33 ;
LAYER met1 ;
RECT 9.63 1.205 9.92 1.63 ;
RECT 6.445 1.15 7.095 1.205 ;
RECT 9.63 1.15 10.175 1.205 ;
RECT 6.445 0.975 10.175 1.15 ;
RECT 6.445 0.92 7.095 0.975 ;
RECT 9.885 0.92 10.175 0.975 ;
END
END RESETB
PIN QN
PORT
LAYER li1 ;
RECT 12.525 2.6 12.825 3.08 ;
RECT 12.435 1.92 12.825 2.6 ;
RECT 12.655 1.03 12.825 1.92 ;
RECT 12.445 0.39 12.825 1.03 ;
END
END QN
PIN Q
PORT
LAYER li1 ;
RECT 11.575 0.33 11.925 2.12 ;
END
END Q
PIN CLK
PORT
LAYER li1 ;
RECT 0.14 1.105 0.49 2.03 ;
END
END CLK
PIN SCE
PORT
LAYER li1 ;
RECT 1.465 2.48 1.73 3.08 ;
RECT 1.485 1.34 1.73 2.48 ;
END
END SCE
PIN D
PORT
LAYER li1 ;
RECT 2.865 2.23 3.12 3.08 ;
RECT 2.735 1.695 3.12 2.23 ;
END
END D
PIN SCD
PORT
LAYER li1 ;
RECT 4.02 0.89 4.455 2.125 ;
RECT 4.02 0.355 4.275 0.89 ;
END
END SCD
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.875 0.105 2.205 0.7 ;
RECT 2.395 0.105 2.725 1.03 ;
RECT 4.445 0.105 4.775 0.675 ;
RECT 6.915 0.105 7.245 0.68 ;
RECT 9.085 0.105 9.255 0.655 ;
RECT 11.09 0.105 11.365 0.68 ;
RECT 12.105 0.105 12.275 1.03 ;
RECT 12.995 0.105 13.165 1.165 ;
RECT 0.515 0.085 13.165 0.105 ;
RECT 0 -0.085 13.34 0.085 ;
LAYER met1 ;
RECT 0 -0.3 13.34 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 13.34 3.485 ;
RECT 0.53 3.295 13.245 3.315 ;
RECT 0.53 2.67 0.86 3.295 ;
RECT 2.32 2.55 2.49 3.295 ;
RECT 4.3 2.845 4.63 3.295 ;
RECT 6.41 2.945 6.74 3.295 ;
RECT 7.375 2.72 7.745 3.295 ;
RECT 9.36 2.745 9.61 3.295 ;
RECT 10.12 2.82 10.45 3.295 ;
RECT 11.09 2.755 11.42 3.295 ;
RECT 12.025 2.82 12.355 3.295 ;
RECT 12.995 1.87 13.245 3.295 ;
LAYER met1 ;
RECT 0 3.1 13.34 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.455 0.345 3.08 ;
RECT 0.09 2.245 0.865 2.455 ;
RECT 0.66 1.655 0.865 2.245 ;
RECT 1.035 2.375 1.205 3.08 ;
RECT 1.9 2.57 2.15 3 ;
RECT 3.46 2.63 3.63 3.08 ;
RECT 4.905 2.73 5.275 3.045 ;
RECT 4.905 2.63 5.075 2.73 ;
RECT 5.47 2.67 5.835 3.08 ;
RECT 1.035 2.165 1.315 2.375 ;
RECT 0.66 1.245 0.975 1.655 ;
RECT 0.66 0.935 0.835 1.245 ;
RECT 0.095 0.765 0.835 0.935 ;
RECT 1.145 0.845 1.315 2.165 ;
RECT 1.98 1.82 2.15 2.57 ;
RECT 3.29 2.42 5.075 2.63 ;
RECT 1.98 1.575 2.47 1.82 ;
RECT 2.055 1.48 2.47 1.575 ;
RECT 3.29 1.48 3.46 2.42 ;
RECT 2.055 1.245 3.085 1.48 ;
RECT 2.055 1.125 2.225 1.245 ;
RECT 0.095 0.43 0.345 0.765 ;
RECT 1.015 0.43 1.315 0.845 ;
RECT 1.535 0.915 2.225 1.125 ;
RECT 1.535 0.495 1.705 0.915 ;
RECT 2.915 0.53 3.085 1.245 ;
RECT 3.255 1.27 3.46 1.48 ;
RECT 3.255 0.845 3.425 1.27 ;
RECT 3.68 0.53 3.85 2.105 ;
RECT 4.625 1.12 4.795 2.42 ;
RECT 5.245 1.97 5.495 2.445 ;
RECT 4.965 1.33 5.135 1.745 ;
RECT 5.325 1.295 5.495 1.97 ;
RECT 5.665 1.73 5.835 2.67 ;
RECT 6.005 2.63 6.175 2.97 ;
RECT 6.995 2.63 7.165 2.97 ;
RECT 6.005 2.42 7.165 2.63 ;
RECT 7.97 2.505 8.14 3.08 ;
RECT 8.32 2.655 9.19 3.08 ;
RECT 9.015 2.645 9.19 2.655 ;
RECT 9.015 2.545 9.21 2.645 ;
RECT 7.455 2.295 8.14 2.505 ;
RECT 8.31 2.42 8.84 2.445 ;
RECT 7.455 2.205 7.715 2.295 ;
RECT 6.285 1.995 7.715 2.205 ;
RECT 8.31 2.08 8.87 2.42 ;
RECT 5.665 1.52 7.375 1.73 ;
RECT 4.625 0.895 5.145 1.12 ;
RECT 2.915 0.32 3.85 0.53 ;
RECT 4.975 0.63 5.145 0.895 ;
RECT 5.325 0.88 5.975 1.295 ;
RECT 4.975 0.42 5.315 0.63 ;
RECT 6.165 0.595 6.335 1.52 ;
RECT 7.205 1.255 7.375 1.52 ;
RECT 7.545 1.045 7.715 1.995 ;
RECT 5.485 0.38 6.335 0.595 ;
RECT 7.455 0.555 7.715 1.045 ;
RECT 7.885 2.07 8.87 2.08 ;
RECT 9.04 2.18 9.21 2.545 ;
RECT 9.78 2.605 9.95 2.97 ;
RECT 9.78 2.395 10.545 2.605 ;
RECT 7.885 1.87 8.52 2.07 ;
RECT 9.04 1.97 10.205 2.18 ;
RECT 7.885 0.88 8.095 1.87 ;
RECT 9.04 1.855 9.21 1.97 ;
RECT 8.405 1.15 8.575 1.655 ;
RECT 8.745 1.645 9.21 1.855 ;
RECT 10.375 1.655 10.545 2.395 ;
RECT 10.715 2.545 10.89 3.08 ;
RECT 11.55 2.545 12.265 2.605 ;
RECT 10.715 2.33 12.265 2.545 ;
RECT 10.715 2.245 11.405 2.33 ;
RECT 8.745 0.67 8.915 1.645 ;
RECT 10.375 1.62 11.06 1.655 ;
RECT 9.125 1.08 9.295 1.43 ;
RECT 10.345 1.32 11.06 1.62 ;
RECT 9.125 0.87 9.635 1.08 ;
RECT 7.455 0.345 7.785 0.555 ;
RECT 8.005 0.32 8.915 0.67 ;
RECT 9.465 0.58 9.635 0.87 ;
RECT 10.345 0.58 10.515 1.32 ;
RECT 11.23 1.105 11.405 2.245 ;
RECT 12.095 1.655 12.265 2.33 ;
RECT 12.095 1.245 12.485 1.655 ;
RECT 9.465 0.37 10.515 0.58 ;
RECT 10.715 0.895 11.405 1.105 ;
RECT 10.715 0.43 10.885 0.895 ;
LAYER met1 ;
RECT 0.97 2.425 1.27 2.48 ;
RECT 5.265 2.425 5.555 2.48 ;
RECT 8.385 2.425 8.675 2.48 ;
RECT 0.97 2.25 8.675 2.425 ;
RECT 0.97 2.195 1.27 2.25 ;
RECT 5.265 2.195 5.555 2.25 ;
RECT 8.385 2.195 8.675 2.25 ;
RECT 0.745 1.575 1.035 1.63 ;
RECT 4.845 1.58 5.135 1.63 ;
RECT 8.345 1.58 8.635 1.63 ;
RECT 4.845 1.575 8.635 1.58 ;
RECT 0.745 1.4 8.635 1.575 ;
RECT 0.745 1.345 1.035 1.4 ;
RECT 4.845 1.35 8.635 1.4 ;
RECT 4.845 1.345 5.135 1.35 ;
RECT 8.345 1.345 8.635 1.35 ;
END
END efs8hd_sdfrbp_2
MACRO efs8hd_conb_1
CLASS CORE ;
FOREIGN efs8hd_conb_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.3 BY 3.4 ;
PIN HI
PORT
LAYER li1 ;
RECT 0 3.315 1.38 3.485 ;
RECT 0.275 2.385 0.605 3.315 ;
RECT 0.085 0.315 0.605 2.175 ;
LAYER met1 ;
RECT 0 3.1 1.38 3.7 ;
END
END HI
PIN LO
PORT
LAYER li1 ;
RECT 0.775 1.14 1.295 3.08 ;
RECT 0.775 0.085 1.115 0.93 ;
RECT 0 -0.085 1.38 0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.38 0.3 ;
END
END LO
END efs8hd_conb_1
MACRO efs8hd_dfstp_2
CLASS CORE ;
FOREIGN efs8hd_dfstp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 10.58 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 8.81 2.02 9.14 3.075 ;
RECT 8.81 1.87 9.575 2.02 ;
RECT 8.975 1.805 9.575 1.87 ;
RECT 9.02 1.12 9.575 1.805 ;
RECT 8.99 1.07 9.575 1.12 ;
RECT 8.975 1.03 9.575 1.07 ;
RECT 8.89 0.955 9.575 1.03 ;
RECT 8.89 0.33 9.135 0.955 ;
END
END Q
PIN D
PORT
LAYER li1 ;
RECT 1.77 1.255 2.18 2.03 ;
END
END D
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 9.66 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.455 2.67 1.785 3.295 ;
RECT 3.43 2.82 3.81 3.295 ;
RECT 4.33 2.82 4.66 3.295 ;
RECT 5.92 2.82 6.34 3.295 ;
RECT 7.01 2.43 7.34 3.295 ;
RECT 8.47 1.87 8.64 3.295 ;
RECT 9.31 2.23 9.575 3.295 ;
LAYER met1 ;
RECT 0 3.1 9.66 3.7 ;
END
END vpwr
PIN SETB
PORT
LAYER li1 ;
RECT 3.61 0.92 4.02 1.33 ;
RECT 6.66 1.255 7.01 1.33 ;
RECT 6.66 0.92 7.34 1.255 ;
LAYER met1 ;
RECT 3.765 1.15 4.055 1.205 ;
RECT 6.985 1.15 7.275 1.205 ;
RECT 3.765 0.975 7.275 1.15 ;
RECT 3.765 0.92 4.055 0.975 ;
RECT 6.985 0.92 7.275 0.975 ;
END
END SETB
PIN CLK
PORT
LAYER li1 ;
RECT 0.085 1.22 0.435 2.03 ;
END
END CLK
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.455 0.105 1.785 0.58 ;
RECT 3.61 0.105 4.02 0.655 ;
RECT 4.76 0.105 5.08 0.68 ;
RECT 6.69 0.105 7.33 0.705 ;
RECT 8.39 0.105 8.72 1.03 ;
RECT 9.305 0.105 9.575 0.745 ;
RECT 0 -0.105 9.66 0.105 ;
LAYER met1 ;
RECT 0 -0.3 9.66 0.3 ;
END
END vgnd
OBS
LAYER li1 ;
RECT 0.085 2.455 0.345 3.08 ;
RECT 1.015 2.555 1.235 3.08 ;
RECT 0.085 2.245 0.835 2.455 ;
RECT 0.605 1.005 0.835 2.245 ;
RECT 0.085 0.795 0.835 1.005 ;
RECT 0.085 0.43 0.345 0.795 ;
RECT 1.005 0.705 1.235 2.555 ;
RECT 1.955 2.455 2.125 3.08 ;
RECT 2.36 2.815 3.19 3.025 ;
RECT 1.43 2.245 2.125 2.455 ;
RECT 1.43 1.03 1.6 2.245 ;
RECT 2.35 1.97 2.85 2.445 ;
RECT 1.43 0.795 2.125 1.03 ;
RECT 2.35 0.88 2.57 1.97 ;
RECT 3.02 1.755 3.19 2.815 ;
RECT 3.99 2.605 4.16 2.97 ;
RECT 5.11 2.705 5.74 3.02 ;
RECT 5.57 2.605 5.74 2.705 ;
RECT 6.54 2.605 6.78 2.97 ;
RECT 3.36 2.295 4.71 2.605 ;
RECT 3.36 1.97 3.61 2.295 ;
RECT 4.12 1.755 4.37 1.955 ;
RECT 3.02 1.545 4.37 1.755 ;
RECT 3.02 1.495 3.44 1.545 ;
RECT 2.75 0.805 3.1 1.27 ;
RECT 1.015 0.43 1.235 0.705 ;
RECT 1.955 0.38 2.125 0.795 ;
RECT 3.27 0.58 3.44 1.495 ;
RECT 4.54 1.33 4.71 2.295 ;
RECT 2.425 0.33 3.44 0.58 ;
RECT 4.31 0.905 4.71 1.33 ;
RECT 4.88 2.07 5.4 2.455 ;
RECT 5.57 2.395 6.78 2.605 ;
RECT 4.88 1.12 5.05 2.07 ;
RECT 5.22 1.33 5.4 1.845 ;
RECT 5.57 1.755 5.74 2.395 ;
RECT 7.51 2.205 7.68 2.97 ;
RECT 7.97 2.395 8.3 3.03 ;
RECT 7.51 2.18 7.88 2.205 ;
RECT 5.91 1.97 7.88 2.18 ;
RECT 5.57 1.545 7.49 1.755 ;
RECT 5.8 1.12 6.15 1.27 ;
RECT 4.88 0.905 6.15 1.12 ;
RECT 4.31 0.37 4.56 0.905 ;
RECT 6.32 0.595 6.49 1.545 ;
RECT 7.14 1.47 7.49 1.545 ;
RECT 7.69 0.85 7.88 1.97 ;
RECT 5.64 0.38 6.49 0.595 ;
RECT 7.53 0.44 7.88 0.85 ;
RECT 8.05 1.655 8.3 2.395 ;
RECT 8.05 1.245 8.85 1.655 ;
RECT 8.05 0.43 8.22 1.245 ;
LAYER met1 ;
RECT 0.545 2.425 0.835 2.48 ;
RECT 2.385 2.425 2.675 2.48 ;
RECT 5.145 2.425 5.435 2.48 ;
RECT 0.545 2.25 5.435 2.425 ;
RECT 0.545 2.195 0.835 2.25 ;
RECT 2.385 2.195 2.675 2.25 ;
RECT 5.145 2.195 5.435 2.25 ;
RECT 5.165 1.575 5.455 1.63 ;
RECT 2.92 1.4 5.455 1.575 ;
RECT 2.92 1.205 3.135 1.4 ;
RECT 5.165 1.345 5.455 1.4 ;
RECT 1.005 1.15 1.295 1.205 ;
RECT 2.845 1.15 3.135 1.205 ;
RECT 1.005 0.975 3.135 1.15 ;
RECT 1.005 0.92 1.295 0.975 ;
RECT 2.845 0.92 3.135 0.975 ;
END
END efs8hd_dfstp_2
MACRO efs8hd_decap_6
CLASS CORE ;
FOREIGN efs8hd_decap_6 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.7600 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 1.0650 1.2950 1.7150 ;
RECT 0.0850 0.0850 2.6750 1.0650 ;
RECT 0.0000 -0.0850 2.7600 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 2.7600 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 2.7600 3.4850 ;
RECT 0.0850 1.9300 2.6750 3.3150 ;
RECT 1.4650 1.2800 2.6750 1.9300 ;
LAYER met1 ;
RECT 0.0000 3.1000 2.7600 3.7000 ;
END
END vpwr
END efs8hd_decap_6
MACRO efs8hd_a2bb2oi_2
CLASS CORE ;
FOREIGN efs8hd_a2bb2oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN B1
PORT
LAYER li1 ;
RECT 0.085 1.785 2.03 2.02 ;
RECT 0.085 1.345 0.71 1.785 ;
RECT 1.7 1.345 2.03 1.785 ;
END
END B1
PIN B2
PORT
LAYER li1 ;
RECT 0.94 1.345 1.48 1.615 ;
END
END B2
PIN A1N
PORT
LAYER li1 ;
RECT 3.31 1.345 4.115 1.615 ;
END
END A1N
PIN A2N
PORT
LAYER li1 ;
RECT 4.285 1.345 5.435 1.615 ;
END
END A2N
PIN Y
PORT
LAYER li1 ;
RECT 2.37 2.075 2.62 2.655 ;
RECT 2.37 1.13 2.66 2.075 ;
RECT 1.07 0.905 2.66 1.13 ;
RECT 1.07 0.805 1.4 0.905 ;
RECT 2.33 0.32 2.66 0.905 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 0.31 0.105 0.48 1.12 ;
RECT 1.99 0.105 2.16 0.695 ;
RECT 2.83 0.105 3.52 0.695 ;
RECT 4.19 0.105 4.36 0.695 ;
RECT 5.03 0.105 5.2 1.13 ;
RECT 0.31 0.085 5.2 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.52 3.485 ;
RECT 0.69 3.295 3.98 3.315 ;
RECT 0.69 2.67 0.94 3.295 ;
RECT 1.53 2.67 1.78 3.295 ;
RECT 3.73 2.67 3.98 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.27 2.445 0.52 3.08 ;
RECT 1.11 2.445 1.36 3.08 ;
RECT 1.95 2.87 3.04 3.08 ;
RECT 1.95 2.445 2.2 2.87 ;
RECT 0.27 2.23 2.2 2.445 ;
RECT 2.79 2.245 3.04 2.87 ;
RECT 3.31 2.455 3.56 3.08 ;
RECT 4.15 2.87 5.24 3.08 ;
RECT 4.15 2.455 4.4 2.87 ;
RECT 3.31 2.23 4.4 2.455 ;
RECT 4.57 2.02 4.82 2.655 ;
RECT 2.95 1.805 4.82 2.02 ;
RECT 4.99 1.82 5.24 2.87 ;
RECT 2.95 1.655 3.12 1.805 ;
RECT 2.83 1.245 3.12 1.655 ;
RECT 2.95 1.13 3.12 1.245 ;
RECT 0.65 0.595 0.9 1.12 ;
RECT 2.95 0.905 4.86 1.13 ;
RECT 0.65 0.32 1.82 0.595 ;
RECT 3.69 0.32 4.02 0.905 ;
RECT 4.53 0.32 4.86 0.905 ;
END
END efs8hd_a2bb2oi_2
MACRO efs8hd_einvp_1
CLASS CORE ;
FOREIGN efs8hd_einvp_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.795 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 1.975 1.215 2.215 2.44 ;
END
END A
PIN TE
PORT
LAYER li1 ;
RECT 0.085 1.24 0.545 2.155 ;
END
END TE
PIN Z
PORT
LAYER li1 ;
RECT 1.62 2.655 2.215 3.08 ;
RECT 1.62 1.005 1.795 2.655 ;
RECT 1.62 0.315 2.215 1.005 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.085 1.45 0.605 ;
RECT 0 -0.085 2.3 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.3 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.3 3.485 ;
RECT 0.515 2.79 1.45 3.315 ;
LAYER met1 ;
RECT 0 3.1 2.3 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.58 0.345 3.08 ;
RECT 0.085 2.365 1.45 2.58 ;
RECT 0.715 1.03 1.45 2.365 ;
RECT 0.085 0.815 1.45 1.03 ;
RECT 0.085 0.315 0.345 0.815 ;
END
END efs8hd_einvp_1
MACRO efs8hd_inv_6
CLASS CORE ;
FOREIGN efs8hd_inv_6 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.685 2.08 1.015 3.08 ;
RECT 1.525 2.08 1.855 3.08 ;
RECT 2.365 2.105 2.695 3.08 ;
RECT 2.365 2.08 3.135 2.105 ;
RECT 0.685 1.87 3.135 2.08 ;
RECT 2.785 1.13 3.135 1.87 ;
RECT 0.765 0.905 3.135 1.13 ;
RECT 0.765 0.32 0.935 0.905 ;
RECT 1.605 0.32 1.775 0.905 ;
RECT 2.445 0.32 2.615 0.905 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.105 1.345 2.615 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.13 0.105 0.395 0.68 ;
RECT 1.185 0.105 1.355 0.68 ;
RECT 2.025 0.105 2.195 0.68 ;
RECT 2.785 0.105 3.035 0.69 ;
RECT 0.13 0.085 3.035 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.13 3.295 3.035 3.315 ;
RECT 0.13 1.87 0.425 3.295 ;
RECT 1.185 2.295 1.355 3.295 ;
RECT 2.025 2.295 2.195 3.295 ;
RECT 2.865 2.72 3.035 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
END efs8hd_inv_6
MACRO efs8hd_buf_6
CLASS CORE ;
FOREIGN efs8hd_buf_6 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.435 0.105 0.605 0.705 ;
RECT 1.275 0.105 1.445 0.705 ;
RECT 2.035 0.105 2.365 0.705 ;
RECT 2.875 0.105 3.205 0.705 ;
RECT 3.715 0.105 4.045 1.105 ;
RECT 0.15 0.085 0.32 0.105 ;
RECT 0.435 0.085 4.045 0.105 ;
RECT 0 -0.085 4.14 0.085 ;
RECT 0.15 -0.105 0.32 -0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN X
PORT
LAYER li1 ;
RECT 1.695 2.02 1.865 3.08 ;
RECT 2.535 2.02 2.705 3.08 ;
RECT 3.375 2.02 3.545 3.08 ;
RECT 1.695 1.805 3.545 2.02 ;
RECT 2.21 1.13 3.545 1.805 ;
RECT 1.695 0.92 3.545 1.13 ;
RECT 1.695 0.32 1.865 0.92 ;
RECT 2.535 0.32 2.705 0.92 ;
RECT 3.375 0.32 3.545 0.92 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.145 1.345 1.185 1.645 ;
END
END A
PIN vpwr
PORT
LAYER li1 ;
RECT 0.15 3.485 0.32 3.505 ;
RECT 0 3.315 4.14 3.485 ;
RECT 0.15 3.295 0.32 3.315 ;
RECT 0.435 3.295 4.045 3.315 ;
RECT 0.435 1.855 0.605 3.295 ;
RECT 1.275 2.295 1.515 3.295 ;
RECT 2.035 2.295 2.365 3.295 ;
RECT 2.875 2.295 3.205 3.295 ;
RECT 3.715 1.855 4.045 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.775 2.07 1.105 3.08 ;
RECT 0.775 1.855 1.525 2.07 ;
RECT 1.355 1.555 1.525 1.855 ;
RECT 1.355 1.345 1.825 1.555 ;
RECT 1.355 1.13 1.525 1.345 ;
RECT 0.775 0.92 1.525 1.13 ;
RECT 0.775 0.32 1.105 0.92 ;
END
END efs8hd_buf_6
MACRO efs8hd_o2bb2ai_2
CLASS CORE ;
FOREIGN efs8hd_o2bb2ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN A1N
PORT
LAYER li1 ;
RECT 0.09 1.785 1.945 2.02 ;
RECT 0.09 1.305 0.435 1.785 ;
RECT 1.615 1.345 1.945 1.785 ;
END
END A1N
PIN A2N
PORT
LAYER li1 ;
RECT 0.605 1.345 1.4 1.615 ;
END
END A2N
PIN B2
PORT
LAYER li1 ;
RECT 3.825 1.345 4.5 1.615 ;
END
END B2
PIN B1
PORT
LAYER li1 ;
RECT 3.41 1.805 5.435 2.02 ;
RECT 3.41 1.305 3.655 1.805 ;
RECT 4.73 1.345 5.435 1.805 ;
END
END B1
PIN Y
PORT
LAYER li1 ;
RECT 2.745 2.445 3.035 3.08 ;
RECT 4.08 2.445 4.33 2.655 ;
RECT 2.745 2.23 4.33 2.445 ;
RECT 2.745 1.345 3.215 2.23 ;
RECT 2.745 0.805 3.075 1.345 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 0.195 0.105 0.365 1.12 ;
RECT 1.875 0.105 2.045 0.695 ;
RECT 3.7 0.105 3.87 0.695 ;
RECT 4.54 0.105 4.71 0.695 ;
RECT 0.195 0.085 4.71 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.52 3.485 ;
RECT 0.15 3.295 5.17 3.315 ;
RECT 0.15 2.245 0.4 3.295 ;
RECT 0.995 2.67 1.245 3.295 ;
RECT 1.835 2.67 2.575 3.295 ;
RECT 3.205 2.655 3.49 3.295 ;
RECT 4.965 2.245 5.17 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.575 2.455 0.825 3.08 ;
RECT 3.66 2.87 4.75 3.08 ;
RECT 3.66 2.655 3.91 2.87 ;
RECT 1.415 2.455 1.665 2.655 ;
RECT 0.575 2.23 2.285 2.455 ;
RECT 4.5 2.23 4.75 2.87 ;
RECT 2.115 1.655 2.285 2.23 ;
RECT 2.115 1.245 2.575 1.655 ;
RECT 2.115 1.13 2.285 1.245 ;
RECT 0.535 0.595 0.785 1.12 ;
RECT 0.955 0.905 2.285 1.13 ;
RECT 3.245 0.92 5.21 1.13 ;
RECT 0.955 0.805 1.285 0.905 ;
RECT 2.325 0.595 2.575 0.695 ;
RECT 3.245 0.595 3.53 0.92 ;
RECT 0.535 0.38 1.705 0.595 ;
RECT 2.325 0.32 3.53 0.595 ;
RECT 4.04 0.905 5.21 0.92 ;
RECT 4.04 0.32 4.37 0.905 ;
RECT 4.88 0.32 5.21 0.905 ;
END
END efs8hd_o2bb2ai_2
MACRO efs8hd_a31oi_2
CLASS CORE ;
FOREIGN efs8hd_a31oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 3.755 2.02 4.085 2.645 ;
RECT 3.255 1.805 4.085 2.02 ;
RECT 3.255 1.03 3.57 1.805 ;
RECT 2.295 0.82 4.505 1.03 ;
RECT 3.255 0.32 3.425 0.82 ;
RECT 4.175 0.37 4.505 0.82 ;
END
END Y
PIN A3
PORT
LAYER li1 ;
RECT 0.145 1.245 0.82 2.02 ;
END
END A3
PIN A2
PORT
LAYER li1 ;
RECT 1.05 1.245 1.755 2.02 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 1.955 1.245 2.665 2.02 ;
RECT 2.905 1.245 3.075 1.655 ;
END
END A1
PIN B1
PORT
LAYER li1 ;
RECT 4.265 1.615 4.49 2.03 ;
RECT 3.82 1.345 4.49 1.615 ;
END
END B1
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 3.675 0.105 4.005 0.58 ;
RECT 0.515 0.085 4.005 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.515 3.295 2.98 3.315 ;
RECT 0.515 2.655 0.845 3.295 ;
RECT 1.355 2.655 1.685 3.295 ;
RECT 2.31 2.655 2.98 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.445 0.345 3.08 ;
RECT 1.015 2.445 1.185 3.08 ;
RECT 1.855 2.445 2.025 3.08 ;
RECT 3.335 2.87 4.425 3.08 ;
RECT 3.335 2.445 3.505 2.87 ;
RECT 0.175 2.23 3.505 2.445 ;
RECT 4.255 2.245 4.425 2.87 ;
RECT 0.095 0.82 2.105 1.03 ;
RECT 1.355 0.37 3.075 0.58 ;
END
END efs8hd_a31oi_2
MACRO efs8hd_xor2_4
CLASS CORE ;
FOREIGN efs8hd_xor2_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.04 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 2.63 1.785 6.165 2.02 ;
RECT 2.63 1.595 2.8 1.785 ;
RECT 0.425 1.345 2.8 1.595 ;
RECT 5.995 1.595 6.165 1.785 ;
RECT 5.995 1.345 7.37 1.595 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 2.97 1.38 5.74 1.615 ;
RECT 2.97 1.345 5 1.38 ;
END
END B
PIN X
PORT
LAYER li1 ;
RECT 7.88 2.08 8.17 2.655 ;
RECT 8.76 2.08 9.01 2.655 ;
RECT 7.88 2.03 9.01 2.08 ;
RECT 9.6 2.03 10.035 3.08 ;
RECT 7.88 1.805 10.035 2.03 ;
RECT 5.15 1.13 5.58 1.17 ;
RECT 4.165 0.805 5.58 1.13 ;
RECT 7.85 1.13 8.305 1.17 ;
RECT 9.735 1.13 10.035 1.805 ;
RECT 7.85 0.92 10.035 1.13 ;
RECT 7.85 0.905 8.63 0.92 ;
RECT 8.3 0.32 8.63 0.905 ;
RECT 9.14 0.32 9.47 0.92 ;
LAYER met1 ;
RECT 5.145 1.15 5.435 1.205 ;
RECT 7.905 1.15 8.195 1.205 ;
RECT 5.145 0.975 8.195 1.15 ;
RECT 5.145 0.92 5.435 0.975 ;
RECT 7.905 0.92 8.195 0.975 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.085 0.105 0.36 0.705 ;
RECT 1.03 0.105 1.2 0.695 ;
RECT 1.87 0.105 2.04 0.695 ;
RECT 2.71 0.105 2.88 0.695 ;
RECT 3.55 0.105 3.82 1.12 ;
RECT 6.17 0.105 6.34 0.695 ;
RECT 7.01 0.105 7.18 0.695 ;
RECT 7.96 0.105 8.13 0.695 ;
RECT 8.8 0.105 8.97 0.695 ;
RECT 9.64 0.105 9.81 0.695 ;
RECT 0.085 0.085 9.81 0.105 ;
RECT 0 -0.085 10.12 0.085 ;
LAYER met1 ;
RECT 0 -0.3 10.12 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 10.12 3.485 ;
RECT 0.57 3.295 7.22 3.315 ;
RECT 0.57 2.72 0.82 3.295 ;
RECT 1.41 2.72 1.66 3.295 ;
RECT 4.45 2.72 4.7 3.295 ;
RECT 5.29 2.72 5.54 3.295 ;
RECT 6.13 2.72 6.38 3.295 ;
RECT 6.97 2.72 7.22 3.295 ;
LAYER met1 ;
RECT 0 3.1 10.12 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.505 0.4 3.08 ;
RECT 0.99 2.505 1.24 3.08 ;
RECT 1.83 2.87 3.76 3.08 ;
RECT 1.83 2.505 2.08 2.87 ;
RECT 2.67 2.655 2.92 2.87 ;
RECT 0.085 2.23 2.08 2.505 ;
RECT 2.25 2.445 2.5 2.655 ;
RECT 3.09 2.445 3.34 2.655 ;
RECT 2.25 2.23 3.34 2.445 ;
RECT 3.51 2.245 3.76 2.87 ;
RECT 4.03 2.505 4.28 3.08 ;
RECT 4.87 2.505 5.12 3.08 ;
RECT 5.71 2.505 5.96 3.08 ;
RECT 6.55 2.505 6.8 3.08 ;
RECT 7.39 2.87 9.43 3.08 ;
RECT 7.39 2.505 7.64 2.87 ;
RECT 4.03 2.23 7.64 2.505 ;
RECT 8.34 2.295 8.59 2.87 ;
RECT 9.18 2.245 9.43 2.87 ;
RECT 2.25 2.02 2.42 2.23 ;
RECT 0.085 1.805 2.42 2.02 ;
RECT 6.55 1.82 6.8 2.23 ;
RECT 7.26 1.805 7.71 2.02 ;
RECT 0.085 1.13 0.255 1.805 ;
RECT 7.54 1.595 7.71 1.805 ;
RECT 7.54 1.38 9.565 1.595 ;
RECT 8.54 1.345 9.565 1.38 ;
RECT 0.085 0.92 3.38 1.13 ;
RECT 0.53 0.905 3.38 0.92 ;
RECT 0.53 0.32 0.86 0.905 ;
RECT 1.37 0.32 1.7 0.905 ;
RECT 2.21 0.32 2.54 0.905 ;
RECT 3.05 0.32 3.38 0.905 ;
RECT 5.75 0.905 7.68 1.13 ;
RECT 5.75 0.595 6 0.905 ;
RECT 3.99 0.32 6 0.595 ;
RECT 6.51 0.32 6.84 0.905 ;
RECT 7.35 0.32 7.68 0.905 ;
LAYER met1 ;
RECT 1.925 2 2.215 2.055 ;
RECT 7.445 2 7.735 2.055 ;
RECT 1.925 1.825 7.735 2 ;
RECT 1.925 1.77 2.215 1.825 ;
RECT 7.445 1.77 7.735 1.825 ;
END
END efs8hd_xor2_4
MACRO efs8hd_o31ai_2
CLASS CORE ;
FOREIGN efs8hd_o31ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 2.335 2.08 2.665 2.655 ;
RECT 3.175 2.08 3.505 3.08 ;
RECT 4.175 2.08 4.515 3.08 ;
RECT 2.335 1.87 4.515 2.08 ;
RECT 3.675 0.745 4.005 1.87 ;
END
END Y
PIN B1
PORT
LAYER li1 ;
RECT 4.175 0.765 4.515 1.655 ;
END
END B1
PIN A1
PORT
LAYER li1 ;
RECT 0.09 1.32 1.24 1.655 ;
END
END A1
PIN A2
PORT
LAYER li1 ;
RECT 1.41 1.32 2.22 1.655 ;
END
END A2
PIN A3
PORT
LAYER li1 ;
RECT 2.39 1.32 3.205 1.655 ;
END
END A3
PIN vgnd
PORT
LAYER li1 ;
RECT 0.615 0.105 0.785 0.68 ;
RECT 1.455 0.105 1.965 0.68 ;
RECT 2.675 0.105 3.005 0.68 ;
RECT 0.615 0.085 3.005 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.615 3.295 4.005 3.315 ;
RECT 0.615 2.295 0.785 3.295 ;
RECT 3.675 2.295 4.005 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.08 0.445 3.08 ;
RECT 0.955 2.08 1.285 3.08 ;
RECT 1.455 2.87 3.005 3.08 ;
RECT 1.455 2.295 1.625 2.87 ;
RECT 1.795 2.08 2.125 2.655 ;
RECT 2.835 2.295 3.005 2.87 ;
RECT 0.09 1.87 2.125 2.08 ;
RECT 0.09 0.895 3.505 1.105 ;
RECT 0.09 0.32 0.445 0.895 ;
RECT 0.955 0.32 1.285 0.895 ;
RECT 2.175 0.32 2.505 0.895 ;
RECT 3.175 0.53 3.505 0.895 ;
RECT 4.135 0.53 4.515 0.595 ;
RECT 3.175 0.32 4.515 0.53 ;
END
END efs8hd_o31ai_2
MACRO efs8hd_clkbuf_8
CLASS CORE ;
FOREIGN efs8hd_clkbuf_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.98 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.085 0.765 0.4 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 1.42 2.17 1.68 3.075 ;
RECT 2.28 2.17 2.54 3.075 ;
RECT 3.14 2.17 3.4 3.075 ;
RECT 4 2.17 4.26 3.075 ;
RECT 1.42 1.87 4.73 2.17 ;
RECT 3.76 1.13 4.73 1.87 ;
RECT 1.42 0.92 4.73 1.13 ;
RECT 1.42 0.35 1.68 0.92 ;
RECT 2.28 0.35 2.54 0.92 ;
RECT 3.14 0.35 3.4 0.92 ;
RECT 4 0.35 4.26 0.92 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.145 0.105 0.39 0.595 ;
RECT 0.99 0.105 1.25 0.765 ;
RECT 1.85 0.105 2.11 0.705 ;
RECT 2.71 0.105 2.97 0.705 ;
RECT 3.57 0.105 3.83 0.705 ;
RECT 4.43 0.105 4.73 0.705 ;
RECT 0.145 0.085 4.73 0.105 ;
RECT 0 -0.085 5.06 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.06 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.06 3.485 ;
RECT 0.095 3.295 4.725 3.315 ;
RECT 0.095 1.905 0.39 3.295 ;
RECT 0.99 1.905 1.25 3.295 ;
RECT 1.85 2.38 2.11 3.295 ;
RECT 2.71 2.38 2.97 3.295 ;
RECT 3.57 2.38 3.83 3.295 ;
RECT 4.43 2.38 4.725 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.06 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.57 1.655 0.82 3.075 ;
RECT 0.57 1.345 3.59 1.655 ;
RECT 0.57 0.33 0.82 1.345 ;
END
END efs8hd_clkbuf_8
MACRO efs8hd_clkinv_8
CLASS CORE ;
FOREIGN efs8hd_clkinv_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.565 2.04 0.805 3.045 ;
RECT 1.405 2.04 1.645 3.045 ;
RECT 2.245 2.04 2.495 3.045 ;
RECT 3.08 2.04 3.325 3.045 ;
RECT 3.92 2.04 4.175 3.045 ;
RECT 4.765 2.04 5.005 3.045 ;
RECT 0.115 1.825 5.44 2.04 ;
RECT 0.115 1.08 0.285 1.825 ;
RECT 5.17 1.08 5.44 1.825 ;
RECT 0.115 0.87 5.44 1.08 ;
RECT 1.535 0.35 1.725 0.87 ;
RECT 2.395 0.35 2.585 0.87 ;
RECT 3.255 0.35 3.445 0.87 ;
RECT 4.115 0.35 4.305 0.87 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.455 1.295 4.865 1.615 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 1.035 0.105 1.365 0.655 ;
RECT 1.895 0.105 2.225 0.655 ;
RECT 2.755 0.105 3.085 0.655 ;
RECT 3.615 0.105 3.945 0.655 ;
RECT 4.475 0.105 4.805 0.655 ;
RECT 1.035 0.085 4.805 0.105 ;
RECT 0 -0.085 5.98 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.98 3.485 ;
RECT 0.135 3.295 5.43 3.315 ;
RECT 0.135 2.25 0.395 3.295 ;
RECT 0.975 2.25 1.235 3.295 ;
RECT 1.815 2.25 2.075 3.295 ;
RECT 2.665 2.25 2.91 3.295 ;
RECT 3.495 2.25 3.75 3.295 ;
RECT 4.345 2.25 4.595 3.295 ;
RECT 5.175 2.25 5.43 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
END efs8hd_clkinv_8
MACRO efs8hd_fill_8
CLASS CORE ;
FOREIGN efs8hd_fill_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.6800 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0000 -0.0850 3.6800 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 3.6800 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 3.6800 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 3.6800 3.7000 ;
END
END vpwr
END efs8hd_fill_8
MACRO efs8hd_clkdlybuf4s15_2
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s15_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 3.07 1.855 3.55 3.08 ;
RECT 3.355 0.8 3.55 1.855 ;
RECT 3.05 0.32 3.55 0.8 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.325 0.555 2.03 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.585 0.105 0.915 0.69 ;
RECT 2.55 0.105 2.88 0.705 ;
RECT 3.72 0.105 4.055 0.805 ;
RECT 0.585 0.085 4.055 0.105 ;
RECT 0 -0.085 4.14 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.14 3.485 ;
RECT 0.6 3.295 4.055 3.315 ;
RECT 0.6 2.67 0.93 3.295 ;
RECT 2.55 2.67 2.88 3.295 ;
RECT 3.72 1.855 4.055 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.455 0.43 3.08 ;
RECT 0.085 2.245 1.06 2.455 ;
RECT 0.89 1.555 1.06 2.245 ;
RECT 1.23 2.23 1.66 3.08 ;
RECT 1.83 2.455 2.1 3.08 ;
RECT 1.83 2.24 2.9 2.455 ;
RECT 1.49 1.855 1.66 2.23 ;
RECT 0.89 1.345 1.32 1.555 ;
RECT 1.49 1.345 2.415 1.855 ;
RECT 2.73 1.555 2.9 2.24 ;
RECT 2.73 1.345 3.185 1.555 ;
RECT 0.89 1.115 1.06 1.345 ;
RECT 1.49 1.13 1.66 1.345 ;
RECT 2.73 1.13 2.9 1.345 ;
RECT 0.085 0.9 1.06 1.115 ;
RECT 0.085 0.32 0.415 0.9 ;
RECT 1.28 0.32 1.66 1.13 ;
RECT 1.83 0.92 2.9 1.13 ;
RECT 1.83 0.32 2.1 0.92 ;
END
END efs8hd_clkdlybuf4s15_2
MACRO efs8hd_clkdlybuf4s25_1
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s25_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 3.035 1.955 3.595 3.08 ;
RECT 3.23 0.8 3.595 1.955 ;
RECT 3.015 0.32 3.595 0.8 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.345 0.485 1.65 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.58 0.105 0.91 0.705 ;
RECT 2.24 0.105 2.845 0.705 ;
RECT 0.58 0.085 2.845 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.6 3.295 2.845 3.315 ;
RECT 0.6 2.29 0.925 3.295 ;
RECT 2.235 2.295 2.845 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.075 0.43 3.08 ;
RECT 1.195 2.24 1.645 3.08 ;
RECT 0.085 1.865 1.005 2.075 ;
RECT 0.655 1.62 1.005 1.865 ;
RECT 0.655 1.28 1.105 1.62 ;
RECT 1.47 1.565 1.645 2.24 ;
RECT 1.815 2.08 2.065 3.08 ;
RECT 1.815 1.87 2.765 2.08 ;
RECT 2.595 1.655 2.765 1.87 ;
RECT 1.47 1.345 2.42 1.565 ;
RECT 0.655 1.13 1.005 1.28 ;
RECT 0.085 0.92 1.005 1.13 ;
RECT 1.47 1.07 1.645 1.345 ;
RECT 2.595 1.24 3.05 1.655 ;
RECT 2.595 1.13 2.765 1.24 ;
RECT 0.085 0.32 0.41 0.92 ;
RECT 1.175 0.32 1.645 1.07 ;
RECT 1.815 0.92 2.765 1.13 ;
RECT 1.815 0.32 2.065 0.92 ;
END
END efs8hd_clkdlybuf4s25_1
MACRO efs8hd_o22ai_2
CLASS CORE ;
FOREIGN efs8hd_o22ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN B1
PORT
LAYER li1 ;
RECT 0.145 1.3 0.895 1.63 ;
END
END B1
PIN B2
PORT
LAYER li1 ;
RECT 1.065 1.345 1.925 1.615 ;
END
END B2
PIN A2
PORT
LAYER li1 ;
RECT 2.445 1.305 3.195 1.635 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 3.365 1.345 4.165 1.615 ;
END
END A1
PIN Y
PORT
LAYER li1 ;
RECT 1.415 2.03 1.665 2.655 ;
RECT 2.815 2.03 3.075 2.655 ;
RECT 1.415 1.805 3.075 2.03 ;
RECT 1.415 1.785 2.275 1.805 ;
RECT 2.095 1.13 2.275 1.785 ;
RECT 0.535 0.905 2.275 1.13 ;
RECT 0.535 0.805 0.865 0.905 ;
RECT 1.375 0.805 1.705 0.905 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 2.855 0.105 3.025 0.695 ;
RECT 3.695 0.105 3.865 0.695 ;
RECT 2.855 0.085 3.865 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.575 3.295 3.905 3.315 ;
RECT 0.575 2.245 0.825 3.295 ;
RECT 3.655 2.245 3.905 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.15 2.03 0.405 3.08 ;
RECT 0.995 2.87 2.085 3.08 ;
RECT 0.995 2.03 1.245 2.87 ;
RECT 1.835 2.245 2.085 2.87 ;
RECT 2.395 2.87 3.485 3.08 ;
RECT 2.395 2.245 2.645 2.87 ;
RECT 0.15 1.82 1.245 2.03 ;
RECT 3.245 2.03 3.485 2.87 ;
RECT 4.075 2.03 4.33 3.08 ;
RECT 3.245 1.82 4.33 2.03 ;
RECT 0.09 0.595 0.365 1.13 ;
RECT 2.51 0.905 4.365 1.13 ;
RECT 2.51 0.595 2.68 0.905 ;
RECT 0.09 0.38 2.68 0.595 ;
RECT 3.195 0.32 3.525 0.905 ;
RECT 4.035 0.32 4.365 0.905 ;
END
END efs8hd_o22ai_2
MACRO efs8hd_sdlclkp_2
CLASS CORE ;
FOREIGN efs8hd_sdlclkp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 8.28 BY 3.4 ;
PIN GCLK
PORT
LAYER li1 ;
RECT 6.57 1.87 6.84 3.08 ;
RECT 6.67 1.645 6.84 1.87 ;
RECT 6.67 1.32 7.275 1.645 ;
RECT 6.67 1.03 6.84 1.32 ;
RECT 6.57 0.32 6.84 1.03 ;
END
END GCLK
PIN SCE
PORT
LAYER li1 ;
RECT 0.085 1.105 0.34 2.08 ;
END
END SCE
PIN CLK
PORT
LAYER li1 ;
RECT 4.705 1.615 4.925 1.655 ;
RECT 4.705 1.195 6.05 1.615 ;
END
END CLK
PIN GATE
PORT
LAYER li1 ;
RECT 0.855 1.805 1.24 2.445 ;
RECT 0.855 1.195 1.235 1.805 ;
END
END GATE
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.555 ;
RECT 2.67 0.105 3.015 1.03 ;
RECT 4.095 0.105 4.425 0.555 ;
RECT 5.49 0.105 6.4 0.555 ;
RECT 7.01 0.105 7.275 1.105 ;
RECT 0.515 0.085 7.275 0.105 ;
RECT 0 -0.085 7.36 0.085 ;
LAYER met1 ;
RECT 0 -0.3 7.36 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 7.36 3.485 ;
RECT 0.085 3.295 7.275 3.315 ;
RECT 0.085 2.295 0.345 3.295 ;
RECT 2.375 2.595 3.015 3.295 ;
RECT 3.575 2.82 5.53 3.295 ;
RECT 6.07 2.82 6.4 3.295 ;
RECT 7.01 1.855 7.275 3.295 ;
LAYER met1 ;
RECT 0 3.1 7.36 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.515 2.655 1.26 3.08 ;
RECT 1.43 2.655 2.205 3.08 ;
RECT 0.515 0.98 0.685 2.655 ;
RECT 1.41 1.655 1.865 2.445 ;
RECT 1.405 1.505 1.865 1.655 ;
RECT 2.035 1.72 2.205 2.655 ;
RECT 3.185 2.605 3.405 3.08 ;
RECT 5.7 2.605 5.87 3.08 ;
RECT 3.185 2.395 5.49 2.605 ;
RECT 3.185 2.38 3.405 2.395 ;
RECT 2.375 2.045 3.405 2.38 ;
RECT 2.375 1.97 2.545 2.045 ;
RECT 2.035 1.505 3.015 1.72 ;
RECT 0.515 0.935 1.195 0.98 ;
RECT 0.085 0.765 1.195 0.935 ;
RECT 1.405 0.88 1.705 1.505 ;
RECT 1.875 0.88 2.16 1.295 ;
RECT 2.33 1.245 3.015 1.505 ;
RECT 0.085 0.32 0.345 0.765 ;
RECT 1.015 0.32 1.195 0.765 ;
RECT 2.33 0.67 2.5 1.245 ;
RECT 1.365 0.32 2.5 0.67 ;
RECT 3.185 0.32 3.405 2.045 ;
RECT 3.575 1.97 4.04 2.18 ;
RECT 3.575 1.17 3.745 1.97 ;
RECT 4.21 1.87 5.01 2.18 ;
RECT 5.18 2.005 5.49 2.395 ;
RECT 5.7 2.22 6.4 2.605 ;
RECT 4.21 1.595 4.46 1.87 ;
RECT 5.18 1.795 5.65 2.005 ;
RECT 5.82 1.795 6.4 2.22 ;
RECT 3.915 1.38 4.46 1.595 ;
RECT 3.575 0.955 4 1.17 ;
RECT 4.17 0.98 4.46 1.38 ;
RECT 6.23 1.655 6.4 1.795 ;
RECT 6.23 1.245 6.5 1.655 ;
RECT 6.23 0.98 6.4 1.245 ;
RECT 3.575 0.32 3.925 0.955 ;
RECT 4.17 0.77 4.825 0.98 ;
RECT 4.595 0.32 4.825 0.77 ;
RECT 5.1 0.77 6.4 0.98 ;
RECT 5.1 0.32 5.31 0.77 ;
LAYER met1 ;
RECT 1.47 2 1.76 2.055 ;
RECT 4.23 2 4.52 2.055 ;
RECT 1.47 1.825 4.52 2 ;
RECT 1.47 1.77 1.76 1.825 ;
RECT 4.23 1.77 4.52 1.825 ;
RECT 1.93 1.15 2.22 1.205 ;
RECT 3.77 1.15 4.06 1.205 ;
RECT 1.93 0.975 4.06 1.15 ;
RECT 1.93 0.92 2.22 0.975 ;
RECT 3.77 0.92 4.06 0.975 ;
END
END efs8hd_sdlclkp_2
MACRO efs8hd_inv_2
CLASS CORE ;
FOREIGN efs8hd_inv_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.3 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.525 1.855 0.855 3.08 ;
RECT 0.605 1.105 0.855 1.855 ;
RECT 0.525 0.32 0.855 1.105 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.105 1.345 0.435 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.125 0.105 0.355 1.13 ;
RECT 1.025 0.105 1.235 1.13 ;
RECT 0.125 0.085 1.235 0.105 ;
RECT 0 -0.085 1.38 0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.38 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 1.38 3.485 ;
RECT 0.125 3.295 1.235 3.315 ;
RECT 0.125 1.87 0.355 3.295 ;
RECT 1.025 1.87 1.235 3.295 ;
LAYER met1 ;
RECT 0 3.1 1.38 3.7 ;
END
END vpwr
END efs8hd_inv_2
MACRO efs8hd_buf_2
CLASS CORE ;
FOREIGN efs8hd_buf_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.76 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.56 0.105 0.89 0.58 ;
RECT 1.49 0.105 1.75 1.155 ;
RECT 0.145 0.085 0.315 0.105 ;
RECT 0.56 0.085 1.75 0.105 ;
RECT 0 -0.085 1.84 0.085 ;
RECT 0.145 -0.105 0.315 -0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.84 0.3 ;
END
END vgnd
PIN X
PORT
LAYER li1 ;
RECT 1.06 1.95 1.315 3.08 ;
RECT 1.145 1.04 1.315 1.95 ;
RECT 1.06 0.32 1.315 1.04 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.105 0.44 1.695 ;
END
END A
PIN vpwr
PORT
LAYER li1 ;
RECT 0.145 3.485 0.315 3.505 ;
RECT 0 3.315 1.84 3.485 ;
RECT 0.145 3.295 0.315 3.315 ;
RECT 0.56 3.295 1.75 3.315 ;
RECT 0.56 2.345 0.89 3.295 ;
RECT 1.49 1.855 1.75 3.295 ;
LAYER met1 ;
RECT 0 3.1 1.84 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.13 0.345 3.08 ;
RECT 0.175 1.92 0.89 2.13 ;
RECT 0.72 1.655 0.89 1.92 ;
RECT 0.72 1.245 0.975 1.655 ;
RECT 0.72 0.935 0.89 1.245 ;
RECT 0.175 0.765 0.89 0.935 ;
RECT 0.175 0.32 0.345 0.765 ;
END
END efs8hd_buf_2
MACRO efs8hd_a22oi_2
CLASS CORE ;
FOREIGN efs8hd_a22oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.64 ;
RECT 3.555 0.105 3.885 0.64 ;
RECT 0.515 0.085 3.885 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
RECT 0.61 -0.105 0.78 -0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN Y
PORT
LAYER li1 ;
RECT 0.095 2.07 0.345 3.08 ;
RECT 0.935 2.07 1.265 2.655 ;
RECT 1.775 2.07 2.16 2.655 ;
RECT 0.095 1.855 2.16 2.07 ;
RECT 1.87 1.055 2.16 1.855 ;
RECT 1.355 0.845 3.045 1.055 ;
END
END Y
PIN B2
PORT
LAYER li1 ;
RECT 0.145 1.345 0.78 1.615 ;
END
END B2
PIN B1
PORT
LAYER li1 ;
RECT 1.065 1.345 1.7 1.615 ;
END
END B1
PIN A1
PORT
LAYER li1 ;
RECT 2.445 1.345 3.1 1.615 ;
END
END A1
PIN A2
PORT
LAYER li1 ;
RECT 3.365 1.345 4.5 1.615 ;
END
END A2
PIN vpwr
PORT
LAYER li1 ;
RECT 0.61 3.485 0.78 3.505 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.61 3.295 0.78 3.315 ;
RECT 2.795 3.295 3.805 3.315 ;
RECT 2.795 2.28 2.965 3.295 ;
RECT 3.635 2.28 3.805 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.515 2.87 2.625 3.08 ;
RECT 0.515 2.28 0.765 2.87 ;
RECT 1.435 2.28 1.605 2.87 ;
RECT 2.375 2.07 2.625 2.87 ;
RECT 3.135 2.07 3.465 3.08 ;
RECT 3.975 2.07 4.305 3.08 ;
RECT 2.375 1.855 4.305 2.07 ;
RECT 0.095 0.85 1.185 1.065 ;
RECT 0.095 0.32 0.345 0.85 ;
RECT 1.015 0.63 1.185 0.85 ;
RECT 3.215 0.85 4.375 1.065 ;
RECT 3.215 0.63 3.385 0.85 ;
RECT 1.015 0.32 2.105 0.63 ;
RECT 2.295 0.32 3.385 0.63 ;
RECT 4.055 0.32 4.375 0.85 ;
END
END efs8hd_a22oi_2
MACRO efs8hd_o211ai_2
CLASS CORE ;
FOREIGN efs8hd_o211ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.545 2.14 0.805 3.08 ;
RECT 1.475 2.14 1.665 3.08 ;
RECT 2.825 2.14 3.155 2.655 ;
RECT 0.545 1.925 3.155 2.14 ;
RECT 0.545 0.84 0.875 1.925 ;
END
END Y
PIN A1
PORT
LAYER li1 ;
RECT 3.705 1.29 4.455 1.62 ;
RECT 4.115 0.955 4.455 1.29 ;
END
END A1
PIN B1
PORT
LAYER li1 ;
RECT 1.045 1.345 1.905 1.705 ;
END
END B1
PIN A2
PORT
LAYER li1 ;
RECT 2.365 1.345 3.535 1.695 ;
END
END A2
PIN C1
PORT
LAYER li1 ;
RECT 0.085 1.245 0.375 2.465 ;
END
END C1
PIN vgnd
PORT
LAYER li1 ;
RECT 2.395 0.105 2.725 0.555 ;
RECT 3.255 0.105 3.585 0.555 ;
RECT 4.115 0.105 4.445 0.555 ;
RECT 2.395 0.085 4.445 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.115 3.295 4.015 3.315 ;
RECT 0.115 2.72 0.375 3.295 ;
RECT 0.975 2.395 1.305 3.295 ;
RECT 1.835 2.395 2.165 3.295 ;
RECT 3.685 2.33 4.015 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 2.395 2.87 3.515 3.08 ;
RECT 2.395 2.625 2.655 2.87 ;
RECT 3.325 2.12 3.515 2.87 ;
RECT 4.185 2.12 4.445 3.08 ;
RECT 3.325 1.905 4.445 2.12 ;
RECT 1.045 0.58 1.235 1.115 ;
RECT 1.405 0.795 3.945 1.055 ;
RECT 3.755 0.645 3.945 0.795 ;
RECT 1.045 0.555 2.165 0.58 ;
RECT 0.095 0.32 2.165 0.555 ;
END
END efs8hd_o211ai_2
MACRO efs8hd_dlymetal6s6s_1
CLASS CORE ;
FOREIGN efs8hd_dlymetal6s6s_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 4.08 1.87 4.515 3.08 ;
RECT 4.155 1.03 4.515 1.87 ;
RECT 4.08 0.32 4.515 1.03 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.105 0.575 2.125 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.695 0.105 1.08 0.595 ;
RECT 2.11 0.105 2.495 0.605 ;
RECT 3.525 0.105 3.91 0.605 ;
RECT 0.695 0.085 3.91 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.695 3.295 3.91 3.315 ;
RECT 0.695 2.765 1.08 3.295 ;
RECT 2.11 2.765 2.495 3.295 ;
RECT 3.525 2.765 3.91 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.55 0.525 3.08 ;
RECT 0.085 2.34 1.08 2.55 ;
RECT 0.745 1.655 1.08 2.34 ;
RECT 1.25 2.095 1.52 3.08 ;
RECT 1.69 2.55 1.94 3.08 ;
RECT 1.69 2.305 2.495 2.55 ;
RECT 1.25 1.87 1.975 2.095 ;
RECT 0.745 1.245 1.155 1.655 ;
RECT 1.325 1.245 1.975 1.87 ;
RECT 2.145 1.655 2.495 2.305 ;
RECT 2.665 2.095 2.915 3.08 ;
RECT 3.085 2.55 3.355 3.08 ;
RECT 3.085 2.305 3.91 2.55 ;
RECT 2.665 1.87 3.39 2.095 ;
RECT 2.145 1.245 2.57 1.655 ;
RECT 2.74 1.245 3.39 1.87 ;
RECT 3.56 1.655 3.91 2.305 ;
RECT 3.56 1.245 3.985 1.655 ;
RECT 0.745 0.935 1.08 1.245 ;
RECT 1.325 1.03 1.52 1.245 ;
RECT 2.145 1.03 2.495 1.245 ;
RECT 2.74 1.03 2.915 1.245 ;
RECT 3.56 1.03 3.91 1.245 ;
RECT 0.085 0.765 1.08 0.935 ;
RECT 0.085 0.32 0.525 0.765 ;
RECT 1.25 0.32 1.52 1.03 ;
RECT 1.69 0.82 2.495 1.03 ;
RECT 1.69 0.32 1.94 0.82 ;
RECT 2.665 0.32 2.915 1.03 ;
RECT 3.085 0.82 3.91 1.03 ;
RECT 3.085 0.32 3.355 0.82 ;
END
END efs8hd_dlymetal6s6s_1
MACRO efs8hd_a211oi_2
CLASS CORE ;
FOREIGN efs8hd_a211oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.575 2.23 0.905 2.63 ;
RECT 0.575 0.935 0.855 2.23 ;
RECT 0.575 0.765 3.145 0.935 ;
RECT 0.575 0.32 0.835 0.765 ;
RECT 1.505 0.355 1.695 0.765 ;
END
END Y
PIN C1
PORT
LAYER li1 ;
RECT 0.1 1.105 0.405 2.02 ;
END
END C1
PIN B1
PORT
LAYER li1 ;
RECT 1.035 1.615 1.255 2.02 ;
RECT 1.035 1.295 1.785 1.615 ;
END
END B1
PIN A1
PORT
LAYER li1 ;
RECT 2.37 1.105 3.08 1.615 ;
END
END A1
PIN A2
PORT
LAYER li1 ;
RECT 4.175 1.615 4.5 2.07 ;
RECT 3.74 1.295 4.5 1.615 ;
END
END A2
PIN vgnd
PORT
LAYER li1 ;
RECT 0.145 0.105 0.395 0.935 ;
RECT 1.005 0.105 1.335 0.595 ;
RECT 1.865 0.105 2.195 0.595 ;
RECT 3.675 0.105 4.005 0.57 ;
RECT 0.145 0.085 4.005 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 2.435 3.295 4.385 3.315 ;
RECT 2.435 2.295 2.665 3.295 ;
RECT 3.295 2.295 3.525 3.295 ;
RECT 4.155 2.295 4.385 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.145 2.855 2.215 3.07 ;
RECT 0.145 2.23 0.405 2.855 ;
RECT 1.075 2.82 2.215 2.855 ;
RECT 1.075 2.23 1.265 2.82 ;
RECT 1.435 2.07 1.765 2.595 ;
RECT 1.935 2.295 2.215 2.82 ;
RECT 2.845 2.07 3.115 3.08 ;
RECT 3.705 2.07 3.975 3.08 ;
RECT 1.435 1.82 3.975 2.07 ;
RECT 3.325 0.795 4.435 1.07 ;
RECT 3.325 0.595 3.495 0.795 ;
RECT 2.385 0.33 3.495 0.595 ;
RECT 4.185 0.33 4.435 0.795 ;
END
END efs8hd_a211oi_2
MACRO efs8hd_and2_2
CLASS CORE ;
FOREIGN efs8hd_and2_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.68 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 1.765 2.395 2.215 3.08 ;
RECT 1.965 0.68 2.215 2.395 ;
RECT 1.665 0.32 2.215 0.68 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.655 0.4 2.205 ;
RECT 0.085 1.345 0.775 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 1.005 1.345 1.335 1.655 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 1.245 0.105 1.495 0.68 ;
RECT 2.385 0.105 2.675 1.105 ;
RECT 1.245 0.085 2.675 0.105 ;
RECT 0 -0.085 2.76 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.76 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.76 3.485 ;
RECT 0.285 3.295 2.675 3.315 ;
RECT 0.285 2.455 0.565 3.295 ;
RECT 1.245 2.395 1.575 3.295 ;
RECT 2.385 1.87 2.675 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.76 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.735 2.18 1.035 2.87 ;
RECT 0.735 1.97 1.675 2.18 ;
RECT 1.505 1.655 1.675 1.97 ;
RECT 1.505 1.245 1.795 1.655 ;
RECT 1.505 1.13 1.675 1.245 ;
RECT 0.285 0.895 1.675 1.13 ;
RECT 0.285 0.445 0.615 0.895 ;
END
END efs8hd_and2_2
MACRO efs8hd_nand2b_2
CLASS CORE ;
FOREIGN efs8hd_nand2b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 1.035 2.505 1.365 3.08 ;
RECT 2.28 2.505 2.635 3.08 ;
RECT 1.035 2.295 2.635 2.505 ;
RECT 1.53 1.13 1.81 2.295 ;
RECT 2.36 1.87 2.635 2.295 ;
RECT 1.53 1.005 1.855 1.13 ;
RECT 1.525 0.795 1.855 1.005 ;
END
END Y
PIN AN
PORT
LAYER li1 ;
RECT 0.455 1.105 0.8 1.655 ;
END
END AN
PIN B
PORT
LAYER li1 ;
RECT 1.985 1.615 2.18 2.07 ;
RECT 1.985 1.345 3.135 1.615 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.935 ;
RECT 2.445 0.105 2.615 0.655 ;
RECT 0.515 0.085 2.615 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.58 3.295 3.135 3.315 ;
RECT 0.58 2.295 0.835 3.295 ;
RECT 1.535 2.72 2.11 3.295 ;
RECT 2.805 1.87 3.135 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.11 2.08 0.41 2.325 ;
RECT 0.11 1.87 1.36 2.08 ;
RECT 0.11 0.975 0.28 1.87 ;
RECT 1.03 1.345 1.36 1.87 ;
RECT 0.11 0.64 0.345 0.975 ;
RECT 1.08 0.58 1.355 1.13 ;
RECT 2.025 0.87 3.135 1.13 ;
RECT 2.025 0.58 2.275 0.87 ;
RECT 1.08 0.32 2.275 0.58 ;
RECT 2.785 0.32 3.135 0.87 ;
END
END efs8hd_nand2b_2
MACRO efs8hd_tapvgnd2_1
CLASS CORE ;
FOREIGN efs8hd_tapvgnd2_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 0.4600 BY 3.4000 ;
PIN vpb
PORT
LAYER li1 ;
RECT 0.0850 1.8350 0.3750 3.0650 ;
LAYER met1 ;
RECT 0.0850 2.1900 0.3750 2.4800 ;
END
END vpb
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 0.0850 0.3750 1.0100 ;
RECT 0.0000 -0.0850 0.4600 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 0.4600 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 0.4600 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 0.4600 3.7000 ;
END
END vpwr
END efs8hd_tapvgnd2_1
MACRO efs8hd_or2b_2
CLASS CORE ;
FOREIGN efs8hd_or2b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN BN
PORT
LAYER li1 ;
RECT 0.085 1.345 0.425 1.655 ;
END
END BN
PIN X
PORT
LAYER li1 ;
RECT 2.4 1.87 2.63 3.08 ;
RECT 2.46 0.95 2.63 1.87 ;
RECT 2.4 0.52 2.63 0.95 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.54 2.605 1.73 3.02 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.59 0.105 1.32 0.705 ;
RECT 1.83 0.105 2.21 0.605 ;
RECT 2.8 0.105 3.055 1.155 ;
RECT 0.59 0.085 3.055 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.085 3.295 3.055 3.315 ;
RECT 0.085 1.87 0.345 3.295 ;
RECT 1.91 2.295 2.19 3.295 ;
RECT 2.8 1.825 3.055 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.595 1.655 0.765 2.355 ;
RECT 0.985 2.08 1.405 2.395 ;
RECT 0.985 1.87 2.23 2.08 ;
RECT 2.06 1.655 2.23 1.87 ;
RECT 0.595 1.245 1.33 1.655 ;
RECT 2.06 1.245 2.29 1.655 ;
RECT 0.595 1.13 0.84 1.245 ;
RECT 0.105 0.92 0.84 1.13 ;
RECT 2.06 1.03 2.23 1.245 ;
RECT 0.105 0.33 0.42 0.92 ;
RECT 1.49 0.82 2.23 1.03 ;
RECT 1.49 0.38 1.66 0.82 ;
END
END efs8hd_or2b_2
MACRO efs8hd_tap_2
CLASS CORE ;
FOREIGN efs8hd_tap_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 0.9200 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0000 -0.0850 0.9200 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 0.9200 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 0.9200 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 0.9200 3.7000 ;
END
END vpwr
PIN vpb
PORT
LAYER li1 ;
RECT 0.0850 1.8350 0.8350 3.0650 ;
END
END vpb
PIN vnb
PORT
LAYER li1 ;
RECT 0.0850 0.3300 0.8350 1.0100 ;
END
END vnb
END efs8hd_tap_2
MACRO efs8hd_clkinvlp_4
CLASS CORE ;
FOREIGN efs8hd_clkinvlp_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.68 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.595 1.62 0.955 3.08 ;
RECT 1.685 1.62 2.015 3.08 ;
RECT 0.595 1.27 2.015 1.62 ;
RECT 0.595 0.85 0.955 1.27 ;
RECT 0.595 0.32 1.215 0.85 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.085 0.765 0.425 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.095 0.105 0.425 0.595 ;
RECT 1.675 0.105 2.005 0.97 ;
RECT 0.095 0.085 2.005 0.105 ;
RECT 0 -0.085 2.76 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.76 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.76 3.485 ;
RECT 0.095 3.295 2.545 3.315 ;
RECT 0.095 1.87 0.425 3.295 ;
RECT 1.155 1.83 1.485 3.295 ;
RECT 2.215 1.83 2.545 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.76 3.7 ;
END
END vpwr
END efs8hd_clkinvlp_4
MACRO efs8hd_or4_2
CLASS CORE ;
FOREIGN efs8hd_or4_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN D
PORT
LAYER li1 ;
RECT 0.085 0.765 0.435 1.655 ;
END
END D
PIN C
PORT
LAYER li1 ;
RECT 0.605 1.245 1.32 2.02 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 1.49 1.105 1.895 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 2.405 1.87 2.68 3.08 ;
RECT 2.51 0.95 2.68 1.87 ;
RECT 2.405 0.52 2.68 0.95 ;
END
END X
PIN B
PORT
LAYER li1 ;
RECT 0.085 2.655 1.745 3.02 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.09 0.105 0.425 0.595 ;
RECT 0.995 0.105 1.325 0.595 ;
RECT 1.835 0.105 2.215 0.595 ;
RECT 2.85 0.105 3.02 1.25 ;
RECT 0.09 0.085 3.02 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 1.915 3.295 3.02 3.315 ;
RECT 1.915 2.295 2.195 3.295 ;
RECT 2.85 1.82 3.02 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.23 1.68 2.445 ;
RECT 0.085 1.87 0.41 2.23 ;
RECT 1.51 2.08 1.68 2.23 ;
RECT 1.51 1.87 2.235 2.08 ;
RECT 2.065 1.655 2.235 1.87 ;
RECT 2.065 1.245 2.34 1.655 ;
RECT 2.065 0.935 2.235 1.245 ;
RECT 0.625 0.765 2.235 0.935 ;
RECT 0.625 0.38 0.795 0.765 ;
RECT 1.495 0.38 1.665 0.765 ;
END
END efs8hd_or4_2
MACRO efs8hd_clkdlybuf4s50_1
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s50_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 3.19 2.115 3.595 3.08 ;
RECT 3.345 0.8 3.595 2.115 ;
RECT 3.19 0.32 3.595 0.8 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.345 0.535 1.615 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.585 0.105 0.915 0.705 ;
RECT 2.69 0.105 3.02 0.75 ;
RECT 0.585 0.085 3.02 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.6 3.295 3.02 3.315 ;
RECT 0.6 2.25 0.93 3.295 ;
RECT 2.69 2.295 3.02 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.04 0.43 3.08 ;
RECT 0.085 1.825 1.055 2.04 ;
RECT 0.705 1.645 1.055 1.825 ;
RECT 1.38 1.65 1.73 3.08 ;
RECT 1.99 2.08 2.24 3.08 ;
RECT 1.99 1.87 2.58 2.08 ;
RECT 2.41 1.655 2.58 1.87 ;
RECT 0.705 1.28 1.135 1.645 ;
RECT 1.38 1.34 2.24 1.65 ;
RECT 0.705 1.13 1.055 1.28 ;
RECT 0.085 0.92 1.055 1.13 ;
RECT 0.085 0.32 0.415 0.92 ;
RECT 1.38 0.32 1.73 1.34 ;
RECT 2.41 1.245 3.175 1.655 ;
RECT 2.41 1.125 2.58 1.245 ;
RECT 1.99 0.915 2.58 1.125 ;
RECT 1.99 0.32 2.24 0.915 ;
END
END efs8hd_clkdlybuf4s50_1
MACRO efs8hd_xor2_2
CLASS CORE ;
FOREIGN efs8hd_xor2_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN B
PORT
LAYER li1 ;
RECT 1.045 1.345 1.54 1.595 ;
RECT 3.365 1.345 4.09 1.615 ;
LAYER met1 ;
RECT 1.005 1.575 1.295 1.63 ;
RECT 3.765 1.575 4.055 1.63 ;
RECT 1.005 1.4 4.055 1.575 ;
RECT 1.005 1.345 1.295 1.4 ;
RECT 3.765 1.345 4.055 1.4 ;
END
END B
PIN A
PORT
LAYER li1 ;
RECT 0.705 1.805 1.88 2.02 ;
RECT 0.705 1.595 0.875 1.805 ;
RECT 0.545 1.345 0.875 1.595 ;
RECT 1.71 1.63 1.88 1.805 ;
RECT 1.71 1.3 3.195 1.63 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 5.025 2.03 5.275 2.655 ;
RECT 5.025 1.77 5.895 2.03 ;
RECT 5.485 1.13 5.895 1.77 ;
RECT 3.625 0.905 5.895 1.13 ;
RECT 3.625 0.805 3.955 0.905 ;
RECT 4.985 0.805 5.315 0.905 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.19 0.105 0.36 0.695 ;
RECT 1.03 0.105 1.2 0.695 ;
RECT 1.87 0.105 2.04 0.695 ;
RECT 2.81 0.105 2.98 0.695 ;
RECT 4.645 0.105 4.815 0.695 ;
RECT 5.485 0.105 5.655 0.695 ;
RECT 0.19 0.085 5.655 0.105 ;
RECT 0 -0.085 5.98 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.98 3.485 ;
RECT 0.57 3.295 3.915 3.315 ;
RECT 0.57 2.67 0.82 3.295 ;
RECT 2.77 2.67 3.02 3.295 ;
RECT 3.61 2.67 3.915 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.12 2.67 0.4 3.08 ;
RECT 0.99 2.87 2.08 3.08 ;
RECT 0.99 2.67 1.24 2.87 ;
RECT 1.83 2.67 2.08 2.87 ;
RECT 0.145 2.655 0.315 2.67 ;
RECT 1.065 2.655 1.235 2.67 ;
RECT 2.285 2.655 2.6 3.08 ;
RECT 1.41 2.445 1.66 2.655 ;
RECT 2.39 2.445 2.6 2.655 ;
RECT 3.19 2.445 3.44 3.08 ;
RECT 4.085 2.87 5.695 3.08 ;
RECT 4.085 2.445 4.855 2.87 ;
RECT 0.12 2.23 2.22 2.445 ;
RECT 2.39 2.23 4.855 2.445 ;
RECT 5.445 2.245 5.695 2.87 ;
RECT 0.12 1.13 0.29 2.23 ;
RECT 2.05 2.02 2.22 2.23 ;
RECT 2.05 1.805 4.785 2.02 ;
RECT 4.615 1.555 4.785 1.805 ;
RECT 4.615 1.345 5.275 1.555 ;
RECT 0.12 0.905 1.7 1.13 ;
RECT 0.53 0.32 0.86 0.905 ;
RECT 1.37 0.32 1.7 0.905 ;
RECT 2.31 0.905 3.4 1.13 ;
RECT 2.31 0.32 2.64 0.905 ;
RECT 3.15 0.595 3.4 0.905 ;
RECT 3.15 0.32 4.38 0.595 ;
LAYER met1 ;
RECT 0.085 2.85 0.375 2.905 ;
RECT 1.005 2.85 1.295 2.905 ;
RECT 0.085 2.675 1.295 2.85 ;
RECT 0.085 2.62 0.375 2.675 ;
RECT 1.005 2.62 1.295 2.675 ;
END
END efs8hd_xor2_2
MACRO efs8hd_xnor2_4
CLASS CORE ;
FOREIGN efs8hd_xnor2_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.04 BY 3.4 ;
PIN B
PORT
LAYER li1 ;
RECT 1.685 1.785 5.73 2.02 ;
RECT 1.685 1.595 1.855 1.785 ;
RECT 0.49 1.345 1.855 1.595 ;
RECT 5.56 1.595 5.73 1.785 ;
RECT 5.56 1.345 7.43 1.595 ;
END
END B
PIN A
PORT
LAYER li1 ;
RECT 2.175 1.345 5.39 1.615 ;
END
END A
PIN Y
PORT
LAYER li1 ;
RECT 7.96 2.555 8.25 3.08 ;
RECT 6.16 2.23 8.25 2.555 ;
RECT 7.96 2.08 8.25 2.23 ;
RECT 8.84 2.08 9.09 3.08 ;
RECT 9.68 2.08 10.035 3.08 ;
RECT 7.96 1.805 10.035 2.08 ;
RECT 9.815 1.13 10.035 1.805 ;
RECT 8.38 0.805 10.035 1.13 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 2.35 0.105 2.52 0.695 ;
RECT 3.19 0.105 3.36 0.695 ;
RECT 4.035 0.105 4.31 1.13 ;
RECT 4.98 0.105 5.15 0.695 ;
RECT 5.82 0.105 5.99 0.695 ;
RECT 6.66 0.105 6.83 0.695 ;
RECT 7.5 0.105 7.77 0.695 ;
RECT 2.35 0.085 7.77 0.105 ;
RECT 0 -0.085 10.12 0.085 ;
LAYER met1 ;
RECT 0 -0.3 10.12 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 10.12 3.485 ;
RECT 0.63 3.295 9.51 3.315 ;
RECT 0.63 2.295 0.88 3.295 ;
RECT 1.47 2.72 1.72 3.295 ;
RECT 2.31 2.72 2.56 3.295 ;
RECT 3.15 2.72 3.4 3.295 ;
RECT 4.52 2.72 4.77 3.295 ;
RECT 5.36 2.72 5.61 3.295 ;
RECT 8.42 2.295 8.67 3.295 ;
RECT 9.26 2.295 9.51 3.295 ;
LAYER met1 ;
RECT 0 3.1 10.12 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.02 0.46 3.08 ;
RECT 1.05 2.505 1.3 3.08 ;
RECT 1.89 2.505 2.14 3.08 ;
RECT 2.73 2.505 2.98 3.08 ;
RECT 3.57 2.505 3.82 3.08 ;
RECT 1.05 2.23 3.82 2.505 ;
RECT 4.035 2.505 4.35 3.08 ;
RECT 4.94 2.505 5.19 3.08 ;
RECT 5.78 2.77 7.75 3.08 ;
RECT 5.78 2.505 5.99 2.77 ;
RECT 4.035 2.23 5.99 2.505 ;
RECT 1.05 2.02 1.3 2.23 ;
RECT 0.085 1.805 1.3 2.02 ;
RECT 5.9 1.805 7.77 2.02 ;
RECT 0.085 1.13 0.32 1.805 ;
RECT 7.6 1.595 7.77 1.805 ;
RECT 7.6 1.345 9.645 1.595 ;
RECT 0.085 0.805 1.76 1.13 ;
RECT 1.93 0.905 3.86 1.13 ;
RECT 1.93 0.595 2.18 0.905 ;
RECT 0.17 0.32 2.18 0.595 ;
RECT 2.69 0.32 3.02 0.905 ;
RECT 3.53 0.32 3.86 0.905 ;
RECT 4.48 0.92 8.21 1.13 ;
RECT 4.48 0.905 7.43 0.92 ;
RECT 4.48 0.32 4.81 0.905 ;
RECT 5.32 0.32 5.65 0.905 ;
RECT 6.16 0.32 6.49 0.905 ;
RECT 7 0.32 7.33 0.905 ;
RECT 7.96 0.595 8.21 0.92 ;
RECT 7.96 0.38 9.97 0.595 ;
LAYER met1 ;
RECT 1.005 2 1.295 2.055 ;
RECT 6.065 2 6.355 2.055 ;
RECT 1.005 1.825 6.355 2 ;
RECT 1.005 1.77 1.295 1.825 ;
RECT 6.065 1.77 6.355 1.825 ;
END
END efs8hd_xnor2_4
MACRO efs8hd_xor3_1
CLASS CORE ;
FOREIGN efs8hd_xor3_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 9.66 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 1.86 1.105 2.615 1.655 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 7.505 1.345 7.915 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 6.585 1.785 7.265 2.02 ;
RECT 6.585 1.245 6.855 1.785 ;
END
END B
PIN X
PORT
LAYER li1 ;
RECT 0.085 1.8 0.61 3.08 ;
RECT 0.085 1.155 0.4 1.8 ;
RECT 0.085 0.44 0.59 1.155 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.76 0.105 1.01 0.655 ;
RECT 3.93 0.105 4.1 1.08 ;
RECT 7.935 0.105 8.105 0.705 ;
RECT 0.76 0.085 8.105 0.105 ;
RECT 0 -0.085 8.74 0.085 ;
LAYER met1 ;
RECT 0 -0.3 8.74 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 8.74 3.485 ;
RECT 0.78 3.295 8.19 3.315 ;
RECT 0.78 2.77 1.115 3.295 ;
RECT 3.805 2.755 4.015 3.295 ;
RECT 7.855 2.845 8.19 3.295 ;
LAYER met1 ;
RECT 0 3.1 8.74 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.3 2.795 2.895 3.005 ;
RECT 3.11 2.795 3.635 3.005 ;
RECT 1.3 2.555 1.47 2.795 ;
RECT 3.465 2.58 3.635 2.795 ;
RECT 4.35 2.845 7.445 3.055 ;
RECT 4.35 2.58 4.52 2.845 ;
RECT 0.78 2.345 1.47 2.555 ;
RECT 1.87 2.37 3.295 2.58 ;
RECT 3.465 2.37 4.52 2.58 ;
RECT 0.78 1.655 0.95 2.345 ;
RECT 1.185 1.92 2.955 2.13 ;
RECT 0.75 1.245 0.95 1.655 ;
RECT 0.78 1.08 0.95 1.245 ;
RECT 0.78 0.87 1.35 1.08 ;
RECT 1.18 0.53 1.35 0.87 ;
RECT 1.52 0.745 1.69 1.92 ;
RECT 2.785 1.245 2.955 1.92 ;
RECT 3.125 2.12 3.295 2.37 ;
RECT 3.125 1.905 3.535 2.12 ;
RECT 3.25 1.72 3.535 1.905 ;
RECT 1.97 0.765 3.08 0.935 ;
RECT 2.39 0.53 2.74 0.57 ;
RECT 1.18 0.32 2.74 0.53 ;
RECT 2.91 0.53 3.08 0.765 ;
RECT 3.25 0.745 3.42 1.72 ;
RECT 3.705 1.505 3.875 2.37 ;
RECT 4.105 1.805 4.52 2.145 ;
RECT 3.59 1.295 3.875 1.505 ;
RECT 3.59 0.53 3.76 1.295 ;
RECT 2.91 0.32 3.76 0.53 ;
RECT 4.28 0.52 4.52 1.805 ;
RECT 4.695 0.745 4.905 2.63 ;
RECT 5.075 1.075 5.245 2.845 ;
RECT 8.36 2.63 8.655 3.08 ;
RECT 5.415 2.02 5.81 2.555 ;
RECT 6.245 2.42 8.655 2.63 ;
RECT 5.415 1.805 6.075 2.02 ;
RECT 5.415 1.245 5.735 1.595 ;
RECT 5.075 0.9 5.395 1.075 ;
RECT 5.565 0.99 5.735 1.245 ;
RECT 5.085 0.86 5.395 0.9 ;
RECT 4.695 0.565 4.915 0.745 ;
RECT 5.085 0.735 5.45 0.86 ;
RECT 4.695 0.33 5.11 0.565 ;
RECT 5.28 0.4 5.45 0.735 ;
RECT 5.905 0.53 6.075 1.805 ;
RECT 6.245 0.745 6.415 2.42 ;
RECT 8.17 2.345 8.655 2.42 ;
RECT 7.435 1.87 8.255 2.13 ;
RECT 8.085 1.655 8.255 1.87 ;
RECT 7.025 1.18 7.335 1.595 ;
RECT 8.085 1.245 8.315 1.655 ;
RECT 7.025 0.915 7.23 1.18 ;
RECT 8.085 1.13 8.255 1.245 ;
RECT 7.515 0.94 8.255 1.13 ;
RECT 7.475 0.92 8.255 0.94 ;
RECT 6.685 0.53 7.15 0.58 ;
RECT 5.905 0.32 7.15 0.53 ;
RECT 7.475 0.37 7.765 0.92 ;
RECT 8.485 0.73 8.655 2.345 ;
RECT 8.355 0.32 8.655 0.73 ;
LAYER met1 ;
RECT 3.305 2 3.595 2.055 ;
RECT 5.605 2 5.895 2.055 ;
RECT 3.305 1.825 5.895 2 ;
RECT 3.305 1.77 3.595 1.825 ;
RECT 5.605 1.77 5.895 1.825 ;
RECT 4.225 1.19 4.515 1.205 ;
RECT 5.565 1.19 5.895 1.205 ;
RECT 4.225 1.15 5.895 1.19 ;
RECT 6.985 1.15 7.275 1.205 ;
RECT 4.225 0.975 7.275 1.15 ;
RECT 4.225 0.96 5.895 0.975 ;
RECT 4.225 0.92 4.515 0.96 ;
RECT 5.565 0.92 5.895 0.96 ;
RECT 6.985 0.92 7.275 0.975 ;
RECT 4.685 0.725 4.975 0.78 ;
RECT 7.445 0.725 7.735 0.78 ;
RECT 4.685 0.55 7.735 0.725 ;
RECT 4.685 0.495 4.975 0.55 ;
RECT 7.445 0.495 7.735 0.55 ;
END
END efs8hd_xor3_1
MACRO efs8hd_dlymetal6s4s_1
CLASS CORE ;
FOREIGN efs8hd_dlymetal6s4s_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 2.66 2.095 3.105 3.08 ;
RECT 2.66 1.87 3.565 2.095 ;
RECT 2.735 1.245 3.565 1.87 ;
RECT 2.735 1.03 3.105 1.245 ;
RECT 2.66 0.32 3.105 1.03 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.105 0.57 2.125 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.69 0.105 1.075 0.595 ;
RECT 2.105 0.105 2.49 0.605 ;
RECT 3.7 0.105 4.085 0.605 ;
RECT 0.69 0.085 4.085 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.69 3.295 4.085 3.315 ;
RECT 0.69 2.765 1.075 3.295 ;
RECT 2.105 2.765 2.49 3.295 ;
RECT 3.7 2.765 4.085 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.55 0.52 3.08 ;
RECT 0.085 2.34 1.075 2.55 ;
RECT 0.74 1.655 1.075 2.34 ;
RECT 1.245 2.095 1.515 3.08 ;
RECT 1.685 2.55 1.935 3.08 ;
RECT 3.275 2.55 3.53 3.08 ;
RECT 1.685 2.305 2.49 2.55 ;
RECT 3.275 2.305 4.085 2.55 ;
RECT 1.245 1.87 1.97 2.095 ;
RECT 0.74 1.245 1.15 1.655 ;
RECT 1.32 1.245 1.97 1.87 ;
RECT 2.14 1.655 2.49 2.305 ;
RECT 3.735 1.655 4.085 2.305 ;
RECT 4.255 1.87 4.515 3.08 ;
RECT 2.14 1.245 2.565 1.655 ;
RECT 3.735 1.245 4.16 1.655 ;
RECT 0.74 0.935 1.075 1.245 ;
RECT 1.32 1.03 1.515 1.245 ;
RECT 2.14 1.03 2.49 1.245 ;
RECT 3.735 1.03 4.085 1.245 ;
RECT 4.33 1.03 4.515 1.87 ;
RECT 0.085 0.765 1.075 0.935 ;
RECT 0.085 0.32 0.52 0.765 ;
RECT 1.245 0.32 1.515 1.03 ;
RECT 1.685 0.82 2.49 1.03 ;
RECT 3.275 0.82 4.085 1.03 ;
RECT 1.685 0.32 1.935 0.82 ;
RECT 3.275 0.32 3.53 0.82 ;
RECT 4.255 0.32 4.515 1.03 ;
END
END efs8hd_dlymetal6s4s_1
MACRO efs8hd_and4bb_2
CLASS CORE ;
FOREIGN efs8hd_and4bb_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.52 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 2.905 0.525 3.175 1.615 ;
END
END C
PIN D
PORT
LAYER li1 ;
RECT 3.35 0.53 3.655 1.755 ;
END
END D
PIN X
PORT
LAYER li1 ;
RECT 0.99 1.93 1.32 2.145 ;
RECT 1.015 0.32 1.24 1.93 ;
END
END X
PIN BN
PORT
LAYER li1 ;
RECT 3.825 0.765 4.175 1.63 ;
END
END BN
PIN AN
PORT
LAYER li1 ;
RECT 0.145 1.105 0.33 2.045 ;
END
END AN
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.41 0.105 1.74 0.58 ;
RECT 3.835 0.105 4.005 0.595 ;
RECT 0.515 0.085 4.005 0.105 ;
RECT 0 -0.085 4.6 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.6 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.6 3.485 ;
RECT 0.515 3.295 4.085 3.315 ;
RECT 0.515 2.82 0.845 3.295 ;
RECT 1.49 2.82 2.16 3.295 ;
RECT 2.735 2.82 3.075 3.295 ;
RECT 3.755 2.82 4.085 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.6 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.57 0.345 3.08 ;
RECT 2.395 2.605 2.565 3.08 ;
RECT 3.245 2.605 3.415 3.08 ;
RECT 4.255 2.605 4.515 3.08 ;
RECT 0.175 2.355 1.925 2.57 ;
RECT 0.5 0.935 0.67 2.355 ;
RECT 1.755 1.655 1.925 2.355 ;
RECT 2.235 2.395 3.415 2.605 ;
RECT 3.585 2.395 4.515 2.605 ;
RECT 0.175 0.765 0.67 0.935 ;
RECT 1.415 1.005 1.585 1.655 ;
RECT 1.755 1.245 2.065 1.655 ;
RECT 2.235 1.005 2.405 2.395 ;
RECT 3.585 2.18 3.755 2.395 ;
RECT 2.575 1.97 3.755 2.18 ;
RECT 2.575 1.75 2.745 1.97 ;
RECT 1.415 0.795 2.405 1.005 ;
RECT 0.175 0.32 0.345 0.765 ;
RECT 2.01 0.32 2.18 0.795 ;
RECT 4.345 0.595 4.515 2.395 ;
RECT 4.175 0.32 4.515 0.595 ;
END
END efs8hd_and4bb_2
MACRO efs8hd_nand2_2
CLASS CORE ;
FOREIGN efs8hd_nand2_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.22 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.515 2.08 0.845 3.08 ;
RECT 1.355 2.08 1.685 3.08 ;
RECT 0.515 1.87 2.215 2.08 ;
RECT 1.935 1.13 2.215 1.87 ;
RECT 1.355 0.82 2.215 1.13 ;
END
END Y
PIN B
PORT
LAYER li1 ;
RECT 0.085 1.345 0.845 1.655 ;
END
END B
PIN A
PORT
LAYER li1 ;
RECT 1.015 1.345 1.765 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.595 0.085 0.765 0.68 ;
RECT 0 -0.085 2.3 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.3 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.3 3.485 ;
RECT 0.085 3.295 2.11 3.315 ;
RECT 0.085 1.87 0.345 3.295 ;
RECT 1.015 2.295 1.185 3.295 ;
RECT 1.855 2.295 2.11 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.3 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 0.895 1.185 1.105 ;
RECT 0.085 0.32 0.425 0.895 ;
RECT 0.935 0.58 1.185 0.895 ;
RECT 1.775 0.58 2.105 0.605 ;
RECT 0.935 0.32 2.105 0.58 ;
END
END efs8hd_nand2_2
MACRO efs8hd_tapvgnd_1
CLASS CORE ;
FOREIGN efs8hd_tapvgnd_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 0.4600 BY 3.4000 ;
PIN vpb
PORT
LAYER li1 ;
RECT 0.0850 1.8350 0.3750 3.0650 ;
LAYER met1 ;
RECT 0.0850 2.6150 0.3750 2.9050 ;
END
END vpb
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 0.0850 0.3750 1.0100 ;
RECT 0.0000 -0.0850 0.4600 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 0.4600 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 0.4600 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 0.4600 3.7000 ;
END
END vpwr
END efs8hd_tapvgnd_1
MACRO efs8hd_decap_8
CLASS CORE ;
FOREIGN efs8hd_decap_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.6800 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 1.0650 1.7350 1.7150 ;
RECT 0.0850 0.0850 3.5950 1.0650 ;
RECT 0.0000 -0.0850 3.6800 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 3.6800 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 3.6800 3.4850 ;
RECT 0.0850 1.9300 3.5950 3.3150 ;
RECT 1.9050 1.2800 3.5950 1.9300 ;
LAYER met1 ;
RECT 0.0000 3.1000 3.6800 3.7000 ;
END
END vpwr
END efs8hd_decap_8
MACRO efs8hd_or2_2
CLASS CORE ;
FOREIGN efs8hd_or2_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.22 BY 3.4 ;
PIN B
PORT
LAYER li1 ;
RECT 0.145 0.765 0.345 1.655 ;
END
END B
PIN A
PORT
LAYER li1 ;
RECT 0.865 0.765 1.275 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 1.44 2.505 1.77 3.08 ;
RECT 1.44 2.295 2.215 2.505 ;
RECT 1.785 1.03 2.215 2.295 ;
RECT 1.52 0.82 2.215 1.03 ;
RECT 1.52 0.48 1.69 0.82 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.105 0.105 0.345 0.595 ;
RECT 1.015 0.105 1.35 0.595 ;
RECT 1.86 0.105 2.19 0.605 ;
RECT 0.105 0.085 2.19 0.105 ;
RECT 0 -0.085 2.3 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.3 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.3 3.485 ;
RECT 1.1 3.295 2.11 3.315 ;
RECT 1.1 2.295 1.27 3.295 ;
RECT 1.94 2.72 2.11 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.3 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.155 2.08 0.515 2.3 ;
RECT 0.155 1.87 1.615 2.08 ;
RECT 0.515 0.595 0.695 1.87 ;
RECT 1.445 1.245 1.615 1.87 ;
RECT 0.515 0.32 0.845 0.595 ;
END
END efs8hd_or2_2
MACRO efs8hd_buf_8
CLASS CORE ;
FOREIGN efs8hd_buf_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.705 ;
RECT 1.355 0.105 1.685 0.705 ;
RECT 2.195 0.105 2.525 0.705 ;
RECT 3.035 0.105 3.365 0.705 ;
RECT 3.875 0.105 4.205 0.705 ;
RECT 4.715 0.105 5.045 1.105 ;
RECT 0.15 0.085 0.32 0.105 ;
RECT 0.515 0.085 5.045 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
RECT 0.15 -0.105 0.32 -0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN X
PORT
LAYER li1 ;
RECT 1.855 2.02 2.025 3.08 ;
RECT 2.695 2.02 2.865 3.08 ;
RECT 3.535 2.02 3.705 3.08 ;
RECT 4.375 2.02 4.545 3.08 ;
RECT 1.855 1.805 4.545 2.02 ;
RECT 4.285 1.13 4.545 1.805 ;
RECT 1.855 0.92 4.545 1.13 ;
RECT 1.855 0.32 2.025 0.92 ;
RECT 2.695 0.32 2.865 0.92 ;
RECT 3.535 0.32 3.705 0.92 ;
RECT 4.375 0.32 4.545 0.92 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.14 1.345 1.24 1.615 ;
END
END A
PIN vpwr
PORT
LAYER li1 ;
RECT 0.15 3.485 0.32 3.505 ;
RECT 0 3.315 5.52 3.485 ;
RECT 0.15 3.295 0.32 3.315 ;
RECT 0.595 3.295 5.045 3.315 ;
RECT 0.595 2.295 0.765 3.295 ;
RECT 1.435 2.295 1.605 3.295 ;
RECT 2.195 2.295 2.525 3.295 ;
RECT 3.035 2.295 3.365 3.295 ;
RECT 3.875 2.295 4.205 3.295 ;
RECT 4.715 1.855 5.045 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.095 2.02 0.425 3.08 ;
RECT 0.935 2.02 1.265 3.08 ;
RECT 0.095 1.805 1.595 2.02 ;
RECT 1.42 1.555 1.595 1.805 ;
RECT 1.42 1.345 4.045 1.555 ;
RECT 1.42 1.13 1.595 1.345 ;
RECT 0.175 0.92 1.595 1.13 ;
RECT 0.175 0.32 0.345 0.92 ;
RECT 1.015 0.325 1.185 0.92 ;
END
END efs8hd_buf_8
MACRO efs8hd_inv_8
CLASS CORE ;
FOREIGN efs8hd_inv_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.68 2.08 1.01 3.08 ;
RECT 1.52 2.08 1.85 3.08 ;
RECT 2.36 2.08 2.69 3.08 ;
RECT 3.2 2.08 3.53 3.08 ;
RECT 0.085 1.87 4.055 2.08 ;
RECT 0.085 1.13 0.43 1.87 ;
RECT 3.735 1.13 4.055 1.87 ;
RECT 0.085 0.895 4.055 1.13 ;
RECT 0.68 0.32 1.01 0.895 ;
RECT 1.52 0.32 1.85 0.895 ;
RECT 2.36 0.32 2.69 0.895 ;
RECT 3.2 0.32 3.53 0.895 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.68 1.345 3.535 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.255 0.105 0.51 0.68 ;
RECT 1.18 0.105 1.35 0.68 ;
RECT 2.02 0.105 2.19 0.68 ;
RECT 2.86 0.105 3.03 0.68 ;
RECT 3.7 0.105 4.005 0.68 ;
RECT 0.255 0.085 4.005 0.105 ;
RECT 0 -0.085 4.14 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.14 3.485 ;
RECT 0.255 3.295 4 3.315 ;
RECT 0.255 2.295 0.51 3.295 ;
RECT 1.18 2.295 1.35 3.295 ;
RECT 2.02 2.295 2.19 3.295 ;
RECT 2.86 2.295 3.03 3.295 ;
RECT 3.7 2.295 4 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
END efs8hd_inv_8
MACRO efs8hd_clkinvlp_2
CLASS CORE ;
FOREIGN efs8hd_clkinvlp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.76 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.81 0.94 1.235 3.07 ;
RECT 0.81 0.395 1.445 0.94 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.145 1.105 0.6 2.08 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.295 0.085 0.625 0.93 ;
RECT 0 -0.085 1.84 0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.84 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 1.84 3.485 ;
RECT 0.225 3.28 1.74 3.315 ;
RECT 0.225 2.295 0.555 3.28 ;
RECT 1.44 1.82 1.74 3.28 ;
LAYER met1 ;
RECT 0 3.1 1.84 3.7 ;
END
END vpwr
END efs8hd_clkinvlp_2
MACRO efs8hd_sdfrtp_2
CLASS CORE ;
FOREIGN efs8hd_sdfrtp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 12.88 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 11.14 1.825 11.4 2.905 ;
RECT 11.15 1.805 11.4 1.825 ;
RECT 11.19 0.995 11.4 1.805 ;
RECT 11.14 0.33 11.4 0.995 ;
END
END Q
PIN RESETB
PORT
LAYER li1 ;
RECT 9.525 1.33 10.115 1.615 ;
RECT 6.505 0.955 7.035 1.305 ;
RECT 9.805 0.765 10.115 1.33 ;
LAYER met1 ;
RECT 9.63 1.205 9.92 1.63 ;
RECT 6.445 1.15 7.095 1.205 ;
RECT 9.63 1.15 10.175 1.205 ;
RECT 6.445 0.975 10.175 1.15 ;
RECT 6.445 0.92 7.095 0.975 ;
RECT 9.885 0.92 10.175 0.975 ;
END
END RESETB
PIN CLK
PORT
LAYER li1 ;
RECT 0.14 1.105 0.49 2.03 ;
END
END CLK
PIN SCE
PORT
LAYER li1 ;
RECT 1.465 2.48 1.73 3.08 ;
RECT 1.485 1.34 1.73 2.48 ;
END
END SCE
PIN D
PORT
LAYER li1 ;
RECT 2.865 2.23 3.12 3.08 ;
RECT 2.735 1.695 3.12 2.23 ;
END
END D
PIN SCD
PORT
LAYER li1 ;
RECT 4.02 0.89 4.455 2.125 ;
RECT 4.02 0.355 4.275 0.89 ;
END
END SCD
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.875 0.105 2.205 0.7 ;
RECT 2.395 0.105 2.725 1.03 ;
RECT 4.445 0.105 4.775 0.675 ;
RECT 6.915 0.105 7.245 0.68 ;
RECT 9.085 0.105 9.255 0.655 ;
RECT 10.72 0.105 10.89 0.68 ;
RECT 11.57 0.105 11.74 0.68 ;
RECT 0.515 0.085 11.74 0.105 ;
RECT 0 -0.085 11.96 0.085 ;
LAYER met1 ;
RECT 0 -0.3 11.96 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 11.96 3.485 ;
RECT 0.53 3.295 11.82 3.315 ;
RECT 0.53 2.67 0.86 3.295 ;
RECT 2.32 2.55 2.49 3.295 ;
RECT 4.3 2.845 4.63 3.295 ;
RECT 6.41 2.945 6.74 3.295 ;
RECT 7.375 2.72 7.745 3.295 ;
RECT 9.36 2.745 9.61 3.295 ;
RECT 10.12 2.82 10.45 3.295 ;
RECT 10.72 1.87 10.97 3.295 ;
RECT 11.57 1.87 11.82 3.295 ;
LAYER met1 ;
RECT 0 3.1 11.96 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.455 0.345 3.08 ;
RECT 0.09 2.245 0.865 2.455 ;
RECT 0.66 1.655 0.865 2.245 ;
RECT 1.035 2.375 1.205 3.08 ;
RECT 1.9 2.57 2.15 3 ;
RECT 3.46 2.63 3.63 3.08 ;
RECT 4.905 2.73 5.275 3.045 ;
RECT 4.905 2.63 5.075 2.73 ;
RECT 5.47 2.67 5.835 3.08 ;
RECT 1.035 2.165 1.315 2.375 ;
RECT 0.66 1.245 0.975 1.655 ;
RECT 0.66 0.935 0.835 1.245 ;
RECT 0.095 0.765 0.835 0.935 ;
RECT 1.145 0.845 1.315 2.165 ;
RECT 1.98 1.82 2.15 2.57 ;
RECT 3.29 2.42 5.075 2.63 ;
RECT 1.98 1.575 2.47 1.82 ;
RECT 2.055 1.48 2.47 1.575 ;
RECT 3.29 1.48 3.46 2.42 ;
RECT 2.055 1.245 3.085 1.48 ;
RECT 2.055 1.125 2.225 1.245 ;
RECT 0.095 0.43 0.345 0.765 ;
RECT 1.015 0.43 1.315 0.845 ;
RECT 1.535 0.915 2.225 1.125 ;
RECT 1.535 0.495 1.705 0.915 ;
RECT 2.915 0.53 3.085 1.245 ;
RECT 3.255 1.27 3.46 1.48 ;
RECT 3.255 0.845 3.425 1.27 ;
RECT 3.68 0.53 3.85 2.105 ;
RECT 4.625 1.12 4.795 2.42 ;
RECT 5.245 1.97 5.495 2.445 ;
RECT 4.965 1.33 5.135 1.745 ;
RECT 5.325 1.295 5.495 1.97 ;
RECT 5.665 1.73 5.835 2.67 ;
RECT 6.005 2.63 6.175 2.97 ;
RECT 6.995 2.63 7.165 2.97 ;
RECT 6.005 2.42 7.165 2.63 ;
RECT 7.97 2.505 8.14 3.08 ;
RECT 8.32 2.655 9.19 3.08 ;
RECT 9.015 2.645 9.19 2.655 ;
RECT 9.015 2.545 9.21 2.645 ;
RECT 7.455 2.295 8.14 2.505 ;
RECT 8.31 2.42 8.84 2.445 ;
RECT 7.455 2.205 7.715 2.295 ;
RECT 6.285 1.995 7.715 2.205 ;
RECT 8.31 2.08 8.87 2.42 ;
RECT 5.665 1.52 7.375 1.73 ;
RECT 4.625 0.895 5.145 1.12 ;
RECT 2.915 0.32 3.85 0.53 ;
RECT 4.975 0.63 5.145 0.895 ;
RECT 5.325 0.88 5.975 1.295 ;
RECT 4.975 0.42 5.315 0.63 ;
RECT 6.165 0.595 6.335 1.52 ;
RECT 7.205 1.255 7.375 1.52 ;
RECT 7.545 1.045 7.715 1.995 ;
RECT 5.485 0.38 6.335 0.595 ;
RECT 7.455 0.555 7.715 1.045 ;
RECT 7.885 2.07 8.87 2.08 ;
RECT 9.04 2.18 9.21 2.545 ;
RECT 9.78 2.605 9.95 2.97 ;
RECT 9.78 2.395 10.545 2.605 ;
RECT 7.885 1.87 8.52 2.07 ;
RECT 9.04 1.97 10.205 2.18 ;
RECT 7.885 0.88 8.095 1.87 ;
RECT 9.04 1.855 9.21 1.97 ;
RECT 8.405 1.15 8.575 1.655 ;
RECT 8.745 1.645 9.21 1.855 ;
RECT 10.375 1.655 10.545 2.395 ;
RECT 8.745 0.67 8.915 1.645 ;
RECT 10.375 1.62 11.02 1.655 ;
RECT 9.125 1.08 9.295 1.43 ;
RECT 10.345 1.245 11.02 1.62 ;
RECT 9.125 0.87 9.635 1.08 ;
RECT 7.455 0.345 7.785 0.555 ;
RECT 8.005 0.32 8.915 0.67 ;
RECT 9.465 0.58 9.635 0.87 ;
RECT 10.345 0.58 10.515 1.245 ;
RECT 9.465 0.37 10.515 0.58 ;
LAYER met1 ;
RECT 0.97 2.425 1.27 2.48 ;
RECT 5.265 2.425 5.555 2.48 ;
RECT 8.385 2.425 8.675 2.48 ;
RECT 0.97 2.25 8.675 2.425 ;
RECT 0.97 2.195 1.27 2.25 ;
RECT 5.265 2.195 5.555 2.25 ;
RECT 8.385 2.195 8.675 2.25 ;
RECT 0.745 1.575 1.035 1.63 ;
RECT 4.845 1.605 5.135 1.63 ;
RECT 8.345 1.605 8.635 1.63 ;
RECT 4.845 1.575 8.635 1.605 ;
RECT 0.745 1.4 8.635 1.575 ;
RECT 0.745 1.345 1.035 1.4 ;
RECT 4.845 1.375 8.635 1.4 ;
RECT 4.845 1.345 5.135 1.375 ;
RECT 8.345 1.345 8.635 1.375 ;
END
END efs8hd_sdfrtp_2
MACRO efs8hd_clkdlybuf4s18_1
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s18_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 3.22 2.2 3.59 3.08 ;
RECT 3.365 0.68 3.59 2.2 ;
RECT 3.21 0.32 3.59 0.68 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.1 1.32 0.55 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.595 0.105 0.91 0.68 ;
RECT 2.71 0.105 3.04 0.68 ;
RECT 0.595 0.085 3.04 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.595 3.295 3.04 3.315 ;
RECT 0.595 2.295 0.925 3.295 ;
RECT 2.71 2.2 3.04 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.095 2.08 0.425 3.08 ;
RECT 1.385 2.295 1.76 3.08 ;
RECT 0.095 1.87 1.215 2.08 ;
RECT 0.72 1.105 1.215 1.87 ;
RECT 0.095 0.895 1.215 1.105 ;
RECT 1.59 1.565 1.76 2.295 ;
RECT 1.93 1.99 2.26 3.08 ;
RECT 1.93 1.775 3.195 1.99 ;
RECT 1.59 1.32 2.685 1.565 ;
RECT 1.59 1.03 1.76 1.32 ;
RECT 2.855 1.105 3.195 1.775 ;
RECT 0.095 0.32 0.425 0.895 ;
RECT 1.385 0.32 1.76 1.03 ;
RECT 1.93 0.895 3.195 1.105 ;
RECT 1.93 0.32 2.26 0.895 ;
END
END efs8hd_clkdlybuf4s18_1
MACRO efs8hd_bufbuf_16
CLASS CORE ;
FOREIGN efs8hd_bufbuf_16 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 12.88 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.11 1.345 0.44 1.615 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 5.235 2.02 5.565 3.08 ;
RECT 6.075 2.02 6.405 3.08 ;
RECT 6.915 2.02 7.245 3.08 ;
RECT 7.755 2.02 8.085 3.08 ;
RECT 8.595 2.02 8.925 3.08 ;
RECT 9.435 2.02 9.765 3.08 ;
RECT 10.275 2.02 10.605 3.08 ;
RECT 11.115 2.02 11.445 3.08 ;
RECT 5.235 1.805 11.875 2.02 ;
RECT 11.62 1.13 11.875 1.805 ;
RECT 5.235 0.92 11.875 1.13 ;
RECT 5.235 0.325 5.565 0.92 ;
RECT 6.075 0.325 6.405 0.92 ;
RECT 6.915 0.325 7.245 0.92 ;
RECT 7.755 0.325 8.085 0.92 ;
RECT 8.595 0.325 8.925 0.92 ;
RECT 9.435 0.325 9.765 0.92 ;
RECT 10.275 0.325 10.605 0.92 ;
RECT 11.115 0.325 11.445 0.92 ;
RECT 5.235 0.32 5.485 0.325 ;
RECT 6.155 0.32 6.325 0.325 ;
RECT 6.995 0.32 7.165 0.325 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.175 0.105 0.345 1.13 ;
RECT 1.535 0.105 1.705 0.705 ;
RECT 2.375 0.105 2.545 0.705 ;
RECT 3.215 0.105 3.385 0.705 ;
RECT 4.055 0.105 4.225 0.705 ;
RECT 4.895 0.105 5.065 0.705 ;
RECT 5.735 0.105 5.905 0.705 ;
RECT 6.575 0.105 6.745 0.705 ;
RECT 7.415 0.105 7.585 0.705 ;
RECT 8.255 0.105 8.425 0.705 ;
RECT 9.095 0.105 9.265 0.705 ;
RECT 9.935 0.105 10.105 0.705 ;
RECT 10.775 0.105 10.945 0.705 ;
RECT 11.615 0.105 11.785 0.705 ;
RECT 0.175 0.085 11.785 0.105 ;
RECT 0 -0.085 11.96 0.085 ;
LAYER met1 ;
RECT 0 -0.3 11.96 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 11.96 3.485 ;
RECT 0.175 3.295 11.785 3.315 ;
RECT 0.175 1.805 0.345 3.295 ;
RECT 1.535 2.23 1.705 3.295 ;
RECT 2.375 2.23 2.545 3.295 ;
RECT 3.215 2.295 3.385 3.295 ;
RECT 4.055 2.295 4.225 3.295 ;
RECT 4.895 2.295 5.065 3.295 ;
RECT 5.735 2.295 5.905 3.295 ;
RECT 6.575 2.295 6.745 3.295 ;
RECT 7.415 2.295 7.585 3.295 ;
RECT 8.255 2.295 8.425 3.295 ;
RECT 9.095 2.295 9.265 3.295 ;
RECT 9.935 2.295 10.105 3.295 ;
RECT 10.775 2.295 10.945 3.295 ;
RECT 11.615 2.295 11.785 3.295 ;
LAYER met1 ;
RECT 0 3.1 11.96 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.515 1.805 0.845 3.08 ;
RECT 1.035 2.02 1.365 3.08 ;
RECT 1.875 2.02 2.205 3.08 ;
RECT 2.715 2.02 3.045 3.08 ;
RECT 3.555 2.02 3.885 3.08 ;
RECT 4.395 2.02 4.725 3.08 ;
RECT 1.035 1.805 2.545 2.02 ;
RECT 2.715 1.805 5.065 2.02 ;
RECT 0.61 1.595 0.845 1.805 ;
RECT 2.375 1.595 2.545 1.805 ;
RECT 4.89 1.595 5.065 1.805 ;
RECT 0.61 1.345 2.205 1.595 ;
RECT 2.375 1.345 4.685 1.595 ;
RECT 4.89 1.345 11.45 1.595 ;
RECT 0.61 1.13 0.845 1.345 ;
RECT 2.375 1.13 2.545 1.345 ;
RECT 4.89 1.13 5.065 1.345 ;
RECT 0.515 0.325 0.845 1.13 ;
RECT 1.035 0.92 2.545 1.13 ;
RECT 2.715 0.92 5.065 1.13 ;
RECT 1.035 0.325 1.365 0.92 ;
RECT 1.875 0.325 2.205 0.92 ;
RECT 2.715 0.325 3.045 0.92 ;
RECT 3.555 0.325 3.885 0.92 ;
RECT 4.395 0.325 4.725 0.92 ;
END
END efs8hd_bufbuf_16
MACRO efs8hd_bufinv_16
CLASS CORE ;
FOREIGN efs8hd_bufinv_16 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.96 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.09 1.345 1.265 1.615 ;
END
END A
PIN Y
PORT
LAYER li1 ;
RECT 4.295 2.02 4.625 3.08 ;
RECT 5.135 2.02 5.465 3.08 ;
RECT 5.975 2.02 6.305 3.08 ;
RECT 6.815 2.02 7.145 3.08 ;
RECT 7.655 2.02 7.985 3.08 ;
RECT 8.495 2.02 8.825 3.08 ;
RECT 9.335 2.02 9.665 3.08 ;
RECT 10.175 2.02 10.505 3.08 ;
RECT 4.295 1.805 10.955 2.02 ;
RECT 10.68 1.13 10.955 1.805 ;
RECT 4.295 0.92 10.955 1.13 ;
RECT 4.295 0.325 4.625 0.92 ;
RECT 5.135 0.325 5.465 0.92 ;
RECT 5.975 0.325 6.305 0.92 ;
RECT 6.815 0.325 7.145 0.92 ;
RECT 7.655 0.325 7.985 0.92 ;
RECT 8.495 0.325 8.825 0.92 ;
RECT 9.335 0.325 9.665 0.92 ;
RECT 10.175 0.325 10.505 0.92 ;
RECT 4.295 0.32 4.545 0.325 ;
RECT 5.215 0.32 5.385 0.325 ;
RECT 6.055 0.32 6.225 0.325 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 0.595 0.105 0.765 0.705 ;
RECT 1.435 0.105 1.605 0.705 ;
RECT 2.275 0.105 2.445 0.705 ;
RECT 3.115 0.105 3.285 0.705 ;
RECT 3.955 0.105 4.125 0.705 ;
RECT 4.795 0.105 4.965 0.705 ;
RECT 5.635 0.105 5.805 0.705 ;
RECT 6.475 0.105 6.645 0.705 ;
RECT 7.315 0.105 7.485 0.705 ;
RECT 8.155 0.105 8.325 0.705 ;
RECT 8.995 0.105 9.165 0.705 ;
RECT 9.835 0.105 10.005 0.705 ;
RECT 10.675 0.105 10.845 0.705 ;
RECT 0.595 0.085 10.845 0.105 ;
RECT 0 -0.085 11.04 0.085 ;
LAYER met1 ;
RECT 0 -0.3 11.04 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 11.04 3.485 ;
RECT 0.595 3.295 10.845 3.315 ;
RECT 0.595 2.23 0.765 3.295 ;
RECT 1.435 2.23 1.605 3.295 ;
RECT 2.275 2.295 2.445 3.295 ;
RECT 3.115 2.295 3.285 3.295 ;
RECT 3.955 2.295 4.125 3.295 ;
RECT 4.795 2.295 4.965 3.295 ;
RECT 5.635 2.295 5.805 3.295 ;
RECT 6.475 2.295 6.645 3.295 ;
RECT 7.315 2.295 7.485 3.295 ;
RECT 8.155 2.295 8.325 3.295 ;
RECT 8.995 2.295 9.165 3.295 ;
RECT 9.835 2.295 10.005 3.295 ;
RECT 10.675 2.295 10.845 3.295 ;
LAYER met1 ;
RECT 0 3.1 11.04 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.095 2.02 0.425 3.08 ;
RECT 0.935 2.02 1.265 3.08 ;
RECT 1.775 2.02 2.105 3.08 ;
RECT 2.615 2.02 2.945 3.08 ;
RECT 3.455 2.02 3.785 3.08 ;
RECT 0.095 1.805 1.605 2.02 ;
RECT 1.775 1.805 4.125 2.02 ;
RECT 1.435 1.595 1.605 1.805 ;
RECT 3.95 1.595 4.125 1.805 ;
RECT 1.435 1.345 3.745 1.595 ;
RECT 3.95 1.345 10.51 1.595 ;
RECT 1.435 1.13 1.605 1.345 ;
RECT 3.95 1.13 4.125 1.345 ;
RECT 0.095 0.92 1.605 1.13 ;
RECT 1.775 0.92 4.125 1.13 ;
RECT 0.095 0.325 0.425 0.92 ;
RECT 0.935 0.325 1.265 0.92 ;
RECT 1.775 0.325 2.105 0.92 ;
RECT 2.615 0.325 2.945 0.92 ;
RECT 3.455 0.325 3.785 0.92 ;
END
END efs8hd_bufinv_16
MACRO efs8hd_decap_4
CLASS CORE ;
FOREIGN efs8hd_decap_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 1.8400 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 1.0650 0.8350 1.7150 ;
RECT 0.0850 0.0850 1.7550 1.0650 ;
RECT 0.0000 -0.0850 1.8400 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 1.8400 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 1.8400 3.4850 ;
RECT 0.0850 1.9300 1.7550 3.3150 ;
RECT 1.0050 1.2800 1.7550 1.9300 ;
LAYER met1 ;
RECT 0.0000 3.1000 1.8400 3.7000 ;
END
END vpwr
END efs8hd_decap_4
MACRO efs8hd_einvn_1
CLASS CORE ;
FOREIGN efs8hd_einvn_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.795 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 1.97 0.955 2.215 2.015 ;
END
END A
PIN TEB
PORT
LAYER li1 ;
RECT 0.085 1.19 0.51 2.155 ;
END
END TEB
PIN Z
PORT
LAYER li1 ;
RECT 1.04 2.23 2.215 3.08 ;
RECT 1.62 0.74 1.8 2.23 ;
RECT 1.62 0.315 2.215 0.74 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.54 0.085 1.44 0.555 ;
RECT 0 -0.085 2.3 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.3 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.3 3.485 ;
RECT 0.54 2.79 0.87 3.315 ;
LAYER met1 ;
RECT 0 3.1 2.3 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.58 0.37 3.08 ;
RECT 0.085 2.365 0.87 2.58 ;
RECT 0.685 2.015 0.87 2.365 ;
RECT 0.685 0.98 1.45 2.015 ;
RECT 0.085 0.765 1.45 0.98 ;
RECT 0.085 0.315 0.37 0.765 ;
END
END efs8hd_einvn_1
MACRO efs8hd_buf_4
CLASS CORE ;
FOREIGN efs8hd_buf_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.68 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.525 0.105 0.765 0.705 ;
RECT 1.355 0.105 1.685 0.705 ;
RECT 2.195 0.105 2.525 1.105 ;
RECT 0.15 0.085 0.32 0.105 ;
RECT 0.525 0.085 2.525 0.105 ;
RECT 0 -0.085 2.76 0.085 ;
RECT 0.15 -0.105 0.32 -0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.76 0.3 ;
END
END vgnd
PIN X
PORT
LAYER li1 ;
RECT 1.015 2.02 1.185 3.08 ;
RECT 1.855 2.02 2.025 3.08 ;
RECT 1.015 1.805 2.025 2.02 ;
RECT 1.525 1.13 2.025 1.805 ;
RECT 1.015 0.92 2.025 1.13 ;
RECT 1.015 0.32 1.185 0.92 ;
RECT 1.855 0.32 2.025 0.92 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.09 1.345 0.47 1.645 ;
END
END A
PIN vpwr
PORT
LAYER li1 ;
RECT 0.15 3.485 0.32 3.505 ;
RECT 0 3.315 2.76 3.485 ;
RECT 0.15 3.295 0.32 3.315 ;
RECT 0.595 3.295 2.525 3.315 ;
RECT 0.595 2.295 0.835 3.295 ;
RECT 1.355 2.295 1.685 3.295 ;
RECT 2.195 1.855 2.525 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.76 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.095 2.07 0.425 3.08 ;
RECT 0.095 1.855 0.81 2.07 ;
RECT 0.64 1.555 0.81 1.855 ;
RECT 0.64 1.345 1.14 1.555 ;
RECT 0.64 1.13 0.81 1.345 ;
RECT 0.175 0.92 0.81 1.13 ;
RECT 0.175 0.32 0.345 0.92 ;
END
END efs8hd_buf_4
MACRO efs8hd_sdfbbn_2
CLASS CORE ;
FOREIGN efs8hd_sdfbbn_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 16.1 BY 3.4 ;
PIN SCD
PORT
LAYER li1 ;
RECT 1.415 1.28 1.695 2.105 ;
END
END SCD
PIN SCE
PORT
LAYER li1 ;
RECT 1.935 1.37 2.155 2.12 ;
RECT 1.935 0.955 2.335 1.37 ;
RECT 1.935 0.43 2.145 0.955 ;
END
END SCE
PIN RESETB
PORT
LAYER li1 ;
RECT 11.59 1.37 12.07 1.655 ;
END
END RESETB
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.43 0.105 1.705 0.795 ;
RECT 3.37 0.105 3.7 0.555 ;
RECT 5.885 0.105 6.055 0.655 ;
RECT 7.645 0.105 7.975 0.58 ;
RECT 9.56 0.105 9.82 0.655 ;
RECT 12.08 0.105 12.41 1.005 ;
RECT 13 0.105 13.235 1.105 ;
RECT 13.95 0.105 14.245 0.68 ;
RECT 14.835 0.105 15.075 1.105 ;
RECT 0 -0.105 15.18 0.105 ;
LAYER met1 ;
RECT 0 -0.3 15.18 0.3 ;
END
END vgnd
PIN CLKN
PORT
LAYER li1 ;
RECT 0.085 1.22 0.435 2.03 ;
END
END CLKN
PIN SETB
PORT
LAYER li1 ;
RECT 5.885 1.205 6.215 1.33 ;
RECT 5.885 0.92 6.295 1.205 ;
RECT 9.755 0.92 10.13 1.33 ;
LAYER met1 ;
RECT 6.065 1.15 6.355 1.205 ;
RECT 9.745 1.15 10.035 1.205 ;
RECT 6.065 0.975 10.035 1.15 ;
RECT 6.065 0.92 6.355 0.975 ;
RECT 9.745 0.92 10.035 0.975 ;
END
END SETB
PIN Q
PORT
LAYER li1 ;
RECT 14.415 1.805 14.665 3.08 ;
RECT 14.46 1.03 14.665 1.805 ;
RECT 14.415 0.32 14.665 1.03 ;
END
END Q
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 15.18 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.43 2.355 1.785 3.295 ;
RECT 3.295 2.77 3.64 3.295 ;
RECT 5.705 2.755 6.085 3.295 ;
RECT 7.175 2.395 7.505 3.295 ;
RECT 9.62 2.82 10 3.295 ;
RECT 10.94 2.82 12.41 3.295 ;
RECT 13 1.87 13.235 3.295 ;
RECT 13.95 2.205 14.245 3.295 ;
RECT 14.835 1.87 15.075 3.295 ;
LAYER met1 ;
RECT 0 3.1 15.18 3.7 ;
END
END vpwr
PIN D
PORT
LAYER li1 ;
RECT 3.825 1.655 4.025 2.97 ;
END
END D
PIN QN
PORT
LAYER li1 ;
RECT 12.58 2.04 12.83 3.08 ;
RECT 12.66 0.895 12.83 2.04 ;
RECT 12.58 0.32 12.83 0.895 ;
END
END QN
OBS
LAYER li1 ;
RECT 0.17 2.455 0.345 3.08 ;
RECT 0.17 2.245 0.835 2.455 ;
RECT 0.605 1.005 0.835 2.245 ;
RECT 0.17 0.795 0.835 1.005 ;
RECT 0.17 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.235 3.08 ;
RECT 2.215 2.345 2.575 2.98 ;
RECT 2.895 2.38 3.065 3.08 ;
RECT 2.405 1.755 2.575 2.345 ;
RECT 2.745 2.18 3.065 2.38 ;
RECT 2.745 1.97 3.645 2.18 ;
RECT 2.405 1.565 3.075 1.755 ;
RECT 2.435 1.545 3.075 1.565 ;
RECT 2.56 1.345 3.075 1.545 ;
RECT 3.475 1.37 3.645 1.97 ;
RECT 2.56 0.745 2.73 1.345 ;
RECT 3.475 0.995 3.77 1.37 ;
RECT 2.315 0.33 2.73 0.745 ;
RECT 2.955 0.955 3.77 0.995 ;
RECT 2.955 0.78 3.645 0.955 ;
RECT 2.955 0.38 3.125 0.78 ;
RECT 4.23 0.38 4.455 3.08 ;
RECT 4.635 2.815 5.465 3.025 ;
RECT 4.625 1.97 5.125 2.445 ;
RECT 4.625 0.88 4.845 1.97 ;
RECT 5.295 1.755 5.465 2.815 ;
RECT 6.385 2.545 6.555 2.97 ;
RECT 8.55 2.815 9.38 3.025 ;
RECT 5.635 2.23 6.985 2.545 ;
RECT 5.635 1.97 5.885 2.23 ;
RECT 6.395 1.755 6.645 1.855 ;
RECT 5.295 1.545 6.645 1.755 ;
RECT 5.295 1.495 5.715 1.545 ;
RECT 5.025 0.805 5.375 1.27 ;
RECT 5.545 0.58 5.715 1.495 ;
RECT 6.425 1.445 6.645 1.545 ;
RECT 6.815 1.33 6.985 2.23 ;
RECT 7.155 1.77 8.16 2.07 ;
RECT 8.36 1.97 8.595 2.48 ;
RECT 7.155 1.545 7.485 1.77 ;
RECT 8.835 1.63 9.04 2.38 ;
RECT 7.795 1.33 8.125 1.545 ;
RECT 6.815 1.12 8.125 1.33 ;
RECT 8.42 1.405 9.04 1.63 ;
RECT 9.21 1.755 9.38 2.815 ;
RECT 10.24 2.605 10.41 2.97 ;
RECT 9.55 2.395 12.41 2.605 ;
RECT 9.55 1.97 9.8 2.395 ;
RECT 9.21 1.545 10.56 1.755 ;
RECT 6.815 0.955 7.035 1.12 ;
RECT 6.705 0.745 7.035 0.955 ;
RECT 4.7 0.33 5.715 0.58 ;
RECT 6.225 0.53 6.555 0.63 ;
RECT 7.205 0.53 7.375 0.895 ;
RECT 8.42 0.88 8.705 1.405 ;
RECT 9.21 0.58 9.38 1.545 ;
RECT 10.34 1.345 10.56 1.545 ;
RECT 10.73 0.975 10.91 2.395 ;
RECT 10.58 0.745 10.91 0.975 ;
RECT 11.08 1.97 11.925 2.18 ;
RECT 11.08 1.155 11.355 1.97 ;
RECT 12.24 1.655 12.41 2.395 ;
RECT 13.455 1.655 13.77 3.02 ;
RECT 12.24 1.245 12.48 1.655 ;
RECT 13.455 1.245 14.29 1.655 ;
RECT 11.08 0.945 11.845 1.155 ;
RECT 6.225 0.32 7.375 0.53 ;
RECT 8.615 0.33 9.38 0.58 ;
RECT 10.08 0.53 10.41 0.68 ;
RECT 11.08 0.53 11.25 0.73 ;
RECT 10.08 0.32 11.25 0.53 ;
RECT 11.62 0.33 11.845 0.945 ;
RECT 13.455 0.32 13.77 1.245 ;
LAYER met1 ;
RECT 1.005 2.425 1.295 2.48 ;
RECT 4.685 2.425 4.975 2.48 ;
RECT 8.365 2.425 8.655 2.48 ;
RECT 1.005 2.25 8.655 2.425 ;
RECT 1.005 2.195 1.295 2.25 ;
RECT 4.685 2.195 4.975 2.25 ;
RECT 8.365 2.195 8.655 2.25 ;
RECT 7.905 2 8.195 2.055 ;
RECT 11.125 2 11.415 2.055 ;
RECT 7.905 1.825 11.415 2 ;
RECT 7.905 1.77 8.195 1.825 ;
RECT 11.125 1.77 11.415 1.825 ;
RECT 2.845 1.575 3.135 1.63 ;
RECT 4.225 1.575 4.515 1.63 ;
RECT 8.365 1.575 8.655 1.63 ;
RECT 2.845 1.4 4.515 1.575 ;
RECT 2.845 1.345 3.135 1.4 ;
RECT 4.225 1.345 4.515 1.4 ;
RECT 5.22 1.4 8.655 1.575 ;
RECT 5.22 1.205 5.435 1.4 ;
RECT 8.365 1.345 8.655 1.4 ;
RECT 0.545 1.15 0.835 1.205 ;
RECT 5.145 1.15 5.435 1.205 ;
RECT 0.545 0.975 5.435 1.15 ;
RECT 0.545 0.92 0.835 0.975 ;
RECT 5.145 0.92 5.435 0.975 ;
END
END efs8hd_sdfbbn_2
MACRO efs8hd_inv_4
CLASS CORE ;
FOREIGN efs8hd_inv_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.22 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.565 2.08 0.895 3.08 ;
RECT 1.405 2.105 1.735 3.08 ;
RECT 1.405 2.08 2.17 2.105 ;
RECT 0.565 1.87 2.17 2.08 ;
RECT 1.905 1.13 2.17 1.87 ;
RECT 0.565 0.905 2.17 1.13 ;
RECT 0.565 0.32 0.895 0.905 ;
RECT 1.405 0.32 1.735 0.905 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.105 1.345 1.735 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.13 0.105 0.395 0.68 ;
RECT 1.065 0.105 1.235 0.68 ;
RECT 1.905 0.105 2.155 0.69 ;
RECT 0.13 0.085 2.155 0.105 ;
RECT 0 -0.085 2.3 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.3 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.3 3.485 ;
RECT 0.13 3.295 2.115 3.315 ;
RECT 0.13 1.87 0.395 3.295 ;
RECT 1.065 2.295 1.235 3.295 ;
RECT 1.905 2.72 2.115 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.3 3.7 ;
END
END vpwr
END efs8hd_inv_4
MACRO efs8hd_dfsbp_2
CLASS CORE ;
FOREIGN efs8hd_dfsbp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.96 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 10.15 2.08 10.48 3.08 ;
RECT 10.15 1.87 10.915 2.08 ;
RECT 10.36 1.055 10.915 1.87 ;
RECT 10.345 1.03 10.915 1.055 ;
RECT 10.23 0.9 10.915 1.03 ;
RECT 10.23 0.32 10.48 0.9 ;
END
END Q
PIN QN
PORT
LAYER li1 ;
RECT 8.37 0.32 8.7 3.08 ;
END
END QN
PIN D
PORT
LAYER li1 ;
RECT 1.77 1.255 2.18 2.03 ;
END
END D
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 11.04 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.455 2.67 1.785 3.295 ;
RECT 3.43 2.82 3.81 3.295 ;
RECT 4.33 2.82 4.66 3.295 ;
RECT 5.93 2.82 6.34 3.295 ;
RECT 7.01 2.43 7.34 3.295 ;
RECT 8.02 1.85 8.2 3.295 ;
RECT 8.87 1.85 9.12 3.295 ;
RECT 9.81 1.87 9.98 3.295 ;
RECT 10.65 2.295 10.915 3.295 ;
LAYER met1 ;
RECT 0 3.1 11.04 3.7 ;
END
END vpwr
PIN SETB
PORT
LAYER li1 ;
RECT 3.61 0.92 4.02 1.33 ;
RECT 6.66 1.255 6.99 1.33 ;
RECT 6.66 0.92 7.32 1.255 ;
LAYER met1 ;
RECT 3.765 1.15 4.055 1.205 ;
RECT 6.985 1.15 7.275 1.205 ;
RECT 3.765 0.975 7.275 1.15 ;
RECT 3.765 0.92 4.055 0.975 ;
RECT 6.985 0.92 7.275 0.975 ;
END
END SETB
PIN CLK
PORT
LAYER li1 ;
RECT 0.09 1.22 0.44 2.03 ;
END
END CLK
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.455 0.105 1.785 0.58 ;
RECT 3.61 0.105 4.02 0.655 ;
RECT 4.74 0.105 5.08 0.68 ;
RECT 6.67 0.105 7.33 0.705 ;
RECT 8.02 0.105 8.2 1.13 ;
RECT 8.87 0.105 9.12 1.13 ;
RECT 9.73 0.105 10.06 1.03 ;
RECT 10.65 0.105 10.915 0.69 ;
RECT 0 -0.105 11.04 0.105 ;
LAYER met1 ;
RECT 0 -0.3 11.04 0.3 ;
END
END vgnd
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 0.175 2.245 0.84 2.455 ;
RECT 0.61 1.005 0.84 2.245 ;
RECT 0.175 0.795 0.84 1.005 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.24 3.08 ;
RECT 1.955 2.455 2.125 3.08 ;
RECT 2.36 2.815 3.19 3.025 ;
RECT 1.43 2.245 2.125 2.455 ;
RECT 1.43 1.03 1.6 2.245 ;
RECT 2.35 1.97 2.85 2.445 ;
RECT 1.43 0.795 2.125 1.03 ;
RECT 2.35 0.88 2.57 1.97 ;
RECT 3.02 1.755 3.19 2.815 ;
RECT 3.99 2.605 4.16 2.97 ;
RECT 5.11 2.705 5.76 3.02 ;
RECT 5.59 2.605 5.76 2.705 ;
RECT 6.54 2.605 6.78 2.97 ;
RECT 3.36 2.295 4.71 2.605 ;
RECT 3.36 1.97 3.61 2.295 ;
RECT 4.12 1.755 4.37 1.955 ;
RECT 3.02 1.545 4.37 1.755 ;
RECT 3.02 1.495 3.44 1.545 ;
RECT 2.75 0.805 3.1 1.27 ;
RECT 1.955 0.38 2.125 0.795 ;
RECT 3.27 0.58 3.44 1.495 ;
RECT 4.54 1.33 4.71 2.295 ;
RECT 2.425 0.33 3.44 0.58 ;
RECT 4.31 0.905 4.71 1.33 ;
RECT 4.9 2.07 5.4 2.455 ;
RECT 5.59 2.395 6.78 2.605 ;
RECT 4.9 1.12 5.07 2.07 ;
RECT 5.24 1.33 5.42 1.845 ;
RECT 5.59 1.755 5.76 2.395 ;
RECT 7.51 2.205 7.68 2.97 ;
RECT 7.51 2.18 7.83 2.205 ;
RECT 5.93 1.97 7.83 2.18 ;
RECT 5.59 1.545 7.47 1.755 ;
RECT 5.82 1.12 6.15 1.27 ;
RECT 4.9 0.905 6.15 1.12 ;
RECT 4.31 0.37 4.56 0.905 ;
RECT 6.32 0.595 6.49 1.545 ;
RECT 7.14 1.47 7.47 1.545 ;
RECT 7.64 0.85 7.83 1.97 ;
RECT 5.64 0.38 6.49 0.595 ;
RECT 7.51 0.44 7.83 0.85 ;
RECT 9.31 1.655 9.64 3.08 ;
RECT 9.31 1.245 10.19 1.655 ;
RECT 9.31 0.32 9.56 1.245 ;
LAYER met1 ;
RECT 0.585 2.425 0.875 2.48 ;
RECT 2.385 2.425 2.675 2.48 ;
RECT 5.145 2.425 5.435 2.48 ;
RECT 0.585 2.25 5.435 2.425 ;
RECT 0.585 2.195 0.875 2.25 ;
RECT 2.385 2.195 2.675 2.25 ;
RECT 5.145 2.195 5.435 2.25 ;
RECT 5.185 1.575 5.475 1.63 ;
RECT 2.92 1.4 5.475 1.575 ;
RECT 2.92 1.205 3.135 1.4 ;
RECT 5.185 1.345 5.475 1.4 ;
RECT 1.005 1.15 1.295 1.205 ;
RECT 2.845 1.15 3.135 1.205 ;
RECT 1.005 0.975 3.135 1.15 ;
RECT 1.005 0.92 1.295 0.975 ;
RECT 2.845 0.92 3.135 0.975 ;
END
END efs8hd_dfsbp_2
MACRO efs8hd_and2b_2
CLASS CORE ;
FOREIGN efs8hd_and2b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 2.375 1.975 2.68 2.955 ;
RECT 2.505 0.97 2.68 1.975 ;
RECT 2.445 0.32 2.68 0.97 ;
END
END X
PIN AN
PORT
LAYER li1 ;
RECT 0.145 0.955 0.45 2.02 ;
END
END AN
PIN B
PORT
LAYER li1 ;
RECT 1.505 2.055 2.2 2.635 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.095 0.105 0.425 0.74 ;
RECT 1.875 0.105 2.275 0.725 ;
RECT 2.865 0.105 3.135 0.9 ;
RECT 0.095 0.085 3.135 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.515 3.295 3.135 3.315 ;
RECT 0.515 2.73 0.845 3.295 ;
RECT 1.51 2.805 2.195 3.295 ;
RECT 2.865 2.1 3.135 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.52 0.345 3.055 ;
RECT 0.175 2.23 0.855 2.52 ;
RECT 0.62 1.42 0.855 2.23 ;
RECT 1.045 1.845 1.33 3.025 ;
RECT 1.045 1.655 1.905 1.845 ;
RECT 1.045 1.63 2.335 1.655 ;
RECT 0.62 1.005 1.175 1.42 ;
RECT 1.345 1.18 2.335 1.63 ;
RECT 0.62 0.82 0.835 1.005 ;
RECT 0.595 0.35 0.835 0.82 ;
RECT 1.345 0.765 1.515 1.18 ;
RECT 1.115 0.52 1.515 0.765 ;
RECT 1.115 0.34 1.285 0.52 ;
END
END efs8hd_and2b_2
MACRO efs8hd_sdfxbp_2
CLASS CORE ;
FOREIGN efs8hd_sdfxbp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 12.88 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.975 0.105 2.305 0.555 ;
RECT 3.765 0.105 3.965 0.655 ;
RECT 5.715 0.105 6.085 0.73 ;
RECT 7.74 0.105 8.11 0.77 ;
RECT 8.895 0.105 9.085 0.87 ;
RECT 9.755 0.105 9.985 0.865 ;
RECT 10.69 0.105 11.02 1.005 ;
RECT 11.61 0.105 11.78 1.195 ;
RECT 0 -0.105 11.96 0.105 ;
LAYER met1 ;
RECT 0 -0.3 11.96 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 11.96 3.505 ;
RECT 0.52 2.67 0.85 3.295 ;
RECT 1.88 2.805 2.21 3.295 ;
RECT 3.76 2.705 3.93 3.295 ;
RECT 5.925 2.295 6.095 3.295 ;
RECT 7.805 2.67 8.11 3.295 ;
RECT 8.895 2.03 9.075 3.295 ;
RECT 9.765 2.02 9.935 3.295 ;
RECT 10.715 1.87 11.02 3.295 ;
RECT 11.61 1.745 11.78 3.295 ;
LAYER met1 ;
RECT 0 3.1 11.96 3.7 ;
END
END vpwr
PIN SCD
PORT
LAYER li1 ;
RECT 3.535 1.295 4.035 2.07 ;
END
END SCD
PIN D
PORT
LAYER li1 ;
RECT 2.46 1.695 2.795 2.105 ;
END
END D
PIN QN
PORT
LAYER li1 ;
RECT 11.19 1.805 11.44 2.905 ;
RECT 11.235 0.995 11.44 1.805 ;
RECT 11.19 0.33 11.44 0.995 ;
END
END QN
PIN SCE
PORT
LAYER li1 ;
RECT 1.78 0.98 1.95 2.105 ;
RECT 3.085 0.98 3.255 1.395 ;
RECT 1.78 0.77 3.255 0.98 ;
RECT 2.475 0.38 2.65 0.77 ;
END
END SCE
PIN CLK
PORT
LAYER li1 ;
RECT 0.095 1.22 0.445 2.03 ;
END
END CLK
PIN Q
PORT
LAYER li1 ;
RECT 9.255 1.915 9.585 3.04 ;
RECT 9.255 1.87 9.615 1.915 ;
RECT 9.41 1.79 9.615 1.87 ;
RECT 9.445 1.115 9.615 1.79 ;
RECT 9.41 1.03 9.615 1.115 ;
RECT 9.255 0.99 9.615 1.03 ;
RECT 9.255 0.32 9.585 0.99 ;
END
END Q
OBS
LAYER li1 ;
RECT 0.18 2.455 0.35 3.08 ;
RECT 0.18 2.245 0.845 2.455 ;
RECT 0.615 1.215 0.845 2.245 ;
RECT 0.615 1.005 0.81 1.215 ;
RECT 0.175 0.795 0.81 1.005 ;
RECT 1.02 0.895 1.245 3.08 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.245 0.895 ;
RECT 1.435 2.595 1.71 3.055 ;
RECT 2.695 2.805 3.59 3.02 ;
RECT 1.435 2.325 3.25 2.595 ;
RECT 1.435 0.555 1.605 2.325 ;
RECT 2.12 1.405 2.29 2.325 ;
RECT 3.08 2.105 3.25 2.325 ;
RECT 3.42 2.495 3.59 2.805 ;
RECT 4.205 2.58 4.485 3.05 ;
RECT 4.685 2.74 5.755 2.95 ;
RECT 4.205 2.495 4.375 2.58 ;
RECT 3.42 2.28 4.375 2.495 ;
RECT 3.08 1.695 3.275 2.105 ;
RECT 2.12 1.195 2.465 1.405 ;
RECT 4.205 1.08 4.375 2.28 ;
RECT 3.425 0.87 4.375 1.08 ;
RECT 4.545 1.295 4.785 2.38 ;
RECT 4.975 2.07 5.415 2.515 ;
RECT 5.585 1.97 5.755 2.74 ;
RECT 6.265 2.67 6.515 3.08 ;
RECT 6.74 2.705 7.625 2.92 ;
RECT 5.585 1.855 6.095 1.97 ;
RECT 5.295 1.645 6.095 1.855 ;
RECT 4.545 0.88 5.125 1.295 ;
RECT 3.425 0.555 3.595 0.87 ;
RECT 1.435 0.345 1.805 0.555 ;
RECT 2.82 0.345 3.595 0.555 ;
RECT 4.205 0.67 4.375 0.87 ;
RECT 5.295 0.67 5.465 1.645 ;
RECT 5.925 1.555 6.095 1.645 ;
RECT 5.635 1.33 5.805 1.37 ;
RECT 6.265 1.33 6.435 2.67 ;
RECT 6.605 1.555 6.795 2.455 ;
RECT 6.965 1.97 7.285 2.38 ;
RECT 5.635 0.955 6.435 1.33 ;
RECT 6.965 1.295 7.155 1.97 ;
RECT 7.455 1.755 7.625 2.705 ;
RECT 8.395 2.38 8.725 3.07 ;
RECT 7.795 1.97 8.725 2.38 ;
RECT 4.205 0.455 4.555 0.67 ;
RECT 4.725 0.455 5.465 0.67 ;
RECT 6.265 0.67 6.435 0.955 ;
RECT 6.605 0.88 7.155 1.295 ;
RECT 7.325 1.655 7.625 1.755 ;
RECT 8.54 1.655 8.725 1.97 ;
RECT 10.205 1.655 10.535 3.03 ;
RECT 7.325 1.245 8.37 1.655 ;
RECT 8.54 1.245 9.275 1.655 ;
RECT 10.205 1.245 11.065 1.655 ;
RECT 7.325 0.67 7.495 1.245 ;
RECT 8.54 1.03 8.725 1.245 ;
RECT 6.265 0.455 6.725 0.67 ;
RECT 6.955 0.455 7.495 0.67 ;
RECT 8.36 0.375 8.725 1.03 ;
RECT 10.205 0.43 10.455 1.245 ;
LAYER met1 ;
RECT 0.585 2.425 0.875 2.48 ;
RECT 5.145 2.425 5.435 2.48 ;
RECT 6.565 2.425 6.855 2.48 ;
RECT 0.585 2.25 6.855 2.425 ;
RECT 0.585 2.195 0.875 2.25 ;
RECT 5.145 2.195 5.435 2.25 ;
RECT 6.565 2.195 6.855 2.25 ;
RECT 0.99 1.15 1.28 1.205 ;
RECT 4.685 1.15 4.975 1.205 ;
RECT 6.58 1.15 6.87 1.205 ;
RECT 0.99 0.975 6.87 1.15 ;
RECT 0.99 0.92 1.28 0.975 ;
RECT 4.685 0.92 4.975 0.975 ;
RECT 6.58 0.92 6.87 0.975 ;
END
END efs8hd_sdfxbp_2
MACRO efs8hd_and4_2
CLASS CORE ;
FOREIGN efs8hd_and4_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN B
PORT
LAYER li1 ;
RECT 0.89 0.525 1.245 1.655 ;
END
END B
PIN C
PORT
LAYER li1 ;
RECT 1.42 1.63 1.59 1.655 ;
RECT 1.42 0.52 1.72 1.63 ;
END
END C
PIN X
PORT
LAYER li1 ;
RECT 2.735 1.87 3.075 3.08 ;
RECT 2.895 1.005 3.075 1.87 ;
RECT 2.735 0.425 3.075 1.005 ;
RECT 2.735 0.37 3.065 0.425 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.125 0.945 0.33 2.595 ;
END
END A
PIN D
PORT
LAYER li1 ;
RECT 1.9 0.52 2.16 1.655 ;
END
END D
PIN vgnd
PORT
LAYER li1 ;
RECT 2.33 0.105 2.565 1.115 ;
RECT 3.255 0.105 3.585 1.015 ;
RECT 2.33 0.085 3.585 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.095 3.295 3.575 3.315 ;
RECT 0.095 2.82 0.425 3.295 ;
RECT 1.07 2.395 1.4 3.295 ;
RECT 2.235 2.295 2.565 3.295 ;
RECT 3.245 2.295 3.575 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.6 2.08 0.85 3.08 ;
RECT 1.585 2.08 1.835 3.08 ;
RECT 0.5 1.87 2.555 2.08 ;
RECT 0.5 0.73 0.67 1.87 ;
RECT 2.33 1.645 2.555 1.87 ;
RECT 2.33 1.345 2.725 1.645 ;
RECT 0.175 0.32 0.67 0.73 ;
END
END efs8hd_and4_2
MACRO efs8hd_fill_2
CLASS CORE ;
FOREIGN efs8hd_fill_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 0.9200 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0000 -0.0850 0.9200 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 0.9200 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 0.9200 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 0.9200 3.7000 ;
END
END vpwr
END efs8hd_fill_2
MACRO efs8hd_clkinv_2
CLASS CORE ;
FOREIGN efs8hd_clkinv_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.76 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.155 2.04 0.41 3.045 ;
RECT 1.01 2.04 1.27 3.045 ;
RECT 0.155 1.825 1.755 2.04 ;
RECT 1.475 1.12 1.755 1.825 ;
RECT 1.025 0.905 1.755 1.12 ;
RECT 1.025 0.35 1.25 0.905 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.33 1.305 1.615 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.56 0.105 0.855 0.765 ;
RECT 1.42 0.105 1.75 0.695 ;
RECT 0.56 0.085 1.75 0.105 ;
RECT 0 -0.085 1.84 0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.84 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 1.84 3.485 ;
RECT 0.58 3.295 1.695 3.315 ;
RECT 0.58 2.25 0.84 3.295 ;
RECT 1.44 2.25 1.695 3.295 ;
LAYER met1 ;
RECT 0 3.1 1.84 3.7 ;
END
END vpwr
END efs8hd_clkinv_2
MACRO efs8hd_clkbuf_2
CLASS CORE ;
FOREIGN efs8hd_clkbuf_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.76 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.445 0.765 0.785 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 1.06 2.54 1.245 3.045 ;
RECT 1.06 2.32 1.725 2.54 ;
RECT 1.385 1.03 1.725 2.32 ;
RECT 1.04 0.82 1.725 1.03 ;
RECT 1.04 0.32 1.245 0.82 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.525 0.105 0.855 0.595 ;
RECT 1.415 0.105 1.75 0.605 ;
RECT 0.525 0.085 1.75 0.105 ;
RECT 0 -0.085 1.84 0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.84 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 1.84 3.485 ;
RECT 0.525 3.295 1.75 3.315 ;
RECT 0.525 2.32 0.855 3.295 ;
RECT 1.415 2.765 1.75 3.295 ;
LAYER met1 ;
RECT 0 3.1 1.84 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.08 0.355 3.045 ;
RECT 0.085 1.87 1.215 2.08 ;
RECT 0.085 0.625 0.255 1.87 ;
RECT 0.965 1.245 1.215 1.87 ;
RECT 0.085 0.295 0.345 0.625 ;
END
END efs8hd_clkbuf_2
MACRO efs8hd_or4b_2
CLASS CORE ;
FOREIGN efs8hd_or4b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 0.935 1.87 1.25 2.295 ;
RECT 0.935 0.99 1.105 1.87 ;
RECT 0.935 0.85 1.245 0.99 ;
RECT 0.935 0.845 1.25 0.85 ;
RECT 0.97 0.325 1.25 0.845 ;
END
END X
PIN DN
PORT
LAYER li1 ;
RECT 0.085 1.345 0.425 1.955 ;
END
END DN
PIN A
PORT
LAYER li1 ;
RECT 1.755 1.345 2.275 1.615 ;
END
END A
PIN C
PORT
LAYER li1 ;
RECT 2.445 1.345 3.55 1.615 ;
END
END C
PIN B
PORT
LAYER li1 ;
RECT 1.985 2.465 2.67 3.02 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.63 0.105 0.8 0.705 ;
RECT 1.435 0.105 1.815 0.605 ;
RECT 2.385 0.105 2.715 0.605 ;
RECT 3.225 0.105 3.555 0.73 ;
RECT 0.63 0.085 3.555 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.515 3.295 1.815 3.315 ;
RECT 0.515 2.92 0.845 3.295 ;
RECT 1.48 2.92 1.815 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 2.86 2.77 3.345 2.98 ;
RECT 0.51 2.495 1.715 2.705 ;
RECT 0.51 2.365 0.765 2.495 ;
RECT 0.085 2.125 0.765 2.365 ;
RECT 1.44 2.295 1.715 2.495 ;
RECT 2.86 2.295 3.03 2.77 ;
RECT 1.44 2.125 3.03 2.295 ;
RECT 0.595 1.13 0.765 2.125 ;
RECT 3.225 1.955 3.56 2.27 ;
RECT 1.42 1.815 3.56 1.955 ;
RECT 1.415 1.785 3.56 1.815 ;
RECT 1.415 1.78 1.665 1.785 ;
RECT 1.415 1.775 1.655 1.78 ;
RECT 1.415 1.765 1.645 1.775 ;
RECT 1.415 1.75 1.63 1.765 ;
RECT 1.415 1.74 1.625 1.75 ;
RECT 1.415 1.725 1.62 1.74 ;
RECT 1.415 1.715 1.61 1.725 ;
RECT 1.415 1.7 1.6 1.715 ;
RECT 1.415 1.655 1.585 1.7 ;
RECT 1.29 1.245 1.585 1.655 ;
RECT 0.085 0.92 0.765 1.13 ;
RECT 1.415 1.13 1.585 1.245 ;
RECT 1.415 0.92 3.055 1.13 ;
RECT 0.085 0.405 0.35 0.92 ;
RECT 1.985 0.38 2.155 0.92 ;
RECT 2.885 0.38 3.055 0.92 ;
END
END efs8hd_or4b_2
MACRO efs8hd_dlygate4sd3_1
CLASS CORE ;
FOREIGN efs8hd_dlygate4sd3_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.32 0.775 2.02 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 3.21 1.87 3.595 3.08 ;
RECT 3.315 1.03 3.595 1.87 ;
RECT 3.21 0.32 3.595 1.03 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.655 0.105 0.925 0.68 ;
RECT 2.715 0.105 3.04 0.68 ;
RECT 0 -0.105 3.68 0.105 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 3.68 3.505 ;
RECT 0.655 2.72 0.925 3.295 ;
RECT 2.715 2.72 3.04 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.2 2.505 0.485 3.08 ;
RECT 0.2 2.23 1.155 2.505 ;
RECT 0.945 1.105 1.155 2.23 ;
RECT 0.2 0.895 1.155 1.105 ;
RECT 1.325 2.02 1.725 3.08 ;
RECT 1.915 2.505 2.195 3.08 ;
RECT 1.915 2.23 3.04 2.505 ;
RECT 1.325 1.32 2.42 2.02 ;
RECT 2.59 1.655 3.04 2.23 ;
RECT 0.2 0.32 0.485 0.895 ;
RECT 1.325 0.32 1.725 1.32 ;
RECT 2.59 1.245 3.145 1.655 ;
RECT 2.59 1.105 3.04 1.245 ;
RECT 1.915 0.895 3.04 1.105 ;
RECT 1.915 0.32 2.195 0.895 ;
END
END efs8hd_dlygate4sd3_1
MACRO efs8hd_xnor3_2
CLASS CORE ;
FOREIGN efs8hd_xnor3_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 9.66 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 2.075 1.345 2.64 1.655 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 7.505 1.345 7.915 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 6.585 1.785 7.265 2.02 ;
RECT 6.585 1.245 6.855 1.785 ;
END
END B
PIN X
PORT
LAYER li1 ;
RECT 0.545 1.8 0.825 3.08 ;
RECT 0.545 1.155 0.79 1.8 ;
RECT 0.545 0.44 0.805 1.155 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.085 0.105 0.375 0.92 ;
RECT 0.975 0.105 1.225 0.655 ;
RECT 3.935 0.105 4.105 1.08 ;
RECT 7.935 0.105 8.105 0.705 ;
RECT 0.085 0.085 8.105 0.105 ;
RECT 0 -0.085 8.74 0.085 ;
LAYER met1 ;
RECT 0 -0.3 8.74 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 8.74 3.485 ;
RECT 0.085 3.295 8.19 3.315 ;
RECT 0.085 1.865 0.375 3.295 ;
RECT 0.995 2.77 1.33 3.295 ;
RECT 3.685 2.795 4.015 3.295 ;
RECT 7.855 2.845 8.19 3.295 ;
LAYER met1 ;
RECT 0 3.1 8.74 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.51 2.795 2.98 3.005 ;
RECT 4.35 2.845 7.445 3.055 ;
RECT 1.51 2.555 1.68 2.795 ;
RECT 4.35 2.58 4.52 2.845 ;
RECT 0.995 2.345 1.68 2.555 ;
RECT 2.02 2.37 4.52 2.58 ;
RECT 0.995 1.655 1.165 2.345 ;
RECT 1.395 1.92 2.98 2.13 ;
RECT 0.96 1.245 1.165 1.655 ;
RECT 0.99 1.08 1.165 1.245 ;
RECT 0.99 0.87 1.565 1.08 ;
RECT 1.395 0.53 1.565 0.87 ;
RECT 1.735 0.745 1.905 1.92 ;
RECT 2.81 1.655 2.98 1.92 ;
RECT 3.15 1.905 3.535 2.12 ;
RECT 3.255 1.72 3.535 1.905 ;
RECT 2.81 1.245 3.085 1.655 ;
RECT 2.205 0.995 2.585 1.13 ;
RECT 3.255 0.995 3.425 1.72 ;
RECT 3.705 1.505 3.875 2.37 ;
RECT 4.105 1.805 4.525 2.145 ;
RECT 2.205 0.78 3.425 0.995 ;
RECT 3.595 1.295 3.875 1.505 ;
RECT 3.595 0.57 3.765 1.295 ;
RECT 2.53 0.53 2.965 0.57 ;
RECT 1.395 0.32 2.965 0.53 ;
RECT 3.135 0.355 3.765 0.57 ;
RECT 4.285 0.52 4.525 1.805 ;
RECT 4.705 0.745 4.875 2.63 ;
RECT 5.045 1.075 5.215 2.845 ;
RECT 8.36 2.63 8.655 3.08 ;
RECT 5.395 2.02 5.81 2.555 ;
RECT 6.245 2.42 8.655 2.63 ;
RECT 5.395 1.805 6.075 2.02 ;
RECT 5.41 1.245 5.735 1.595 ;
RECT 5.045 0.9 5.395 1.075 ;
RECT 5.565 0.99 5.735 1.245 ;
RECT 5.085 0.855 5.395 0.9 ;
RECT 4.705 0.555 4.915 0.745 ;
RECT 5.085 0.725 5.455 0.855 ;
RECT 4.705 0.33 5.115 0.555 ;
RECT 5.285 0.4 5.455 0.725 ;
RECT 5.905 0.53 6.075 1.805 ;
RECT 6.245 0.745 6.415 2.42 ;
RECT 8.17 2.345 8.655 2.42 ;
RECT 7.435 1.87 8.255 2.13 ;
RECT 8.085 1.655 8.255 1.87 ;
RECT 7.025 1.18 7.335 1.595 ;
RECT 8.085 1.245 8.315 1.655 ;
RECT 7.025 0.915 7.23 1.18 ;
RECT 8.085 1.13 8.255 1.245 ;
RECT 7.515 0.94 8.255 1.13 ;
RECT 7.475 0.92 8.255 0.94 ;
RECT 6.685 0.53 7.15 0.58 ;
RECT 5.905 0.32 7.15 0.53 ;
RECT 7.475 0.37 7.765 0.92 ;
RECT 8.485 0.73 8.655 2.345 ;
RECT 8.355 0.32 8.655 0.73 ;
LAYER met1 ;
RECT 3.305 2 3.595 2.055 ;
RECT 5.605 2 5.895 2.055 ;
RECT 3.305 1.825 5.895 2 ;
RECT 3.305 1.77 3.595 1.825 ;
RECT 5.605 1.77 5.895 1.825 ;
RECT 4.225 1.19 4.515 1.205 ;
RECT 5.565 1.19 5.895 1.205 ;
RECT 4.225 1.15 5.895 1.19 ;
RECT 6.985 1.15 7.275 1.205 ;
RECT 4.225 0.975 7.275 1.15 ;
RECT 4.225 0.96 5.895 0.975 ;
RECT 4.225 0.92 4.515 0.96 ;
RECT 5.565 0.92 5.895 0.96 ;
RECT 6.985 0.92 7.275 0.975 ;
RECT 4.685 0.725 4.975 0.78 ;
RECT 7.445 0.725 7.735 0.78 ;
RECT 4.685 0.55 7.735 0.725 ;
RECT 4.685 0.495 4.975 0.55 ;
RECT 7.445 0.495 7.735 0.55 ;
END
END efs8hd_xnor3_2
MACRO efs8hd_dlxtn_2
CLASS CORE ;
FOREIGN efs8hd_dlxtn_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN D
PORT
LAYER li1 ;
RECT 1.48 1.195 1.81 1.655 ;
END
END D
PIN GATEN
PORT
LAYER li1 ;
RECT 0.085 1.23 0.33 2.03 ;
END
END GATEN
PIN Q
PORT
LAYER li1 ;
RECT 5.215 2.05 5.465 3.07 ;
RECT 5.215 1.87 5.5 2.05 ;
RECT 5.33 1.655 5.5 1.87 ;
RECT 5.33 1.245 5.895 1.655 ;
RECT 5.33 1.03 5.5 1.245 ;
RECT 5.215 0.855 5.5 1.03 ;
RECT 5.215 0.52 5.465 0.855 ;
END
END Q
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 5.98 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.975 2.295 2.29 3.295 ;
RECT 3.84 2.67 4.14 3.295 ;
RECT 4.76 1.87 5.045 3.295 ;
RECT 5.635 2.195 5.895 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.895 0.105 2.225 0.555 ;
RECT 3.76 0.105 4.09 1.03 ;
RECT 4.76 0.105 5.045 1.03 ;
RECT 5.635 0.105 5.895 0.69 ;
RECT 0 -0.105 5.98 0.105 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 0.175 2.245 0.78 2.455 ;
RECT 0.61 1.75 0.78 2.245 ;
RECT 1.015 2.105 1.24 3.08 ;
RECT 0.61 1.34 0.84 1.75 ;
RECT 0.61 1.005 0.78 1.34 ;
RECT 0.175 0.795 0.78 1.005 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.185 2.105 ;
RECT 1.475 2.08 1.805 3.02 ;
RECT 2.92 2.82 3.67 3.03 ;
RECT 1.475 1.87 2.16 2.08 ;
RECT 1.99 1.37 2.16 1.87 ;
RECT 2.49 1.695 2.775 2.505 ;
RECT 2.945 1.77 3.285 2.495 ;
RECT 1.99 0.98 2.36 1.37 ;
RECT 2.945 1.295 3.115 1.77 ;
RECT 3.5 1.655 3.67 2.82 ;
RECT 4.36 2.33 4.58 3.045 ;
RECT 3.86 1.92 4.58 2.33 ;
RECT 4.41 1.655 4.58 1.92 ;
RECT 3.5 1.455 4.22 1.655 ;
RECT 1.555 0.955 2.36 0.98 ;
RECT 1.555 0.77 2.16 0.955 ;
RECT 2.735 0.88 3.115 1.295 ;
RECT 3.35 1.245 4.22 1.455 ;
RECT 4.41 1.245 5.16 1.655 ;
RECT 1.555 0.43 1.725 0.77 ;
RECT 3.35 0.67 3.52 1.245 ;
RECT 4.41 1.03 4.58 1.245 ;
RECT 2.86 0.455 3.52 0.67 ;
RECT 4.36 0.52 4.58 1.03 ;
LAYER met1 ;
RECT 1.01 2.425 1.3 2.48 ;
RECT 2.43 2.425 2.72 2.48 ;
RECT 1.01 2.25 2.72 2.425 ;
RECT 1.01 2.195 1.3 2.25 ;
RECT 2.43 2.195 2.72 2.25 ;
RECT 0.55 2 0.84 2.055 ;
RECT 2.89 2 3.18 2.055 ;
RECT 0.55 1.825 3.18 2 ;
RECT 0.55 1.77 0.84 1.825 ;
RECT 2.89 1.77 3.18 1.825 ;
END
END efs8hd_dlxtn_2
MACRO efs8hd_dlclkp_2
CLASS CORE ;
FOREIGN efs8hd_dlclkp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 7.82 BY 3.4 ;
PIN GATE
PORT
LAYER li1 ;
RECT 1.53 1.795 2.215 2.105 ;
RECT 1.985 0.355 2.215 1.795 ;
END
END GATE
PIN GCLK
PORT
LAYER li1 ;
RECT 6.095 1.87 6.36 3.07 ;
RECT 6.165 0.745 6.36 1.87 ;
RECT 6.06 0.32 6.36 0.745 ;
END
END GCLK
PIN CLK
PORT
LAYER li1 ;
RECT 0.09 1.23 0.33 2.03 ;
RECT 5.21 1.38 5.485 1.795 ;
LAYER met1 ;
RECT 0.09 1.575 0.38 1.63 ;
RECT 5.15 1.575 5.44 1.63 ;
RECT 0.09 1.4 5.44 1.575 ;
RECT 0.09 1.345 0.38 1.4 ;
RECT 5.15 1.345 5.44 1.4 ;
END
END CLK
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.555 ;
RECT 1.485 0.105 1.815 1.13 ;
RECT 3.895 0.105 4.145 0.765 ;
RECT 5.675 0.105 5.845 0.68 ;
RECT 6.53 0.105 6.81 1.105 ;
RECT 0 -0.105 6.9 0.105 ;
LAYER met1 ;
RECT 0 -0.3 6.9 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 6.9 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.455 2.745 1.82 3.295 ;
RECT 3.4 2.67 3.7 3.295 ;
RECT 4.315 2.515 4.6 3.295 ;
RECT 5.575 2.665 5.925 3.295 ;
RECT 6.53 1.855 6.81 3.295 ;
LAYER met1 ;
RECT 0 3.1 6.9 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 1.015 2.53 1.24 3.08 ;
RECT 2.48 2.82 3.23 3.03 ;
RECT 0.175 2.245 0.78 2.455 ;
RECT 0.61 1.74 0.78 2.245 ;
RECT 1.015 2.32 2.645 2.53 ;
RECT 0.61 1.325 0.84 1.74 ;
RECT 0.61 0.98 0.78 1.325 ;
RECT 0.175 0.77 0.78 0.98 ;
RECT 0.175 0.325 0.345 0.77 ;
RECT 1.015 0.325 1.28 2.32 ;
RECT 2.395 1.23 2.645 2.32 ;
RECT 3.06 1.655 3.23 2.82 ;
RECT 3.915 2.33 4.135 3.045 ;
RECT 3.435 2.3 4.135 2.33 ;
RECT 5.01 2.37 5.34 3.08 ;
RECT 3.435 1.92 4.735 2.3 ;
RECT 5.01 2.155 5.925 2.37 ;
RECT 3.06 1.445 4.18 1.655 ;
RECT 3.555 1.245 4.18 1.445 ;
RECT 4.35 1.245 4.735 1.92 ;
RECT 5.755 1.655 5.925 2.155 ;
RECT 2.395 1.02 3.225 1.23 ;
RECT 3.555 0.7 3.725 1.245 ;
RECT 4.35 0.77 4.585 1.245 ;
RECT 5.755 1.17 5.995 1.655 ;
RECT 4.93 0.955 5.995 1.17 ;
RECT 4.93 0.775 5.15 0.955 ;
RECT 2.795 0.49 3.725 0.7 ;
RECT 4.315 0.32 4.585 0.77 ;
RECT 4.835 0.365 5.15 0.775 ;
END
END efs8hd_dlclkp_2
MACRO efs8hd_sdfsbp_2
CLASS CORE ;
FOREIGN efs8hd_sdfsbp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 15.18 BY 3.4 ;
PIN QN
PORT
LAYER li1 ;
RECT 11.46 0.32 11.855 3.08 ;
END
END QN
PIN Q
PORT
LAYER li1 ;
RECT 13.41 1.87 13.74 3.065 ;
RECT 13.515 1.03 13.74 1.87 ;
RECT 13.41 0.345 13.74 1.03 ;
END
END Q
PIN SCD
PORT
LAYER li1 ;
RECT 0.085 0.955 0.34 2.095 ;
END
END SCD
PIN D
PORT
LAYER li1 ;
RECT 1.05 0.955 1.335 2.095 ;
END
END D
PIN CLK
PORT
LAYER li1 ;
RECT 2.905 2.02 3.1 2.465 ;
RECT 2.905 1.32 3.565 2.02 ;
RECT 2.905 0.905 3.1 1.32 ;
END
END CLK
PIN SCE
PORT
LAYER li1 ;
RECT 0.54 0.955 0.82 2.095 ;
RECT 2.405 1.345 2.735 1.99 ;
LAYER met1 ;
RECT 0.545 1.575 0.835 1.63 ;
RECT 2.385 1.575 2.675 1.63 ;
RECT 0.545 1.4 2.675 1.575 ;
RECT 0.545 1.345 0.835 1.4 ;
RECT 2.385 1.345 2.675 1.4 ;
END
END SCE
PIN SETB
PORT
LAYER li1 ;
RECT 6.585 1.785 7.065 2.295 ;
RECT 8.88 1.905 9.935 2.155 ;
RECT 8.88 1.795 9.115 1.905 ;
LAYER met1 ;
RECT 6.58 2 6.87 2.055 ;
RECT 8.88 2 9.17 2.055 ;
RECT 6.58 1.825 9.17 2 ;
RECT 6.58 1.77 6.87 1.825 ;
RECT 8.88 1.77 9.17 1.825 ;
END
END SETB
PIN vgnd
PORT
LAYER li1 ;
RECT 0.085 0.105 0.7 0.745 ;
RECT 1.84 0.105 2.09 0.68 ;
RECT 2.7 0.105 3.1 0.695 ;
RECT 3.64 0.105 3.94 0.68 ;
RECT 5.665 0.105 6.165 0.58 ;
RECT 6.72 0.105 7.705 1.005 ;
RECT 10.035 0.105 10.285 0.68 ;
RECT 11.12 0.105 11.29 1.105 ;
RECT 12.025 0.105 12.315 1.105 ;
RECT 12.885 0.105 13.24 1.03 ;
RECT 13.91 0.105 14.175 1.105 ;
RECT 0.085 0.085 14.175 0.105 ;
RECT 0 -0.085 14.26 0.085 ;
LAYER met1 ;
RECT 0 -0.3 14.26 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 14.26 3.485 ;
RECT 0.515 3.295 14.175 3.315 ;
RECT 0.515 2.845 0.845 3.295 ;
RECT 2.705 2.675 3.1 3.295 ;
RECT 3.645 2.845 3.975 3.295 ;
RECT 6 2.845 6.33 3.295 ;
RECT 7.06 2.655 8.015 3.295 ;
RECT 9.16 2.795 9.49 3.295 ;
RECT 10.1 2.795 10.43 3.295 ;
RECT 11.08 1.855 11.29 3.295 ;
RECT 12.025 1.855 12.315 3.295 ;
RECT 12.885 2.045 13.24 3.295 ;
RECT 13.91 1.855 14.175 3.295 ;
LAYER met1 ;
RECT 0 3.1 14.26 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.595 0.345 3.08 ;
RECT 1.015 2.82 2.105 3.08 ;
RECT 1.015 2.595 1.185 2.82 ;
RECT 2.275 2.605 2.535 3.08 ;
RECT 0.085 2.305 1.185 2.595 ;
RECT 1.355 2.305 1.695 2.605 ;
RECT 1.505 0.9 1.695 2.305 ;
RECT 1.5 0.88 1.695 0.9 ;
RECT 1.98 2.2 2.535 2.605 ;
RECT 3.27 2.5 3.475 2.905 ;
RECT 4.145 2.67 4.44 3.08 ;
RECT 3.27 2.29 3.995 2.5 ;
RECT 1.98 1.13 2.235 2.2 ;
RECT 1.98 0.895 2.53 1.13 ;
RECT 3.735 1.105 3.995 2.29 ;
RECT 1.495 0.805 1.695 0.88 ;
RECT 1.495 0.745 1.67 0.805 ;
RECT 0.87 0.32 1.67 0.745 ;
RECT 2.26 0.32 2.53 0.895 ;
RECT 3.27 0.895 3.995 1.105 ;
RECT 4.165 1.775 4.44 2.67 ;
RECT 4.665 2.02 4.89 3.08 ;
RECT 5.06 2.67 5.805 3.08 ;
RECT 4.665 1.99 4.97 2.02 ;
RECT 4.715 1.805 4.97 1.99 ;
RECT 5.205 1.97 5.465 2.445 ;
RECT 4.165 1.365 4.49 1.775 ;
RECT 3.27 0.32 3.47 0.895 ;
RECT 4.165 0.73 4.335 1.365 ;
RECT 4.715 1.15 4.885 1.805 ;
RECT 5.635 1.745 5.805 2.67 ;
RECT 6.605 2.635 6.82 3.065 ;
RECT 8.185 2.655 8.99 3.075 ;
RECT 5.975 2.465 6.82 2.635 ;
RECT 8.82 2.58 8.99 2.655 ;
RECT 9.66 2.58 9.93 3.065 ;
RECT 5.975 1.97 6.145 2.465 ;
RECT 7.385 2.13 8.055 2.445 ;
RECT 5.14 1.655 5.805 1.745 ;
RECT 5.14 1.61 6.475 1.655 ;
RECT 7.355 1.61 7.705 1.655 ;
RECT 5.14 1.595 7.705 1.61 ;
RECT 4.11 0.32 4.335 0.73 ;
RECT 4.505 0.32 4.885 1.15 ;
RECT 5.055 1.44 7.705 1.595 ;
RECT 5.055 0.32 5.45 1.44 ;
RECT 5.62 1.005 6.015 1.27 ;
RECT 6.305 1.22 7.705 1.44 ;
RECT 7.885 1.12 8.055 2.13 ;
RECT 8.42 1.345 8.65 2.38 ;
RECT 8.82 2.37 10.43 2.58 ;
RECT 10.105 1.905 10.43 2.37 ;
RECT 10.6 1.695 10.845 3.08 ;
RECT 8.83 1.12 9.085 1.58 ;
RECT 5.62 0.795 6.55 1.005 ;
RECT 7.885 0.87 9.085 1.12 ;
RECT 9.285 1.48 10.91 1.695 ;
RECT 9.285 1.07 9.515 1.48 ;
RECT 9.685 1.055 10.56 1.27 ;
RECT 6.335 0.32 6.55 0.795 ;
RECT 9.685 0.645 9.855 1.055 ;
RECT 10.73 0.73 10.91 1.48 ;
RECT 8.465 0.345 9.855 0.645 ;
RECT 10.465 0.32 10.91 0.73 ;
RECT 12.53 1.655 12.715 3.08 ;
RECT 12.53 1.245 13.345 1.655 ;
RECT 12.53 0.32 12.715 1.245 ;
LAYER met1 ;
RECT 3.765 2.425 4.055 2.48 ;
RECT 5.2 2.425 5.49 2.48 ;
RECT 7.5 2.425 7.79 2.48 ;
RECT 3.765 2.25 7.79 2.425 ;
RECT 3.765 2.195 4.055 2.25 ;
RECT 5.2 2.195 5.49 2.25 ;
RECT 7.5 2.195 7.79 2.25 ;
RECT 1.465 2 1.755 2.055 ;
RECT 4.74 2 5.03 2.055 ;
RECT 1.465 1.825 5.03 2 ;
RECT 1.465 1.77 1.755 1.825 ;
RECT 4.74 1.77 5.03 1.825 ;
RECT 4.225 1.575 4.515 1.63 ;
RECT 8.42 1.575 8.71 1.63 ;
RECT 4.225 1.4 8.71 1.575 ;
RECT 4.225 1.345 4.515 1.4 ;
RECT 8.42 1.345 8.71 1.4 ;
END
END efs8hd_sdfsbp_2
MACRO efs8hd_buf_16
CLASS CORE ;
FOREIGN efs8hd_buf_16 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.04 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.345 2.485 1.615 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 3.035 2.02 3.365 3.08 ;
RECT 3.875 2.02 4.205 3.08 ;
RECT 4.715 2.02 5.045 3.08 ;
RECT 5.555 2.02 5.885 3.08 ;
RECT 6.395 2.02 6.725 3.08 ;
RECT 7.235 2.02 7.565 3.08 ;
RECT 8.075 2.02 8.405 3.08 ;
RECT 8.915 2.02 9.245 3.08 ;
RECT 9.76 2.02 10.035 2.95 ;
RECT 3.035 1.805 10.035 2.02 ;
RECT 9.655 1.13 10.035 1.805 ;
RECT 3.035 0.92 10.035 1.13 ;
RECT 3.035 0.325 3.365 0.92 ;
RECT 3.875 0.325 4.205 0.92 ;
RECT 4.715 0.325 5.045 0.92 ;
RECT 5.555 0.325 5.885 0.92 ;
RECT 6.395 0.325 6.725 0.92 ;
RECT 7.235 0.325 7.565 0.92 ;
RECT 8.075 0.325 8.405 0.92 ;
RECT 8.915 0.325 9.245 0.92 ;
RECT 9.76 0.455 10.035 0.92 ;
RECT 3.035 0.32 3.285 0.325 ;
RECT 3.955 0.32 4.125 0.325 ;
RECT 4.795 0.32 4.965 0.325 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.175 0.105 0.345 1.13 ;
RECT 1.015 0.105 1.185 0.705 ;
RECT 1.855 0.105 2.025 0.705 ;
RECT 2.695 0.105 2.865 0.705 ;
RECT 3.535 0.105 3.705 0.705 ;
RECT 4.375 0.105 4.545 0.705 ;
RECT 5.215 0.105 5.385 0.705 ;
RECT 6.055 0.105 6.225 0.705 ;
RECT 6.895 0.105 7.065 0.705 ;
RECT 7.735 0.105 7.905 0.705 ;
RECT 8.575 0.105 8.745 0.705 ;
RECT 9.415 0.105 9.585 0.705 ;
RECT 0.175 0.085 9.585 0.105 ;
RECT 0 -0.085 10.12 0.085 ;
LAYER met1 ;
RECT 0 -0.3 10.12 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 10.12 3.485 ;
RECT 0.175 3.295 9.585 3.315 ;
RECT 0.175 1.805 0.345 3.295 ;
RECT 1.015 2.295 1.185 3.295 ;
RECT 1.855 2.295 2.025 3.295 ;
RECT 2.695 2.295 2.865 3.295 ;
RECT 3.535 2.295 3.705 3.295 ;
RECT 4.375 2.295 4.545 3.295 ;
RECT 5.215 2.295 5.385 3.295 ;
RECT 6.055 2.295 6.225 3.295 ;
RECT 6.895 2.295 7.065 3.295 ;
RECT 7.735 2.295 7.905 3.295 ;
RECT 8.575 2.295 8.745 3.295 ;
RECT 9.415 2.295 9.585 3.295 ;
LAYER met1 ;
RECT 0 3.1 10.12 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.515 2.02 0.845 3.08 ;
RECT 1.355 2.02 1.685 3.08 ;
RECT 2.195 2.02 2.525 3.08 ;
RECT 0.515 1.805 2.865 2.02 ;
RECT 2.69 1.595 2.865 1.805 ;
RECT 2.69 1.345 9.41 1.595 ;
RECT 2.69 1.13 2.865 1.345 ;
RECT 0.515 0.92 2.865 1.13 ;
RECT 0.515 0.325 0.845 0.92 ;
RECT 1.355 0.325 1.685 0.92 ;
RECT 2.195 0.325 2.525 0.92 ;
END
END efs8hd_buf_16
MACRO efs8hd_inv_16
CLASS CORE ;
FOREIGN efs8hd_inv_16 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 8.28 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.58 2.08 0.91 3.08 ;
RECT 1.42 2.08 1.75 3.08 ;
RECT 2.26 2.08 2.59 3.08 ;
RECT 3.1 2.08 3.43 3.08 ;
RECT 3.94 2.08 4.27 3.08 ;
RECT 4.78 2.08 5.11 3.08 ;
RECT 5.62 2.08 5.95 3.08 ;
RECT 6.46 2.08 6.79 3.08 ;
RECT 0.58 1.87 6.79 2.08 ;
RECT 6.46 1.13 6.79 1.87 ;
RECT 0.58 0.895 6.79 1.13 ;
RECT 0.58 0.32 0.91 0.895 ;
RECT 1.42 0.32 1.75 0.895 ;
RECT 2.26 0.32 2.59 0.895 ;
RECT 3.1 0.32 3.43 0.895 ;
RECT 3.94 0.32 4.27 0.895 ;
RECT 4.78 0.32 5.11 0.895 ;
RECT 5.62 0.32 5.95 0.895 ;
RECT 6.46 0.32 6.79 0.895 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.345 5.525 1.645 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.18 0.105 0.41 1.105 ;
RECT 1.08 0.105 1.25 0.68 ;
RECT 1.92 0.105 2.09 0.68 ;
RECT 2.76 0.105 2.93 0.68 ;
RECT 3.6 0.105 3.77 0.68 ;
RECT 4.44 0.105 4.61 0.68 ;
RECT 5.28 0.105 5.45 0.68 ;
RECT 6.12 0.105 6.29 0.68 ;
RECT 6.96 0.105 7.17 1.105 ;
RECT 0.18 0.085 7.17 0.105 ;
RECT 0 -0.085 7.36 0.085 ;
LAYER met1 ;
RECT 0 -0.3 7.36 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 7.36 3.485 ;
RECT 0.2 3.295 7.17 3.315 ;
RECT 0.2 1.855 0.41 3.295 ;
RECT 1.08 2.295 1.25 3.295 ;
RECT 1.92 2.295 2.09 3.295 ;
RECT 2.76 2.295 2.93 3.295 ;
RECT 3.6 2.295 3.77 3.295 ;
RECT 4.44 2.295 4.61 3.295 ;
RECT 5.28 2.295 5.45 3.295 ;
RECT 6.12 2.295 6.29 3.295 ;
RECT 6.96 2.295 7.17 3.295 ;
LAYER met1 ;
RECT 0 3.1 7.36 3.7 ;
END
END vpwr
END efs8hd_inv_16
MACRO efs8hd_tapvpwrvgnd_1
CLASS CORE ;
FOREIGN efs8hd_tapvpwrvgnd_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 0.4600 BY 3.4000 ;
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 0.4600 3.4850 ;
RECT 0.0850 1.8350 0.3750 3.3150 ;
LAYER met1 ;
RECT 0.0000 3.1000 0.4600 3.7000 ;
END
END vpwr
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 0.0850 0.3750 1.0100 ;
RECT 0.0000 -0.0850 0.4600 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 0.4600 0.3000 ;
END
END vgnd
END efs8hd_tapvpwrvgnd_1
MACRO efs8hd_einvp_2
CLASS CORE ;
FOREIGN efs8hd_einvp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.945 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 2.85 0.955 3.135 2.015 ;
END
END A
PIN TE
PORT
LAYER li1 ;
RECT 0.085 1.24 0.33 2.015 ;
END
END TE
PIN Z
PORT
LAYER li1 ;
RECT 2.35 0.74 2.68 2.655 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.085 0.875 0.605 ;
RECT 1.41 0.085 1.77 0.605 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.515 2.655 0.875 3.315 ;
RECT 1.455 2.365 1.785 3.315 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.44 0.345 3.08 ;
RECT 0.085 2.23 0.875 2.44 ;
RECT 0.5 1.655 0.875 2.23 ;
RECT 1.045 2.155 1.285 3.08 ;
RECT 1.985 2.865 3.135 3.08 ;
RECT 1.985 2.155 2.155 2.865 ;
RECT 2.85 2.23 3.135 2.865 ;
RECT 1.045 1.94 2.155 2.155 ;
RECT 0.5 1.24 2.18 1.655 ;
RECT 0.5 1.03 0.875 1.24 ;
RECT 0.085 0.815 0.875 1.03 ;
RECT 1.045 0.815 2.18 1.03 ;
RECT 0.085 0.315 0.345 0.815 ;
RECT 1.045 0.315 1.24 0.815 ;
RECT 1.94 0.53 2.18 0.815 ;
RECT 2.85 0.53 3.135 0.74 ;
RECT 1.94 0.315 3.135 0.53 ;
END
END efs8hd_einvp_2
MACRO efs8hd_einvn_4
CLASS CORE ;
FOREIGN efs8hd_einvn_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 7.245 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 4.53 0.775 4.975 1.655 ;
END
END A
PIN TEB
PORT
LAYER li1 ;
RECT 0.085 1.24 0.345 1.655 ;
END
END TEB
PIN Z
PORT
LAYER li1 ;
RECT 3.19 1.85 3.52 2.59 ;
RECT 4.03 1.85 4.36 2.59 ;
RECT 3.19 0.775 4.36 1.85 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.085 0.845 0.605 ;
RECT 1.455 0.085 1.785 0.605 ;
RECT 2.295 0.085 2.625 0.605 ;
RECT 0 -0.085 5.06 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.06 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.06 3.485 ;
RECT 0.515 2.29 0.845 3.315 ;
RECT 1.41 2.29 1.74 3.315 ;
RECT 2.25 2.29 2.64 3.315 ;
LAYER met1 ;
RECT 0 3.1 5.06 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.08 0.345 3.08 ;
RECT 1.015 2.08 1.24 3.08 ;
RECT 1.91 2.08 2.08 3.08 ;
RECT 2.81 2.865 4.975 3.08 ;
RECT 2.81 2.08 3.02 2.865 ;
RECT 0.085 1.865 0.845 2.08 ;
RECT 1.015 1.865 3.02 2.08 ;
RECT 3.69 2.06 3.86 2.865 ;
RECT 4.53 2.06 4.975 2.865 ;
RECT 0.515 1.655 0.845 1.865 ;
RECT 0.515 1.24 3.02 1.655 ;
RECT 0.515 1.03 0.845 1.24 ;
RECT 0.085 0.815 0.845 1.03 ;
RECT 1.015 0.815 2.995 1.03 ;
RECT 0.085 0.315 0.345 0.815 ;
RECT 1.015 0.315 1.285 0.815 ;
RECT 1.955 0.315 2.125 0.815 ;
RECT 2.825 0.56 2.995 0.815 ;
RECT 2.825 0.315 4.975 0.56 ;
END
END efs8hd_einvn_4
MACRO efs8hd_a2111oi_2
CLASS CORE ;
FOREIGN efs8hd_a2111oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN D1
PORT
LAYER li1 ;
RECT 0.605 1.345 1.425 1.615 ;
END
END D1
PIN B1
PORT
LAYER li1 ;
RECT 1.985 1.105 2.855 1.615 ;
END
END B1
PIN A2
PORT
LAYER li1 ;
RECT 3.825 1.105 4.725 1.615 ;
END
END A2
PIN C1
PORT
LAYER li1 ;
RECT 0.125 1.785 1.8 2.1 ;
RECT 0.125 1.305 0.435 1.785 ;
RECT 1.615 1.62 1.8 1.785 ;
RECT 1.615 1.29 1.815 1.62 ;
END
END C1
PIN Y
PORT
LAYER li1 ;
RECT 0.9 2.315 2.14 2.63 ;
RECT 1.97 2.03 2.14 2.315 ;
RECT 1.97 1.805 3.255 2.03 ;
RECT 3.025 0.935 3.255 1.805 ;
RECT 0.095 0.765 5.355 0.935 ;
RECT 0.095 0.32 0.38 0.765 ;
RECT 1.015 0.32 1.295 0.765 ;
RECT 1.965 0.32 2.295 0.765 ;
RECT 2.965 0.345 3.295 0.765 ;
RECT 5.02 0.37 5.355 0.765 ;
END
END Y
PIN A1
PORT
LAYER li1 ;
RECT 3.465 1.785 5.29 2.095 ;
RECT 3.465 1.23 3.655 1.785 ;
RECT 4.895 1.245 5.29 1.785 ;
END
END A1
PIN vgnd
PORT
LAYER li1 ;
RECT 0.55 0.105 0.845 0.595 ;
RECT 1.465 0.105 1.795 0.555 ;
RECT 2.465 0.105 2.795 0.555 ;
RECT 4.125 0.105 4.455 0.555 ;
RECT 0.55 0.085 4.455 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.52 3.485 ;
RECT 3.69 3.295 4.9 3.315 ;
RECT 3.69 2.845 4.02 3.295 ;
RECT 4.57 2.845 4.9 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.095 2.87 2.985 3.08 ;
RECT 0.095 2.845 2.185 2.87 ;
RECT 0.095 2.34 0.46 2.845 ;
RECT 2.815 2.67 2.985 2.87 ;
RECT 3.155 2.62 3.52 3.08 ;
RECT 4.19 2.63 4.4 3.08 ;
RECT 5.07 2.63 5.4 3.08 ;
RECT 4.19 2.62 5.4 2.63 ;
RECT 2.31 2.455 2.64 2.575 ;
RECT 3.155 2.455 5.4 2.62 ;
RECT 2.31 2.305 5.4 2.455 ;
RECT 2.31 2.245 3.335 2.305 ;
END
END efs8hd_a2111oi_2
MACRO efs8hd_buf_12
CLASS CORE ;
FOREIGN efs8hd_buf_12 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 8.28 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.095 0.105 0.425 0.705 ;
RECT 0.935 0.105 1.265 0.705 ;
RECT 1.775 0.105 2.105 0.705 ;
RECT 2.615 0.105 2.945 0.705 ;
RECT 3.455 0.105 3.785 0.705 ;
RECT 4.295 0.105 4.625 0.705 ;
RECT 5.135 0.105 5.465 0.705 ;
RECT 5.975 0.105 6.305 0.705 ;
RECT 6.815 0.105 7.145 1.105 ;
RECT 0.095 0.085 7.145 0.105 ;
RECT 0 -0.085 7.36 0.085 ;
RECT 0.57 -0.105 0.74 -0.085 ;
LAYER met1 ;
RECT 0 -0.3 7.36 0.3 ;
END
END vgnd
PIN X
PORT
LAYER li1 ;
RECT 2.275 2.02 2.445 3.08 ;
RECT 3.115 2.02 3.285 3.08 ;
RECT 3.955 2.02 4.125 3.08 ;
RECT 4.795 2.02 4.965 3.08 ;
RECT 5.635 2.02 5.805 3.08 ;
RECT 6.475 2.02 6.645 3.08 ;
RECT 2.275 1.805 6.645 2.02 ;
RECT 4.71 1.13 6.645 1.805 ;
RECT 2.275 0.92 6.645 1.13 ;
RECT 2.275 0.32 2.445 0.92 ;
RECT 3.115 0.32 3.285 0.92 ;
RECT 3.955 0.32 4.125 0.92 ;
RECT 4.795 0.32 4.965 0.92 ;
RECT 5.635 0.32 5.805 0.92 ;
RECT 6.475 0.32 6.645 0.92 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.135 1.345 1.66 1.615 ;
END
END A
PIN vpwr
PORT
LAYER li1 ;
RECT 0.57 3.485 0.74 3.505 ;
RECT 0 3.315 7.36 3.485 ;
RECT 0.175 3.295 7.145 3.315 ;
RECT 0.175 2.295 0.345 3.295 ;
RECT 1.015 2.295 1.185 3.295 ;
RECT 1.855 2.295 2.025 3.295 ;
RECT 2.615 2.295 2.945 3.295 ;
RECT 3.455 2.295 3.785 3.295 ;
RECT 4.295 2.295 4.625 3.295 ;
RECT 5.135 2.295 5.465 3.295 ;
RECT 5.975 2.295 6.305 3.295 ;
RECT 6.815 1.855 7.145 3.295 ;
LAYER met1 ;
RECT 0 3.1 7.36 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.515 2.02 0.845 3.08 ;
RECT 1.355 2.02 1.685 3.08 ;
RECT 0.515 1.805 2.015 2.02 ;
RECT 1.84 1.555 2.015 1.805 ;
RECT 1.84 1.345 4.465 1.555 ;
RECT 1.84 1.13 2.015 1.345 ;
RECT 0.595 0.92 2.015 1.13 ;
RECT 0.595 0.32 0.765 0.92 ;
RECT 1.435 0.325 1.605 0.92 ;
END
END efs8hd_buf_12
MACRO efs8hd_o221ai_2
CLASS CORE ;
FOREIGN efs8hd_o221ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN C1
PORT
LAYER li1 ;
RECT 0.085 1.345 0.435 1.615 ;
END
END C1
PIN B1
PORT
LAYER li1 ;
RECT 1.02 1.805 3.26 2.02 ;
RECT 1.02 1.345 2.035 1.805 ;
RECT 2.925 1.345 3.26 1.805 ;
END
END B1
PIN B2
PORT
LAYER li1 ;
RECT 2.205 1.345 2.755 1.615 ;
END
END B2
PIN A2
PORT
LAYER li1 ;
RECT 3.825 1.345 4.475 1.615 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 3.43 1.785 4.815 2.02 ;
RECT 3.43 1.305 3.655 1.785 ;
RECT 4.645 1.615 4.815 1.785 ;
RECT 4.645 1.345 5.435 1.615 ;
END
END A1
PIN Y
PORT
LAYER li1 ;
RECT 0.56 2.445 0.81 3.08 ;
RECT 2.34 2.445 2.59 2.655 ;
RECT 4.1 2.445 4.35 2.655 ;
RECT 0.56 2.23 4.35 2.445 ;
RECT 0.56 1.805 0.845 2.23 ;
RECT 0.605 1.08 0.845 1.805 ;
RECT 0.515 0.805 0.845 1.08 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 3.72 0.105 3.89 0.695 ;
RECT 4.56 0.105 4.73 0.695 ;
RECT 3.72 0.085 4.73 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.52 3.485 ;
RECT 0.14 3.295 5.19 3.315 ;
RECT 0.14 1.82 0.39 3.295 ;
RECT 0.98 2.655 1.75 3.295 ;
RECT 3.18 2.655 3.51 3.295 ;
RECT 4.985 1.82 5.19 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.92 2.87 3.01 3.08 ;
RECT 1.92 2.655 2.17 2.87 ;
RECT 2.76 2.655 3.01 2.87 ;
RECT 3.68 2.87 4.77 3.08 ;
RECT 3.68 2.655 3.93 2.87 ;
RECT 4.52 2.23 4.77 2.87 ;
RECT 0.1 0.595 0.345 1.12 ;
RECT 1.015 0.805 3.05 1.13 ;
RECT 3.22 0.92 5.23 1.13 ;
RECT 1.015 0.595 1.27 0.805 ;
RECT 3.22 0.595 3.55 0.92 ;
RECT 0.1 0.32 1.27 0.595 ;
RECT 1.455 0.32 3.55 0.595 ;
RECT 4.06 0.905 5.23 0.92 ;
RECT 4.06 0.32 4.39 0.905 ;
RECT 4.9 0.32 5.23 0.905 ;
END
END efs8hd_o221ai_2
MACRO efs8hd_a221oi_2
CLASS CORE ;
FOREIGN efs8hd_a221oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN C1
PORT
LAYER li1 ;
RECT 0.09 1.345 0.42 2.02 ;
END
END C1
PIN Y
PORT
LAYER li1 ;
RECT 0.595 1.13 0.845 2.655 ;
RECT 0.595 1.08 4.395 1.13 ;
RECT 0.515 0.905 4.395 1.08 ;
RECT 0.515 0.38 0.855 0.905 ;
RECT 2.285 0.805 2.635 0.905 ;
RECT 4.065 0.805 4.395 0.905 ;
END
END Y
PIN B2
PORT
LAYER li1 ;
RECT 1.505 1.785 3.265 2.02 ;
RECT 1.505 1.345 2.04 1.785 ;
RECT 2.925 1.345 3.265 1.785 ;
END
END B2
PIN B1
PORT
LAYER li1 ;
RECT 2.21 1.345 2.755 1.615 ;
END
END B1
PIN A1
PORT
LAYER li1 ;
RECT 3.825 1.345 4.48 1.615 ;
END
END A1
PIN A2
PORT
LAYER li1 ;
RECT 3.435 1.785 4.82 2.02 ;
RECT 3.435 1.305 3.655 1.785 ;
RECT 4.65 1.615 4.82 1.785 ;
RECT 4.65 1.345 5.435 1.615 ;
END
END A2
PIN vgnd
PORT
LAYER li1 ;
RECT 0.105 0.105 0.345 1.12 ;
RECT 1.025 0.105 1.705 0.695 ;
RECT 3.27 0.105 3.44 0.695 ;
RECT 4.985 0.105 5.155 1.13 ;
RECT 0.105 0.085 5.155 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.52 3.485 ;
RECT 3.685 3.295 4.775 3.315 ;
RECT 3.685 2.655 3.935 3.295 ;
RECT 4.525 2.655 4.775 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.87 1.275 3.08 ;
RECT 0.09 2.245 0.425 2.87 ;
RECT 1.015 2.445 1.275 2.87 ;
RECT 1.505 2.87 3.475 3.08 ;
RECT 1.505 2.655 1.755 2.87 ;
RECT 2.345 2.655 2.595 2.87 ;
RECT 1.925 2.445 2.175 2.655 ;
RECT 2.765 2.445 3.015 2.655 ;
RECT 1.015 2.23 3.015 2.445 ;
RECT 3.225 2.445 3.475 2.87 ;
RECT 4.105 2.445 4.355 3.08 ;
RECT 4.99 2.445 5.195 3.08 ;
RECT 3.225 2.23 5.195 2.445 ;
RECT 1.015 1.87 1.275 2.23 ;
RECT 4.99 1.82 5.195 2.23 ;
RECT 4.565 0.595 4.815 1.13 ;
RECT 1.875 0.32 3.055 0.595 ;
RECT 3.645 0.32 4.815 0.595 ;
END
END efs8hd_a221oi_2
MACRO efs8hd_inv_12
CLASS CORE ;
FOREIGN efs8hd_inv_12 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.68 2.08 1.01 3.08 ;
RECT 1.52 2.08 1.85 3.08 ;
RECT 2.36 2.08 2.69 3.08 ;
RECT 3.2 2.08 3.53 3.08 ;
RECT 4.04 2.08 4.37 3.08 ;
RECT 4.88 2.08 5.21 3.08 ;
RECT 0.085 1.87 5.895 2.08 ;
RECT 0.085 1.13 0.51 1.87 ;
RECT 5.545 1.13 5.895 1.87 ;
RECT 0.085 0.895 5.895 1.13 ;
RECT 0.68 0.32 1.01 0.895 ;
RECT 1.52 0.32 1.85 0.895 ;
RECT 2.36 0.32 2.69 0.895 ;
RECT 3.2 0.32 3.53 0.895 ;
RECT 4.04 0.32 4.37 0.895 ;
RECT 4.88 0.32 5.21 0.895 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.68 1.345 5.27 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.255 0.105 0.51 0.68 ;
RECT 1.18 0.105 1.35 0.68 ;
RECT 2.02 0.105 2.19 0.68 ;
RECT 2.86 0.105 3.03 0.68 ;
RECT 3.7 0.105 3.87 0.68 ;
RECT 4.54 0.105 4.71 0.68 ;
RECT 5.555 0.105 5.895 0.68 ;
RECT 0.255 0.085 5.895 0.105 ;
RECT 0 -0.085 5.98 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.98 3.485 ;
RECT 0.255 3.295 5.895 3.315 ;
RECT 0.255 2.295 0.51 3.295 ;
RECT 1.18 2.295 1.35 3.295 ;
RECT 2.02 2.295 2.19 3.295 ;
RECT 2.86 2.295 3.03 3.295 ;
RECT 3.7 2.295 3.87 3.295 ;
RECT 4.54 2.295 4.71 3.295 ;
RECT 5.555 2.295 5.895 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
END efs8hd_inv_12
MACRO efs8hd_o21bai_2
CLASS CORE ;
FOREIGN efs8hd_o21bai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN B1N
PORT
LAYER li1 ;
RECT 0.085 1.105 0.495 1.655 ;
END
END B1N
PIN A2
PORT
LAYER li1 ;
RECT 1.95 1.345 3.09 1.615 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 3.26 1.345 4.055 1.615 ;
END
END A1
PIN Y
PORT
LAYER li1 ;
RECT 1.085 2.02 1.255 3.08 ;
RECT 2.405 2.02 2.65 2.655 ;
RECT 1.085 1.805 2.65 2.02 ;
RECT 1.525 1.13 1.78 1.805 ;
RECT 1.525 0.805 1.855 1.13 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 0.18 0.105 0.35 0.935 ;
RECT 2.445 0.105 2.615 0.695 ;
RECT 3.285 0.105 3.455 0.695 ;
RECT 0.18 0.085 3.455 0.105 ;
RECT 0 -0.085 4.14 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.14 3.485 ;
RECT 0.585 3.295 3.535 3.315 ;
RECT 0.585 2.345 0.915 3.295 ;
RECT 1.47 2.245 1.72 3.295 ;
RECT 3.205 2.295 3.535 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.955 2.87 3.035 3.08 ;
RECT 0.18 2.08 0.35 2.395 ;
RECT 1.955 2.245 2.235 2.87 ;
RECT 2.865 2.08 3.035 2.87 ;
RECT 3.705 2.08 3.98 3.08 ;
RECT 0.18 1.87 0.865 2.08 ;
RECT 0.695 1.555 0.865 1.87 ;
RECT 2.865 1.82 3.98 2.08 ;
RECT 0.695 1.345 1.335 1.555 ;
RECT 0.695 0.97 0.865 1.345 ;
RECT 0.6 0.555 0.865 0.97 ;
RECT 1.075 0.595 1.355 1.13 ;
RECT 2.025 0.905 3.98 1.13 ;
RECT 2.025 0.595 2.275 0.905 ;
RECT 1.075 0.32 2.275 0.595 ;
RECT 2.785 0.32 3.115 0.905 ;
RECT 3.625 0.33 3.98 0.905 ;
END
END efs8hd_o21bai_2
MACRO efs8hd_xor3_4
CLASS CORE ;
FOREIGN efs8hd_xor3_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.04 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 2.88 1.105 3.535 1.655 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 8.425 1.345 9.055 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 7.505 1.785 8.285 2.02 ;
RECT 7.505 1.245 7.875 1.785 ;
END
END B
PIN X
PORT
LAYER li1 ;
RECT 0.695 2.555 0.865 3.08 ;
RECT 1.535 2.555 1.705 3.08 ;
RECT 0.695 1.82 1.705 2.555 ;
RECT 0.695 1.785 1.42 1.82 ;
RECT 1.105 1.155 1.42 1.785 ;
RECT 0.595 1.04 1.535 1.155 ;
RECT 0.595 0.825 1.605 1.04 ;
RECT 0.595 0.44 0.765 0.825 ;
RECT 1.435 0.44 1.605 0.825 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.175 0.105 0.345 0.68 ;
RECT 0.935 0.105 1.265 0.58 ;
RECT 1.855 0.105 2.025 0.655 ;
RECT 0.175 0.095 2.025 0.105 ;
RECT 4.88 0.105 5.12 1.105 ;
RECT 8.995 0.105 9.165 0.705 ;
RECT 4.88 0.095 9.165 0.105 ;
RECT 0.175 0.085 9.165 0.095 ;
RECT 0 -0.085 10.12 0.085 ;
LAYER met1 ;
RECT 0 -0.3 10.12 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 10.12 3.485 ;
RECT 0.275 3.295 9.245 3.315 ;
RECT 0.275 2.67 0.445 3.295 ;
RECT 1.035 2.77 1.365 3.295 ;
RECT 1.875 2.77 2.205 3.295 ;
RECT 4.725 2.755 5.035 3.295 ;
RECT 8.915 2.845 9.245 3.295 ;
LAYER met1 ;
RECT 0 3.1 10.12 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 2.375 2.795 3.915 3.005 ;
RECT 4.13 2.795 4.555 3.005 ;
RECT 2.375 2.555 2.545 2.795 ;
RECT 4.385 2.58 4.555 2.795 ;
RECT 5.37 2.845 8.465 3.055 ;
RECT 5.37 2.58 5.54 2.845 ;
RECT 1.875 2.345 2.545 2.555 ;
RECT 2.89 2.37 4.215 2.58 ;
RECT 4.385 2.37 5.54 2.58 ;
RECT 1.875 1.655 2.045 2.345 ;
RECT 2.37 1.92 3.875 2.13 ;
RECT 1.82 1.205 2.045 1.655 ;
RECT 1.875 1.08 2.045 1.205 ;
RECT 1.875 0.87 2.365 1.08 ;
RECT 2.195 0.53 2.365 0.87 ;
RECT 2.54 0.745 2.71 1.92 ;
RECT 3.705 1.655 3.875 1.92 ;
RECT 4.045 2.12 4.215 2.37 ;
RECT 4.045 1.905 4.555 2.12 ;
RECT 4.2 1.72 4.555 1.905 ;
RECT 3.705 1.245 4.03 1.655 ;
RECT 2.99 0.765 4.03 0.935 ;
RECT 3.41 0.53 3.69 0.595 ;
RECT 2.195 0.265 3.69 0.53 ;
RECT 3.86 0.53 4.03 0.765 ;
RECT 4.2 0.745 4.37 1.72 ;
RECT 4.725 1.505 4.895 2.37 ;
RECT 5.125 1.805 5.54 2.145 ;
RECT 4.54 1.315 4.895 1.505 ;
RECT 4.54 1.305 4.89 1.315 ;
RECT 4.54 1.3 4.88 1.305 ;
RECT 4.54 1.295 4.865 1.3 ;
RECT 4.54 0.53 4.71 1.295 ;
RECT 3.86 0.32 4.71 0.53 ;
RECT 5.3 0.52 5.54 1.805 ;
RECT 5.715 0.745 5.885 2.63 ;
RECT 6.075 1.115 6.245 2.845 ;
RECT 9.415 2.63 9.735 3.08 ;
RECT 6.415 2.02 6.83 2.555 ;
RECT 7.165 2.42 9.735 2.63 ;
RECT 6.415 1.805 6.995 2.02 ;
RECT 6.43 1.245 6.655 1.595 ;
RECT 6.075 0.9 6.315 1.115 ;
RECT 6.485 0.99 6.655 1.245 ;
RECT 6.11 0.83 6.315 0.9 ;
RECT 6.11 0.755 6.4 0.83 ;
RECT 5.715 0.645 5.935 0.745 ;
RECT 5.715 0.315 5.98 0.645 ;
RECT 6.15 0.4 6.4 0.755 ;
RECT 6.825 0.53 6.995 1.805 ;
RECT 7.165 0.745 7.335 2.42 ;
RECT 9.19 2.345 9.735 2.42 ;
RECT 8.455 1.87 9.395 2.13 ;
RECT 8.045 1.18 8.255 1.595 ;
RECT 8.045 0.915 8.25 1.18 ;
RECT 9.225 1.13 9.395 1.87 ;
RECT 8.535 0.94 9.395 1.13 ;
RECT 8.495 0.92 9.395 0.94 ;
RECT 7.705 0.53 8.17 0.58 ;
RECT 6.825 0.32 8.17 0.53 ;
RECT 8.495 0.37 8.785 0.92 ;
RECT 9.565 0.73 9.735 2.345 ;
RECT 9.415 0.32 9.735 0.73 ;
LAYER met1 ;
RECT 4.325 2 4.615 2.055 ;
RECT 6.625 2 6.915 2.055 ;
RECT 4.325 1.825 6.915 2 ;
RECT 4.325 1.77 4.615 1.825 ;
RECT 6.625 1.77 6.915 1.825 ;
RECT 5.245 1.19 5.535 1.205 ;
RECT 6.485 1.19 6.915 1.205 ;
RECT 5.245 1.15 6.915 1.19 ;
RECT 8.005 1.15 8.295 1.205 ;
RECT 5.245 0.975 8.295 1.15 ;
RECT 5.245 0.96 6.915 0.975 ;
RECT 5.245 0.92 5.535 0.96 ;
RECT 6.485 0.92 6.915 0.96 ;
RECT 8.005 0.92 8.295 0.975 ;
RECT 5.705 0.725 5.995 0.78 ;
RECT 8.465 0.725 8.755 0.78 ;
RECT 5.705 0.55 8.755 0.725 ;
RECT 5.705 0.495 5.995 0.55 ;
RECT 8.465 0.495 8.755 0.55 ;
END
END efs8hd_xor3_4
MACRO efs8hd_decap_3
CLASS CORE ;
FOREIGN efs8hd_decap_3 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 1.3800 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 1.0400 0.6050 1.7150 ;
RECT 0.0850 0.0850 1.2950 1.0400 ;
RECT 0.0000 -0.0850 1.3800 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 1.3800 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 1.3800 3.4850 ;
RECT 0.0850 1.9300 1.2950 3.3150 ;
RECT 0.7750 1.2550 1.2950 1.9300 ;
LAYER met1 ;
RECT 0.0000 3.1000 1.3800 3.7000 ;
END
END vpwr
END efs8hd_decap_3
MACRO efs8hd_a21boi_2
CLASS CORE ;
FOREIGN efs8hd_a21boi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 4.14 3.505 ;
RECT 0.095 2.6 0.425 3.295 ;
RECT 2.385 2.745 2.555 3.295 ;
RECT 3.16 2.845 3.49 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
PIN vgnd
PORT
LAYER li1 ;
RECT 0.985 0.105 1.225 1.105 ;
RECT 1.94 0.105 2.27 0.555 ;
RECT 3.635 0.105 3.93 1.08 ;
RECT 0 -0.105 4.14 0.105 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN B1N
PORT
LAYER li1 ;
RECT 0.12 0.955 0.425 2.255 ;
END
END B1N
PIN A2
PORT
LAYER li1 ;
RECT 2.1 1.87 3.675 2.095 ;
RECT 2.1 1.555 2.425 1.87 ;
RECT 2.095 1.345 2.425 1.555 ;
RECT 3.385 1.62 3.675 1.87 ;
RECT 3.385 1.295 3.795 1.62 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 2.605 1.245 3.215 1.655 ;
END
END A1
PIN Y
PORT
LAYER li1 ;
RECT 1.52 0.98 1.715 2.645 ;
RECT 1.52 0.77 3.06 0.98 ;
RECT 1.52 0.32 1.72 0.77 ;
RECT 2.73 0.32 3.06 0.77 ;
END
END Y
OBS
LAYER li1 ;
RECT 1.045 2.855 2.215 3.08 ;
RECT 0.595 1.605 0.855 2.83 ;
RECT 1.045 2.245 1.35 2.855 ;
RECT 1.885 2.53 2.215 2.855 ;
RECT 2.81 2.63 2.98 3.08 ;
RECT 3.66 2.63 3.92 3.08 ;
RECT 2.81 2.53 3.92 2.63 ;
RECT 1.885 2.32 3.92 2.53 ;
RECT 0.595 1.34 1.325 1.605 ;
RECT 0.595 0.665 0.795 1.34 ;
RECT 0.265 0.45 0.795 0.665 ;
END
END efs8hd_a21boi_2
MACRO efs8hd_o32ai_2
CLASS CORE ;
FOREIGN efs8hd_o32ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN B2
PORT
LAYER li1 ;
RECT 0.09 1.345 0.845 1.655 ;
END
END B2
PIN B1
PORT
LAYER li1 ;
RECT 1.015 1.345 1.705 1.655 ;
END
END B1
PIN Y
PORT
LAYER li1 ;
RECT 0.515 2.08 0.845 2.62 ;
RECT 2.775 2.08 3.105 2.605 ;
RECT 0.515 1.87 3.105 2.08 ;
RECT 1.875 1.38 2.17 1.87 ;
RECT 1.875 1.13 2.045 1.38 ;
RECT 0.515 0.82 2.045 1.13 ;
END
END Y
PIN A3
PORT
LAYER li1 ;
RECT 2.405 1.345 3.075 1.655 ;
END
END A3
PIN A2
PORT
LAYER li1 ;
RECT 3.365 1.345 4.48 1.655 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 4.745 1.345 5.865 1.655 ;
END
END A1
PIN vgnd
PORT
LAYER li1 ;
RECT 2.62 0.105 2.95 0.68 ;
RECT 3.635 0.105 3.805 0.68 ;
RECT 4.905 0.105 5.235 0.68 ;
RECT 2.62 0.085 5.235 0.105 ;
RECT 0 -0.085 5.98 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.98 3.485 ;
RECT 1.435 3.295 5.715 3.315 ;
RECT 1.435 2.72 1.605 3.295 ;
RECT 4.62 2.295 4.825 3.295 ;
RECT 5.495 1.87 5.715 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.87 1.265 3.08 ;
RECT 0.09 1.87 0.345 2.87 ;
RECT 1.015 2.505 1.265 2.87 ;
RECT 1.775 2.505 2.105 3.07 ;
RECT 1.015 2.295 2.105 2.505 ;
RECT 2.335 2.82 4.385 3.055 ;
RECT 2.335 2.295 2.585 2.82 ;
RECT 3.275 1.87 3.445 2.82 ;
RECT 3.615 2.08 3.945 2.605 ;
RECT 4.135 2.295 4.385 2.82 ;
RECT 4.995 2.08 5.325 3.075 ;
RECT 3.615 1.87 5.325 2.08 ;
RECT 0.09 0.605 0.345 1.13 ;
RECT 2.235 0.895 5.755 1.13 ;
RECT 2.235 0.605 2.405 0.895 ;
RECT 0.09 0.32 2.405 0.605 ;
RECT 3.135 0.32 3.465 0.895 ;
RECT 4.055 0.32 4.725 0.895 ;
RECT 5.425 0.32 5.755 0.895 ;
END
END efs8hd_o32ai_2
MACRO efs8hd_o2111ai_2
CLASS CORE ;
FOREIGN efs8hd_o2111ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.605 2.08 0.865 3.08 ;
RECT 1.535 2.08 1.725 3.08 ;
RECT 2.395 2.08 2.575 3.08 ;
RECT 3.815 2.08 4.005 2.63 ;
RECT 0.605 1.87 4.005 2.08 ;
RECT 0.605 1.13 0.865 1.87 ;
RECT 0.605 0.77 0.935 1.13 ;
END
END Y
PIN D1
PORT
LAYER li1 ;
RECT 0.085 1.345 0.425 1.695 ;
END
END D1
PIN C1
PORT
LAYER li1 ;
RECT 1.045 1.345 1.79 1.655 ;
END
END C1
PIN B1
PORT
LAYER li1 ;
RECT 2.2 1.345 3.185 1.655 ;
END
END B1
PIN A2
PORT
LAYER li1 ;
RECT 3.365 1.345 4.455 1.655 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 4.635 1.345 5.435 1.655 ;
END
END A1
PIN vgnd
PORT
LAYER li1 ;
RECT 3.74 0.105 4.07 0.605 ;
RECT 4.6 0.105 4.93 0.6 ;
RECT 3.74 0.085 4.93 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.52 3.485 ;
RECT 0.175 3.295 4.93 3.315 ;
RECT 0.175 1.905 0.425 3.295 ;
RECT 1.035 2.295 1.365 3.295 ;
RECT 1.895 2.3 2.225 3.295 ;
RECT 2.755 2.295 3.085 3.295 ;
RECT 4.67 2.32 4.93 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 3.31 2.845 4.5 3.08 ;
RECT 3.31 2.295 3.57 2.845 ;
RECT 4.24 2.105 4.5 2.845 ;
RECT 5.1 2.105 5.36 3.08 ;
RECT 4.24 1.895 5.36 2.105 ;
RECT 0.175 0.555 0.435 1.08 ;
RECT 1.115 0.92 2.275 1.13 ;
RECT 1.115 0.555 1.3 0.92 ;
RECT 1.925 0.775 2.275 0.92 ;
RECT 2.45 0.82 5.435 1.05 ;
RECT 0.175 0.325 1.3 0.555 ;
RECT 1.47 0.665 1.76 0.705 ;
RECT 1.47 0.555 1.775 0.665 ;
RECT 2.88 0.555 3.21 0.605 ;
RECT 1.47 0.32 3.21 0.555 ;
RECT 3.38 0.455 3.57 0.82 ;
RECT 4.24 0.815 5.435 0.82 ;
RECT 4.24 0.455 4.43 0.815 ;
RECT 5.1 0.455 5.435 0.815 ;
END
END efs8hd_o2111ai_2
MACRO efs8hd_o311ai_2
CLASS CORE ;
FOREIGN efs8hd_o311ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 2.415 2.155 2.665 2.655 ;
RECT 3.335 2.155 3.505 3.08 ;
RECT 4.515 2.155 4.825 3.08 ;
RECT 5.495 2.155 5.895 3.08 ;
RECT 2.415 1.855 5.895 2.155 ;
RECT 4.625 1.105 4.915 1.855 ;
RECT 4.625 0.805 5.895 1.105 ;
RECT 5.515 0.32 5.895 0.805 ;
END
END Y
PIN A1
PORT
LAYER li1 ;
RECT 0.085 1.32 1.235 1.645 ;
END
END A1
PIN A2
PORT
LAYER li1 ;
RECT 1.405 1.305 2.155 1.645 ;
END
END A2
PIN A3
PORT
LAYER li1 ;
RECT 2.325 1.32 3.075 1.645 ;
END
END A3
PIN B1
PORT
LAYER li1 ;
RECT 3.365 1.32 4.455 1.645 ;
END
END B1
PIN C1
PORT
LAYER li1 ;
RECT 5.085 1.32 5.895 1.645 ;
END
END C1
PIN vgnd
PORT
LAYER li1 ;
RECT 0.655 0.105 0.985 0.605 ;
RECT 1.495 0.105 1.825 0.605 ;
RECT 2.335 0.105 3.105 0.605 ;
RECT 0.655 0.085 3.105 0.105 ;
RECT 0 -0.085 5.98 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.98 3.485 ;
RECT 0.635 3.295 5.325 3.315 ;
RECT 0.635 2.37 0.965 3.295 ;
RECT 3.675 2.37 4.345 3.295 ;
RECT 4.995 2.37 5.325 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.155 0.465 3.08 ;
RECT 1.135 2.155 1.305 3.08 ;
RECT 1.475 2.87 3.165 3.08 ;
RECT 1.475 2.37 1.805 2.87 ;
RECT 1.975 2.155 2.225 2.655 ;
RECT 2.835 2.37 3.165 2.87 ;
RECT 0.085 1.855 2.225 2.155 ;
RECT 0.085 0.82 4.385 1.105 ;
RECT 0.085 0.32 0.485 0.82 ;
RECT 1.155 0.32 1.325 0.82 ;
RECT 1.995 0.32 2.165 0.82 ;
RECT 3.275 0.32 3.445 0.82 ;
RECT 3.615 0.32 5.345 0.605 ;
END
END efs8hd_o311ai_2
MACRO efs8hd_a311oi_2
CLASS CORE ;
FOREIGN efs8hd_a311oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.44 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 4.66 2.395 5.005 2.605 ;
RECT 4.66 2.18 4.99 2.395 ;
RECT 4.66 2.1 5.005 2.18 ;
RECT 4.26 1.97 5.005 2.1 ;
RECT 4.26 1.89 4.99 1.97 ;
RECT 4.26 1.03 4.475 1.89 ;
RECT 4.26 0.935 5.345 1.03 ;
RECT 2.295 0.765 5.345 0.935 ;
RECT 3.235 0.32 3.405 0.765 ;
RECT 4.085 0.32 4.255 0.765 ;
RECT 5.175 0.32 5.345 0.765 ;
END
END Y
PIN A3
PORT
LAYER li1 ;
RECT 0.135 1.105 0.8 1.655 ;
END
END A3
PIN A2
PORT
LAYER li1 ;
RECT 1.055 1.105 1.805 1.655 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 1.985 1.245 3.115 1.655 ;
END
END A1
PIN B1
PORT
LAYER li1 ;
RECT 3.365 1.105 4.055 1.655 ;
END
END B1
PIN C1
PORT
LAYER li1 ;
RECT 5.175 1.62 5.41 2.03 ;
RECT 4.73 1.345 5.41 1.62 ;
END
END C1
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 3.585 0.105 3.915 0.58 ;
RECT 4.675 0.105 5.005 0.58 ;
RECT 0.515 0.085 5.005 0.105 ;
RECT 0 -0.085 5.52 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.52 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.52 3.485 ;
RECT 0.095 3.295 2.975 3.315 ;
RECT 0.095 1.87 0.345 3.295 ;
RECT 0.935 2.395 1.265 3.295 ;
RECT 1.785 2.395 2.135 3.295 ;
RECT 2.645 2.395 2.975 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.52 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.595 2.18 0.765 3.08 ;
RECT 1.435 2.18 1.605 3.08 ;
RECT 2.305 2.18 2.475 3.08 ;
RECT 4.11 3.03 4.44 3.08 ;
RECT 5.175 3.03 5.345 3.08 ;
RECT 3.145 2.82 5.345 3.03 ;
RECT 3.585 2.18 3.915 2.605 ;
RECT 4.11 2.395 4.44 2.82 ;
RECT 5.175 2.245 5.345 2.82 ;
RECT 0.595 1.97 3.915 2.18 ;
RECT 0.175 0.765 2.105 0.935 ;
RECT 0.175 0.32 0.345 0.765 ;
RECT 1.015 0.32 1.185 0.765 ;
RECT 1.355 0.38 3.045 0.595 ;
END
END efs8hd_a311oi_2
MACRO efs8hd_clkdlybuf4s25_2
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s25_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 2.77 2.03 3.095 3.075 ;
RECT 2.865 1.595 3.095 2.03 ;
RECT 2.865 0.955 3.595 1.595 ;
RECT 2.865 0.77 3.095 0.955 ;
RECT 2.77 0.355 3.095 0.77 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.105 0.495 2.02 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.575 0.105 0.905 0.59 ;
RECT 2.135 0.105 2.465 0.58 ;
RECT 3.265 0.105 3.595 0.69 ;
RECT 0.575 0.085 3.595 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.575 3.295 3.595 3.315 ;
RECT 0.575 2.655 0.905 3.295 ;
RECT 2.135 2.395 2.465 3.295 ;
RECT 3.265 2.045 3.595 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.095 2.445 0.345 3.08 ;
RECT 0.095 2.23 0.835 2.445 ;
RECT 0.665 2.19 0.835 2.23 ;
RECT 0.665 1.655 1.005 2.19 ;
RECT 1.175 1.78 1.44 3.08 ;
RECT 1.695 2.18 1.945 3.08 ;
RECT 1.695 1.875 2.595 2.18 ;
RECT 1.205 1.655 1.44 1.78 ;
RECT 0.665 1.245 1.035 1.655 ;
RECT 1.205 1.245 2.165 1.655 ;
RECT 0.665 0.935 0.84 1.245 ;
RECT 1.205 0.975 1.425 1.245 ;
RECT 2.335 1.005 2.595 1.875 ;
RECT 0.095 0.765 0.84 0.935 ;
RECT 0.095 0.38 0.345 0.765 ;
RECT 1.095 0.32 1.425 0.975 ;
RECT 1.615 0.795 2.595 1.005 ;
RECT 1.615 0.32 1.945 0.795 ;
END
END efs8hd_clkdlybuf4s25_2
MACRO efs8hd_decap_12
CLASS CORE ;
FOREIGN efs8hd_decap_12 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.5200 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0850 1.0650 2.6650 1.7150 ;
RECT 0.0850 0.0850 5.4300 1.0650 ;
RECT 0.0000 -0.0850 5.5200 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 5.5200 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 5.5200 3.4850 ;
RECT 0.0850 1.9300 5.4300 3.3150 ;
RECT 2.8350 1.2800 5.4300 1.9300 ;
LAYER met1 ;
RECT 0.0000 3.1000 5.5200 3.7000 ;
END
END vpwr
END efs8hd_decap_12
MACRO efs8hd_o41ai_2
CLASS CORE ;
FOREIGN efs8hd_o41ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 6.9 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.515 2.08 0.845 3.08 ;
RECT 1.875 2.08 2.205 2.655 ;
RECT 0.515 1.88 2.205 2.08 ;
RECT 0.61 1.805 2.205 1.88 ;
RECT 0.61 1.105 0.845 1.805 ;
RECT 0.515 0.795 0.845 1.105 ;
END
END Y
PIN B1
PORT
LAYER li1 ;
RECT 0.105 1.345 0.44 1.615 ;
END
END B1
PIN A4
PORT
LAYER li1 ;
RECT 1.5 1.305 2.275 1.635 ;
END
END A4
PIN A3
PORT
LAYER li1 ;
RECT 2.445 1.345 3.58 1.615 ;
END
END A3
PIN A2
PORT
LAYER li1 ;
RECT 3.78 1.345 4.54 1.615 ;
END
END A2
PIN A1
PORT
LAYER li1 ;
RECT 4.72 1.345 5.895 1.615 ;
END
END A1
PIN vgnd
PORT
LAYER li1 ;
RECT 1.455 0.105 1.705 0.68 ;
RECT 2.375 0.105 2.545 0.68 ;
RECT 3.215 0.105 3.45 0.68 ;
RECT 4.195 0.105 4.365 0.68 ;
RECT 5.035 0.105 5.205 0.68 ;
RECT 1.455 0.085 5.205 0.105 ;
RECT 0 -0.085 5.98 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.98 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.98 3.485 ;
RECT 0.085 3.295 5.285 3.315 ;
RECT 0.085 1.87 0.345 3.295 ;
RECT 1.015 2.295 1.265 3.295 ;
RECT 4.955 2.23 5.285 3.295 ;
LAYER met1 ;
RECT 0 3.1 5.98 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.455 2.87 2.545 3.08 ;
RECT 1.455 2.295 1.705 2.87 ;
RECT 2.375 2.02 2.545 2.87 ;
RECT 2.715 2.87 4.445 3.08 ;
RECT 2.715 2.295 3.045 2.87 ;
RECT 3.215 2.02 3.465 2.655 ;
RECT 2.375 1.805 3.465 2.02 ;
RECT 3.695 2.02 3.945 2.655 ;
RECT 4.115 2.295 4.445 2.87 ;
RECT 4.615 2.02 4.785 3.08 ;
RECT 5.455 2.02 5.705 3.08 ;
RECT 3.695 1.805 5.705 2.02 ;
RECT 0.085 0.58 0.345 1.13 ;
RECT 1.015 0.92 5.705 1.13 ;
RECT 1.015 0.58 1.265 0.92 ;
RECT 0.085 0.32 1.265 0.58 ;
RECT 1.875 0.32 2.205 0.92 ;
RECT 2.715 0.32 3.045 0.92 ;
RECT 3.695 0.32 4.025 0.92 ;
RECT 4.535 0.32 4.865 0.92 ;
RECT 5.375 0.32 5.705 0.92 ;
END
END efs8hd_o41ai_2
MACRO efs8hd_dfrbp_2
CLASS CORE ;
FOREIGN efs8hd_dfrbp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.96 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 9.16 0.33 9.495 2.12 ;
END
END Q
PIN QN
PORT
LAYER li1 ;
RECT 10.12 2.6 10.42 3.08 ;
RECT 10.03 1.92 10.42 2.6 ;
RECT 10.25 1.03 10.42 1.92 ;
RECT 10.04 0.39 10.42 1.03 ;
END
END QN
PIN RESETB
PORT
LAYER li1 ;
RECT 7.105 1.295 7.645 1.755 ;
RECT 3.805 0.955 4.595 1.27 ;
RECT 7.405 0.795 7.645 1.295 ;
LAYER met1 ;
RECT 7.045 1.205 7.335 1.6 ;
RECT 3.745 1.15 4.395 1.205 ;
RECT 7.045 1.15 7.635 1.205 ;
RECT 3.745 0.975 7.635 1.15 ;
RECT 3.745 0.92 4.395 0.975 ;
RECT 7.345 0.92 7.635 0.975 ;
END
END RESETB
PIN D
PORT
LAYER li1 ;
RECT 1.355 2.08 1.68 3.065 ;
RECT 1.415 0.77 1.875 2.08 ;
END
END D
PIN CLK
PORT
LAYER li1 ;
RECT 0.09 1.22 0.44 2.03 ;
END
END CLK
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.545 0.105 1.875 0.555 ;
RECT 4.475 0.105 4.805 0.68 ;
RECT 6.705 0.105 6.895 0.655 ;
RECT 8.755 0.105 8.99 0.68 ;
RECT 9.7 0.105 9.87 1.03 ;
RECT 10.59 0.105 10.76 1.165 ;
RECT 0 -0.105 11.04 0.105 ;
LAYER met1 ;
RECT 0 -0.3 11.04 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 11.04 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.85 2.72 2.1 3.295 ;
RECT 3.99 2.755 4.32 3.295 ;
RECT 4.955 2.72 5.325 3.295 ;
RECT 6.94 2.72 7.19 3.295 ;
RECT 7.71 2.82 8.055 3.295 ;
RECT 8.73 2.755 9.07 3.295 ;
RECT 9.62 2.82 9.95 3.295 ;
RECT 10.59 1.805 10.76 3.295 ;
LAYER met1 ;
RECT 0 3.1 11.04 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.455 0.345 3.08 ;
RECT 0.09 2.245 0.84 2.455 ;
RECT 0.61 1.005 0.84 2.245 ;
RECT 0.09 0.795 0.84 1.005 ;
RECT 0.09 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.185 3.08 ;
RECT 2.27 2.67 2.52 3.08 ;
RECT 2.735 2.67 3.415 3.08 ;
RECT 2.27 2.505 2.44 2.67 ;
RECT 2.045 2.295 2.44 2.505 ;
RECT 2.045 0.595 2.215 2.295 ;
RECT 2.61 1.97 3.075 2.455 ;
RECT 2.385 0.955 2.735 1.73 ;
RECT 2.905 1.23 3.075 1.97 ;
RECT 3.245 1.695 3.415 2.67 ;
RECT 3.585 2.545 3.755 2.97 ;
RECT 4.49 2.545 4.66 2.97 ;
RECT 3.585 2.33 4.66 2.545 ;
RECT 5.495 2.505 5.665 3.08 ;
RECT 5.9 2.655 6.77 3.08 ;
RECT 5.105 2.295 5.665 2.505 ;
RECT 5.105 2.12 5.275 2.295 ;
RECT 3.775 1.905 5.275 2.12 ;
RECT 5.97 2.08 6.43 2.445 ;
RECT 3.245 1.48 4.935 1.695 ;
RECT 2.905 0.955 3.26 1.23 ;
RECT 3.43 0.595 3.6 1.48 ;
RECT 4.765 1.255 4.935 1.48 ;
RECT 5.105 1.045 5.275 1.905 ;
RECT 2.045 0.38 2.54 0.595 ;
RECT 2.745 0.38 3.6 0.595 ;
RECT 5.015 0.555 5.275 1.045 ;
RECT 5.465 2.07 6.43 2.08 ;
RECT 6.6 2.18 6.77 2.655 ;
RECT 7.36 2.605 7.53 2.97 ;
RECT 7.36 2.395 8.16 2.605 ;
RECT 5.465 1.87 6.14 2.07 ;
RECT 6.6 1.97 7.82 2.18 ;
RECT 5.465 0.88 5.675 1.87 ;
RECT 6.6 1.855 6.77 1.97 ;
RECT 5.845 0.88 6.195 1.655 ;
RECT 6.365 1.645 6.77 1.855 ;
RECT 7.99 1.655 8.16 2.395 ;
RECT 8.335 2.545 8.56 3.08 ;
RECT 8.335 2.33 9.835 2.545 ;
RECT 8.335 2.245 8.99 2.33 ;
RECT 6.365 0.67 6.535 1.645 ;
RECT 7.99 1.62 8.65 1.655 ;
RECT 6.705 1.08 6.925 1.43 ;
RECT 7.815 1.345 8.65 1.62 ;
RECT 7.815 1.245 8.16 1.345 ;
RECT 6.705 0.87 7.235 1.08 ;
RECT 5.015 0.345 5.365 0.555 ;
RECT 5.585 0.32 6.535 0.67 ;
RECT 7.065 0.58 7.235 0.87 ;
RECT 7.815 0.58 7.985 1.245 ;
RECT 8.82 1.105 8.99 2.245 ;
RECT 9.665 1.655 9.835 2.33 ;
RECT 9.665 1.245 10.08 1.655 ;
RECT 7.065 0.37 7.985 0.58 ;
RECT 8.335 0.895 8.99 1.105 ;
RECT 8.335 0.43 8.585 0.895 ;
LAYER met1 ;
RECT 0.955 2.425 1.245 2.48 ;
RECT 2.845 2.425 3.135 2.48 ;
RECT 5.965 2.425 6.255 2.48 ;
RECT 0.955 2.25 6.255 2.425 ;
RECT 0.955 2.195 1.245 2.25 ;
RECT 2.845 2.195 3.135 2.25 ;
RECT 5.965 2.195 6.255 2.25 ;
RECT 0.55 1.575 0.84 1.63 ;
RECT 2.385 1.575 2.675 1.63 ;
RECT 5.965 1.575 6.255 1.63 ;
RECT 0.55 1.4 6.255 1.575 ;
RECT 0.55 1.345 0.84 1.4 ;
RECT 2.385 1.345 2.675 1.4 ;
RECT 5.965 1.345 6.255 1.4 ;
END
END efs8hd_dfrbp_2
MACRO efs8hd_or3b_2
CLASS CORE ;
FOREIGN efs8hd_or3b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 0.935 1.785 1.33 2.295 ;
RECT 0.935 0.745 1.105 1.785 ;
RECT 0.935 0.33 1.285 0.745 ;
END
END X
PIN CN
PORT
LAYER li1 ;
RECT 0.085 1.345 0.425 2.05 ;
END
END CN
PIN A
PORT
LAYER li1 ;
RECT 1.695 1.345 2.23 2.02 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 1.935 2.655 3.135 2.975 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.595 0.105 0.765 0.705 ;
RECT 1.52 0.105 1.69 0.705 ;
RECT 2.33 0.105 2.66 0.605 ;
RECT 0.595 0.085 2.66 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.55 3.295 1.755 3.315 ;
RECT 0.55 2.805 0.91 3.295 ;
RECT 1.425 2.805 1.755 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.635 0.345 2.775 ;
RECT 0.085 2.465 1.72 2.635 ;
RECT 0.085 2.265 0.765 2.465 ;
RECT 0.595 1.13 0.765 2.265 ;
RECT 1.55 2.445 1.72 2.465 ;
RECT 1.55 2.23 2.66 2.445 ;
RECT 2.49 1.655 2.66 2.23 ;
RECT 2.83 1.87 3.135 2.405 ;
RECT 0.085 0.92 0.765 1.13 ;
RECT 1.275 1.17 1.445 1.615 ;
RECT 2.49 1.245 2.79 1.655 ;
RECT 1.275 1.13 1.595 1.17 ;
RECT 1.275 1.03 2.16 1.13 ;
RECT 2.965 1.03 3.135 1.87 ;
RECT 1.275 0.955 3.135 1.03 ;
RECT 1.425 0.92 3.135 0.955 ;
RECT 0.085 0.365 0.345 0.92 ;
RECT 1.99 0.82 3.135 0.92 ;
RECT 1.99 0.38 2.16 0.82 ;
RECT 2.83 0.755 3.135 0.82 ;
RECT 2.83 0.38 3.085 0.755 ;
END
END efs8hd_or3b_2
MACRO efs8hd_dlrtp_2
CLASS CORE ;
FOREIGN efs8hd_dlrtp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 7.36 BY 3.4 ;
PIN RESETB
PORT
LAYER li1 ;
RECT 4.48 1.295 5.24 1.655 ;
RECT 4.48 1.245 4.815 1.295 ;
END
END RESETB
PIN Q
PORT
LAYER li1 ;
RECT 5.655 2.345 5.925 3.08 ;
RECT 5.755 1.875 5.925 2.345 ;
RECT 5.755 1.78 6.355 1.875 ;
RECT 5.76 1.77 6.355 1.78 ;
RECT 5.765 1.765 6.355 1.77 ;
RECT 5.775 1.73 6.355 1.765 ;
RECT 5.785 1.115 6.355 1.73 ;
RECT 5.77 1.08 6.355 1.115 ;
RECT 5.755 0.955 6.355 1.08 ;
RECT 5.755 0.605 5.925 0.955 ;
RECT 5.595 0.32 5.925 0.605 ;
END
END Q
PIN D
PORT
LAYER li1 ;
RECT 1.44 1.195 1.77 1.655 ;
END
END D
PIN GATE
PORT
LAYER li1 ;
RECT 0.09 1.23 0.33 2.03 ;
END
END GATE
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.875 0.105 2.205 0.555 ;
RECT 3.72 0.105 4.06 0.665 ;
RECT 5.255 0.105 5.425 0.655 ;
RECT 6.095 0.105 6.355 0.745 ;
RECT 0 -0.105 6.44 0.105 ;
LAYER met1 ;
RECT 0 -0.3 6.44 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 6.44 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.955 2.295 2.25 3.295 ;
RECT 3.75 2.72 4.09 3.295 ;
RECT 4.28 2.67 4.56 3.295 ;
RECT 5.14 2.345 5.485 3.295 ;
RECT 6.095 2.09 6.355 3.295 ;
LAYER met1 ;
RECT 0 3.1 6.44 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 0.175 2.245 0.78 2.455 ;
RECT 0.61 1.75 0.78 2.245 ;
RECT 1.015 2.105 1.24 3.08 ;
RECT 0.61 1.34 0.84 1.75 ;
RECT 0.61 1.005 0.78 1.34 ;
RECT 0.085 0.795 0.78 1.005 ;
RECT 0.085 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.185 2.105 ;
RECT 1.435 2.08 1.785 3.02 ;
RECT 2.77 2.82 3.58 3.03 ;
RECT 3.41 2.605 3.58 2.82 ;
RECT 3.41 2.5 3.605 2.605 ;
RECT 3.415 2.495 3.605 2.5 ;
RECT 2.905 2.39 3.175 2.495 ;
RECT 3.42 2.48 3.605 2.495 ;
RECT 2.905 2.225 3.265 2.39 ;
RECT 1.435 1.87 2.12 2.08 ;
RECT 1.95 1.37 2.12 1.87 ;
RECT 2.45 1.695 2.755 2.105 ;
RECT 2.93 1.965 3.265 2.225 ;
RECT 1.95 0.98 2.335 1.37 ;
RECT 2.93 1.3 3.1 1.965 ;
RECT 3.435 1.655 3.605 2.48 ;
RECT 4.8 2.33 4.97 3.08 ;
RECT 3.775 2.13 4.97 2.33 ;
RECT 3.775 1.92 5.585 2.13 ;
RECT 5.415 1.655 5.585 1.92 ;
RECT 1.515 0.955 2.335 0.98 ;
RECT 1.515 0.77 2.12 0.955 ;
RECT 2.585 0.92 3.1 1.3 ;
RECT 3.27 1.245 4.22 1.655 ;
RECT 5.415 1.245 5.615 1.655 ;
RECT 1.515 0.43 1.705 0.77 ;
RECT 3.27 0.67 3.445 1.245 ;
RECT 5.415 1.08 5.585 1.245 ;
RECT 4.955 1.03 5.585 1.08 ;
RECT 2.77 0.455 3.445 0.67 ;
RECT 4.24 0.87 5.585 1.03 ;
RECT 4.24 0.82 5.095 0.87 ;
RECT 4.24 0.32 4.58 0.82 ;
LAYER met1 ;
RECT 1.01 2.425 1.3 2.48 ;
RECT 2.865 2.425 3.155 2.48 ;
RECT 1.01 2.25 3.155 2.425 ;
RECT 1.01 2.195 1.3 2.25 ;
RECT 2.865 2.195 3.155 2.25 ;
RECT 0.55 2 0.84 2.055 ;
RECT 2.39 2 2.68 2.055 ;
RECT 0.55 1.825 2.68 2 ;
RECT 0.55 1.77 0.84 1.825 ;
RECT 2.39 1.77 2.68 1.825 ;
END
END efs8hd_dlrtp_2
MACRO efs8hd_and3_2
CLASS CORE ;
FOREIGN efs8hd_and3_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.68 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 1.97 2.245 2.245 3.08 ;
RECT 2.075 1.805 2.245 2.245 ;
RECT 2.06 1.155 2.675 1.805 ;
RECT 2.06 0.895 2.23 1.155 ;
RECT 1.98 0.32 2.23 0.895 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 0.765 0.47 1.615 ;
END
END A
PIN C
PORT
LAYER li1 ;
RECT 1.065 0.94 1.475 1.555 ;
RECT 1.065 0.38 1.295 0.94 ;
END
END C
PIN B
PORT
LAYER li1 ;
RECT 0.945 2.465 1.37 3.08 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 1.475 0.105 1.805 0.725 ;
RECT 2.4 0.105 2.675 0.93 ;
RECT 1.475 0.085 2.675 0.105 ;
RECT 0 -0.085 2.76 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.76 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.76 3.485 ;
RECT 0.085 3.295 2.675 3.315 ;
RECT 0.085 2.665 0.715 3.295 ;
RECT 0.525 2.495 0.715 2.665 ;
RECT 0.525 2.165 0.775 2.495 ;
RECT 1.555 2.24 1.77 3.295 ;
RECT 2.415 2.03 2.675 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.76 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.1 1.995 0.355 2.45 ;
RECT 1.08 1.995 1.33 2.295 ;
RECT 0.1 1.785 1.89 1.995 ;
RECT 0.64 1.78 1.89 1.785 ;
RECT 0.64 0.595 0.895 1.78 ;
RECT 1.66 1.245 1.89 1.78 ;
RECT 0.105 0.38 0.895 0.595 ;
END
END efs8hd_and3_2
MACRO efs8hd_dfxtp_2
CLASS CORE ;
FOREIGN efs8hd_dfxtp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 8.74 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 6.885 1.97 7.215 3.025 ;
RECT 6.885 1.87 7.275 1.97 ;
RECT 7.06 1.805 7.275 1.87 ;
RECT 7.105 1.08 7.275 1.805 ;
RECT 7.05 1.03 7.275 1.08 ;
RECT 6.895 0.925 7.275 1.03 ;
RECT 6.895 0.38 7.225 0.925 ;
END
END Q
PIN CLK
PORT
LAYER li1 ;
RECT 0.09 1.22 0.44 2.03 ;
END
END CLK
PIN D
PORT
LAYER li1 ;
RECT 1.37 0.895 1.65 2.08 ;
END
END D
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 7.82 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.44 2.72 1.705 3.295 ;
RECT 3.61 2.295 3.78 3.295 ;
RECT 5.49 2.67 5.805 3.295 ;
RECT 6.545 2.03 6.715 3.295 ;
RECT 7.385 2.15 7.555 3.295 ;
LAYER met1 ;
RECT 0 3.1 7.82 3.7 ;
END
END vpwr
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.455 0.105 1.705 0.68 ;
RECT 3.4 0.105 3.77 0.73 ;
RECT 5.585 0.105 5.795 0.77 ;
RECT 6.555 0.105 6.725 0.87 ;
RECT 7.395 0.105 7.565 0.75 ;
RECT 0 -0.105 7.82 0.105 ;
LAYER met1 ;
RECT 0 -0.3 7.82 0.3 ;
END
END vgnd
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 0.175 2.245 0.84 2.455 ;
RECT 0.61 1.005 0.84 2.245 ;
RECT 0.175 0.795 0.84 1.005 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.2 3.08 ;
RECT 1.875 2.55 2.125 3.08 ;
RECT 2.335 2.74 3.44 2.95 ;
RECT 1.82 2.39 2.125 2.55 ;
RECT 1.82 1.005 1.99 2.39 ;
RECT 2.16 1.405 2.4 2.15 ;
RECT 2.57 2.07 3.1 2.525 ;
RECT 2.57 1.195 2.74 2.07 ;
RECT 3.27 1.97 3.44 2.74 ;
RECT 3.95 2.67 4.2 3.08 ;
RECT 4.425 2.705 5.31 2.92 ;
RECT 3.27 1.855 3.78 1.97 ;
RECT 1.82 0.845 2.045 1.005 ;
RECT 2.215 0.92 2.74 1.195 ;
RECT 2.91 1.645 3.78 1.855 ;
RECT 1.875 0.67 2.045 0.845 ;
RECT 2.91 0.67 3.08 1.645 ;
RECT 3.61 1.555 3.78 1.645 ;
RECT 3.29 1.33 3.49 1.37 ;
RECT 3.95 1.33 4.12 2.67 ;
RECT 4.29 1.555 4.48 2.455 ;
RECT 3.29 0.955 4.12 1.33 ;
RECT 4.65 1.295 4.97 2.495 ;
RECT 1.875 0.455 2.21 0.67 ;
RECT 2.405 0.455 3.08 0.67 ;
RECT 3.95 0.67 4.12 0.955 ;
RECT 4.505 0.88 4.97 1.295 ;
RECT 5.14 1.655 5.31 2.705 ;
RECT 6.035 2.38 6.375 3.08 ;
RECT 5.48 1.915 6.375 2.38 ;
RECT 6.185 1.655 6.375 1.915 ;
RECT 5.14 1.245 6.015 1.655 ;
RECT 6.185 1.245 6.935 1.655 ;
RECT 5.14 0.67 5.31 1.245 ;
RECT 6.185 1.03 6.385 1.245 ;
RECT 3.95 0.455 4.355 0.67 ;
RECT 4.525 0.455 5.31 0.67 ;
RECT 6.055 0.375 6.385 1.03 ;
LAYER met1 ;
RECT 0.57 2.425 0.86 2.48 ;
RECT 2.67 2.425 2.96 2.48 ;
RECT 4.24 2.425 4.53 2.48 ;
RECT 0.57 2.25 4.53 2.425 ;
RECT 0.57 2.195 0.86 2.25 ;
RECT 2.67 2.195 2.96 2.25 ;
RECT 4.24 2.195 4.53 2.25 ;
RECT 0.965 2 1.255 2.055 ;
RECT 2.155 2 2.445 2.055 ;
RECT 4.675 2 4.965 2.055 ;
RECT 0.965 1.825 4.965 2 ;
RECT 0.965 1.77 1.255 1.825 ;
RECT 2.155 1.77 2.445 1.825 ;
RECT 4.675 1.77 4.965 1.825 ;
END
END efs8hd_dfxtp_2
MACRO efs8hd_clkinv_1
CLASS CORE ;
FOREIGN efs8hd_clkinv_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.3 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.085 0.47 0.325 1.655 ;
END
END A
PIN Y
PORT
LAYER li1 ;
RECT 0.515 1.615 0.845 3.08 ;
RECT 0.515 0.95 1.295 1.615 ;
RECT 0.515 0.32 0.84 0.95 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 1.01 0.085 1.295 0.74 ;
RECT 0 -0.085 1.38 0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.38 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 1.38 3.485 ;
RECT 0.085 3.295 1.295 3.315 ;
RECT 0.085 2.08 0.345 3.295 ;
RECT 1.015 2.08 1.295 3.295 ;
LAYER met1 ;
RECT 0 3.1 1.38 3.7 ;
END
END vpwr
END efs8hd_clkinv_1
MACRO efs8hd_fill_1
CLASS CORE ;
FOREIGN efs8hd_fill_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 0.4600 BY 3.4000 ;
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 0.4600 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 0.4600 3.7000 ;
END
END vpwr
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0000 -0.0850 0.4600 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 0.4600 0.3000 ;
END
END vgnd
END efs8hd_fill_1
MACRO efs8hd_dlygate4sd2_1
CLASS CORE ;
FOREIGN efs8hd_dlygate4sd2_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 2.57 1.87 3.135 3.08 ;
RECT 2.675 1.03 3.135 1.87 ;
RECT 2.57 0.32 3.135 1.03 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.32 0.775 2.02 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.655 0.105 0.925 0.68 ;
RECT 2.075 0.105 2.4 0.68 ;
RECT 0.655 0.085 2.4 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.655 3.295 2.4 3.315 ;
RECT 0.655 2.72 0.925 3.295 ;
RECT 2.075 2.72 2.4 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.505 0.485 3.08 ;
RECT 1.155 2.675 1.455 3.08 ;
RECT 0.085 2.23 1.115 2.505 ;
RECT 0.945 1.105 1.115 2.23 ;
RECT 0.085 0.9 1.115 1.105 ;
RECT 1.285 2.02 1.455 2.675 ;
RECT 1.625 2.505 1.875 3.08 ;
RECT 1.625 2.23 2.4 2.505 ;
RECT 1.285 1.32 2.03 2.02 ;
RECT 2.2 1.655 2.4 2.23 ;
RECT 0.085 0.32 0.485 0.9 ;
RECT 1.285 0.73 1.455 1.32 ;
RECT 2.2 1.245 2.505 1.655 ;
RECT 2.2 1.105 2.4 1.245 ;
RECT 1.155 0.32 1.455 0.73 ;
RECT 1.625 0.895 2.4 1.105 ;
RECT 1.625 0.32 1.875 0.895 ;
END
END efs8hd_dlygate4sd2_1
MACRO efs8hd_nand3b_2
CLASS CORE ;
FOREIGN efs8hd_nand3b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN AN
PORT
LAYER li1 ;
RECT 0.43 1.345 0.78 1.615 ;
END
END AN
PIN C
PORT
LAYER li1 ;
RECT 1.06 1.345 1.74 1.615 ;
END
END C
PIN B
PORT
LAYER li1 ;
RECT 1.95 1.345 3.14 1.615 ;
END
END B
PIN Y
PORT
LAYER li1 ;
RECT 1.06 2.505 1.39 3.08 ;
RECT 1.9 2.505 2.23 3.08 ;
RECT 1.06 2.445 2.23 2.505 ;
RECT 3.26 2.505 3.51 3.08 ;
RECT 3.26 2.445 4.05 2.505 ;
RECT 1.06 2.23 4.05 2.445 ;
RECT 3.85 1.13 4.05 2.23 ;
RECT 3.26 0.795 4.05 1.13 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 0.58 0.105 0.89 1.13 ;
RECT 1.56 0.105 1.81 0.68 ;
RECT 0.58 0.085 1.81 0.105 ;
RECT 0 -0.085 4.14 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.14 3.485 ;
RECT 0.58 3.295 4.05 3.315 ;
RECT 0.58 2.295 0.89 3.295 ;
RECT 1.56 2.72 1.73 3.295 ;
RECT 2.4 2.72 2.65 3.295 ;
RECT 2.84 2.72 3.09 3.295 ;
RECT 3.76 2.72 4.05 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.58 0.41 3.08 ;
RECT 0.09 2.02 0.26 2.58 ;
RECT 0.09 1.805 3.65 2.02 ;
RECT 0.09 0.82 0.26 1.805 ;
RECT 3.32 1.345 3.65 1.805 ;
RECT 1.06 0.895 2.75 1.13 ;
RECT 0.09 0.32 0.41 0.82 ;
RECT 1.06 0.32 1.39 0.895 ;
RECT 2 0.795 2.75 0.895 ;
RECT 2.92 0.58 3.09 1.13 ;
RECT 2 0.32 4.05 0.58 ;
END
END efs8hd_nand3b_2
MACRO efs8hd_clkbuf_1
CLASS CORE ;
FOREIGN efs8hd_clkbuf_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 2.3 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.945 1.23 1.275 1.69 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 0.085 1.95 0.355 3.08 ;
RECT 0.085 0.95 0.255 1.95 ;
RECT 0.085 0.315 0.345 0.95 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.525 0.085 0.855 0.58 ;
RECT 0 -0.085 1.38 0.085 ;
LAYER met1 ;
RECT 0 -0.3 1.38 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 1.38 3.485 ;
RECT 0.525 2.34 0.855 3.315 ;
LAYER met1 ;
RECT 0 3.1 1.38 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.035 2.13 1.205 3.08 ;
RECT 0.54 1.915 1.205 2.13 ;
RECT 0.54 1.735 0.71 1.915 ;
RECT 0.425 1.325 0.71 1.735 ;
RECT 0.54 1.005 0.71 1.325 ;
RECT 0.54 0.79 1.205 1.005 ;
RECT 1.035 0.315 1.205 0.79 ;
END
END efs8hd_clkbuf_1
MACRO efs8hd_einvn_8
CLASS CORE ;
FOREIGN efs8hd_einvn_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.27 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 4.645 1.24 7.8 1.605 ;
END
END A
PIN TEB
PORT
LAYER li1 ;
RECT 0.09 1.24 0.345 1.655 ;
END
END TEB
PIN Z
PORT
LAYER li1 ;
RECT 4.87 2.03 5.2 2.655 ;
RECT 5.71 2.03 6.04 2.655 ;
RECT 6.55 2.03 6.88 2.655 ;
RECT 7.39 2.03 7.72 2.655 ;
RECT 4.87 1.815 8.195 2.03 ;
RECT 7.97 1.03 8.195 1.815 ;
RECT 4.87 0.775 8.195 1.03 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.085 0.845 0.605 ;
RECT 1.455 0.085 1.785 0.605 ;
RECT 2.295 0.085 2.625 0.605 ;
RECT 3.135 0.085 3.465 0.605 ;
RECT 3.975 0.085 4.315 0.605 ;
RECT 0 -0.085 8.28 0.085 ;
LAYER met1 ;
RECT 0 -0.3 8.28 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 8.28 3.485 ;
RECT 0.515 2.29 0.845 3.315 ;
RECT 1.41 2.29 1.74 3.315 ;
RECT 2.25 2.29 2.58 3.315 ;
RECT 3.09 2.29 3.42 3.315 ;
RECT 3.93 2.29 4.28 3.315 ;
LAYER met1 ;
RECT 0 3.1 8.28 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.08 0.345 3.08 ;
RECT 1.015 2.08 1.24 3.08 ;
RECT 1.91 2.08 2.08 3.08 ;
RECT 2.75 2.08 2.92 3.08 ;
RECT 3.59 2.08 3.76 3.08 ;
RECT 4.45 2.865 8.195 3.08 ;
RECT 4.45 2.08 4.7 2.865 ;
RECT 5.37 2.24 5.54 2.865 ;
RECT 6.21 2.24 6.38 2.865 ;
RECT 7.05 2.24 7.22 2.865 ;
RECT 7.89 2.24 8.195 2.865 ;
RECT 0.09 1.865 0.845 2.08 ;
RECT 1.015 1.865 4.7 2.08 ;
RECT 0.515 1.655 0.845 1.865 ;
RECT 0.515 1.24 4.475 1.655 ;
RECT 0.515 1.03 0.845 1.24 ;
RECT 0.09 0.815 0.845 1.03 ;
RECT 1.015 0.815 4.7 1.03 ;
RECT 0.09 0.315 0.345 0.815 ;
RECT 1.015 0.315 1.285 0.815 ;
RECT 1.955 0.315 2.125 0.815 ;
RECT 2.795 0.315 2.965 0.815 ;
RECT 3.635 0.315 3.805 0.815 ;
RECT 4.485 0.56 4.7 0.815 ;
RECT 4.485 0.315 8.195 0.56 ;
END
END efs8hd_einvn_8
MACRO efs8hd_xnor3_4
CLASS CORE ;
FOREIGN efs8hd_xnor3_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 10.58 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 2.905 1.345 3.56 1.655 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 8.425 1.345 8.835 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 7.505 1.785 8.185 2.02 ;
RECT 7.505 1.245 7.775 1.785 ;
END
END B
PIN X
PORT
LAYER li1 ;
RECT 0.625 1.655 0.955 3.03 ;
RECT 1.465 1.8 1.745 3.08 ;
RECT 1.465 1.655 1.71 1.8 ;
RECT 0.625 1.245 1.71 1.655 ;
RECT 0.625 0.47 0.875 1.245 ;
RECT 1.465 1.155 1.71 1.245 ;
RECT 1.465 0.44 1.715 1.155 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.205 0.105 0.455 0.92 ;
RECT 1.045 0.105 1.295 0.92 ;
RECT 1.885 0.105 2.055 0.655 ;
RECT 4.855 0.105 5.025 1.08 ;
RECT 8.855 0.105 9.025 0.705 ;
RECT 0.205 0.085 9.025 0.105 ;
RECT 0 -0.085 9.66 0.085 ;
LAYER met1 ;
RECT 0 -0.3 9.66 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 9.66 3.485 ;
RECT 0.205 3.295 9.11 3.315 ;
RECT 0.205 1.865 0.455 3.295 ;
RECT 1.125 1.87 1.295 3.295 ;
RECT 1.915 2.77 2.25 3.295 ;
RECT 4.605 2.795 4.935 3.295 ;
RECT 8.775 2.845 9.11 3.295 ;
LAYER met1 ;
RECT 0 3.1 9.66 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 2.43 2.795 3.9 3.005 ;
RECT 5.27 2.845 8.365 3.055 ;
RECT 2.43 2.555 2.6 2.795 ;
RECT 5.27 2.58 5.44 2.845 ;
RECT 1.915 2.345 2.6 2.555 ;
RECT 2.94 2.37 5.44 2.58 ;
RECT 1.915 1.655 2.085 2.345 ;
RECT 2.315 1.92 3.9 2.13 ;
RECT 1.88 1.245 2.085 1.655 ;
RECT 1.91 1.08 2.085 1.245 ;
RECT 1.91 0.87 2.395 1.08 ;
RECT 2.225 0.53 2.395 0.87 ;
RECT 2.565 0.745 2.735 1.92 ;
RECT 3.73 1.655 3.9 1.92 ;
RECT 4.07 1.905 4.455 2.12 ;
RECT 4.175 1.72 4.455 1.905 ;
RECT 3.73 1.245 4.005 1.655 ;
RECT 3.125 0.995 3.505 1.13 ;
RECT 4.175 0.995 4.345 1.72 ;
RECT 4.625 1.505 4.795 2.37 ;
RECT 5.025 1.805 5.445 2.145 ;
RECT 3.125 0.78 4.345 0.995 ;
RECT 4.515 1.295 4.795 1.505 ;
RECT 4.515 0.57 4.685 1.295 ;
RECT 3.45 0.53 3.885 0.57 ;
RECT 2.225 0.32 3.885 0.53 ;
RECT 4.055 0.355 4.685 0.57 ;
RECT 5.205 0.52 5.445 1.805 ;
RECT 5.625 0.745 5.795 2.63 ;
RECT 5.965 1.075 6.135 2.845 ;
RECT 9.28 2.63 9.575 3.08 ;
RECT 6.315 2.02 6.73 2.555 ;
RECT 7.165 2.42 9.575 2.63 ;
RECT 6.315 1.805 6.995 2.02 ;
RECT 6.33 1.245 6.655 1.595 ;
RECT 5.965 0.9 6.315 1.075 ;
RECT 6.485 0.99 6.655 1.245 ;
RECT 6.005 0.855 6.315 0.9 ;
RECT 5.625 0.555 5.835 0.745 ;
RECT 6.005 0.725 6.375 0.855 ;
RECT 5.625 0.33 6.035 0.555 ;
RECT 6.205 0.4 6.375 0.725 ;
RECT 6.825 0.53 6.995 1.805 ;
RECT 7.165 0.745 7.335 2.42 ;
RECT 9.09 2.345 9.575 2.42 ;
RECT 8.355 1.87 9.175 2.13 ;
RECT 9.005 1.655 9.175 1.87 ;
RECT 7.945 1.18 8.255 1.595 ;
RECT 9.005 1.245 9.235 1.655 ;
RECT 7.945 0.915 8.15 1.18 ;
RECT 9.005 1.13 9.175 1.245 ;
RECT 8.435 0.94 9.175 1.13 ;
RECT 8.395 0.92 9.175 0.94 ;
RECT 7.605 0.53 8.07 0.58 ;
RECT 6.825 0.32 8.07 0.53 ;
RECT 8.395 0.37 8.685 0.92 ;
RECT 9.405 0.73 9.575 2.345 ;
RECT 9.275 0.32 9.575 0.73 ;
LAYER met1 ;
RECT 4.225 2 4.515 2.055 ;
RECT 6.525 2 6.815 2.055 ;
RECT 4.225 1.825 6.815 2 ;
RECT 4.225 1.77 4.515 1.825 ;
RECT 6.525 1.77 6.815 1.825 ;
RECT 5.145 1.19 5.435 1.205 ;
RECT 6.485 1.19 6.815 1.205 ;
RECT 5.145 1.15 6.815 1.19 ;
RECT 7.905 1.15 8.195 1.205 ;
RECT 5.145 0.975 8.195 1.15 ;
RECT 5.145 0.96 6.815 0.975 ;
RECT 5.145 0.92 5.435 0.96 ;
RECT 6.485 0.92 6.815 0.96 ;
RECT 7.905 0.92 8.195 0.975 ;
RECT 5.605 0.725 5.895 0.78 ;
RECT 8.365 0.725 8.655 0.78 ;
RECT 5.605 0.55 8.655 0.725 ;
RECT 5.605 0.495 5.895 0.55 ;
RECT 8.365 0.495 8.655 0.55 ;
END
END efs8hd_xnor3_4
MACRO efs8hd_clkdlybuf4s50_2
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s50_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 5.06 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 3.185 1.915 3.625 3.08 ;
RECT 3.345 0.8 3.625 1.915 ;
RECT 3.185 0.34 3.625 0.8 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.345 0.48 1.615 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.585 0.105 0.915 0.705 ;
RECT 2.685 0.105 3.015 0.705 ;
RECT 3.795 0.105 4.055 0.795 ;
RECT 0.585 0.085 4.055 0.105 ;
RECT 0 -0.085 4.14 0.085 ;
LAYER met1 ;
RECT 0 -0.3 4.14 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 4.14 3.485 ;
RECT 0.6 3.295 4.055 3.315 ;
RECT 0.6 2.25 0.93 3.295 ;
RECT 2.685 2.25 3.015 3.295 ;
RECT 3.795 2.25 4.055 3.295 ;
LAYER met1 ;
RECT 0 3.1 4.14 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.04 0.43 3.08 ;
RECT 1.39 2.23 1.795 3.08 ;
RECT 0.085 1.82 1.27 2.04 ;
RECT 0.85 1.555 1.27 1.82 ;
RECT 1.625 1.555 1.795 2.23 ;
RECT 1.985 2.04 2.235 3.08 ;
RECT 1.985 1.825 2.645 2.04 ;
RECT 2.475 1.655 2.645 1.825 ;
RECT 0.765 1.345 1.435 1.555 ;
RECT 1.625 1.345 2.305 1.555 ;
RECT 0.85 1.13 1.27 1.345 ;
RECT 0.085 0.92 1.27 1.13 ;
RECT 1.625 1.125 1.795 1.345 ;
RECT 2.475 1.245 3.175 1.655 ;
RECT 2.475 1.13 2.645 1.245 ;
RECT 0.085 0.34 0.415 0.92 ;
RECT 1.44 0.34 1.795 1.125 ;
RECT 1.985 0.92 2.645 1.13 ;
RECT 1.985 0.34 2.235 0.92 ;
END
END efs8hd_clkdlybuf4s50_2
MACRO efs8hd_dfbbn_2
CLASS CORE ;
FOREIGN efs8hd_dfbbn_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 13.8 BY 3.4 ;
PIN RESETB
PORT
LAYER li1 ;
RECT 9.25 1.37 9.73 1.655 ;
END
END RESETB
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.445 0.105 1.785 0.58 ;
RECT 3.58 0.105 3.75 0.655 ;
RECT 5.36 0.105 5.69 0.58 ;
RECT 7.275 0.105 7.535 0.655 ;
RECT 9.74 0.105 10.07 1.005 ;
RECT 10.68 0.105 10.91 1.105 ;
RECT 11.65 0.105 11.945 0.68 ;
RECT 12.515 0.105 12.795 1.105 ;
RECT 0 -0.105 12.88 0.105 ;
LAYER met1 ;
RECT 0 -0.3 12.88 0.3 ;
END
END vgnd
PIN CLKN
PORT
LAYER li1 ;
RECT 0.085 1.22 0.44 2.03 ;
END
END CLKN
PIN SETB
PORT
LAYER li1 ;
RECT 3.6 1.205 3.93 1.33 ;
RECT 3.6 0.92 4.01 1.205 ;
RECT 7.47 0.92 7.845 1.33 ;
LAYER met1 ;
RECT 3.78 1.15 4.07 1.205 ;
RECT 7.46 1.15 7.75 1.205 ;
RECT 3.78 0.975 7.75 1.15 ;
RECT 3.78 0.92 4.07 0.975 ;
RECT 7.46 0.92 7.75 0.975 ;
END
END SETB
PIN Q
PORT
LAYER li1 ;
RECT 12.115 1.805 12.345 3.08 ;
RECT 12.16 1.03 12.345 1.805 ;
RECT 12.115 0.32 12.345 1.03 ;
END
END Q
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 12.88 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.445 2.67 1.785 3.295 ;
RECT 3.42 2.755 3.8 3.295 ;
RECT 4.89 2.395 5.22 3.295 ;
RECT 7.335 2.82 7.715 3.295 ;
RECT 8.655 2.82 10.07 3.295 ;
RECT 10.68 1.83 10.91 3.295 ;
RECT 11.65 2.205 11.945 3.295 ;
RECT 12.515 1.83 12.795 3.295 ;
LAYER met1 ;
RECT 0 3.1 12.88 3.7 ;
END
END vpwr
PIN D
PORT
LAYER li1 ;
RECT 1.76 1.255 2.17 2.03 ;
END
END D
PIN QN
PORT
LAYER li1 ;
RECT 10.24 2.04 10.5 3.08 ;
RECT 10.32 0.895 10.5 2.04 ;
RECT 10.24 0.32 10.5 0.895 ;
END
END QN
OBS
LAYER li1 ;
RECT 0.085 2.455 0.345 3.08 ;
RECT 0.085 2.245 0.84 2.455 ;
RECT 0.61 1.005 0.84 2.245 ;
RECT 0.085 0.795 0.84 1.005 ;
RECT 0.085 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.24 3.08 ;
RECT 1.955 2.455 2.125 3.08 ;
RECT 2.35 2.815 3.18 3.025 ;
RECT 1.42 2.245 2.125 2.455 ;
RECT 1.42 1.03 1.59 2.245 ;
RECT 2.34 1.97 2.84 2.445 ;
RECT 1.42 0.795 2.125 1.03 ;
RECT 2.34 0.88 2.56 1.97 ;
RECT 3.01 1.755 3.18 2.815 ;
RECT 4.1 2.545 4.27 2.97 ;
RECT 6.265 2.815 7.095 3.025 ;
RECT 3.35 2.23 4.7 2.545 ;
RECT 3.35 1.97 3.6 2.23 ;
RECT 4.11 1.755 4.36 1.855 ;
RECT 3.01 1.545 4.36 1.755 ;
RECT 3.01 1.495 3.41 1.545 ;
RECT 2.74 0.805 3.07 1.27 ;
RECT 1.955 0.38 2.125 0.795 ;
RECT 3.24 0.58 3.41 1.495 ;
RECT 4.14 1.445 4.36 1.545 ;
RECT 4.53 1.33 4.7 2.23 ;
RECT 4.87 1.77 5.875 2.07 ;
RECT 6.075 1.97 6.31 2.48 ;
RECT 4.87 1.545 5.2 1.77 ;
RECT 6.55 1.63 6.755 2.38 ;
RECT 5.51 1.33 5.84 1.545 ;
RECT 4.53 1.12 5.84 1.33 ;
RECT 6.135 1.405 6.755 1.63 ;
RECT 6.925 1.755 7.095 2.815 ;
RECT 7.955 2.605 8.125 2.97 ;
RECT 7.265 2.395 10.07 2.605 ;
RECT 7.265 1.97 7.515 2.395 ;
RECT 6.925 1.545 8.275 1.755 ;
RECT 4.53 0.955 4.75 1.12 ;
RECT 4.42 0.745 4.75 0.955 ;
RECT 2.415 0.33 3.41 0.58 ;
RECT 3.92 0.53 4.25 0.68 ;
RECT 4.92 0.53 5.17 0.895 ;
RECT 6.135 0.88 6.42 1.405 ;
RECT 6.925 0.58 7.095 1.545 ;
RECT 8.055 1.345 8.275 1.545 ;
RECT 8.445 0.975 8.625 2.395 ;
RECT 8.295 0.745 8.625 0.975 ;
RECT 8.795 1.97 9.57 2.18 ;
RECT 8.795 1.155 9.07 1.97 ;
RECT 9.9 1.655 10.07 2.395 ;
RECT 11.215 1.655 11.47 3.02 ;
RECT 9.9 1.245 10.14 1.655 ;
RECT 11.215 1.245 11.99 1.655 ;
RECT 8.795 0.945 9.5 1.155 ;
RECT 3.92 0.32 5.17 0.53 ;
RECT 6.33 0.33 7.095 0.58 ;
RECT 7.795 0.53 8.125 0.68 ;
RECT 8.795 0.53 8.965 0.73 ;
RECT 7.795 0.32 8.965 0.53 ;
RECT 9.28 0.33 9.5 0.945 ;
RECT 11.215 0.32 11.47 1.245 ;
LAYER met1 ;
RECT 1.01 2.425 1.3 2.48 ;
RECT 2.4 2.425 2.69 2.48 ;
RECT 6.08 2.425 6.37 2.48 ;
RECT 1.01 2.25 6.37 2.425 ;
RECT 1.01 2.195 1.3 2.25 ;
RECT 2.4 2.195 2.69 2.25 ;
RECT 6.08 2.195 6.37 2.25 ;
RECT 5.62 2 5.91 2.055 ;
RECT 8.84 2 9.13 2.055 ;
RECT 5.62 1.825 9.13 2 ;
RECT 5.62 1.77 5.91 1.825 ;
RECT 8.84 1.77 9.13 1.825 ;
RECT 6.08 1.575 6.37 1.63 ;
RECT 2.935 1.4 6.37 1.575 ;
RECT 2.935 1.205 3.13 1.4 ;
RECT 6.08 1.345 6.37 1.4 ;
RECT 0.55 1.15 0.84 1.205 ;
RECT 2.84 1.15 3.13 1.205 ;
RECT 0.55 0.975 3.13 1.15 ;
RECT 0.55 0.92 0.84 0.975 ;
RECT 2.84 0.92 3.13 0.975 ;
END
END efs8hd_dfbbn_2
MACRO efs8hd_clkdlybuf4s15_1
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s15_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 3.21 2.2 3.595 3.08 ;
RECT 3.365 0.68 3.595 2.2 ;
RECT 3.21 0.355 3.595 0.68 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.32 0.56 1.655 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.595 0.105 0.91 0.68 ;
RECT 2.71 0.105 3.04 0.68 ;
RECT 0.595 0.085 3.04 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.595 3.295 3.04 3.315 ;
RECT 0.595 2.295 0.925 3.295 ;
RECT 2.64 2.2 3.04 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.08 0.425 3.08 ;
RECT 1.385 2.295 1.76 3.08 ;
RECT 0.085 1.87 1.215 2.08 ;
RECT 0.73 1.105 1.215 1.87 ;
RECT 0.085 0.895 1.215 1.105 ;
RECT 1.59 1.565 1.76 2.295 ;
RECT 1.93 1.99 2.41 3.08 ;
RECT 1.93 1.775 3.195 1.99 ;
RECT 1.59 1.32 2.685 1.565 ;
RECT 1.59 1.03 1.76 1.32 ;
RECT 2.855 1.105 3.195 1.775 ;
RECT 0.085 0.32 0.425 0.895 ;
RECT 1.385 0.32 1.76 1.03 ;
RECT 1.93 0.895 3.195 1.105 ;
RECT 1.93 0.32 2.26 0.895 ;
END
END efs8hd_clkdlybuf4s15_1
MACRO efs8hd_xor3_2
CLASS CORE ;
FOREIGN efs8hd_xor3_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 10.12 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 2.32 1.105 3.075 1.655 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 7.965 1.345 8.375 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 7.045 1.785 7.725 2.02 ;
RECT 7.045 1.245 7.315 1.785 ;
END
END B
PIN X
PORT
LAYER li1 ;
RECT 0.82 2.555 1.07 3.08 ;
RECT 0.545 1.8 1.07 2.555 ;
RECT 0.545 1.155 0.86 1.8 ;
RECT 0.545 0.825 1.05 1.155 ;
RECT 0.8 0.44 1.05 0.825 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.3 0.105 0.63 0.58 ;
RECT 1.22 0.105 1.47 0.655 ;
RECT 4.39 0.105 4.56 1.08 ;
RECT 8.395 0.105 8.565 0.705 ;
RECT 0.3 0.085 8.565 0.105 ;
RECT 0 -0.085 9.2 0.085 ;
LAYER met1 ;
RECT 0 -0.3 9.2 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 9.2 3.485 ;
RECT 0.3 3.295 8.65 3.315 ;
RECT 0.3 2.77 0.65 3.295 ;
RECT 1.24 2.77 1.575 3.295 ;
RECT 4.265 2.755 4.475 3.295 ;
RECT 8.315 2.845 8.65 3.295 ;
LAYER met1 ;
RECT 0 3.1 9.2 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 1.76 2.795 3.355 3.005 ;
RECT 3.57 2.795 4.095 3.005 ;
RECT 1.76 2.555 1.93 2.795 ;
RECT 3.925 2.58 4.095 2.795 ;
RECT 4.81 2.845 7.905 3.055 ;
RECT 4.81 2.58 4.98 2.845 ;
RECT 1.24 2.345 1.93 2.555 ;
RECT 2.33 2.37 3.755 2.58 ;
RECT 3.925 2.37 4.98 2.58 ;
RECT 1.24 1.655 1.41 2.345 ;
RECT 1.645 1.92 3.415 2.13 ;
RECT 1.21 1.245 1.41 1.655 ;
RECT 1.24 1.08 1.41 1.245 ;
RECT 1.24 0.87 1.81 1.08 ;
RECT 1.64 0.53 1.81 0.87 ;
RECT 1.98 0.745 2.15 1.92 ;
RECT 3.245 1.245 3.415 1.92 ;
RECT 3.585 2.12 3.755 2.37 ;
RECT 3.585 1.905 3.995 2.12 ;
RECT 3.71 1.72 3.995 1.905 ;
RECT 2.43 0.765 3.54 0.935 ;
RECT 2.85 0.53 3.2 0.57 ;
RECT 1.64 0.32 3.2 0.53 ;
RECT 3.37 0.53 3.54 0.765 ;
RECT 3.71 0.745 3.88 1.72 ;
RECT 4.165 1.505 4.335 2.37 ;
RECT 4.565 1.805 4.98 2.145 ;
RECT 4.05 1.295 4.335 1.505 ;
RECT 4.05 0.53 4.22 1.295 ;
RECT 3.37 0.32 4.22 0.53 ;
RECT 4.74 0.52 4.98 1.805 ;
RECT 5.155 0.745 5.365 2.63 ;
RECT 5.535 1.075 5.705 2.845 ;
RECT 8.82 2.63 9.115 3.08 ;
RECT 5.875 2.02 6.27 2.555 ;
RECT 6.705 2.42 9.115 2.63 ;
RECT 5.875 1.805 6.535 2.02 ;
RECT 5.875 1.245 6.195 1.595 ;
RECT 5.535 0.9 5.855 1.075 ;
RECT 6.025 0.99 6.195 1.245 ;
RECT 5.545 0.86 5.855 0.9 ;
RECT 5.155 0.565 5.375 0.745 ;
RECT 5.545 0.735 5.91 0.86 ;
RECT 5.155 0.33 5.57 0.565 ;
RECT 5.74 0.4 5.91 0.735 ;
RECT 6.365 0.53 6.535 1.805 ;
RECT 6.705 0.745 6.875 2.42 ;
RECT 8.63 2.345 9.115 2.42 ;
RECT 7.895 1.87 8.715 2.13 ;
RECT 8.545 1.655 8.715 1.87 ;
RECT 7.485 1.18 7.795 1.595 ;
RECT 8.545 1.245 8.775 1.655 ;
RECT 7.485 0.915 7.69 1.18 ;
RECT 8.545 1.13 8.715 1.245 ;
RECT 7.975 0.94 8.715 1.13 ;
RECT 7.935 0.92 8.715 0.94 ;
RECT 7.145 0.53 7.61 0.58 ;
RECT 6.365 0.32 7.61 0.53 ;
RECT 7.935 0.37 8.225 0.92 ;
RECT 8.945 0.73 9.115 2.345 ;
RECT 8.815 0.32 9.115 0.73 ;
LAYER met1 ;
RECT 3.765 2 4.055 2.055 ;
RECT 6.065 2 6.355 2.055 ;
RECT 3.765 1.825 6.355 2 ;
RECT 3.765 1.77 4.055 1.825 ;
RECT 6.065 1.77 6.355 1.825 ;
RECT 4.685 1.2 4.975 1.205 ;
RECT 6.025 1.2 6.355 1.205 ;
RECT 4.685 1.15 6.355 1.2 ;
RECT 7.445 1.15 7.735 1.205 ;
RECT 4.685 0.975 7.735 1.15 ;
RECT 4.685 0.97 6.355 0.975 ;
RECT 4.685 0.92 4.975 0.97 ;
RECT 6.025 0.92 6.355 0.97 ;
RECT 7.445 0.92 7.735 0.975 ;
RECT 5.145 0.725 5.435 0.78 ;
RECT 7.905 0.725 8.195 0.78 ;
RECT 5.145 0.55 8.195 0.725 ;
RECT 5.145 0.495 5.435 0.55 ;
RECT 7.905 0.495 8.195 0.55 ;
END
END efs8hd_xor3_2
MACRO efs8hd_o21ai_2
CLASS CORE ;
FOREIGN efs8hd_o21ai_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN B1
PORT
LAYER li1 ;
RECT 2.815 0.765 3.13 1.75 ;
END
END B1
PIN A1
PORT
LAYER li1 ;
RECT 0.12 1.785 2.095 2.02 ;
RECT 0.12 1.305 0.435 1.785 ;
RECT 1.6 1.345 2.095 1.785 ;
END
END A1
PIN A2
PORT
LAYER li1 ;
RECT 0.605 1.345 1.42 1.615 ;
END
END A2
PIN Y
PORT
LAYER li1 ;
RECT 0.995 2.455 1.295 2.655 ;
RECT 2.41 2.455 2.645 3.08 ;
RECT 0.995 2.23 2.645 2.455 ;
RECT 2.435 0.745 2.645 2.23 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 0.615 0.105 0.785 0.68 ;
RECT 1.525 0.105 1.695 0.68 ;
RECT 0.615 0.085 1.695 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.105 3.295 3.125 3.315 ;
RECT 0.105 2.23 0.435 3.295 ;
RECT 1.91 2.72 2.24 3.295 ;
RECT 2.815 1.965 3.125 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.605 2.87 1.715 3.08 ;
RECT 0.605 2.23 0.825 2.87 ;
RECT 1.525 2.67 1.715 2.87 ;
RECT 0.105 0.895 2.265 1.105 ;
RECT 0.105 0.32 0.435 0.895 ;
RECT 0.965 0.32 1.295 0.895 ;
RECT 1.935 0.53 2.265 0.895 ;
RECT 2.795 0.53 3.125 0.595 ;
RECT 1.935 0.32 3.125 0.53 ;
END
END efs8hd_o21ai_2
MACRO efs8hd_clkinv_16
CLASS CORE ;
FOREIGN efs8hd_clkinv_16 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.96 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.345 1.105 2.155 1.595 ;
RECT 8.93 1.12 10.71 1.595 ;
LAYER met1 ;
RECT 1.465 1.575 2.215 1.63 ;
RECT 9.285 1.575 10.035 1.63 ;
RECT 1.465 1.4 10.035 1.575 ;
RECT 1.465 1.345 2.215 1.4 ;
RECT 9.285 1.345 10.035 1.4 ;
END
END A
PIN Y
PORT
LAYER li1 ;
RECT 0.575 2.08 0.83 3.08 ;
RECT 1.435 2.08 1.69 3.065 ;
RECT 2.325 2.08 2.55 3.08 ;
RECT 3.155 2.08 3.41 3.065 ;
RECT 4.015 2.08 4.255 3.065 ;
RECT 4.905 2.08 5.28 3.065 ;
RECT 5.925 2.08 6.175 3.065 ;
RECT 6.785 2.08 7.035 3.065 ;
RECT 7.645 2.08 7.895 3.065 ;
RECT 8.505 2.08 8.755 3.065 ;
RECT 9.365 2.08 9.605 3.065 ;
RECT 10.225 2.08 10.48 3.065 ;
RECT 0.575 1.82 10.48 2.08 ;
RECT 2.325 1.77 8.755 1.82 ;
RECT 2.325 0.35 2.55 1.77 ;
RECT 3.155 0.35 3.41 1.77 ;
RECT 4.015 0.35 4.255 1.77 ;
RECT 4.905 0.35 5.255 1.77 ;
RECT 5.925 0.35 6.175 1.77 ;
RECT 6.785 0.35 7.035 1.77 ;
RECT 7.645 0.35 7.895 1.77 ;
RECT 8.505 0.35 8.755 1.77 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 1.855 0.105 2.125 0.765 ;
RECT 2.72 0.105 2.985 0.765 ;
RECT 3.58 0.105 3.845 0.765 ;
RECT 4.465 0.105 4.73 0.765 ;
RECT 5.49 0.105 5.755 0.765 ;
RECT 6.35 0.105 6.575 0.765 ;
RECT 7.21 0.105 7.475 0.765 ;
RECT 8.07 0.105 8.335 0.765 ;
RECT 8.93 0.105 9.195 0.765 ;
RECT 1.855 0.085 9.195 0.105 ;
RECT 0 -0.085 11.04 0.085 ;
LAYER met1 ;
RECT 0 -0.3 11.04 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 11.04 3.485 ;
RECT 0.14 3.295 10.91 3.315 ;
RECT 0.14 1.87 0.405 3.295 ;
RECT 1 2.295 1.26 3.295 ;
RECT 1.865 2.295 2.12 3.295 ;
RECT 2.72 2.295 2.98 3.295 ;
RECT 3.585 2.295 3.84 3.295 ;
RECT 4.465 2.295 4.72 3.295 ;
RECT 5.49 2.65 5.75 3.295 ;
RECT 5.49 2.295 5.745 2.65 ;
RECT 6.355 2.295 6.61 3.295 ;
RECT 7.215 2.295 7.47 3.295 ;
RECT 8.075 2.295 8.33 3.295 ;
RECT 8.935 2.295 9.19 3.295 ;
RECT 9.795 2.295 10.05 3.295 ;
RECT 10.65 2.295 10.91 3.295 ;
LAYER met1 ;
RECT 0 3.1 11.04 3.7 ;
END
END vpwr
END efs8hd_clkinv_16
MACRO efs8hd_clkbuf_16
CLASS CORE ;
FOREIGN efs8hd_clkbuf_16 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 10.12 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.085 0.765 0.4 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 2.28 2.17 2.54 3.075 ;
RECT 3.14 2.17 3.4 3.075 ;
RECT 4 2.17 4.26 3.075 ;
RECT 4.86 2.17 5.12 3.075 ;
RECT 5.705 2.17 5.965 3.075 ;
RECT 6.565 2.17 6.825 3.075 ;
RECT 7.425 2.17 7.685 3.075 ;
RECT 2.28 2.15 7.685 2.17 ;
RECT 8.295 2.15 8.585 3.075 ;
RECT 2.28 1.87 9.025 2.15 ;
RECT 7.86 1.13 9.025 1.87 ;
RECT 2.28 0.92 9.025 1.13 ;
RECT 2.28 0.35 2.54 0.92 ;
RECT 3.14 0.35 3.4 0.92 ;
RECT 4 0.35 4.26 0.92 ;
RECT 4.845 0.35 5.12 0.92 ;
RECT 5.705 0.35 5.965 0.92 ;
RECT 6.565 0.35 6.825 0.92 ;
RECT 7.425 0.35 7.685 0.92 ;
RECT 8.295 0.35 8.555 0.92 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.085 0.105 0.425 0.595 ;
RECT 0.99 0.105 1.25 0.765 ;
RECT 1.85 0.105 2.11 0.805 ;
RECT 2.71 0.105 2.97 0.705 ;
RECT 3.57 0.105 3.83 0.705 ;
RECT 4.43 0.105 4.675 0.705 ;
RECT 5.29 0.105 5.535 0.705 ;
RECT 6.145 0.105 6.395 0.705 ;
RECT 7.005 0.105 7.255 0.705 ;
RECT 7.865 0.105 8.125 0.705 ;
RECT 8.725 0.105 9.025 0.705 ;
RECT 0.085 0.085 9.025 0.105 ;
RECT 0 -0.085 9.2 0.085 ;
LAYER met1 ;
RECT 0 -0.3 9.2 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 9.2 3.485 ;
RECT 0.095 3.295 9.025 3.315 ;
RECT 0.095 2.28 0.39 3.295 ;
RECT 0.99 2.28 1.25 3.295 ;
RECT 1.85 3.29 8.125 3.295 ;
RECT 1.85 2.295 2.11 3.29 ;
RECT 2.71 2.38 2.97 3.29 ;
RECT 3.57 2.38 3.83 3.29 ;
RECT 4.43 2.38 4.69 3.29 ;
RECT 5.29 2.38 5.535 3.29 ;
RECT 6.15 2.38 6.395 3.29 ;
RECT 7.01 2.38 7.255 3.29 ;
RECT 7.87 2.38 8.125 3.29 ;
RECT 8.755 2.365 9.025 3.295 ;
LAYER met1 ;
RECT 0 3.1 9.2 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.595 1.655 0.815 3.08 ;
RECT 1.43 1.655 1.68 3.075 ;
RECT 0.595 1.345 7.69 1.655 ;
RECT 0.595 0.33 0.82 1.345 ;
RECT 1.43 0.33 1.68 1.345 ;
END
END efs8hd_clkbuf_16
MACRO efs8hd_a21oi_2
CLASS CORE ;
FOREIGN efs8hd_a21oi_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.14 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 2.315 0.935 2.615 2.645 ;
RECT 0.955 0.765 2.615 0.935 ;
RECT 0.955 0.32 1.3 0.765 ;
RECT 2.295 0.32 2.615 0.765 ;
END
END Y
PIN A1
PORT
LAYER li1 ;
RECT 0.815 1.105 1.425 1.615 ;
END
END A1
PIN B1
PORT
LAYER li1 ;
RECT 2.8 1.105 3.075 2.03 ;
END
END B1
PIN A2
PORT
LAYER li1 ;
RECT 0.145 1.785 1.93 2.095 ;
RECT 0.145 1.295 0.645 1.785 ;
RECT 1.605 1.555 1.93 1.785 ;
RECT 1.605 1.345 1.935 1.555 ;
END
END A2
PIN vgnd
PORT
LAYER li1 ;
RECT 0.1 0.105 0.395 1.08 ;
RECT 1.76 0.105 2.09 0.555 ;
RECT 2.795 0.105 3.125 0.935 ;
RECT 0.1 0.085 3.125 0.105 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.54 3.295 1.645 3.315 ;
RECT 0.54 2.845 0.87 3.295 ;
RECT 1.475 2.745 1.645 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.11 2.63 0.37 3.08 ;
RECT 1.05 2.63 1.22 3.08 ;
RECT 0.11 2.53 1.22 2.63 ;
RECT 1.815 2.855 3.09 3.08 ;
RECT 1.815 2.53 2.145 2.855 ;
RECT 0.11 2.32 2.145 2.53 ;
RECT 2.785 2.245 3.09 2.855 ;
END
END efs8hd_a21oi_2
MACRO efs8hd_dlrtn_2
CLASS CORE ;
FOREIGN efs8hd_dlrtn_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 7.36 BY 3.4 ;
PIN RESETB
PORT
LAYER li1 ;
RECT 4.48 1.245 5.17 1.655 ;
END
END RESETB
PIN Q
PORT
LAYER li1 ;
RECT 5.655 2.345 5.925 3.08 ;
RECT 5.755 1.875 5.925 2.345 ;
RECT 5.755 1.78 6.355 1.875 ;
RECT 5.76 1.77 6.355 1.78 ;
RECT 5.765 1.765 6.355 1.77 ;
RECT 5.775 1.73 6.355 1.765 ;
RECT 5.785 1.115 6.355 1.73 ;
RECT 5.77 1.08 6.355 1.115 ;
RECT 5.755 0.955 6.355 1.08 ;
RECT 5.755 0.605 5.925 0.955 ;
RECT 5.595 0.32 5.925 0.605 ;
END
END Q
PIN D
PORT
LAYER li1 ;
RECT 1.46 1.195 1.79 1.655 ;
END
END D
PIN GATEN
PORT
LAYER li1 ;
RECT 0.085 1.23 0.33 2.03 ;
END
END GATEN
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.875 0.105 2.205 0.555 ;
RECT 3.735 0.105 4.07 0.665 ;
RECT 5.095 0.105 5.425 0.605 ;
RECT 6.095 0.105 6.355 0.745 ;
RECT 0 -0.105 6.44 0.105 ;
LAYER met1 ;
RECT 0 -0.3 6.44 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 6.44 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.955 2.295 2.27 3.295 ;
RECT 3.8 2.67 4.11 3.295 ;
RECT 4.28 2.67 4.56 3.295 ;
RECT 5.09 2.345 5.46 3.295 ;
RECT 6.095 2.09 6.355 3.295 ;
LAYER met1 ;
RECT 0 3.1 6.44 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 0.175 2.245 0.78 2.455 ;
RECT 0.61 1.75 0.78 2.245 ;
RECT 1.015 2.105 1.24 3.08 ;
RECT 0.61 1.34 0.84 1.75 ;
RECT 0.61 1.005 0.78 1.34 ;
RECT 0.175 0.795 0.78 1.005 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.185 2.105 ;
RECT 1.455 2.08 1.785 3.02 ;
RECT 2.775 2.82 3.605 3.03 ;
RECT 1.455 1.87 2.14 2.08 ;
RECT 1.96 1.37 2.14 1.87 ;
RECT 2.47 1.695 2.755 2.505 ;
RECT 2.925 1.77 3.265 2.495 ;
RECT 2.925 1.43 3.095 1.77 ;
RECT 3.435 1.655 3.605 2.82 ;
RECT 4.73 2.33 4.92 3.08 ;
RECT 3.82 2.13 4.92 2.33 ;
RECT 3.82 1.92 5.585 2.13 ;
RECT 5.415 1.655 5.585 1.92 ;
RECT 3.435 1.555 4.31 1.655 ;
RECT 1.96 0.98 2.34 1.37 ;
RECT 1.535 0.955 2.34 0.98 ;
RECT 1.535 0.77 2.14 0.955 ;
RECT 2.675 0.88 3.095 1.43 ;
RECT 3.33 1.28 4.31 1.555 ;
RECT 1.535 0.43 1.705 0.77 ;
RECT 3.33 0.67 3.5 1.28 ;
RECT 5.35 1.245 5.615 1.655 ;
RECT 5.415 1.03 5.585 1.245 ;
RECT 2.81 0.455 3.5 0.67 ;
RECT 4.24 0.82 5.585 1.03 ;
RECT 4.24 0.32 4.59 0.82 ;
LAYER met1 ;
RECT 1.01 2.425 1.3 2.48 ;
RECT 2.41 2.425 2.7 2.48 ;
RECT 1.01 2.25 2.7 2.425 ;
RECT 1.01 2.195 1.3 2.25 ;
RECT 2.41 2.195 2.7 2.25 ;
RECT 0.55 2 0.84 2.055 ;
RECT 2.87 2 3.16 2.055 ;
RECT 0.55 1.825 3.16 2 ;
RECT 0.55 1.77 0.84 1.825 ;
RECT 2.87 1.77 3.16 1.825 ;
END
END efs8hd_dlrtn_2
MACRO efs8hd_nand3_2
CLASS CORE ;
FOREIGN efs8hd_nand3_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN Y
PORT
LAYER li1 ;
RECT 0.515 2.08 0.845 3.08 ;
RECT 1.355 2.08 1.685 3.08 ;
RECT 2.715 2.08 3.045 3.08 ;
RECT 0.515 1.805 3.045 2.08 ;
RECT 0.515 0.795 0.845 1.805 ;
END
END Y
PIN A
PORT
LAYER li1 ;
RECT 0.09 1.105 0.33 1.655 ;
END
END A
PIN B
PORT
LAYER li1 ;
RECT 1.065 1.345 2.16 1.615 ;
END
END B
PIN C
PORT
LAYER li1 ;
RECT 2.445 1.345 3.595 1.615 ;
END
END C
PIN vgnd
PORT
LAYER li1 ;
RECT 2.295 0.105 2.625 0.58 ;
RECT 3.215 0.105 3.595 1.105 ;
RECT 2.295 0.085 3.595 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.09 3.295 3.595 3.315 ;
RECT 0.09 1.87 0.345 3.295 ;
RECT 1.015 2.295 1.185 3.295 ;
RECT 1.855 2.295 2.545 3.295 ;
RECT 3.215 1.805 3.595 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 0.58 0.345 0.935 ;
RECT 1.355 0.795 3.045 1.13 ;
RECT 0.09 0.37 2.105 0.58 ;
END
END efs8hd_nand3_2
MACRO efs8hd_einvp_4
CLASS CORE ;
FOREIGN efs8hd_einvp_4 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 7.245 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 3.74 1.275 4.975 1.59 ;
END
END A
PIN TE
PORT
LAYER li1 ;
RECT 0.085 1.24 0.33 2.015 ;
END
END TE
PIN Z
PORT
LAYER li1 ;
RECT 3.19 2.015 3.52 2.655 ;
RECT 4.03 2.015 4.36 2.655 ;
RECT 3.19 1.805 4.36 2.015 ;
RECT 3.19 1.06 3.57 1.805 ;
RECT 3.19 0.79 4.975 1.06 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.085 0.845 0.605 ;
RECT 1.375 0.085 1.705 0.605 ;
RECT 2.215 0.085 2.555 0.605 ;
RECT 0 -0.085 5.06 0.085 ;
LAYER met1 ;
RECT 0 -0.3 5.06 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 5.06 3.485 ;
RECT 0.515 2.655 0.875 3.315 ;
RECT 1.455 2.365 1.785 3.315 ;
RECT 2.295 2.365 2.655 3.315 ;
LAYER met1 ;
RECT 0 3.1 5.06 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.44 0.345 3.08 ;
RECT 0.085 2.23 0.875 2.44 ;
RECT 0.5 1.655 0.875 2.23 ;
RECT 1.075 2.155 1.285 3.08 ;
RECT 1.955 2.155 2.125 3.08 ;
RECT 2.825 2.865 4.975 3.08 ;
RECT 2.825 2.155 2.995 2.865 ;
RECT 3.69 2.23 3.86 2.865 ;
RECT 1.075 1.94 2.995 2.155 ;
RECT 4.53 1.805 4.975 2.865 ;
RECT 0.5 1.24 3.02 1.655 ;
RECT 0.5 1.03 0.695 1.24 ;
RECT 0.085 0.815 0.695 1.03 ;
RECT 1.035 0.815 3.02 1.03 ;
RECT 0.085 0.315 0.345 0.815 ;
RECT 1.035 0.315 1.205 0.815 ;
RECT 1.875 0.315 2.045 0.815 ;
RECT 2.735 0.58 3.02 0.815 ;
RECT 2.735 0.315 4.975 0.58 ;
END
END efs8hd_einvp_4
MACRO efs8hd_or3_2
CLASS CORE ;
FOREIGN efs8hd_or3_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 3.68 BY 3.4 ;
PIN C
PORT
LAYER li1 ;
RECT 0.085 1.105 0.435 1.655 ;
END
END C
PIN A
PORT
LAYER li1 ;
RECT 0.605 1.655 0.83 2.02 ;
RECT 0.605 1.245 1.43 1.655 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 1.94 1.87 2.215 3.08 ;
RECT 2.045 0.95 2.215 1.87 ;
RECT 1.94 0.52 2.215 0.95 ;
END
END X
PIN B
PORT
LAYER li1 ;
RECT 0.085 2.655 1.28 3.02 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.53 0.105 0.86 0.595 ;
RECT 1.37 0.105 1.75 0.595 ;
RECT 2.385 0.105 2.675 1.145 ;
RECT 0.53 0.085 2.675 0.105 ;
RECT 0 -0.085 2.76 0.085 ;
LAYER met1 ;
RECT 0 -0.3 2.76 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 2.76 3.485 ;
RECT 1.45 3.295 2.675 3.315 ;
RECT 1.45 2.295 1.73 3.295 ;
RECT 2.385 1.79 2.675 3.295 ;
LAYER met1 ;
RECT 0 3.1 2.76 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.105 2.23 1.27 2.445 ;
RECT 0.105 1.87 0.435 2.23 ;
RECT 1.1 2.08 1.27 2.23 ;
RECT 1.1 1.87 1.77 2.08 ;
RECT 1.6 1.655 1.77 1.87 ;
RECT 1.6 1.245 1.875 1.655 ;
RECT 1.6 0.935 1.77 1.245 ;
RECT 0.105 0.765 1.77 0.935 ;
RECT 0.105 0.38 0.36 0.765 ;
RECT 1.03 0.38 1.2 0.765 ;
END
END efs8hd_or3_2
MACRO efs8hd_dlrbp_2
CLASS CORE ;
FOREIGN efs8hd_dlrbp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 9.2 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 5.68 2.075 5.93 3.08 ;
RECT 5.68 1.87 6.065 2.075 ;
RECT 5.79 1.655 6.065 1.87 ;
RECT 5.79 1.105 6.36 1.655 ;
RECT 5.79 1.045 6.15 1.105 ;
RECT 5.68 0.83 6.15 1.045 ;
RECT 5.68 0.415 5.85 0.83 ;
END
END Q
PIN RESETB
PORT
LAYER li1 ;
RECT 4.4 1.245 5.15 1.655 ;
END
END RESETB
PIN QN
PORT
LAYER li1 ;
RECT 7.515 2.005 7.765 3.08 ;
RECT 7.595 1.655 7.765 2.005 ;
RECT 7.595 1.32 8.195 1.655 ;
RECT 7.595 1.03 7.765 1.32 ;
RECT 7.515 0.32 7.765 1.03 ;
END
END QN
PIN D
PORT
LAYER li1 ;
RECT 1.46 1.195 1.79 1.655 ;
END
END D
PIN GATE
PORT
LAYER li1 ;
RECT 0.085 1.23 0.33 2.03 ;
END
END GATE
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.875 0.105 2.205 0.555 ;
RECT 3.74 0.105 4.07 0.665 ;
RECT 5.11 0.105 5.49 0.605 ;
RECT 6.02 0.105 6.36 0.58 ;
RECT 7.035 0.105 7.34 0.68 ;
RECT 7.935 0.105 8.195 1.105 ;
RECT 0 -0.105 8.28 0.105 ;
LAYER met1 ;
RECT 0 -0.3 8.28 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 8.28 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.955 2.295 2.27 3.295 ;
RECT 3.755 2.67 4.6 3.295 ;
RECT 5.11 2.345 5.49 3.295 ;
RECT 6.1 2.29 6.36 3.295 ;
RECT 7.045 2.295 7.34 3.295 ;
RECT 7.935 1.87 8.195 3.295 ;
LAYER met1 ;
RECT 0 3.1 8.28 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.455 0.345 3.08 ;
RECT 0.085 2.245 0.78 2.455 ;
RECT 0.61 1.75 0.78 2.245 ;
RECT 1.015 2.105 1.24 3.08 ;
RECT 0.61 1.34 0.84 1.75 ;
RECT 0.61 1.005 0.78 1.34 ;
RECT 0.085 0.795 0.78 1.005 ;
RECT 0.085 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.185 2.105 ;
RECT 1.455 2.08 1.785 3.02 ;
RECT 2.745 2.82 3.585 3.03 ;
RECT 3.27 2.655 3.585 2.82 ;
RECT 3.305 2.595 3.585 2.655 ;
RECT 3.395 2.555 3.585 2.595 ;
RECT 3.395 2.52 3.605 2.555 ;
RECT 2.925 2.38 3.125 2.495 ;
RECT 3.415 2.49 3.605 2.52 ;
RECT 3.42 2.47 3.605 2.49 ;
RECT 3.43 2.45 3.605 2.47 ;
RECT 1.455 1.87 2.14 2.08 ;
RECT 1.97 1.37 2.14 1.87 ;
RECT 2.47 1.695 2.755 2.105 ;
RECT 2.925 1.97 3.265 2.38 ;
RECT 1.97 0.98 2.34 1.37 ;
RECT 2.925 1.295 3.095 1.97 ;
RECT 3.435 1.655 3.605 2.45 ;
RECT 4.77 2.33 4.94 3.045 ;
RECT 3.84 2.13 4.94 2.33 ;
RECT 3.84 1.92 5.51 2.13 ;
RECT 5.32 1.655 5.51 1.92 ;
RECT 6.535 1.655 6.87 3.08 ;
RECT 3.435 1.455 4.2 1.655 ;
RECT 1.535 0.955 2.34 0.98 ;
RECT 1.535 0.77 2.14 0.955 ;
RECT 2.715 0.88 3.095 1.295 ;
RECT 3.33 1.245 4.2 1.455 ;
RECT 5.32 1.245 5.62 1.655 ;
RECT 6.535 1.245 7.425 1.655 ;
RECT 1.535 0.43 1.705 0.77 ;
RECT 3.33 0.67 3.5 1.245 ;
RECT 5.32 1.03 5.51 1.245 ;
RECT 2.77 0.455 3.5 0.67 ;
RECT 4.27 0.82 5.51 1.03 ;
RECT 4.27 0.52 4.57 0.82 ;
RECT 6.535 0.32 6.865 1.245 ;
LAYER met1 ;
RECT 1.01 2.425 1.3 2.48 ;
RECT 2.87 2.425 3.16 2.48 ;
RECT 1.01 2.25 3.16 2.425 ;
RECT 1.01 2.195 1.3 2.25 ;
RECT 2.87 2.195 3.16 2.25 ;
RECT 0.55 2 0.84 2.055 ;
RECT 2.41 2 2.7 2.055 ;
RECT 0.55 1.825 2.7 2 ;
RECT 0.55 1.77 0.84 1.825 ;
RECT 2.41 1.77 2.7 1.825 ;
END
END efs8hd_dlrbp_2
MACRO efs8hd_tap_1
CLASS CORE ;
FOREIGN efs8hd_tap_1 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 0.4600 BY 3.4000 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.0000 -0.0850 0.4600 0.0850 ;
LAYER met1 ;
RECT 0.0000 -0.3000 0.4600 0.3000 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0.0000 3.3150 0.4600 3.4850 ;
LAYER met1 ;
RECT 0.0000 3.1000 0.4600 3.7000 ;
END
END vpwr
PIN vnb
PORT
LAYER li1 ;
RECT 0.0850 0.3300 0.3750 1.0100 ;
END
END vnb
PIN vpb
PORT
LAYER li1 ;
RECT 0.0850 1.8350 0.3750 3.0650 ;
END
END vpb
END efs8hd_tap_1
MACRO efs8hd_dfxbp_2
CLASS CORE ;
FOREIGN efs8hd_dfxbp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 10.58 BY 3.4 ;
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.455 0.105 1.705 0.68 ;
RECT 3.4 0.105 3.77 0.73 ;
RECT 5.585 0.105 5.795 0.77 ;
RECT 6.56 0.105 6.73 0.87 ;
RECT 7.4 0.105 7.57 0.75 ;
RECT 8.39 0.105 8.72 1.03 ;
RECT 9.315 0.105 9.565 1.13 ;
RECT 0 -0.105 9.66 0.105 ;
LAYER met1 ;
RECT 0 -0.3 9.66 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 9.66 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.44 2.72 1.705 3.295 ;
RECT 3.61 2.295 3.78 3.295 ;
RECT 5.49 2.67 5.805 3.295 ;
RECT 6.55 2.03 6.72 3.295 ;
RECT 7.39 2.15 7.565 3.295 ;
RECT 8.425 1.87 8.64 3.295 ;
RECT 9.315 1.87 9.565 3.295 ;
LAYER met1 ;
RECT 0 3.1 9.66 3.7 ;
END
END vpwr
PIN QN
PORT
LAYER li1 ;
RECT 8.81 1.87 9.145 3.08 ;
RECT 8.93 1.105 9.145 1.87 ;
RECT 8.89 0.33 9.145 1.105 ;
END
END QN
PIN D
PORT
LAYER li1 ;
RECT 1.37 0.895 1.65 2.08 ;
END
END D
PIN CLK
PORT
LAYER li1 ;
RECT 0.09 1.22 0.44 2.03 ;
END
END CLK
PIN Q
PORT
LAYER li1 ;
RECT 6.89 1.97 7.22 3.025 ;
RECT 6.89 1.87 7.3 1.97 ;
RECT 7.065 1.805 7.3 1.87 ;
RECT 7.11 1.08 7.3 1.805 ;
RECT 7.055 1.03 7.3 1.08 ;
RECT 6.9 0.925 7.3 1.03 ;
RECT 6.9 0.38 7.23 0.925 ;
END
END Q
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 0.175 2.245 0.84 2.455 ;
RECT 0.61 1.005 0.84 2.245 ;
RECT 0.175 0.795 0.84 1.005 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.2 3.08 ;
RECT 1.875 2.55 2.125 3.08 ;
RECT 2.335 2.74 3.44 2.95 ;
RECT 1.82 2.39 2.125 2.55 ;
RECT 1.82 1.005 1.99 2.39 ;
RECT 2.16 1.405 2.4 2.15 ;
RECT 2.57 2.07 3.1 2.525 ;
RECT 2.57 1.195 2.74 2.07 ;
RECT 3.27 1.97 3.44 2.74 ;
RECT 3.95 2.67 4.2 3.08 ;
RECT 4.425 2.705 5.31 2.92 ;
RECT 3.27 1.855 3.78 1.97 ;
RECT 1.82 0.845 2.045 1.005 ;
RECT 2.215 0.92 2.74 1.195 ;
RECT 2.91 1.645 3.78 1.855 ;
RECT 1.875 0.67 2.045 0.845 ;
RECT 2.91 0.67 3.08 1.645 ;
RECT 3.61 1.555 3.78 1.645 ;
RECT 3.29 1.33 3.49 1.37 ;
RECT 3.95 1.33 4.12 2.67 ;
RECT 4.29 1.555 4.48 2.455 ;
RECT 3.29 0.955 4.12 1.33 ;
RECT 4.65 1.295 4.97 2.495 ;
RECT 1.875 0.455 2.21 0.67 ;
RECT 2.405 0.455 3.08 0.67 ;
RECT 3.95 0.67 4.12 0.955 ;
RECT 4.505 0.88 4.97 1.295 ;
RECT 5.14 1.655 5.31 2.705 ;
RECT 6.04 2.38 6.38 3.08 ;
RECT 5.48 1.915 6.38 2.38 ;
RECT 7.905 2.145 8.235 3.055 ;
RECT 6.19 1.655 6.38 1.915 ;
RECT 7.965 1.655 8.235 2.145 ;
RECT 5.14 1.245 6.02 1.655 ;
RECT 6.19 1.245 6.94 1.655 ;
RECT 7.965 1.245 8.76 1.655 ;
RECT 5.14 0.67 5.31 1.245 ;
RECT 6.19 1.03 6.39 1.245 ;
RECT 3.95 0.455 4.355 0.67 ;
RECT 4.525 0.455 5.31 0.67 ;
RECT 6.06 0.375 6.39 1.03 ;
RECT 7.965 0.77 8.165 1.245 ;
RECT 7.905 0.43 8.165 0.77 ;
LAYER met1 ;
RECT 0.57 2.425 0.86 2.48 ;
RECT 2.67 2.425 2.96 2.48 ;
RECT 4.24 2.425 4.53 2.48 ;
RECT 0.57 2.25 4.53 2.425 ;
RECT 0.57 2.195 0.86 2.25 ;
RECT 2.67 2.195 2.96 2.25 ;
RECT 4.24 2.195 4.53 2.25 ;
RECT 0.965 2 1.255 2.055 ;
RECT 2.155 2 2.445 2.055 ;
RECT 4.675 2 4.965 2.055 ;
RECT 0.965 1.825 4.965 2 ;
RECT 0.965 1.77 1.255 1.825 ;
RECT 2.155 1.77 2.445 1.825 ;
RECT 4.675 1.77 4.965 1.825 ;
END
END efs8hd_dfxbp_2
MACRO efs8hd_sdfstp_2
CLASS CORE ;
FOREIGN efs8hd_sdfstp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 13.8 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 12.035 1.87 12.365 3.065 ;
RECT 12.145 1.03 12.365 1.87 ;
RECT 12.035 0.32 12.365 1.03 ;
END
END Q
PIN SCD
PORT
LAYER li1 ;
RECT 0.085 0.955 0.34 2.095 ;
END
END SCD
PIN D
PORT
LAYER li1 ;
RECT 1.05 0.955 1.335 2.095 ;
END
END D
PIN CLK
PORT
LAYER li1 ;
RECT 2.905 2.02 3.085 2.45 ;
RECT 2.905 1.32 3.565 2.02 ;
RECT 2.905 0.905 3.1 1.32 ;
END
END CLK
PIN SCE
PORT
LAYER li1 ;
RECT 0.54 0.955 0.82 2.095 ;
RECT 2.37 1.345 2.7 2 ;
LAYER met1 ;
RECT 0.545 1.575 0.835 1.63 ;
RECT 2.385 1.575 2.675 1.63 ;
RECT 0.545 1.4 2.675 1.575 ;
RECT 0.545 1.345 0.835 1.4 ;
RECT 2.385 1.345 2.675 1.4 ;
END
END SCE
PIN SETB
PORT
LAYER li1 ;
RECT 6.585 1.785 7.065 2.295 ;
RECT 8.88 1.93 9.945 2.155 ;
RECT 8.88 1.78 9.135 1.93 ;
LAYER met1 ;
RECT 6.58 2 6.87 2.055 ;
RECT 8.88 2 9.17 2.055 ;
RECT 6.58 1.825 9.17 2 ;
RECT 6.58 1.77 6.87 1.825 ;
RECT 8.88 1.77 9.17 1.825 ;
END
END SETB
PIN vgnd
PORT
LAYER li1 ;
RECT 0.085 0.105 0.7 0.745 ;
RECT 1.825 0.105 2.09 0.68 ;
RECT 2.69 0.105 3.1 0.695 ;
RECT 3.625 0.105 3.955 0.68 ;
RECT 5.61 0.105 6.095 0.58 ;
RECT 6.705 0.105 7.715 1.005 ;
RECT 10.115 0.105 10.365 0.68 ;
RECT 11.57 0.105 11.865 1.03 ;
RECT 12.535 0.105 12.795 1.105 ;
RECT 0.085 0.085 12.795 0.105 ;
RECT 0 -0.085 12.88 0.085 ;
LAYER met1 ;
RECT 0 -0.3 12.88 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 12.88 3.485 ;
RECT 0.515 3.295 12.795 3.315 ;
RECT 0.515 2.745 0.785 3.295 ;
RECT 2.69 2.675 2.985 3.295 ;
RECT 3.595 2.845 3.925 3.295 ;
RECT 5.945 2.845 6.33 3.295 ;
RECT 7.06 2.655 8.015 3.295 ;
RECT 9.16 2.795 9.49 3.295 ;
RECT 10.155 2.795 10.485 3.295 ;
RECT 11.57 2.24 11.82 3.295 ;
RECT 12.535 1.87 12.795 3.295 ;
LAYER met1 ;
RECT 0 3.1 12.88 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.53 0.345 3.08 ;
RECT 0.955 2.82 2.045 3.08 ;
RECT 0.955 2.53 1.125 2.82 ;
RECT 2.27 2.605 2.52 3.08 ;
RECT 0.085 2.305 1.125 2.53 ;
RECT 1.295 2.305 1.695 2.605 ;
RECT 1.505 0.89 1.695 2.305 ;
RECT 1.865 2.215 2.52 2.605 ;
RECT 3.255 2.5 3.425 2.905 ;
RECT 4.095 2.67 4.44 3.08 ;
RECT 3.255 2.49 3.985 2.5 ;
RECT 3.255 2.29 3.995 2.49 ;
RECT 1.865 1.13 2.2 2.215 ;
RECT 1.865 0.895 2.52 1.13 ;
RECT 3.735 1.105 3.995 2.29 ;
RECT 1.505 0.88 1.675 0.89 ;
RECT 1.495 0.83 1.675 0.88 ;
RECT 1.475 0.825 1.675 0.83 ;
RECT 1.475 0.805 1.67 0.825 ;
RECT 1.46 0.795 1.665 0.805 ;
RECT 1.445 0.79 1.665 0.795 ;
RECT 1.44 0.775 1.665 0.79 ;
RECT 1.43 0.77 1.66 0.775 ;
RECT 1.42 0.765 1.66 0.77 ;
RECT 1.405 0.755 1.66 0.765 ;
RECT 1.395 0.75 1.66 0.755 ;
RECT 1.38 0.745 1.66 0.75 ;
RECT 0.87 0.72 1.65 0.745 ;
RECT 0.87 0.695 1.64 0.72 ;
RECT 0.87 0.32 1.625 0.695 ;
RECT 2.26 0.32 2.52 0.895 ;
RECT 3.27 0.895 3.995 1.105 ;
RECT 4.165 1.775 4.44 2.67 ;
RECT 4.615 2.02 4.83 3.08 ;
RECT 5.035 2.67 5.755 3.08 ;
RECT 4.615 1.99 4.915 2.02 ;
RECT 4.66 1.805 4.915 1.99 ;
RECT 5.205 1.97 5.415 2.445 ;
RECT 4.165 1.365 4.49 1.775 ;
RECT 3.27 0.32 3.455 0.895 ;
RECT 4.165 0.73 4.335 1.365 ;
RECT 4.66 1.15 4.83 1.805 ;
RECT 5.585 1.745 5.755 2.67 ;
RECT 6.605 2.635 6.82 3.065 ;
RECT 8.185 2.655 8.99 3.075 ;
RECT 5.925 2.465 6.82 2.635 ;
RECT 8.82 2.58 8.99 2.655 ;
RECT 9.66 2.58 9.965 3.065 ;
RECT 5.925 1.97 6.095 2.465 ;
RECT 7.235 2.09 8.135 2.445 ;
RECT 5.085 1.655 5.755 1.745 ;
RECT 5.085 1.615 6.475 1.655 ;
RECT 7.355 1.615 7.715 1.655 ;
RECT 5.085 1.595 7.715 1.615 ;
RECT 4.125 0.32 4.335 0.73 ;
RECT 4.505 0.32 4.83 1.15 ;
RECT 5 1.445 7.715 1.595 ;
RECT 5 0.32 5.44 1.445 ;
RECT 5.645 1.005 5.975 1.27 ;
RECT 6.305 1.22 7.715 1.445 ;
RECT 7.885 1.13 8.135 2.09 ;
RECT 8.425 1.345 8.65 2.38 ;
RECT 8.82 2.37 10.485 2.58 ;
RECT 10.155 2.005 10.485 2.37 ;
RECT 10.655 1.705 10.915 3.08 ;
RECT 8.82 1.13 9.105 1.57 ;
RECT 5.645 0.795 6.535 1.005 ;
RECT 7.885 0.9 9.105 1.13 ;
RECT 9.32 1.495 10.915 1.705 ;
RECT 9.32 1.07 9.53 1.495 ;
RECT 9.71 0.98 10.515 1.27 ;
RECT 6.285 0.32 6.535 0.795 ;
RECT 9.71 0.68 9.91 0.98 ;
RECT 10.685 0.73 10.915 1.495 ;
RECT 8.465 0.345 9.91 0.68 ;
RECT 10.575 0.32 10.915 0.73 ;
RECT 11.085 1.655 11.345 3.08 ;
RECT 11.085 1.245 11.975 1.655 ;
RECT 11.085 0.32 11.345 1.245 ;
LAYER met1 ;
RECT 3.765 2.425 4.055 2.48 ;
RECT 5.145 2.425 5.435 2.48 ;
RECT 7.5 2.425 7.79 2.48 ;
RECT 3.765 2.25 7.79 2.425 ;
RECT 3.765 2.195 4.055 2.25 ;
RECT 5.145 2.195 5.435 2.25 ;
RECT 7.5 2.195 7.79 2.25 ;
RECT 1.465 2 1.755 2.055 ;
RECT 4.685 2 4.975 2.055 ;
RECT 1.465 1.825 4.975 2 ;
RECT 1.465 1.77 1.755 1.825 ;
RECT 4.685 1.77 4.975 1.825 ;
RECT 4.225 1.575 4.515 1.63 ;
RECT 8.42 1.575 8.71 1.63 ;
RECT 4.225 1.4 8.71 1.575 ;
RECT 4.225 1.345 4.515 1.4 ;
RECT 8.42 1.345 8.71 1.4 ;
END
END efs8hd_sdfstp_2
MACRO efs8hd_bufinv_8
CLASS CORE ;
FOREIGN efs8hd_bufinv_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 7.36 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.345 0.505 1.615 ;
END
END A
PIN Y
PORT
LAYER li1 ;
RECT 2.715 2.02 3.045 3.08 ;
RECT 3.555 2.02 3.885 3.08 ;
RECT 4.395 2.02 4.725 3.08 ;
RECT 5.235 2.02 5.565 3.08 ;
RECT 2.715 1.805 6.355 2.02 ;
RECT 5.97 1.13 6.355 1.805 ;
RECT 2.715 0.92 6.355 1.13 ;
RECT 2.715 0.325 3.045 0.92 ;
RECT 3.555 0.325 3.885 0.92 ;
RECT 4.395 0.325 4.725 0.92 ;
RECT 5.235 0.325 5.565 0.92 ;
END
END Y
PIN vgnd
PORT
LAYER li1 ;
RECT 0.175 0.105 0.345 1.13 ;
RECT 1.535 0.105 1.705 0.705 ;
RECT 2.375 0.105 2.545 0.705 ;
RECT 3.215 0.105 3.385 0.705 ;
RECT 4.055 0.105 4.225 0.705 ;
RECT 4.895 0.105 5.065 0.705 ;
RECT 5.735 0.105 5.905 0.705 ;
RECT 0.175 0.085 5.905 0.105 ;
RECT 0 -0.085 6.44 0.085 ;
LAYER met1 ;
RECT 0 -0.3 6.44 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 6.44 3.485 ;
RECT 0.175 3.295 5.905 3.315 ;
RECT 0.175 1.805 0.345 3.295 ;
RECT 1.535 2.23 1.705 3.295 ;
RECT 2.375 2.23 2.545 3.295 ;
RECT 3.215 2.295 3.385 3.295 ;
RECT 4.055 2.295 4.225 3.295 ;
RECT 4.895 2.295 5.065 3.295 ;
RECT 5.735 2.295 5.905 3.295 ;
LAYER met1 ;
RECT 0 3.1 6.44 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.515 1.93 0.845 3.08 ;
RECT 0.675 1.595 0.845 1.93 ;
RECT 1.035 2.02 1.365 3.08 ;
RECT 1.875 2.02 2.205 3.08 ;
RECT 1.035 1.805 2.545 2.02 ;
RECT 2.375 1.595 2.545 1.805 ;
RECT 0.675 1.345 2.205 1.595 ;
RECT 2.375 1.345 5.76 1.595 ;
RECT 0.675 1.13 0.845 1.345 ;
RECT 2.375 1.13 2.545 1.345 ;
RECT 0.515 0.325 0.845 1.13 ;
RECT 1.035 0.92 2.545 1.13 ;
RECT 1.035 0.325 1.365 0.92 ;
RECT 1.875 0.325 2.205 0.92 ;
END
END efs8hd_bufinv_8
MACRO efs8hd_clkdlybuf4s18_2
CLASS CORE ;
FOREIGN efs8hd_clkdlybuf4s18_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 2.715 1.905 3.15 3.08 ;
RECT 2.715 1.775 3.18 1.905 ;
RECT 3.01 1.18 3.18 1.775 ;
RECT 2.965 0.975 3.18 1.18 ;
RECT 2.965 0.8 3.15 0.975 ;
RECT 2.705 0.34 3.15 0.8 ;
END
END X
PIN A
PORT
LAYER li1 ;
RECT 0.085 1.345 0.56 1.615 ;
END
END A
PIN vgnd
PORT
LAYER li1 ;
RECT 0.585 0.105 0.915 0.705 ;
RECT 2.165 0.105 2.535 0.705 ;
RECT 3.32 0.105 3.595 0.805 ;
RECT 0.585 0.085 3.595 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.6 3.295 3.595 3.315 ;
RECT 0.6 2.25 0.93 3.295 ;
RECT 2.13 2.25 2.545 3.295 ;
RECT 3.32 2.03 3.595 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.04 0.43 3.08 ;
RECT 1.11 2.25 1.44 3.08 ;
RECT 0.085 1.825 1.055 2.04 ;
RECT 0.73 1.13 1.055 1.825 ;
RECT 0.085 0.92 1.055 1.13 ;
RECT 1.27 1.57 1.44 2.25 ;
RECT 1.63 2.04 1.96 3.08 ;
RECT 1.63 1.825 2.545 2.04 ;
RECT 1.27 1.345 2.205 1.57 ;
RECT 2.375 1.555 2.545 1.825 ;
RECT 2.375 1.345 2.84 1.555 ;
RECT 0.085 0.34 0.415 0.92 ;
RECT 1.27 0.75 1.44 1.345 ;
RECT 2.375 1.13 2.545 1.345 ;
RECT 1.16 0.34 1.44 0.75 ;
RECT 1.63 0.92 2.545 1.13 ;
RECT 1.63 0.34 1.96 0.92 ;
END
END efs8hd_clkdlybuf4s18_2
MACRO efs8hd_bufbuf_8
CLASS CORE ;
FOREIGN efs8hd_bufbuf_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 7.82 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 0.11 1.345 0.44 1.615 ;
END
END A
PIN X
PORT
LAYER li1 ;
RECT 3.23 2.02 3.56 3.08 ;
RECT 4.07 2.02 4.4 3.08 ;
RECT 4.91 2.02 5.24 3.08 ;
RECT 5.75 2.02 6.08 3.08 ;
RECT 3.23 1.805 6.815 2.02 ;
RECT 6.435 1.13 6.815 1.805 ;
RECT 3.23 0.92 6.815 1.13 ;
RECT 3.23 0.325 3.56 0.92 ;
RECT 4.07 0.325 4.4 0.92 ;
RECT 4.91 0.325 5.24 0.92 ;
RECT 5.75 0.325 6.08 0.92 ;
END
END X
PIN vgnd
PORT
LAYER li1 ;
RECT 0.595 0.105 0.765 0.705 ;
RECT 2.05 0.105 2.22 0.705 ;
RECT 2.89 0.105 3.06 0.705 ;
RECT 3.73 0.105 3.9 0.705 ;
RECT 4.57 0.105 4.74 0.705 ;
RECT 5.41 0.105 5.58 0.705 ;
RECT 6.25 0.105 6.42 0.705 ;
RECT 0.595 0.085 6.42 0.105 ;
RECT 0 -0.085 6.9 0.085 ;
LAYER met1 ;
RECT 0 -0.3 6.9 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 6.9 3.485 ;
RECT 0.595 3.295 6.42 3.315 ;
RECT 0.595 2.23 0.765 3.295 ;
RECT 2.05 2.23 2.22 3.295 ;
RECT 2.89 2.23 3.06 3.295 ;
RECT 3.73 2.295 3.9 3.295 ;
RECT 4.57 2.295 4.74 3.295 ;
RECT 5.41 2.295 5.58 3.295 ;
RECT 6.25 2.295 6.42 3.295 ;
LAYER met1 ;
RECT 0 3.1 6.9 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.095 2.02 0.425 2.7 ;
RECT 0.095 1.805 0.78 2.02 ;
RECT 1 1.93 1.38 3.08 ;
RECT 0.61 1.655 0.78 1.805 ;
RECT 0.61 1.245 1.04 1.655 ;
RECT 1.21 1.595 1.38 1.93 ;
RECT 1.55 2.02 1.88 3.08 ;
RECT 2.39 2.02 2.72 3.08 ;
RECT 1.55 1.805 3.06 2.02 ;
RECT 2.89 1.595 3.06 1.805 ;
RECT 1.21 1.345 2.72 1.595 ;
RECT 2.89 1.345 5.36 1.595 ;
RECT 0.61 1.13 0.78 1.245 ;
RECT 0.095 0.92 0.78 1.13 ;
RECT 1.21 1.03 1.38 1.345 ;
RECT 2.89 1.13 3.06 1.345 ;
RECT 0.095 0.325 0.425 0.92 ;
RECT 1 0.325 1.38 1.03 ;
RECT 1.55 0.92 3.06 1.13 ;
RECT 1.55 0.325 1.88 0.92 ;
RECT 2.39 0.325 2.72 0.92 ;
END
END efs8hd_bufbuf_8
MACRO efs8hd_dfrtp_2
CLASS CORE ;
FOREIGN efs8hd_dfrtp_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 10.58 BY 3.4 ;
PIN Q
PORT
LAYER li1 ;
RECT 8.855 1.805 9.105 2.905 ;
RECT 8.9 0.995 9.105 1.805 ;
RECT 8.855 0.33 9.105 0.995 ;
END
END Q
PIN RESETB
PORT
LAYER li1 ;
RECT 7.105 1.295 7.645 1.755 ;
RECT 3.805 0.955 4.595 1.27 ;
RECT 7.405 0.795 7.645 1.295 ;
LAYER met1 ;
RECT 7.045 1.205 7.335 1.6 ;
RECT 3.745 1.15 4.395 1.205 ;
RECT 7.045 1.15 7.635 1.205 ;
RECT 3.745 0.975 7.635 1.15 ;
RECT 3.745 0.92 4.395 0.975 ;
RECT 7.345 0.92 7.635 0.975 ;
END
END RESETB
PIN D
PORT
LAYER li1 ;
RECT 1.355 2.08 1.68 3.065 ;
RECT 1.415 0.77 1.875 2.08 ;
END
END D
PIN CLK
PORT
LAYER li1 ;
RECT 0.09 1.22 0.44 2.03 ;
END
END CLK
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.545 0.105 1.875 0.555 ;
RECT 4.475 0.105 4.805 0.68 ;
RECT 6.705 0.105 6.895 0.655 ;
RECT 8.38 0.105 8.685 0.68 ;
RECT 9.275 0.105 9.525 1.05 ;
RECT 0 -0.105 9.66 0.105 ;
LAYER met1 ;
RECT 0 -0.3 9.66 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 9.66 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.85 2.72 2.1 3.295 ;
RECT 3.99 2.755 4.32 3.295 ;
RECT 4.955 2.72 5.325 3.295 ;
RECT 6.94 2.72 7.19 3.295 ;
RECT 7.71 2.82 8.04 3.295 ;
RECT 8.38 1.87 8.685 3.295 ;
RECT 9.275 1.87 9.525 3.295 ;
LAYER met1 ;
RECT 0 3.1 9.66 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.09 2.455 0.345 3.08 ;
RECT 0.09 2.245 0.84 2.455 ;
RECT 0.61 1.005 0.84 2.245 ;
RECT 0.09 0.795 0.84 1.005 ;
RECT 0.09 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.185 3.08 ;
RECT 2.27 2.67 2.52 3.08 ;
RECT 2.735 2.67 3.415 3.08 ;
RECT 2.27 2.505 2.44 2.67 ;
RECT 2.045 2.295 2.44 2.505 ;
RECT 2.045 0.595 2.215 2.295 ;
RECT 2.61 1.97 3.075 2.455 ;
RECT 2.385 0.955 2.735 1.73 ;
RECT 2.905 1.23 3.075 1.97 ;
RECT 3.245 1.695 3.415 2.67 ;
RECT 3.585 2.545 3.755 2.97 ;
RECT 4.49 2.545 4.66 2.97 ;
RECT 3.585 2.33 4.66 2.545 ;
RECT 5.495 2.505 5.665 3.08 ;
RECT 5.9 2.655 6.77 3.08 ;
RECT 5.105 2.295 5.665 2.505 ;
RECT 5.105 2.12 5.275 2.295 ;
RECT 3.775 1.905 5.275 2.12 ;
RECT 5.97 2.08 6.43 2.445 ;
RECT 3.245 1.48 4.935 1.695 ;
RECT 2.905 0.955 3.26 1.23 ;
RECT 3.43 0.595 3.6 1.48 ;
RECT 4.765 1.255 4.935 1.48 ;
RECT 5.105 1.045 5.275 1.905 ;
RECT 2.045 0.38 2.54 0.595 ;
RECT 2.745 0.38 3.6 0.595 ;
RECT 5.015 0.555 5.275 1.045 ;
RECT 5.465 2.07 6.43 2.08 ;
RECT 6.6 2.18 6.77 2.655 ;
RECT 7.36 2.605 7.53 2.97 ;
RECT 7.36 2.395 8.16 2.605 ;
RECT 5.465 1.87 6.14 2.07 ;
RECT 6.6 1.97 7.82 2.18 ;
RECT 5.465 0.88 5.675 1.87 ;
RECT 6.6 1.855 6.77 1.97 ;
RECT 5.845 0.88 6.195 1.655 ;
RECT 6.365 1.645 6.77 1.855 ;
RECT 7.99 1.655 8.16 2.395 ;
RECT 6.365 0.67 6.535 1.645 ;
RECT 7.99 1.62 8.73 1.655 ;
RECT 6.705 1.08 6.925 1.43 ;
RECT 7.815 1.245 8.73 1.62 ;
RECT 6.705 0.87 7.235 1.08 ;
RECT 5.015 0.345 5.365 0.555 ;
RECT 5.585 0.32 6.535 0.67 ;
RECT 7.065 0.58 7.235 0.87 ;
RECT 7.815 1.025 8.14 1.245 ;
RECT 7.815 0.58 8.135 1.025 ;
RECT 7.065 0.37 8.135 0.58 ;
LAYER met1 ;
RECT 0.955 2.425 1.245 2.48 ;
RECT 2.845 2.425 3.135 2.48 ;
RECT 5.965 2.425 6.255 2.48 ;
RECT 0.955 2.25 6.255 2.425 ;
RECT 0.955 2.195 1.245 2.25 ;
RECT 2.845 2.195 3.135 2.25 ;
RECT 5.965 2.195 6.255 2.25 ;
RECT 0.55 1.575 0.84 1.63 ;
RECT 2.385 1.575 2.675 1.63 ;
RECT 5.965 1.575 6.255 1.63 ;
RECT 0.55 1.4 6.255 1.575 ;
RECT 0.55 1.345 0.84 1.4 ;
RECT 2.385 1.345 2.675 1.4 ;
RECT 5.965 1.345 6.255 1.4 ;
END
END efs8hd_dfrtp_2
MACRO efs8hd_einvn_2
CLASS CORE ;
FOREIGN efs8hd_einvn_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.945 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 2.785 1.34 3.135 1.59 ;
END
END A
PIN TEB
PORT
LAYER li1 ;
RECT 0.085 1.24 0.325 1.73 ;
END
END TEB
PIN Z
PORT
LAYER li1 ;
RECT 2.785 2.115 3.135 3.08 ;
RECT 1.945 1.805 3.135 2.115 ;
RECT 2.365 1.055 2.615 1.805 ;
RECT 2.365 0.74 2.695 1.055 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.085 0.845 0.605 ;
RECT 1.45 0.085 1.78 0.605 ;
RECT 0 -0.085 3.22 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.22 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.22 3.485 ;
RECT 0.515 2.365 0.895 3.315 ;
RECT 1.41 2.815 2.275 3.315 ;
LAYER met1 ;
RECT 0 3.1 3.22 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.155 0.345 3.08 ;
RECT 1.07 2.605 1.24 3.08 ;
RECT 2.445 2.605 2.615 3.08 ;
RECT 1.07 2.33 2.615 2.605 ;
RECT 0.085 1.94 0.895 2.155 ;
RECT 0.495 1.59 0.895 1.94 ;
RECT 1.07 1.805 1.775 2.33 ;
RECT 0.495 1.24 2.035 1.59 ;
RECT 0.495 1.03 0.84 1.24 ;
RECT 0.085 0.815 0.84 1.03 ;
RECT 1.015 0.815 2.195 1.03 ;
RECT 0.085 0.315 0.345 0.815 ;
RECT 1.015 0.315 1.28 0.815 ;
RECT 1.95 0.53 2.195 0.815 ;
RECT 2.865 0.53 3.135 0.965 ;
RECT 1.95 0.315 3.135 0.53 ;
END
END efs8hd_einvn_2
MACRO efs8hd_dlxbn_2
CLASS CORE ;
FOREIGN efs8hd_dlxbn_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 8.74 BY 3.4 ;
PIN D
PORT
LAYER li1 ;
RECT 1.48 1.195 1.81 1.655 ;
END
END D
PIN GATEN
PORT
LAYER li1 ;
RECT 0.085 1.23 0.33 2.03 ;
END
END GATEN
PIN Q
PORT
LAYER li1 ;
RECT 5.215 2.14 5.465 3.07 ;
RECT 5.215 1.87 5.5 2.14 ;
RECT 5.33 1.655 5.5 1.87 ;
RECT 5.33 1.245 5.905 1.655 ;
RECT 5.33 1.03 5.5 1.245 ;
RECT 5.215 0.825 5.5 1.03 ;
RECT 5.215 0.52 5.465 0.825 ;
END
END Q
PIN QN
PORT
LAYER li1 ;
RECT 7.05 1.805 7.305 3.08 ;
RECT 7.095 1.655 7.305 1.805 ;
RECT 7.095 1.32 7.735 1.655 ;
RECT 7.095 1.03 7.305 1.32 ;
RECT 7.05 0.32 7.305 1.03 ;
END
END QN
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.295 7.82 3.505 ;
RECT 0.515 2.67 0.845 3.295 ;
RECT 1.975 2.295 2.29 3.295 ;
RECT 3.84 2.67 4.14 3.295 ;
RECT 4.76 1.87 5.045 3.295 ;
RECT 5.635 2.295 5.905 3.295 ;
RECT 6.585 2.295 6.88 3.295 ;
RECT 7.475 1.87 7.735 3.295 ;
LAYER met1 ;
RECT 0 3.1 7.82 3.7 ;
END
END vpwr
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.105 0.845 0.58 ;
RECT 1.895 0.105 2.225 0.555 ;
RECT 3.76 0.105 4.09 1.03 ;
RECT 4.76 0.105 5.045 1.03 ;
RECT 5.635 0.105 5.905 0.68 ;
RECT 6.585 0.105 6.88 0.68 ;
RECT 7.475 0.105 7.735 1.105 ;
RECT 0 -0.105 7.82 0.105 ;
LAYER met1 ;
RECT 0 -0.3 7.82 0.3 ;
END
END vgnd
OBS
LAYER li1 ;
RECT 0.175 2.455 0.345 3.08 ;
RECT 0.175 2.245 0.78 2.455 ;
RECT 0.61 1.75 0.78 2.245 ;
RECT 1.015 2.105 1.24 3.08 ;
RECT 0.61 1.34 0.84 1.75 ;
RECT 0.61 1.005 0.78 1.34 ;
RECT 0.175 0.795 0.78 1.005 ;
RECT 0.175 0.43 0.345 0.795 ;
RECT 1.015 0.43 1.185 2.105 ;
RECT 1.475 2.08 1.805 3.02 ;
RECT 2.92 2.82 3.67 3.03 ;
RECT 1.475 1.87 2.16 2.08 ;
RECT 1.99 1.37 2.16 1.87 ;
RECT 2.49 1.695 2.775 2.505 ;
RECT 2.945 1.77 3.285 2.495 ;
RECT 1.99 0.98 2.36 1.37 ;
RECT 2.945 1.295 3.115 1.77 ;
RECT 3.5 1.655 3.67 2.82 ;
RECT 4.36 2.33 4.58 3.045 ;
RECT 3.86 1.92 4.58 2.33 ;
RECT 4.41 1.655 4.58 1.92 ;
RECT 6.075 1.655 6.405 3.08 ;
RECT 3.5 1.455 4.22 1.655 ;
RECT 1.555 0.955 2.36 0.98 ;
RECT 1.555 0.77 2.16 0.955 ;
RECT 2.735 0.88 3.115 1.295 ;
RECT 3.35 1.245 4.22 1.455 ;
RECT 4.41 1.245 5.16 1.655 ;
RECT 6.075 1.245 6.925 1.655 ;
RECT 1.555 0.43 1.725 0.77 ;
RECT 3.35 0.67 3.52 1.245 ;
RECT 4.41 1.03 4.58 1.245 ;
RECT 2.86 0.455 3.52 0.67 ;
RECT 4.36 0.52 4.58 1.03 ;
RECT 6.075 0.32 6.405 1.245 ;
LAYER met1 ;
RECT 1.01 2.425 1.3 2.48 ;
RECT 2.43 2.425 2.72 2.48 ;
RECT 1.01 2.25 2.72 2.425 ;
RECT 1.01 2.195 1.3 2.25 ;
RECT 2.43 2.195 2.72 2.25 ;
RECT 0.55 2 0.84 2.055 ;
RECT 2.89 2 3.18 2.055 ;
RECT 0.55 1.825 3.18 2 ;
RECT 0.55 1.77 0.84 1.825 ;
RECT 2.89 1.77 3.18 1.825 ;
END
END efs8hd_dlxbn_2
MACRO efs8hd_einvp_8
CLASS CORE ;
FOREIGN efs8hd_einvp_8 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 11.27 BY 3.4 ;
PIN A
PORT
LAYER li1 ;
RECT 5.42 1.275 8.195 1.59 ;
END
END A
PIN TE
PORT
LAYER li1 ;
RECT 0.085 1.24 0.33 2.015 ;
END
END TE
PIN Z
PORT
LAYER li1 ;
RECT 4.87 2.015 5.2 2.655 ;
RECT 5.71 2.015 6.04 2.655 ;
RECT 6.55 2.015 6.88 2.655 ;
RECT 7.39 2.015 7.72 2.655 ;
RECT 4.87 1.805 7.72 2.015 ;
RECT 4.87 1.06 5.25 1.805 ;
RECT 4.87 0.79 8.195 1.06 ;
END
END Z
PIN vgnd
PORT
LAYER li1 ;
RECT 0.515 0.085 0.845 0.605 ;
RECT 1.375 0.085 1.705 0.605 ;
RECT 2.215 0.085 2.545 0.605 ;
RECT 3.055 0.085 3.385 0.605 ;
RECT 3.895 0.085 4.235 0.605 ;
RECT 0 -0.085 8.28 0.085 ;
LAYER met1 ;
RECT 0 -0.3 8.28 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 8.28 3.485 ;
RECT 0.515 2.655 0.875 3.315 ;
RECT 1.455 2.365 1.785 3.315 ;
RECT 2.295 2.365 2.625 3.315 ;
RECT 3.135 2.365 3.465 3.315 ;
RECT 3.975 2.365 4.305 3.315 ;
LAYER met1 ;
RECT 0 3.1 8.28 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.085 2.44 0.345 3.08 ;
RECT 0.085 2.23 0.875 2.44 ;
RECT 0.5 1.655 0.875 2.23 ;
RECT 1.075 2.155 1.285 3.08 ;
RECT 1.955 2.155 2.125 3.08 ;
RECT 2.795 2.155 2.965 3.08 ;
RECT 3.635 2.155 3.805 3.08 ;
RECT 4.475 2.865 8.195 3.08 ;
RECT 4.475 2.155 4.7 2.865 ;
RECT 5.37 2.23 5.54 2.865 ;
RECT 6.21 2.23 6.38 2.865 ;
RECT 7.05 2.23 7.22 2.865 ;
RECT 1.075 1.94 4.7 2.155 ;
RECT 7.89 1.805 8.195 2.865 ;
RECT 0.5 1.24 4.7 1.655 ;
RECT 0.5 1.03 0.695 1.24 ;
RECT 0.085 0.815 0.695 1.03 ;
RECT 1.035 0.815 4.7 1.03 ;
RECT 0.085 0.315 0.345 0.815 ;
RECT 1.035 0.315 1.205 0.815 ;
RECT 1.875 0.315 2.045 0.815 ;
RECT 2.715 0.315 2.885 0.815 ;
RECT 3.555 0.315 3.725 0.815 ;
RECT 4.405 0.58 4.7 0.815 ;
RECT 4.405 0.315 8.195 0.58 ;
END
END efs8hd_einvp_8
MACRO efs8hd_and3b_2
CLASS CORE ;
FOREIGN efs8hd_and3b_2 ;
ORIGIN -0.0000 -0.0000 ;
SITE unitehd ;
SIZE 4.6 BY 3.4 ;
PIN X
PORT
LAYER li1 ;
RECT 2.875 2.245 3.16 3.08 ;
RECT 2.99 1.805 3.16 2.245 ;
RECT 2.99 1.155 3.595 1.805 ;
RECT 2.99 0.895 3.16 1.155 ;
RECT 2.915 0.32 3.16 0.895 ;
END
END X
PIN C
PORT
LAYER li1 ;
RECT 1.985 0.955 2.42 1.555 ;
RECT 1.985 0.38 2.22 0.955 ;
END
END C
PIN AN
PORT
LAYER li1 ;
RECT 0.145 0.765 0.41 1.655 ;
END
END AN
PIN B
PORT
LAYER li1 ;
RECT 1.815 2.465 2.29 3.08 ;
END
END B
PIN vgnd
PORT
LAYER li1 ;
RECT 0.085 0.105 0.425 0.595 ;
RECT 2.41 0.105 2.74 0.725 ;
RECT 3.33 0.105 3.595 0.93 ;
RECT 0.085 0.085 3.595 0.105 ;
RECT 0 -0.085 3.68 0.085 ;
LAYER met1 ;
RECT 0 -0.3 3.68 0.3 ;
END
END vgnd
PIN vpwr
PORT
LAYER li1 ;
RECT 0 3.315 3.68 3.485 ;
RECT 0.085 3.295 3.595 3.315 ;
RECT 0.085 1.97 0.4 3.295 ;
RECT 1.03 2.665 1.645 3.295 ;
RECT 1.455 2.295 1.645 2.665 ;
RECT 1.455 2.125 1.785 2.295 ;
RECT 2.46 2.24 2.675 3.295 ;
RECT 3.33 2.03 3.595 3.295 ;
LAYER met1 ;
RECT 0 3.1 3.68 3.7 ;
END
END vpwr
OBS
LAYER li1 ;
RECT 0.595 1.555 0.855 2.38 ;
RECT 1.05 1.955 1.285 2.45 ;
RECT 2.01 1.995 2.2 2.295 ;
RECT 2.01 1.955 2.82 1.995 ;
RECT 1.05 1.78 2.82 1.955 ;
RECT 0.595 1.27 1.415 1.555 ;
RECT 0.595 0.38 0.855 1.27 ;
RECT 1.585 0.715 1.815 1.78 ;
RECT 2.59 1.245 2.82 1.78 ;
RECT 1.055 0.38 1.815 0.715 ;
END
END efs8hd_and3b_2
MACRO digital_out_pad
CLASS BLOCK ;
FOREIGN digital_out_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
PIN in3v
PORT
LAYER met2 ;
RECT 63.940000 0.000000 64.980000 4.000000 ;
END
END in3v
PIN in
PORT
LAYER met2 ;
RECT 65.970000 0.000000 67.010000 4.000000 ;
END
END in
PIN out
PORT
LAYER met2 ;
RECT 46.110000 0.000000 46.740000 3.770000 ;
END
END out
PIN pullupb
PORT
LAYER met2 ;
RECT 72.345000 0.000000 72.895000 3.770000 ;
END
END pullupb
PIN pulldownb
PORT
LAYER met2 ;
RECT 62.750000 0.000000 63.305000 3.785000 ;
END
END pulldownb
PIN outenb
PORT
LAYER met2 ;
RECT 50.345000 0.000000 50.900000 3.770000 ;
END
END outenb
OBS
LAYER li1 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met1 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met2 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met3 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met4 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met5 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
END
END digital_out_pad
MACRO analog200ohm_pad
CLASS BLOCK ;
FOREIGN analog200ohm_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
OBS
LAYER li1 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met1 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met2 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met3 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met4 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met5 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
END
END analog200ohm_pad
MACRO vddio_pad
CLASS BLOCK ;
FOREIGN vddio_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 0.0000 0.0000 0.5000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 0.0000 7.0000 0.5000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 0.0000 24.0000 0.5000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 0.0000 41.0000 0.5000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 12.9050 83.4650 66.4750 144.3350 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END vddio_pad
MACRO vdd1v8_pad
CLASS BLOCK ;
FOREIGN vdd1v8_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 0.0000 0.0000 0.5000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 0.0000 7.0000 0.5000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 0.0000 24.0000 0.5000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 0.0000 41.0000 0.5000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 0.0000 58.0000 0.5000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END vdd1v8_pad
MACRO vss_pad
CLASS BLOCK ;
FOREIGN vss_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 0.0000 0.0000 0.5000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 0.0000 7.0000 0.5000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 0.0000 24.0000 0.5000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 0.0000 41.0000 0.5000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 0.0000 58.0000 0.5000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END vss_pad
MACRO analog_pad
CLASS BLOCK ;
FOREIGN analog_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
OBS
LAYER li1 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met1 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met2 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met3 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met4 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
LAYER met5 ;
RECT 0.000000 0.000000 80.0000 165.0000 ;
END
END analog_pad
MACRO pad_spacer_50um
CLASS BLOCK ;
FOREIGN pad_spacer_50um ;
ORIGIN -0.0000 -0.0000 ;
SIZE 50.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 0.0000 0.0000 0.5000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 0.0000 7.0000 0.5000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 0.0000 24.0000 0.5000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 0.0000 41.0000 0.5000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 0.0000 58.0000 0.5000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END pad_spacer_50um
MACRO pad_spacer_20um
CLASS BLOCK ;
FOREIGN pad_spacer_20um ;
ORIGIN 0.0000 0.0000 ;
SIZE 20.0000 BY 165.0000 ;
OBS
END
END pad_spacer_20um
MACRO pad_spacer_10um
CLASS BLOCK ;
FOREIGN pad_spacer_10um ;
ORIGIN -0.0000 -0.0000 ;
SIZE 10.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 9.5000 0.0000 10.0000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 9.5000 7.0000 10.0000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 9.5000 24.0000 10.0000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 9.3000 155.0000 10.0000 165.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 9.5000 58.0000 10.0000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END pad_spacer_10um
MACRO pad_spacer_2um
CLASS BLOCK ;
FOREIGN pad_spacer_2um ;
ORIGIN -0.0000 -0.0000 ;
SIZE 2.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 0.0000 0.0000 2.0000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 0.0000 7.0000 2.0000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 0.0000 24.0000 2.0000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 0.0000 41.0000 2.0000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 0.0000 58.0000 2.0000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END pad_spacer_2um
MACRO pad_spacer_1um
CLASS BLOCK ;
FOREIGN pad_spacer_1um ;
ORIGIN -0.0000 -0.0000 ;
SIZE 1.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT -0.3000 0.0000 1.3000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT -0.3000 7.0000 1.3000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT -0.3000 24.0000 1.3000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT -0.3000 41.0000 1.3000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT -0.3000 58.0000 1.3000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END pad_spacer_1um
MACRO vssio_pad
CLASS BLOCK ;
FOREIGN vssio_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 0.0000 0.0000 0.5000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 0.0000 7.0000 0.5000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 0.0000 24.0000 0.5000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 0.0000 41.0000 0.5000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 0.0000 58.0000 0.5000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END vssio_pad
MACRO vdd3v3_pad
CLASS BLOCK ;
FOREIGN vdd3v3_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 0.0000 0.0000 0.5000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 0.0000 7.0000 0.5000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 0.0000 24.0000 0.5000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 0.0000 41.0000 0.5000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 0.0000 58.0000 0.5000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END vdd3v3_pad
MACRO pad_spacer_5um
CLASS BLOCK ;
FOREIGN pad_spacer_5um ;
ORIGIN -0.0000 -0.0000 ;
SIZE 5.0000 BY 165.0000 ;
PIN VDD1V8
PORT
LAYER met5 ;
RECT 4.5000 0.0000 5.0000 5.0000 ;
END
END VDD1V8
PIN VSS
PORT
LAYER met5 ;
RECT 4.5000 7.0000 5.0000 22.0000 ;
END
END VSS
PIN VDD3V3
PORT
LAYER met5 ;
RECT 4.5000 24.0000 5.0000 39.0000 ;
END
END VDD3V3
PIN VSSIO
PORT
LAYER met5 ;
RECT 4.5000 41.0000 5.0000 56.0000 ;
END
END VSSIO
PIN VDDIO
PORT
LAYER met5 ;
RECT 4.5000 58.0000 5.0000 73.0000 ;
END
END VDDIO
OBS
LAYER li1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met1 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met2 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met3 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met4 ;
RECT 0.000000 0.000000 0.0 0.0 ;
LAYER met5 ;
RECT 0.000000 0.000000 0.0 0.0 ;
END
END pad_spacer_5um
MACRO digital_in_pad
CLASS BLOCK ;
FOREIGN digital_in_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 80.0000 BY 165.0000 ;
PIN in3v
PORT
LAYER met2 ;
RECT 63.890000 0.000000 64.930000 4.000000 ;
END
END in3v
PIN in
PORT
LAYER met2 ;
RECT 65.920000 0.000000 66.960000 4.000000 ;
END
END in
OBS
LAYER li1 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met1 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met2 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met3 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met4 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
LAYER met5 ;
RECT 0.000000 4.000000 80.0000 165.0000 ;
END
END digital_in_pad
MACRO corner_pad
CLASS BLOCK ;
FOREIGN corner_pad ;
ORIGIN -0.0000 -0.0000 ;
SIZE 175.0000 BY 175.0000 ;
OBS
LAYER li1 ;
RECT 0.000000 0.000000 175.0000 175.0000 ;
LAYER met1 ;
RECT 0.000000 0.000000 175.0000 175.0000 ;
LAYER met2 ;
RECT 0.000000 0.000000 175.0000 175.0000 ;
LAYER met3 ;
RECT 0.000000 0.000000 175.0000 175.0000 ;
LAYER met4 ;
RECT 0.000000 0.000000 175.0000 175.0000 ;
LAYER met5 ;
RECT 0.000000 0.000000 175.0000 175.0000 ;
END
END corner_pad
MACRO digital_pll
CLASS BLOCK ;
FOREIGN digital_pll ;
ORIGIN 0.000000 0.000000 ;
SIZE 122.95 BY 128.83 ;
PIN reset
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 73.41 121.31 73.97 125.43 ;
END
END reset
PIN osc
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 4.41 3.4 4.97 7.52 ;
END
END osc
PIN clockp[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.46 92.82 4.66 94.02 ;
END
END clockp[1]
PIN clockp[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 43.97 121.31 44.53 125.43 ;
END
END clockp[0]
PIN clockd[3]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.46 49.3 4.66 50.5 ;
END
END clockd[3]
PIN clockd[2]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 63.29 3.4 63.85 7.52 ;
END
END clockd[2]
PIN clockd[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 92.73 3.4 93.29 7.52 ;
END
END clockd[1]
PIN clockd[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 118.29 99.62 122.49 100.82 ;
END
END clockd[0]
PIN div[4]
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 14.53 121.31 15.09 125.43 ;
END
END div[4]
PIN div[3]
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 33.85 3.4 34.41 7.52 ;
END
END div[3]
PIN div[2]
DIRECTION INPUT ;
PORT
LAYER met3 ;
RECT 118.29 12.58 122.49 13.78 ;
END
END div[2]
PIN div[1]
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 102.85 121.31 103.41 125.43 ;
END
END div[1]
PIN div[0]
DIRECTION INPUT ;
PORT
LAYER met3 ;
RECT 118.29 56.1 122.49 57.3 ;
END
END div[0]
OBS
LAYER li1 ;
RECT 0.46 3.4 122.49 125.43 ;
LAYER met1 ;
RECT 0.46 3.4 122.49 125.43 ;
LAYER met2 ;
RECT 0.46 121.17 14.39 125.43 ;
RECT 15.23 121.17 43.83 125.43 ;
RECT 44.67 121.17 73.27 125.43 ;
RECT 74.11 121.17 102.71 125.43 ;
RECT 103.55 121.17 122.49 125.43 ;
RECT 0.46 7.66 122.49 121.17 ;
RECT 0.46 3.4 4.27 7.66 ;
RECT 5.11 3.4 33.71 7.66 ;
RECT 34.55 3.4 63.15 7.66 ;
RECT 63.99 3.4 92.59 7.66 ;
RECT 93.43 3.4 122.49 7.66 ;
LAYER met3 ;
RECT 0.46 101.12 122.49 125.43 ;
RECT 0.46 99.32 117.99 101.12 ;
RECT 0.46 94.32 122.49 99.32 ;
RECT 4.96 92.52 122.49 94.32 ;
RECT 0.46 57.6 122.49 92.52 ;
RECT 0.46 55.8 117.99 57.6 ;
RECT 0.46 50.8 122.49 55.8 ;
RECT 4.96 49 122.49 50.8 ;
RECT 0.46 14.08 122.49 49 ;
RECT 0.46 12.28 117.99 14.08 ;
RECT 0.46 3.4 122.49 12.28 ;
LAYER met4 ;
RECT 0.46 3.4 122.49 125.43 ;
LAYER met5 ;
RECT 0.46 3.4 122.49 125.43 ;
LAYER met6 ;
RECT 0.46 3.4 122.49 125.43 ;
END
END digital_pll
END LIBRARY