designs/usbf_device/config.tcl

set ::env(DESIGN_NAME) "usbf_device"

set ::env(VERILOG_FILES) "./designs/usbf_device/src/usbf_device.v"

set ::env(CLOCK_PERIOD) "15"
set ::env(CLOCK_PORT) "clk_i"

set ::env(CLOCK_NET) $::env(CLOCK_PORT)