| # User config | |
| set ::env(DESIGN_NAME) ibex_core | |
| # Change if needed | |
| set ::env(VERILOG_FILES) [glob ./designs/ibex_core/src/*.v] | |
| # Fill this | |
| set ::env(CLOCK_PERIOD) "10" | |
| set ::env(CLOCK_PORT) "clk_i" | |
| set ::env(FP_CORE_UTIL) 40 | |
| set ::env(PL_TARGET_DENSITY) 0.4 | |
| set ::env(CLOCK_NET) $::env(CLOCK_PORT) |