| Netgen 1.5.146 compiled on Fri 27 Mar 2020 05:37:42 PM EDT |
| Warning: netgen command 'format' use fully-qualified name '::netgen::format' |
| Warning: netgen command 'global' use fully-qualified name '::netgen::global' |
| Generating JSON file result |
| Reading netlist file ../spi/lvs/striVe.spice |
| Reading netlist file ../verilog/rtl/striVe.v |
| Warning: A case-insensitive file has been read and so the verilog file must be treated case-insensitive to match. |
| Creating placeholder cell definition for module s8iom0_vdda_hvc_pad. |
| Creating placeholder cell definition for module s8iom0_vddio_hvc_pad. |
| Creating placeholder cell definition for module s8iom0_vdda_lvc_pad. |
| Creating placeholder cell definition for module s8iom0_vccd_hvc_pad. |
| Creating placeholder cell definition for module s8iom0_vccd_lvc_pad. |
| Creating placeholder cell definition for module s8iom0_vssa_hvc_pad. |
| Creating placeholder cell definition for module s8iom0_vssa_lvc_pad. |
| Creating placeholder cell definition for module s8iom0_vssd_lvc_pad. |
| Creating placeholder cell definition for module s8iom0_vssio_lvc_pad. |
| Creating placeholder cell definition for module s8iom0_gpiov2_pad. |
| Creating placeholder cell definition for module s8iom0s8_top_xres4v2. |
| Creating placeholder cell definition for module s8iom0s8_top_gpio_ovtv2. |
| Creating placeholder cell definition for module s8iom0_corner_pad. |
| Creating placeholder cell definition for module striVe_clkrst. |
| Creating placeholder cell definition for module striVe_soc. |
| Creating placeholder cell definition for module scs8hd_conb_1. |
| Creating placeholder cell definition for module striVe_spi. |
| Creating placeholder cell definition for module lvlshiftdown. |
| Creating placeholder cell definition for module digital_pll. |
| Reading setup file /home/tim/projects/efabless/tech/SW/EFS8A/libs.tech/netgen/EFS8A_setup.tcl |
| Comparison output logged to file striVe_comp.out |
| Logging to file "striVe_comp.out" enabled |
| Contents of circuit 1: Circuit: 's8iom0_vddio_hvc_pad' |
| Circuit s8iom0_vddio_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 14 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vddio_hvc_pad' |
| Circuit s8iom0_vddio_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vddio_hvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_gpiov2_pad' |
| Circuit s8iom0_gpiov2_pad contains 0 device instances. |
| Circuit contains 0 nets, and 39 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_gpiov2_pad' |
| Circuit s8iom0_gpiov2_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_gpiov2_pad contains no devices. |
| Contents of circuit 1: Circuit: 'scs8hd_conb_1' |
| Circuit scs8hd_conb_1 contains 0 device instances. |
| Circuit contains 0 nets, and 4 disconnected pins. |
| Contents of circuit 2: Circuit: 'scs8hd_conb_1' |
| Circuit scs8hd_conb_1 contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit scs8hd_conb_1 contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vssd_lvc_pad' |
| Circuit s8iom0_vssd_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 18 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vssd_lvc_pad' |
| Circuit s8iom0_vssd_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vssd_lvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 'digital_pll' |
| Circuit digital_pll contains 0 device instances. |
| Circuit contains 0 nets, and 47 disconnected pins. |
| Contents of circuit 2: Circuit: 'digital_pll' |
| Circuit digital_pll contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit digital_pll contains no devices. |
| Contents of circuit 1: Circuit: 'lvlshiftdown' |
| Circuit lvlshiftdown contains 0 device instances. |
| Circuit contains 0 nets, and 6 disconnected pins. |
| Contents of circuit 2: Circuit: 'lvlshiftdown' |
| Circuit lvlshiftdown contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit lvlshiftdown contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0s8_top_gpio_ovtv2' |
| Circuit s8iom0s8_top_gpio_ovtv2 contains 0 device instances. |
| Circuit contains 0 nets, and 44 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0s8_top_gpio_ovtv2' |
| Circuit s8iom0s8_top_gpio_ovtv2 contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0s8_top_gpio_ovtv2 contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vccd_lvc_pad' |
| Circuit s8iom0_vccd_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 18 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vccd_lvc_pad' |
| Circuit s8iom0_vccd_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vccd_lvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vccd_hvc_pad' |
| Circuit s8iom0_vccd_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 14 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vccd_hvc_pad' |
| Circuit s8iom0_vccd_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vccd_hvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vdda_lvc_pad' |
| Circuit s8iom0_vdda_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 18 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vdda_lvc_pad' |
| Circuit s8iom0_vdda_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vdda_lvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vssa_hvc_pad' |
| Circuit s8iom0_vssa_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 14 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vssa_hvc_pad' |
| Circuit s8iom0_vssa_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vssa_hvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vdda_hvc_pad' |
| Circuit s8iom0_vdda_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 14 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vdda_hvc_pad' |
| Circuit s8iom0_vdda_hvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vdda_hvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vssio_lvc_pad' |
| Circuit s8iom0_vssio_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 18 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vssio_lvc_pad' |
| Circuit s8iom0_vssio_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vssio_lvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 'striVe_clkrst' |
| Circuit striVe_clkrst contains 0 device instances. |
| Circuit contains 0 nets, and 9 disconnected pins. |
| Contents of circuit 2: Circuit: 'striVe_clkrst' |
| Circuit striVe_clkrst contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit striVe_clkrst contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_vssa_lvc_pad' |
| Circuit s8iom0_vssa_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets, and 18 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_vssa_lvc_pad' |
| Circuit s8iom0_vssa_lvc_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_vssa_lvc_pad contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0_corner_pad' |
| Circuit s8iom0_corner_pad contains 0 device instances. |
| Circuit contains 0 nets, and 12 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0_corner_pad' |
| Circuit s8iom0_corner_pad contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0_corner_pad contains no devices. |
| Contents of circuit 1: Circuit: 'striVe_soc' |
| Circuit striVe_soc contains 0 device instances. |
| Circuit contains 0 nets, and 258 disconnected pins. |
| Contents of circuit 2: Circuit: 'striVe_soc' |
| Circuit striVe_soc contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit striVe_soc contains no devices. |
| Contents of circuit 1: Circuit: 'striVe_spi' |
| Circuit striVe_spi contains 0 device instances. |
| Circuit contains 0 nets, and 78 disconnected pins. |
| Contents of circuit 2: Circuit: 'striVe_spi' |
| Circuit striVe_spi contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit striVe_spi contains no devices. |
| Contents of circuit 1: Circuit: 's8iom0s8_top_xres4v2' |
| Circuit s8iom0s8_top_xres4v2 contains 0 device instances. |
| Circuit contains 0 nets, and 25 disconnected pins. |
| Contents of circuit 2: Circuit: 's8iom0s8_top_xres4v2' |
| Circuit s8iom0s8_top_xres4v2 contains 0 device instances. |
| Circuit contains 0 nets. |
| |
| Circuit s8iom0s8_top_xres4v2 contains no devices. |
| Contents of circuit 1: Circuit: 'striVe' |
| Circuit striVe contains 71 device instances. |
| Class: striVe_spi instances: 1 |
| Class: striVe_clkrst instances: 1 |
| Class: s8iom0_vssd_lvc_pad instances: 1 |
| Class: s8iom0s8_top_gpio_ovtv2 instances: 2 |
| Class: s8iom0_vdda_hvc_pad instances: 2 |
| Class: s8iom0_vssio_lvc_pad instances: 1 |
| Class: s8iom0_vddio_hvc_pad instances: 2 |
| Class: s8iom0_gpiov2_pad instances: 36 |
| Class: digital_pll instances: 1 |
| Class: s8iom0_vssa_hvc_pad instances: 4 |
| Class: s8iom0_vssa_lvc_pad instances: 1 |
| Class: lvlshiftdown instances: 1 |
| Class: striVe_soc instances: 1 |
| Class: s8iom0_vccd_hvc_pad instances: 2 |
| Class: s8iom0_vccd_lvc_pad instances: 2 |
| Class: s8iom0s8_top_xres4v2 instances: 1 |
| Class: scs8hd_conb_1 instances: 4 |
| Class: s8iom0_vdda_lvc_pad instances: 4 |
| Class: s8iom0_corner_pad instances: 4 |
| Circuit contains 638 nets. |
| Contents of circuit 2: Circuit: 'striVe' |
| Circuit striVe contains 71 device instances. |
| Class: striVe_spi instances: 1 |
| Class: striVe_clkrst instances: 1 |
| Class: s8iom0_vssd_lvc_pad instances: 1 |
| Class: s8iom0s8_top_gpio_ovtv2 instances: 2 |
| Class: s8iom0_vdda_hvc_pad instances: 2 |
| Class: s8iom0_vssio_lvc_pad instances: 1 |
| Class: s8iom0_vddio_hvc_pad instances: 2 |
| Class: s8iom0_gpiov2_pad instances: 36 |
| Class: digital_pll instances: 1 |
| Class: s8iom0_vssa_hvc_pad instances: 4 |
| Class: s8iom0_vssa_lvc_pad instances: 1 |
| Class: lvlshiftdown instances: 1 |
| Class: striVe_soc instances: 1 |
| Class: s8iom0_vccd_hvc_pad instances: 2 |
| Class: s8iom0_vccd_lvc_pad instances: 2 |
| Class: s8iom0s8_top_xres4v2 instances: 1 |
| Class: scs8hd_conb_1 instances: 4 |
| Class: s8iom0_vdda_lvc_pad instances: 4 |
| Class: s8iom0_corner_pad instances: 4 |
| Circuit contains 629 nets. |
| |
| Circuit 1 contains 71 devices, Circuit 2 contains 71 devices. |
| Circuit 1 contains 629 nets, Circuit 2 contains 629 nets. |
| |
| Circuits match with 35 symmetries. |
| Netlists match with 25 symmetries. |
| Circuits match correctly. |
| Result: Circuits match uniquely. |
| Logging to file "striVe_comp.out" disabled |
| LVS Done. |