| Flattening unmatched subcell s8iom0s8_com_bus_slice_1um in circuit striVe (0)(4708 instances) |
| Flattening unmatched subcell scs8hd_tapvpwrvgnd_1 in circuit striVe (0)(4 instances) |
| |
| Cell s8iom0_vddio_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vddio_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vddio_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vddio_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssa |
| Cell s8iom0_vddio_hvc_pad disconnected node: vdda |
| Cell s8iom0_vddio_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vddio_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vddio_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vddio_hvc_pad disconnected node: vddio |
| Cell s8iom0_vddio_hvc_pad disconnected node: vccd |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssio |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssd |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vddio_hvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vddio_hvc_pad |Circuit 2: s8iom0_vddio_hvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_hvc |drn_hvc |
| src_bdy_hvc |src_bdy_hvc |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vddio_hvc_pad and s8iom0_vddio_hvc_pad are equivalent. |
| |
| Cell s8iom0_gpiov2_pad disconnected node: in_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_noesd_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_esd_0_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_esd_1_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad |
| Cell s8iom0_gpiov2_pad disconnected node: dm<2> |
| Cell s8iom0_gpiov2_pad disconnected node: dm<1> |
| Cell s8iom0_gpiov2_pad disconnected node: dm<0> |
| Cell s8iom0_gpiov2_pad disconnected node: hld_h_n |
| Cell s8iom0_gpiov2_pad disconnected node: in |
| Cell s8iom0_gpiov2_pad disconnected node: inp_dis |
| Cell s8iom0_gpiov2_pad disconnected node: ib_mode_sel |
| Cell s8iom0_gpiov2_pad disconnected node: enable_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vdda_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_inp_h |
| Cell s8iom0_gpiov2_pad disconnected node: oe_n |
| Cell s8iom0_gpiov2_pad disconnected node: tie_hi_esd |
| Cell s8iom0_gpiov2_pad disconnected node: tie_lo_esd |
| Cell s8iom0_gpiov2_pad disconnected node: slow |
| Cell s8iom0_gpiov2_pad disconnected node: vtrip_sel |
| Cell s8iom0_gpiov2_pad disconnected node: hld_ovr |
| Cell s8iom0_gpiov2_pad disconnected node: analog_en |
| Cell s8iom0_gpiov2_pad disconnected node: analog_sel |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vddio |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vswitch_h |
| Cell s8iom0_gpiov2_pad disconnected node: analog_pol |
| Cell s8iom0_gpiov2_pad disconnected node: out |
| Cell s8iom0_gpiov2_pad disconnected node: amuxbus_a |
| Cell s8iom0_gpiov2_pad disconnected node: amuxbus_b |
| Cell s8iom0_gpiov2_pad disconnected node: vssa |
| Cell s8iom0_gpiov2_pad disconnected node: vdda |
| Cell s8iom0_gpiov2_pad disconnected node: vswitch |
| Cell s8iom0_gpiov2_pad disconnected node: vddio_q |
| Cell s8iom0_gpiov2_pad disconnected node: vcchib |
| Cell s8iom0_gpiov2_pad disconnected node: vddio |
| Cell s8iom0_gpiov2_pad disconnected node: vccd |
| Cell s8iom0_gpiov2_pad disconnected node: vssio |
| Cell s8iom0_gpiov2_pad disconnected node: vssd |
| Cell s8iom0_gpiov2_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_gpiov2_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_gpiov2_pad |Circuit 2: s8iom0_gpiov2_pad |
| -------------------------------------------|------------------------------------------- |
| in_h |in_h |
| pad_a_noesd_h |pad_a_noesd_h |
| pad_a_esd_0_h |pad_a_esd_0_h |
| pad_a_esd_1_h |pad_a_esd_1_h |
| pad |pad |
| dm<2> |dm[2] |
| dm<1> |dm[1] |
| dm<0> |dm[0] |
| hld_h_n |hld_h_n |
| in |in |
| inp_dis |inp_dis |
| ib_mode_sel |ib_mode_sel |
| enable_h |enable_h |
| enable_vdda_h |enable_vdda_h |
| enable_inp_h |enable_inp_h |
| oe_n |oe_n |
| tie_hi_esd |tie_hi_esd |
| tie_lo_esd |tie_lo_esd |
| slow |slow |
| vtrip_sel |vtrip_sel |
| hld_ovr |hld_ovr |
| analog_en |analog_en |
| analog_sel |analog_sel |
| enable_vddio |enable_vddio |
| enable_vswitch_h |enable_vswitch_h |
| analog_pol |analog_pol |
| out |out |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_gpiov2_pad and s8iom0_gpiov2_pad are equivalent. |
| |
| Cell scs8hd_conb_1 disconnected node: HI |
| Cell scs8hd_conb_1 disconnected node: LO |
| Cell scs8hd_conb_1 disconnected node: vgnd |
| Cell scs8hd_conb_1 disconnected node: vpwr |
| Warning: Equate pins: cell scs8hd_conb_1 has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: scs8hd_conb_1 |Circuit 2: scs8hd_conb_1 |
| -------------------------------------------|------------------------------------------- |
| HI |HI |
| LO |LO |
| vgnd |vgnd |
| vpwr |vpwr |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes scs8hd_conb_1 and scs8hd_conb_1 are equivalent. |
| |
| Cell s8iom0_vssd_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssd_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssd_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssd_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssd_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssd_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssd_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssi |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssd_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssd_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssd_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssd_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssd_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssd_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssio |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vssd_lvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vssd_lvc_pad |Circuit 2: s8iom0_vssd_lvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_lvc1 |drn_lvc1 |
| drn_lvc2 |drn_lvc2 |
| src_bdy_lvc1 |src_bdy_lvc1 |
| src_bdy_lvc2 |src_bdy_lvc2 |
| bdy2_b2b |bdy2_b2b |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vssd_lvc_pad and s8iom0_vssd_lvc_pad are equivalent. |
| |
| Cell digital_pll disconnected node: reset |
| Cell digital_pll disconnected node: extclk_sel |
| Cell digital_pll disconnected node: osc |
| Cell digital_pll disconnected node: clockc |
| Cell digital_pll disconnected node: clockp[1] |
| Cell digital_pll disconnected node: clockp[0] |
| Cell digital_pll disconnected node: clockd[3] |
| Cell digital_pll disconnected node: clockd[2] |
| Cell digital_pll disconnected node: clockd[1] |
| Cell digital_pll disconnected node: clockd[0] |
| Cell digital_pll disconnected node: div[4] |
| Cell digital_pll disconnected node: div[3] |
| Cell digital_pll disconnected node: div[2] |
| Cell digital_pll disconnected node: div[1] |
| Cell digital_pll disconnected node: div[0] |
| Cell digital_pll disconnected node: sel[2] |
| Cell digital_pll disconnected node: sel[1] |
| Cell digital_pll disconnected node: sel[0] |
| Cell digital_pll disconnected node: dco |
| Cell digital_pll disconnected node: ext_trim[25] |
| Cell digital_pll disconnected node: ext_trim[24] |
| Cell digital_pll disconnected node: ext_trim[23] |
| Cell digital_pll disconnected node: ext_trim[22] |
| Cell digital_pll disconnected node: ext_trim[21] |
| Cell digital_pll disconnected node: ext_trim[20] |
| Cell digital_pll disconnected node: ext_trim[19] |
| Cell digital_pll disconnected node: ext_trim[18] |
| Cell digital_pll disconnected node: ext_trim[17] |
| Cell digital_pll disconnected node: ext_trim[16] |
| Cell digital_pll disconnected node: ext_trim[15] |
| Cell digital_pll disconnected node: ext_trim[14] |
| Cell digital_pll disconnected node: ext_trim[13] |
| Cell digital_pll disconnected node: ext_trim[12] |
| Cell digital_pll disconnected node: ext_trim[11] |
| Cell digital_pll disconnected node: ext_trim[10] |
| Cell digital_pll disconnected node: ext_trim[9] |
| Cell digital_pll disconnected node: ext_trim[8] |
| Cell digital_pll disconnected node: ext_trim[7] |
| Cell digital_pll disconnected node: ext_trim[6] |
| Cell digital_pll disconnected node: ext_trim[5] |
| Cell digital_pll disconnected node: ext_trim[4] |
| Cell digital_pll disconnected node: ext_trim[3] |
| Cell digital_pll disconnected node: ext_trim[2] |
| Cell digital_pll disconnected node: ext_trim[1] |
| Cell digital_pll disconnected node: ext_trim[0] |
| Cell digital_pll disconnected node: vdd |
| Cell digital_pll disconnected node: vss |
| Warning: Equate pins: cell digital_pll has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: digital_pll |Circuit 2: digital_pll |
| -------------------------------------------|------------------------------------------- |
| reset |reset |
| extclk_sel |extclk_sel |
| osc |osc |
| clockc |clockc |
| clockp[1] |clockp[1] |
| clockp[0] |clockp[0] |
| clockd[3] |clockd[3] |
| clockd[2] |clockd[2] |
| clockd[1] |clockd[1] |
| clockd[0] |clockd[0] |
| div[4] |div[4] |
| div[3] |div[3] |
| div[2] |div[2] |
| div[1] |div[1] |
| div[0] |div[0] |
| sel[2] |sel[2] |
| sel[1] |sel[1] |
| sel[0] |sel[0] |
| dco |dco |
| ext_trim[25] |ext_trim[25] |
| ext_trim[24] |ext_trim[24] |
| ext_trim[23] |ext_trim[23] |
| ext_trim[22] |ext_trim[22] |
| ext_trim[21] |ext_trim[21] |
| ext_trim[20] |ext_trim[20] |
| ext_trim[19] |ext_trim[19] |
| ext_trim[18] |ext_trim[18] |
| ext_trim[17] |ext_trim[17] |
| ext_trim[16] |ext_trim[16] |
| ext_trim[15] |ext_trim[15] |
| ext_trim[14] |ext_trim[14] |
| ext_trim[13] |ext_trim[13] |
| ext_trim[12] |ext_trim[12] |
| ext_trim[11] |ext_trim[11] |
| ext_trim[10] |ext_trim[10] |
| ext_trim[9] |ext_trim[9] |
| ext_trim[8] |ext_trim[8] |
| ext_trim[7] |ext_trim[7] |
| ext_trim[6] |ext_trim[6] |
| ext_trim[5] |ext_trim[5] |
| ext_trim[4] |ext_trim[4] |
| ext_trim[3] |ext_trim[3] |
| ext_trim[2] |ext_trim[2] |
| ext_trim[1] |ext_trim[1] |
| ext_trim[0] |ext_trim[0] |
| vdd |vdd |
| vss |vss |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes digital_pll and digital_pll are equivalent. |
| |
| Cell lvlshiftdown disconnected node: vnb |
| Cell lvlshiftdown disconnected node: vpwr |
| Cell lvlshiftdown disconnected node: vpb |
| Cell lvlshiftdown disconnected node: vgnd |
| Cell lvlshiftdown disconnected node: X |
| Cell lvlshiftdown disconnected node: A |
| Warning: Equate pins: cell lvlshiftdown has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: lvlshiftdown |Circuit 2: lvlshiftdown |
| -------------------------------------------|------------------------------------------- |
| vnb |vnb |
| vpwr |vpwr |
| vpb |vpb |
| vgnd |vgnd |
| X |X |
| A |A |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes lvlshiftdown and lvlshiftdown are equivalent. |
| |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: amuxbus_a |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: amuxbus_b |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_en |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_pol |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_sel |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm<2> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm<1> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm<0> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_inp_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vdda_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vddio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vswitch_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hld_h_n |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hld_ovr |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hys_trim |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: ib_mode_sel<1> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: ib_mode_sel<0> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: in |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: in_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: inp_dis |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: oe_n |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: out |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_esd_0_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_esd_1_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_noesd_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slew_ctl<1> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slew_ctl<0> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slow |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: tie_hi_esd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: tie_lo_esd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vccd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vcchib |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vdda |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vddio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vddio_q |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vinref |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssa |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssio_q |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vswitch |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vtrip_sel |
| Warning: Equate pins: cell s8iom0s8_top_gpio_ovtv2 has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0s8_top_gpio_ovtv2 |Circuit 2: s8iom0s8_top_gpio_ovtv2 |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| analog_en |analog_en |
| analog_pol |analog_pol |
| analog_sel |analog_sel |
| dm<2> |dm[2] |
| dm<1> |dm[1] |
| dm<0> |dm[0] |
| enable_h |enable_h |
| enable_inp_h |enable_inp_h |
| enable_vdda_h |enable_vdda_h |
| enable_vddio |enable_vddio |
| enable_vswitch_h |enable_vswitch_h |
| hld_h_n |hld_h_n |
| hld_ovr |hld_ovr |
| hys_trim |hys_trim |
| ib_mode_sel<1> |ib_mode_sel[1] |
| ib_mode_sel<0> |ib_mode_sel[0] |
| in |in |
| in_h |in_h |
| inp_dis |inp_dis |
| oe_n |oe_n |
| out |out |
| pad |pad |
| pad_a_esd_0_h |pad_a_esd_0_h |
| pad_a_esd_1_h |pad_a_esd_1_h |
| pad_a_noesd_h |pad_a_noesd_h |
| slew_ctl<1> |slew_ctl[1] |
| slew_ctl<0> |slew_ctl[0] |
| slow |slow |
| tie_hi_esd |tie_hi_esd |
| tie_lo_esd |tie_lo_esd |
| vccd |vccd |
| vcchib |vcchib |
| vdda |vdda |
| vddio |vddio |
| vddio_q |vddio_q |
| vinref |vinref |
| vssa |vssa |
| vssd |vssd |
| vssio |vssio |
| vssio_q |vssio_q |
| vswitch |vswitch |
| vtrip_sel |vtrip_sel |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0s8_top_gpio_ovtv2 and s8iom0s8_top_gpio_ovtv2 are equivalent. |
| |
| Cell s8iom0_vccd_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vccd_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vccd_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vccd_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vccd_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vccd_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vccd_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssi |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssa |
| Cell s8iom0_vccd_lvc_pad disconnected node: vdda |
| Cell s8iom0_vccd_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vccd_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vccd_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vccd_lvc_pad disconnected node: vddio |
| Cell s8iom0_vccd_lvc_pad disconnected node: vccd |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssio |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssd |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vccd_lvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vccd_lvc_pad |Circuit 2: s8iom0_vccd_lvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_lvc1 |drn_lvc1 |
| drn_lvc2 |drn_lvc2 |
| src_bdy_lvc1 |src_bdy_lvc1 |
| src_bdy_lvc2 |src_bdy_lvc2 |
| bdy2_b2b |bdy2_b2b |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vccd_lvc_pad and s8iom0_vccd_lvc_pad are equivalent. |
| |
| Cell s8iom0_vccd_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vccd_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vccd_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vccd_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssa |
| Cell s8iom0_vccd_hvc_pad disconnected node: vdda |
| Cell s8iom0_vccd_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vccd_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vccd_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vccd_hvc_pad disconnected node: vddio |
| Cell s8iom0_vccd_hvc_pad disconnected node: vccd |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssio |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssd |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vccd_hvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vccd_hvc_pad |Circuit 2: s8iom0_vccd_hvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_hvc |drn_hvc |
| src_bdy_hvc |src_bdy_hvc |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vccd_hvc_pad and s8iom0_vccd_hvc_pad are equivalent. |
| |
| Cell s8iom0_vdda_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vdda_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vdda_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vdda_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vdda_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vdda_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vdda_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssi |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssa |
| Cell s8iom0_vdda_lvc_pad disconnected node: vdda |
| Cell s8iom0_vdda_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vdda_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vdda_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vdda_lvc_pad disconnected node: vddio |
| Cell s8iom0_vdda_lvc_pad disconnected node: vccd |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssio |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssd |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vdda_lvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vdda_lvc_pad |Circuit 2: s8iom0_vdda_lvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_lvc1 |drn_lvc1 |
| drn_lvc2 |drn_lvc2 |
| src_bdy_lvc1 |src_bdy_lvc1 |
| src_bdy_lvc2 |src_bdy_lvc2 |
| bdy2_b2b |bdy2_b2b |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vdda_lvc_pad and s8iom0_vdda_lvc_pad are equivalent. |
| |
| Cell s8iom0_vssa_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssa_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssa_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vssa_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssa |
| Cell s8iom0_vssa_hvc_pad disconnected node: vdda |
| Cell s8iom0_vssa_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vssa_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssa_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vssa_hvc_pad disconnected node: vddio |
| Cell s8iom0_vssa_hvc_pad disconnected node: vccd |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssio |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssd |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vssa_hvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vssa_hvc_pad |Circuit 2: s8iom0_vssa_hvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_hvc |drn_hvc |
| src_bdy_hvc |src_bdy_hvc |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vssa_hvc_pad and s8iom0_vssa_hvc_pad are equivalent. |
| |
| Cell s8iom0_vdda_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vdda_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vdda_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vdda_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssa |
| Cell s8iom0_vdda_hvc_pad disconnected node: vdda |
| Cell s8iom0_vdda_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vdda_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vdda_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vdda_hvc_pad disconnected node: vddio |
| Cell s8iom0_vdda_hvc_pad disconnected node: vccd |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssio |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssd |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vdda_hvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vdda_hvc_pad |Circuit 2: s8iom0_vdda_hvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_hvc |drn_hvc |
| src_bdy_hvc |src_bdy_hvc |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vdda_hvc_pad and s8iom0_vdda_hvc_pad are equivalent. |
| |
| Cell s8iom0_vssio_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssio_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssio_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssio_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssio_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssio_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssio_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssi |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssio_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssio_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssio_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssio_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssio_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssio_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssio |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vssio_lvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vssio_lvc_pad |Circuit 2: s8iom0_vssio_lvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_lvc1 |drn_lvc1 |
| drn_lvc2 |drn_lvc2 |
| src_bdy_lvc1 |src_bdy_lvc1 |
| src_bdy_lvc2 |src_bdy_lvc2 |
| bdy2_b2b |bdy2_b2b |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vssio_lvc_pad and s8iom0_vssio_lvc_pad are equivalent. |
| |
| Cell striVe_clkrst disconnected node: ext_clk_sel |
| Cell striVe_clkrst disconnected node: ext_clk |
| Cell striVe_clkrst disconnected node: pll_clk |
| Cell striVe_clkrst disconnected node: reset |
| Cell striVe_clkrst disconnected node: ext_reset |
| Cell striVe_clkrst disconnected node: clk |
| Cell striVe_clkrst disconnected node: resetn |
| Cell striVe_clkrst disconnected node: vdd1v8 |
| Cell striVe_clkrst disconnected node: vss |
| Warning: Equate pins: cell striVe_clkrst has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: striVe_clkrst |Circuit 2: striVe_clkrst |
| -------------------------------------------|------------------------------------------- |
| ext_clk_sel |ext_clk_sel |
| ext_clk |ext_clk |
| pll_clk |pll_clk |
| reset |reset |
| ext_reset |ext_reset |
| clk |clk |
| resetn |resetn |
| vdd1v8 |vdd1v8 |
| vss |vss |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes striVe_clkrst and striVe_clkrst are equivalent. |
| |
| Cell s8iom0_vssa_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssa_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssa_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssa_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssa_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssa_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssa_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssi |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssa_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssa_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssa_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssa_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssa_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssa_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssio |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_vssa_lvc_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_vssa_lvc_pad |Circuit 2: s8iom0_vssa_lvc_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| drn_lvc1 |drn_lvc1 |
| drn_lvc2 |drn_lvc2 |
| src_bdy_lvc1 |src_bdy_lvc1 |
| src_bdy_lvc2 |src_bdy_lvc2 |
| bdy2_b2b |bdy2_b2b |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_vssa_lvc_pad and s8iom0_vssa_lvc_pad are equivalent. |
| |
| Cell s8iom0_corner_pad disconnected node: amuxbus_a |
| Cell s8iom0_corner_pad disconnected node: amuxbus_b |
| Cell s8iom0_corner_pad disconnected node: vssa |
| Cell s8iom0_corner_pad disconnected node: vdda |
| Cell s8iom0_corner_pad disconnected node: vswitch |
| Cell s8iom0_corner_pad disconnected node: vddio_q |
| Cell s8iom0_corner_pad disconnected node: vcchib |
| Cell s8iom0_corner_pad disconnected node: vddio |
| Cell s8iom0_corner_pad disconnected node: vccd |
| Cell s8iom0_corner_pad disconnected node: vssio |
| Cell s8iom0_corner_pad disconnected node: vssd |
| Cell s8iom0_corner_pad disconnected node: vssio_q |
| Warning: Equate pins: cell s8iom0_corner_pad has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0_corner_pad |Circuit 2: s8iom0_corner_pad |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| vssa |vssa |
| vdda |vdda |
| vswitch |vswitch |
| vddio_q |vddio_q |
| vcchib |vcchib |
| vddio |vddio |
| vccd |vccd |
| vssio |vssio |
| vssd |vssd |
| vssio_q |vssio_q |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0_corner_pad and s8iom0_corner_pad are equivalent. |
| |
| Cell striVe_soc disconnected node: pll_clk |
| Cell striVe_soc disconnected node: ext_clk |
| Cell striVe_soc disconnected node: ext_clk_sel |
| Cell striVe_soc disconnected node: clk |
| Cell striVe_soc disconnected node: resetn |
| Cell striVe_soc disconnected node: gpio_out_pad[15] |
| Cell striVe_soc disconnected node: gpio_out_pad[14] |
| Cell striVe_soc disconnected node: gpio_out_pad[13] |
| Cell striVe_soc disconnected node: gpio_out_pad[12] |
| Cell striVe_soc disconnected node: gpio_out_pad[11] |
| Cell striVe_soc disconnected node: gpio_out_pad[10] |
| Cell striVe_soc disconnected node: gpio_out_pad[9] |
| Cell striVe_soc disconnected node: gpio_out_pad[8] |
| Cell striVe_soc disconnected node: gpio_out_pad[7] |
| Cell striVe_soc disconnected node: gpio_out_pad[6] |
| Cell striVe_soc disconnected node: gpio_out_pad[5] |
| Cell striVe_soc disconnected node: gpio_out_pad[4] |
| Cell striVe_soc disconnected node: gpio_out_pad[3] |
| Cell striVe_soc disconnected node: gpio_out_pad[2] |
| Cell striVe_soc disconnected node: gpio_out_pad[1] |
| Cell striVe_soc disconnected node: gpio_out_pad[0] |
| Cell striVe_soc disconnected node: gpio_in_pad[15] |
| Cell striVe_soc disconnected node: gpio_in_pad[14] |
| Cell striVe_soc disconnected node: gpio_in_pad[13] |
| Cell striVe_soc disconnected node: gpio_in_pad[12] |
| Cell striVe_soc disconnected node: gpio_in_pad[11] |
| Cell striVe_soc disconnected node: gpio_in_pad[10] |
| Cell striVe_soc disconnected node: gpio_in_pad[9] |
| Cell striVe_soc disconnected node: gpio_in_pad[8] |
| Cell striVe_soc disconnected node: gpio_in_pad[7] |
| Cell striVe_soc disconnected node: gpio_in_pad[6] |
| Cell striVe_soc disconnected node: gpio_in_pad[5] |
| Cell striVe_soc disconnected node: gpio_in_pad[4] |
| Cell striVe_soc disconnected node: gpio_in_pad[3] |
| Cell striVe_soc disconnected node: gpio_in_pad[2] |
| Cell striVe_soc disconnected node: gpio_in_pad[1] |
| Cell striVe_soc disconnected node: gpio_in_pad[0] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[15] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[14] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[13] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[12] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[11] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[10] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[9] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[8] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[7] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[6] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[5] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[4] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[3] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[2] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[1] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[0] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[15] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[14] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[13] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[12] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[11] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[10] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[9] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[8] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[7] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[6] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[5] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[4] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[3] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[2] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[1] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[0] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[15] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[14] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[13] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[12] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[11] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[10] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[9] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[8] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[7] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[6] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[5] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[4] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[3] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[2] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[1] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[0] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[15] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[14] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[13] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[12] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[11] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[10] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[9] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[8] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[7] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[6] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[5] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[4] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[3] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[2] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[1] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[0] |
| Cell striVe_soc disconnected node: adc0_ena |
| Cell striVe_soc disconnected node: adc0_convert |
| Cell striVe_soc disconnected node: adc0_data[9] |
| Cell striVe_soc disconnected node: adc0_data[8] |
| Cell striVe_soc disconnected node: adc0_data[7] |
| Cell striVe_soc disconnected node: adc0_data[6] |
| Cell striVe_soc disconnected node: adc0_data[5] |
| Cell striVe_soc disconnected node: adc0_data[4] |
| Cell striVe_soc disconnected node: adc0_data[3] |
| Cell striVe_soc disconnected node: adc0_data[2] |
| Cell striVe_soc disconnected node: adc0_data[1] |
| Cell striVe_soc disconnected node: adc0_data[0] |
| Cell striVe_soc disconnected node: adc0_done |
| Cell striVe_soc disconnected node: adc0_clk |
| Cell striVe_soc disconnected node: adc0_inputsrc[1] |
| Cell striVe_soc disconnected node: adc0_inputsrc[0] |
| Cell striVe_soc disconnected node: adc1_ena |
| Cell striVe_soc disconnected node: adc1_convert |
| Cell striVe_soc disconnected node: adc1_clk |
| Cell striVe_soc disconnected node: adc1_inputsrc[1] |
| Cell striVe_soc disconnected node: adc1_inputsrc[0] |
| Cell striVe_soc disconnected node: adc1_data[9] |
| Cell striVe_soc disconnected node: adc1_data[8] |
| Cell striVe_soc disconnected node: adc1_data[7] |
| Cell striVe_soc disconnected node: adc1_data[6] |
| Cell striVe_soc disconnected node: adc1_data[5] |
| Cell striVe_soc disconnected node: adc1_data[4] |
| Cell striVe_soc disconnected node: adc1_data[3] |
| Cell striVe_soc disconnected node: adc1_data[2] |
| Cell striVe_soc disconnected node: adc1_data[1] |
| Cell striVe_soc disconnected node: adc1_data[0] |
| Cell striVe_soc disconnected node: adc1_done |
| Cell striVe_soc disconnected node: dac_ena |
| Cell striVe_soc disconnected node: dac_value[9] |
| Cell striVe_soc disconnected node: dac_value[8] |
| Cell striVe_soc disconnected node: dac_value[7] |
| Cell striVe_soc disconnected node: dac_value[6] |
| Cell striVe_soc disconnected node: dac_value[5] |
| Cell striVe_soc disconnected node: dac_value[4] |
| Cell striVe_soc disconnected node: dac_value[3] |
| Cell striVe_soc disconnected node: dac_value[2] |
| Cell striVe_soc disconnected node: dac_value[1] |
| Cell striVe_soc disconnected node: dac_value[0] |
| Cell striVe_soc disconnected node: analog_out_sel |
| Cell striVe_soc disconnected node: opamp_ena |
| Cell striVe_soc disconnected node: opamp_bias_ena |
| Cell striVe_soc disconnected node: bg_ena |
| Cell striVe_soc disconnected node: comp_ena |
| Cell striVe_soc disconnected node: comp_ninputsrc[1] |
| Cell striVe_soc disconnected node: comp_ninputsrc[0] |
| Cell striVe_soc disconnected node: comp_pinputsrc[1] |
| Cell striVe_soc disconnected node: comp_pinputsrc[0] |
| Cell striVe_soc disconnected node: rcosc_ena |
| Cell striVe_soc disconnected node: overtemp_ena |
| Cell striVe_soc disconnected node: overtemp |
| Cell striVe_soc disconnected node: rcosc_in |
| Cell striVe_soc disconnected node: xtal_in |
| Cell striVe_soc disconnected node: comp_in |
| Cell striVe_soc disconnected node: spi_sck |
| Cell striVe_soc disconnected node: spi_ro_config[7] |
| Cell striVe_soc disconnected node: spi_ro_config[6] |
| Cell striVe_soc disconnected node: spi_ro_config[5] |
| Cell striVe_soc disconnected node: spi_ro_config[4] |
| Cell striVe_soc disconnected node: spi_ro_config[3] |
| Cell striVe_soc disconnected node: spi_ro_config[2] |
| Cell striVe_soc disconnected node: spi_ro_config[1] |
| Cell striVe_soc disconnected node: spi_ro_config[0] |
| Cell striVe_soc disconnected node: spi_ro_xtal_ena |
| Cell striVe_soc disconnected node: spi_ro_reg_ena |
| Cell striVe_soc disconnected node: spi_ro_pll_dco_ena |
| Cell striVe_soc disconnected node: spi_ro_pll_div[4] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[3] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[0] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[0] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[25] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[24] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[23] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[22] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[21] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[20] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[19] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[18] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[17] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[16] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[15] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[14] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[13] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[12] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[11] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[10] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[9] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[8] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[7] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[6] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[5] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[4] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[3] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[0] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[11] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[10] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[9] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[8] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[7] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[6] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[5] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[4] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[3] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[2] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[1] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[0] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[7] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[6] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[5] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[4] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[3] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[2] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[1] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[0] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[3] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[2] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[1] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[0] |
| Cell striVe_soc disconnected node: ser_tx |
| Cell striVe_soc disconnected node: ser_rx |
| Cell striVe_soc disconnected node: irq_pin |
| Cell striVe_soc disconnected node: irq_spi |
| Cell striVe_soc disconnected node: trap |
| Cell striVe_soc disconnected node: flash_csb |
| Cell striVe_soc disconnected node: flash_clk |
| Cell striVe_soc disconnected node: flash_csb_oeb |
| Cell striVe_soc disconnected node: flash_clk_oeb |
| Cell striVe_soc disconnected node: flash_io0_oeb |
| Cell striVe_soc disconnected node: flash_io1_oeb |
| Cell striVe_soc disconnected node: flash_io2_oeb |
| Cell striVe_soc disconnected node: flash_io3_oeb |
| Cell striVe_soc disconnected node: flash_csb_ieb |
| Cell striVe_soc disconnected node: flash_clk_ieb |
| Cell striVe_soc disconnected node: flash_io0_ieb |
| Cell striVe_soc disconnected node: flash_io1_ieb |
| Cell striVe_soc disconnected node: flash_io2_ieb |
| Cell striVe_soc disconnected node: flash_io3_ieb |
| Cell striVe_soc disconnected node: flash_io0_do |
| Cell striVe_soc disconnected node: flash_io1_do |
| Cell striVe_soc disconnected node: flash_io2_do |
| Cell striVe_soc disconnected node: flash_io3_do |
| Cell striVe_soc disconnected node: flash_io0_di |
| Cell striVe_soc disconnected node: flash_io1_di |
| Cell striVe_soc disconnected node: flash_io2_di |
| Cell striVe_soc disconnected node: flash_io3_di |
| Cell striVe_soc disconnected node: vdd1v8 |
| Cell striVe_soc disconnected node: vss |
| Warning: Equate pins: cell striVe_soc has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: striVe_soc |Circuit 2: striVe_soc |
| -------------------------------------------|------------------------------------------- |
| pll_clk |pll_clk |
| ext_clk |ext_clk |
| ext_clk_sel |ext_clk_sel |
| clk |clk |
| resetn |resetn |
| gpio_out_pad[15] |gpio_out_pad[15] |
| gpio_out_pad[14] |gpio_out_pad[14] |
| gpio_out_pad[13] |gpio_out_pad[13] |
| gpio_out_pad[12] |gpio_out_pad[12] |
| gpio_out_pad[11] |gpio_out_pad[11] |
| gpio_out_pad[10] |gpio_out_pad[10] |
| gpio_out_pad[9] |gpio_out_pad[9] |
| gpio_out_pad[8] |gpio_out_pad[8] |
| gpio_out_pad[7] |gpio_out_pad[7] |
| gpio_out_pad[6] |gpio_out_pad[6] |
| gpio_out_pad[5] |gpio_out_pad[5] |
| gpio_out_pad[4] |gpio_out_pad[4] |
| gpio_out_pad[3] |gpio_out_pad[3] |
| gpio_out_pad[2] |gpio_out_pad[2] |
| gpio_out_pad[1] |gpio_out_pad[1] |
| gpio_out_pad[0] |gpio_out_pad[0] |
| gpio_in_pad[15] |gpio_in_pad[15] |
| gpio_in_pad[14] |gpio_in_pad[14] |
| gpio_in_pad[13] |gpio_in_pad[13] |
| gpio_in_pad[12] |gpio_in_pad[12] |
| gpio_in_pad[11] |gpio_in_pad[11] |
| gpio_in_pad[10] |gpio_in_pad[10] |
| gpio_in_pad[9] |gpio_in_pad[9] |
| gpio_in_pad[8] |gpio_in_pad[8] |
| gpio_in_pad[7] |gpio_in_pad[7] |
| gpio_in_pad[6] |gpio_in_pad[6] |
| gpio_in_pad[5] |gpio_in_pad[5] |
| gpio_in_pad[4] |gpio_in_pad[4] |
| gpio_in_pad[3] |gpio_in_pad[3] |
| gpio_in_pad[2] |gpio_in_pad[2] |
| gpio_in_pad[1] |gpio_in_pad[1] |
| gpio_in_pad[0] |gpio_in_pad[0] |
| gpio_mode0_pad[15] |gpio_mode0_pad[15] |
| gpio_mode0_pad[14] |gpio_mode0_pad[14] |
| gpio_mode0_pad[13] |gpio_mode0_pad[13] |
| gpio_mode0_pad[12] |gpio_mode0_pad[12] |
| gpio_mode0_pad[11] |gpio_mode0_pad[11] |
| gpio_mode0_pad[10] |gpio_mode0_pad[10] |
| gpio_mode0_pad[9] |gpio_mode0_pad[9] |
| gpio_mode0_pad[8] |gpio_mode0_pad[8] |
| gpio_mode0_pad[7] |gpio_mode0_pad[7] |
| gpio_mode0_pad[6] |gpio_mode0_pad[6] |
| gpio_mode0_pad[5] |gpio_mode0_pad[5] |
| gpio_mode0_pad[4] |gpio_mode0_pad[4] |
| gpio_mode0_pad[3] |gpio_mode0_pad[3] |
| gpio_mode0_pad[2] |gpio_mode0_pad[2] |
| gpio_mode0_pad[1] |gpio_mode0_pad[1] |
| gpio_mode0_pad[0] |gpio_mode0_pad[0] |
| gpio_mode1_pad[15] |gpio_mode1_pad[15] |
| gpio_mode1_pad[14] |gpio_mode1_pad[14] |
| gpio_mode1_pad[13] |gpio_mode1_pad[13] |
| gpio_mode1_pad[12] |gpio_mode1_pad[12] |
| gpio_mode1_pad[11] |gpio_mode1_pad[11] |
| gpio_mode1_pad[10] |gpio_mode1_pad[10] |
| gpio_mode1_pad[9] |gpio_mode1_pad[9] |
| gpio_mode1_pad[8] |gpio_mode1_pad[8] |
| gpio_mode1_pad[7] |gpio_mode1_pad[7] |
| gpio_mode1_pad[6] |gpio_mode1_pad[6] |
| gpio_mode1_pad[5] |gpio_mode1_pad[5] |
| gpio_mode1_pad[4] |gpio_mode1_pad[4] |
| gpio_mode1_pad[3] |gpio_mode1_pad[3] |
| gpio_mode1_pad[2] |gpio_mode1_pad[2] |
| gpio_mode1_pad[1] |gpio_mode1_pad[1] |
| gpio_mode1_pad[0] |gpio_mode1_pad[0] |
| gpio_outenb_pad[15] |gpio_outenb_pad[15] |
| gpio_outenb_pad[14] |gpio_outenb_pad[14] |
| gpio_outenb_pad[13] |gpio_outenb_pad[13] |
| gpio_outenb_pad[12] |gpio_outenb_pad[12] |
| gpio_outenb_pad[11] |gpio_outenb_pad[11] |
| gpio_outenb_pad[10] |gpio_outenb_pad[10] |
| gpio_outenb_pad[9] |gpio_outenb_pad[9] |
| gpio_outenb_pad[8] |gpio_outenb_pad[8] |
| gpio_outenb_pad[7] |gpio_outenb_pad[7] |
| gpio_outenb_pad[6] |gpio_outenb_pad[6] |
| gpio_outenb_pad[5] |gpio_outenb_pad[5] |
| gpio_outenb_pad[4] |gpio_outenb_pad[4] |
| gpio_outenb_pad[3] |gpio_outenb_pad[3] |
| gpio_outenb_pad[2] |gpio_outenb_pad[2] |
| gpio_outenb_pad[1] |gpio_outenb_pad[1] |
| gpio_outenb_pad[0] |gpio_outenb_pad[0] |
| gpio_inenb_pad[15] |gpio_inenb_pad[15] |
| gpio_inenb_pad[14] |gpio_inenb_pad[14] |
| gpio_inenb_pad[13] |gpio_inenb_pad[13] |
| gpio_inenb_pad[12] |gpio_inenb_pad[12] |
| gpio_inenb_pad[11] |gpio_inenb_pad[11] |
| gpio_inenb_pad[10] |gpio_inenb_pad[10] |
| gpio_inenb_pad[9] |gpio_inenb_pad[9] |
| gpio_inenb_pad[8] |gpio_inenb_pad[8] |
| gpio_inenb_pad[7] |gpio_inenb_pad[7] |
| gpio_inenb_pad[6] |gpio_inenb_pad[6] |
| gpio_inenb_pad[5] |gpio_inenb_pad[5] |
| gpio_inenb_pad[4] |gpio_inenb_pad[4] |
| gpio_inenb_pad[3] |gpio_inenb_pad[3] |
| gpio_inenb_pad[2] |gpio_inenb_pad[2] |
| gpio_inenb_pad[1] |gpio_inenb_pad[1] |
| gpio_inenb_pad[0] |gpio_inenb_pad[0] |
| adc0_ena |adc0_ena |
| adc0_convert |adc0_convert |
| adc0_data[9] |adc0_data[9] |
| adc0_data[8] |adc0_data[8] |
| adc0_data[7] |adc0_data[7] |
| adc0_data[6] |adc0_data[6] |
| adc0_data[5] |adc0_data[5] |
| adc0_data[4] |adc0_data[4] |
| adc0_data[3] |adc0_data[3] |
| adc0_data[2] |adc0_data[2] |
| adc0_data[1] |adc0_data[1] |
| adc0_data[0] |adc0_data[0] |
| adc0_done |adc0_done |
| adc0_clk |adc0_clk |
| adc0_inputsrc[1] |adc0_inputsrc[1] |
| adc0_inputsrc[0] |adc0_inputsrc[0] |
| adc1_ena |adc1_ena |
| adc1_convert |adc1_convert |
| adc1_clk |adc1_clk |
| adc1_inputsrc[1] |adc1_inputsrc[1] |
| adc1_inputsrc[0] |adc1_inputsrc[0] |
| adc1_data[9] |adc1_data[9] |
| adc1_data[8] |adc1_data[8] |
| adc1_data[7] |adc1_data[7] |
| adc1_data[6] |adc1_data[6] |
| adc1_data[5] |adc1_data[5] |
| adc1_data[4] |adc1_data[4] |
| adc1_data[3] |adc1_data[3] |
| adc1_data[2] |adc1_data[2] |
| adc1_data[1] |adc1_data[1] |
| adc1_data[0] |adc1_data[0] |
| adc1_done |adc1_done |
| dac_ena |dac_ena |
| dac_value[9] |dac_value[9] |
| dac_value[8] |dac_value[8] |
| dac_value[7] |dac_value[7] |
| dac_value[6] |dac_value[6] |
| dac_value[5] |dac_value[5] |
| dac_value[4] |dac_value[4] |
| dac_value[3] |dac_value[3] |
| dac_value[2] |dac_value[2] |
| dac_value[1] |dac_value[1] |
| dac_value[0] |dac_value[0] |
| analog_out_sel |analog_out_sel |
| opamp_ena |opamp_ena |
| opamp_bias_ena |opamp_bias_ena |
| bg_ena |bg_ena |
| comp_ena |comp_ena |
| comp_ninputsrc[1] |comp_ninputsrc[1] |
| comp_ninputsrc[0] |comp_ninputsrc[0] |
| comp_pinputsrc[1] |comp_pinputsrc[1] |
| comp_pinputsrc[0] |comp_pinputsrc[0] |
| rcosc_ena |rcosc_ena |
| overtemp_ena |overtemp_ena |
| overtemp |overtemp |
| rcosc_in |rcosc_in |
| xtal_in |xtal_in |
| comp_in |comp_in |
| spi_sck |spi_sck |
| spi_ro_config[7] |spi_ro_config[7] |
| spi_ro_config[6] |spi_ro_config[6] |
| spi_ro_config[5] |spi_ro_config[5] |
| spi_ro_config[4] |spi_ro_config[4] |
| spi_ro_config[3] |spi_ro_config[3] |
| spi_ro_config[2] |spi_ro_config[2] |
| spi_ro_config[1] |spi_ro_config[1] |
| spi_ro_config[0] |spi_ro_config[0] |
| spi_ro_xtal_ena |spi_ro_xtal_ena |
| spi_ro_reg_ena |spi_ro_reg_ena |
| spi_ro_pll_dco_ena |spi_ro_pll_dco_ena |
| spi_ro_pll_div[4] |spi_ro_pll_div[4] |
| spi_ro_pll_div[3] |spi_ro_pll_div[3] |
| spi_ro_pll_div[2] |spi_ro_pll_div[2] |
| spi_ro_pll_div[1] |spi_ro_pll_div[1] |
| spi_ro_pll_div[0] |spi_ro_pll_div[0] |
| spi_ro_pll_sel[2] |spi_ro_pll_sel[2] |
| spi_ro_pll_sel[1] |spi_ro_pll_sel[1] |
| spi_ro_pll_sel[0] |spi_ro_pll_sel[0] |
| spi_ro_pll_trim[25] |spi_ro_pll_trim[25] |
| spi_ro_pll_trim[24] |spi_ro_pll_trim[24] |
| spi_ro_pll_trim[23] |spi_ro_pll_trim[23] |
| spi_ro_pll_trim[22] |spi_ro_pll_trim[22] |
| spi_ro_pll_trim[21] |spi_ro_pll_trim[21] |
| spi_ro_pll_trim[20] |spi_ro_pll_trim[20] |
| spi_ro_pll_trim[19] |spi_ro_pll_trim[19] |
| spi_ro_pll_trim[18] |spi_ro_pll_trim[18] |
| spi_ro_pll_trim[17] |spi_ro_pll_trim[17] |
| spi_ro_pll_trim[16] |spi_ro_pll_trim[16] |
| spi_ro_pll_trim[15] |spi_ro_pll_trim[15] |
| spi_ro_pll_trim[14] |spi_ro_pll_trim[14] |
| spi_ro_pll_trim[13] |spi_ro_pll_trim[13] |
| spi_ro_pll_trim[12] |spi_ro_pll_trim[12] |
| spi_ro_pll_trim[11] |spi_ro_pll_trim[11] |
| spi_ro_pll_trim[10] |spi_ro_pll_trim[10] |
| spi_ro_pll_trim[9] |spi_ro_pll_trim[9] |
| spi_ro_pll_trim[8] |spi_ro_pll_trim[8] |
| spi_ro_pll_trim[7] |spi_ro_pll_trim[7] |
| spi_ro_pll_trim[6] |spi_ro_pll_trim[6] |
| spi_ro_pll_trim[5] |spi_ro_pll_trim[5] |
| spi_ro_pll_trim[4] |spi_ro_pll_trim[4] |
| spi_ro_pll_trim[3] |spi_ro_pll_trim[3] |
| spi_ro_pll_trim[2] |spi_ro_pll_trim[2] |
| spi_ro_pll_trim[1] |spi_ro_pll_trim[1] |
| spi_ro_pll_trim[0] |spi_ro_pll_trim[0] |
| spi_ro_mfgr_id[11] |spi_ro_mfgr_id[11] |
| spi_ro_mfgr_id[10] |spi_ro_mfgr_id[10] |
| spi_ro_mfgr_id[9] |spi_ro_mfgr_id[9] |
| spi_ro_mfgr_id[8] |spi_ro_mfgr_id[8] |
| spi_ro_mfgr_id[7] |spi_ro_mfgr_id[7] |
| spi_ro_mfgr_id[6] |spi_ro_mfgr_id[6] |
| spi_ro_mfgr_id[5] |spi_ro_mfgr_id[5] |
| spi_ro_mfgr_id[4] |spi_ro_mfgr_id[4] |
| spi_ro_mfgr_id[3] |spi_ro_mfgr_id[3] |
| spi_ro_mfgr_id[2] |spi_ro_mfgr_id[2] |
| spi_ro_mfgr_id[1] |spi_ro_mfgr_id[1] |
| spi_ro_mfgr_id[0] |spi_ro_mfgr_id[0] |
| spi_ro_prod_id[7] |spi_ro_prod_id[7] |
| spi_ro_prod_id[6] |spi_ro_prod_id[6] |
| spi_ro_prod_id[5] |spi_ro_prod_id[5] |
| spi_ro_prod_id[4] |spi_ro_prod_id[4] |
| spi_ro_prod_id[3] |spi_ro_prod_id[3] |
| spi_ro_prod_id[2] |spi_ro_prod_id[2] |
| spi_ro_prod_id[1] |spi_ro_prod_id[1] |
| spi_ro_prod_id[0] |spi_ro_prod_id[0] |
| spi_ro_mask_rev[3] |spi_ro_mask_rev[3] |
| spi_ro_mask_rev[2] |spi_ro_mask_rev[2] |
| spi_ro_mask_rev[1] |spi_ro_mask_rev[1] |
| spi_ro_mask_rev[0] |spi_ro_mask_rev[0] |
| ser_tx |ser_tx |
| ser_rx |ser_rx |
| irq_pin |irq_pin |
| irq_spi |irq_spi |
| trap |trap |
| flash_csb |flash_csb |
| flash_clk |flash_clk |
| flash_csb_oeb |flash_csb_oeb |
| flash_clk_oeb |flash_clk_oeb |
| flash_io0_oeb |flash_io0_oeb |
| flash_io1_oeb |flash_io1_oeb |
| flash_io2_oeb |flash_io2_oeb |
| flash_io3_oeb |flash_io3_oeb |
| flash_csb_ieb |flash_csb_ieb |
| flash_clk_ieb |flash_clk_ieb |
| flash_io0_ieb |flash_io0_ieb |
| flash_io1_ieb |flash_io1_ieb |
| flash_io2_ieb |flash_io2_ieb |
| flash_io3_ieb |flash_io3_ieb |
| flash_io0_do |flash_io0_do |
| flash_io1_do |flash_io1_do |
| flash_io2_do |flash_io2_do |
| flash_io3_do |flash_io3_do |
| flash_io0_di |flash_io0_di |
| flash_io1_di |flash_io1_di |
| flash_io2_di |flash_io2_di |
| flash_io3_di |flash_io3_di |
| vdd1v8 |vdd1v8 |
| vss |vss |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes striVe_soc and striVe_soc are equivalent. |
| |
| Cell striVe_spi disconnected node: RSTB |
| Cell striVe_spi disconnected node: SCK |
| Cell striVe_spi disconnected node: SDI |
| Cell striVe_spi disconnected node: CSB |
| Cell striVe_spi disconnected node: SDO |
| Cell striVe_spi disconnected node: sdo_enb |
| Cell striVe_spi disconnected node: xtal_ena |
| Cell striVe_spi disconnected node: reg_ena |
| Cell striVe_spi disconnected node: pll_dco_ena |
| Cell striVe_spi disconnected node: pll_div[4] |
| Cell striVe_spi disconnected node: pll_div[3] |
| Cell striVe_spi disconnected node: pll_div[2] |
| Cell striVe_spi disconnected node: pll_div[1] |
| Cell striVe_spi disconnected node: pll_div[0] |
| Cell striVe_spi disconnected node: pll_sel[2] |
| Cell striVe_spi disconnected node: pll_sel[1] |
| Cell striVe_spi disconnected node: pll_sel[0] |
| Cell striVe_spi disconnected node: pll_trim[25] |
| Cell striVe_spi disconnected node: pll_trim[24] |
| Cell striVe_spi disconnected node: pll_trim[23] |
| Cell striVe_spi disconnected node: pll_trim[22] |
| Cell striVe_spi disconnected node: pll_trim[21] |
| Cell striVe_spi disconnected node: pll_trim[20] |
| Cell striVe_spi disconnected node: pll_trim[19] |
| Cell striVe_spi disconnected node: pll_trim[18] |
| Cell striVe_spi disconnected node: pll_trim[17] |
| Cell striVe_spi disconnected node: pll_trim[16] |
| Cell striVe_spi disconnected node: pll_trim[15] |
| Cell striVe_spi disconnected node: pll_trim[14] |
| Cell striVe_spi disconnected node: pll_trim[13] |
| Cell striVe_spi disconnected node: pll_trim[12] |
| Cell striVe_spi disconnected node: pll_trim[11] |
| Cell striVe_spi disconnected node: pll_trim[10] |
| Cell striVe_spi disconnected node: pll_trim[9] |
| Cell striVe_spi disconnected node: pll_trim[8] |
| Cell striVe_spi disconnected node: pll_trim[7] |
| Cell striVe_spi disconnected node: pll_trim[6] |
| Cell striVe_spi disconnected node: pll_trim[5] |
| Cell striVe_spi disconnected node: pll_trim[4] |
| Cell striVe_spi disconnected node: pll_trim[3] |
| Cell striVe_spi disconnected node: pll_trim[2] |
| Cell striVe_spi disconnected node: pll_trim[1] |
| Cell striVe_spi disconnected node: pll_trim[0] |
| Cell striVe_spi disconnected node: pll_bypass |
| Cell striVe_spi disconnected node: irq |
| Cell striVe_spi disconnected node: reset |
| Cell striVe_spi disconnected node: RST |
| Cell striVe_spi disconnected node: trap |
| Cell striVe_spi disconnected node: mfgr_id[11] |
| Cell striVe_spi disconnected node: mfgr_id[10] |
| Cell striVe_spi disconnected node: mfgr_id[9] |
| Cell striVe_spi disconnected node: mfgr_id[8] |
| Cell striVe_spi disconnected node: mfgr_id[7] |
| Cell striVe_spi disconnected node: mfgr_id[6] |
| Cell striVe_spi disconnected node: mfgr_id[5] |
| Cell striVe_spi disconnected node: mfgr_id[4] |
| Cell striVe_spi disconnected node: mfgr_id[3] |
| Cell striVe_spi disconnected node: mfgr_id[2] |
| Cell striVe_spi disconnected node: mfgr_id[1] |
| Cell striVe_spi disconnected node: mfgr_id[0] |
| Cell striVe_spi disconnected node: prod_id[7] |
| Cell striVe_spi disconnected node: prod_id[6] |
| Cell striVe_spi disconnected node: prod_id[5] |
| Cell striVe_spi disconnected node: prod_id[4] |
| Cell striVe_spi disconnected node: prod_id[3] |
| Cell striVe_spi disconnected node: prod_id[2] |
| Cell striVe_spi disconnected node: prod_id[1] |
| Cell striVe_spi disconnected node: prod_id[0] |
| Cell striVe_spi disconnected node: mask_rev_in[3] |
| Cell striVe_spi disconnected node: mask_rev_in[2] |
| Cell striVe_spi disconnected node: mask_rev_in[1] |
| Cell striVe_spi disconnected node: mask_rev_in[0] |
| Cell striVe_spi disconnected node: mask_rev[3] |
| Cell striVe_spi disconnected node: mask_rev[2] |
| Cell striVe_spi disconnected node: mask_rev[1] |
| Cell striVe_spi disconnected node: mask_rev[0] |
| Cell striVe_spi disconnected node: vdd |
| Cell striVe_spi disconnected node: vss |
| Warning: Equate pins: cell striVe_spi has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: striVe_spi |Circuit 2: striVe_spi |
| -------------------------------------------|------------------------------------------- |
| RSTB |RSTB |
| SCK |SCK |
| SDI |SDI |
| CSB |CSB |
| SDO |SDO |
| sdo_enb |sdo_enb |
| xtal_ena |xtal_ena |
| reg_ena |reg_ena |
| pll_dco_ena |pll_dco_ena |
| pll_div[4] |pll_div[4] |
| pll_div[3] |pll_div[3] |
| pll_div[2] |pll_div[2] |
| pll_div[1] |pll_div[1] |
| pll_div[0] |pll_div[0] |
| pll_sel[2] |pll_sel[2] |
| pll_sel[1] |pll_sel[1] |
| pll_sel[0] |pll_sel[0] |
| pll_trim[25] |pll_trim[25] |
| pll_trim[24] |pll_trim[24] |
| pll_trim[23] |pll_trim[23] |
| pll_trim[22] |pll_trim[22] |
| pll_trim[21] |pll_trim[21] |
| pll_trim[20] |pll_trim[20] |
| pll_trim[19] |pll_trim[19] |
| pll_trim[18] |pll_trim[18] |
| pll_trim[17] |pll_trim[17] |
| pll_trim[16] |pll_trim[16] |
| pll_trim[15] |pll_trim[15] |
| pll_trim[14] |pll_trim[14] |
| pll_trim[13] |pll_trim[13] |
| pll_trim[12] |pll_trim[12] |
| pll_trim[11] |pll_trim[11] |
| pll_trim[10] |pll_trim[10] |
| pll_trim[9] |pll_trim[9] |
| pll_trim[8] |pll_trim[8] |
| pll_trim[7] |pll_trim[7] |
| pll_trim[6] |pll_trim[6] |
| pll_trim[5] |pll_trim[5] |
| pll_trim[4] |pll_trim[4] |
| pll_trim[3] |pll_trim[3] |
| pll_trim[2] |pll_trim[2] |
| pll_trim[1] |pll_trim[1] |
| pll_trim[0] |pll_trim[0] |
| pll_bypass |pll_bypass |
| irq |irq |
| reset |reset |
| RST |RST |
| trap |trap |
| mfgr_id[11] |mfgr_id[11] |
| mfgr_id[10] |mfgr_id[10] |
| mfgr_id[9] |mfgr_id[9] |
| mfgr_id[8] |mfgr_id[8] |
| mfgr_id[7] |mfgr_id[7] |
| mfgr_id[6] |mfgr_id[6] |
| mfgr_id[5] |mfgr_id[5] |
| mfgr_id[4] |mfgr_id[4] |
| mfgr_id[3] |mfgr_id[3] |
| mfgr_id[2] |mfgr_id[2] |
| mfgr_id[1] |mfgr_id[1] |
| mfgr_id[0] |mfgr_id[0] |
| prod_id[7] |prod_id[7] |
| prod_id[6] |prod_id[6] |
| prod_id[5] |prod_id[5] |
| prod_id[4] |prod_id[4] |
| prod_id[3] |prod_id[3] |
| prod_id[2] |prod_id[2] |
| prod_id[1] |prod_id[1] |
| prod_id[0] |prod_id[0] |
| mask_rev_in[3] |mask_rev_in[3] |
| mask_rev_in[2] |mask_rev_in[2] |
| mask_rev_in[1] |mask_rev_in[1] |
| mask_rev_in[0] |mask_rev_in[0] |
| mask_rev[3] |mask_rev[3] |
| mask_rev[2] |mask_rev[2] |
| mask_rev[1] |mask_rev[1] |
| mask_rev[0] |mask_rev[0] |
| vdd |vdd |
| vss |vss |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes striVe_spi and striVe_spi are equivalent. |
| |
| Cell s8iom0s8_top_xres4v2 disconnected node: amuxbus_a |
| Cell s8iom0s8_top_xres4v2 disconnected node: amuxbus_b |
| Cell s8iom0s8_top_xres4v2 disconnected node: disable_pullup_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: en_vddio_sig_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: enable_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: enable_vddio |
| Cell s8iom0s8_top_xres4v2 disconnected node: filt_in_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: inp_sel_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: pad |
| Cell s8iom0s8_top_xres4v2 disconnected node: pad_a_esd_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: pullup_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_hi_esd |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_lo_esd |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_weak_hi_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: vccd |
| Cell s8iom0s8_top_xres4v2 disconnected node: vcchib |
| Cell s8iom0s8_top_xres4v2 disconnected node: vdda |
| Cell s8iom0s8_top_xres4v2 disconnected node: vddio |
| Cell s8iom0s8_top_xres4v2 disconnected node: vddio_q |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssa |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssd |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssio |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssio_q |
| Cell s8iom0s8_top_xres4v2 disconnected node: vswitch |
| Cell s8iom0s8_top_xres4v2 disconnected node: xres_h_n |
| Warning: Equate pins: cell s8iom0s8_top_xres4v2 has no definition, treated as a black box. |
| |
| Subcircuit pins: |
| Circuit 1: s8iom0s8_top_xres4v2 |Circuit 2: s8iom0s8_top_xres4v2 |
| -------------------------------------------|------------------------------------------- |
| amuxbus_a |amuxbus_a |
| amuxbus_b |amuxbus_b |
| disable_pullup_h |disable_pullup_h |
| en_vddio_sig_h |en_vddio_sig_h |
| enable_h |enable_h |
| enable_vddio |enable_vddio |
| filt_in_h |filt_in_h |
| inp_sel_h |inp_sel_h |
| pad |pad |
| pad_a_esd_h |pad_a_esd_h |
| pullup_h |pullup_h |
| tie_hi_esd |tie_hi_esd |
| tie_lo_esd |tie_lo_esd |
| tie_weak_hi_h |tie_weak_hi_h |
| vccd |vccd |
| vcchib |vcchib |
| vdda |vdda |
| vddio |vddio |
| vddio_q |vddio_q |
| vssa |vssa |
| vssd |vssd |
| vssio |vssio |
| vssio_q |vssio_q |
| vswitch |vswitch |
| xres_h_n |xres_h_n |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes s8iom0s8_top_xres4v2 and s8iom0s8_top_xres4v2 are equivalent. |
| |
| Subcircuit summary: |
| Circuit 1: striVe |Circuit 2: striVe |
| -------------------------------------------|------------------------------------------- |
| s8iom0_vddio_hvc_pad (2) |s8iom0_vddio_hvc_pad (2) |
| s8iom0_gpiov2_pad (36) |s8iom0_gpiov2_pad (36) |
| scs8hd_conb_1 (4) |scs8hd_conb_1 (4) |
| s8iom0_vssd_lvc_pad (1) |s8iom0_vssd_lvc_pad (1) |
| digital_pll (1) |digital_pll (1) |
| lvlshiftdown (1) |lvlshiftdown (1) |
| s8iom0s8_top_gpio_ovtv2 (2) |s8iom0s8_top_gpio_ovtv2 (2) |
| s8iom0_vccd_lvc_pad (2) |s8iom0_vccd_lvc_pad (2) |
| s8iom0_vccd_hvc_pad (2) |s8iom0_vccd_hvc_pad (2) |
| s8iom0_vdda_lvc_pad (4) |s8iom0_vdda_lvc_pad (4) |
| s8iom0_vssa_hvc_pad (4) |s8iom0_vssa_hvc_pad (4) |
| s8iom0_vdda_hvc_pad (2) |s8iom0_vdda_hvc_pad (2) |
| s8iom0_vssio_lvc_pad (1) |s8iom0_vssio_lvc_pad (1) |
| striVe_clkrst (1) |striVe_clkrst (1) |
| s8iom0_vssa_lvc_pad (1) |s8iom0_vssa_lvc_pad (1) |
| s8iom0_corner_pad (4) |s8iom0_corner_pad (4) |
| striVe_soc (1) |striVe_soc (1) |
| striVe_spi (1) |striVe_spi (1) |
| s8iom0s8_top_xres4v2 (1) |s8iom0s8_top_xres4v2 (1) |
| Number of devices: 71 |Number of devices: 71 |
| Number of nets: 629 |Number of nets: 629 |
| --------------------------------------------------------------------------------------- |
| Netlists match with 25 symmetries. |
| Circuits match correctly. |
| |
| Subcircuit pins: |
| Circuit 1: striVe |Circuit 2: striVe |
| -------------------------------------------|------------------------------------------- |
| gpio[10] |gpio[10] |
| gpio[11] |gpio[11] |
| gpio[0] |gpio[0] |
| gpio[12] |gpio[12] |
| gpio[1] |gpio[1] |
| gpio[13] |gpio[13] |
| gpio[2] |gpio[2] |
| gpio[14] |gpio[14] |
| gpio[3] |gpio[3] |
| gpio[15] |gpio[15] |
| gpio[4] |gpio[4] |
| gpio[5] |gpio[5] |
| gpio[6] |gpio[6] |
| gpio[7] |gpio[7] |
| gpio[8] |gpio[8] |
| gpio[9] |gpio[9] |
| xi |xi |
| xo |xo |
| adc_high |adc_high |
| adc0_in |adc0_in |
| adc1_in |adc1_in |
| adc_low |adc_low |
| comp_inn |comp_inn |
| comp_inp |comp_inp |
| RSTB |RSTB |
| SDO |SDO |
| SDI |SDI |
| irq |irq |
| CSB |CSB |
| SCK |SCK |
| xclk |xclk |
| flash_clk |flash_clk |
| flash_csb |flash_csb |
| flash_io0 |flash_io0 |
| flash_io1 |flash_io1 |
| flash_io2 |flash_io2 |
| flash_io3 |flash_io3 |
| ser_rx |ser_rx |
| ser_tx |ser_tx |
| vdd |vdd |
| vdd1v8 |vdd1v8 |
| vss |vss |
| --------------------------------------------------------------------------------------- |
| Cell pin lists are equivalent. |
| Device classes striVe and striVe are equivalent. |
| Circuits match uniquely. |
