| // |
| // Rule file generated on Fri Apr 10 21:26:03 EDT 2020 |
| // by Calibre Interactive - DRC (v2018.4_34.26) |
| // |
| // *** PLEASE DO NOT MODIFY THIS FILE *** |
| // |
| // |
| |
| LAYOUT PATH "/usr/local/google/home/tansell/work/openflow-drc-tests/torture_tests/striVe/striVe.gds" |
| LAYOUT PRIMARY "striVe" |
| LAYOUT SYSTEM GDSII |
| |
| DRC RESULTS DATABASE "striVe.drc.results" ASCII |
| DRC MAXIMUM RESULTS 1000 |
| DRC MAXIMUM VERTEX 4096 |
| |
| DRC CELL NAME YES CELL SPACE XFORM |
| DRC SUMMARY REPORT "striVe.drc.summary" REPLACE HIER |
| |
| VIRTUAL CONNECT COLON NO |
| VIRTUAL CONNECT REPORT NO |
| |
| DRC SELECT CHECK |
| "k_0_met1slotCutPad" |
| "k_1_met1slot" |
| "k_2_met1OverCA" |
| "k_3_met2slotCutPad" |
| "k_4_met2slot" |
| "k_5_met2OverCA" |
| "k_6_met3slotCutPad" |
| "k_7_met3slot" |
| "k_8_met3OverCA" |
| "k_9_met4slotCutPad" |
| "k_10_met4slot" |
| "k_11_met4OverCA" |
| "k_12_met5slotCutPad" |
| "k_13_met5slot" |
| "k_14_met5OverCA" |
| "r_0_stress.5" |
| "r_1_stress.5" |
| "r_2_stress.6" |
| "r_3_stress.7" |
| "r_4_stress.7" |
| "r_5_stress.7" |
| "r_6_stress.7" |
| "r_7_stress.7" |
| "r_8_stress.7" |
| "r_9_stress.7" |
| "r_10_stress.7" |
| "r_11_stress.7" |
| "r_12_stress.7" |
| "r_13_stress.9" |
| "r_14_stress.9" |
| "r_15_stress.9" |
| "r_16_stress.9" |
| "r_17_stress.9" |
| "r_18_stress.10" |
| "r_19_stress.11" |
| "r_20_stress.10" |
| "r_21_stress.11" |
| "r_22_stress.10" |
| "r_23_stress.11" |
| "r_24_stress.10" |
| "r_25_stress.11" |
| "r_26_stress.10" |
| "r_27_stress.11" |
| "r_28_stress.12" |
| "r_29_stress.13" |
| "r_30_stress.14" |
| "r_31_stress.12" |
| "r_32_stress.13" |
| "r_33_stress.14" |
| "r_34_stress.12" |
| "r_35_stress.13" |
| "r_36_stress.14" |
| "r_37_stress.12" |
| "r_38_stress.13" |
| "r_39_stress.14" |
| "r_40_stress.12" |
| "r_41_stress.13" |
| "r_42_stress.14" |
| "r_43_stress.15" |
| "r_44_stress.15" |
| "r_45_stress.18" |
| "r_46_stress.18" |
| "r_47_slot.13" |
| "r_48_slot.14_w" |
| "r_49_slot.14_l" |
| "r_50_slot.13" |
| "r_51_slot.14_w" |
| "r_52_slot.14_l" |
| "r_53_slot.13" |
| "r_54_slot.14_w" |
| "r_55_slot.14_l" |
| "r_56_slot.13" |
| "r_57_slot.14_w" |
| "r_58_slot.14_l" |
| "r_59_slot.13" |
| "r_60_slot.14_w" |
| "r_61_slot.14_l" |
| "r_62_slot.11" |
| "r_63_slot.12" |
| "r_64_slot.6/slot.8" |
| "r_65_slot.4" |
| "r_66_slot.11" |
| "r_67_slot.12" |
| "r_68_slot.6/slot.8" |
| "r_69_slot.4" |
| "r_70_slot.11" |
| "r_71_slot.12" |
| "r_72_slot.6/slot.8" |
| "r_73_slot.4" |
| "r_74_slot.11" |
| "r_75_slot.12" |
| "r_76_slot.6/slot.8" |
| "r_77_slot.4" |
| "r_78_slot.15" |
| "r_79_slot.15" |
| "r_80_slot.15" |
| "r_81_slot.15" |
| "r_82_slot.15" |
| "r_83_slot.9/16" |
| "r_84_slot.17" |
| "r_85_slot.9/16" |
| "r_86_slot.17" |
| "r_87_slot.9/16" |
| "r_88_slot.17" |
| "r_89_slot.9/16" |
| "r_90_slot.17" |
| "r_91_slot.9/16" |
| "r_92_slot.17" |
| "r_93_slot.18" |
| "r_94_slot.18" |
| "r_95_slot.18" |
| "r_96_slot.18" |
| "r_97_slot.18" |
| "r_98_anchor.1" |
| "r_99_anchor.4" |
| "r_100_anchor.4" |
| "r_101_anchor.4" |
| "r_102_anchor.4" |
| "r_103_anchor.4" |
| "r_104_anchor.4" |
| "r_105_anchor.5" |
| "r_106_anchor.6" |
| "r_107_anchor.6" |
| "r_108_anchor.6" |
| "r_109_anchor.6" |
| "r_110_anchor.6" |
| "r_111_anchor.6" |
| "r_112_anchor.6" |
| "r_113_anchor.6" |
| "r_114_anchor.6" |
| "r_115_anchor.6" |
| "r_116_anchor.6" |
| "r_117_anchor.6" |
| "r_118_anchor.6" |
| "r_119_anchor.6" |
| "r_120_anchor.6" |
| "r_121_anchor.3" |
| "r_122_anchor.3" |
| "r_123_anchor.3" |
| "r_124_anchor.3" |
| "r_125_anchor.3" |
| |
| DRC ICSTATION YES |
| |
| |
| INCLUDE "/data/pdks/skywater/s8/V1.3.0/DRC/Calibre/s8_stressRules" |
| |
