blob: 7b0442b3cc748acea5622ebd37060b907abdc587 [file] [log] [blame]
VERSION 5.3 ;
NAMESCASESENSITIVE ON ;
NOWIREEXTENSIONATPIN ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;
UNITS
DATABASE MICRONS 1000 ;
END UNITS
MACRO striVe_spi
CLASS BLOCK ;
FOREIGN striVe_spi ;
ORIGIN -0.0000 -0.0000 ;
SIZE 171.4800 BY 171.4800 ;
PIN RSTB
DIRECTION INPUT ;
PORT
LAYER met3 ;
RECT 0.0000 154.0600 2.2000 155.2600 ;
END
END RSTB
PIN SCK
DIRECTION INPUT ;
PORT
LAYER met3 ;
RECT 0.0000 132.3000 2.2000 133.5000 ;
END
END SCK
PIN SDI
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 149.1500 0.0000 149.7100 2.1200 ;
END
END SDI
PIN CSB
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 109.5900 169.3600 110.1500 171.4800 ;
END
END CSB
PIN SDO
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 134.4300 0.0000 134.9900 2.1200 ;
END
END SDO
PIN sdo_enb
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 47.9800 171.4800 49.1800 ;
END
END sdo_enb
PIN xtal_ena
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 80.1500 169.3600 80.7100 171.4800 ;
END
END xtal_ena
PIN reg_ena
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 116.9500 169.3600 117.5100 171.4800 ;
END
END reg_ena
PIN pll_dco_ena
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 31.3900 0.0000 31.9500 2.1200 ;
END
END pll_dco_ena
PIN pll_div[4]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 119.7100 0.0000 120.2700 2.1200 ;
END
END pll_div[4]
PIN pll_div[3]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 112.3500 0.0000 112.9100 2.1200 ;
END
END pll_div[3]
PIN pll_div[2]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 77.9000 2.2000 79.1000 ;
END
END pll_div[2]
PIN pll_div[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 37.1000 171.4800 38.3000 ;
END
END pll_div[1]
PIN pll_div[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 131.6700 169.3600 132.2300 171.4800 ;
END
END pll_div[0]
PIN pll_sel[2]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 6.5500 169.3600 7.1100 171.4800 ;
END
END pll_sel[2]
PIN pll_sel[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 164.9400 2.2000 166.1400 ;
END
END pll_sel[1]
PIN pll_sel[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 97.6300 0.0000 98.1900 2.1200 ;
END
END pll_sel[0]
PIN pll_trim[25]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 141.7900 0.0000 142.3500 2.1200 ;
END
END pll_trim[25]
PIN pll_trim[24]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 4.4600 171.4800 5.6600 ;
END
END pll_trim[24]
PIN pll_trim[23]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 161.1100 169.3600 161.6700 171.4800 ;
END
END pll_trim[23]
PIN pll_trim[22]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 87.5100 169.3600 88.0700 171.4800 ;
END
END pll_trim[22]
PIN pll_trim[21]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 153.7500 169.3600 154.3100 171.4800 ;
END
END pll_trim[21]
PIN pll_trim[20]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 15.3400 171.4800 16.5400 ;
END
END pll_trim[20]
PIN pll_trim[19]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 163.8700 0.0000 164.4300 2.1200 ;
END
END pll_trim[19]
PIN pll_trim[18]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 38.7500 0.0000 39.3100 2.1200 ;
END
END pll_trim[18]
PIN pll_trim[17]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 50.7100 169.3600 51.2700 171.4800 ;
END
END pll_trim[17]
PIN pll_trim[16]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 21.2700 169.3600 21.8300 171.4800 ;
END
END pll_trim[16]
PIN pll_trim[15]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 156.5100 0.0000 157.0700 2.1200 ;
END
END pll_trim[15]
PIN pll_trim[14]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 104.9900 0.0000 105.5500 2.1200 ;
END
END pll_trim[14]
PIN pll_trim[13]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 68.1900 0.0000 68.7500 2.1200 ;
END
END pll_trim[13]
PIN pll_trim[12]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 43.3500 169.3600 43.9100 171.4800 ;
END
END pll_trim[12]
PIN pll_trim[11]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 168.4700 169.3600 169.0300 171.4800 ;
END
END pll_trim[11]
PIN pll_trim[10]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 121.4200 2.2000 122.6200 ;
END
END pll_trim[10]
PIN pll_trim[9]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 13.9100 169.3600 14.4700 171.4800 ;
END
END pll_trim[9]
PIN pll_trim[8]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 46.1100 0.0000 46.6700 2.1200 ;
END
END pll_trim[8]
PIN pll_trim[7]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 72.7900 169.3600 73.3500 171.4800 ;
END
END pll_trim[7]
PIN pll_trim[6]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 139.0300 169.3600 139.5900 171.4800 ;
END
END pll_trim[6]
PIN pll_trim[5]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 1.9500 0.0000 2.5100 2.1200 ;
END
END pll_trim[5]
PIN pll_trim[4]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 99.6600 2.2000 100.8600 ;
END
END pll_trim[4]
PIN pll_trim[3]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 9.3100 0.0000 9.8700 2.1200 ;
END
END pll_trim[3]
PIN pll_trim[2]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 91.5000 171.4800 92.7000 ;
END
END pll_trim[2]
PIN pll_trim[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 45.2600 2.2000 46.4600 ;
END
END pll_trim[1]
PIN pll_trim[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 69.7400 171.4800 70.9400 ;
END
END pll_trim[0]
PIN pll_bypass
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 26.2200 171.4800 27.4200 ;
END
END pll_bypass
PIN irq
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 80.6200 171.4800 81.8200 ;
END
END irq
PIN reset
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 65.4300 169.3600 65.9900 171.4800 ;
END
END reset
PIN RST
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 145.9000 171.4800 147.1000 ;
END
END RST
PIN trap
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 53.4700 0.0000 54.0300 2.1200 ;
END
END trap
PIN mfgr_id[11]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 90.2700 0.0000 90.8300 2.1200 ;
END
END mfgr_id[11]
PIN mfgr_id[10]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 34.3800 2.2000 35.5800 ;
END
END mfgr_id[10]
PIN mfgr_id[9]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 102.3800 171.4800 103.5800 ;
END
END mfgr_id[9]
PIN mfgr_id[8]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 124.1400 171.4800 125.3400 ;
END
END mfgr_id[8]
PIN mfgr_id[7]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 12.6200 2.2000 13.8200 ;
END
END mfgr_id[7]
PIN mfgr_id[6]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 146.3900 169.3600 146.9500 171.4800 ;
END
END mfgr_id[6]
PIN mfgr_id[5]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 60.8300 0.0000 61.3900 2.1200 ;
END
END mfgr_id[5]
PIN mfgr_id[4]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 67.0200 2.2000 68.2200 ;
END
END mfgr_id[4]
PIN mfgr_id[3]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 94.8700 169.3600 95.4300 171.4800 ;
END
END mfgr_id[3]
PIN mfgr_id[2]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 23.5000 2.2000 24.7000 ;
END
END mfgr_id[2]
PIN mfgr_id[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 35.9900 169.3600 36.5500 171.4800 ;
END
END mfgr_id[1]
PIN mfgr_id[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 124.3100 169.3600 124.8700 171.4800 ;
END
END mfgr_id[0]
PIN prod_id[7]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 16.6700 0.0000 17.2300 2.1200 ;
END
END prod_id[7]
PIN prod_id[6]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 24.0300 0.0000 24.5900 2.1200 ;
END
END prod_id[6]
PIN prod_id[5]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 127.0700 0.0000 127.6300 2.1200 ;
END
END prod_id[5]
PIN prod_id[4]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 88.7800 2.2000 89.9800 ;
END
END prod_id[4]
PIN prod_id[3]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 82.9100 0.0000 83.4700 2.1200 ;
END
END prod_id[3]
PIN prod_id[2]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 102.2300 169.3600 102.7900 171.4800 ;
END
END prod_id[2]
PIN prod_id[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 110.5400 2.2000 111.7400 ;
END
END prod_id[1]
PIN prod_id[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 58.0700 169.3600 58.6300 171.4800 ;
END
END prod_id[0]
PIN mask_rev_in[3]
DIRECTION INPUT ;
PORT
LAYER met2 ;
RECT 75.5500 0.0000 76.1100 2.1200 ;
END
END mask_rev_in[3]
PIN mask_rev_in[2]
DIRECTION INPUT ;
PORT
LAYER met3 ;
RECT 169.2800 135.0200 171.4800 136.2200 ;
END
END mask_rev_in[2]
PIN mask_rev_in[1]
DIRECTION INPUT ;
PORT
LAYER met3 ;
RECT 169.2800 58.8600 171.4800 60.0600 ;
END
END mask_rev_in[1]
PIN mask_rev_in[0]
DIRECTION INPUT ;
PORT
LAYER met3 ;
RECT 169.2800 113.2600 171.4800 114.4600 ;
END
END mask_rev_in[0]
PIN mask_rev[3]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 169.2800 156.7800 171.4800 157.9800 ;
END
END mask_rev[3]
PIN mask_rev[2]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 143.1800 2.2000 144.3800 ;
END
END mask_rev[2]
PIN mask_rev[1]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met3 ;
RECT 0.0000 56.1400 2.2000 57.3400 ;
END
END mask_rev[1]
PIN mask_rev[0]
DIRECTION OUTPUT TRISTATE ;
PORT
LAYER met2 ;
RECT 28.6300 169.3600 29.1900 171.4800 ;
END
END mask_rev[0]
OBS
LAYER li1 ;
RECT 7.5200 7.4350 165.1550 162.6450 ;
LAYER met1 ;
RECT 2.0700 2.0400 169.3700 162.8000 ;
LAYER met2 ;
RECT 2.0900 169.2200 6.4100 169.4900 ;
RECT 7.2500 169.2200 13.7700 169.4900 ;
RECT 14.6100 169.2200 21.1300 169.4900 ;
RECT 21.9700 169.2200 28.4900 169.4900 ;
RECT 29.3300 169.2200 35.8500 169.4900 ;
RECT 36.6900 169.2200 43.2100 169.4900 ;
RECT 44.0500 169.2200 50.5700 169.4900 ;
RECT 51.4100 169.2200 57.9300 169.4900 ;
RECT 58.7700 169.2200 65.2900 169.4900 ;
RECT 66.1300 169.2200 72.6500 169.4900 ;
RECT 73.4900 169.2200 80.0100 169.4900 ;
RECT 80.8500 169.2200 87.3700 169.4900 ;
RECT 88.2100 169.2200 94.7300 169.4900 ;
RECT 95.5700 169.2200 102.0900 169.4900 ;
RECT 102.9300 169.2200 109.4500 169.4900 ;
RECT 110.2900 169.2200 116.8100 169.4900 ;
RECT 117.6500 169.2200 124.1700 169.4900 ;
RECT 125.0100 169.2200 131.5300 169.4900 ;
RECT 132.3700 169.2200 138.8900 169.4900 ;
RECT 139.7300 169.2200 146.2500 169.4900 ;
RECT 147.0900 169.2200 153.6100 169.4900 ;
RECT 154.4500 169.2200 160.9700 169.4900 ;
RECT 161.8100 169.2200 168.3300 169.4900 ;
RECT 169.1700 169.2200 169.3500 169.4900 ;
RECT 2.0900 2.2600 169.3500 169.2200 ;
RECT 2.6500 1.9900 9.1700 2.2600 ;
RECT 10.0100 1.9900 16.5300 2.2600 ;
RECT 17.3700 1.9900 23.8900 2.2600 ;
RECT 24.7300 1.9900 31.2500 2.2600 ;
RECT 32.0900 1.9900 38.6100 2.2600 ;
RECT 39.4500 1.9900 45.9700 2.2600 ;
RECT 46.8100 1.9900 53.3300 2.2600 ;
RECT 54.1700 1.9900 60.6900 2.2600 ;
RECT 61.5300 1.9900 68.0500 2.2600 ;
RECT 68.8900 1.9900 75.4100 2.2600 ;
RECT 76.2500 1.9900 82.7700 2.2600 ;
RECT 83.6100 1.9900 90.1300 2.2600 ;
RECT 90.9700 1.9900 97.4900 2.2600 ;
RECT 98.3300 1.9900 104.8500 2.2600 ;
RECT 105.6900 1.9900 112.2100 2.2600 ;
RECT 113.0500 1.9900 119.5700 2.2600 ;
RECT 120.4100 1.9900 126.9300 2.2600 ;
RECT 127.7700 1.9900 134.2900 2.2600 ;
RECT 135.1300 1.9900 141.6500 2.2600 ;
RECT 142.4900 1.9900 149.0100 2.2600 ;
RECT 149.8500 1.9900 156.3700 2.2600 ;
RECT 157.2100 1.9900 163.7300 2.2600 ;
RECT 164.5700 1.9900 169.3500 2.2600 ;
LAYER met3 ;
RECT 2.5000 164.6400 169.2800 165.7050 ;
RECT 1.9500 158.2800 169.2800 164.6400 ;
RECT 1.9500 156.4800 168.9800 158.2800 ;
RECT 1.9500 155.5600 169.2800 156.4800 ;
RECT 2.5000 153.7600 169.2800 155.5600 ;
RECT 1.9500 147.4000 169.2800 153.7600 ;
RECT 1.9500 145.6000 168.9800 147.4000 ;
RECT 1.9500 144.6800 169.2800 145.6000 ;
RECT 2.5000 142.8800 169.2800 144.6800 ;
RECT 1.9500 136.5200 169.2800 142.8800 ;
RECT 1.9500 134.7200 168.9800 136.5200 ;
RECT 1.9500 133.8000 169.2800 134.7200 ;
RECT 2.5000 132.0000 169.2800 133.8000 ;
RECT 1.9500 125.6400 169.2800 132.0000 ;
RECT 1.9500 123.8400 168.9800 125.6400 ;
RECT 1.9500 122.9200 169.2800 123.8400 ;
RECT 2.5000 121.1200 169.2800 122.9200 ;
RECT 1.9500 114.7600 169.2800 121.1200 ;
RECT 1.9500 112.9600 168.9800 114.7600 ;
RECT 1.9500 112.0400 169.2800 112.9600 ;
RECT 2.5000 110.2400 169.2800 112.0400 ;
RECT 1.9500 103.8800 169.2800 110.2400 ;
RECT 1.9500 102.0800 168.9800 103.8800 ;
RECT 1.9500 101.1600 169.2800 102.0800 ;
RECT 2.5000 99.3600 169.2800 101.1600 ;
RECT 1.9500 93.0000 169.2800 99.3600 ;
RECT 1.9500 91.2000 168.9800 93.0000 ;
RECT 1.9500 90.2800 169.2800 91.2000 ;
RECT 2.5000 88.4800 169.2800 90.2800 ;
RECT 1.9500 82.1200 169.2800 88.4800 ;
RECT 1.9500 80.3200 168.9800 82.1200 ;
RECT 1.9500 79.4000 169.2800 80.3200 ;
RECT 2.5000 77.6000 169.2800 79.4000 ;
RECT 1.9500 71.2400 169.2800 77.6000 ;
RECT 1.9500 69.4400 168.9800 71.2400 ;
RECT 1.9500 68.5200 169.2800 69.4400 ;
RECT 2.5000 66.7200 169.2800 68.5200 ;
RECT 1.9500 60.3600 169.2800 66.7200 ;
RECT 1.9500 58.5600 168.9800 60.3600 ;
RECT 1.9500 57.6400 169.2800 58.5600 ;
RECT 2.5000 55.8400 169.2800 57.6400 ;
RECT 1.9500 49.4800 169.2800 55.8400 ;
RECT 1.9500 47.6800 168.9800 49.4800 ;
RECT 1.9500 46.7600 169.2800 47.6800 ;
RECT 2.5000 44.9600 169.2800 46.7600 ;
RECT 1.9500 38.6000 169.2800 44.9600 ;
RECT 1.9500 36.8000 168.9800 38.6000 ;
RECT 1.9500 35.8800 169.2800 36.8000 ;
RECT 2.5000 34.0800 169.2800 35.8800 ;
RECT 1.9500 27.7200 169.2800 34.0800 ;
RECT 1.9500 25.9200 168.9800 27.7200 ;
RECT 1.9500 25.0000 169.2800 25.9200 ;
RECT 2.5000 23.2000 169.2800 25.0000 ;
RECT 1.9500 16.8400 169.2800 23.2000 ;
RECT 1.9500 15.0400 168.9800 16.8400 ;
RECT 1.9500 14.1200 169.2800 15.0400 ;
RECT 2.5000 12.3200 169.2800 14.1200 ;
RECT 1.9500 5.9600 169.2800 12.3200 ;
RECT 1.9500 4.8950 168.9800 5.9600 ;
LAYER met4 ;
RECT 1.9350 7.2800 101.4400 162.8000 ;
LAYER met5 ;
RECT 7.5200 23.3700 163.9200 101.5600 ;
END
END striVe_spi