| * Simple testbench mainly to check SPICE model conversion from CDL | |
| .lib "/home/tim/projects/efabless/tech/SkyWater/EFS8A/libs.tech/models/s8.lib" tt | |
| .include /home/tim/projects/efabless/tech/SkyWater/EFS8A/libs.ref/spi/scs8ms/scs8ms.spi | |
| .option TEMP=27 | |
| X0 in out vss vss vdd vdd scs8ms_inv_1 | |
| V0 vdd vss PWL(0n 0.0 30n 1.8) | |
| V1 vss 0 0.0 | |
| Vin in vss PWL(0n 0.0 100n 0.0 500n 1.8) | |
| * Transient analysis | |
| .control | |
| tran 1n 1u | |
| plot V(in) V(out) | |
| .endc | |
| .end |