| Flattening unmatched subcell scs8hd_tapvpwrvgnd_1 in circuit striVe (0)(4 instances) |
| |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: amuxbus_a |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: amuxbus_b |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssa |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vdda |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vswitch |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vddio_q |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vcchib |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vddio |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vccd |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssio |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssd |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssio_q |
| |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: amuxbus_a |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: amuxbus_b |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: ogc_hvc |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: drn_hvc |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: src_bdy_hvc |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vddio |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vddio_q |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vdda |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vccd |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vswitch |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vcchib |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssa |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssd |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssio_q |
| Cell s8iom0s8_com_bus_slice_1um disconnected node: vssio |
| Equate pins: cell s8iom0s8_com_bus_slice_1um and/or s8iom0s8_com_bus_slice_1um has no elements. |
| |
| Cell s8iom0_vddio_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vddio_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vddio_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vddio_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssa |
| Cell s8iom0_vddio_hvc_pad disconnected node: vdda |
| Cell s8iom0_vddio_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vddio_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vddio_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vddio_hvc_pad disconnected node: vddio |
| Cell s8iom0_vddio_hvc_pad disconnected node: vccd |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssio |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssd |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vddio_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vddio_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vddio_hvc_pad disconnected node: ogc_hvc |
| Cell s8iom0_vddio_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vddio_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vddio_hvc_pad disconnected node: vddio |
| Cell s8iom0_vddio_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vddio_hvc_pad disconnected node: vdda |
| Cell s8iom0_vddio_hvc_pad disconnected node: vccd |
| Cell s8iom0_vddio_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vddio_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssa |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssd |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssio_q |
| Cell s8iom0_vddio_hvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vddio_hvc_pad and/or s8iom0_vddio_hvc_pad has no elements. |
| |
| Cell s8iom0_gpiov2_pad disconnected node: in_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_noesd_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_esd_0_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_esd_1_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad |
| Cell s8iom0_gpiov2_pad disconnected node: dm<2> |
| Cell s8iom0_gpiov2_pad disconnected node: dm<1> |
| Cell s8iom0_gpiov2_pad disconnected node: dm<0> |
| Cell s8iom0_gpiov2_pad disconnected node: hld_h_n |
| Cell s8iom0_gpiov2_pad disconnected node: in |
| Cell s8iom0_gpiov2_pad disconnected node: inp_dis |
| Cell s8iom0_gpiov2_pad disconnected node: ib_mode_sel |
| Cell s8iom0_gpiov2_pad disconnected node: enable_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vdda_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_inp_h |
| Cell s8iom0_gpiov2_pad disconnected node: oe_n |
| Cell s8iom0_gpiov2_pad disconnected node: tie_hi_esd |
| Cell s8iom0_gpiov2_pad disconnected node: tie_lo_esd |
| Cell s8iom0_gpiov2_pad disconnected node: slow |
| Cell s8iom0_gpiov2_pad disconnected node: vtrip_sel |
| Cell s8iom0_gpiov2_pad disconnected node: hld_ovr |
| Cell s8iom0_gpiov2_pad disconnected node: analog_en |
| Cell s8iom0_gpiov2_pad disconnected node: analog_sel |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vddio |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vswitch_h |
| Cell s8iom0_gpiov2_pad disconnected node: analog_pol |
| Cell s8iom0_gpiov2_pad disconnected node: out |
| Cell s8iom0_gpiov2_pad disconnected node: amuxbus_a |
| Cell s8iom0_gpiov2_pad disconnected node: amuxbus_b |
| Cell s8iom0_gpiov2_pad disconnected node: vssa |
| Cell s8iom0_gpiov2_pad disconnected node: vdda |
| Cell s8iom0_gpiov2_pad disconnected node: vswitch |
| Cell s8iom0_gpiov2_pad disconnected node: vddio_q |
| Cell s8iom0_gpiov2_pad disconnected node: vcchib |
| Cell s8iom0_gpiov2_pad disconnected node: vddio |
| Cell s8iom0_gpiov2_pad disconnected node: vccd |
| Cell s8iom0_gpiov2_pad disconnected node: vssio |
| Cell s8iom0_gpiov2_pad disconnected node: vssd |
| Cell s8iom0_gpiov2_pad disconnected node: vssio_q |
| |
| Cell s8iom0_gpiov2_pad disconnected node: out |
| Cell s8iom0_gpiov2_pad disconnected node: oe_n |
| Cell s8iom0_gpiov2_pad disconnected node: hld_h_n |
| Cell s8iom0_gpiov2_pad disconnected node: enable_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_inp_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vdda_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vswitch_h |
| Cell s8iom0_gpiov2_pad disconnected node: enable_vddio |
| Cell s8iom0_gpiov2_pad disconnected node: inp_dis |
| Cell s8iom0_gpiov2_pad disconnected node: ib_mode_sel |
| Cell s8iom0_gpiov2_pad disconnected node: vtrip_sel |
| Cell s8iom0_gpiov2_pad disconnected node: slow |
| Cell s8iom0_gpiov2_pad disconnected node: hld_ovr |
| Cell s8iom0_gpiov2_pad disconnected node: analog_en |
| Cell s8iom0_gpiov2_pad disconnected node: analog_sel |
| Cell s8iom0_gpiov2_pad disconnected node: analog_pol |
| Cell s8iom0_gpiov2_pad disconnected node: dm[2] |
| Cell s8iom0_gpiov2_pad disconnected node: dm[1] |
| Cell s8iom0_gpiov2_pad disconnected node: dm[0] |
| Cell s8iom0_gpiov2_pad disconnected node: vddio |
| Cell s8iom0_gpiov2_pad disconnected node: vddio_q |
| Cell s8iom0_gpiov2_pad disconnected node: vdda |
| Cell s8iom0_gpiov2_pad disconnected node: vccd |
| Cell s8iom0_gpiov2_pad disconnected node: vswitch |
| Cell s8iom0_gpiov2_pad disconnected node: vcchib |
| Cell s8iom0_gpiov2_pad disconnected node: vssa |
| Cell s8iom0_gpiov2_pad disconnected node: vssd |
| Cell s8iom0_gpiov2_pad disconnected node: vssio_q |
| Cell s8iom0_gpiov2_pad disconnected node: vssio |
| Cell s8iom0_gpiov2_pad disconnected node: pad |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_noesd_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_esd_0_h |
| Cell s8iom0_gpiov2_pad disconnected node: pad_a_esd_1_h |
| Cell s8iom0_gpiov2_pad disconnected node: amuxbus_a |
| Cell s8iom0_gpiov2_pad disconnected node: amuxbus_b |
| Cell s8iom0_gpiov2_pad disconnected node: in |
| Cell s8iom0_gpiov2_pad disconnected node: in_h |
| Cell s8iom0_gpiov2_pad disconnected node: tie_hi_esd |
| Cell s8iom0_gpiov2_pad disconnected node: tie_lo_esd |
| Equate pins: cell s8iom0_gpiov2_pad and/or s8iom0_gpiov2_pad has no elements. |
| |
| Cell scs8hd_conb_1 disconnected node: HI |
| Cell scs8hd_conb_1 disconnected node: LO |
| Cell scs8hd_conb_1 disconnected node: vgnd |
| Cell scs8hd_conb_1 disconnected node: vpwr |
| |
| Cell scs8hd_conb_1 disconnected node: HI |
| Cell scs8hd_conb_1 disconnected node: LO |
| Equate pins: cell scs8hd_conb_1 and/or scs8hd_conb_1 has no elements. |
| |
| Cell s8iom0_vssd_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssd_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssd_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssd_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssd_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssd_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssd_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssi |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssd_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssd_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssd_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssd_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssd_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssd_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssio |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vssd_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssd_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssd_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssd_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssd_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssd_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssd_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssd_lvc_pad disconnected node: ogc_lvc |
| Cell s8iom0_vssd_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssd_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssd_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssd_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssd_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssd_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssio_q |
| Cell s8iom0_vssd_lvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vssd_lvc_pad and/or s8iom0_vssd_lvc_pad has no elements. |
| |
| Cell digital_pll disconnected node: reset |
| Cell digital_pll disconnected node: extclk_sel |
| Cell digital_pll disconnected node: osc |
| Cell digital_pll disconnected node: clockc |
| Cell digital_pll disconnected node: clockp[1] |
| Cell digital_pll disconnected node: clockp[0] |
| Cell digital_pll disconnected node: clockd[3] |
| Cell digital_pll disconnected node: clockd[2] |
| Cell digital_pll disconnected node: clockd[1] |
| Cell digital_pll disconnected node: clockd[0] |
| Cell digital_pll disconnected node: div[4] |
| Cell digital_pll disconnected node: div[3] |
| Cell digital_pll disconnected node: div[2] |
| Cell digital_pll disconnected node: div[1] |
| Cell digital_pll disconnected node: div[0] |
| Cell digital_pll disconnected node: sel[2] |
| Cell digital_pll disconnected node: sel[1] |
| Cell digital_pll disconnected node: sel[0] |
| Cell digital_pll disconnected node: dco |
| Cell digital_pll disconnected node: ext_trim[25] |
| Cell digital_pll disconnected node: ext_trim[24] |
| Cell digital_pll disconnected node: ext_trim[23] |
| Cell digital_pll disconnected node: ext_trim[22] |
| Cell digital_pll disconnected node: ext_trim[21] |
| Cell digital_pll disconnected node: ext_trim[20] |
| Cell digital_pll disconnected node: ext_trim[19] |
| Cell digital_pll disconnected node: ext_trim[18] |
| Cell digital_pll disconnected node: ext_trim[17] |
| Cell digital_pll disconnected node: ext_trim[16] |
| Cell digital_pll disconnected node: ext_trim[15] |
| Cell digital_pll disconnected node: ext_trim[14] |
| Cell digital_pll disconnected node: ext_trim[13] |
| Cell digital_pll disconnected node: ext_trim[12] |
| Cell digital_pll disconnected node: ext_trim[11] |
| Cell digital_pll disconnected node: ext_trim[10] |
| Cell digital_pll disconnected node: ext_trim[9] |
| Cell digital_pll disconnected node: ext_trim[8] |
| Cell digital_pll disconnected node: ext_trim[7] |
| Cell digital_pll disconnected node: ext_trim[6] |
| Cell digital_pll disconnected node: ext_trim[5] |
| Cell digital_pll disconnected node: ext_trim[4] |
| Cell digital_pll disconnected node: ext_trim[3] |
| Cell digital_pll disconnected node: ext_trim[2] |
| Cell digital_pll disconnected node: ext_trim[1] |
| Cell digital_pll disconnected node: ext_trim[0] |
| Cell digital_pll disconnected node: irb/vpwr |
| Cell digital_pll disconnected node: irb/vgnd |
| |
| Cell digital_pll disconnected node: clockc |
| Cell digital_pll disconnected node: clockd[3] |
| Cell digital_pll disconnected node: clockd[2] |
| Cell digital_pll disconnected node: clockd[1] |
| Cell digital_pll disconnected node: clockd[0] |
| Cell digital_pll disconnected node: clockp[1] |
| Cell digital_pll disconnected node: clockp[0] |
| Cell digital_pll disconnected node: dco |
| Cell digital_pll disconnected node: div[4] |
| Cell digital_pll disconnected node: div[3] |
| Cell digital_pll disconnected node: div[2] |
| Cell digital_pll disconnected node: div[1] |
| Cell digital_pll disconnected node: div[0] |
| Cell digital_pll disconnected node: ext_trim[25] |
| Cell digital_pll disconnected node: ext_trim[24] |
| Cell digital_pll disconnected node: ext_trim[23] |
| Cell digital_pll disconnected node: ext_trim[22] |
| Cell digital_pll disconnected node: ext_trim[21] |
| Cell digital_pll disconnected node: ext_trim[20] |
| Cell digital_pll disconnected node: ext_trim[19] |
| Cell digital_pll disconnected node: ext_trim[18] |
| Cell digital_pll disconnected node: ext_trim[17] |
| Cell digital_pll disconnected node: ext_trim[16] |
| Cell digital_pll disconnected node: ext_trim[15] |
| Cell digital_pll disconnected node: ext_trim[14] |
| Cell digital_pll disconnected node: ext_trim[13] |
| Cell digital_pll disconnected node: ext_trim[12] |
| Cell digital_pll disconnected node: ext_trim[11] |
| Cell digital_pll disconnected node: ext_trim[10] |
| Cell digital_pll disconnected node: ext_trim[9] |
| Cell digital_pll disconnected node: ext_trim[8] |
| Cell digital_pll disconnected node: ext_trim[7] |
| Cell digital_pll disconnected node: ext_trim[6] |
| Cell digital_pll disconnected node: ext_trim[5] |
| Cell digital_pll disconnected node: ext_trim[4] |
| Cell digital_pll disconnected node: ext_trim[3] |
| Cell digital_pll disconnected node: ext_trim[2] |
| Cell digital_pll disconnected node: ext_trim[1] |
| Cell digital_pll disconnected node: ext_trim[0] |
| Cell digital_pll disconnected node: extclk_sel |
| Cell digital_pll disconnected node: osc |
| Cell digital_pll disconnected node: reset |
| Cell digital_pll disconnected node: sel[2] |
| Cell digital_pll disconnected node: sel[1] |
| Cell digital_pll disconnected node: sel[0] |
| Equate pins: cell digital_pll and/or digital_pll has no elements. |
| |
| Cell lvlshiftdown disconnected node: vnb |
| Cell lvlshiftdown disconnected node: vpwr |
| Cell lvlshiftdown disconnected node: vpb |
| Cell lvlshiftdown disconnected node: vgnd |
| Cell lvlshiftdown disconnected node: X |
| Cell lvlshiftdown disconnected node: A |
| |
| Cell lvlshiftdown disconnected node: vpwr |
| Cell lvlshiftdown disconnected node: vpb |
| Cell lvlshiftdown disconnected node: vnb |
| Cell lvlshiftdown disconnected node: vgnd |
| Cell lvlshiftdown disconnected node: A |
| Cell lvlshiftdown disconnected node: X |
| Equate pins: cell lvlshiftdown and/or lvlshiftdown has no elements. |
| |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: amuxbus_a |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: amuxbus_b |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_en |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_pol |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_sel |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm<2> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm<1> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm<0> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_inp_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vdda_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vddio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vswitch_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hld_h_n |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hld_ovr |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hys_trim |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: ib_mode_sel<1> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: ib_mode_sel<0> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: in |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: in_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: inp_dis |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: oe_n |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: out |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_esd_0_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_esd_1_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_noesd_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slew_ctl<1> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slew_ctl<0> |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slow |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: tie_hi_esd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: tie_lo_esd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vccd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vcchib |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vdda |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vddio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vddio_q |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vinref |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssa |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssio_q |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vswitch |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vtrip_sel |
| |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: out |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: oe_n |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hld_h_n |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_inp_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vdda_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vddio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: enable_vswitch_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: inp_dis |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vtrip_sel |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hys_trim |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slow |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slew_ctl[1] |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: slew_ctl[0] |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: hld_ovr |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_en |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_sel |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: analog_pol |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm[2] |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm[1] |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: dm[0] |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: ib_mode_sel[1] |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: ib_mode_sel[0] |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vinref |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vddio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vddio_q |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vdda |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vccd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vswitch |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vcchib |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssa |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssio_q |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: vssio |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_noesd_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_esd_0_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: pad_a_esd_1_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: amuxbus_a |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: amuxbus_b |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: in |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: in_h |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: tie_hi_esd |
| Cell s8iom0s8_top_gpio_ovtv2 disconnected node: tie_lo_esd |
| Equate pins: cell s8iom0s8_top_gpio_ovtv2 and/or s8iom0s8_top_gpio_ovtv2 has no elements. |
| |
| Cell s8iom0_vccd_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vccd_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vccd_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vccd_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vccd_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vccd_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vccd_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssi |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssa |
| Cell s8iom0_vccd_lvc_pad disconnected node: vdda |
| Cell s8iom0_vccd_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vccd_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vccd_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vccd_lvc_pad disconnected node: vddio |
| Cell s8iom0_vccd_lvc_pad disconnected node: vccd |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssio |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssd |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vccd_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vccd_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vccd_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vccd_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vccd_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vccd_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vccd_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vccd_lvc_pad disconnected node: ogc_lvc |
| Cell s8iom0_vccd_lvc_pad disconnected node: vddio |
| Cell s8iom0_vccd_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vccd_lvc_pad disconnected node: vdda |
| Cell s8iom0_vccd_lvc_pad disconnected node: vccd |
| Cell s8iom0_vccd_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vccd_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssa |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssd |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssio_q |
| Cell s8iom0_vccd_lvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vccd_lvc_pad and/or s8iom0_vccd_lvc_pad has no elements. |
| |
| Cell s8iom0_vccd_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vccd_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vccd_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vccd_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssa |
| Cell s8iom0_vccd_hvc_pad disconnected node: vdda |
| Cell s8iom0_vccd_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vccd_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vccd_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vccd_hvc_pad disconnected node: vddio |
| Cell s8iom0_vccd_hvc_pad disconnected node: vccd |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssio |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssd |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vccd_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vccd_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vccd_hvc_pad disconnected node: ogc_hvc |
| Cell s8iom0_vccd_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vccd_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vccd_hvc_pad disconnected node: vddio |
| Cell s8iom0_vccd_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vccd_hvc_pad disconnected node: vdda |
| Cell s8iom0_vccd_hvc_pad disconnected node: vccd |
| Cell s8iom0_vccd_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vccd_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssa |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssd |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssio_q |
| Cell s8iom0_vccd_hvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vccd_hvc_pad and/or s8iom0_vccd_hvc_pad has no elements. |
| |
| Cell s8iom0_vdda_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vdda_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vdda_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vdda_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vdda_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vdda_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vdda_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssi |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssa |
| Cell s8iom0_vdda_lvc_pad disconnected node: vdda |
| Cell s8iom0_vdda_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vdda_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vdda_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vdda_lvc_pad disconnected node: vddio |
| Cell s8iom0_vdda_lvc_pad disconnected node: vccd |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssio |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssd |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vdda_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vdda_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vdda_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vdda_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vdda_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vdda_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vdda_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vdda_lvc_pad disconnected node: ogc_lvc |
| Cell s8iom0_vdda_lvc_pad disconnected node: vddio |
| Cell s8iom0_vdda_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vdda_lvc_pad disconnected node: vdda |
| Cell s8iom0_vdda_lvc_pad disconnected node: vccd |
| Cell s8iom0_vdda_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vdda_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssa |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssd |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssio_q |
| Cell s8iom0_vdda_lvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vdda_lvc_pad and/or s8iom0_vdda_lvc_pad has no elements. |
| |
| Cell s8iom0_vssa_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssa_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssa_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vssa_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssa |
| Cell s8iom0_vssa_hvc_pad disconnected node: vdda |
| Cell s8iom0_vssa_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vssa_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssa_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vssa_hvc_pad disconnected node: vddio |
| Cell s8iom0_vssa_hvc_pad disconnected node: vccd |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssio |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssd |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vssa_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssa_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssa_hvc_pad disconnected node: ogc_hvc |
| Cell s8iom0_vssa_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vssa_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vssa_hvc_pad disconnected node: vddio |
| Cell s8iom0_vssa_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssa_hvc_pad disconnected node: vdda |
| Cell s8iom0_vssa_hvc_pad disconnected node: vccd |
| Cell s8iom0_vssa_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vssa_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssa |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssd |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssio_q |
| Cell s8iom0_vssa_hvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vssa_hvc_pad and/or s8iom0_vssa_hvc_pad has no elements. |
| |
| Cell s8iom0_vdda_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vdda_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vdda_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vdda_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssa |
| Cell s8iom0_vdda_hvc_pad disconnected node: vdda |
| Cell s8iom0_vdda_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vdda_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vdda_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vdda_hvc_pad disconnected node: vddio |
| Cell s8iom0_vdda_hvc_pad disconnected node: vccd |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssio |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssd |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vdda_hvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vdda_hvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vdda_hvc_pad disconnected node: ogc_hvc |
| Cell s8iom0_vdda_hvc_pad disconnected node: drn_hvc |
| Cell s8iom0_vdda_hvc_pad disconnected node: src_bdy_hvc |
| Cell s8iom0_vdda_hvc_pad disconnected node: vddio |
| Cell s8iom0_vdda_hvc_pad disconnected node: vddio_q |
| Cell s8iom0_vdda_hvc_pad disconnected node: vdda |
| Cell s8iom0_vdda_hvc_pad disconnected node: vccd |
| Cell s8iom0_vdda_hvc_pad disconnected node: vswitch |
| Cell s8iom0_vdda_hvc_pad disconnected node: vcchib |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssa |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssd |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssio_q |
| Cell s8iom0_vdda_hvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vdda_hvc_pad and/or s8iom0_vdda_hvc_pad has no elements. |
| |
| Cell s8iom0_vssio_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssio_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssio_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssio_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssio_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssio_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssio_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssi |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssio_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssio_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssio_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssio_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssio_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssio_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssio |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vssio_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssio_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssio_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssio_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssio_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssio_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssio_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssio_lvc_pad disconnected node: ogc_lvc |
| Cell s8iom0_vssio_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssio_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssio_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssio_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssio_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssio_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssio_q |
| Cell s8iom0_vssio_lvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vssio_lvc_pad and/or s8iom0_vssio_lvc_pad has no elements. |
| |
| Cell striVe_clkrst disconnected node: ext_clk_sel |
| Cell striVe_clkrst disconnected node: ext_clk |
| Cell striVe_clkrst disconnected node: pll_clk |
| Cell striVe_clkrst disconnected node: reset |
| Cell striVe_clkrst disconnected node: ext_reset |
| Cell striVe_clkrst disconnected node: clk |
| Cell striVe_clkrst disconnected node: resetn |
| Cell striVe_clkrst disconnected node: _07_/vpwr |
| Cell striVe_clkrst disconnected node: _06_/vgnd |
| |
| Cell striVe_clkrst disconnected node: clk |
| Cell striVe_clkrst disconnected node: ext_clk |
| Cell striVe_clkrst disconnected node: ext_clk_sel |
| Cell striVe_clkrst disconnected node: ext_reset |
| Cell striVe_clkrst disconnected node: pll_clk |
| Cell striVe_clkrst disconnected node: reset |
| Cell striVe_clkrst disconnected node: resetn |
| Equate pins: cell striVe_clkrst and/or striVe_clkrst has no elements. |
| |
| Cell s8iom0_vssa_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssa_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssa_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssa_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssa_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssa_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssa_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssi |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssa_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssa_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssa_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssa_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssa_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssa_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssio |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssio_q |
| |
| Cell s8iom0_vssa_lvc_pad disconnected node: amuxbus_a |
| Cell s8iom0_vssa_lvc_pad disconnected node: amuxbus_b |
| Cell s8iom0_vssa_lvc_pad disconnected node: drn_lvc1 |
| Cell s8iom0_vssa_lvc_pad disconnected node: drn_lvc2 |
| Cell s8iom0_vssa_lvc_pad disconnected node: src_bdy_lvc1 |
| Cell s8iom0_vssa_lvc_pad disconnected node: src_bdy_lvc2 |
| Cell s8iom0_vssa_lvc_pad disconnected node: bdy2_b2b |
| Cell s8iom0_vssa_lvc_pad disconnected node: ogc_lvc |
| Cell s8iom0_vssa_lvc_pad disconnected node: vddio |
| Cell s8iom0_vssa_lvc_pad disconnected node: vddio_q |
| Cell s8iom0_vssa_lvc_pad disconnected node: vdda |
| Cell s8iom0_vssa_lvc_pad disconnected node: vccd |
| Cell s8iom0_vssa_lvc_pad disconnected node: vswitch |
| Cell s8iom0_vssa_lvc_pad disconnected node: vcchib |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssa |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssd |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssio_q |
| Cell s8iom0_vssa_lvc_pad disconnected node: vssio |
| Equate pins: cell s8iom0_vssa_lvc_pad and/or s8iom0_vssa_lvc_pad has no elements. |
| |
| Cell s8iom0_corner_pad disconnected node: amuxbus_a |
| Cell s8iom0_corner_pad disconnected node: amuxbus_b |
| Cell s8iom0_corner_pad disconnected node: vssa |
| Cell s8iom0_corner_pad disconnected node: vdda |
| Cell s8iom0_corner_pad disconnected node: vswitch |
| Cell s8iom0_corner_pad disconnected node: vddio_q |
| Cell s8iom0_corner_pad disconnected node: vcchib |
| Cell s8iom0_corner_pad disconnected node: vddio |
| Cell s8iom0_corner_pad disconnected node: vccd |
| Cell s8iom0_corner_pad disconnected node: vssio |
| Cell s8iom0_corner_pad disconnected node: vssd |
| Cell s8iom0_corner_pad disconnected node: vssio_q |
| |
| Cell s8iom0_corner_pad disconnected node: amuxbus_a |
| Cell s8iom0_corner_pad disconnected node: amuxbus_b |
| Cell s8iom0_corner_pad disconnected node: vddio |
| Cell s8iom0_corner_pad disconnected node: vddio_q |
| Cell s8iom0_corner_pad disconnected node: vdda |
| Cell s8iom0_corner_pad disconnected node: vccd |
| Cell s8iom0_corner_pad disconnected node: vswitch |
| Cell s8iom0_corner_pad disconnected node: vcchib |
| Cell s8iom0_corner_pad disconnected node: vssa |
| Cell s8iom0_corner_pad disconnected node: vssd |
| Cell s8iom0_corner_pad disconnected node: vssio_q |
| Cell s8iom0_corner_pad disconnected node: vssio |
| Equate pins: cell s8iom0_corner_pad and/or s8iom0_corner_pad has no elements. |
| |
| Cell striVe_soc disconnected node: pll_clk |
| Cell striVe_soc disconnected node: ext_clk |
| Cell striVe_soc disconnected node: ext_clk_sel |
| Cell striVe_soc disconnected node: clk |
| Cell striVe_soc disconnected node: resetn |
| Cell striVe_soc disconnected node: gpio_out_pad[15] |
| Cell striVe_soc disconnected node: gpio_out_pad[14] |
| Cell striVe_soc disconnected node: gpio_out_pad[13] |
| Cell striVe_soc disconnected node: gpio_out_pad[12] |
| Cell striVe_soc disconnected node: gpio_out_pad[11] |
| Cell striVe_soc disconnected node: gpio_out_pad[10] |
| Cell striVe_soc disconnected node: gpio_out_pad[9] |
| Cell striVe_soc disconnected node: gpio_out_pad[8] |
| Cell striVe_soc disconnected node: gpio_out_pad[7] |
| Cell striVe_soc disconnected node: gpio_out_pad[6] |
| Cell striVe_soc disconnected node: gpio_out_pad[5] |
| Cell striVe_soc disconnected node: gpio_out_pad[4] |
| Cell striVe_soc disconnected node: gpio_out_pad[3] |
| Cell striVe_soc disconnected node: gpio_out_pad[2] |
| Cell striVe_soc disconnected node: gpio_out_pad[1] |
| Cell striVe_soc disconnected node: gpio_out_pad[0] |
| Cell striVe_soc disconnected node: gpio_in_pad[15] |
| Cell striVe_soc disconnected node: gpio_in_pad[14] |
| Cell striVe_soc disconnected node: gpio_in_pad[13] |
| Cell striVe_soc disconnected node: gpio_in_pad[12] |
| Cell striVe_soc disconnected node: gpio_in_pad[11] |
| Cell striVe_soc disconnected node: gpio_in_pad[10] |
| Cell striVe_soc disconnected node: gpio_in_pad[9] |
| Cell striVe_soc disconnected node: gpio_in_pad[8] |
| Cell striVe_soc disconnected node: gpio_in_pad[7] |
| Cell striVe_soc disconnected node: gpio_in_pad[6] |
| Cell striVe_soc disconnected node: gpio_in_pad[5] |
| Cell striVe_soc disconnected node: gpio_in_pad[4] |
| Cell striVe_soc disconnected node: gpio_in_pad[3] |
| Cell striVe_soc disconnected node: gpio_in_pad[2] |
| Cell striVe_soc disconnected node: gpio_in_pad[1] |
| Cell striVe_soc disconnected node: gpio_in_pad[0] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[15] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[14] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[13] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[12] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[11] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[10] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[9] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[8] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[7] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[6] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[5] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[4] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[3] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[2] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[1] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[0] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[15] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[14] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[13] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[12] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[11] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[10] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[9] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[8] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[7] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[6] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[5] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[4] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[3] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[2] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[1] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[0] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[15] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[14] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[13] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[12] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[11] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[10] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[9] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[8] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[7] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[6] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[5] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[4] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[3] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[2] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[1] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[0] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[15] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[14] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[13] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[12] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[11] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[10] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[9] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[8] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[7] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[6] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[5] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[4] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[3] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[2] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[1] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[0] |
| Cell striVe_soc disconnected node: adc0_ena |
| Cell striVe_soc disconnected node: adc0_convert |
| Cell striVe_soc disconnected node: adc0_data[9] |
| Cell striVe_soc disconnected node: adc0_data[8] |
| Cell striVe_soc disconnected node: adc0_data[7] |
| Cell striVe_soc disconnected node: adc0_data[6] |
| Cell striVe_soc disconnected node: adc0_data[5] |
| Cell striVe_soc disconnected node: adc0_data[4] |
| Cell striVe_soc disconnected node: adc0_data[3] |
| Cell striVe_soc disconnected node: adc0_data[2] |
| Cell striVe_soc disconnected node: adc0_data[1] |
| Cell striVe_soc disconnected node: adc0_data[0] |
| Cell striVe_soc disconnected node: adc0_done |
| Cell striVe_soc disconnected node: adc0_clk |
| Cell striVe_soc disconnected node: adc0_inputsrc[1] |
| Cell striVe_soc disconnected node: adc0_inputsrc[0] |
| Cell striVe_soc disconnected node: adc1_ena |
| Cell striVe_soc disconnected node: adc1_convert |
| Cell striVe_soc disconnected node: adc1_clk |
| Cell striVe_soc disconnected node: adc1_inputsrc[1] |
| Cell striVe_soc disconnected node: adc1_inputsrc[0] |
| Cell striVe_soc disconnected node: adc1_data[9] |
| Cell striVe_soc disconnected node: adc1_data[8] |
| Cell striVe_soc disconnected node: adc1_data[7] |
| Cell striVe_soc disconnected node: adc1_data[6] |
| Cell striVe_soc disconnected node: adc1_data[5] |
| Cell striVe_soc disconnected node: adc1_data[4] |
| Cell striVe_soc disconnected node: adc1_data[3] |
| Cell striVe_soc disconnected node: adc1_data[2] |
| Cell striVe_soc disconnected node: adc1_data[1] |
| Cell striVe_soc disconnected node: adc1_data[0] |
| Cell striVe_soc disconnected node: adc1_done |
| Cell striVe_soc disconnected node: dac_ena |
| Cell striVe_soc disconnected node: dac_value[9] |
| Cell striVe_soc disconnected node: dac_value[8] |
| Cell striVe_soc disconnected node: dac_value[7] |
| Cell striVe_soc disconnected node: dac_value[6] |
| Cell striVe_soc disconnected node: dac_value[5] |
| Cell striVe_soc disconnected node: dac_value[4] |
| Cell striVe_soc disconnected node: dac_value[3] |
| Cell striVe_soc disconnected node: dac_value[2] |
| Cell striVe_soc disconnected node: dac_value[1] |
| Cell striVe_soc disconnected node: dac_value[0] |
| Cell striVe_soc disconnected node: analog_out_sel |
| Cell striVe_soc disconnected node: opamp_ena |
| Cell striVe_soc disconnected node: opamp_bias_ena |
| Cell striVe_soc disconnected node: bg_ena |
| Cell striVe_soc disconnected node: comp_ena |
| Cell striVe_soc disconnected node: comp_ninputsrc[1] |
| Cell striVe_soc disconnected node: comp_ninputsrc[0] |
| Cell striVe_soc disconnected node: comp_pinputsrc[1] |
| Cell striVe_soc disconnected node: comp_pinputsrc[0] |
| Cell striVe_soc disconnected node: rcosc_ena |
| Cell striVe_soc disconnected node: overtemp_ena |
| Cell striVe_soc disconnected node: overtemp |
| Cell striVe_soc disconnected node: rcosc_in |
| Cell striVe_soc disconnected node: xtal_in |
| Cell striVe_soc disconnected node: comp_in |
| Cell striVe_soc disconnected node: spi_sck |
| Cell striVe_soc disconnected node: spi_ro_config[7] |
| Cell striVe_soc disconnected node: spi_ro_config[6] |
| Cell striVe_soc disconnected node: spi_ro_config[5] |
| Cell striVe_soc disconnected node: spi_ro_config[4] |
| Cell striVe_soc disconnected node: spi_ro_config[3] |
| Cell striVe_soc disconnected node: spi_ro_config[2] |
| Cell striVe_soc disconnected node: spi_ro_config[1] |
| Cell striVe_soc disconnected node: spi_ro_config[0] |
| Cell striVe_soc disconnected node: spi_ro_xtal_ena |
| Cell striVe_soc disconnected node: spi_ro_reg_ena |
| Cell striVe_soc disconnected node: spi_ro_pll_dco_ena |
| Cell striVe_soc disconnected node: spi_ro_pll_div[4] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[3] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[0] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[0] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[25] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[24] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[23] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[22] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[21] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[20] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[19] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[18] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[17] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[16] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[15] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[14] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[13] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[12] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[11] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[10] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[9] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[8] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[7] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[6] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[5] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[4] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[3] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[0] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[11] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[10] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[9] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[8] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[7] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[6] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[5] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[4] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[3] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[2] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[1] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[0] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[7] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[6] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[5] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[4] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[3] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[2] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[1] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[0] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[3] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[2] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[1] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[0] |
| Cell striVe_soc disconnected node: ser_tx |
| Cell striVe_soc disconnected node: ser_rx |
| Cell striVe_soc disconnected node: irq_pin |
| Cell striVe_soc disconnected node: irq_spi |
| Cell striVe_soc disconnected node: trap |
| Cell striVe_soc disconnected node: flash_csb |
| Cell striVe_soc disconnected node: flash_clk |
| Cell striVe_soc disconnected node: flash_csb_oeb |
| Cell striVe_soc disconnected node: flash_clk_oeb |
| Cell striVe_soc disconnected node: flash_io0_oeb |
| Cell striVe_soc disconnected node: flash_io1_oeb |
| Cell striVe_soc disconnected node: flash_io2_oeb |
| Cell striVe_soc disconnected node: flash_io3_oeb |
| Cell striVe_soc disconnected node: flash_csb_ieb |
| Cell striVe_soc disconnected node: flash_clk_ieb |
| Cell striVe_soc disconnected node: flash_io0_ieb |
| Cell striVe_soc disconnected node: flash_io1_ieb |
| Cell striVe_soc disconnected node: flash_io2_ieb |
| Cell striVe_soc disconnected node: flash_io3_ieb |
| Cell striVe_soc disconnected node: flash_io0_do |
| Cell striVe_soc disconnected node: flash_io1_do |
| Cell striVe_soc disconnected node: flash_io2_do |
| Cell striVe_soc disconnected node: flash_io3_do |
| Cell striVe_soc disconnected node: flash_io0_di |
| Cell striVe_soc disconnected node: flash_io1_di |
| Cell striVe_soc disconnected node: flash_io2_di |
| Cell striVe_soc disconnected node: flash_io3_di |
| Cell striVe_soc disconnected node: PHY_9/vgnd |
| Cell striVe_soc disconnected node: PHY_9/vpwr |
| |
| Cell striVe_soc disconnected node: pll_clk |
| Cell striVe_soc disconnected node: ext_clk |
| Cell striVe_soc disconnected node: ext_clk_sel |
| Cell striVe_soc disconnected node: clk |
| Cell striVe_soc disconnected node: resetn |
| Cell striVe_soc disconnected node: adc0_ena |
| Cell striVe_soc disconnected node: adc0_convert |
| Cell striVe_soc disconnected node: adc0_done |
| Cell striVe_soc disconnected node: adc0_clk |
| Cell striVe_soc disconnected node: adc1_ena |
| Cell striVe_soc disconnected node: adc1_convert |
| Cell striVe_soc disconnected node: adc1_clk |
| Cell striVe_soc disconnected node: adc1_done |
| Cell striVe_soc disconnected node: dac_ena |
| Cell striVe_soc disconnected node: analog_out_sel |
| Cell striVe_soc disconnected node: opamp_ena |
| Cell striVe_soc disconnected node: opamp_bias_ena |
| Cell striVe_soc disconnected node: bg_ena |
| Cell striVe_soc disconnected node: comp_ena |
| Cell striVe_soc disconnected node: rcosc_ena |
| Cell striVe_soc disconnected node: overtemp_ena |
| Cell striVe_soc disconnected node: overtemp |
| Cell striVe_soc disconnected node: rcosc_in |
| Cell striVe_soc disconnected node: xtal_in |
| Cell striVe_soc disconnected node: comp_in |
| Cell striVe_soc disconnected node: spi_sck |
| Cell striVe_soc disconnected node: spi_ro_xtal_ena |
| Cell striVe_soc disconnected node: spi_ro_reg_ena |
| Cell striVe_soc disconnected node: spi_ro_pll_dco_ena |
| Cell striVe_soc disconnected node: ser_tx |
| Cell striVe_soc disconnected node: ser_rx |
| Cell striVe_soc disconnected node: irq_pin |
| Cell striVe_soc disconnected node: irq_spi |
| Cell striVe_soc disconnected node: trap |
| Cell striVe_soc disconnected node: flash_csb |
| Cell striVe_soc disconnected node: flash_clk |
| Cell striVe_soc disconnected node: flash_csb_oeb |
| Cell striVe_soc disconnected node: flash_clk_oeb |
| Cell striVe_soc disconnected node: flash_io0_oeb |
| Cell striVe_soc disconnected node: flash_io1_oeb |
| Cell striVe_soc disconnected node: flash_io2_oeb |
| Cell striVe_soc disconnected node: flash_io3_oeb |
| Cell striVe_soc disconnected node: flash_csb_ieb |
| Cell striVe_soc disconnected node: flash_clk_ieb |
| Cell striVe_soc disconnected node: flash_io0_ieb |
| Cell striVe_soc disconnected node: flash_io1_ieb |
| Cell striVe_soc disconnected node: flash_io2_ieb |
| Cell striVe_soc disconnected node: flash_io3_ieb |
| Cell striVe_soc disconnected node: flash_io0_do |
| Cell striVe_soc disconnected node: flash_io1_do |
| Cell striVe_soc disconnected node: flash_io2_do |
| Cell striVe_soc disconnected node: flash_io3_do |
| Cell striVe_soc disconnected node: flash_io0_di |
| Cell striVe_soc disconnected node: flash_io1_di |
| Cell striVe_soc disconnected node: flash_io2_di |
| Cell striVe_soc disconnected node: flash_io3_di |
| Cell striVe_soc disconnected node: adc0_data[9] |
| Cell striVe_soc disconnected node: adc0_data[8] |
| Cell striVe_soc disconnected node: adc0_data[7] |
| Cell striVe_soc disconnected node: adc0_data[6] |
| Cell striVe_soc disconnected node: adc0_data[5] |
| Cell striVe_soc disconnected node: adc0_data[4] |
| Cell striVe_soc disconnected node: adc0_data[3] |
| Cell striVe_soc disconnected node: adc0_data[2] |
| Cell striVe_soc disconnected node: adc0_data[1] |
| Cell striVe_soc disconnected node: adc0_data[0] |
| Cell striVe_soc disconnected node: adc0_inputsrc[1] |
| Cell striVe_soc disconnected node: adc0_inputsrc[0] |
| Cell striVe_soc disconnected node: adc1_data[9] |
| Cell striVe_soc disconnected node: adc1_data[8] |
| Cell striVe_soc disconnected node: adc1_data[7] |
| Cell striVe_soc disconnected node: adc1_data[6] |
| Cell striVe_soc disconnected node: adc1_data[5] |
| Cell striVe_soc disconnected node: adc1_data[4] |
| Cell striVe_soc disconnected node: adc1_data[3] |
| Cell striVe_soc disconnected node: adc1_data[2] |
| Cell striVe_soc disconnected node: adc1_data[1] |
| Cell striVe_soc disconnected node: adc1_data[0] |
| Cell striVe_soc disconnected node: adc1_inputsrc[1] |
| Cell striVe_soc disconnected node: adc1_inputsrc[0] |
| Cell striVe_soc disconnected node: comp_ninputsrc[1] |
| Cell striVe_soc disconnected node: comp_ninputsrc[0] |
| Cell striVe_soc disconnected node: comp_pinputsrc[1] |
| Cell striVe_soc disconnected node: comp_pinputsrc[0] |
| Cell striVe_soc disconnected node: dac_value[9] |
| Cell striVe_soc disconnected node: dac_value[8] |
| Cell striVe_soc disconnected node: dac_value[7] |
| Cell striVe_soc disconnected node: dac_value[6] |
| Cell striVe_soc disconnected node: dac_value[5] |
| Cell striVe_soc disconnected node: dac_value[4] |
| Cell striVe_soc disconnected node: dac_value[3] |
| Cell striVe_soc disconnected node: dac_value[2] |
| Cell striVe_soc disconnected node: dac_value[1] |
| Cell striVe_soc disconnected node: dac_value[0] |
| Cell striVe_soc disconnected node: gpio_in_pad[15] |
| Cell striVe_soc disconnected node: gpio_in_pad[14] |
| Cell striVe_soc disconnected node: gpio_in_pad[13] |
| Cell striVe_soc disconnected node: gpio_in_pad[12] |
| Cell striVe_soc disconnected node: gpio_in_pad[11] |
| Cell striVe_soc disconnected node: gpio_in_pad[10] |
| Cell striVe_soc disconnected node: gpio_in_pad[9] |
| Cell striVe_soc disconnected node: gpio_in_pad[8] |
| Cell striVe_soc disconnected node: gpio_in_pad[7] |
| Cell striVe_soc disconnected node: gpio_in_pad[6] |
| Cell striVe_soc disconnected node: gpio_in_pad[5] |
| Cell striVe_soc disconnected node: gpio_in_pad[4] |
| Cell striVe_soc disconnected node: gpio_in_pad[3] |
| Cell striVe_soc disconnected node: gpio_in_pad[2] |
| Cell striVe_soc disconnected node: gpio_in_pad[1] |
| Cell striVe_soc disconnected node: gpio_in_pad[0] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[15] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[14] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[13] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[12] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[11] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[10] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[9] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[8] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[7] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[6] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[5] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[4] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[3] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[2] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[1] |
| Cell striVe_soc disconnected node: gpio_inenb_pad[0] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[15] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[14] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[13] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[12] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[11] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[10] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[9] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[8] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[7] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[6] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[5] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[4] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[3] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[2] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[1] |
| Cell striVe_soc disconnected node: gpio_mode0_pad[0] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[15] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[14] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[13] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[12] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[11] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[10] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[9] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[8] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[7] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[6] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[5] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[4] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[3] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[2] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[1] |
| Cell striVe_soc disconnected node: gpio_mode1_pad[0] |
| Cell striVe_soc disconnected node: gpio_out_pad[15] |
| Cell striVe_soc disconnected node: gpio_out_pad[14] |
| Cell striVe_soc disconnected node: gpio_out_pad[13] |
| Cell striVe_soc disconnected node: gpio_out_pad[12] |
| Cell striVe_soc disconnected node: gpio_out_pad[11] |
| Cell striVe_soc disconnected node: gpio_out_pad[10] |
| Cell striVe_soc disconnected node: gpio_out_pad[9] |
| Cell striVe_soc disconnected node: gpio_out_pad[8] |
| Cell striVe_soc disconnected node: gpio_out_pad[7] |
| Cell striVe_soc disconnected node: gpio_out_pad[6] |
| Cell striVe_soc disconnected node: gpio_out_pad[5] |
| Cell striVe_soc disconnected node: gpio_out_pad[4] |
| Cell striVe_soc disconnected node: gpio_out_pad[3] |
| Cell striVe_soc disconnected node: gpio_out_pad[2] |
| Cell striVe_soc disconnected node: gpio_out_pad[1] |
| Cell striVe_soc disconnected node: gpio_out_pad[0] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[15] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[14] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[13] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[12] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[11] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[10] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[9] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[8] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[7] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[6] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[5] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[4] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[3] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[2] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[1] |
| Cell striVe_soc disconnected node: gpio_outenb_pad[0] |
| Cell striVe_soc disconnected node: spi_ro_config[7] |
| Cell striVe_soc disconnected node: spi_ro_config[6] |
| Cell striVe_soc disconnected node: spi_ro_config[5] |
| Cell striVe_soc disconnected node: spi_ro_config[4] |
| Cell striVe_soc disconnected node: spi_ro_config[3] |
| Cell striVe_soc disconnected node: spi_ro_config[2] |
| Cell striVe_soc disconnected node: spi_ro_config[1] |
| Cell striVe_soc disconnected node: spi_ro_config[0] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[3] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[2] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[1] |
| Cell striVe_soc disconnected node: spi_ro_mask_rev[0] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[11] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[10] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[9] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[8] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[7] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[6] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[5] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[4] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[3] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[2] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[1] |
| Cell striVe_soc disconnected node: spi_ro_mfgr_id[0] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[4] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[3] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_div[0] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_sel[0] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[25] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[24] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[23] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[22] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[21] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[20] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[19] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[18] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[17] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[16] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[15] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[14] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[13] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[12] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[11] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[10] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[9] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[8] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[7] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[6] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[5] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[4] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[3] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[2] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[1] |
| Cell striVe_soc disconnected node: spi_ro_pll_trim[0] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[7] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[6] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[5] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[4] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[3] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[2] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[1] |
| Cell striVe_soc disconnected node: spi_ro_prod_id[0] |
| Equate pins: cell striVe_soc and/or striVe_soc has no elements. |
| |
| Cell striVe_spi disconnected node: RSTB |
| Cell striVe_spi disconnected node: SCK |
| Cell striVe_spi disconnected node: SDI |
| Cell striVe_spi disconnected node: CSB |
| Cell striVe_spi disconnected node: SDO |
| Cell striVe_spi disconnected node: sdo_enb |
| Cell striVe_spi disconnected node: xtal_ena |
| Cell striVe_spi disconnected node: reg_ena |
| Cell striVe_spi disconnected node: pll_dco_ena |
| Cell striVe_spi disconnected node: pll_div[4] |
| Cell striVe_spi disconnected node: pll_div[3] |
| Cell striVe_spi disconnected node: pll_div[2] |
| Cell striVe_spi disconnected node: pll_div[1] |
| Cell striVe_spi disconnected node: pll_div[0] |
| Cell striVe_spi disconnected node: pll_sel[2] |
| Cell striVe_spi disconnected node: pll_sel[1] |
| Cell striVe_spi disconnected node: pll_sel[0] |
| Cell striVe_spi disconnected node: pll_trim[25] |
| Cell striVe_spi disconnected node: pll_trim[24] |
| Cell striVe_spi disconnected node: pll_trim[23] |
| Cell striVe_spi disconnected node: pll_trim[22] |
| Cell striVe_spi disconnected node: pll_trim[21] |
| Cell striVe_spi disconnected node: pll_trim[20] |
| Cell striVe_spi disconnected node: pll_trim[19] |
| Cell striVe_spi disconnected node: pll_trim[18] |
| Cell striVe_spi disconnected node: pll_trim[17] |
| Cell striVe_spi disconnected node: pll_trim[16] |
| Cell striVe_spi disconnected node: pll_trim[15] |
| Cell striVe_spi disconnected node: pll_trim[14] |
| Cell striVe_spi disconnected node: pll_trim[13] |
| Cell striVe_spi disconnected node: pll_trim[12] |
| Cell striVe_spi disconnected node: pll_trim[11] |
| Cell striVe_spi disconnected node: pll_trim[10] |
| Cell striVe_spi disconnected node: pll_trim[9] |
| Cell striVe_spi disconnected node: pll_trim[8] |
| Cell striVe_spi disconnected node: pll_trim[7] |
| Cell striVe_spi disconnected node: pll_trim[6] |
| Cell striVe_spi disconnected node: pll_trim[5] |
| Cell striVe_spi disconnected node: pll_trim[4] |
| Cell striVe_spi disconnected node: pll_trim[3] |
| Cell striVe_spi disconnected node: pll_trim[2] |
| Cell striVe_spi disconnected node: pll_trim[1] |
| Cell striVe_spi disconnected node: pll_trim[0] |
| Cell striVe_spi disconnected node: pll_bypass |
| Cell striVe_spi disconnected node: irq |
| Cell striVe_spi disconnected node: reset |
| Cell striVe_spi disconnected node: RST |
| Cell striVe_spi disconnected node: trap |
| Cell striVe_spi disconnected node: mfgr_id[11] |
| Cell striVe_spi disconnected node: mfgr_id[10] |
| Cell striVe_spi disconnected node: mfgr_id[9] |
| Cell striVe_spi disconnected node: mfgr_id[8] |
| Cell striVe_spi disconnected node: mfgr_id[7] |
| Cell striVe_spi disconnected node: mfgr_id[6] |
| Cell striVe_spi disconnected node: mfgr_id[5] |
| Cell striVe_spi disconnected node: mfgr_id[4] |
| Cell striVe_spi disconnected node: mfgr_id[3] |
| Cell striVe_spi disconnected node: mfgr_id[2] |
| Cell striVe_spi disconnected node: mfgr_id[1] |
| Cell striVe_spi disconnected node: mfgr_id[0] |
| Cell striVe_spi disconnected node: prod_id[7] |
| Cell striVe_spi disconnected node: prod_id[6] |
| Cell striVe_spi disconnected node: prod_id[5] |
| Cell striVe_spi disconnected node: prod_id[4] |
| Cell striVe_spi disconnected node: prod_id[3] |
| Cell striVe_spi disconnected node: prod_id[2] |
| Cell striVe_spi disconnected node: prod_id[1] |
| Cell striVe_spi disconnected node: prod_id[0] |
| Cell striVe_spi disconnected node: mask_rev_in[3] |
| Cell striVe_spi disconnected node: mask_rev_in[2] |
| Cell striVe_spi disconnected node: mask_rev_in[1] |
| Cell striVe_spi disconnected node: mask_rev_in[0] |
| Cell striVe_spi disconnected node: mask_rev[3] |
| Cell striVe_spi disconnected node: mask_rev[2] |
| Cell striVe_spi disconnected node: mask_rev[1] |
| Cell striVe_spi disconnected node: mask_rev[0] |
| Cell striVe_spi disconnected node: _423_/vpwr |
| Cell striVe_spi disconnected node: _423_/vgnd |
| |
| Cell striVe_spi disconnected node: CSB |
| Cell striVe_spi disconnected node: RST |
| Cell striVe_spi disconnected node: RSTB |
| Cell striVe_spi disconnected node: SCK |
| Cell striVe_spi disconnected node: SDI |
| Cell striVe_spi disconnected node: SDO |
| Cell striVe_spi disconnected node: irq |
| Cell striVe_spi disconnected node: mask_rev[3] |
| Cell striVe_spi disconnected node: mask_rev[2] |
| Cell striVe_spi disconnected node: mask_rev[1] |
| Cell striVe_spi disconnected node: mask_rev[0] |
| Cell striVe_spi disconnected node: mask_rev_in[3] |
| Cell striVe_spi disconnected node: mask_rev_in[2] |
| Cell striVe_spi disconnected node: mask_rev_in[1] |
| Cell striVe_spi disconnected node: mask_rev_in[0] |
| Cell striVe_spi disconnected node: mfgr_id[11] |
| Cell striVe_spi disconnected node: mfgr_id[10] |
| Cell striVe_spi disconnected node: mfgr_id[9] |
| Cell striVe_spi disconnected node: mfgr_id[8] |
| Cell striVe_spi disconnected node: mfgr_id[7] |
| Cell striVe_spi disconnected node: mfgr_id[6] |
| Cell striVe_spi disconnected node: mfgr_id[5] |
| Cell striVe_spi disconnected node: mfgr_id[4] |
| Cell striVe_spi disconnected node: mfgr_id[3] |
| Cell striVe_spi disconnected node: mfgr_id[2] |
| Cell striVe_spi disconnected node: mfgr_id[1] |
| Cell striVe_spi disconnected node: mfgr_id[0] |
| Cell striVe_spi disconnected node: pll_bypass |
| Cell striVe_spi disconnected node: pll_dco_ena |
| Cell striVe_spi disconnected node: pll_div[4] |
| Cell striVe_spi disconnected node: pll_div[3] |
| Cell striVe_spi disconnected node: pll_div[2] |
| Cell striVe_spi disconnected node: pll_div[1] |
| Cell striVe_spi disconnected node: pll_div[0] |
| Cell striVe_spi disconnected node: pll_sel[2] |
| Cell striVe_spi disconnected node: pll_sel[1] |
| Cell striVe_spi disconnected node: pll_sel[0] |
| Cell striVe_spi disconnected node: pll_trim[25] |
| Cell striVe_spi disconnected node: pll_trim[24] |
| Cell striVe_spi disconnected node: pll_trim[23] |
| Cell striVe_spi disconnected node: pll_trim[22] |
| Cell striVe_spi disconnected node: pll_trim[21] |
| Cell striVe_spi disconnected node: pll_trim[20] |
| Cell striVe_spi disconnected node: pll_trim[19] |
| Cell striVe_spi disconnected node: pll_trim[18] |
| Cell striVe_spi disconnected node: pll_trim[17] |
| Cell striVe_spi disconnected node: pll_trim[16] |
| Cell striVe_spi disconnected node: pll_trim[15] |
| Cell striVe_spi disconnected node: pll_trim[14] |
| Cell striVe_spi disconnected node: pll_trim[13] |
| Cell striVe_spi disconnected node: pll_trim[12] |
| Cell striVe_spi disconnected node: pll_trim[11] |
| Cell striVe_spi disconnected node: pll_trim[10] |
| Cell striVe_spi disconnected node: pll_trim[9] |
| Cell striVe_spi disconnected node: pll_trim[8] |
| Cell striVe_spi disconnected node: pll_trim[7] |
| Cell striVe_spi disconnected node: pll_trim[6] |
| Cell striVe_spi disconnected node: pll_trim[5] |
| Cell striVe_spi disconnected node: pll_trim[4] |
| Cell striVe_spi disconnected node: pll_trim[3] |
| Cell striVe_spi disconnected node: pll_trim[2] |
| Cell striVe_spi disconnected node: pll_trim[1] |
| Cell striVe_spi disconnected node: pll_trim[0] |
| Cell striVe_spi disconnected node: prod_id[7] |
| Cell striVe_spi disconnected node: prod_id[6] |
| Cell striVe_spi disconnected node: prod_id[5] |
| Cell striVe_spi disconnected node: prod_id[4] |
| Cell striVe_spi disconnected node: prod_id[3] |
| Cell striVe_spi disconnected node: prod_id[2] |
| Cell striVe_spi disconnected node: prod_id[1] |
| Cell striVe_spi disconnected node: prod_id[0] |
| Cell striVe_spi disconnected node: reg_ena |
| Cell striVe_spi disconnected node: reset |
| Cell striVe_spi disconnected node: sdo_enb |
| Cell striVe_spi disconnected node: trap |
| Cell striVe_spi disconnected node: xtal_ena |
| Equate pins: cell striVe_spi and/or striVe_spi has no elements. |
| |
| Cell s8iom0s8_top_xres4v2 disconnected node: amuxbus_a |
| Cell s8iom0s8_top_xres4v2 disconnected node: amuxbus_b |
| Cell s8iom0s8_top_xres4v2 disconnected node: disable_pullup_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: en_vddio_sig_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: enable_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: enable_vddio |
| Cell s8iom0s8_top_xres4v2 disconnected node: filt_in_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: inp_sel_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: pad |
| Cell s8iom0s8_top_xres4v2 disconnected node: pad_a_esd_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: pullup_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_hi_esd |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_lo_esd |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_weak_hi_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: vccd |
| Cell s8iom0s8_top_xres4v2 disconnected node: vcchib |
| Cell s8iom0s8_top_xres4v2 disconnected node: vdda |
| Cell s8iom0s8_top_xres4v2 disconnected node: vddio |
| Cell s8iom0s8_top_xres4v2 disconnected node: vddio_q |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssa |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssd |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssio |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssio_q |
| Cell s8iom0s8_top_xres4v2 disconnected node: vswitch |
| Cell s8iom0s8_top_xres4v2 disconnected node: xres_h_n |
| |
| Cell s8iom0s8_top_xres4v2 disconnected node: xres_h_n |
| Cell s8iom0s8_top_xres4v2 disconnected node: amuxbus_a |
| Cell s8iom0s8_top_xres4v2 disconnected node: amuxbus_b |
| Cell s8iom0s8_top_xres4v2 disconnected node: pad |
| Cell s8iom0s8_top_xres4v2 disconnected node: disable_pullup_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: enable_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: en_vddio_sig_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: inp_sel_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: filt_in_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: pullup_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: enable_vddio |
| Cell s8iom0s8_top_xres4v2 disconnected node: vccd |
| Cell s8iom0s8_top_xres4v2 disconnected node: vcchib |
| Cell s8iom0s8_top_xres4v2 disconnected node: vdda |
| Cell s8iom0s8_top_xres4v2 disconnected node: vddio |
| Cell s8iom0s8_top_xres4v2 disconnected node: vddio_q |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssa |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssd |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssio |
| Cell s8iom0s8_top_xres4v2 disconnected node: vssio_q |
| Cell s8iom0s8_top_xres4v2 disconnected node: vswitch |
| Cell s8iom0s8_top_xres4v2 disconnected node: pad_a_esd_h |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_hi_esd |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_lo_esd |
| Cell s8iom0s8_top_xres4v2 disconnected node: tie_weak_hi_h |
| Equate pins: cell s8iom0s8_top_xres4v2 and/or s8iom0s8_top_xres4v2 has no elements. |
| |
| Cell striVe disconnected node: vdd3v3hclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[0]/drn_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vddio |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vdda |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vccd |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vswitch |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vcchib |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssa |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssd |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssio |
| Cell striVe disconnected node: vdd3v3hclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[1]/drn_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vddio |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vdda |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vccd |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vswitch |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vcchib |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssa |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssd |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssio |
| Cell striVe disconnected node: vddiohclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vddiohclamp[0]/drn_hvc |
| Cell striVe disconnected node: vddiohclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vddiohclamp[0]/vddio |
| Cell striVe disconnected node: vddiohclamp[0]/vddio_q |
| Cell striVe disconnected node: vddiohclamp[0]/vdda |
| Cell striVe disconnected node: vddiohclamp[0]/vccd |
| Cell striVe disconnected node: vddiohclamp[0]/vswitch |
| Cell striVe disconnected node: vddiohclamp[0]/vcchib |
| Cell striVe disconnected node: vddiohclamp[0]/vssa |
| Cell striVe disconnected node: vddiohclamp[0]/vssd |
| Cell striVe disconnected node: vddiohclamp[0]/vssio_q |
| Cell striVe disconnected node: vddiohclamp[0]/vssio |
| Cell striVe disconnected node: vddiohclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vddiohclamp[1]/drn_hvc |
| Cell striVe disconnected node: vddiohclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vddiohclamp[1]/vddio |
| Cell striVe disconnected node: vddiohclamp[1]/vddio_q |
| Cell striVe disconnected node: vddiohclamp[1]/vdda |
| Cell striVe disconnected node: vddiohclamp[1]/vccd |
| Cell striVe disconnected node: vddiohclamp[1]/vswitch |
| Cell striVe disconnected node: vddiohclamp[1]/vcchib |
| Cell striVe disconnected node: vddiohclamp[1]/vssa |
| Cell striVe disconnected node: vddiohclamp[1]/vssd |
| Cell striVe disconnected node: vddiohclamp[1]/vssio_q |
| Cell striVe disconnected node: vddiohclamp[1]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[0]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[1]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[2]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[3]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssio |
| Cell striVe disconnected node: vdd1v8hclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[0]/drn_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vddio |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vdda |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vccd |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vswitch |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vcchib |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssa |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssd |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssio |
| Cell striVe disconnected node: vdd1v8hclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[1]/drn_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vddio |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vdda |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vccd |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vswitch |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vcchib |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssa |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssd |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssio |
| Cell striVe disconnected node: vdd1v8lclamp[0]/ogc_lvc |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vddio |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vdda |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vccd |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vswitch |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vcchib |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssa |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssd |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssio |
| Cell striVe disconnected node: vdd1v8lclamp[1]/ogc_lvc |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vddio |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vdda |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vccd |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vswitch |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vcchib |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssa |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssd |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssio |
| Cell striVe disconnected node: vsshclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[0]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[0]/vddio |
| Cell striVe disconnected node: vsshclamp[0]/vddio_q |
| Cell striVe disconnected node: vsshclamp[0]/vdda |
| Cell striVe disconnected node: vsshclamp[0]/vccd |
| Cell striVe disconnected node: vsshclamp[0]/vswitch |
| Cell striVe disconnected node: vsshclamp[0]/vcchib |
| Cell striVe disconnected node: vsshclamp[0]/vssa |
| Cell striVe disconnected node: vsshclamp[0]/vssd |
| Cell striVe disconnected node: vsshclamp[0]/vssio_q |
| Cell striVe disconnected node: vsshclamp[0]/vssio |
| Cell striVe disconnected node: vsshclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[1]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[1]/vddio |
| Cell striVe disconnected node: vsshclamp[1]/vddio_q |
| Cell striVe disconnected node: vsshclamp[1]/vdda |
| Cell striVe disconnected node: vsshclamp[1]/vccd |
| Cell striVe disconnected node: vsshclamp[1]/vswitch |
| Cell striVe disconnected node: vsshclamp[1]/vcchib |
| Cell striVe disconnected node: vsshclamp[1]/vssa |
| Cell striVe disconnected node: vsshclamp[1]/vssd |
| Cell striVe disconnected node: vsshclamp[1]/vssio_q |
| Cell striVe disconnected node: vsshclamp[1]/vssio |
| Cell striVe disconnected node: vsshclamp[2]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[2]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[2]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[2]/vddio |
| Cell striVe disconnected node: vsshclamp[2]/vddio_q |
| Cell striVe disconnected node: vsshclamp[2]/vdda |
| Cell striVe disconnected node: vsshclamp[2]/vccd |
| Cell striVe disconnected node: vsshclamp[2]/vswitch |
| Cell striVe disconnected node: vsshclamp[2]/vcchib |
| Cell striVe disconnected node: vsshclamp[2]/vssa |
| Cell striVe disconnected node: vsshclamp[2]/vssd |
| Cell striVe disconnected node: vsshclamp[2]/vssio_q |
| Cell striVe disconnected node: vsshclamp[2]/vssio |
| Cell striVe disconnected node: vsshclamp[3]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[3]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[3]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[3]/vddio |
| Cell striVe disconnected node: vsshclamp[3]/vddio_q |
| Cell striVe disconnected node: vsshclamp[3]/vdda |
| Cell striVe disconnected node: vsshclamp[3]/vccd |
| Cell striVe disconnected node: vsshclamp[3]/vswitch |
| Cell striVe disconnected node: vsshclamp[3]/vcchib |
| Cell striVe disconnected node: vsshclamp[3]/vssa |
| Cell striVe disconnected node: vsshclamp[3]/vssd |
| Cell striVe disconnected node: vsshclamp[3]/vssio_q |
| Cell striVe disconnected node: vsshclamp[3]/vssio |
| Cell striVe disconnected node: vssalclamp/ogc_lvc |
| Cell striVe disconnected node: vssalclamp/vddio |
| Cell striVe disconnected node: vssalclamp/vddio_q |
| Cell striVe disconnected node: vssalclamp/vdda |
| Cell striVe disconnected node: vssalclamp/vccd |
| Cell striVe disconnected node: vssalclamp/vswitch |
| Cell striVe disconnected node: vssalclamp/vcchib |
| Cell striVe disconnected node: vssalclamp/vssa |
| Cell striVe disconnected node: vssalclamp/vssd |
| Cell striVe disconnected node: vssalclamp/vssio_q |
| Cell striVe disconnected node: vssalclamp/vssio |
| Cell striVe disconnected node: vssdlclamp/ogc_lvc |
| Cell striVe disconnected node: vssdlclamp/vddio |
| Cell striVe disconnected node: vssdlclamp/vddio_q |
| Cell striVe disconnected node: vssdlclamp/vdda |
| Cell striVe disconnected node: vssdlclamp/vccd |
| Cell striVe disconnected node: vssdlclamp/vswitch |
| Cell striVe disconnected node: vssdlclamp/vcchib |
| Cell striVe disconnected node: vssdlclamp/vssa |
| Cell striVe disconnected node: vssdlclamp/vssd |
| Cell striVe disconnected node: vssdlclamp/vssio_q |
| Cell striVe disconnected node: vssdlclamp/vssio |
| Cell striVe disconnected node: vssiolclamp/ogc_lvc |
| Cell striVe disconnected node: vssiolclamp/vddio |
| Cell striVe disconnected node: vssiolclamp/vddio_q |
| Cell striVe disconnected node: vssiolclamp/vdda |
| Cell striVe disconnected node: vssiolclamp/vccd |
| Cell striVe disconnected node: vssiolclamp/vswitch |
| Cell striVe disconnected node: vssiolclamp/vcchib |
| Cell striVe disconnected node: vssiolclamp/vssa |
| Cell striVe disconnected node: vssiolclamp/vssd |
| Cell striVe disconnected node: vssiolclamp/vssio_q |
| Cell striVe disconnected node: vssiolclamp/vssio |
| |
| Subcircuit summary: |
| Circuit 1: striVe |Circuit 2: striVe |
| -------------------------------------------|------------------------------------------- |
| s8iom0s8_com_bus_slice_1um (4708) |(no matching element) |
| s8iom0_vddio_hvc_pad (2) |s8iom0_vddio_hvc_pad (2) |
| s8iom0_gpiov2_pad (36) |s8iom0_gpiov2_pad (36) |
| scs8hd_conb_1 (4) |scs8hd_conb_1 (4) |
| s8iom0_vssd_lvc_pad (1) |s8iom0_vssd_lvc_pad (1) |
| digital_pll (1) |digital_pll (1) |
| lvlshiftdown (1) |lvlshiftdown (1) |
| s8iom0s8_top_gpio_ovtv2 (2) |s8iom0s8_top_gpio_ovtv2 (2) |
| s8iom0_vccd_lvc_pad (2) |s8iom0_vccd_lvc_pad (2) |
| s8iom0_vccd_hvc_pad (2) |s8iom0_vccd_hvc_pad (2) |
| s8iom0_vdda_lvc_pad (4) |s8iom0_vdda_lvc_pad (4) |
| s8iom0_vssa_hvc_pad (4) |s8iom0_vssa_hvc_pad (4) |
| s8iom0_vdda_hvc_pad (2) |s8iom0_vdda_hvc_pad (2) |
| s8iom0_vssio_lvc_pad (1) |s8iom0_vssio_lvc_pad (1) |
| striVe_clkrst (1) |striVe_clkrst (1) |
| s8iom0_vssa_lvc_pad (1) |s8iom0_vssa_lvc_pad (1) |
| s8iom0_corner_pad (4) |s8iom0_corner_pad (4) |
| striVe_soc (1) |striVe_soc (1) |
| striVe_spi (1) |striVe_spi (1) |
| s8iom0s8_top_xres4v2 (1) |s8iom0s8_top_xres4v2 (1) |
| Number of devices: 4779 **Mismatch** |Number of devices: 71 **Mismatch** |
| Number of nets: 639 **Mismatch** |Number of nets: 609 **Mismatch** |
| --------------------------------------------------------------------------------------- |
| Flattening instances of s8iom0s8_com_bus_slice_1um in cell striVe makes a better match |
| Making another compare attempt. |
| |
| Cell striVe disconnected node: vdd3v3hclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[0]/drn_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vddio |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vdda |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vccd |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vswitch |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vcchib |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssa |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssd |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd3v3hclamp[0]/vssio |
| Cell striVe disconnected node: vdd3v3hclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[1]/drn_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vddio |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vdda |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vccd |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vswitch |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vcchib |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssa |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssd |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd3v3hclamp[1]/vssio |
| Cell striVe disconnected node: vddiohclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vddiohclamp[0]/drn_hvc |
| Cell striVe disconnected node: vddiohclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vddiohclamp[0]/vddio |
| Cell striVe disconnected node: vddiohclamp[0]/vddio_q |
| Cell striVe disconnected node: vddiohclamp[0]/vdda |
| Cell striVe disconnected node: vddiohclamp[0]/vccd |
| Cell striVe disconnected node: vddiohclamp[0]/vswitch |
| Cell striVe disconnected node: vddiohclamp[0]/vcchib |
| Cell striVe disconnected node: vddiohclamp[0]/vssa |
| Cell striVe disconnected node: vddiohclamp[0]/vssd |
| Cell striVe disconnected node: vddiohclamp[0]/vssio_q |
| Cell striVe disconnected node: vddiohclamp[0]/vssio |
| Cell striVe disconnected node: vddiohclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vddiohclamp[1]/drn_hvc |
| Cell striVe disconnected node: vddiohclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vddiohclamp[1]/vddio |
| Cell striVe disconnected node: vddiohclamp[1]/vddio_q |
| Cell striVe disconnected node: vddiohclamp[1]/vdda |
| Cell striVe disconnected node: vddiohclamp[1]/vccd |
| Cell striVe disconnected node: vddiohclamp[1]/vswitch |
| Cell striVe disconnected node: vddiohclamp[1]/vcchib |
| Cell striVe disconnected node: vddiohclamp[1]/vssa |
| Cell striVe disconnected node: vddiohclamp[1]/vssd |
| Cell striVe disconnected node: vddiohclamp[1]/vssio_q |
| Cell striVe disconnected node: vddiohclamp[1]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[0]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[0]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[1]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[1]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[2]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[2]/vssio |
| Cell striVe disconnected node: vdd3v3lclamp[3]/ogc_lvc |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vddio |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vddio_q |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vdda |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vccd |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vswitch |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vcchib |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssa |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssd |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssio_q |
| Cell striVe disconnected node: vdd3v3lclamp[3]/vssio |
| Cell striVe disconnected node: vdd1v8hclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[0]/drn_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vddio |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vdda |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vccd |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vswitch |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vcchib |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssa |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssd |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd1v8hclamp[0]/vssio |
| Cell striVe disconnected node: vdd1v8hclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[1]/drn_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vddio |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vdda |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vccd |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vswitch |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vcchib |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssa |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssd |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd1v8hclamp[1]/vssio |
| Cell striVe disconnected node: vdd1v8lclamp[0]/ogc_lvc |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vddio |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vddio_q |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vdda |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vccd |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vswitch |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vcchib |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssa |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssd |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssio_q |
| Cell striVe disconnected node: vdd1v8lclamp[0]/vssio |
| Cell striVe disconnected node: vdd1v8lclamp[1]/ogc_lvc |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vddio |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vddio_q |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vdda |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vccd |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vswitch |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vcchib |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssa |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssd |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssio_q |
| Cell striVe disconnected node: vdd1v8lclamp[1]/vssio |
| Cell striVe disconnected node: vsshclamp[0]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[0]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[0]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[0]/vddio |
| Cell striVe disconnected node: vsshclamp[0]/vddio_q |
| Cell striVe disconnected node: vsshclamp[0]/vdda |
| Cell striVe disconnected node: vsshclamp[0]/vccd |
| Cell striVe disconnected node: vsshclamp[0]/vswitch |
| Cell striVe disconnected node: vsshclamp[0]/vcchib |
| Cell striVe disconnected node: vsshclamp[0]/vssa |
| Cell striVe disconnected node: vsshclamp[0]/vssd |
| Cell striVe disconnected node: vsshclamp[0]/vssio_q |
| Cell striVe disconnected node: vsshclamp[0]/vssio |
| Cell striVe disconnected node: vsshclamp[1]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[1]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[1]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[1]/vddio |
| Cell striVe disconnected node: vsshclamp[1]/vddio_q |
| Cell striVe disconnected node: vsshclamp[1]/vdda |
| Cell striVe disconnected node: vsshclamp[1]/vccd |
| Cell striVe disconnected node: vsshclamp[1]/vswitch |
| Cell striVe disconnected node: vsshclamp[1]/vcchib |
| Cell striVe disconnected node: vsshclamp[1]/vssa |
| Cell striVe disconnected node: vsshclamp[1]/vssd |
| Cell striVe disconnected node: vsshclamp[1]/vssio_q |
| Cell striVe disconnected node: vsshclamp[1]/vssio |
| Cell striVe disconnected node: vsshclamp[2]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[2]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[2]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[2]/vddio |
| Cell striVe disconnected node: vsshclamp[2]/vddio_q |
| Cell striVe disconnected node: vsshclamp[2]/vdda |
| Cell striVe disconnected node: vsshclamp[2]/vccd |
| Cell striVe disconnected node: vsshclamp[2]/vswitch |
| Cell striVe disconnected node: vsshclamp[2]/vcchib |
| Cell striVe disconnected node: vsshclamp[2]/vssa |
| Cell striVe disconnected node: vsshclamp[2]/vssd |
| Cell striVe disconnected node: vsshclamp[2]/vssio_q |
| Cell striVe disconnected node: vsshclamp[2]/vssio |
| Cell striVe disconnected node: vsshclamp[3]/ogc_hvc |
| Cell striVe disconnected node: vsshclamp[3]/drn_hvc |
| Cell striVe disconnected node: vsshclamp[3]/src_bdy_hvc |
| Cell striVe disconnected node: vsshclamp[3]/vddio |
| Cell striVe disconnected node: vsshclamp[3]/vddio_q |
| Cell striVe disconnected node: vsshclamp[3]/vdda |
| Cell striVe disconnected node: vsshclamp[3]/vccd |
| Cell striVe disconnected node: vsshclamp[3]/vswitch |
| Cell striVe disconnected node: vsshclamp[3]/vcchib |
| Cell striVe disconnected node: vsshclamp[3]/vssa |
| Cell striVe disconnected node: vsshclamp[3]/vssd |
| Cell striVe disconnected node: vsshclamp[3]/vssio_q |
| Cell striVe disconnected node: vsshclamp[3]/vssio |
| Cell striVe disconnected node: vssalclamp/ogc_lvc |
| Cell striVe disconnected node: vssalclamp/vddio |
| Cell striVe disconnected node: vssalclamp/vddio_q |
| Cell striVe disconnected node: vssalclamp/vdda |
| Cell striVe disconnected node: vssalclamp/vccd |
| Cell striVe disconnected node: vssalclamp/vswitch |
| Cell striVe disconnected node: vssalclamp/vcchib |
| Cell striVe disconnected node: vssalclamp/vssa |
| Cell striVe disconnected node: vssalclamp/vssd |
| Cell striVe disconnected node: vssalclamp/vssio_q |
| Cell striVe disconnected node: vssalclamp/vssio |
| Cell striVe disconnected node: vssdlclamp/ogc_lvc |
| Cell striVe disconnected node: vssdlclamp/vddio |
| Cell striVe disconnected node: vssdlclamp/vddio_q |
| Cell striVe disconnected node: vssdlclamp/vdda |
| Cell striVe disconnected node: vssdlclamp/vccd |
| Cell striVe disconnected node: vssdlclamp/vswitch |
| Cell striVe disconnected node: vssdlclamp/vcchib |
| Cell striVe disconnected node: vssdlclamp/vssa |
| Cell striVe disconnected node: vssdlclamp/vssd |
| Cell striVe disconnected node: vssdlclamp/vssio_q |
| Cell striVe disconnected node: vssdlclamp/vssio |
| Cell striVe disconnected node: vssiolclamp/ogc_lvc |
| Cell striVe disconnected node: vssiolclamp/vddio |
| Cell striVe disconnected node: vssiolclamp/vddio_q |
| Cell striVe disconnected node: vssiolclamp/vdda |
| Cell striVe disconnected node: vssiolclamp/vccd |
| Cell striVe disconnected node: vssiolclamp/vswitch |
| Cell striVe disconnected node: vssiolclamp/vcchib |
| Cell striVe disconnected node: vssiolclamp/vssa |
| Cell striVe disconnected node: vssiolclamp/vssd |
| Cell striVe disconnected node: vssiolclamp/vssio_q |
| Cell striVe disconnected node: vssiolclamp/vssio |
| |
| Subcircuit summary: |
| Circuit 1: striVe |Circuit 2: striVe |
| -------------------------------------------|------------------------------------------- |
| s8iom0_vddio_hvc_pad (2) |s8iom0_vddio_hvc_pad (2) |
| s8iom0_gpiov2_pad (36) |s8iom0_gpiov2_pad (36) |
| scs8hd_conb_1 (4) |scs8hd_conb_1 (4) |
| s8iom0_vssd_lvc_pad (1) |s8iom0_vssd_lvc_pad (1) |
| digital_pll (1) |digital_pll (1) |
| lvlshiftdown (1) |lvlshiftdown (1) |
| s8iom0s8_top_gpio_ovtv2 (2) |s8iom0s8_top_gpio_ovtv2 (2) |
| s8iom0_vccd_lvc_pad (2) |s8iom0_vccd_lvc_pad (2) |
| s8iom0_vccd_hvc_pad (2) |s8iom0_vccd_hvc_pad (2) |
| s8iom0_vdda_lvc_pad (4) |s8iom0_vdda_lvc_pad (4) |
| s8iom0_vssa_hvc_pad (4) |s8iom0_vssa_hvc_pad (4) |
| s8iom0_vdda_hvc_pad (2) |s8iom0_vdda_hvc_pad (2) |
| s8iom0_vssio_lvc_pad (1) |s8iom0_vssio_lvc_pad (1) |
| striVe_clkrst (1) |striVe_clkrst (1) |
| s8iom0_vssa_lvc_pad (1) |s8iom0_vssa_lvc_pad (1) |
| s8iom0_corner_pad (4) |s8iom0_corner_pad (4) |
| striVe_soc (1) |striVe_soc (1) |
| striVe_spi (1) |striVe_spi (1) |
| s8iom0s8_top_xres4v2 (1) |s8iom0s8_top_xres4v2 (1) |
| Number of devices: 71 |Number of devices: 71 |
| Number of nets: 639 **Mismatch** |Number of nets: 609 **Mismatch** |
| --------------------------------------------------------------------------------------- |
| NET mismatches: Class fragments follow (with fanout counts): |
| Circuit 1: striVe |Circuit 2: striVe |
| |
| --------------------------------------------------------------------------------------- |
| Net: xi_pad/amuxbus_a |Net: analog_a |
| s8iom0_vddio_hvc_pad/amuxbus_a = 2 | s8iom0_vdda_hvc_pad/amuxbus_a = 2 |
| s8iom0_gpiov2_pad/amuxbus_a = 36 | s8iom0_vddio_hvc_pad/amuxbus_a = 2 |
| s8iom0_vssd_lvc_pad/amuxbus_a = 1 | s8iom0_vdda_lvc_pad/amuxbus_a = 4 |
| s8iom0s8_top_gpio_ovtv2/amuxbus_a = 2 | s8iom0_vccd_hvc_pad/amuxbus_a = 2 |
| s8iom0_vccd_lvc_pad/amuxbus_a = 2 | s8iom0_vccd_lvc_pad/amuxbus_a = 2 |
| s8iom0_vccd_hvc_pad/amuxbus_a = 2 | s8iom0_vssa_hvc_pad/amuxbus_a = 4 |
| s8iom0_vdda_lvc_pad/amuxbus_a = 4 | s8iom0_vssa_lvc_pad/amuxbus_a = 1 |
| s8iom0_vssa_hvc_pad/amuxbus_a = 4 | s8iom0_vssd_lvc_pad/amuxbus_a = 1 |
| s8iom0_vdda_hvc_pad/amuxbus_a = 2 | s8iom0_vssio_lvc_pad/amuxbus_a = 1 |
| s8iom0_vssio_lvc_pad/amuxbus_a = 1 | s8iom0_gpiov2_pad/amuxbus_a = 36 |
| s8iom0_vssa_lvc_pad/amuxbus_a = 1 | s8iom0s8_top_xres4v2/amuxbus_a = 1 |
| s8iom0_corner_pad/amuxbus_a = 4 | s8iom0s8_top_gpio_ovtv2/amuxbus_a = 2 |
| s8iom0s8_top_xres4v2/amuxbus_a = 1 | s8iom0_corner_pad/amuxbus_a = 4 |
| | |
| Net: xi_pad/amuxbus_b |Net: analog_b |
| s8iom0_vddio_hvc_pad/amuxbus_b = 2 | s8iom0_vdda_hvc_pad/amuxbus_b = 2 |
| s8iom0_gpiov2_pad/amuxbus_b = 36 | s8iom0_vddio_hvc_pad/amuxbus_b = 2 |
| s8iom0_vssd_lvc_pad/amuxbus_b = 1 | s8iom0_vdda_lvc_pad/amuxbus_b = 4 |
| s8iom0s8_top_gpio_ovtv2/amuxbus_b = 2 | s8iom0_vccd_hvc_pad/amuxbus_b = 2 |
| s8iom0_vccd_lvc_pad/amuxbus_b = 2 | s8iom0_vccd_lvc_pad/amuxbus_b = 2 |
| s8iom0_vccd_hvc_pad/amuxbus_b = 2 | s8iom0_vssa_hvc_pad/amuxbus_b = 4 |
| s8iom0_vdda_lvc_pad/amuxbus_b = 4 | s8iom0_vssa_lvc_pad/amuxbus_b = 1 |
| s8iom0_vssa_hvc_pad/amuxbus_b = 4 | s8iom0_vssd_lvc_pad/amuxbus_b = 1 |
| s8iom0_vdda_hvc_pad/amuxbus_b = 2 | s8iom0_vssio_lvc_pad/amuxbus_b = 1 |
| s8iom0_vssio_lvc_pad/amuxbus_b = 1 | s8iom0_gpiov2_pad/amuxbus_b = 36 |
| s8iom0_vssa_lvc_pad/amuxbus_b = 1 | s8iom0s8_top_xres4v2/amuxbus_b = 1 |
| s8iom0_corner_pad/amuxbus_b = 4 | s8iom0s8_top_gpio_ovtv2/amuxbus_b = 2 |
| s8iom0s8_top_xres4v2/amuxbus_b = 1 | s8iom0_corner_pad/amuxbus_b = 4 |
| | |
| Net: xi_pad/vddio_q |Net: _noconnect_6_[0] |
| s8iom0_vddio_hvc_pad/vddio_q = 2 | s8iom0_vdda_lvc_pad/drn_lvc1 = 1 |
| s8iom0_gpiov2_pad/vddio_q = 36 | |
| s8iom0_vssd_lvc_pad/vddio_q = 1 | |
| s8iom0s8_top_gpio_ovtv2/vddio_q = 2 | |
| s8iom0_vccd_lvc_pad/vddio_q = 2 | |
| s8iom0_vccd_hvc_pad/vddio_q = 2 | |
| s8iom0_vdda_lvc_pad/vddio_q = 4 | |
| s8iom0_vssa_hvc_pad/vddio_q = 4 | |
| s8iom0_vdda_hvc_pad/vddio_q = 2 | |
| s8iom0_vssio_lvc_pad/vddio_q = 1 | |
| s8iom0_vssa_lvc_pad/vddio_q = 1 | |
| s8iom0_corner_pad/vddio_q = 4 | |
| s8iom0s8_top_xres4v2/vddio_q = 1 | |
| | |
| Net: xi_pad/vssio_q |Net: _noconnect_6_[1] |
| s8iom0_vddio_hvc_pad/vssio_q = 2 | s8iom0_vdda_lvc_pad/drn_lvc1 = 1 |
| s8iom0_gpiov2_pad/vssio_q = 36 | |
| s8iom0_vssd_lvc_pad/vssio_q = 1 | |
| s8iom0s8_top_gpio_ovtv2/vssio_q = 2 | |
| s8iom0_vccd_lvc_pad/vssio_q = 2 | |
| s8iom0_vccd_hvc_pad/vssio_q = 2 | |
| s8iom0_vdda_lvc_pad/vssio_q = 4 | |
| s8iom0_vssa_hvc_pad/vssio_q = 4 | |
| s8iom0_vdda_hvc_pad/vssio_q = 2 | |
| s8iom0_vssio_lvc_pad/vssio_q = 1 | |
| s8iom0_vssa_lvc_pad/vssio_q = 1 | |
| s8iom0_corner_pad/vssio_q = 4 | |
| s8iom0s8_top_xres4v2/vssio_q = 1 | |
| | |
| Net: vss |Net: _noconnect_6_[2] |
| s8iom0_vddio_hvc_pad/vssa = 2 | s8iom0_vdda_lvc_pad/drn_lvc1 = 1 |
| s8iom0_vddio_hvc_pad/vssio = 2 | |
| s8iom0_vddio_hvc_pad/vssd = 2 | |
| s8iom0_gpiov2_pad/ib_mode_sel = 36 | |
| s8iom0_gpiov2_pad/slow = 36 | |
| s8iom0_gpiov2_pad/vtrip_sel = 36 | |
| s8iom0_gpiov2_pad/hld_ovr = 36 | |
| s8iom0_gpiov2_pad/analog_en = 30 | |
| s8iom0_gpiov2_pad/analog_sel = 34 | |
| s8iom0_gpiov2_pad/enable_vswitch_h = 36 | |
| s8iom0_gpiov2_pad/analog_pol = 35 | |
| s8iom0_gpiov2_pad/vssa = 36 | |
| s8iom0_gpiov2_pad/vssio = 36 | |
| s8iom0_gpiov2_pad/vssd = 36 | |
| scs8hd_conb_1/vgnd = 4 | |
| s8iom0_vssd_lvc_pad/vssa = 1 | |
| s8iom0_vssd_lvc_pad/vssio = 1 | |
| s8iom0_vssd_lvc_pad/vssd = 1 | |
| s8iom0_gpiov2_pad/dm<2> = 12 | |
| s8iom0_gpiov2_pad/dm<1> = 12 | |
| s8iom0_gpiov2_pad/dm<0> = 10 | |
| s8iom0_gpiov2_pad/out = 11 | |
| digital_pll/irb/vgnd = 1 | |
| lvlshiftdown/vnb = 1 | |
| lvlshiftdown/vgnd = 1 | |
| s8iom0s8_top_gpio_ovtv2/analog_en = 2 | |
| s8iom0s8_top_gpio_ovtv2/analog_pol = 2 | |
| s8iom0s8_top_gpio_ovtv2/analog_sel = 2 | |
| s8iom0s8_top_gpio_ovtv2/dm<2> = 1 | |
| s8iom0s8_top_gpio_ovtv2/dm<1> = 1 | |
| s8iom0s8_top_gpio_ovtv2/enable_vswitch_h | |
| s8iom0s8_top_gpio_ovtv2/hld_ovr = 2 | |
| s8iom0s8_top_gpio_ovtv2/ib_mode_sel<1> = | |
| s8iom0s8_top_gpio_ovtv2/ib_mode_sel<0> = | |
| s8iom0s8_top_gpio_ovtv2/out = 1 | |
| s8iom0s8_top_gpio_ovtv2/slew_ctl<1> = 2 | |
| s8iom0s8_top_gpio_ovtv2/slew_ctl<0> = 2 | |
| s8iom0s8_top_gpio_ovtv2/slow = 2 | |
| s8iom0s8_top_gpio_ovtv2/vssa = 2 | |
| s8iom0s8_top_gpio_ovtv2/vssd = 2 | |
| s8iom0s8_top_gpio_ovtv2/vssio = 2 | |
| s8iom0s8_top_gpio_ovtv2/vtrip_sel = 2 | |
| s8iom0_vccd_lvc_pad/vssa = 2 | |
| s8iom0_vccd_lvc_pad/vssio = 2 | |
| s8iom0_vccd_lvc_pad/vssd = 2 | |
| s8iom0_vccd_hvc_pad/vssa = 2 | |
| s8iom0_vccd_hvc_pad/vssio = 2 | |
| s8iom0_vccd_hvc_pad/vssd = 2 | |
| s8iom0_gpiov2_pad/oe_n = 3 | |
| s8iom0_vdda_lvc_pad/vssa = 4 | |
| s8iom0_vdda_lvc_pad/vssio = 4 | |
| s8iom0_vdda_lvc_pad/vssd = 4 | |
| s8iom0_vssa_hvc_pad/vssa = 4 | |
| s8iom0_vssa_hvc_pad/vssio = 4 | |
| s8iom0_vssa_hvc_pad/vssd = 4 | |
| s8iom0s8_top_gpio_ovtv2/dm<0> = 1 | |
| s8iom0s8_top_gpio_ovtv2/oe_n = 1 | |
| s8iom0_vdda_hvc_pad/vssa = 2 | |
| s8iom0_vdda_hvc_pad/vssio = 2 | |
| s8iom0_vdda_hvc_pad/vssd = 2 | |
| s8iom0_vssio_lvc_pad/vssa = 1 | |
| s8iom0_vssio_lvc_pad/vssio = 1 | |
| s8iom0_vssio_lvc_pad/vssd = 1 | |
| striVe_clkrst/_06_/vgnd = 1 | |
| s8iom0_vssa_lvc_pad/vssa = 1 | |
| s8iom0_vssa_lvc_pad/vssio = 1 | |
| s8iom0_vssa_lvc_pad/vssd = 1 | |
| s8iom0_corner_pad/vssa = 4 | |
| s8iom0_corner_pad/vssio = 4 | |
| s8iom0_corner_pad/vssd = 4 | |
| striVe_soc/PHY_9/vgnd = 1 | |
| striVe_spi/_423_/vgnd = 1 | |
| s8iom0s8_top_xres4v2/disable_pullup_h = | |
| s8iom0s8_top_xres4v2/en_vddio_sig_h = 1 | |
| s8iom0s8_top_xres4v2/filt_in_h = 1 | |
| s8iom0s8_top_xres4v2/inp_sel_h = 1 | |
| s8iom0s8_top_xres4v2/pullup_h = 1 | |
| s8iom0s8_top_xres4v2/vssa = 1 | |
| s8iom0s8_top_xres4v2/vssd = 1 | |
| s8iom0s8_top_xres4v2/vssio = 1 | |
| | |
| Net: vdd |Net: _noconnect_6_[3] |
| s8iom0_vddio_hvc_pad/vdda = 2 | s8iom0_vdda_lvc_pad/drn_lvc1 = 1 |
| s8iom0_vddio_hvc_pad/vswitch = 2 | |
| s8iom0_vddio_hvc_pad/vddio = 2 | |
| s8iom0_gpiov2_pad/hld_h_n = 36 | |
| s8iom0_gpiov2_pad/vdda = 36 | |
| s8iom0_gpiov2_pad/vswitch = 36 | |
| s8iom0_gpiov2_pad/vddio = 36 | |
| s8iom0_vssd_lvc_pad/vdda = 1 | |
| s8iom0_vssd_lvc_pad/vswitch = 1 | |
| s8iom0_vssd_lvc_pad/vddio = 1 | |
| s8iom0s8_top_gpio_ovtv2/hld_h_n = 2 | |
| s8iom0s8_top_gpio_ovtv2/vdda = 2 | |
| s8iom0s8_top_gpio_ovtv2/vddio = 2 | |
| s8iom0s8_top_gpio_ovtv2/vswitch = 2 | |
| s8iom0_vccd_lvc_pad/vdda = 2 | |
| s8iom0_vccd_lvc_pad/vswitch = 2 | |
| s8iom0_vccd_lvc_pad/vddio = 2 | |
| s8iom0_vccd_hvc_pad/vdda = 2 | |
| s8iom0_vccd_hvc_pad/vswitch = 2 | |
| s8iom0_vccd_hvc_pad/vddio = 2 | |
| s8iom0_vdda_lvc_pad/vdda = 4 | |
| s8iom0_vdda_lvc_pad/vswitch = 4 | |
| s8iom0_vdda_lvc_pad/vddio = 4 | |
| s8iom0_vssa_hvc_pad/vdda = 4 | |
| s8iom0_vssa_hvc_pad/vswitch = 4 | |
| s8iom0_vssa_hvc_pad/vddio = 4 | |
| s8iom0_vdda_hvc_pad/vdda = 2 | |
| s8iom0_vdda_hvc_pad/vswitch = 2 | |
| s8iom0_vdda_hvc_pad/vddio = 2 | |
| s8iom0_vssio_lvc_pad/vdda = 1 | |
| s8iom0_vssio_lvc_pad/vswitch = 1 | |
| s8iom0_vssio_lvc_pad/vddio = 1 | |
| s8iom0_vssa_lvc_pad/vdda = 1 | |
| s8iom0_vssa_lvc_pad/vswitch = 1 | |
| s8iom0_vssa_lvc_pad/vddio = 1 | |
| s8iom0_corner_pad/vdda = 4 | |
| s8iom0_corner_pad/vswitch = 4 | |
| s8iom0_corner_pad/vddio = 4 | |
| s8iom0s8_top_xres4v2/enable_h = 1 | |
| s8iom0s8_top_xres4v2/vdda = 1 | |
| s8iom0s8_top_xres4v2/vddio = 1 | |
| s8iom0s8_top_xres4v2/vswitch = 1 | |
| | |
| Net: vdd1v8 |Net: _noconnect_7_[0] |
| s8iom0_vddio_hvc_pad/vcchib = 2 | s8iom0_vdda_lvc_pad/drn_lvc2 = 1 |
| s8iom0_vddio_hvc_pad/vccd = 2 | |
| s8iom0_gpiov2_pad/enable_vddio = 36 | |
| s8iom0_gpiov2_pad/vcchib = 36 | |
| s8iom0_gpiov2_pad/vccd = 36 | |
| scs8hd_conb_1/vpwr = 4 | |
| s8iom0_vssd_lvc_pad/vcchib = 1 | |
| s8iom0_vssd_lvc_pad/vccd = 1 | |
| s8iom0_gpiov2_pad/inp_dis = 10 | |
| s8iom0_gpiov2_pad/oe_n = 12 | |
| s8iom0_gpiov2_pad/analog_en = 6 | |
| s8iom0_gpiov2_pad/analog_sel = 2 | |
| digital_pll/irb/vpwr = 1 | |
| s8iom0_gpiov2_pad/dm<0> = 6 | |
| lvlshiftdown/vpwr = 1 | |
| lvlshiftdown/vpb = 1 | |
| s8iom0s8_top_gpio_ovtv2/dm<0> = 1 | |
| s8iom0s8_top_gpio_ovtv2/enable_vddio = 2 | |
| s8iom0s8_top_gpio_ovtv2/hys_trim = 2 | |
| s8iom0s8_top_gpio_ovtv2/oe_n = 1 | |
| s8iom0s8_top_gpio_ovtv2/vccd = 2 | |
| s8iom0s8_top_gpio_ovtv2/vcchib = 2 | |
| s8iom0s8_top_gpio_ovtv2/vinref = 2 | |
| s8iom0_vccd_lvc_pad/vcchib = 2 | |
| s8iom0_vccd_lvc_pad/vccd = 2 | |
| s8iom0_vccd_hvc_pad/vcchib = 2 | |
| s8iom0_vccd_hvc_pad/vccd = 2 | |
| s8iom0_gpiov2_pad/dm<2> = 4 | |
| s8iom0_gpiov2_pad/dm<1> = 4 | |
| s8iom0_gpiov2_pad/in = 1 | |
| s8iom0_vdda_lvc_pad/vcchib = 4 | |
| s8iom0_vdda_lvc_pad/vccd = 4 | |
| s8iom0_vssa_hvc_pad/vcchib = 4 | |
| s8iom0_vssa_hvc_pad/vccd = 4 | |
| s8iom0_gpiov2_pad/analog_pol = 1 | |
| s8iom0s8_top_gpio_ovtv2/dm<2> = 1 | |
| s8iom0s8_top_gpio_ovtv2/dm<1> = 1 | |
| s8iom0s8_top_gpio_ovtv2/inp_dis = 1 | |
| s8iom0_vdda_hvc_pad/vcchib = 2 | |
| s8iom0_vdda_hvc_pad/vccd = 2 | |
| s8iom0_vssio_lvc_pad/vcchib = 1 | |
| s8iom0_vssio_lvc_pad/vccd = 1 | |
| striVe_clkrst/_07_/vpwr = 1 | |
| s8iom0_vssa_lvc_pad/vcchib = 1 | |
| s8iom0_vssa_lvc_pad/vccd = 1 | |
| s8iom0_corner_pad/vcchib = 4 | |
| s8iom0_corner_pad/vccd = 4 | |
| striVe_soc/PHY_9/vpwr = 1 | |
| striVe_spi/_423_/vpwr = 1 | |
| s8iom0s8_top_xres4v2/enable_vddio = 1 | |
| s8iom0s8_top_xres4v2/vccd = 1 | |
| s8iom0s8_top_xres4v2/vcchib = 1 | |
| | |
| Net: flash_io3_pad/in_h |Net: _noconnect_7_[1] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_vdda_lvc_pad/drn_lvc2 = 1 |
| | |
| Net: flash_io2_pad/in_h |Net: _noconnect_7_[2] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_vdda_lvc_pad/drn_lvc2 = 1 |
| | |
| Net: flash_io1_pad/in_h |Net: _noconnect_7_[3] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_vdda_lvc_pad/drn_lvc2 = 1 |
| | |
| Net: flash_io0_pad/in_h |Net: _noconnect_8_[0] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| Net: flash_io3_pad/pad_a_noesd_h |Net: _noconnect_8_[1] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| Net: flash_io2_pad/pad_a_noesd_h |Net: _noconnect_8_[2] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| Net: flash_io1_pad/pad_a_noesd_h |Net: _noconnect_8_[3] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| Net: flash_io0_pad/pad_a_noesd_h |Net: _noconnect_9_[0] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| Net: flash_io3_pad/pad_a_esd_0_h |Net: _noconnect_9_[1] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| Net: flash_io2_pad/pad_a_esd_0_h |Net: _noconnect_9_[2] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| Net: flash_io1_pad/pad_a_esd_0_h |Net: _noconnect_9_[3] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| Net: flash_io0_pad/pad_a_esd_0_h |Net: _noconnect_5_[0] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_vdda_lvc_pad/bdy2_b2b = 1 |
| | |
| Net: flash_io3_pad/pad_a_esd_1_h |Net: _noconnect_5_[1] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_vdda_lvc_pad/bdy2_b2b = 1 |
| | |
| Net: flash_io2_pad/pad_a_esd_1_h |Net: _noconnect_5_[2] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_vdda_lvc_pad/bdy2_b2b = 1 |
| | |
| Net: flash_io1_pad/pad_a_esd_1_h |Net: _noconnect_5_[3] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_vdda_lvc_pad/bdy2_b2b = 1 |
| | |
| Net: flash_io0_pad/pad_a_esd_1_h |Net: _noconnect_20_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_vssa_lvc_pad/drn_lvc1 = 1 |
| | |
| Net: flash_io3 |Net: _noconnect_21_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_vssa_lvc_pad/drn_lvc2 = 1 |
| | |
| Net: flash_io2 |Net: _noconnect_22_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_vssa_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| Net: flash_io1 |Net: _noconnect_23_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_vssa_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| Net: flash_io0 |Net: _noconnect_19_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_vssa_lvc_pad/bdy2_b2b = 1 |
| | |
| Net: flash_io3_pad/tie_hi_esd |Net: _noconnect_25_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_vssd_lvc_pad/drn_lvc1 = 1 |
| | |
| Net: flash_io2_pad/tie_hi_esd |Net: _noconnect_26_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_vssd_lvc_pad/drn_lvc2 = 1 |
| | |
| Net: flash_io1_pad/tie_hi_esd |Net: _noconnect_27_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_vssd_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| Net: flash_io0_pad/tie_hi_esd |Net: _noconnect_28_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_vssd_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| Net: mask_rev_value[0]/HI |Net: _noconnect_24_ |
| scs8hd_conb_1/HI = 1 | s8iom0_vssd_lvc_pad/bdy2_b2b = 1 |
| | |
| Net: mask_rev_value[3]/HI |Net: _noconnect_30_ |
| scs8hd_conb_1/HI = 1 | s8iom0_vssio_lvc_pad/drn_lvc1 = 1 |
| | |
| Net: mask_rev_value[2]/HI |Net: _noconnect_31_ |
| scs8hd_conb_1/HI = 1 | s8iom0_vssio_lvc_pad/drn_lvc2 = 1 |
| | |
| Net: mask_rev_value[1]/HI |Net: _noconnect_32_ |
| scs8hd_conb_1/HI = 1 | s8iom0_vssio_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| Net: s8iom0_vssd_lvc_pad_0/drn_lvc1 |Net: _noconnect_33_ |
| s8iom0_vssd_lvc_pad/drn_lvc1 = 1 | s8iom0_vssio_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| Net: s8iom0_vssd_lvc_pad_0/drn_lvc2 |Net: _noconnect_29_ |
| s8iom0_vssd_lvc_pad/drn_lvc2 = 1 | s8iom0_vssio_lvc_pad/bdy2_b2b = 1 |
| | |
| Net: s8iom0_vssd_lvc_pad_0/src_bdy_lvc1 |Net: gpio[0] |
| s8iom0_vssd_lvc_pad/src_bdy_lvc1 = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: s8iom0_vssd_lvc_pad_0/src_bdy_lvc2 |Net: gpio[1] |
| s8iom0_vssd_lvc_pad/src_bdy_lvc2 = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: s8iom0_vssd_lvc_pad_0/bdy2_b2b |Net: gpio[2] |
| s8iom0_vssd_lvc_pad/bdy2_b2b = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: s8iom0_vssd_lvc_pad_0/vssi |Net: gpio[3] |
| s8iom0_vssd_lvc_pad/vssi = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: comp_inp_pad/in_h |Net: gpio[4] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: adc_high_pad/in_h |Net: gpio[5] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: flash_csb_pad/in_h |Net: gpio[6] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: adc0_in_pad/in_h |Net: gpio[7] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: comp_inn_pad/in_h |Net: gpio[8] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: adc1_in_pad/in_h |Net: gpio[9] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: adc_low_pad/in_h |Net: gpio[10] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: flash_clk_pad/in_h |Net: gpio[11] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: comp_inp_pad/pad_a_noesd_h |Net: gpio[12] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: adc_high_pad/pad_a_noesd_h |Net: gpio[13] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: flash_csb_pad/pad_a_noesd_h |Net: gpio[14] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: adc0_in_pad/pad_a_noesd_h |Net: gpio[15] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: comp_inn_pad/pad_a_noesd_h |Net: _noconnect_34_[0] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc1_in_pad/pad_a_noesd_h |Net: _noconnect_34_[1] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc_low_pad/pad_a_noesd_h |Net: _noconnect_34_[2] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: flash_clk_pad/pad_a_noesd_h |Net: _noconnect_34_[3] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: comp_inp_pad/pad_a_esd_0_h |Net: _noconnect_34_[4] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc_high_pad/pad_a_esd_0_h |Net: _noconnect_34_[5] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: flash_csb_pad/pad_a_esd_0_h |Net: _noconnect_34_[6] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc0_in_pad/pad_a_esd_0_h |Net: _noconnect_34_[7] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: comp_inn_pad/pad_a_esd_0_h |Net: _noconnect_34_[8] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc1_in_pad/pad_a_esd_0_h |Net: _noconnect_34_[9] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc_low_pad/pad_a_esd_0_h |Net: _noconnect_34_[10] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: flash_clk_pad/pad_a_esd_0_h |Net: _noconnect_34_[11] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: comp_inp_pad/pad_a_esd_1_h |Net: _noconnect_34_[12] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc_high_pad/pad_a_esd_1_h |Net: _noconnect_34_[13] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: flash_csb_pad/pad_a_esd_1_h |Net: _noconnect_34_[14] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: adc0_in_pad/pad_a_esd_1_h |Net: _noconnect_34_[15] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: comp_inn_pad/pad_a_esd_1_h |Net: _noconnect_35_[0] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc1_in_pad/pad_a_esd_1_h |Net: _noconnect_35_[1] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc_low_pad/pad_a_esd_1_h |Net: _noconnect_35_[2] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: flash_clk_pad/pad_a_esd_1_h |Net: _noconnect_35_[3] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: comp_inp |Net: _noconnect_35_[4] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc_high |Net: _noconnect_35_[5] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: flash_csb |Net: _noconnect_35_[6] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc0_in |Net: _noconnect_35_[7] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: comp_inn |Net: _noconnect_35_[8] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc1_in |Net: _noconnect_35_[9] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc_low |Net: _noconnect_35_[10] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: flash_clk |Net: _noconnect_35_[11] |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: comp_inp_pad/in |Net: _noconnect_35_[12] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc_high_pad/in |Net: _noconnect_35_[13] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: flash_csb_pad/in |Net: _noconnect_35_[14] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: adc0_in_pad/in |Net: _noconnect_35_[15] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: comp_inn_pad/in |Net: _noconnect_36_[0] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc1_in_pad/in |Net: _noconnect_36_[1] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc_low_pad/in |Net: _noconnect_36_[2] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: flash_clk_pad/in |Net: _noconnect_36_[3] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: SDO_pad/in |Net: _noconnect_36_[4] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: comp_inp_pad/enable_inp_h |Net: _noconnect_36_[5] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc_high_pad/enable_inp_h |Net: _noconnect_36_[6] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: flash_csb_pad/enable_inp_h |Net: _noconnect_36_[7] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc0_in_pad/enable_inp_h |Net: _noconnect_36_[8] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: comp_inn_pad/enable_inp_h |Net: _noconnect_36_[9] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc1_in_pad/enable_inp_h |Net: _noconnect_36_[10] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc_low_pad/enable_inp_h |Net: _noconnect_36_[11] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: flash_clk_pad/enable_inp_h |Net: _noconnect_36_[12] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: comp_inp_pad/tie_hi_esd |Net: _noconnect_36_[13] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc_high_pad/tie_hi_esd |Net: _noconnect_36_[14] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: flash_csb_pad/tie_hi_esd |Net: _noconnect_36_[15] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: adc0_in_pad/tie_hi_esd |Net: _noconnect_37_[0] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: comp_inn_pad/tie_hi_esd |Net: _noconnect_37_[1] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: adc1_in_pad/tie_hi_esd |Net: _noconnect_37_[2] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: adc_low_pad/tie_hi_esd |Net: _noconnect_37_[3] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: flash_clk_pad/tie_hi_esd |Net: _noconnect_37_[4] |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: comp_inp_pad/tie_lo_esd |Net: _noconnect_37_[5] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: adc_high_pad/tie_lo_esd |Net: _noconnect_37_[6] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: flash_csb_pad/tie_lo_esd |Net: _noconnect_37_[7] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: adc0_in_pad/tie_lo_esd |Net: _noconnect_37_[8] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: comp_inn_pad/tie_lo_esd |Net: _noconnect_37_[9] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: adc1_in_pad/tie_lo_esd |Net: _noconnect_37_[10] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: adc_low_pad/tie_lo_esd |Net: _noconnect_37_[11] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: flash_clk_pad/tie_lo_esd |Net: _noconnect_37_[12] |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: pll/clockp[1] |Net: _noconnect_37_[13] |
| digital_pll/clockp[1] = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: pll/clockp[0] |Net: _noconnect_37_[14] |
| digital_pll/clockp[0] = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: pll/clockd[3] |Net: _noconnect_37_[15] |
| digital_pll/clockd[3] = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: pll/clockd[2] |Net: _noconnect_38_[0] |
| digital_pll/clockd[2] = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: pll/clockd[1] |Net: _noconnect_38_[1] |
| digital_pll/clockd[1] = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: SDI_pad/in_h |Net: _noconnect_38_[2] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: CSB_pad/in_h |Net: _noconnect_38_[3] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: xi_pad/in_h |Net: _noconnect_38_[4] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: irq_pad/in_h |Net: _noconnect_38_[5] |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: SDI_pad/pad_a_noesd_h |Net: _noconnect_38_[6] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: CSB_pad/pad_a_noesd_h |Net: _noconnect_38_[7] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: xi_pad/pad_a_noesd_h |Net: _noconnect_38_[8] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: irq_pad/pad_a_noesd_h |Net: _noconnect_38_[9] |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: SDI_pad/pad_a_esd_0_h |Net: _noconnect_38_[10] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: CSB_pad/pad_a_esd_0_h |Net: _noconnect_38_[11] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: xi_pad/pad_a_esd_0_h |Net: _noconnect_38_[12] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: irq_pad/pad_a_esd_0_h |Net: _noconnect_38_[13] |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: SDI_pad/pad_a_esd_1_h |Net: _noconnect_38_[14] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: CSB_pad/pad_a_esd_1_h |Net: _noconnect_38_[15] |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: xi_pad/pad_a_esd_1_h |Net: _noconnect_39_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/out = 1 |
| | |
| Net: irq_pad/pad_a_esd_1_h |Net: xi |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: SDI |Net: irq |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: CSB |Net: SDI |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: xi |Net: CSB |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: irq |Net: _noconnect_40_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: SDI_pad/enable_inp_h |Net: _noconnect_95_ |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: SDI_pad/tie_hi_esd |Net: _noconnect_106_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: CSB_pad/tie_hi_esd |Net: _noconnect_111_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: xi_pad/tie_hi_esd |Net: _noconnect_41_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: irq_pad/tie_hi_esd |Net: _noconnect_96_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: SDI_pad/tie_lo_esd |Net: _noconnect_107_ |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: ser_rx_pad/enable_inp_h |Net: _noconnect_112_ |
| s8iom0s8_top_gpio_ovtv2/enable_inp_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: ser_rx_pad/in_h |Net: _noconnect_42_ |
| s8iom0s8_top_gpio_ovtv2/in_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: ser_rx |Net: _noconnect_97_ |
| s8iom0s8_top_gpio_ovtv2/pad = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: ser_rx_pad/pad_a_esd_0_h |Net: _noconnect_108_ |
| s8iom0s8_top_gpio_ovtv2/pad_a_esd_0_h = | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: ser_rx_pad/pad_a_esd_1_h |Net: _noconnect_113_ |
| s8iom0s8_top_gpio_ovtv2/pad_a_esd_1_h = | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: ser_rx_pad/pad_a_noesd_h |Net: _noconnect_43_ |
| s8iom0s8_top_gpio_ovtv2/pad_a_noesd_h = | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: ser_rx_pad/tie_hi_esd |Net: _noconnect_98_ |
| s8iom0s8_top_gpio_ovtv2/tie_hi_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: ser_rx_pad/tie_lo_esd |Net: SDI_core_h |
| s8iom0s8_top_gpio_ovtv2/tie_lo_esd = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[9]/in_h |Net: CSB_core_h |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[8]/in_h |Net: _noconnect_44_ |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[7]/in_h |Net: _noconnect_99_ |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[6]/in_h |Net: _noconnect_109_ |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[5]/in_h |Net: _noconnect_114_ |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[4]/in_h |Net: adc0_in |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[15]/in_h |Net: adc1_in |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[3]/in_h |Net: adc_high |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[14]/in_h |Net: adc_low |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[2]/in_h |Net: comp_inn |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[13]/in_h |Net: comp_inp |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[1]/in_h |Net: flash_csb |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[12]/in_h |Net: flash_clk |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[0]/in_h |Net: _noconnect_51_ |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[11]/in_h |Net: _noconnect_58_ |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[10]/in_h |Net: _noconnect_65_ |
| s8iom0_gpiov2_pad/in_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[9]/pad_a_noesd_h |Net: _noconnect_72_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[8]/pad_a_noesd_h |Net: _noconnect_79_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[7]/pad_a_noesd_h |Net: _noconnect_86_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[6]/pad_a_noesd_h |Net: _noconnect_124_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[5]/pad_a_noesd_h |Net: _noconnect_131_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[4]/pad_a_noesd_h |Net: _noconnect_52_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[15]/pad_a_noesd_h |Net: _noconnect_59_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[3]/pad_a_noesd_h |Net: _noconnect_66_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[14]/pad_a_noesd_h |Net: _noconnect_73_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[2]/pad_a_noesd_h |Net: _noconnect_80_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[13]/pad_a_noesd_h |Net: _noconnect_87_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[1]/pad_a_noesd_h |Net: _noconnect_125_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[12]/pad_a_noesd_h |Net: _noconnect_132_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[0]/pad_a_noesd_h |Net: _noconnect_53_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[11]/pad_a_noesd_h |Net: _noconnect_60_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[10]/pad_a_noesd_h |Net: _noconnect_67_ |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[9]/pad_a_esd_0_h |Net: _noconnect_74_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[8]/pad_a_esd_0_h |Net: _noconnect_81_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[7]/pad_a_esd_0_h |Net: _noconnect_88_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[6]/pad_a_esd_0_h |Net: _noconnect_126_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[5]/pad_a_esd_0_h |Net: _noconnect_133_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[4]/pad_a_esd_0_h |Net: _noconnect_54_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[15]/pad_a_esd_0_h |Net: _noconnect_61_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[3]/pad_a_esd_0_h |Net: _noconnect_68_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[14]/pad_a_esd_0_h |Net: _noconnect_75_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[2]/pad_a_esd_0_h |Net: _noconnect_82_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[13]/pad_a_esd_0_h |Net: _noconnect_89_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[1]/pad_a_esd_0_h |Net: _noconnect_127_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[12]/pad_a_esd_0_h |Net: _noconnect_134_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| | |
| Net: gpio_pad[0]/pad_a_esd_0_h |Net: _noconnect_55_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[11]/pad_a_esd_0_h |Net: _noconnect_62_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[10]/pad_a_esd_0_h |Net: _noconnect_69_ |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[9]/pad_a_esd_1_h |Net: _noconnect_76_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[8]/pad_a_esd_1_h |Net: _noconnect_83_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[7]/pad_a_esd_1_h |Net: _noconnect_90_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[6]/pad_a_esd_1_h |Net: _noconnect_128_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[5]/pad_a_esd_1_h |Net: _noconnect_135_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: gpio_pad[4]/pad_a_esd_1_h |Net: _noconnect_56_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[15]/pad_a_esd_1_h |Net: _noconnect_63_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[3]/pad_a_esd_1_h |Net: _noconnect_70_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[14]/pad_a_esd_1_h |Net: _noconnect_77_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[2]/pad_a_esd_1_h |Net: _noconnect_84_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[13]/pad_a_esd_1_h |Net: _noconnect_91_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[1]/pad_a_esd_1_h |Net: _noconnect_129_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[12]/pad_a_esd_1_h |Net: _noconnect_136_ |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: gpio_pad[0]/pad_a_esd_1_h |Net: loopb3 |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio_pad[11]/pad_a_esd_1_h |Net: loopb4 |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio_pad[10]/pad_a_esd_1_h |Net: loopb5 |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio[9] |Net: loopb6 |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio[8] |Net: loopb7 |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio[7] |Net: loopb8 |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio[6] |Net: loopb16 |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio[5] |Net: loopb17 |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio[4] |Net: _noconnect_57_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[15] |Net: _noconnect_64_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[3] |Net: _noconnect_71_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[14] |Net: _noconnect_78_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[2] |Net: _noconnect_85_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[13] |Net: _noconnect_92_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[1] |Net: _noconnect_130_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[12] |Net: _noconnect_137_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio[0] |Net: RSTB |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0s8_top_xres4v2/pad = 1 |
| | |
| Net: gpio[11] |Net: _noconnect_93_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0s8_top_xres4v2/tie_hi_esd = 1 |
| | |
| Net: gpio[10] |Net: _noconnect_94_ |
| s8iom0_gpiov2_pad/pad = 1 | s8iom0s8_top_xres4v2/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[9]/tie_hi_esd |Net: loopb12 |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | |
| Net: gpio_pad[8]/tie_hi_esd |Net: _noconnect_110_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[7]/tie_hi_esd |Net: flash_io0 |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[6]/tie_hi_esd |Net: flash_io1 |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[5]/tie_hi_esd |Net: flash_io2 |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[4]/tie_hi_esd |Net: flash_io3 |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad = 1 |
| | |
| Net: gpio_pad[15]/tie_hi_esd |Net: _noconnect_138_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[3]/tie_hi_esd |Net: _noconnect_143_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[14]/tie_hi_esd |Net: _noconnect_148_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[2]/tie_hi_esd |Net: _noconnect_153_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| Net: gpio_pad[13]/tie_hi_esd |Net: _noconnect_139_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[1]/tie_hi_esd |Net: _noconnect_144_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[12]/tie_hi_esd |Net: _noconnect_149_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[0]/tie_hi_esd |Net: _noconnect_154_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| Net: gpio_pad[11]/tie_hi_esd |Net: _noconnect_140_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: gpio_pad[10]/tie_hi_esd |Net: _noconnect_145_ |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: xi_pad/out |Net: _noconnect_150_ |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: vdd3v3lclamp[3]/drn_lvc1 |Net: _noconnect_155_ |
| s8iom0_vdda_lvc_pad/drn_lvc1 = 1 | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| Net: vdd3v3lclamp[2]/drn_lvc1 |Net: _noconnect_141_ |
| s8iom0_vdda_lvc_pad/drn_lvc1 = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: vdd3v3lclamp[1]/drn_lvc1 |Net: _noconnect_146_ |
| s8iom0_vdda_lvc_pad/drn_lvc1 = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: vdd3v3lclamp[0]/drn_lvc1 |Net: _noconnect_151_ |
| s8iom0_vdda_lvc_pad/drn_lvc1 = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: vdd3v3lclamp[3]/drn_lvc2 |Net: _noconnect_156_ |
| s8iom0_vdda_lvc_pad/drn_lvc2 = 1 | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| Net: vdd3v3lclamp[2]/drn_lvc2 |Net: _noconnect_142_ |
| s8iom0_vdda_lvc_pad/drn_lvc2 = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: vdd3v3lclamp[1]/drn_lvc2 |Net: _noconnect_147_ |
| s8iom0_vdda_lvc_pad/drn_lvc2 = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: vdd3v3lclamp[0]/drn_lvc2 |Net: _noconnect_152_ |
| s8iom0_vdda_lvc_pad/drn_lvc2 = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: vdd3v3lclamp[3]/src_bdy_lvc1 |Net: _noconnect_157_ |
| s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| Net: vdd3v3lclamp[2]/src_bdy_lvc1 |Net: loopb22 |
| s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 | s8iom0s8_top_gpio_ovtv2/enable_inp_h = 1 |
| | |
| Net: vdd3v3lclamp[1]/src_bdy_lvc1 |Net: ser_rx |
| s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 | s8iom0s8_top_gpio_ovtv2/pad = 1 |
| | |
| Net: vdd3v3lclamp[0]/src_bdy_lvc1 |Net: _noconnect_158_ |
| s8iom0_vdda_lvc_pad/src_bdy_lvc1 = 1 | s8iom0s8_top_gpio_ovtv2/pad_a_noesd_h = |
| | |
| Net: vdd3v3lclamp[3]/src_bdy_lvc2 |Net: _noconnect_159_ |
| s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 | s8iom0s8_top_gpio_ovtv2/pad_a_esd_0_h = |
| | |
| Net: vdd3v3lclamp[2]/src_bdy_lvc2 |Net: _noconnect_160_ |
| s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 | s8iom0s8_top_gpio_ovtv2/pad_a_esd_1_h = |
| | |
| Net: vdd3v3lclamp[1]/src_bdy_lvc2 |Net: _noconnect_161_ |
| s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 | s8iom0s8_top_gpio_ovtv2/in_h = 1 |
| | |
| Net: vdd3v3lclamp[0]/src_bdy_lvc2 |Net: _noconnect_162_ |
| s8iom0_vdda_lvc_pad/src_bdy_lvc2 = 1 | s8iom0s8_top_gpio_ovtv2/tie_hi_esd = 1 |
| | |
| Net: vdd3v3lclamp[3]/bdy2_b2b |Net: _noconnect_163_ |
| s8iom0_vdda_lvc_pad/bdy2_b2b = 1 | s8iom0s8_top_gpio_ovtv2/tie_lo_esd = 1 |
| | |
| Net: vdd3v3lclamp[2]/bdy2_b2b |Net: loopb23 |
| s8iom0_vdda_lvc_pad/bdy2_b2b = 1 | s8iom0s8_top_gpio_ovtv2/enable_inp_h = 1 |
| | |
| Net: vdd3v3lclamp[1]/bdy2_b2b |Net: ser_tx |
| s8iom0_vdda_lvc_pad/bdy2_b2b = 1 | s8iom0s8_top_gpio_ovtv2/pad = 1 |
| | |
| Net: vdd3v3lclamp[0]/bdy2_b2b |Net: _noconnect_164_ |
| s8iom0_vdda_lvc_pad/bdy2_b2b = 1 | s8iom0s8_top_gpio_ovtv2/pad_a_noesd_h = |
| | |
| Net: vdd3v3lclamp[3]/vssi |Net: _noconnect_165_ |
| s8iom0_vdda_lvc_pad/vssi = 1 | s8iom0s8_top_gpio_ovtv2/pad_a_esd_0_h = |
| | |
| Net: vdd3v3lclamp[2]/vssi |Net: _noconnect_166_ |
| s8iom0_vdda_lvc_pad/vssi = 1 | s8iom0s8_top_gpio_ovtv2/pad_a_esd_1_h = |
| | |
| Net: vdd3v3lclamp[1]/vssi |Net: _noconnect_167_ |
| s8iom0_vdda_lvc_pad/vssi = 1 | s8iom0s8_top_gpio_ovtv2/in = 1 |
| | |
| Net: vdd3v3lclamp[0]/vssi |Net: _noconnect_168_ |
| s8iom0_vdda_lvc_pad/vssi = 1 | s8iom0s8_top_gpio_ovtv2/in_h = 1 |
| | |
| Net: vsshclamp[3]/drn_hvc |Net: _noconnect_169_ |
| s8iom0_vssa_hvc_pad/drn_hvc = 1 | s8iom0s8_top_gpio_ovtv2/tie_hi_esd = 1 |
| | |
| Net: vsshclamp[2]/drn_hvc |Net: _noconnect_170_ |
| s8iom0_vssa_hvc_pad/drn_hvc = 1 | s8iom0s8_top_gpio_ovtv2/tie_lo_esd = 1 |
| | |
| Net: vsshclamp[1]/drn_hvc |Net: adc0_ena_core |
| s8iom0_vssa_hvc_pad/drn_hvc = 1 | striVe_soc/adc0_ena = 1 |
| | |
| Net: vsshclamp[0]/drn_hvc |Net: adc0_convert_core |
| s8iom0_vssa_hvc_pad/drn_hvc = 1 | striVe_soc/adc0_convert = 1 |
| | |
| Net: vsshclamp[3]/src_bdy_hvc |Net: adc0_done_core |
| s8iom0_vssa_hvc_pad/src_bdy_hvc = 1 | striVe_soc/adc0_done = 1 |
| | |
| Net: vsshclamp[2]/src_bdy_hvc |Net: adc0_clk_core |
| s8iom0_vssa_hvc_pad/src_bdy_hvc = 1 | striVe_soc/adc0_clk = 1 |
| | |
| Net: vsshclamp[1]/src_bdy_hvc |Net: adc1_ena_core |
| s8iom0_vssa_hvc_pad/src_bdy_hvc = 1 | striVe_soc/adc1_ena = 1 |
| | |
| Net: vsshclamp[0]/src_bdy_hvc |Net: adc1_convert_core |
| s8iom0_vssa_hvc_pad/src_bdy_hvc = 1 | striVe_soc/adc1_convert = 1 |
| | |
| Net: ser_tx_pad/enable_inp_h |Net: adc1_clk_core |
| s8iom0s8_top_gpio_ovtv2/enable_inp_h = 1 | striVe_soc/adc1_clk = 1 |
| | |
| Net: ser_tx_pad/in |Net: adc1_done_core |
| s8iom0s8_top_gpio_ovtv2/in = 1 | striVe_soc/adc1_done = 1 |
| | |
| Net: ser_tx_pad/in_h |Net: dac_ena_core |
| s8iom0s8_top_gpio_ovtv2/in_h = 1 | striVe_soc/dac_ena = 1 |
| | |
| Net: ser_tx |Net: analog_out_sel_core |
| s8iom0s8_top_gpio_ovtv2/pad = 1 | striVe_soc/analog_out_sel = 1 |
| | |
| Net: ser_tx_pad/pad_a_esd_0_h |Net: opamp_ena_core |
| s8iom0s8_top_gpio_ovtv2/pad_a_esd_0_h = | striVe_soc/opamp_ena = 1 |
| | |
| Net: ser_tx_pad/pad_a_esd_1_h |Net: opamp_bias_ena_core |
| s8iom0s8_top_gpio_ovtv2/pad_a_esd_1_h = | striVe_soc/opamp_bias_ena = 1 |
| | |
| Net: ser_tx_pad/pad_a_noesd_h |Net: bg_ena_core |
| s8iom0s8_top_gpio_ovtv2/pad_a_noesd_h = | striVe_soc/bg_ena = 1 |
| | |
| Net: ser_tx_pad/tie_hi_esd |Net: comp_ena_core |
| s8iom0s8_top_gpio_ovtv2/tie_hi_esd = 1 | striVe_soc/comp_ena = 1 |
| | |
| Net: ser_tx_pad/tie_lo_esd |Net: rcosc_ena_core |
| s8iom0s8_top_gpio_ovtv2/tie_lo_esd = 1 | striVe_soc/rcosc_ena = 1 |
| | |
| Net: vssiolclamp/drn_lvc1 |Net: overtemp_ena_core |
| s8iom0_vssio_lvc_pad/drn_lvc1 = 1 | striVe_soc/overtemp_ena = 1 |
| | |
| Net: vssiolclamp/drn_lvc2 |Net: overtemp_core |
| s8iom0_vssio_lvc_pad/drn_lvc2 = 1 | striVe_soc/overtemp = 1 |
| | |
| Net: vssiolclamp/src_bdy_lvc1 |Net: rcosc_in_core |
| s8iom0_vssio_lvc_pad/src_bdy_lvc1 = 1 | striVe_soc/rcosc_in = 1 |
| | |
| Net: vssiolclamp/src_bdy_lvc2 |Net: xtal_in_core |
| s8iom0_vssio_lvc_pad/src_bdy_lvc2 = 1 | striVe_soc/xtal_in = 1 |
| | |
| Net: vssiolclamp/bdy2_b2b |Net: comp_in_core |
| s8iom0_vssio_lvc_pad/bdy2_b2b = 1 | striVe_soc/comp_in = 1 |
| | |
| Net: vssiolclamp/vssi |Net: flash_csb_oeb_core |
| s8iom0_vssio_lvc_pad/vssi = 1 | striVe_soc/flash_csb_oeb = 1 |
| | |
| Net: s8iom0_vssa_lvc_pad_0/drn_lvc1 |Net: flash_clk_oeb_core |
| s8iom0_vssa_lvc_pad/drn_lvc1 = 1 | striVe_soc/flash_clk_oeb = 1 |
| | |
| Net: s8iom0_vssa_lvc_pad_0/drn_lvc2 |Net: flash_csb_ieb_core |
| s8iom0_vssa_lvc_pad/drn_lvc2 = 1 | striVe_soc/flash_csb_ieb = 1 |
| | |
| Net: s8iom0_vssa_lvc_pad_0/src_bdy_lvc1 |Net: flash_clk_ieb_core |
| s8iom0_vssa_lvc_pad/src_bdy_lvc1 = 1 | striVe_soc/flash_clk_ieb = 1 |
| | |
| Net: s8iom0_vssa_lvc_pad_0/src_bdy_lvc2 |Net: adc0_data_core[9] |
| s8iom0_vssa_lvc_pad/src_bdy_lvc2 = 1 | striVe_soc/adc0_data[9] = 1 |
| | |
| Net: s8iom0_vssa_lvc_pad_0/bdy2_b2b |Net: adc0_data_core[8] |
| s8iom0_vssa_lvc_pad/bdy2_b2b = 1 | striVe_soc/adc0_data[8] = 1 |
| | |
| Net: s8iom0_vssa_lvc_pad_0/vssi |Net: adc0_data_core[7] |
| s8iom0_vssa_lvc_pad/vssi = 1 | striVe_soc/adc0_data[7] = 1 |
| | |
| Net: core/adc0_ena |Net: adc0_data_core[6] |
| striVe_soc/adc0_ena = 1 | striVe_soc/adc0_data[6] = 1 |
| | |
| Net: core/adc0_convert |Net: adc0_data_core[5] |
| striVe_soc/adc0_convert = 1 | striVe_soc/adc0_data[5] = 1 |
| | |
| Net: core/adc0_data[9] |Net: adc0_data_core[4] |
| striVe_soc/adc0_data[9] = 1 | striVe_soc/adc0_data[4] = 1 |
| | |
| Net: core/adc0_data[8] |Net: adc0_data_core[3] |
| striVe_soc/adc0_data[8] = 1 | striVe_soc/adc0_data[3] = 1 |
| | |
| Net: core/adc0_data[7] |Net: adc0_data_core[2] |
| striVe_soc/adc0_data[7] = 1 | striVe_soc/adc0_data[2] = 1 |
| | |
| Net: core/adc0_data[6] |Net: adc0_data_core[1] |
| striVe_soc/adc0_data[6] = 1 | striVe_soc/adc0_data[1] = 1 |
| | |
| Net: core/adc0_data[5] |Net: adc0_data_core[0] |
| striVe_soc/adc0_data[5] = 1 | striVe_soc/adc0_data[0] = 1 |
| | |
| Net: core/adc0_data[4] |Net: adc0_inputsrc_core[1] |
| striVe_soc/adc0_data[4] = 1 | striVe_soc/adc0_inputsrc[1] = 1 |
| | |
| Net: core/adc0_data[3] |Net: adc0_inputsrc_core[0] |
| striVe_soc/adc0_data[3] = 1 | striVe_soc/adc0_inputsrc[0] = 1 |
| | |
| Net: core/adc0_data[2] |Net: adc1_data_core[9] |
| striVe_soc/adc0_data[2] = 1 | striVe_soc/adc1_data[9] = 1 |
| | |
| Net: core/adc0_data[1] |Net: adc1_data_core[8] |
| striVe_soc/adc0_data[1] = 1 | striVe_soc/adc1_data[8] = 1 |
| | |
| Net: core/adc0_data[0] |Net: adc1_data_core[7] |
| striVe_soc/adc0_data[0] = 1 | striVe_soc/adc1_data[7] = 1 |
| | |
| Net: core/adc0_done |Net: adc1_data_core[6] |
| striVe_soc/adc0_done = 1 | striVe_soc/adc1_data[6] = 1 |
| | |
| Net: core/adc0_clk |Net: adc1_data_core[5] |
| striVe_soc/adc0_clk = 1 | striVe_soc/adc1_data[5] = 1 |
| | |
| Net: core/adc0_inputsrc[1] |Net: adc1_data_core[4] |
| striVe_soc/adc0_inputsrc[1] = 1 | striVe_soc/adc1_data[4] = 1 |
| | |
| Net: core/adc0_inputsrc[0] |Net: adc1_data_core[3] |
| striVe_soc/adc0_inputsrc[0] = 1 | striVe_soc/adc1_data[3] = 1 |
| | |
| Net: core/adc1_ena |Net: adc1_data_core[2] |
| striVe_soc/adc1_ena = 1 | striVe_soc/adc1_data[2] = 1 |
| | |
| Net: core/adc1_convert |Net: adc1_data_core[1] |
| striVe_soc/adc1_convert = 1 | striVe_soc/adc1_data[1] = 1 |
| | |
| Net: core/adc1_clk |Net: adc1_data_core[0] |
| striVe_soc/adc1_clk = 1 | striVe_soc/adc1_data[0] = 1 |
| | |
| Net: core/adc1_inputsrc[1] |Net: adc1_inputsrc_core[1] |
| striVe_soc/adc1_inputsrc[1] = 1 | striVe_soc/adc1_inputsrc[1] = 1 |
| | |
| Net: core/adc1_inputsrc[0] |Net: adc1_inputsrc_core[0] |
| striVe_soc/adc1_inputsrc[0] = 1 | striVe_soc/adc1_inputsrc[0] = 1 |
| | |
| Net: core/adc1_data[9] |Net: comp_ninputsrc_core[1] |
| striVe_soc/adc1_data[9] = 1 | striVe_soc/comp_ninputsrc[1] = 1 |
| | |
| Net: core/adc1_data[8] |Net: comp_ninputsrc_core[0] |
| striVe_soc/adc1_data[8] = 1 | striVe_soc/comp_ninputsrc[0] = 1 |
| | |
| Net: core/adc1_data[7] |Net: comp_pinputsrc_core[1] |
| striVe_soc/adc1_data[7] = 1 | striVe_soc/comp_pinputsrc[1] = 1 |
| | |
| Net: core/adc1_data[6] |Net: comp_pinputsrc_core[0] |
| striVe_soc/adc1_data[6] = 1 | striVe_soc/comp_pinputsrc[0] = 1 |
| | |
| Net: core/adc1_data[5] |Net: dac_value_core[9] |
| striVe_soc/adc1_data[5] = 1 | striVe_soc/dac_value[9] = 1 |
| | |
| Net: core/adc1_data[4] |Net: dac_value_core[8] |
| striVe_soc/adc1_data[4] = 1 | striVe_soc/dac_value[8] = 1 |
| | |
| Net: core/adc1_data[3] |Net: dac_value_core[7] |
| striVe_soc/adc1_data[3] = 1 | striVe_soc/dac_value[7] = 1 |
| | |
| Net: core/adc1_data[2] |Net: dac_value_core[6] |
| striVe_soc/adc1_data[2] = 1 | striVe_soc/dac_value[6] = 1 |
| | |
| Net: core/adc1_data[1] |Net: dac_value_core[5] |
| striVe_soc/adc1_data[1] = 1 | striVe_soc/dac_value[5] = 1 |
| | |
| Net: core/adc1_data[0] |Net: dac_value_core[4] |
| striVe_soc/adc1_data[0] = 1 | striVe_soc/dac_value[4] = 1 |
| | |
| Net: core/adc1_done |Net: dac_value_core[3] |
| striVe_soc/adc1_done = 1 | striVe_soc/dac_value[3] = 1 |
| | |
| Net: core/dac_ena |Net: dac_value_core[2] |
| striVe_soc/dac_ena = 1 | striVe_soc/dac_value[2] = 1 |
| | |
| Net: core/dac_value[9] |Net: dac_value_core[1] |
| striVe_soc/dac_value[9] = 1 | striVe_soc/dac_value[1] = 1 |
| | |
| Net: core/dac_value[8] |Net: dac_value_core[0] |
| striVe_soc/dac_value[8] = 1 | striVe_soc/dac_value[0] = 1 |
| | |
| Net: core/dac_value[7] |Net: spi_ro_config_core[7] |
| striVe_soc/dac_value[7] = 1 | striVe_soc/spi_ro_config[7] = 1 |
| | |
| Net: core/dac_value[6] |Net: spi_ro_config_core[6] |
| striVe_soc/dac_value[6] = 1 | striVe_soc/spi_ro_config[6] = 1 |
| | |
| Net: core/dac_value[5] |Net: spi_ro_config_core[5] |
| striVe_soc/dac_value[5] = 1 | striVe_soc/spi_ro_config[5] = 1 |
| | |
| Net: core/dac_value[4] |Net: spi_ro_config_core[4] |
| striVe_soc/dac_value[4] = 1 | striVe_soc/spi_ro_config[4] = 1 |
| | |
| Net: core/dac_value[3] |Net: spi_ro_config_core[3] |
| striVe_soc/dac_value[3] = 1 | striVe_soc/spi_ro_config[3] = 1 |
| | |
| Net: core/dac_value[2] |Net: spi_ro_config_core[2] |
| striVe_soc/dac_value[2] = 1 | striVe_soc/spi_ro_config[2] = 1 |
| | |
| Net: core/dac_value[1] |Net: spi_ro_config_core[1] |
| striVe_soc/dac_value[1] = 1 | striVe_soc/spi_ro_config[1] = 1 |
| | |
| Net: core/dac_value[0] |Net: spi_ro_config_core[0] |
| striVe_soc/dac_value[0] = 1 | striVe_soc/spi_ro_config[0] = 1 |
| | |
| Net: core/analog_out_sel |Net: _noconnect_171_[0] |
| striVe_soc/analog_out_sel = 1 | scs8hd_conb_1/HI = 1 |
| | |
| Net: core/opamp_ena |Net: _noconnect_171_[1] |
| striVe_soc/opamp_ena = 1 | scs8hd_conb_1/HI = 1 |
| | |
| Net: core/opamp_bias_ena |Net: _noconnect_171_[2] |
| striVe_soc/opamp_bias_ena = 1 | scs8hd_conb_1/HI = 1 |
| | |
| Net: core/bg_ena |Net: _noconnect_171_[3] |
| striVe_soc/bg_ena = 1 | scs8hd_conb_1/HI = 1 |
| | |
| Net: core/comp_ena |Net: pll_clk2 |
| striVe_soc/comp_ena = 1 | digital_pll/clockd[3] = 1 |
| | |
| Net: core/comp_ninputsrc[1] |Net: pll_clk4 |
| striVe_soc/comp_ninputsrc[1] = 1 | digital_pll/clockd[2] = 1 |
| | |
| Net: core/comp_ninputsrc[0] |Net: pll_clk8 |
| striVe_soc/comp_ninputsrc[0] = 1 | digital_pll/clockd[1] = 1 |
| | |
| Net: core/comp_pinputsrc[1] |Net: pll_clk_core0 |
| striVe_soc/comp_pinputsrc[1] = 1 | digital_pll/clockp[1] = 1 |
| | |
| Net: core/comp_pinputsrc[0] |Net: pll_clk_core90 |
| striVe_soc/comp_pinputsrc[0] = 1 | digital_pll/clockp[0] = 1 |
| | |
| Net: core/rcosc_ena |Net: gpio_mode0_core[15] |
| striVe_soc/rcosc_ena = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[15] = 1 |
| | |
| Net: core/overtemp_ena |Net: gpio_mode0_core[14] |
| striVe_soc/overtemp_ena = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[14] = 1 |
| | |
| Net: core/overtemp |Net: gpio_mode0_core[13] |
| striVe_soc/overtemp = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[13] = 1 |
| | |
| Net: core/rcosc_in |Net: gpio_mode0_core[12] |
| striVe_soc/rcosc_in = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[12] = 1 |
| | |
| Net: core/xtal_in |Net: gpio_mode0_core[11] |
| striVe_soc/xtal_in = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[11] = 1 |
| | |
| Net: core/comp_in |Net: gpio_mode0_core[10] |
| striVe_soc/comp_in = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[10] = 1 |
| | |
| Net: core/spi_ro_config[7] |Net: gpio_mode0_core[9] |
| striVe_soc/spi_ro_config[7] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[9] = 1 |
| | |
| Net: core/spi_ro_config[6] |Net: gpio_mode0_core[8] |
| striVe_soc/spi_ro_config[6] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[8] = 1 |
| | |
| Net: core/spi_ro_config[5] |Net: gpio_mode0_core[7] |
| striVe_soc/spi_ro_config[5] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[7] = 1 |
| | |
| Net: core/spi_ro_config[4] |Net: gpio_mode0_core[6] |
| striVe_soc/spi_ro_config[4] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[6] = 1 |
| | |
| Net: core/spi_ro_config[3] |Net: gpio_mode0_core[5] |
| striVe_soc/spi_ro_config[3] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[5] = 1 |
| | |
| Net: core/spi_ro_config[2] |Net: gpio_mode0_core[4] |
| striVe_soc/spi_ro_config[2] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[4] = 1 |
| | |
| Net: core/spi_ro_config[1] |Net: gpio_mode0_core[3] |
| striVe_soc/spi_ro_config[1] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[3] = 1 |
| | |
| Net: core/spi_ro_config[0] |Net: gpio_mode0_core[2] |
| striVe_soc/spi_ro_config[0] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[2] = 1 |
| | |
| Net: core/spi_ro_mask_rev[0] |Net: gpio_mode0_core[1] |
| striVe_soc/spi_ro_mask_rev[0] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[1] = 1 |
| | |
| Net: core/irq_spi |Net: gpio_mode0_core[0] |
| striVe_soc/irq_spi = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| | striVe_soc/gpio_mode0_pad[0] = 1 |
| | |
| Net: core/flash_csb_oeb |Net: gpio_out_core[0] |
| striVe_soc/flash_csb_oeb = 1 | s8iom0_gpiov2_pad/out = 1 |
| | striVe_soc/gpio_out_pad[0] = 1 |
| | |
| Net: core/flash_clk_oeb |Net: gpio_outenb_core[0] |
| striVe_soc/flash_clk_oeb = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| | striVe_soc/gpio_outenb_pad[0] = 1 |
| | |
| Net: core/flash_csb_ieb |Net: gpio_inenb_core[0] |
| striVe_soc/flash_csb_ieb = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| | striVe_soc/gpio_inenb_pad[0] = 1 |
| | |
| Net: core/flash_clk_ieb |Net: gpio_in_core[0] |
| striVe_soc/flash_clk_ieb = 1 | s8iom0_gpiov2_pad/in = 1 |
| | striVe_soc/gpio_in_pad[0] = 1 |
| | |
| Net: housekeeping/irq |Net: gpio_out_core[1] |
| striVe_spi/irq = 1 | s8iom0_gpiov2_pad/out = 1 |
| | striVe_soc/gpio_out_pad[1] = 1 |
| | |
| Net: housekeeping/mask_rev[0] |Net: gpio_outenb_core[1] |
| striVe_spi/mask_rev[0] = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| | striVe_soc/gpio_outenb_pad[1] = 1 |
| | |
| Net: RSTB |Net: gpio_inenb_core[1] |
| s8iom0s8_top_xres4v2/pad = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| | striVe_soc/gpio_inenb_pad[1] = 1 |
| | |
| Net: RSTB_pad/tie_hi_esd |Net: gpio_in_core[1] |
| s8iom0s8_top_xres4v2/tie_hi_esd = 1 | s8iom0_gpiov2_pad/in = 1 |
| | striVe_soc/gpio_in_pad[1] = 1 |
| | |
| Net: RSTB_pad/tie_lo_esd |Net: gpio_out_core[2] |
| s8iom0s8_top_xres4v2/tie_lo_esd = 1 | s8iom0_gpiov2_pad/out = 1 |
| | striVe_soc/gpio_out_pad[2] = 1 |
| | |
| Net: flash_io3_pad/in |Net: gpio_outenb_core[2] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/flash_io3_di = 1 | striVe_soc/gpio_outenb_pad[2] = 1 |
| | |
| Net: flash_io3_pad/tie_lo_esd |Net: gpio_inenb_core[2] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | striVe_soc/gpio_inenb_pad[2] = 1 |
| | |
| Net: flash_io2_pad/tie_lo_esd |Net: gpio_in_core[2] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | striVe_soc/gpio_in_pad[2] = 1 |
| | |
| Net: flash_io1_pad/tie_lo_esd |Net: gpio_out_core[3] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/out = 1 |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | striVe_soc/gpio_out_pad[3] = 1 |
| | |
| Net: flash_io0_pad/tie_lo_esd |Net: gpio_outenb_core[3] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | striVe_soc/gpio_outenb_pad[3] = 1 |
| | |
| Net: flash_io3_pad/out |Net: gpio_inenb_core[3] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/flash_io3_do = 1 | striVe_soc/gpio_inenb_pad[3] = 1 |
| | |
| Net: mask_rev_value[0]/LO |Net: gpio_in_core[3] |
| scs8hd_conb_1/LO = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_spi/mask_rev_in[0] = 1 | striVe_soc/gpio_in_pad[3] = 1 |
| | |
| Net: pll/osc |Net: gpio_out_core[4] |
| digital_pll/osc = 1 | s8iom0_gpiov2_pad/out = 1 |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/gpio_out_pad[4] = 1 |
| | |
| Net: xo_pad/out |Net: gpio_outenb_core[4] |
| digital_pll/clockd[0] = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| s8iom0_gpiov2_pad/out = 1 | striVe_soc/gpio_outenb_pad[4] = 1 |
| | |
| Net: SDI_pad/in |Net: gpio_inenb_core[4] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_spi/SDI = 1 | striVe_soc/gpio_inenb_pad[4] = 1 |
| | |
| Net: housekeeping/RSTB |Net: gpio_in_core[4] |
| lvlshiftdown/X = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_spi/RSTB = 1 | striVe_soc/gpio_in_pad[4] = 1 |
| | |
| Net: core/ser_rx |Net: gpio_out_core[5] |
| s8iom0s8_top_gpio_ovtv2/in = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/ser_rx = 1 | striVe_soc/gpio_out_pad[5] = 1 |
| | |
| Net: gpio_pad[9]/dm<0> |Net: gpio_outenb_core[5] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_mode0_pad[9] = 1 | striVe_soc/gpio_outenb_pad[5] = 1 |
| | |
| Net: gpio_pad[9]/in |Net: gpio_inenb_core[5] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_in_pad[9] = 1 | striVe_soc/gpio_inenb_pad[5] = 1 |
| | |
| Net: gpio_pad[9]/inp_dis |Net: gpio_in_core[5] |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_inenb_pad[9] = 1 | striVe_soc/gpio_in_pad[5] = 1 |
| | |
| Net: gpio_pad[9]/oe_n |Net: gpio_out_core[6] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_outenb_pad[9] = 1 | striVe_soc/gpio_out_pad[6] = 1 |
| | |
| Net: gpio_pad[9]/out |Net: gpio_outenb_core[6] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_out_pad[9] = 1 | striVe_soc/gpio_outenb_pad[6] = 1 |
| | |
| Net: CSB_pad/in |Net: gpio_inenb_core[6] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_spi/CSB = 1 | striVe_soc/gpio_inenb_pad[6] = 1 |
| | |
| Net: CSB_pad/tie_lo_esd |Net: gpio_in_core[6] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/in = 1 |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | striVe_soc/gpio_in_pad[6] = 1 |
| | |
| Net: xi_pad/tie_lo_esd |Net: gpio_out_core[7] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/out = 1 |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | striVe_soc/gpio_out_pad[7] = 1 |
| | |
| Net: irq_pad/tie_lo_esd |Net: gpio_outenb_core[7] |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | striVe_soc/gpio_outenb_pad[7] = 1 |
| | |
| Net: gpio_pad[8]/dm<0> |Net: gpio_inenb_core[7] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_mode0_pad[8] = 1 | striVe_soc/gpio_inenb_pad[7] = 1 |
| | |
| Net: gpio_pad[8]/in |Net: gpio_in_core[7] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_in_pad[8] = 1 | striVe_soc/gpio_in_pad[7] = 1 |
| | |
| Net: gpio_pad[8]/inp_dis |Net: gpio_out_core[8] |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_inenb_pad[8] = 1 | striVe_soc/gpio_out_pad[8] = 1 |
| | |
| Net: gpio_pad[8]/oe_n |Net: gpio_outenb_core[8] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_outenb_pad[8] = 1 | striVe_soc/gpio_outenb_pad[8] = 1 |
| | |
| Net: gpio_pad[8]/out |Net: gpio_inenb_core[8] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_out_pad[8] = 1 | striVe_soc/gpio_inenb_pad[8] = 1 |
| | |
| Net: gpio_pad[7]/dm<0> |Net: gpio_in_core[8] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_mode0_pad[7] = 1 | striVe_soc/gpio_in_pad[8] = 1 |
| | |
| Net: gpio_pad[7]/in |Net: gpio_out_core[9] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_in_pad[7] = 1 | striVe_soc/gpio_out_pad[9] = 1 |
| | |
| Net: gpio_pad[7]/inp_dis |Net: gpio_outenb_core[9] |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_inenb_pad[7] = 1 | striVe_soc/gpio_outenb_pad[9] = 1 |
| | |
| Net: gpio_pad[7]/oe_n |Net: gpio_inenb_core[9] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_outenb_pad[7] = 1 | striVe_soc/gpio_inenb_pad[9] = 1 |
| | |
| Net: gpio_pad[7]/out |Net: gpio_in_core[9] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_out_pad[7] = 1 | striVe_soc/gpio_in_pad[9] = 1 |
| | |
| Net: gpio_pad[6]/dm<0> |Net: gpio_out_core[10] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_mode0_pad[6] = 1 | striVe_soc/gpio_out_pad[10] = 1 |
| | |
| Net: gpio_pad[6]/in |Net: gpio_outenb_core[10] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_in_pad[6] = 1 | striVe_soc/gpio_outenb_pad[10] = 1 |
| | |
| Net: gpio_pad[6]/inp_dis |Net: gpio_inenb_core[10] |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_inenb_pad[6] = 1 | striVe_soc/gpio_inenb_pad[10] = 1 |
| | |
| Net: gpio_pad[6]/oe_n |Net: gpio_in_core[10] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_outenb_pad[6] = 1 | striVe_soc/gpio_in_pad[10] = 1 |
| | |
| Net: gpio_pad[6]/out |Net: gpio_out_core[11] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_out_pad[6] = 1 | striVe_soc/gpio_out_pad[11] = 1 |
| | |
| Net: SDO_pad/oe_n |Net: gpio_outenb_core[11] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_spi/sdo_enb = 1 | striVe_soc/gpio_outenb_pad[11] = 1 |
| | |
| Net: SDO_pad/out |Net: gpio_inenb_core[11] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_spi/SDO = 1 | striVe_soc/gpio_inenb_pad[11] = 1 |
| | |
| Net: gpio_pad[5]/dm<0> |Net: gpio_in_core[11] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_mode0_pad[5] = 1 | striVe_soc/gpio_in_pad[11] = 1 |
| | |
| Net: gpio_pad[5]/in |Net: gpio_out_core[12] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_in_pad[5] = 1 | striVe_soc/gpio_out_pad[12] = 1 |
| | |
| Net: gpio_pad[5]/inp_dis |Net: gpio_outenb_core[12] |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_inenb_pad[5] = 1 | striVe_soc/gpio_outenb_pad[12] = 1 |
| | |
| Net: gpio_pad[5]/oe_n |Net: gpio_inenb_core[12] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_outenb_pad[5] = 1 | striVe_soc/gpio_inenb_pad[12] = 1 |
| | |
| Net: gpio_pad[5]/out |Net: gpio_in_core[12] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_out_pad[5] = 1 | striVe_soc/gpio_in_pad[12] = 1 |
| | |
| Net: gpio_pad[4]/dm<0> |Net: gpio_out_core[13] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_mode0_pad[4] = 1 | striVe_soc/gpio_out_pad[13] = 1 |
| | |
| Net: gpio_pad[4]/in |Net: gpio_outenb_core[13] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_in_pad[4] = 1 | striVe_soc/gpio_outenb_pad[13] = 1 |
| | |
| Net: gpio_pad[4]/inp_dis |Net: gpio_inenb_core[13] |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_inenb_pad[4] = 1 | striVe_soc/gpio_inenb_pad[13] = 1 |
| | |
| Net: gpio_pad[4]/oe_n |Net: gpio_in_core[13] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_outenb_pad[4] = 1 | striVe_soc/gpio_in_pad[13] = 1 |
| | |
| Net: gpio_pad[4]/out |Net: gpio_out_core[14] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_out_pad[4] = 1 | striVe_soc/gpio_out_pad[14] = 1 |
| | |
| Net: gpio_pad[15]/dm<0> |Net: gpio_outenb_core[14] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_mode0_pad[15] = 1 | striVe_soc/gpio_outenb_pad[14] = 1 |
| | |
| Net: gpio_pad[15]/in |Net: gpio_inenb_core[14] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_in_pad[15] = 1 | striVe_soc/gpio_inenb_pad[14] = 1 |
| | |
| Net: gpio_pad[15]/inp_dis |Net: gpio_in_core[14] |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_inenb_pad[15] = 1 | striVe_soc/gpio_in_pad[14] = 1 |
| | |
| Net: gpio_pad[15]/oe_n |Net: gpio_out_core[15] |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_outenb_pad[15] = 1 | striVe_soc/gpio_out_pad[15] = 1 |
| | |
| Net: gpio_pad[15]/out |Net: gpio_outenb_core[15] |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_out_pad[15] = 1 | striVe_soc/gpio_outenb_pad[15] = 1 |
| | |
| Net: gpio_pad[3]/dm<0> |Net: gpio_inenb_core[15] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_soc/gpio_mode0_pad[3] = 1 | striVe_soc/gpio_inenb_pad[15] = 1 |
| | |
| Net: gpio_pad[3]/in |Net: gpio_in_core[15] |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_in_pad[3] = 1 | striVe_soc/gpio_in_pad[15] = 1 |
| | |
| Net: gpio_pad[3]/inp_dis |Net: loopb1 |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| striVe_soc/gpio_inenb_pad[3] = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[3]/oe_n |Net: loopb10 |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| striVe_soc/gpio_outenb_pad[3] = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[3]/out |Net: loopb13 |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| striVe_soc/gpio_out_pad[3] = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: flash_io2_pad/in |Net: xi_core |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/flash_io2_di = 1 | digital_pll/osc = 1 |
| | |
| Net: flash_io2_pad/out |Net: pll_clk16 |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/flash_io2_do = 1 | digital_pll/clockd[0] = 1 |
| | |
| Net: gpio_pad[14]/dm<0> |Net: xresloop |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0s8_top_xres4v2/pad_a_esd_h = 1 |
| striVe_soc/gpio_mode0_pad[14] = 1 | s8iom0s8_top_xres4v2/tie_weak_hi_h = 1 |
| | |
| Net: gpio_pad[14]/in |Net: irq_pin_core |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_in_pad[14] = 1 | striVe_soc/irq_pin = 1 |
| | |
| Net: gpio_pad[14]/inp_dis |Net: SDO_core |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_inenb_pad[14] = 1 | striVe_spi/SDO = 1 |
| | |
| Net: gpio_pad[14]/oe_n |Net: SDO_enb |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/gpio_outenb_pad[14] = 1 | striVe_spi/sdo_enb = 1 |
| | |
| Net: gpio_pad[14]/out |Net: SDI_core |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_out_pad[14] = 1 | striVe_spi/SDI = 1 |
| | |
| Net: gpio_pad[2]/dm<0> |Net: CSB_core |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_mode0_pad[2] = 1 | striVe_spi/CSB = 1 |
| | |
| Net: gpio_pad[2]/in |Net: flash_csb_core |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_in_pad[2] = 1 | striVe_soc/flash_csb = 1 |
| | |
| Net: gpio_pad[2]/inp_dis |Net: flash_clk_core |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_inenb_pad[2] = 1 | striVe_soc/flash_clk = 1 |
| | |
| Net: gpio_pad[2]/oe_n |Net: flash_io0_do_core |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_outenb_pad[2] = 1 | striVe_soc/flash_io0_do = 1 |
| | |
| Net: gpio_pad[2]/out |Net: loopb18 |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| striVe_soc/gpio_out_pad[2] = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[13]/dm<0> |Net: loopb19 |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| striVe_soc/gpio_mode0_pad[13] = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[13]/in |Net: loopb20 |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| striVe_soc/gpio_in_pad[13] = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[13]/inp_dis |Net: loopb21 |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| striVe_soc/gpio_inenb_pad[13] = 1 | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| Net: gpio_pad[13]/oe_n |Net: flash_io0_di_core |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_outenb_pad[13] = 1 | striVe_soc/flash_io0_di = 1 |
| | |
| Net: gpio_pad[13]/out |Net: flash_io1_do_core |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_out_pad[13] = 1 | striVe_soc/flash_io1_do = 1 |
| | |
| Net: gpio_pad[1]/dm<0> |Net: flash_io1_di_core |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_mode0_pad[1] = 1 | striVe_soc/flash_io1_di = 1 |
| | |
| Net: gpio_pad[1]/in |Net: flash_io2_do_core |
| s8iom0_gpiov2_pad/in = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_in_pad[1] = 1 | striVe_soc/flash_io2_do = 1 |
| | |
| Net: gpio_pad[1]/inp_dis |Net: flash_io2_di_core |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_inenb_pad[1] = 1 | striVe_soc/flash_io2_di = 1 |
| | |
| Net: gpio_pad[1]/oe_n |Net: flash_io3_do_core |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/out = 1 |
| striVe_soc/gpio_outenb_pad[1] = 1 | striVe_soc/flash_io3_do = 1 |
| | |
| Net: gpio_pad[1]/out |Net: flash_io3_di_core |
| s8iom0_gpiov2_pad/out = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/gpio_out_pad[1] = 1 | striVe_soc/flash_io3_di = 1 |
| | |
| Net: gpio_pad[12]/dm<0> |Net: ser_rx_core |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0s8_top_gpio_ovtv2/in = 1 |
| striVe_soc/gpio_mode0_pad[12] = 1 | striVe_soc/ser_rx = 1 |
| | |
| Net: gpio_pad[12]/in |Net: ser_tx_core |
| s8iom0_gpiov2_pad/in = 1 | s8iom0s8_top_gpio_ovtv2/out = 1 |
| striVe_soc/gpio_in_pad[12] = 1 | striVe_soc/ser_tx = 1 |
| | |
| Net: gpio_pad[12]/inp_dis |Net: striVe_clk |
| s8iom0_gpiov2_pad/inp_dis = 1 | striVe_clkrst/clk = 1 |
| striVe_soc/gpio_inenb_pad[12] = 1 | striVe_soc/clk = 1 |
| | |
| Net: gpio_pad[12]/oe_n |Net: ext_reset_core |
| s8iom0_gpiov2_pad/oe_n = 1 | striVe_clkrst/ext_reset = 1 |
| striVe_soc/gpio_outenb_pad[12] = 1 | striVe_spi/reset = 1 |
| | |
| Net: gpio_pad[12]/out |Net: striVe_rstn |
| s8iom0_gpiov2_pad/out = 1 | striVe_clkrst/resetn = 1 |
| striVe_soc/gpio_out_pad[12] = 1 | striVe_soc/resetn = 1 |
| | |
| Net: gpio_pad[0]/dm<0> |Net: spi_ro_xtal_ena_core |
| s8iom0_gpiov2_pad/dm<0> = 1 | striVe_soc/spi_ro_xtal_ena = 1 |
| striVe_soc/gpio_mode0_pad[0] = 1 | striVe_spi/xtal_ena = 1 |
| | |
| Net: gpio_pad[0]/in |Net: spi_ro_reg_ena_core |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/spi_ro_reg_ena = 1 |
| striVe_soc/gpio_in_pad[0] = 1 | striVe_spi/reg_ena = 1 |
| | |
| Net: gpio_pad[0]/inp_dis |Net: irq_spi_core |
| s8iom0_gpiov2_pad/inp_dis = 1 | striVe_soc/irq_spi = 1 |
| striVe_soc/gpio_inenb_pad[0] = 1 | striVe_spi/irq = 1 |
| | |
| Net: gpio_pad[0]/oe_n |Net: trap_core |
| s8iom0_gpiov2_pad/oe_n = 1 | striVe_soc/trap = 1 |
| striVe_soc/gpio_outenb_pad[0] = 1 | striVe_spi/trap = 1 |
| | |
| Net: gpio_pad[0]/out |Net: spi_ro_mask_rev_core[3] |
| s8iom0_gpiov2_pad/out = 1 | striVe_soc/spi_ro_mask_rev[3] = 1 |
| striVe_soc/gpio_out_pad[0] = 1 | striVe_spi/mask_rev[3] = 1 |
| | |
| Net: gpio_pad[11]/dm<0> |Net: spi_ro_mask_rev_core[2] |
| s8iom0_gpiov2_pad/dm<0> = 1 | striVe_soc/spi_ro_mask_rev[2] = 1 |
| striVe_soc/gpio_mode0_pad[11] = 1 | striVe_spi/mask_rev[2] = 1 |
| | |
| Net: gpio_pad[11]/in |Net: spi_ro_mask_rev_core[1] |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/spi_ro_mask_rev[1] = 1 |
| striVe_soc/gpio_in_pad[11] = 1 | striVe_spi/mask_rev[1] = 1 |
| | |
| Net: gpio_pad[11]/inp_dis |Net: spi_ro_mask_rev_core[0] |
| s8iom0_gpiov2_pad/inp_dis = 1 | striVe_soc/spi_ro_mask_rev[0] = 1 |
| striVe_soc/gpio_inenb_pad[11] = 1 | striVe_spi/mask_rev[0] = 1 |
| | |
| Net: gpio_pad[11]/oe_n |Net: spi_ro_mfgr_id_core[11] |
| s8iom0_gpiov2_pad/oe_n = 1 | striVe_soc/spi_ro_mfgr_id[11] = 1 |
| striVe_soc/gpio_outenb_pad[11] = 1 | striVe_spi/mfgr_id[11] = 1 |
| | |
| Net: gpio_pad[11]/out |Net: spi_ro_mfgr_id_core[10] |
| s8iom0_gpiov2_pad/out = 1 | striVe_soc/spi_ro_mfgr_id[10] = 1 |
| striVe_soc/gpio_out_pad[11] = 1 | striVe_spi/mfgr_id[10] = 1 |
| | |
| Net: gpio_pad[10]/dm<0> |Net: spi_ro_mfgr_id_core[9] |
| s8iom0_gpiov2_pad/dm<0> = 1 | striVe_soc/spi_ro_mfgr_id[9] = 1 |
| striVe_soc/gpio_mode0_pad[10] = 1 | striVe_spi/mfgr_id[9] = 1 |
| | |
| Net: gpio_pad[10]/in |Net: spi_ro_mfgr_id_core[8] |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/spi_ro_mfgr_id[8] = 1 |
| striVe_soc/gpio_in_pad[10] = 1 | striVe_spi/mfgr_id[8] = 1 |
| | |
| Net: gpio_pad[10]/inp_dis |Net: spi_ro_mfgr_id_core[7] |
| s8iom0_gpiov2_pad/inp_dis = 1 | striVe_soc/spi_ro_mfgr_id[7] = 1 |
| striVe_soc/gpio_inenb_pad[10] = 1 | striVe_spi/mfgr_id[7] = 1 |
| | |
| Net: gpio_pad[10]/oe_n |Net: spi_ro_mfgr_id_core[6] |
| s8iom0_gpiov2_pad/oe_n = 1 | striVe_soc/spi_ro_mfgr_id[6] = 1 |
| striVe_soc/gpio_outenb_pad[10] = 1 | striVe_spi/mfgr_id[6] = 1 |
| | |
| Net: gpio_pad[10]/out |Net: spi_ro_mfgr_id_core[5] |
| s8iom0_gpiov2_pad/out = 1 | striVe_soc/spi_ro_mfgr_id[5] = 1 |
| striVe_soc/gpio_out_pad[10] = 1 | striVe_spi/mfgr_id[5] = 1 |
| | |
| Net: core/ser_tx |Net: spi_ro_mfgr_id_core[4] |
| s8iom0s8_top_gpio_ovtv2/out = 1 | striVe_soc/spi_ro_mfgr_id[4] = 1 |
| striVe_soc/ser_tx = 1 | striVe_spi/mfgr_id[4] = 1 |
| | |
| Net: core/flash_csb |Net: spi_ro_mfgr_id_core[3] |
| s8iom0_gpiov2_pad/out = 1 | striVe_soc/spi_ro_mfgr_id[3] = 1 |
| striVe_soc/flash_csb = 1 | striVe_spi/mfgr_id[3] = 1 |
| | |
| Net: flash_io1_pad/in |Net: spi_ro_mfgr_id_core[2] |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/spi_ro_mfgr_id[2] = 1 |
| striVe_soc/flash_io1_di = 1 | striVe_spi/mfgr_id[2] = 1 |
| | |
| Net: flash_io1_pad/out |Net: spi_ro_mfgr_id_core[1] |
| s8iom0_gpiov2_pad/out = 1 | striVe_soc/spi_ro_mfgr_id[1] = 1 |
| striVe_soc/flash_io1_do = 1 | striVe_spi/mfgr_id[1] = 1 |
| | |
| Net: clkrst/ext_reset |Net: spi_ro_mfgr_id_core[0] |
| striVe_clkrst/ext_reset = 1 | striVe_soc/spi_ro_mfgr_id[0] = 1 |
| striVe_spi/reset = 1 | striVe_spi/mfgr_id[0] = 1 |
| | |
| Net: core/clk |Net: spi_ro_prod_id_core[7] |
| striVe_clkrst/clk = 1 | striVe_soc/spi_ro_prod_id[7] = 1 |
| striVe_soc/clk = 1 | striVe_spi/prod_id[7] = 1 |
| | |
| Net: core/resetn |Net: spi_ro_prod_id_core[6] |
| striVe_clkrst/resetn = 1 | striVe_soc/spi_ro_prod_id[6] = 1 |
| striVe_soc/resetn = 1 | striVe_spi/prod_id[6] = 1 |
| | |
| Net: irq_pad/in |Net: spi_ro_prod_id_core[5] |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/spi_ro_prod_id[5] = 1 |
| striVe_soc/irq_pin = 1 | striVe_spi/prod_id[5] = 1 |
| | |
| Net: core/spi_ro_xtal_ena |Net: spi_ro_prod_id_core[4] |
| striVe_soc/spi_ro_xtal_ena = 1 | striVe_soc/spi_ro_prod_id[4] = 1 |
| striVe_spi/xtal_ena = 1 | striVe_spi/prod_id[4] = 1 |
| | |
| Net: core/spi_ro_reg_ena |Net: spi_ro_prod_id_core[3] |
| striVe_soc/spi_ro_reg_ena = 1 | striVe_soc/spi_ro_prod_id[3] = 1 |
| striVe_spi/reg_ena = 1 | striVe_spi/prod_id[3] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[11] |Net: spi_ro_prod_id_core[2] |
| striVe_soc/spi_ro_mfgr_id[11] = 1 | striVe_soc/spi_ro_prod_id[2] = 1 |
| striVe_spi/mfgr_id[11] = 1 | striVe_spi/prod_id[2] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[10] |Net: spi_ro_prod_id_core[1] |
| striVe_soc/spi_ro_mfgr_id[10] = 1 | striVe_soc/spi_ro_prod_id[1] = 1 |
| striVe_spi/mfgr_id[10] = 1 | striVe_spi/prod_id[1] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[9] |Net: spi_ro_prod_id_core[0] |
| striVe_soc/spi_ro_mfgr_id[9] = 1 | striVe_soc/spi_ro_prod_id[0] = 1 |
| striVe_spi/mfgr_id[9] = 1 | striVe_spi/prod_id[0] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[8] |Net: mask_rev[0] |
| striVe_soc/spi_ro_mfgr_id[8] = 1 | scs8hd_conb_1/LO = 1 |
| striVe_spi/mfgr_id[8] = 1 | striVe_spi/mask_rev_in[0] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[7] |Net: mask_rev[1] |
| striVe_soc/spi_ro_mfgr_id[7] = 1 | scs8hd_conb_1/LO = 1 |
| striVe_spi/mfgr_id[7] = 1 | striVe_spi/mask_rev_in[1] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[6] |Net: mask_rev[2] |
| striVe_soc/spi_ro_mfgr_id[6] = 1 | scs8hd_conb_1/LO = 1 |
| striVe_spi/mfgr_id[6] = 1 | striVe_spi/mask_rev_in[2] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[5] |Net: mask_rev[3] |
| striVe_soc/spi_ro_mfgr_id[5] = 1 | scs8hd_conb_1/LO = 1 |
| striVe_spi/mfgr_id[5] = 1 | striVe_spi/mask_rev_in[3] = 1 |
| | |
| Net: core/spi_ro_mfgr_id[4] |Net: porb_l |
| striVe_soc/spi_ro_mfgr_id[4] = 1 | striVe_spi/RSTB = 1 |
| striVe_spi/mfgr_id[4] = 1 | lvlshiftdown/X = 1 |
| | |
| Net: core/spi_ro_mfgr_id[3] |Net: vdd |
| striVe_soc/spi_ro_mfgr_id[3] = 1 | s8iom0_gpiov2_pad/hld_h_n = 36 |
| striVe_spi/mfgr_id[3] = 1 | s8iom0_gpiov2_pad/vddio = 36 |
| | s8iom0_gpiov2_pad/vdda = 36 |
| | s8iom0_gpiov2_pad/vswitch = 36 |
| | s8iom0s8_top_xres4v2/enable_h = 1 |
| | s8iom0s8_top_xres4v2/vdda = 1 |
| | s8iom0s8_top_xres4v2/vddio = 1 |
| | s8iom0s8_top_xres4v2/vswitch = 1 |
| | s8iom0s8_top_gpio_ovtv2/hld_h_n = 2 |
| | s8iom0s8_top_gpio_ovtv2/vddio = 2 |
| | s8iom0s8_top_gpio_ovtv2/vdda = 2 |
| | s8iom0s8_top_gpio_ovtv2/vswitch = 2 |
| | s8iom0_corner_pad/vddio = 4 |
| | s8iom0_corner_pad/vdda = 4 |
| | s8iom0_corner_pad/vswitch = 4 |
| | |
| Net: core/spi_ro_mfgr_id[2] |Net: vss |
| striVe_soc/spi_ro_mfgr_id[2] = 1 | s8iom0_gpiov2_pad/enable_vswitch_h = 36 |
| striVe_spi/mfgr_id[2] = 1 | s8iom0_gpiov2_pad/ib_mode_sel = 36 |
| | s8iom0_gpiov2_pad/vtrip_sel = 36 |
| | s8iom0_gpiov2_pad/slow = 36 |
| | s8iom0_gpiov2_pad/hld_ovr = 36 |
| | s8iom0_gpiov2_pad/analog_en = 30 |
| | s8iom0_gpiov2_pad/analog_sel = 34 |
| | s8iom0_gpiov2_pad/analog_pol = 35 |
| | s8iom0_gpiov2_pad/vssa = 36 |
| | s8iom0_gpiov2_pad/vssd = 36 |
| | s8iom0_gpiov2_pad/vssio = 36 |
| | s8iom0_gpiov2_pad/dm[2] = 12 |
| | s8iom0_gpiov2_pad/dm[1] = 12 |
| | s8iom0_gpiov2_pad/oe_n = 3 |
| | s8iom0_gpiov2_pad/dm[0] = 10 |
| | s8iom0_gpiov2_pad/out = 11 |
| | s8iom0s8_top_xres4v2/disable_pullup_h = |
| | s8iom0s8_top_xres4v2/en_vddio_sig_h = 1 |
| | s8iom0s8_top_xres4v2/inp_sel_h = 1 |
| | s8iom0s8_top_xres4v2/filt_in_h = 1 |
| | s8iom0s8_top_xres4v2/pullup_h = 1 |
| | s8iom0s8_top_xres4v2/vssa = 1 |
| | s8iom0s8_top_xres4v2/vssd = 1 |
| | s8iom0s8_top_xres4v2/vssio = 1 |
| | s8iom0s8_top_gpio_ovtv2/out = 1 |
| | s8iom0s8_top_gpio_ovtv2/enable_vswitch_h |
| | s8iom0s8_top_gpio_ovtv2/vtrip_sel = 2 |
| | s8iom0s8_top_gpio_ovtv2/slow = 2 |
| | s8iom0s8_top_gpio_ovtv2/slew_ctl[1] = 2 |
| | s8iom0s8_top_gpio_ovtv2/slew_ctl[0] = 2 |
| | s8iom0s8_top_gpio_ovtv2/hld_ovr = 2 |
| | s8iom0s8_top_gpio_ovtv2/analog_en = 2 |
| | s8iom0s8_top_gpio_ovtv2/analog_sel = 2 |
| | s8iom0s8_top_gpio_ovtv2/analog_pol = 2 |
| | s8iom0s8_top_gpio_ovtv2/dm[2] = 1 |
| | s8iom0s8_top_gpio_ovtv2/dm[1] = 1 |
| | s8iom0s8_top_gpio_ovtv2/ib_mode_sel[1] = |
| | s8iom0s8_top_gpio_ovtv2/ib_mode_sel[0] = |
| | s8iom0s8_top_gpio_ovtv2/vssa = 2 |
| | s8iom0s8_top_gpio_ovtv2/vssd = 2 |
| | s8iom0s8_top_gpio_ovtv2/vssio = 2 |
| | s8iom0s8_top_gpio_ovtv2/oe_n = 1 |
| | s8iom0s8_top_gpio_ovtv2/dm[0] = 1 |
| | s8iom0_corner_pad/vssa = 4 |
| | s8iom0_corner_pad/vssd = 4 |
| | s8iom0_corner_pad/vssio = 4 |
| | lvlshiftdown/vnb = 1 |
| | lvlshiftdown/vgnd = 1 |
| | |
| Net: core/spi_ro_mfgr_id[1] |Net: vdd1v8 |
| striVe_soc/spi_ro_mfgr_id[1] = 1 | s8iom0_gpiov2_pad/enable_vddio = 36 |
| striVe_spi/mfgr_id[1] = 1 | s8iom0_gpiov2_pad/vccd = 36 |
| | s8iom0_gpiov2_pad/vcchib = 36 |
| | s8iom0_gpiov2_pad/oe_n = 12 |
| | s8iom0_gpiov2_pad/dm[0] = 6 |
| | s8iom0_gpiov2_pad/inp_dis = 10 |
| | s8iom0_gpiov2_pad/dm[2] = 4 |
| | s8iom0_gpiov2_pad/dm[1] = 4 |
| | s8iom0_gpiov2_pad/analog_en = 6 |
| | s8iom0_gpiov2_pad/analog_sel = 2 |
| | s8iom0_gpiov2_pad/analog_pol = 1 |
| | s8iom0s8_top_xres4v2/enable_vddio = 1 |
| | s8iom0s8_top_xres4v2/vccd = 1 |
| | s8iom0s8_top_xres4v2/vcchib = 1 |
| | s8iom0s8_top_gpio_ovtv2/oe_n = 1 |
| | s8iom0s8_top_gpio_ovtv2/enable_vddio = 2 |
| | s8iom0s8_top_gpio_ovtv2/hys_trim = 2 |
| | s8iom0s8_top_gpio_ovtv2/dm[0] = 1 |
| | s8iom0s8_top_gpio_ovtv2/vinref = 2 |
| | s8iom0s8_top_gpio_ovtv2/vccd = 2 |
| | s8iom0s8_top_gpio_ovtv2/vcchib = 2 |
| | s8iom0s8_top_gpio_ovtv2/inp_dis = 1 |
| | s8iom0s8_top_gpio_ovtv2/dm[2] = 1 |
| | s8iom0s8_top_gpio_ovtv2/dm[1] = 1 |
| | s8iom0_corner_pad/vccd = 4 |
| | s8iom0_corner_pad/vcchib = 4 |
| | lvlshiftdown/vpwr = 1 |
| | lvlshiftdown/vpb = 1 |
| | |
| Net: core/spi_ro_mfgr_id[0] |(no matching net) |
| striVe_soc/spi_ro_mfgr_id[0] = 1 | |
| striVe_spi/mfgr_id[0] = 1 | |
| | |
| Net: core/spi_ro_prod_id[7] |(no matching net) |
| striVe_soc/spi_ro_prod_id[7] = 1 | |
| striVe_spi/prod_id[7] = 1 | |
| | |
| Net: core/spi_ro_prod_id[6] |(no matching net) |
| striVe_soc/spi_ro_prod_id[6] = 1 | |
| striVe_spi/prod_id[6] = 1 | |
| | |
| Net: core/spi_ro_prod_id[5] |(no matching net) |
| striVe_soc/spi_ro_prod_id[5] = 1 | |
| striVe_spi/prod_id[5] = 1 | |
| | |
| Net: core/spi_ro_prod_id[4] |(no matching net) |
| striVe_soc/spi_ro_prod_id[4] = 1 | |
| striVe_spi/prod_id[4] = 1 | |
| | |
| Net: core/spi_ro_prod_id[3] |(no matching net) |
| striVe_soc/spi_ro_prod_id[3] = 1 | |
| striVe_spi/prod_id[3] = 1 | |
| | |
| Net: core/spi_ro_prod_id[2] |(no matching net) |
| striVe_soc/spi_ro_prod_id[2] = 1 | |
| striVe_spi/prod_id[2] = 1 | |
| | |
| Net: core/spi_ro_prod_id[1] |(no matching net) |
| striVe_soc/spi_ro_prod_id[1] = 1 | |
| striVe_spi/prod_id[1] = 1 | |
| | |
| Net: core/spi_ro_prod_id[0] |(no matching net) |
| striVe_soc/spi_ro_prod_id[0] = 1 | |
| striVe_spi/prod_id[0] = 1 | |
| | |
| Net: core/spi_ro_mask_rev[3] |(no matching net) |
| striVe_soc/spi_ro_mask_rev[3] = 1 | |
| striVe_spi/mask_rev[3] = 1 | |
| | |
| Net: core/spi_ro_mask_rev[2] |(no matching net) |
| striVe_soc/spi_ro_mask_rev[2] = 1 | |
| striVe_spi/mask_rev[2] = 1 | |
| | |
| Net: core/spi_ro_mask_rev[1] |(no matching net) |
| striVe_soc/spi_ro_mask_rev[1] = 1 | |
| striVe_spi/mask_rev[1] = 1 | |
| | |
| Net: core/trap |(no matching net) |
| striVe_soc/trap = 1 | |
| striVe_spi/trap = 1 | |
| | |
| Net: core/flash_clk |(no matching net) |
| striVe_soc/flash_clk = 1 | |
| s8iom0_gpiov2_pad/out = 1 | |
| | |
| Net: flash_io0_pad/out |(no matching net) |
| striVe_soc/flash_io0_do = 1 | |
| s8iom0_gpiov2_pad/out = 1 | |
| | |
| Net: flash_io0_pad/in |(no matching net) |
| striVe_soc/flash_io0_di = 1 | |
| s8iom0_gpiov2_pad/in = 1 | |
| | |
| Net: mask_rev_value[3]/LO |(no matching net) |
| striVe_spi/mask_rev_in[3] = 1 | |
| scs8hd_conb_1/LO = 1 | |
| | |
| Net: mask_rev_value[2]/LO |(no matching net) |
| striVe_spi/mask_rev_in[2] = 1 | |
| scs8hd_conb_1/LO = 1 | |
| | |
| Net: mask_rev_value[1]/LO |(no matching net) |
| striVe_spi/mask_rev_in[1] = 1 | |
| scs8hd_conb_1/LO = 1 | |
| | |
| Net: RSTB_pad/pad_a_esd_h |(no matching net) |
| s8iom0s8_top_xres4v2/pad_a_esd_h = 1 | |
| s8iom0s8_top_xres4v2/tie_weak_hi_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_105_ |
| | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| (no matching net) |Net: _noconnect_50_ |
| | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_104_ |
| | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| (no matching net) |Net: _noconnect_49_ |
| | s8iom0_gpiov2_pad/in_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_103_ |
| | s8iom0_gpiov2_pad/in = 1 |
| | |
| (no matching net) |Net: _noconnect_48_ |
| | s8iom0_gpiov2_pad/in = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_102_ |
| | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| (no matching net) |Net: _noconnect_47_ |
| | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_101_ |
| | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| (no matching net) |Net: _noconnect_46_ |
| | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_100_ |
| | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| (no matching net) |Net: _noconnect_45_ |
| | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: SDO |
| | s8iom0_gpiov2_pad/pad = 1 |
| | |
| (no matching net) |Net: xo |
| | s8iom0_gpiov2_pad/pad = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: xo_pad/tie_hi_esd |(no matching net) |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | |
| | |
| Net: SDO_pad/tie_hi_esd |(no matching net) |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: xo |(no matching net) |
| s8iom0_gpiov2_pad/pad = 1 | |
| | |
| Net: SDO |(no matching net) |
| s8iom0_gpiov2_pad/pad = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: xo_pad/pad_a_esd_1_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | |
| | |
| Net: SDO_pad/pad_a_esd_1_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: xo_pad/pad_a_esd_0_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | |
| | |
| Net: SDO_pad/pad_a_esd_0_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: xo_pad/pad_a_noesd_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | |
| | |
| Net: SDO_pad/pad_a_noesd_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: xo_pad/in_h |(no matching net) |
| s8iom0_gpiov2_pad/in_h = 1 | |
| | |
| Net: SDO_pad/in_h |(no matching net) |
| s8iom0_gpiov2_pad/in_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: loopb15 |
| | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| (no matching net) |Net: loopb14 |
| | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: loopb11 |
| | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| | |
| (no matching net) |Net: loopb2 |
| | s8iom0_gpiov2_pad/enable_inp_h = 1 |
| | s8iom0_gpiov2_pad/tie_lo_esd = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: xo_pad/tie_lo_esd |(no matching net) |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | |
| | |
| Net: SDO_pad/tie_lo_esd |(no matching net) |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: SCK_pad/tie_lo_esd |(no matching net) |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | |
| | |
| Net: xclk_pad/tie_lo_esd |(no matching net) |
| s8iom0_gpiov2_pad/enable_inp_h = 1 | |
| s8iom0_gpiov2_pad/tie_lo_esd = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_123_ |
| | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| | |
| (no matching net) |Net: _noconnect_118_ |
| | s8iom0_gpiov2_pad/tie_hi_esd = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_122_ |
| | s8iom0_gpiov2_pad/in_h = 1 |
| | |
| (no matching net) |Net: SCK_core_h |
| | s8iom0_gpiov2_pad/in_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_121_ |
| | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| | |
| (no matching net) |Net: _noconnect_117_ |
| | s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_120_ |
| | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| | |
| (no matching net) |Net: _noconnect_116_ |
| | s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_119_ |
| | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| | |
| (no matching net) |Net: _noconnect_115_ |
| | s8iom0_gpiov2_pad/pad_a_noesd_h = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: xclk |
| | s8iom0_gpiov2_pad/pad = 1 |
| | |
| (no matching net) |Net: SCK |
| | s8iom0_gpiov2_pad/pad = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_12_[1] |
| | s8iom0_vccd_lvc_pad/bdy2_b2b = 1 |
| | |
| (no matching net) |Net: _noconnect_12_[0] |
| | s8iom0_vccd_lvc_pad/bdy2_b2b = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_16_[1] |
| | s8iom0_vccd_lvc_pad/src_bdy_lvc2 = 1 |
| | |
| (no matching net) |Net: _noconnect_16_[0] |
| | s8iom0_vccd_lvc_pad/src_bdy_lvc2 = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_15_[1] |
| | s8iom0_vccd_lvc_pad/src_bdy_lvc1 = 1 |
| | |
| (no matching net) |Net: _noconnect_15_[0] |
| | s8iom0_vccd_lvc_pad/src_bdy_lvc1 = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_14_[1] |
| | s8iom0_vccd_lvc_pad/drn_lvc2 = 1 |
| | |
| (no matching net) |Net: _noconnect_14_[0] |
| | s8iom0_vccd_lvc_pad/drn_lvc2 = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: _noconnect_13_[1] |
| | s8iom0_vccd_lvc_pad/drn_lvc1 = 1 |
| | |
| (no matching net) |Net: _noconnect_13_[0] |
| | s8iom0_vccd_lvc_pad/drn_lvc1 = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vddiohclamp[1]/src_bdy_hvc |(no matching net) |
| s8iom0_vdda_hvc_pad/src_bdy_hvc = 1 | |
| | |
| Net: vdd3v3hclamp[1]/src_bdy_hvc |(no matching net) |
| s8iom0_vdda_hvc_pad/src_bdy_hvc = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vddiohclamp[1]/drn_hvc |(no matching net) |
| s8iom0_vdda_hvc_pad/drn_hvc = 1 | |
| | |
| Net: vdd3v3hclamp[1]/drn_hvc |(no matching net) |
| s8iom0_vdda_hvc_pad/drn_hvc = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8hclamp[0]/src_bdy_hvc |(no matching net) |
| s8iom0_vccd_hvc_pad/src_bdy_hvc = 1 | |
| | |
| Net: vdd1v8hclamp[1]/src_bdy_hvc |(no matching net) |
| s8iom0_vccd_hvc_pad/src_bdy_hvc = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8hclamp[0]/drn_hvc |(no matching net) |
| s8iom0_vccd_hvc_pad/drn_hvc = 1 | |
| | |
| Net: vdd1v8hclamp[1]/drn_hvc |(no matching net) |
| s8iom0_vccd_hvc_pad/drn_hvc = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8lclamp[0]/vssi |(no matching net) |
| s8iom0_vccd_lvc_pad/vssi = 1 | |
| | |
| Net: vdd1v8lclamp[1]/vssi |(no matching net) |
| s8iom0_vccd_lvc_pad/vssi = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8lclamp[0]/bdy2_b2b |(no matching net) |
| s8iom0_vccd_lvc_pad/bdy2_b2b = 1 | |
| | |
| Net: vdd1v8lclamp[1]/bdy2_b2b |(no matching net) |
| s8iom0_vccd_lvc_pad/bdy2_b2b = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8lclamp[0]/src_bdy_lvc2 |(no matching net) |
| s8iom0_vccd_lvc_pad/src_bdy_lvc2 = 1 | |
| | |
| Net: vdd1v8lclamp[1]/src_bdy_lvc2 |(no matching net) |
| s8iom0_vccd_lvc_pad/src_bdy_lvc2 = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8lclamp[0]/src_bdy_lvc1 |(no matching net) |
| s8iom0_vccd_lvc_pad/src_bdy_lvc1 = 1 | |
| | |
| Net: vdd1v8lclamp[1]/src_bdy_lvc1 |(no matching net) |
| s8iom0_vccd_lvc_pad/src_bdy_lvc1 = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8lclamp[0]/drn_lvc2 |(no matching net) |
| s8iom0_vccd_lvc_pad/drn_lvc2 = 1 | |
| | |
| Net: vdd1v8lclamp[1]/drn_lvc2 |(no matching net) |
| s8iom0_vccd_lvc_pad/drn_lvc2 = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: vdd1v8lclamp[0]/drn_lvc1 |(no matching net) |
| s8iom0_vccd_lvc_pad/drn_lvc1 = 1 | |
| | |
| Net: vdd1v8lclamp[1]/drn_lvc1 |(no matching net) |
| s8iom0_vccd_lvc_pad/drn_lvc1 = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: SCK_pad/tie_hi_esd |(no matching net) |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | |
| | |
| Net: xclk_pad/tie_hi_esd |(no matching net) |
| s8iom0_gpiov2_pad/tie_hi_esd = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: SCK |(no matching net) |
| s8iom0_gpiov2_pad/pad = 1 | |
| | |
| Net: xclk |(no matching net) |
| s8iom0_gpiov2_pad/pad = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: SCK_pad/pad_a_esd_1_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | |
| | |
| Net: xclk_pad/pad_a_esd_1_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_1_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: SCK_pad/pad_a_esd_0_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | |
| | |
| Net: xclk_pad/pad_a_esd_0_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_esd_0_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: SCK_pad/pad_a_noesd_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | |
| | |
| Net: xclk_pad/pad_a_noesd_h |(no matching net) |
| s8iom0_gpiov2_pad/pad_a_noesd_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: SCK_pad/in_h |(no matching net) |
| s8iom0_gpiov2_pad/in_h = 1 | |
| | |
| Net: xclk_pad/in_h |(no matching net) |
| s8iom0_gpiov2_pad/in_h = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: s8iom0_vddio_hvc_pad_1/src_bdy_hvc |(no matching net) |
| s8iom0_vddio_hvc_pad/src_bdy_hvc = 1 | |
| | |
| Net: s8iom0_vddio_hvc_pad_0/src_bdy_hvc |(no matching net) |
| s8iom0_vddio_hvc_pad/src_bdy_hvc = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: s8iom0_vddio_hvc_pad_1/drn_hvc |(no matching net) |
| s8iom0_vddio_hvc_pad/drn_hvc = 1 | |
| | |
| Net: s8iom0_vddio_hvc_pad_0/drn_hvc |(no matching net) |
| s8iom0_vddio_hvc_pad/drn_hvc = 1 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching net) |Net: vssio_q |
| | s8iom0_gpiov2_pad/vssio_q = 36 |
| | s8iom0s8_top_xres4v2/vssio_q = 1 |
| | s8iom0s8_top_gpio_ovtv2/vssio_q = 2 |
| | s8iom0_corner_pad/vssio_q = 4 |
| | |
| (no matching net) |Net: vddio_q |
| | s8iom0_gpiov2_pad/vddio_q = 36 |
| | s8iom0s8_top_xres4v2/vddio_q = 1 |
| | s8iom0s8_top_gpio_ovtv2/vddio_q = 2 |
| | s8iom0_corner_pad/vddio_q = 4 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: flash_io0_pad/oe_n |Net: spi_ro_pll_trim_core[0] |
| striVe_soc/flash_io0_oeb = 1 | striVe_soc/spi_ro_pll_trim[0] = 1 |
| s8iom0_gpiov2_pad/dm<0> = 1 | striVe_spi/pll_trim[0] = 1 |
| s8iom0_gpiov2_pad/oe_n = 1 | digital_pll/ext_trim[0] = 1 |
| | |
| Net: SCK_pad/in |Net: spi_ro_pll_trim_core[1] |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/spi_ro_pll_trim[1] = 1 |
| striVe_soc/spi_sck = 1 | striVe_spi/pll_trim[1] = 1 |
| striVe_spi/SCK = 1 | digital_pll/ext_trim[1] = 1 |
| | |
| Net: flash_io1_pad/oe_n |Net: spi_ro_pll_trim_core[2] |
| s8iom0_gpiov2_pad/dm<0> = 1 | striVe_soc/spi_ro_pll_trim[2] = 1 |
| s8iom0_gpiov2_pad/oe_n = 1 | striVe_spi/pll_trim[2] = 1 |
| striVe_soc/flash_io1_oeb = 1 | digital_pll/ext_trim[2] = 1 |
| | |
| Net: gpio_pad[10]/dm<1> |Net: spi_ro_pll_trim_core[3] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[3] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[3] = 1 |
| striVe_soc/gpio_mode1_pad[10] = 1 | digital_pll/ext_trim[3] = 1 |
| | |
| Net: gpio_pad[11]/dm<2> |Net: spi_ro_pll_trim_core[4] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[4] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[4] = 1 |
| striVe_soc/gpio_mode1_pad[11] = 1 | digital_pll/ext_trim[4] = 1 |
| | |
| Net: gpio_pad[0]/dm<2> |Net: spi_ro_pll_trim_core[5] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[5] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[5] = 1 |
| striVe_soc/gpio_mode1_pad[0] = 1 | digital_pll/ext_trim[5] = 1 |
| | |
| Net: gpio_pad[12]/dm<1> |Net: spi_ro_pll_trim_core[6] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[6] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[6] = 1 |
| striVe_soc/gpio_mode1_pad[12] = 1 | digital_pll/ext_trim[6] = 1 |
| | |
| Net: gpio_pad[1]/dm<1> |Net: spi_ro_pll_trim_core[7] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[7] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[7] = 1 |
| striVe_soc/gpio_mode1_pad[1] = 1 | digital_pll/ext_trim[7] = 1 |
| | |
| Net: gpio_pad[13]/dm<1> |Net: spi_ro_pll_trim_core[8] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[8] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[8] = 1 |
| striVe_soc/gpio_mode1_pad[13] = 1 | digital_pll/ext_trim[8] = 1 |
| | |
| Net: gpio_pad[2]/dm<2> |Net: spi_ro_pll_trim_core[9] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[9] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[9] = 1 |
| striVe_soc/gpio_mode1_pad[2] = 1 | digital_pll/ext_trim[9] = 1 |
| | |
| Net: gpio_pad[14]/dm<1> |Net: spi_ro_pll_trim_core[10] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[10] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[10] = 1 |
| striVe_soc/gpio_mode1_pad[14] = 1 | digital_pll/ext_trim[10] = 1 |
| | |
| Net: flash_io2_pad/oe_n |Net: spi_ro_pll_trim_core[11] |
| s8iom0_gpiov2_pad/dm<0> = 1 | striVe_soc/spi_ro_pll_trim[11] = 1 |
| s8iom0_gpiov2_pad/oe_n = 1 | striVe_spi/pll_trim[11] = 1 |
| striVe_soc/flash_io2_oeb = 1 | digital_pll/ext_trim[11] = 1 |
| | |
| Net: gpio_pad[3]/dm<2> |Net: spi_ro_pll_trim_core[12] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[12] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[12] = 1 |
| striVe_soc/gpio_mode1_pad[3] = 1 | digital_pll/ext_trim[12] = 1 |
| | |
| Net: gpio_pad[15]/dm<1> |Net: spi_ro_pll_trim_core[13] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[13] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[13] = 1 |
| striVe_soc/gpio_mode1_pad[15] = 1 | digital_pll/ext_trim[13] = 1 |
| | |
| Net: gpio_pad[4]/dm<1> |Net: spi_ro_pll_trim_core[14] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[14] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[14] = 1 |
| striVe_soc/gpio_mode1_pad[4] = 1 | digital_pll/ext_trim[14] = 1 |
| | |
| Net: gpio_pad[5]/dm<1> |Net: spi_ro_pll_trim_core[15] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[15] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[15] = 1 |
| striVe_soc/gpio_mode1_pad[5] = 1 | digital_pll/ext_trim[15] = 1 |
| | |
| Net: gpio_pad[6]/dm<1> |Net: spi_ro_pll_trim_core[16] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[16] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[16] = 1 |
| striVe_soc/gpio_mode1_pad[6] = 1 | digital_pll/ext_trim[16] = 1 |
| | |
| Net: gpio_pad[7]/dm<1> |Net: spi_ro_pll_trim_core[17] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[17] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[17] = 1 |
| striVe_soc/gpio_mode1_pad[7] = 1 | digital_pll/ext_trim[17] = 1 |
| | |
| Net: gpio_pad[8]/dm<1> |Net: spi_ro_pll_trim_core[18] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[18] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[18] = 1 |
| striVe_soc/gpio_mode1_pad[8] = 1 | digital_pll/ext_trim[18] = 1 |
| | |
| Net: gpio_pad[9]/dm<1> |Net: spi_ro_pll_trim_core[19] |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/spi_ro_pll_trim[19] = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_trim[19] = 1 |
| striVe_soc/gpio_mode1_pad[9] = 1 | digital_pll/ext_trim[19] = 1 |
| | |
| Net: xclk_pad/in |Net: spi_ro_pll_trim_core[20] |
| s8iom0_gpiov2_pad/in = 1 | striVe_soc/spi_ro_pll_trim[20] = 1 |
| striVe_clkrst/ext_clk = 1 | striVe_spi/pll_trim[20] = 1 |
| striVe_soc/ext_clk = 1 | digital_pll/ext_trim[20] = 1 |
| | |
| Net: pll/ext_trim[0] |Net: spi_ro_pll_trim_core[21] |
| digital_pll/ext_trim[0] = 1 | striVe_soc/spi_ro_pll_trim[21] = 1 |
| striVe_soc/spi_ro_pll_trim[0] = 1 | striVe_spi/pll_trim[21] = 1 |
| striVe_spi/pll_trim[0] = 1 | digital_pll/ext_trim[21] = 1 |
| | |
| Net: pll/ext_trim[1] |Net: spi_ro_pll_trim_core[22] |
| digital_pll/ext_trim[1] = 1 | striVe_soc/spi_ro_pll_trim[22] = 1 |
| striVe_soc/spi_ro_pll_trim[1] = 1 | striVe_spi/pll_trim[22] = 1 |
| striVe_spi/pll_trim[1] = 1 | digital_pll/ext_trim[22] = 1 |
| | |
| Net: pll/ext_trim[2] |Net: spi_ro_pll_trim_core[23] |
| digital_pll/ext_trim[2] = 1 | striVe_soc/spi_ro_pll_trim[23] = 1 |
| striVe_soc/spi_ro_pll_trim[2] = 1 | striVe_spi/pll_trim[23] = 1 |
| striVe_spi/pll_trim[2] = 1 | digital_pll/ext_trim[23] = 1 |
| | |
| Net: pll/ext_trim[3] |Net: spi_ro_pll_trim_core[24] |
| digital_pll/ext_trim[3] = 1 | striVe_soc/spi_ro_pll_trim[24] = 1 |
| striVe_soc/spi_ro_pll_trim[3] = 1 | striVe_spi/pll_trim[24] = 1 |
| striVe_spi/pll_trim[3] = 1 | digital_pll/ext_trim[24] = 1 |
| | |
| Net: pll/ext_trim[4] |Net: spi_ro_pll_trim_core[25] |
| digital_pll/ext_trim[4] = 1 | striVe_soc/spi_ro_pll_trim[25] = 1 |
| striVe_soc/spi_ro_pll_trim[4] = 1 | striVe_spi/pll_trim[25] = 1 |
| striVe_spi/pll_trim[4] = 1 | digital_pll/ext_trim[25] = 1 |
| | |
| Net: pll/ext_trim[5] |Net: spi_ro_pll_sel_core[0] |
| digital_pll/ext_trim[5] = 1 | striVe_soc/spi_ro_pll_sel[0] = 1 |
| striVe_soc/spi_ro_pll_trim[5] = 1 | striVe_spi/pll_sel[0] = 1 |
| striVe_spi/pll_trim[5] = 1 | digital_pll/sel[0] = 1 |
| | |
| Net: pll/ext_trim[6] |Net: spi_ro_pll_sel_core[1] |
| digital_pll/ext_trim[6] = 1 | striVe_soc/spi_ro_pll_sel[1] = 1 |
| striVe_soc/spi_ro_pll_trim[6] = 1 | striVe_spi/pll_sel[1] = 1 |
| striVe_spi/pll_trim[6] = 1 | digital_pll/sel[1] = 1 |
| | |
| Net: pll/ext_trim[7] |Net: spi_ro_pll_sel_core[2] |
| digital_pll/ext_trim[7] = 1 | striVe_soc/spi_ro_pll_sel[2] = 1 |
| striVe_soc/spi_ro_pll_trim[7] = 1 | striVe_spi/pll_sel[2] = 1 |
| striVe_spi/pll_trim[7] = 1 | digital_pll/sel[2] = 1 |
| | |
| Net: pll/ext_trim[8] |Net: spi_ro_pll_div_core[0] |
| digital_pll/ext_trim[8] = 1 | striVe_soc/spi_ro_pll_div[0] = 1 |
| striVe_soc/spi_ro_pll_trim[8] = 1 | striVe_spi/pll_div[0] = 1 |
| striVe_spi/pll_trim[8] = 1 | digital_pll/div[0] = 1 |
| | |
| Net: pll/ext_trim[9] |Net: spi_ro_pll_div_core[1] |
| digital_pll/ext_trim[9] = 1 | striVe_soc/spi_ro_pll_div[1] = 1 |
| striVe_soc/spi_ro_pll_trim[9] = 1 | striVe_spi/pll_div[1] = 1 |
| striVe_spi/pll_trim[9] = 1 | digital_pll/div[1] = 1 |
| | |
| Net: pll/ext_trim[10] |Net: spi_ro_pll_div_core[2] |
| digital_pll/ext_trim[10] = 1 | striVe_soc/spi_ro_pll_div[2] = 1 |
| striVe_soc/spi_ro_pll_trim[10] = 1 | striVe_spi/pll_div[2] = 1 |
| striVe_spi/pll_trim[10] = 1 | digital_pll/div[2] = 1 |
| | |
| Net: pll/ext_trim[11] |Net: spi_ro_pll_div_core[3] |
| digital_pll/ext_trim[11] = 1 | striVe_soc/spi_ro_pll_div[3] = 1 |
| striVe_soc/spi_ro_pll_trim[11] = 1 | striVe_spi/pll_div[3] = 1 |
| striVe_spi/pll_trim[11] = 1 | digital_pll/div[3] = 1 |
| | |
| Net: pll/ext_trim[12] |Net: spi_ro_pll_div_core[4] |
| digital_pll/ext_trim[12] = 1 | striVe_soc/spi_ro_pll_div[4] = 1 |
| striVe_soc/spi_ro_pll_trim[12] = 1 | striVe_spi/pll_div[4] = 1 |
| striVe_spi/pll_trim[12] = 1 | digital_pll/div[4] = 1 |
| | |
| Net: pll/ext_trim[13] |Net: spi_ro_pll_dco_ena_core |
| digital_pll/ext_trim[13] = 1 | striVe_soc/spi_ro_pll_dco_ena = 1 |
| striVe_soc/spi_ro_pll_trim[13] = 1 | striVe_spi/pll_dco_ena = 1 |
| striVe_spi/pll_trim[13] = 1 | digital_pll/dco = 1 |
| | |
| Net: pll/ext_trim[14] |Net: pll_clk_core |
| digital_pll/ext_trim[14] = 1 | striVe_clkrst/pll_clk = 1 |
| striVe_soc/spi_ro_pll_trim[14] = 1 | striVe_soc/pll_clk = 1 |
| striVe_spi/pll_trim[14] = 1 | digital_pll/clockc = 1 |
| | |
| Net: pll/ext_trim[15] |Net: flash_io3_oeb_core |
| digital_pll/ext_trim[15] = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/spi_ro_pll_trim[15] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| striVe_spi/pll_trim[15] = 1 | striVe_soc/flash_io3_oeb = 1 |
| | |
| Net: pll/ext_trim[16] |Net: flash_io2_oeb_core |
| digital_pll/ext_trim[16] = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/spi_ro_pll_trim[16] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| striVe_spi/pll_trim[16] = 1 | striVe_soc/flash_io2_oeb = 1 |
| | |
| Net: pll/ext_trim[17] |Net: flash_io1_oeb_core |
| digital_pll/ext_trim[17] = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/spi_ro_pll_trim[17] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| striVe_spi/pll_trim[17] = 1 | striVe_soc/flash_io1_oeb = 1 |
| | |
| Net: pll/ext_trim[18] |Net: flash_io0_oeb_core |
| digital_pll/ext_trim[18] = 1 | s8iom0_gpiov2_pad/oe_n = 1 |
| striVe_soc/spi_ro_pll_trim[18] = 1 | s8iom0_gpiov2_pad/dm[0] = 1 |
| striVe_spi/pll_trim[18] = 1 | striVe_soc/flash_io0_oeb = 1 |
| | |
| Net: pll/ext_trim[19] |Net: ext_clk_core |
| digital_pll/ext_trim[19] = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/spi_ro_pll_trim[19] = 1 | striVe_clkrst/ext_clk = 1 |
| striVe_spi/pll_trim[19] = 1 | striVe_soc/ext_clk = 1 |
| | |
| Net: pll/ext_trim[20] |Net: SCK_core |
| digital_pll/ext_trim[20] = 1 | s8iom0_gpiov2_pad/in = 1 |
| striVe_soc/spi_ro_pll_trim[20] = 1 | striVe_soc/spi_sck = 1 |
| striVe_spi/pll_trim[20] = 1 | striVe_spi/SCK = 1 |
| | |
| Net: pll/ext_trim[21] |Net: gpio_mode1_core[0] |
| digital_pll/ext_trim[21] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_trim[21] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_trim[21] = 1 | striVe_soc/gpio_mode1_pad[0] = 1 |
| | |
| Net: pll/ext_trim[22] |Net: gpio_mode1_core[1] |
| digital_pll/ext_trim[22] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_trim[22] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_trim[22] = 1 | striVe_soc/gpio_mode1_pad[1] = 1 |
| | |
| Net: pll/ext_trim[23] |Net: gpio_mode1_core[2] |
| digital_pll/ext_trim[23] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_trim[23] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_trim[23] = 1 | striVe_soc/gpio_mode1_pad[2] = 1 |
| | |
| Net: pll/ext_trim[24] |Net: gpio_mode1_core[3] |
| digital_pll/ext_trim[24] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_trim[24] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_trim[24] = 1 | striVe_soc/gpio_mode1_pad[3] = 1 |
| | |
| Net: pll/ext_trim[25] |Net: gpio_mode1_core[4] |
| digital_pll/ext_trim[25] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_trim[25] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_trim[25] = 1 | striVe_soc/gpio_mode1_pad[4] = 1 |
| | |
| Net: pll/dco |Net: gpio_mode1_core[5] |
| digital_pll/dco = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_dco_ena = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_dco_ena = 1 | striVe_soc/gpio_mode1_pad[5] = 1 |
| | |
| Net: pll/sel[0] |Net: gpio_mode1_core[6] |
| digital_pll/sel[0] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_sel[0] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_sel[0] = 1 | striVe_soc/gpio_mode1_pad[6] = 1 |
| | |
| Net: pll/sel[1] |Net: gpio_mode1_core[7] |
| digital_pll/sel[1] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_sel[1] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_sel[1] = 1 | striVe_soc/gpio_mode1_pad[7] = 1 |
| | |
| Net: pll/sel[2] |Net: gpio_mode1_core[8] |
| digital_pll/sel[2] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_sel[2] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_sel[2] = 1 | striVe_soc/gpio_mode1_pad[8] = 1 |
| | |
| Net: pll/div[0] |Net: gpio_mode1_core[9] |
| digital_pll/div[0] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_div[0] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_div[0] = 1 | striVe_soc/gpio_mode1_pad[9] = 1 |
| | |
| Net: pll/div[1] |Net: gpio_mode1_core[10] |
| digital_pll/div[1] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_div[1] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_div[1] = 1 | striVe_soc/gpio_mode1_pad[10] = 1 |
| | |
| Net: pll/div[2] |Net: gpio_mode1_core[11] |
| digital_pll/div[2] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_div[2] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_div[2] = 1 | striVe_soc/gpio_mode1_pad[11] = 1 |
| | |
| Net: pll/div[3] |Net: gpio_mode1_core[12] |
| digital_pll/div[3] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_div[3] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_div[3] = 1 | striVe_soc/gpio_mode1_pad[12] = 1 |
| | |
| Net: pll/div[4] |Net: gpio_mode1_core[13] |
| digital_pll/div[4] = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/spi_ro_pll_div[4] = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_div[4] = 1 | striVe_soc/gpio_mode1_pad[13] = 1 |
| | |
| Net: pll/clockc |Net: gpio_mode1_core[14] |
| digital_pll/clockc = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_clkrst/pll_clk = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_soc/pll_clk = 1 | striVe_soc/gpio_mode1_pad[14] = 1 |
| | |
| Net: flash_io3_pad/oe_n |Net: gpio_mode1_core[15] |
| s8iom0_gpiov2_pad/dm<0> = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| s8iom0_gpiov2_pad/oe_n = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_soc/flash_io3_oeb = 1 | striVe_soc/gpio_mode1_pad[15] = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Net: core/flash_io0_ieb |Net: ext_clk_sel_core |
| striVe_soc/flash_io0_ieb = 1 | striVe_clkrst/ext_clk_sel = 1 |
| s8iom0_gpiov2_pad/dm<2> = 1 | striVe_soc/ext_clk_sel = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | striVe_spi/pll_bypass = 1 |
| s8iom0_gpiov2_pad/inp_dis = 1 | digital_pll/extclk_sel = 1 |
| | |
| Net: core/flash_io1_ieb |Net: flash_io3_ieb_core |
| s8iom0_gpiov2_pad/dm<2> = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_soc/flash_io1_ieb = 1 | striVe_soc/flash_io3_ieb = 1 |
| | |
| Net: core/flash_io2_ieb |Net: flash_io2_ieb_core |
| s8iom0_gpiov2_pad/dm<2> = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_soc/flash_io2_ieb = 1 | striVe_soc/flash_io2_ieb = 1 |
| | |
| Net: pll/extclk_sel |Net: flash_io1_ieb_core |
| digital_pll/extclk_sel = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| striVe_clkrst/ext_clk_sel = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| striVe_soc/ext_clk_sel = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_spi/pll_bypass = 1 | striVe_soc/flash_io1_ieb = 1 |
| | |
| Net: core/flash_io3_ieb |Net: flash_io0_ieb_core |
| s8iom0_gpiov2_pad/dm<2> = 1 | s8iom0_gpiov2_pad/inp_dis = 1 |
| s8iom0_gpiov2_pad/dm<1> = 1 | s8iom0_gpiov2_pad/dm[2] = 1 |
| s8iom0_gpiov2_pad/inp_dis = 1 | s8iom0_gpiov2_pad/dm[1] = 1 |
| striVe_soc/flash_io3_ieb = 1 | striVe_soc/flash_io0_ieb = 1 |
| --------------------------------------------------------------------------------------- |
| DEVICE mismatches: Class fragments follow (with node fanout counts): |
| Circuit 1: striVe |Circuit 2: striVe |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_corner_padcorner[0] |Instance: corner[3] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| vssa = 555 | vddio = 168 |
| vdda = 225 | vddio_q = 43 |
| vswitch = 225 | vdda = 168 |
| vddio_q = 62 | vccd = 181 |
| vcchib = 228 | vswitch = 168 |
| vddio = 225 | vcchib = 181 |
| vccd = 228 | vssa = 490 |
| vssio = 555 | vssd = 490 |
| vssd = 555 | vssio_q = 43 |
| vssio_q = 62 | vssio = 490 |
| | |
| Instance: s8iom0_corner_padcorner[1] |Instance: corner[2] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| vssa = 555 | vddio = 168 |
| vdda = 225 | vddio_q = 43 |
| vswitch = 225 | vdda = 168 |
| vddio_q = 62 | vccd = 181 |
| vcchib = 228 | vswitch = 168 |
| vddio = 225 | vcchib = 181 |
| vccd = 228 | vssa = 490 |
| vssio = 555 | vssd = 490 |
| vssd = 555 | vssio_q = 43 |
| vssio_q = 62 | vssio = 490 |
| | |
| Instance: s8iom0_corner_padcorner[2] |Instance: corner[1] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| vssa = 555 | vddio = 168 |
| vdda = 225 | vddio_q = 43 |
| vswitch = 225 | vdda = 168 |
| vddio_q = 62 | vccd = 181 |
| vcchib = 228 | vswitch = 168 |
| vddio = 225 | vcchib = 181 |
| vccd = 228 | vssa = 490 |
| vssio = 555 | vssd = 490 |
| vssd = 555 | vssio_q = 43 |
| vssio_q = 62 | vssio = 490 |
| | |
| Instance: s8iom0_corner_padcorner[3] |Instance: corner[0] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| vssa = 555 | vddio = 168 |
| vdda = 225 | vddio_q = 43 |
| vswitch = 225 | vdda = 168 |
| vddio_q = 62 | vccd = 181 |
| vcchib = 228 | vswitch = 168 |
| vddio = 225 | vcchib = 181 |
| vccd = 228 | vssa = 490 |
| vssio = 555 | vssd = 490 |
| vssd = 555 | vssio_q = 43 |
| vssio_q = 62 | vssio = 490 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_vdda_hvc_padvdd3v3hclamp[ |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vdda_hvc_padvddiohclamp[1 |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching instance) |Instance: vdd3v3hclamp[0] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | |
| (no matching instance) |Instance: vdd3v3hclamp[1] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_vssa_hvc_padvsshclamp[0] |Instance: vsshclamp[3] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vssa_hvc_padvsshclamp[1] |Instance: vsshclamp[2] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vssa_hvc_padvsshclamp[2] |Instance: vsshclamp[1] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vssa_hvc_padvsshclamp[3] |Instance: vsshclamp[0] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_vdda_lvc_padvdd3v3lclamp[ |Instance: vdd3v3lclamp[3] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_lvc1 = 1 | drn_lvc1 = 1 |
| drn_lvc2 = 1 | drn_lvc2 = 1 |
| src_bdy_lvc1 = 1 | src_bdy_lvc1 = 1 |
| src_bdy_lvc2 = 1 | src_bdy_lvc2 = 1 |
| bdy2_b2b = 1 | bdy2_b2b = 1 |
| vssi = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vdda_lvc_padvdd3v3lclamp[ |Instance: vdd3v3lclamp[2] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_lvc1 = 1 | drn_lvc1 = 1 |
| drn_lvc2 = 1 | drn_lvc2 = 1 |
| src_bdy_lvc1 = 1 | src_bdy_lvc1 = 1 |
| src_bdy_lvc2 = 1 | src_bdy_lvc2 = 1 |
| bdy2_b2b = 1 | bdy2_b2b = 1 |
| vssi = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vdda_lvc_padvdd3v3lclamp[ |Instance: vdd3v3lclamp[1] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_lvc1 = 1 | drn_lvc1 = 1 |
| drn_lvc2 = 1 | drn_lvc2 = 1 |
| src_bdy_lvc1 = 1 | src_bdy_lvc1 = 1 |
| src_bdy_lvc2 = 1 | src_bdy_lvc2 = 1 |
| bdy2_b2b = 1 | bdy2_b2b = 1 |
| vssi = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vdda_lvc_padvdd3v3lclamp[ |Instance: vdd3v3lclamp[0] |
| amuxbus_a = 62 | amuxbus_a = 62 |
| amuxbus_b = 62 | amuxbus_b = 62 |
| drn_lvc1 = 1 | drn_lvc1 = 1 |
| drn_lvc2 = 1 | drn_lvc2 = 1 |
| src_bdy_lvc1 = 1 | src_bdy_lvc1 = 1 |
| src_bdy_lvc2 = 1 | src_bdy_lvc2 = 1 |
| bdy2_b2b = 1 | bdy2_b2b = 1 |
| vssi = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_vccd_hvc_padvdd1v8hclamp[ |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vccd_hvc_padvdd1v8hclamp[ |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching instance) |Instance: vdd1v8hclamp[0] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | |
| (no matching instance) |Instance: vdd1v8hclamp[1] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_vccd_lvc_padvdd1v8lclamp[ |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_lvc1 = 1 | |
| drn_lvc2 = 1 | |
| src_bdy_lvc1 = 1 | |
| src_bdy_lvc2 = 1 | |
| bdy2_b2b = 1 | |
| vssi = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vccd_lvc_padvdd1v8lclamp[ |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_lvc1 = 1 | |
| drn_lvc2 = 1 | |
| src_bdy_lvc1 = 1 | |
| src_bdy_lvc2 = 1 | |
| bdy2_b2b = 1 | |
| vssi = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching instance) |Instance: vdd1v8lclamp[0] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | drn_lvc1 = 1 |
| | drn_lvc2 = 1 |
| | src_bdy_lvc1 = 1 |
| | src_bdy_lvc2 = 1 |
| | bdy2_b2b = 1 |
| | |
| (no matching instance) |Instance: vdd1v8lclamp[1] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | drn_lvc1 = 1 |
| | drn_lvc2 = 1 |
| | src_bdy_lvc1 = 1 |
| | src_bdy_lvc2 = 1 |
| | bdy2_b2b = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0s8_top_gpio_ovtv2ser_tx_pa |Instance: ser_tx_pad |
| amuxbus_a = 62 | out = 2 |
| amuxbus_b = 62 | oe_n = 490 |
| analog_en = 555 | hld_h_n = 168 |
| analog_pol = 555 | enable_h = 78 |
| analog_sel = 555 | enable_inp_h = 1 |
| dm<2> = 228 | enable_vdda_h = 78 |
| dm<1> = 228 | enable_vddio = 181 |
| dm<0> = 555 | enable_vswitch_h = 490 |
| enable_h = 78 | inp_dis = 181 |
| enable_inp_h = 1 | vtrip_sel = 490 |
| enable_vdda_h = 78 | hys_trim = 181 |
| enable_vddio = 228 | slow = 490 |
| enable_vswitch_h = 555 | slew_ctl[1] = 490 |
| hld_h_n = 225 | slew_ctl[0] = 490 |
| hld_ovr = 555 | hld_ovr = 490 |
| hys_trim = 228 | analog_en = 490 |
| ib_mode_sel<1> = 555 | analog_sel = 490 |
| ib_mode_sel<0> = 555 | analog_pol = 490 |
| in = 1 | dm[2] = 181 |
| in_h = 1 | dm[1] = 181 |
| inp_dis = 228 | dm[0] = 490 |
| oe_n = 555 | ib_mode_sel[1] = 490 |
| out = 2 | ib_mode_sel[0] = 490 |
| pad = 1 | vinref = 181 |
| pad_a_esd_0_h = 1 | vddio = 168 |
| pad_a_esd_1_h = 1 | vddio_q = 43 |
| pad_a_noesd_h = 1 | vdda = 168 |
| slew_ctl<1> = 555 | vccd = 181 |
| slew_ctl<0> = 555 | vswitch = 168 |
| slow = 555 | vcchib = 181 |
| tie_hi_esd = 1 | vssa = 490 |
| tie_lo_esd = 1 | vssd = 490 |
| vccd = 228 | vssio_q = 43 |
| vcchib = 228 | vssio = 490 |
| vdda = 225 | pad = 1 |
| vddio = 225 | pad_a_noesd_h = 1 |
| vddio_q = 62 | pad_a_esd_0_h = 1 |
| vinref = 228 | pad_a_esd_1_h = 1 |
| vssa = 555 | amuxbus_a = 62 |
| vssd = 555 | amuxbus_b = 62 |
| vssio = 555 | in = 1 |
| vssio_q = 62 | in_h = 1 |
| vswitch = 225 | tie_hi_esd = 1 |
| vtrip_sel = 555 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0s8_top_gpio_ovtv2ser_rx_pa |Instance: ser_rx_pad |
| amuxbus_a = 62 | out = 490 |
| amuxbus_b = 62 | oe_n = 181 |
| analog_en = 555 | hld_h_n = 168 |
| analog_pol = 555 | enable_h = 78 |
| analog_sel = 555 | enable_inp_h = 1 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vddio = 181 |
| dm<0> = 228 | enable_vswitch_h = 490 |
| enable_h = 78 | inp_dis = 10 |
| enable_inp_h = 1 | vtrip_sel = 490 |
| enable_vdda_h = 78 | hys_trim = 181 |
| enable_vddio = 228 | slow = 490 |
| enable_vswitch_h = 555 | slew_ctl[1] = 490 |
| hld_h_n = 225 | slew_ctl[0] = 490 |
| hld_ovr = 555 | hld_ovr = 490 |
| hys_trim = 228 | analog_en = 490 |
| ib_mode_sel<1> = 555 | analog_sel = 490 |
| ib_mode_sel<0> = 555 | analog_pol = 490 |
| in = 2 | dm[2] = 490 |
| in_h = 1 | dm[1] = 490 |
| inp_dis = 10 | dm[0] = 181 |
| oe_n = 228 | ib_mode_sel[1] = 490 |
| out = 555 | ib_mode_sel[0] = 490 |
| pad = 1 | vinref = 181 |
| pad_a_esd_0_h = 1 | vddio = 168 |
| pad_a_esd_1_h = 1 | vddio_q = 43 |
| pad_a_noesd_h = 1 | vdda = 168 |
| slew_ctl<1> = 555 | vccd = 181 |
| slew_ctl<0> = 555 | vswitch = 168 |
| slow = 555 | vcchib = 181 |
| tie_hi_esd = 1 | vssa = 490 |
| tie_lo_esd = 1 | vssd = 490 |
| vccd = 228 | vssio_q = 43 |
| vcchib = 228 | vssio = 490 |
| vdda = 225 | pad = 1 |
| vddio = 225 | pad_a_noesd_h = 1 |
| vddio_q = 62 | pad_a_esd_0_h = 1 |
| vinref = 228 | pad_a_esd_1_h = 1 |
| vssa = 555 | amuxbus_a = 62 |
| vssd = 555 | amuxbus_b = 62 |
| vssio = 555 | in = 2 |
| vssio_q = 62 | in_h = 1 |
| vswitch = 225 | tie_hi_esd = 1 |
| vtrip_sel = 555 | tie_lo_esd = 1 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: scs8hd_conb_1mask_rev_value[1] |Instance: mask_rev_value[3] |
| HI = 1 | HI = 1 |
| LO = 2 | LO = 2 |
| vgnd = 555 | |
| vpwr = 228 | |
| | |
| Instance: scs8hd_conb_1mask_rev_value[2] |Instance: mask_rev_value[2] |
| HI = 1 | HI = 1 |
| LO = 2 | LO = 2 |
| vgnd = 555 | |
| vpwr = 228 | |
| | |
| Instance: scs8hd_conb_1mask_rev_value[3] |Instance: mask_rev_value[1] |
| HI = 1 | HI = 1 |
| LO = 2 | LO = 2 |
| vgnd = 555 | |
| vpwr = 228 | |
| | |
| Instance: scs8hd_conb_1mask_rev_value[0] |Instance: mask_rev_value[0] |
| HI = 1 | HI = 1 |
| LO = 2 | LO = 2 |
| vgnd = 555 | |
| vpwr = 228 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_gpiov2_padflash_clk_pad |Instance: flash_io3_pad |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 3 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 2 |
| dm<2> = 228 | enable_vdda_h = 78 |
| dm<1> = 228 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 4 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 555 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 4 |
| tie_lo_esd = 1 | dm[1] = 4 |
| slow = 555 | dm[0] = 3 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 2 |
| | |
| Instance: s8iom0_gpiov2_padadc_low_pad |Instance: flash_io2_pad |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 3 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 2 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 4 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 4 |
| tie_lo_esd = 1 | dm[1] = 4 |
| slow = 555 | dm[0] = 3 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 228 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 2 |
| | |
| Instance: s8iom0_gpiov2_padadc1_in_pad |Instance: flash_io1_pad |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 3 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 2 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 4 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 4 |
| tie_lo_esd = 1 | dm[1] = 4 |
| slow = 555 | dm[0] = 3 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 228 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 2 |
| | |
| Instance: s8iom0_gpiov2_padcomp_inn_pad |Instance: flash_io0_pad |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 3 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 2 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 4 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 4 |
| tie_lo_esd = 1 | dm[1] = 4 |
| slow = 555 | dm[0] = 3 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 228 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 2 |
| | |
| Instance: s8iom0_gpiov2_padadc0_in_pad |Instance: flash_clk_pad |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 490 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 181 |
| tie_lo_esd = 1 | dm[1] = 181 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 228 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padflash_csb_pad |Instance: flash_csb_pad |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 490 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 228 | enable_vdda_h = 78 |
| dm<1> = 228 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 555 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 181 |
| tie_lo_esd = 1 | dm[1] = 181 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padadc_high_pad |Instance: comp_inp_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 181 |
| enable_inp_h = 1 | analog_sel = 181 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 1 | dm[1] = 490 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 228 | vdda = 168 |
| analog_sel = 228 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 228 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padcomp_inp_pad |Instance: comp_inn_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 555 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 1 | ib_mode_sel = 490 |
| inp_dis = 228 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 181 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 1 | dm[1] = 490 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 228 | vdda = 168 |
| analog_sel = 228 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padflash_io0_pad |Instance: adc_low_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 4 | enable_vdda_h = 78 |
| dm<1> = 4 | enable_vswitch_h = 490 |
| dm<0> = 3 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 4 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 181 |
| enable_inp_h = 2 | analog_sel = 490 |
| oe_n = 3 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 2 | dm[1] = 490 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padflash_io1_pad |Instance: adc_high_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 4 | enable_vdda_h = 78 |
| dm<1> = 4 | enable_vswitch_h = 490 |
| dm<0> = 3 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 4 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 181 |
| enable_inp_h = 2 | analog_sel = 181 |
| oe_n = 3 | analog_pol = 181 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 2 | dm[1] = 490 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padflash_io2_pad |Instance: adc1_in_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 4 | enable_vdda_h = 78 |
| dm<1> = 4 | enable_vswitch_h = 490 |
| dm<0> = 3 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 4 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 181 |
| enable_inp_h = 2 | analog_sel = 490 |
| oe_n = 3 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 2 | dm[1] = 490 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padflash_io3_pad |Instance: adc0_in_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 4 | enable_vdda_h = 78 |
| dm<1> = 4 | enable_vswitch_h = 490 |
| dm<0> = 3 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 181 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 4 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 181 |
| enable_inp_h = 2 | analog_sel = 490 |
| oe_n = 3 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 2 | dm[1] = 490 |
| slow = 555 | dm[0] = 490 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 1 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padirq_pad |Instance: CSB_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 2 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 228 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 10 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 10 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 2 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 2 | dm[1] = 490 |
| slow = 555 | dm[0] = 181 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 2 |
| | |
| Instance: s8iom0_gpiov2_padxi_pad |Instance: SDI_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 1 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 228 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 10 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 10 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 2 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 2 | dm[1] = 490 |
| slow = 555 | dm[0] = 181 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 1 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 1 |
| | |
| Instance: s8iom0_gpiov2_padCSB_pad |Instance: irq_pad |
| in_h = 1 | out = 490 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 2 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 228 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 10 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 10 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 2 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 2 | dm[1] = 490 |
| slow = 555 | dm[0] = 181 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 2 |
| | |
| Instance: s8iom0_gpiov2_padSDI_pad |Instance: xi_pad |
| in_h = 1 | out = 1 |
| pad_a_noesd_h = 1 | oe_n = 181 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 2 |
| dm<2> = 555 | enable_vdda_h = 78 |
| dm<1> = 555 | enable_vswitch_h = 490 |
| dm<0> = 228 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 10 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 10 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 1 | analog_sel = 490 |
| oe_n = 228 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 490 |
| tie_lo_esd = 1 | dm[1] = 490 |
| slow = 555 | dm[0] = 181 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 555 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 2 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[10] |Instance: gpio_pad[15] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[11] |Instance: gpio_pad[14] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[0] |Instance: gpio_pad[13] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[12] |Instance: gpio_pad[12] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[1] |Instance: gpio_pad[11] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[13] |Instance: gpio_pad[10] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[2] |Instance: gpio_pad[9] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[14] |Instance: gpio_pad[8] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[3] |Instance: gpio_pad[7] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[15] |Instance: gpio_pad[6] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[4] |Instance: gpio_pad[5] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[5] |Instance: gpio_pad[4] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[6] |Instance: gpio_pad[3] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[7] |Instance: gpio_pad[2] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[8] |Instance: gpio_pad[1] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| | |
| Instance: s8iom0_gpiov2_padgpio_pad[9] |Instance: gpio_pad[0] |
| in_h = 1 | out = 2 |
| pad_a_noesd_h = 1 | oe_n = 2 |
| pad_a_esd_0_h = 1 | hld_h_n = 168 |
| pad_a_esd_1_h = 1 | enable_h = 78 |
| pad = 1 | enable_inp_h = 32 |
| dm<2> = 3 | enable_vdda_h = 78 |
| dm<1> = 3 | enable_vswitch_h = 490 |
| dm<0> = 2 | enable_vddio = 181 |
| hld_h_n = 225 | inp_dis = 2 |
| in = 2 | ib_mode_sel = 490 |
| inp_dis = 2 | vtrip_sel = 490 |
| ib_mode_sel = 555 | slow = 490 |
| enable_h = 78 | hld_ovr = 490 |
| enable_vdda_h = 78 | analog_en = 490 |
| enable_inp_h = 32 | analog_sel = 490 |
| oe_n = 2 | analog_pol = 490 |
| tie_hi_esd = 1 | dm[2] = 3 |
| tie_lo_esd = 32 | dm[1] = 3 |
| slow = 555 | dm[0] = 2 |
| vtrip_sel = 555 | vddio = 168 |
| hld_ovr = 555 | vddio_q = 43 |
| analog_en = 555 | vdda = 168 |
| analog_sel = 555 | vccd = 181 |
| enable_vddio = 228 | vswitch = 168 |
| enable_vswitch_h = 555 | vcchib = 181 |
| analog_pol = 555 | vssa = 490 |
| out = 2 | vssd = 490 |
| amuxbus_a = 62 | vssio_q = 43 |
| amuxbus_b = 62 | vssio = 490 |
| vssa = 555 | pad = 1 |
| vdda = 225 | pad_a_noesd_h = 1 |
| vswitch = 225 | pad_a_esd_0_h = 1 |
| vddio_q = 62 | pad_a_esd_1_h = 1 |
| vcchib = 228 | amuxbus_a = 62 |
| vddio = 225 | amuxbus_b = 62 |
| vccd = 228 | in = 2 |
| vssio = 555 | in_h = 1 |
| vssd = 555 | tie_hi_esd = 1 |
| vssio_q = 62 | tie_lo_esd = 32 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_gpiov2_padSDO_pad |(no matching instance) |
| in_h = 1 | |
| pad_a_noesd_h = 1 | |
| pad_a_esd_0_h = 1 | |
| pad_a_esd_1_h = 1 | |
| pad = 1 | |
| dm<2> = 228 | |
| dm<1> = 228 | |
| dm<0> = 555 | |
| hld_h_n = 225 | |
| in = 1 | |
| inp_dis = 228 | |
| ib_mode_sel = 555 | |
| enable_h = 78 | |
| enable_vdda_h = 78 | |
| enable_inp_h = 2 | |
| oe_n = 2 | |
| tie_hi_esd = 1 | |
| tie_lo_esd = 2 | |
| slow = 555 | |
| vtrip_sel = 555 | |
| hld_ovr = 555 | |
| analog_en = 555 | |
| analog_sel = 555 | |
| enable_vddio = 228 | |
| enable_vswitch_h = 555 | |
| analog_pol = 555 | |
| out = 2 | |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_gpiov2_padxo_pad |(no matching instance) |
| in_h = 1 | |
| pad_a_noesd_h = 1 | |
| pad_a_esd_0_h = 1 | |
| pad_a_esd_1_h = 1 | |
| pad = 1 | |
| dm<2> = 228 | |
| dm<1> = 228 | |
| dm<0> = 555 | |
| hld_h_n = 225 | |
| in = 228 | |
| inp_dis = 228 | |
| ib_mode_sel = 555 | |
| enable_h = 78 | |
| enable_vdda_h = 78 | |
| enable_inp_h = 2 | |
| oe_n = 555 | |
| tie_hi_esd = 1 | |
| tie_lo_esd = 2 | |
| slow = 555 | |
| vtrip_sel = 555 | |
| hld_ovr = 555 | |
| analog_en = 555 | |
| analog_sel = 555 | |
| enable_vddio = 228 | |
| enable_vswitch_h = 555 | |
| analog_pol = 555 | |
| out = 2 | |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching instance) |Instance: xo_pad |
| | out = 2 |
| | oe_n = 490 |
| | hld_h_n = 168 |
| | enable_h = 78 |
| | enable_inp_h = 2 |
| | enable_vdda_h = 78 |
| | enable_vswitch_h = 490 |
| | enable_vddio = 181 |
| | inp_dis = 181 |
| | ib_mode_sel = 490 |
| | vtrip_sel = 490 |
| | slow = 490 |
| | hld_ovr = 490 |
| | analog_en = 490 |
| | analog_sel = 490 |
| | analog_pol = 490 |
| | dm[2] = 181 |
| | dm[1] = 181 |
| | dm[0] = 490 |
| | vddio = 168 |
| | vddio_q = 43 |
| | vdda = 168 |
| | vccd = 181 |
| | vswitch = 168 |
| | vcchib = 181 |
| | vssa = 490 |
| | vssd = 490 |
| | vssio_q = 43 |
| | vssio = 490 |
| | pad = 1 |
| | pad_a_noesd_h = 1 |
| | pad_a_esd_0_h = 1 |
| | pad_a_esd_1_h = 1 |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | in = 1 |
| | in_h = 1 |
| | tie_hi_esd = 1 |
| | tie_lo_esd = 2 |
| | |
| (no matching instance) |Instance: SDO_pad |
| | out = 2 |
| | oe_n = 2 |
| | hld_h_n = 168 |
| | enable_h = 78 |
| | enable_inp_h = 2 |
| | enable_vdda_h = 78 |
| | enable_vswitch_h = 490 |
| | enable_vddio = 181 |
| | inp_dis = 181 |
| | ib_mode_sel = 490 |
| | vtrip_sel = 490 |
| | slow = 490 |
| | hld_ovr = 490 |
| | analog_en = 490 |
| | analog_sel = 490 |
| | analog_pol = 490 |
| | dm[2] = 181 |
| | dm[1] = 181 |
| | dm[0] = 490 |
| | vddio = 168 |
| | vddio_q = 43 |
| | vdda = 168 |
| | vccd = 181 |
| | vswitch = 168 |
| | vcchib = 181 |
| | vssa = 490 |
| | vssd = 490 |
| | vssio_q = 43 |
| | vssio = 490 |
| | pad = 1 |
| | pad_a_noesd_h = 1 |
| | pad_a_esd_0_h = 1 |
| | pad_a_esd_1_h = 1 |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | in = 1 |
| | in_h = 1 |
| | tie_hi_esd = 1 |
| | tie_lo_esd = 2 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_gpiov2_padxclk_pad |(no matching instance) |
| in_h = 1 | |
| pad_a_noesd_h = 1 | |
| pad_a_esd_0_h = 1 | |
| pad_a_esd_1_h = 1 | |
| pad = 1 | |
| dm<2> = 555 | |
| dm<1> = 555 | |
| dm<0> = 228 | |
| hld_h_n = 225 | |
| in = 3 | |
| inp_dis = 10 | |
| ib_mode_sel = 555 | |
| enable_h = 78 | |
| enable_vdda_h = 78 | |
| enable_inp_h = 2 | |
| oe_n = 228 | |
| tie_hi_esd = 1 | |
| tie_lo_esd = 2 | |
| slow = 555 | |
| vtrip_sel = 555 | |
| hld_ovr = 555 | |
| analog_en = 555 | |
| analog_sel = 555 | |
| enable_vddio = 228 | |
| enable_vswitch_h = 555 | |
| analog_pol = 555 | |
| out = 555 | |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_gpiov2_padSCK_pad |(no matching instance) |
| in_h = 1 | |
| pad_a_noesd_h = 1 | |
| pad_a_esd_0_h = 1 | |
| pad_a_esd_1_h = 1 | |
| pad = 1 | |
| dm<2> = 555 | |
| dm<1> = 555 | |
| dm<0> = 228 | |
| hld_h_n = 225 | |
| in = 3 | |
| inp_dis = 10 | |
| ib_mode_sel = 555 | |
| enable_h = 78 | |
| enable_vdda_h = 78 | |
| enable_inp_h = 2 | |
| oe_n = 228 | |
| tie_hi_esd = 1 | |
| tie_lo_esd = 2 | |
| slow = 555 | |
| vtrip_sel = 555 | |
| hld_ovr = 555 | |
| analog_en = 555 | |
| analog_sel = 555 | |
| enable_vddio = 228 | |
| enable_vswitch_h = 555 | |
| analog_pol = 555 | |
| out = 555 | |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching instance) |Instance: SCK_pad |
| | out = 490 |
| | oe_n = 181 |
| | hld_h_n = 168 |
| | enable_h = 78 |
| | enable_inp_h = 2 |
| | enable_vdda_h = 78 |
| | enable_vswitch_h = 490 |
| | enable_vddio = 181 |
| | inp_dis = 10 |
| | ib_mode_sel = 490 |
| | vtrip_sel = 490 |
| | slow = 490 |
| | hld_ovr = 490 |
| | analog_en = 490 |
| | analog_sel = 490 |
| | analog_pol = 490 |
| | dm[2] = 490 |
| | dm[1] = 490 |
| | dm[0] = 181 |
| | vddio = 168 |
| | vddio_q = 43 |
| | vdda = 168 |
| | vccd = 181 |
| | vswitch = 168 |
| | vcchib = 181 |
| | vssa = 490 |
| | vssd = 490 |
| | vssio_q = 43 |
| | vssio = 490 |
| | pad = 1 |
| | pad_a_noesd_h = 1 |
| | pad_a_esd_0_h = 1 |
| | pad_a_esd_1_h = 1 |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | in = 3 |
| | in_h = 1 |
| | tie_hi_esd = 1 |
| | tie_lo_esd = 2 |
| | |
| (no matching instance) |Instance: xclk_pad |
| | out = 490 |
| | oe_n = 181 |
| | hld_h_n = 168 |
| | enable_h = 78 |
| | enable_inp_h = 2 |
| | enable_vdda_h = 78 |
| | enable_vswitch_h = 490 |
| | enable_vddio = 181 |
| | inp_dis = 10 |
| | ib_mode_sel = 490 |
| | vtrip_sel = 490 |
| | slow = 490 |
| | hld_ovr = 490 |
| | analog_en = 490 |
| | analog_sel = 490 |
| | analog_pol = 490 |
| | dm[2] = 490 |
| | dm[1] = 490 |
| | dm[0] = 181 |
| | vddio = 168 |
| | vddio_q = 43 |
| | vdda = 168 |
| | vccd = 181 |
| | vswitch = 168 |
| | vcchib = 181 |
| | vssa = 490 |
| | vssd = 490 |
| | vssio_q = 43 |
| | vssio = 490 |
| | pad = 1 |
| | pad_a_noesd_h = 1 |
| | pad_a_esd_0_h = 1 |
| | pad_a_esd_1_h = 1 |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | in = 3 |
| | in_h = 1 |
| | tie_hi_esd = 1 |
| | tie_lo_esd = 2 |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| Instance: s8iom0_vddio_hvc_pad_0 |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| | |
| Instance: s8iom0_vddio_hvc_pad_1 |(no matching instance) |
| amuxbus_a = 62 | |
| amuxbus_b = 62 | |
| drn_hvc = 1 | |
| src_bdy_hvc = 1 | |
| vssa = 555 | |
| vdda = 225 | |
| vswitch = 225 | |
| vddio_q = 62 | |
| vcchib = 228 | |
| vddio = 225 | |
| vccd = 228 | |
| vssio = 555 | |
| vssd = 555 | |
| vssio_q = 62 | |
| --------------------------------------------------------------------------------------- |
| |
| --------------------------------------------------------------------------------------- |
| (no matching instance) |Instance: vddiohclamp[0] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| | |
| (no matching instance) |Instance: vddiohclamp[1] |
| | amuxbus_a = 62 |
| | amuxbus_b = 62 |
| --------------------------------------------------------------------------------------- |
| Netlists do not match. |
| Netlists do not match. |
