commit | eeede8007aca84c078d1936fea14026312da550f | [log] [tgz] |
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author | pr_ev1821 <evd18i021@iiitdm.ac.in> | Sat Dec 24 15:49:44 2022 +0530 |
committer | pr_ev1821 <evd18i021@iiitdm.ac.in> | Sat Dec 24 15:49:44 2022 +0530 |
tree | df8a1fefb5737d0b0e2f8a9a75c6a31f11ed8041 | |
parent | 0963b900cccf9e8c2d19361b3405e087cb255a08 [diff] | |
parent | 47cd06f6e42a962d6012717a8277d88e45b414ee [diff] |
Merge branch 'main' of https://github.com/evd18i021/lifting53_ext
Conventional 5/3 lifting based wavelet with 3 octaves.
Open Source Digital ASIC Design requires three open-source components:
Design has been carried out using Skywater 130nm PDK using openLANE and caravel open source silicon development tools,
DWT - Conventional 5/3 lifting based wavelet with 3 octaves.
:exclamation: Important Note |
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Refer to README for a quickstart of how to use caravel_user_project
Refer to README for this sample project documentation.