blob: dc7f0370de2f14abdc9a6e82d8731bac046116a1 [file] [log] [blame]
Project Chip ID is: 566208
Setting Project Chip ID to: 0008a3c0
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!