)]}'
{
  "commit": "63a183f96e232c1845c38ae2dcae9b565a214a35",
  "tree": "d175109c1ed2bb05356bcf07e2ba7021aeb795ba",
  "parents": [
    "f695f523fc552a3d6e5e8da120b383f83ad17e3d"
  ],
  "author": {
    "name": "root",
    "email": "root@Janani_Aravind",
    "time": "Wed Dec 28 23:14:09 2022 -0500"
  },
  "committer": {
    "name": "root",
    "email": "root@Janani_Aravind",
    "time": "Wed Dec 28 23:14:09 2022 -0500"
  },
  "message": "\tmodified:   verilog/rtl/user_defines.v\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2e5a7a0a4f963dbd2aeb6878d387c15b2866684b",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_defines.v",
      "new_id": "9ce9458fb9c651e5f1567497c2e7a0f16d01af83",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_defines.v"
    }
  ]
}
