diff --git a/gds/user_proj_example.gds b/gds/user_proj_example.gds
deleted file mode 100644
index 8b542fd..0000000
--- a/gds/user_proj_example.gds
+++ /dev/null
Binary files differ
diff --git a/gds/user_proj_example.gds.gz b/gds/user_proj_example.gds.gz
new file mode 100644
index 0000000..c14b010
--- /dev/null
+++ b/gds/user_proj_example.gds.gz
Binary files differ
diff --git a/mpw_precheck/logs/gds.info b/mpw_precheck/logs/gds.info
new file mode 100644
index 0000000..b2ba9ed
--- /dev/null
+++ b/mpw_precheck/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: c22c3b78f6a7ba753aa87559fc6e0348a5df1922
\ No newline at end of file
diff --git a/mpw_precheck/logs/git.info b/mpw_precheck/logs/git.info
new file mode 100644
index 0000000..564cd94
--- /dev/null
+++ b/mpw_precheck/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/cloudxcc/ShapingTheWaves_8.git
+Branch: initial
+Commit: e42ca81a882d305f51f8691b1c3e88fc44f19831
diff --git a/mpw_precheck/logs/klayout_beol_check.log b/mpw_precheck/logs/klayout_beol_check.log
new file mode 100644
index 0000000..04a689f
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.log
@@ -0,0 +1,1005 @@
+/opt/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:54: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:124
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+    Elapsed: 0.230s  Memory: 1061.00M
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+DRC section
+BEOL section
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+START: 67/44 (mcon)
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+END: 76/20 (pad)
+Writing report database: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_beol_check.xml ..
+Total elapsed: 1921.050s  Memory: 6352.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07
diff --git a/mpw_precheck/logs/klayout_beol_check.total b/mpw_precheck/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_feol_check.log b/mpw_precheck/logs/klayout_feol_check.log
new file mode 100644
index 0000000..6b3f724
--- /dev/null
+++ b/mpw_precheck/logs/klayout_feol_check.log
@@ -0,0 +1,817 @@
+/opt/checks/tech-files/sky130A_mr.drc:48: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
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+END: 89/44 (capm)
+START: 97/44 (cap2m)
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+END: 97/44 (cap2m)
+FEOL section
+START: 75/20 (hvi)
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+END: 75/20 (hvi)
+START: 125/20 (hvntm)
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+    Edge pairs: 0 (flat)  0 (hierarchical)
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+END: 125/20 (hvntm)
+Writing report database: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_feol_check.xml ..
+Total elapsed: 248.400s  Memory: 1860.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07
diff --git a/mpw_precheck/logs/klayout_feol_check.total b/mpw_precheck/logs/klayout_feol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_feol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.log b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
new file mode 100644
index 0000000..20055b9
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
@@ -0,0 +1,79 @@
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+    Elapsed: 0.020s  Memory: 1142.00M
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+"area" in: met_min_ca_density.lydrc:59
+    Elapsed: 46.620s  Memory: 1687.00M
+li1_ca_density is 0.7869005628818688
+"polygons" in: met_min_ca_density.lydrc:69
+    Polygons (raw): 9189740 (flat)  1689549 (hierarchical)
+    Elapsed: 1.120s  Memory: 1687.00M
+"area" in: met_min_ca_density.lydrc:69
+    Elapsed: 46.740s  Memory: 1696.00M
+m1_ca_density is 0.8671672820113052
+"polygons" in: met_min_ca_density.lydrc:79
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+    Elapsed: 0.580s  Memory: 1696.00M
+"area" in: met_min_ca_density.lydrc:79
+    Elapsed: 5.200s  Memory: 1712.00M
+m2_ca_density is 0.9168428551720113
+"polygons" in: met_min_ca_density.lydrc:89
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+    Elapsed: 0.210s  Memory: 1712.00M
+"area" in: met_min_ca_density.lydrc:89
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+m3_ca_density is 0.980703921490699
+"polygons" in: met_min_ca_density.lydrc:99
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+    Elapsed: 0.180s  Memory: 1712.00M
+"area" in: met_min_ca_density.lydrc:99
+    Elapsed: 0.440s  Memory: 1712.00M
+m4_ca_density is 0.8803889093365699
+"polygons" in: met_min_ca_density.lydrc:109
+    Polygons (raw): 203 (flat)  203 (hierarchical)
+    Elapsed: 0.010s  Memory: 1712.00M
+"area" in: met_min_ca_density.lydrc:109
+    Elapsed: 0.240s  Memory: 1712.00M
+m5_ca_density is 0.8160644629514321
+Writing report database: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 114.810s  Memory: 1624.00M
diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.total b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_offgrid_check.log b/mpw_precheck/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..b912e3e
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.log
@@ -0,0 +1,765 @@
+/opt/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:60: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:124
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+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.380s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:751
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:752
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 5.500s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:752
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:753
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.240s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:753
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:754
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.650s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:754
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:755
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.040s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:755
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:756
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.960s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:756
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:757
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.020s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:757
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:758
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.610s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:758
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:759
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.040s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:759
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:760
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.320s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:760
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:761
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:761
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:762
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.550s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:762
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:763
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:763
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:764
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.420s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:764
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:765
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.020s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:765
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:766
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.360s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:766
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:767
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:767
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:768
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.330s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:768
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:769
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:769
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:770
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.330s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:770
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:771
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:771
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:772
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.330s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:772
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:773
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:773
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:774
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.330s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:774
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:775
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:775
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:776
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.330s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:776
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:777
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:777
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:778
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.330s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:778
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:779
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:779
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:780
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.320s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:780
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"with_angle" in: sky130A_mr.drc:781
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:781
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+"ongrid" in: sky130A_mr.drc:782
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.340s  Memory: 2441.00M
+"output" in: sky130A_mr.drc:782
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2441.00M
+Writing report database: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 263.140s  Memory: 2211.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07
diff --git a/mpw_precheck/logs/klayout_offgrid_check.total b/mpw_precheck/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..70c38b7
--- /dev/null
+++ b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/root/shapingthewaves_8/gds/user_project_wrapper.gds, topcell=user_project_wrapper, output to /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+  deep:true tiled:false threads:8
+--- #err|description, table for cell: user_project_wrapper
+NO-Check ----        pwell:64/44/EMP   122/16/dat    64/59/EMP    44/16/EMP     44/5/EMP
+         ----        nwell:64/20/dat    64/16/dat     64/5/EMP
+         ----         diff:65/20/dat    65/16/EMP     65/6/EMP
+         ----          tap:65/44/dat    65/48/EMP     65/5/EMP
+         ----         poly:66/20/dat    66/16/EMP     66/5/EMP
+         ----       licon1:66/44/dat    66/58/EMP
+         ----          li1:67/20/dat    67/16/dat     67/5/EMP
+         ----         mcon:67/44/dat    67/48/EMP
+         ----         met1:68/20/dat    68/16/dat     68/5/dat
+         ----          via:68/44/dat    68/58/EMP
+         ----         met2:69/20/dat    69/16/dat     69/5/dat
+         ----         via2:69/44/dat    69/58/EMP
+         ----         met3:70/20/dat    70/16/EMP     70/5/dat
+         ----         via3:70/44/dat    70/48/EMP
+         ----         met4:71/20/dat    71/16/EMP     71/5/dat
+         ----         via4:71/44/dat    71/48/EMP
+         ----         met5:72/20/dat    72/16/EMP     72/5/dat
+         ----          pad:76/20/EMP     76/5/EMP    76/16/EMP
+         ----          pnp:82/44/EMP    82/59/EMP
+         ----          npn:82/20/EMP     82/5/EMP
+         ----          rdl:74/20/EMP    74/16/EMP     74/5/EMP
+         ----     inductor:82/24/EMP    82/25/EMP
+       0 total error(s) among 0 error type(s), 33 checks, cell: user_project_wrapper
+Writing report...
+VmPeak:	 2898928 kB
+VmHWM:	 1533836 kB
diff --git a/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_zeroarea_check.log b/mpw_precheck/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..90afe4b
--- /dev/null
+++ b/mpw_precheck/logs/klayout_zeroarea_check.log
@@ -0,0 +1,6 @@
+writing to /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/user_project_wrapper_no_zero_areas.gds
+0 zero-area shapes
+0 zero-length paths,  0 zero-length paths deleted.
+0 total zero-area objects,  0 total objects deleted.
+VmPeak:	 1892976 kB
+VmHWM:	 1563632 kB
diff --git a/mpw_precheck/logs/klayout_zeroarea_check.total b/mpw_precheck/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/magic_drc_check.log b/mpw_precheck/logs/magic_drc_check.log
new file mode 100644
index 0000000..7e3ddcd
--- /dev/null
+++ b/mpw_precheck/logs/magic_drc_check.log
@@ -0,0 +1,558 @@
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Error parsing "/opt/checks/tech-files/sky130A.magicrc": can't read "::env(PDK_PATH)": no such variable
+Bad local startup file "/opt/checks/tech-files/sky130A.magicrc", continuing without.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Detected an SRAM module
+Pre-loading a maglef of the SRAM block: sky130_sram_1kbyte_1rw1r_32x256_8
+Cell sky130_sram_1kbyte_1rw1r_32x256_8 has technology "sky130A", but current technology is "minimum"
+Loading technology sky130A
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Cell path is now "$CAD_ROOT/magic/sys/current $CAD_ROOT/magic/tutorial /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/mag /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_io/maglef /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_pr/mag /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_pr/maglef /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_sc_hd/mag /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_sc_hd/maglef /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_sc_hvl/mag /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_fd_sc_hvl/maglef /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_ml_xx_hd/mag /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_sram_macros/mag /opt/pdks/volare/sky130/versions/0059588eebfc704681dc2368bd1d33d96281d10f/sky130A/libs.ref/sky130_sram_macros/maglef"
+Scaled magic input cell sky130_sram_1kbyte_1rw1r_32x256_8 geometry by factor of 2
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__nand4_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__bufbuf_16".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__a211oi_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__or2b_1".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__or3_4".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__or3_2".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__or2b_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__or4_2".
+Reading "cawb".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_22".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_39".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_18".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_13".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_38".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_12".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_21".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_33".
+Reading "sky130_fd_bd_sram__openram_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_addr_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_addr_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wmask_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_15".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_29".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_28".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_10".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_11".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sli_dactive".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand2_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m12_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m12_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_17".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m4_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m4_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_16".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_15".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_6".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_5".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_18".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_delay_chain".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_14".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dactive".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand3_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_13".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m23_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m23_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_12".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_11".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m40_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m40_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_10".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m13_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m13_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_9".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_7".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_rw".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_5".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m39_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m39_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_19".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_6".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_r".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_data_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinvbuf".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_decoder".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_14".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec_0".
+Reading "sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_16".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_19".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec".
+Reading "sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and3_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_20".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode3x8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode2x4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_decoder".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_address_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_address".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_27".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_26".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_25".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_24".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w2_880_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array_0".
+Reading "sky130_fd_bd_sram__openram_sense_amp".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_sense_amp_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_23".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w0_550_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_data_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_write_mask_and_array".
+Reading "sky130_fd_bd_sram__openram_write_driver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_write_driver_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_data".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_7".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 11993864): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 11994568): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 11995528): Unknown layer/datatype in boundary, layer=22 type=21
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array_0".
+Reading "sky130_fd_bd_sram__openram_dp_cell_dummy".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12298056): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12301832): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12306024): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12310824): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12313032): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dummy_array".
+Reading "sky130_fd_bd_sram__openram_dp_cell_replica".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12405258): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12409034): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12413226): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12419690): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12422026): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_column_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_column".
+Reading "sky130_fd_bd_sram__openram_dp_cell".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12654184): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12657960): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12662152): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12668616): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12670952): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_bitcell_array".
+    5000 uses
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_bitcell_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_bank".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8".
+Warning:  cell sky130_sram_1kbyte_1rw1r_32x256_8 already existed before reading GDS!
+Using pre-existing cell definition
+Reading "rb".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__or2b_2".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__a211oi_4".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__o2bb2a_4".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__o211a_4".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__a22oi_4".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__nor3b_4".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__a311o_4".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__or4_4".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__nor4b_1".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__a311oi_4".
+Reading "sky130_fd_sc_hd__a311o_2".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__o22ai_2".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__a21bo_4".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__o31ai_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__o32a_4".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__o21ba_4".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a21boi_4".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__a2bb2oi_4".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__nor2b_1".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__or4bb_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__o311ai_4".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__inv_1".
+Reading "sky130_fd_sc_hd__a311oi_1".
+Reading "sky130_fd_sc_hd__a32oi_4".
+Reading "sky130_fd_sc_hd__o21bai_4".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__nor2b_4".
+Reading "sky130_fd_sc_hd__and4_4".
+Reading "sky130_fd_sc_hd__and4bb_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nor2b_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nor4b_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__a21bo_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o221ai_2".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__o2111a_4".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__a32oi_2".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "minisoc".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
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+    295000 uses
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+    465000 uses
+    470000 uses
+    475000 uses
+    480000 uses
+    485000 uses
+    490000 uses
+    495000 uses
+Reading "user_project_wrapper".
+[INFO]: Loading user_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+[INFO]: COUNT: 3252
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/user_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/mpw_precheck/logs/magic_drc_check.total b/mpw_precheck/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/pdks.info b/mpw_precheck/logs/pdks.info
new file mode 100644
index 0000000..f65aecb
--- /dev/null
+++ b/mpw_precheck/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 0059588eebfc704681dc2368bd1d33d96281d10f
+SKY130A PDK f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file
diff --git a/mpw_precheck/logs/precheck.log b/mpw_precheck/logs/precheck.log
new file mode 100644
index 0000000..0742667
--- /dev/null
+++ b/mpw_precheck/logs/precheck.log
@@ -0,0 +1,81 @@
+2022-12-10 07:56:36 - [INFO] - {{Project Git Info}} Repository: https://github.com/cloudxcc/ShapingTheWaves_8.git | Branch: initial | Commit: e42ca81a882d305f51f8691b1c3e88fc44f19831
+2022-12-10 07:56:36 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: shapingthewaves_8
+2022-12-10 07:56:38 - [INFO] - {{Project Type Info}} digital
+2022-12-10 07:56:39 - [INFO] - {{Project GDS Info}} user_project_wrapper: c22c3b78f6a7ba753aa87559fc6e0348a5df1922
+2022-12-10 07:56:39 - [INFO] - {{Tools Info}} KLayout: v0.27.12 | Magic: v8.3.340
+2022-12-10 07:56:39 - [INFO] - {{PDKs Info}} SKY130A: f70d8ca46961ff92719d8870a18a076370b85f6c | Open PDKs: 0059588eebfc704681dc2368bd1d33d96281d10f
+2022-12-10 07:56:39 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in 'shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs'
+2022-12-10 07:56:39 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, GPIO-Defines, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-12-10 07:56:39 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 14: License
+2022-12-10 07:56:40 - [INFO] - An approved LICENSE (Apache-2.0) was found in shapingthewaves_8.
+2022-12-10 07:56:40 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-12-10 07:56:41 - [INFO] - An approved LICENSE (Apache-2.0) was found in shapingthewaves_8.
+2022-12-10 07:56:41 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-12-10 07:56:41 - [WARNING] - {{SPDX COMPLIANCE CHECK FAILED}} Found 6 non-compliant file(s) with the SPDX Standard.
+2022-12-10 07:56:41 - [INFO] - SPDX COMPLIANCE: NON-COMPLIANT FILE(S) PREVIEW: ['shapingthewaves_8/openlane/user_proj_example/config.json', 'shapingthewaves_8/openlane/user_project_wrapper/config.json', 'shapingthewaves_8/verilog/includes/includes.gl+sdf.caravel_user_project', 'shapingthewaves_8/verilog/includes/includes.gl.caravel_user_project', 'shapingthewaves_8/verilog/includes/includes.rtl.caravel_user_project', 'shapingthewaves_8/verilog/rtl/mem/sky130_sram_1kbyte_1rw1r_32x256_8.v']
+2022-12-10 07:56:41 - [INFO] - For the full SPDX compliance report check: shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs/spdx_compliance_report.log
+2022-12-10 07:56:41 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 14: Makefile
+2022-12-10 07:56:41 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-12-10 07:56:41 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 14: Default
+2022-12-10 07:56:41 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-12-10 07:56:42 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-12-10 07:56:42 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 14: Documentation
+2022-12-10 07:56:42 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-12-10 07:56:42 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 14: Consistency
+2022-12-10 07:56:50 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in caravel are connected to power
+2022-12-10 07:56:50 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravel netlist passed all consistency checks.
+2022-12-10 07:56:50 - [INFO] - PORTS CHECK PASSED: Netlist user_project_wrapper ports match the golden wrapper ports
+2022-12-10 07:56:50 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_project_wrapper contains at least 1 instances (27 instances). 
+2022-12-10 07:56:50 - [INFO] - MODELING CHECK PASSED: Netlist user_project_wrapper is structural.
+2022-12-10 07:56:50 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_project_wrapper matches the provided structural netlist.
+2022-12-10 07:56:50 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in user_project_wrapper are connected to power
+2022-12-10 07:56:50 - [INFO] - PORT TYPES CHECK PASSED: Netlist user_project_wrapper port types match the golden wrapper port types.
+2022-12-10 07:56:50 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_project_wrapper netlist passed all consistency checks.
+2022-12-10 07:56:51 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-12-10 07:56:51 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 14: GPIO-Defines
+2022-12-10 07:56:51 - [INFO] - GPIO-DEFINES: Checking verilog/rtl/user_defines.v, parsing files: ['/opt/checks/gpio_defines_check/verilog_assets/gpio_modes_base.v', 'shapingthewaves_8/verilog/rtl/user_defines.v', '/opt/checks/gpio_defines_check/verilog_assets/gpio_modes_observe.v']
+2022-12-10 07:56:52 - [INFO] - GPIO-DEFINES report path: shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/gpio_defines.report
+2022-12-10 07:56:52 - [INFO] - {{GPIO-DEFINES CHECK PASSED}} The user verilog/rtl/user_defines.v is valid.
+2022-12-10 07:56:52 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 14: XOR
+2022-12-10 08:03:09 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/user_project_wrapper.xor.gds
+2022-12-10 08:03:09 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-12-10 08:03:09 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 14: Magic DRC
+2022-12-10 08:31:01 - [ERROR] - Violation Message 'Metal4 > 3um spacing to unrelated m4 < 0.4um (met4.5b)' found 835 times.
+2022-12-10 08:31:01 - [ERROR] - Violation Message 'Metal3 > 3um spacing to unrelated m3 < 0.4um (met3.3d)' found 292 times.
+2022-12-10 08:31:01 - [ERROR] - Violation Message 'Metal4 width < 0.3um (met4.1)' found 2 times.
+2022-12-10 08:31:01 - [ERROR] - Violation Message 'Metal3 spacing < 0.3um (met3.2)' found 68 times.
+2022-12-10 08:31:01 - [ERROR] - Violation Message 'Metal4 spacing < 0.3um (met4.2)' found 2055 times.
+2022-12-10 08:31:01 - [ERROR] - 3252 DRC violations
+2022-12-10 08:31:01 - [WARNING] - {{MAGIC DRC CHECK FAILED}} The GDS file, user_project_wrapper.gds, has DRC violations.
+2022-12-10 08:31:01 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 14: Klayout FEOL
+2022-12-10 08:31:01 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-10 08:31:01 - [INFO] - run: klayout -b -r /opt/checks/tech-files/sky130A_mr.drc -rd input=shapingthewaves_8/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_feol_check.xml -rd feol=true >& shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs/klayout_feol_check.log
+2022-12-10 08:34:58 - [INFO] - No DRC Violations found
+2022-12-10 08:34:58 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-10 08:34:58 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 14: Klayout BEOL
+2022-12-10 08:34:58 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-10 08:34:58 - [INFO] - run: klayout -b -r /opt/checks/tech-files/sky130A_mr.drc -rd input=shapingthewaves_8/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_beol_check.xml -rd beol=true >& shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs/klayout_beol_check.log
+2022-12-10 09:03:05 - [INFO] - No DRC Violations found
+2022-12-10 09:03:05 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-10 09:03:05 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 14: Klayout Offgrid
+2022-12-10 09:03:05 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-10 09:03:05 - [INFO] - run: klayout -b -r /opt/checks/tech-files/sky130A_mr.drc -rd input=shapingthewaves_8/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_offgrid_check.xml -rd offgrid=true >& shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs/klayout_offgrid_check.log
+2022-12-10 09:07:30 - [INFO] - No DRC Violations found
+2022-12-10 09:07:30 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-10 09:07:30 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 14: Klayout Metal Minimum Clear Area Density
+2022-12-10 09:07:30 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-10 09:07:30 - [INFO] - run: klayout -b -r /opt/checks/drc_checks/klayout/met_min_ca_density.lydrc -rd input=shapingthewaves_8/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_met_min_ca_density_check.xml >& shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs/klayout_met_min_ca_density_check.log
+2022-12-10 09:09:27 - [INFO] - No DRC Violations found
+2022-12-10 09:09:27 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-10 09:09:27 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 14: Klayout Pin Label Purposes Overlapping Drawing
+2022-12-10 09:09:27 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-10 09:09:27 - [INFO] - run: klayout -b -r /opt/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc -rd input=shapingthewaves_8/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml -rd top_cell_name=user_project_wrapper >& shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
+2022-12-10 09:10:22 - [INFO] - No DRC Violations found
+2022-12-10 09:10:22 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-10 09:10:22 - [INFO] - {{STEP UPDATE}} Executing Check 14 of 14: Klayout ZeroArea
+2022-12-10 09:10:22 - [INFO] - in CUSTOM klayout_gds_drc_check
+2022-12-10 09:10:22 - [INFO] - run: klayout -b -r /opt/checks/drc_checks/klayout/zeroarea.rb.drc -rd input=shapingthewaves_8/gds/user_project_wrapper.gds -rd topcell=user_project_wrapper -rd report=shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/klayout_zeroarea_check.xml -rd cleaned_output=shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/user_project_wrapper_no_zero_areas.gds >& shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs/klayout_zeroarea_check.log
+2022-12-10 09:10:40 - [INFO] - No DRC Violations found
+2022-12-10 09:10:40 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-12-10 09:10:40 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in 'shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/logs'
+2022-12-10 09:10:40 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/mpw_precheck/logs/spdx_compliance_report.log b/mpw_precheck/logs/spdx_compliance_report.log
new file mode 100644
index 0000000..8af77c2
--- /dev/null
+++ b/mpw_precheck/logs/spdx_compliance_report.log
@@ -0,0 +1,6 @@
+/root/shapingthewaves_8/openlane/user_proj_example/config.json
+/root/shapingthewaves_8/openlane/user_project_wrapper/config.json
+/root/shapingthewaves_8/verilog/includes/includes.gl+sdf.caravel_user_project
+/root/shapingthewaves_8/verilog/includes/includes.gl.caravel_user_project
+/root/shapingthewaves_8/verilog/includes/includes.rtl.caravel_user_project
+/root/shapingthewaves_8/verilog/rtl/mem/sky130_sram_1kbyte_1rw1r_32x256_8.v
diff --git a/mpw_precheck/logs/tools.info b/mpw_precheck/logs/tools.info
new file mode 100644
index 0000000..4056146
--- /dev/null
+++ b/mpw_precheck/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.12
+Magic: 8.3.340
\ No newline at end of file
diff --git a/mpw_precheck/logs/xor_check.log b/mpw_precheck/logs/xor_check.log
new file mode 100644
index 0000000..8242b22
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.log
@@ -0,0 +1,705 @@
+Reading file /root/shapingthewaves_8/gds/user_project_wrapper.gds for cell user_project_wrapper
+dbu=0.001
+cell user_project_wrapper dbu-bbox(ll;ur)=(-43630,-38270;2963250,3557950)
+cell user_project_wrapper dbu-bbox(left,bottom,right,top)=(-43630,-38270,2963250,3557950)
+cell user_project_wrapper dbu-size(width,height)=(3006880,3596220)
+cell user_project_wrapper micron-bbox(left,bottom,right,top)=(-43.63,-38.27,2963.25,3557.9500000000003)
+cell user_project_wrapper micron-size(width,height)=(3006.88,3596.2200000000003)
+Done.
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__nand4_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__bufbuf_16".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__a211oi_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__or2b_1".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__or3_4".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__or3_2".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__or2b_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__or4_2".
+Reading "cawb".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_22".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_39".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_18".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_13".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_38".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_12".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_21".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_33".
+Reading "sky130_fd_bd_sram__openram_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_addr_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_addr_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wmask_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_15".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_29".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_28".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_10".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_11".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sli_dactive".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand2_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m12_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m12_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_17".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m4_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m4_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_16".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_15".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_6".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_5".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_18".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_delay_chain".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_14".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dactive".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand3_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_13".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m23_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m23_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_12".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_11".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m40_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m40_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_10".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m13_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m13_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_9".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_7".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_rw".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_5".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m39_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m39_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_19".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_6".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_r".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_data_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinvbuf".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_decoder".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_14".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec_0".
+Reading "sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_16".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_19".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec".
+Reading "sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and3_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_20".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode3x8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode2x4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_decoder".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_address_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_address".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_27".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_26".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_25".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_24".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w2_880_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array_0".
+Reading "sky130_fd_bd_sram__openram_sense_amp".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_sense_amp_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_23".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w0_550_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_data_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_write_mask_and_array".
+Reading "sky130_fd_bd_sram__openram_write_driver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_write_driver_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_data".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_7".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 11993864): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 11994568): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 11995528): Unknown layer/datatype in boundary, layer=22 type=21
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array_0".
+Reading "sky130_fd_bd_sram__openram_dp_cell_dummy".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12298056): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12301832): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12306024): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12310824): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 12313032): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dummy_array".
+Reading "sky130_fd_bd_sram__openram_dp_cell_replica".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12405258): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12409034): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12413226): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12419690): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 12422026): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_column_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_column".
+Reading "sky130_fd_bd_sram__openram_dp_cell".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12654184): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12657960): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12662152): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12668616): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 12670952): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_bitcell_array".
+    5000 uses
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_bitcell_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_bank".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8".
+Reading "rb".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__or2b_2".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__a211oi_4".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__o2bb2a_4".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__o211a_4".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__a22oi_4".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__nor3b_4".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__a311o_4".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__or4_4".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__nor4b_1".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__a311oi_4".
+Reading "sky130_fd_sc_hd__a311o_2".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__o22ai_2".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__a21bo_4".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__o31ai_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__o32a_4".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__o21ba_4".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a21boi_4".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__a2bb2oi_4".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__nor2b_1".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__or4bb_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__o311ai_4".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__inv_1".
+Reading "sky130_fd_sc_hd__a311oi_1".
+Reading "sky130_fd_sc_hd__a32oi_4".
+Reading "sky130_fd_sc_hd__o21bai_4".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__nor2b_4".
+Reading "sky130_fd_sc_hd__and4_4".
+Reading "sky130_fd_sc_hd__and4bb_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nor2b_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nor4b_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__a21bo_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o221ai_2".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__o2111a_4".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__a32oi_2".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "minisoc".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
+    130000 uses
+    135000 uses
+    140000 uses
+    145000 uses
+    150000 uses
+    155000 uses
+    160000 uses
+    165000 uses
+    170000 uses
+    175000 uses
+    180000 uses
+    185000 uses
+    190000 uses
+    195000 uses
+    200000 uses
+    205000 uses
+    210000 uses
+    215000 uses
+    220000 uses
+    225000 uses
+    230000 uses
+    235000 uses
+    240000 uses
+    245000 uses
+    250000 uses
+    255000 uses
+    260000 uses
+    265000 uses
+    270000 uses
+    275000 uses
+    280000 uses
+    285000 uses
+    290000 uses
+    295000 uses
+    300000 uses
+    305000 uses
+    310000 uses
+    315000 uses
+    320000 uses
+    325000 uses
+    330000 uses
+    335000 uses
+    340000 uses
+    345000 uses
+    350000 uses
+    355000 uses
+    360000 uses
+    365000 uses
+    370000 uses
+    375000 uses
+    380000 uses
+    385000 uses
+    390000 uses
+    395000 uses
+    400000 uses
+    405000 uses
+    410000 uses
+    415000 uses
+    420000 uses
+    425000 uses
+    430000 uses
+    435000 uses
+    440000 uses
+    445000 uses
+    450000 uses
+    455000 uses
+    460000 uses
+    465000 uses
+    470000 uses
+    475000 uses
+    480000 uses
+    485000 uses
+    490000 uses
+    495000 uses
+Reading "user_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+
+Magic 8.3 revision 340 - Compiled on Thu Nov 17 13:45:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "user_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+Reading /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/user_project_wrapper_erased.gds ..
+Reading /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/user_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 530 (flat)  530 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 530 (flat)  530 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 107 (flat)  107 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 107 (flat)  107 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+--- Running XOR for 71/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+--- Running XOR for 71/44 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 116 (flat)  116 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 116 (flat)  116 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+Writing layout file: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/user_project_wrapper.xor.gds ..
+Total elapsed: 0.130s  Memory: 524.00M
diff --git a/mpw_precheck/logs/xor_check.total b/mpw_precheck/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/outputs/reports/gpio_defines.report b/mpw_precheck/outputs/reports/gpio_defines.report
new file mode 100644
index 0000000..07461af
--- /dev/null
+++ b/mpw_precheck/outputs/reports/gpio_defines.report
@@ -0,0 +1,33 @@
+USER_CONFIG_GPIO_5_INIT    13'h1801
+USER_CONFIG_GPIO_6_INIT    13'h1801
+USER_CONFIG_GPIO_7_INIT    13'h1801
+USER_CONFIG_GPIO_8_INIT    13'h1801
+USER_CONFIG_GPIO_9_INIT    13'h1801
+USER_CONFIG_GPIO_10_INIT   13'h1801
+USER_CONFIG_GPIO_11_INIT   13'h1801
+USER_CONFIG_GPIO_12_INIT   13'h1801
+USER_CONFIG_GPIO_13_INIT   13'h1801
+USER_CONFIG_GPIO_14_INIT   13'h1801
+USER_CONFIG_GPIO_15_INIT   13'h1801
+USER_CONFIG_GPIO_16_INIT   13'h1801
+USER_CONFIG_GPIO_17_INIT   13'h1801
+USER_CONFIG_GPIO_18_INIT   13'h1801
+USER_CONFIG_GPIO_19_INIT   13'h1801
+USER_CONFIG_GPIO_20_INIT   13'h1801
+USER_CONFIG_GPIO_21_INIT   13'h1801
+USER_CONFIG_GPIO_22_INIT   13'h1801
+USER_CONFIG_GPIO_23_INIT   13'h1801
+USER_CONFIG_GPIO_24_INIT   13'h1801
+USER_CONFIG_GPIO_25_INIT   13'h1801
+USER_CONFIG_GPIO_26_INIT   13'h1801
+USER_CONFIG_GPIO_27_INIT   13'h1801
+USER_CONFIG_GPIO_28_INIT   13'h1801
+USER_CONFIG_GPIO_29_INIT   13'h1801
+USER_CONFIG_GPIO_30_INIT   13'h1801
+USER_CONFIG_GPIO_31_INIT   13'h1801
+USER_CONFIG_GPIO_32_INIT   13'h1801
+USER_CONFIG_GPIO_33_INIT   13'h1801
+USER_CONFIG_GPIO_34_INIT   13'h1801
+USER_CONFIG_GPIO_35_INIT   13'h1801
+USER_CONFIG_GPIO_36_INIT   13'h1801
+USER_CONFIG_GPIO_37_INIT   13'h1801
diff --git a/mpw_precheck/outputs/reports/klayout_beol_check.xml b/mpw_precheck/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..5ffd971
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_feol_check.xml b/mpw_precheck/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..71b30a8
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,375 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.11</name>
+   <description>capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.11</name>
+   <description>cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..698a39a
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_offgrid_check.xml b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..95ebbc9
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>dnwell_angle</name>
+   <description>x.3a : non 45 degree angle dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_angle</name>
+   <description>x.3a : non 45 degree angle nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_angle</name>
+   <description>x.3a : non 45 degree angle pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_angle</name>
+   <description>x.3a : non 45 degree angle pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_angle</name>
+   <description>x.3a : non 45 degree angle hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_angle</name>
+   <description>x.3a : non 45 degree angle hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_angle</name>
+   <description>x.3a : non 45 degree angle lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_angle</name>
+   <description>x.3a : non 45 degree angle ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2 : non 90 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2c : non 45 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2 : non 90 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2c : non 45 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_angle</name>
+   <description>x.3a : non 45 degree angle tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_angle</name>
+   <description>x.2 : non 90 degree angle poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_angle</name>
+   <description>x.3a : non 45 degree angle rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_angle</name>
+   <description>x.3a : non 45 degree angle npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_angle</name>
+   <description>x.3a : non 45 degree angle nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_angle</name>
+   <description>x.3a : non 45 degree angle psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_angle</name>
+   <description>x.2 : non 90 degree angle licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_angle</name>
+   <description>x.3a : non 45 degree angle li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_angle</name>
+   <description>x.2 : non 90 degree angle mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_angle</name>
+   <description>x.3a : non 45 degree angle vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_angle</name>
+   <description>x.3a : non 45 degree angle m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_angle</name>
+   <description>x.2 : non 90 degree angle via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_angle</name>
+   <description>x.3a : non 45 degree angle m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_angle</name>
+   <description>x.2 : non 90 degree angle via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_angle</name>
+   <description>x.3a : non 45 degree angle m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_angle</name>
+   <description>x.2 : non 90 degree angle via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_angle</name>
+   <description>x.3a : non 45 degree angle nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_angle</name>
+   <description>x.3a : non 45 degree angle m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_angle</name>
+   <description>x.2 : non 90 degree angle via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_angle</name>
+   <description>x.3a : non 45 degree angle m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_angle</name>
+   <description>x.3a : non 45 degree angle pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_angle</name>
+   <description>x.2 : non 90 degree angle mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_angle</name>
+   <description>x.3a : non 45 degree angle hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_angle</name>
+   <description>x.3a : non 45 degree angle hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_angle</name>
+   <description>x.3a : non 45 degree angle vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_angle</name>
+   <description>x.3a : non 45 degree angle uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_angle</name>
+   <description>x.3a : non 45 degree angle pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>areaid_re_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on areaid.re</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..eefe37f
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/root/shapingthewaves_8/gds/user_project_wrapper.gds, topcell=user_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml b/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..7f95f69
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/magic_drc_check.drc.report b/mpw_precheck/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..fdcb9ee
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,3272 @@
+user_project_wrapper
+----------------------------------------
+Metal4 > 3um spacing to unrelated m4 < 0.4um (met4.5b)
+----------------------------------------
+ 203.000 314.490 203.100 314.560
+ 203.000 313.930 203.100 314.490
+ 203.000 313.930 203.100 314.330
+ 203.000 167.430 203.100 167.830
+ 203.000 167.270 203.100 167.830
+ 203.000 166.090 203.100 167.270
+ 203.000 165.670 203.100 166.090
+ 203.000 164.490 203.100 165.670
+ 203.000 163.930 203.100 164.490
+ 203.000 163.930 203.100 164.330
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+----------------------------------------
+Metal3 > 3um spacing to unrelated m3 < 0.4um (met3.3d)
+----------------------------------------
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+----------------------------------------
+Metal4 width < 0.3um (met4.1)
+----------------------------------------
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+----------------------------------------
+Metal3 spacing < 0.3um (met3.2)
+----------------------------------------
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+----------------------------------------
+Metal4 spacing < 0.3um (met4.2)
+----------------------------------------
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+ 2726.100 2860.760 2727.000 2860.830
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+ 2728.140 2860.760 2729.040 2860.830
+ 2728.140 2860.620 2729.040 2860.760
+ 2725.420 2860.760 2725.720 2860.830
+ 2725.420 2860.620 2725.720 2860.760
+ 2726.020 2860.760 2726.320 2860.830
+ 2726.020 2860.620 2726.320 2860.760
+ 2726.100 2860.760 2726.400 2860.830
+ 2726.100 2860.620 2726.400 2860.760
+ 2726.700 2860.760 2727.000 2860.830
+ 2726.700 2860.620 2727.000 2860.760
+ 2728.140 2860.760 2728.440 2860.830
+ 2728.140 2860.620 2728.440 2860.760
+ 2728.740 2860.760 2729.040 2860.830
+ 2728.740 2860.620 2729.040 2860.760
+----------------------------------------
+[INFO]: COUNT: 3252
+[INFO]: Should be divided by 3 or 4
+
diff --git a/mpw_precheck/outputs/reports/magic_drc_check.rdb b/mpw_precheck/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..46a30d7
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,16277 @@
+$user_project_wrapper
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+r_0_met4.5b
+Rule File Pathname: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/mpw_precheck/2609f171-29ee-4987-b3b5-92213d2a1d23/outputs/reports/magic_drc_check.drc.report
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diff --git a/mpw_precheck/outputs/reports/magic_drc_check.tcl b/mpw_precheck/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..2a0b178
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.tcl
@@ -0,0 +1,3252 @@
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+box 1925.760um 503.200um 1926.060um 503.300; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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+box 1931.880um 503.200um 1932.180um 503.300; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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+box 1955.000um 503.200um 1955.300um 503.300; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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+box 1967.280um 503.200um 1967.540um 503.300; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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+box 2603.320um 2860.320um 2603.580um 2860.530; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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+box 2603.620um 2860.620um 2603.920um 2860.830; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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+box 2628.780um 2860.620um 2629.080um 2860.830; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
+box 2634.600um 2860.320um 2634.860um 2860.530; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
+box 2634.600um 2860.320um 2634.900um 2860.530; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
+box 2640.720um 2860.320um 2641.020um 2860.530; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
+box 2634.860um 2860.620um 2635.200um 2860.830; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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+box 2641.020um 2860.620um 2641.320um 2860.830; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
+box 2725.720um 2860.320um 2726.020um 2860.530; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
+box 2726.400um 2860.320um 2726.700um 2860.530; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
+box 2728.440um 2860.320um 2728.740um 2860.530; feedback add "Metal4 spacing < 0.3um (met4.2)" medium
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diff --git a/mpw_precheck/outputs/reports/magic_drc_check.tr b/mpw_precheck/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..37f4da0
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.tr
@@ -0,0 +1,9756 @@
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 314.490 ) - ( 203.100, 314.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 313.930 ) - ( 203.100, 314.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 313.930 ) - ( 203.100, 314.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 167.430 ) - ( 203.100, 167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 167.270 ) - ( 203.100, 167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 166.090 ) - ( 203.100, 167.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 165.670 ) - ( 203.100, 166.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 164.490 ) - ( 203.100, 165.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 163.930 ) - ( 203.100, 164.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 163.930 ) - ( 203.100, 164.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 278.920, 100.220 ) - ( 279.220, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 285.040, 100.220 ) - ( 285.340, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 291.160, 100.220 ) - ( 291.460, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 297.280, 100.220 ) - ( 297.580, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 302.720, 100.220 ) - ( 303.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 308.840, 100.220 ) - ( 309.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 467.430 ) - ( 203.100, 467.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 467.270 ) - ( 203.100, 467.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 466.090 ) - ( 203.100, 467.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 465.670 ) - ( 203.100, 466.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 464.490 ) - ( 203.100, 465.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 463.930 ) - ( 203.100, 464.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 463.930 ) - ( 203.100, 464.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 317.430 ) - ( 203.100, 317.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 317.270 ) - ( 203.100, 317.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 316.090 ) - ( 203.100, 317.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 315.670 ) - ( 203.100, 316.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 314.560 ) - ( 203.100, 315.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 917.430 ) - ( 203.100, 917.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 917.270 ) - ( 203.100, 917.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 916.090 ) - ( 203.100, 917.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 915.670 ) - ( 203.100, 916.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 914.490 ) - ( 203.100, 915.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 913.930 ) - ( 203.100, 914.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 913.930 ) - ( 203.100, 914.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 278.920, 790.220 ) - ( 279.220, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 285.040, 790.220 ) - ( 285.340, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 291.160, 790.220 ) - ( 291.460, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 297.280, 790.220 ) - ( 297.580, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 302.720, 790.220 ) - ( 303.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 308.840, 790.220 ) - ( 309.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1067.430 ) - ( 203.100, 1067.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1067.270 ) - ( 203.100, 1067.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1066.090 ) - ( 203.100, 1067.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1065.670 ) - ( 203.100, 1066.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1064.490 ) - ( 203.100, 1065.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1063.930 ) - ( 203.100, 1064.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1063.930 ) - ( 203.100, 1064.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1517.430 ) - ( 203.100, 1517.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1517.270 ) - ( 203.100, 1517.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1516.090 ) - ( 203.100, 1517.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1515.670 ) - ( 203.100, 1516.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1514.490 ) - ( 203.100, 1515.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1513.930 ) - ( 203.100, 1514.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1513.930 ) - ( 203.100, 1514.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 278.920, 1480.220 ) - ( 279.220, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 285.040, 1480.220 ) - ( 285.340, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 291.160, 1480.220 ) - ( 291.460, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 297.280, 1480.220 ) - ( 297.580, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 302.720, 1480.220 ) - ( 303.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 308.840, 1480.220 ) - ( 309.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1817.430 ) - ( 203.100, 1817.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1817.270 ) - ( 203.100, 1817.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1816.090 ) - ( 203.100, 1817.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1815.670 ) - ( 203.100, 1816.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1814.490 ) - ( 203.100, 1815.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1813.930 ) - ( 203.100, 1814.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1813.930 ) - ( 203.100, 1814.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1667.430 ) - ( 203.100, 1667.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1667.270 ) - ( 203.100, 1667.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1666.090 ) - ( 203.100, 1667.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1665.670 ) - ( 203.100, 1666.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1664.490 ) - ( 203.100, 1665.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1663.930 ) - ( 203.100, 1664.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 1663.930 ) - ( 203.100, 1664.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 279.070, 2130.220 ) - ( 282.130, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 285.190, 2130.220 ) - ( 288.570, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 288.480, 2130.220 ) - ( 288.570, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 291.310, 2130.220 ) - ( 294.090, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 297.430, 2130.220 ) - ( 300.440, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 300.040, 2130.220 ) - ( 300.440, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 302.870, 2130.220 ) - ( 303.290, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 307.590, 2130.220 ) - ( 307.740, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 307.590, 2130.220 ) - ( 308.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2417.430 ) - ( 203.100, 2417.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2417.270 ) - ( 203.100, 2417.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2416.090 ) - ( 203.100, 2417.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2415.670 ) - ( 203.100, 2416.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2414.490 ) - ( 203.100, 2415.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2413.930 ) - ( 203.100, 2414.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2413.930 ) - ( 203.100, 2414.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2267.430 ) - ( 203.100, 2267.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2267.270 ) - ( 203.100, 2267.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2266.090 ) - ( 203.100, 2267.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2265.670 ) - ( 203.100, 2266.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2264.490 ) - ( 203.100, 2265.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2263.930 ) - ( 203.100, 2264.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 2263.930 ) - ( 203.100, 2264.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3017.430 ) - ( 203.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3017.270 ) - ( 203.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3016.090 ) - ( 203.100, 3017.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3015.670 ) - ( 203.100, 3016.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3014.490 ) - ( 203.100, 3015.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3013.930 ) - ( 203.100, 3014.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3013.930 ) - ( 203.100, 3014.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 204.160, 2864.490 ) - ( 204.860, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 204.860, 2864.490 ) - ( 205.140, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 204.160, 2864.330 ) - ( 205.140, 2864.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 278.920, 2860.220 ) - ( 279.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 285.040, 2860.220 ) - ( 285.340, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 291.160, 2860.220 ) - ( 291.460, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 297.280, 2860.220 ) - ( 297.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 302.720, 2860.220 ) - ( 303.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 308.840, 2860.220 ) - ( 309.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3167.430 ) - ( 203.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3167.270 ) - ( 203.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3166.090 ) - ( 203.100, 3167.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3165.670 ) - ( 203.100, 3166.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3164.490 ) - ( 203.100, 3165.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3163.930 ) - ( 203.100, 3164.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 203.000, 3163.930 ) - ( 203.100, 3164.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 314.960, 100.220 ) - ( 315.260, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 320.400, 100.220 ) - ( 320.700, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 100.220 ) - ( 326.100, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 100.220 ) - ( 326.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 331.960, 100.220 ) - ( 332.260, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 344.200, 100.220 ) - ( 344.500, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 355.760, 100.220 ) - ( 356.060, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 361.200, 100.220 ) - ( 361.500, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 367.320, 100.220 ) - ( 367.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 368.000, 100.220 ) - ( 368.300, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 373.440, 100.220 ) - ( 373.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 100.220 ) - ( 379.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 100.220 ) - ( 379.180, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 390.440, 100.220 ) - ( 390.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 391.120, 100.220 ) - ( 391.420, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 448.920, 100.220 ) - ( 449.220, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.320, 100.220 ) - ( 452.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.360, 100.220 ) - ( 452.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 460.480, 100.220 ) - ( 460.780, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 461.840, 100.220 ) - ( 462.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 100.220 ) - ( 489.980, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 100.220 ) - ( 490.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 491.080, 100.220 ) - ( 491.380, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.840, 100.220 ) - ( 496.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.880, 100.220 ) - ( 496.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 100.220 ) - ( 503.580, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 100.220 ) - ( 503.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 100.220 ) - ( 528.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 100.220 ) - ( 528.780, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 100.220 ) - ( 534.860, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 100.220 ) - ( 534.900, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 540.720, 100.220 ) - ( 541.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 625.720, 100.220 ) - ( 626.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 626.400, 100.220 ) - ( 626.700, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 628.440, 100.220 ) - ( 628.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 314.960, 790.220 ) - ( 315.260, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 320.400, 790.220 ) - ( 320.700, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 790.220 ) - ( 326.100, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 790.220 ) - ( 326.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 331.960, 790.220 ) - ( 332.260, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 344.200, 790.220 ) - ( 344.500, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 355.760, 790.220 ) - ( 356.060, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 361.200, 790.220 ) - ( 361.500, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 367.320, 790.220 ) - ( 367.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 368.000, 790.220 ) - ( 368.300, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 373.440, 790.220 ) - ( 373.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 790.220 ) - ( 379.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 790.220 ) - ( 379.180, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 390.440, 790.220 ) - ( 390.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 391.120, 790.220 ) - ( 391.420, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 448.920, 790.220 ) - ( 449.220, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.320, 790.220 ) - ( 452.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.360, 790.220 ) - ( 452.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 460.480, 790.220 ) - ( 460.780, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 461.840, 790.220 ) - ( 462.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 790.220 ) - ( 489.980, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 790.220 ) - ( 490.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 491.080, 790.220 ) - ( 491.380, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.840, 790.220 ) - ( 496.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.880, 790.220 ) - ( 496.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 790.220 ) - ( 503.580, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 790.220 ) - ( 503.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 790.220 ) - ( 528.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 790.220 ) - ( 528.780, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 790.220 ) - ( 534.860, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 790.220 ) - ( 534.900, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 540.720, 790.220 ) - ( 541.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 625.720, 790.220 ) - ( 626.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 626.400, 790.220 ) - ( 626.700, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 628.440, 790.220 ) - ( 628.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 314.960, 1480.220 ) - ( 315.260, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 320.400, 1480.220 ) - ( 320.700, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 1480.220 ) - ( 326.100, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 1480.220 ) - ( 326.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 331.960, 1480.220 ) - ( 332.260, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 344.200, 1480.220 ) - ( 344.500, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 355.760, 1480.220 ) - ( 356.060, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 361.200, 1480.220 ) - ( 361.500, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 367.320, 1480.220 ) - ( 367.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 368.000, 1480.220 ) - ( 368.300, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 373.440, 1480.220 ) - ( 373.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 1480.220 ) - ( 379.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 1480.220 ) - ( 379.180, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 390.440, 1480.220 ) - ( 390.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 391.120, 1480.220 ) - ( 391.420, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 448.920, 1480.220 ) - ( 449.220, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.320, 1480.220 ) - ( 452.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.360, 1480.220 ) - ( 452.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 460.480, 1480.220 ) - ( 460.780, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 461.840, 1480.220 ) - ( 462.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 1480.220 ) - ( 489.980, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 1480.220 ) - ( 490.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 491.080, 1480.220 ) - ( 491.380, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.840, 1480.220 ) - ( 496.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.880, 1480.220 ) - ( 496.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 1480.220 ) - ( 503.580, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 1480.220 ) - ( 503.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 1480.220 ) - ( 528.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 1480.220 ) - ( 528.780, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 1480.220 ) - ( 534.860, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 1480.220 ) - ( 534.900, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 540.720, 1480.220 ) - ( 541.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 625.720, 1480.220 ) - ( 626.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 626.400, 1480.220 ) - ( 626.700, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 628.440, 1480.220 ) - ( 628.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 315.110, 2130.220 ) - ( 317.090, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 320.550, 2130.220 ) - ( 323.530, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.990, 2130.220 ) - ( 326.100, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.990, 2130.220 ) - ( 329.050, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 332.110, 2130.220 ) - ( 335.490, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 335.400, 2130.220 ) - ( 335.490, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 342.020, 2130.220 ) - ( 342.420, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 342.020, 2130.220 ) - ( 344.350, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 354.510, 2130.220 ) - ( 354.660, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 354.510, 2130.220 ) - ( 355.910, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 361.350, 2130.220 ) - ( 362.170, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 368.150, 2130.220 ) - ( 369.530, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 370.150, 2130.220 ) - ( 370.480, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 370.150, 2130.220 ) - ( 370.480, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 373.590, 2130.220 ) - ( 376.890, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 376.880, 2130.220 ) - ( 376.890, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 379.030, 2130.220 ) - ( 379.140, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 379.030, 2130.220 ) - ( 379.650, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 382.110, 2130.220 ) - ( 382.720, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 382.320, 2130.220 ) - ( 382.720, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 389.620, 2130.220 ) - ( 390.020, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 389.620, 2130.220 ) - ( 390.590, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 400.510, 2130.220 ) - ( 401.080, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 400.680, 2130.220 ) - ( 401.080, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 449.070, 2130.220 ) - ( 450.490, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 451.110, 2130.220 ) - ( 452.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.360, 2130.220 ) - ( 452.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 459.660, 2130.220 ) - ( 460.060, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 459.660, 2130.220 ) - ( 460.630, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 461.990, 2130.220 ) - ( 462.450, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 478.700, 2130.220 ) - ( 479.100, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 478.700, 2130.220 ) - ( 481.770, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 491.230, 2130.220 ) - ( 491.890, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.270, 2130.220 ) - ( 495.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.880, 2130.220 ) - ( 495.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.180, 2130.220 ) - ( 503.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.180, 2130.220 ) - ( 503.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 506.310, 2130.220 ) - ( 509.200, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 508.800, 2130.220 ) - ( 509.200, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 512.750, 2130.220 ) - ( 515.320, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 514.920, 2130.220 ) - ( 515.320, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 522.220, 2130.220 ) - ( 522.620, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 522.220, 2130.220 ) - ( 524.090, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.630, 2130.220 ) - ( 528.740, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.630, 2130.220 ) - ( 530.530, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 532.070, 2130.220 ) - ( 533.680, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 533.280, 2130.220 ) - ( 533.680, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.460, 2130.220 ) - ( 534.750, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.460, 2130.220 ) - ( 534.750, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 540.870, 2130.220 ) - ( 544.330, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 624.990, 2130.220 ) - ( 625.870, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 626.550, 2130.220 ) - ( 627.130, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 628.590, 2130.220 ) - ( 629.120, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 314.960, 2860.220 ) - ( 315.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 320.400, 2860.220 ) - ( 320.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 2860.220 ) - ( 326.100, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 325.840, 2860.220 ) - ( 326.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 331.960, 2860.220 ) - ( 332.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 344.200, 2860.220 ) - ( 344.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 355.760, 2860.220 ) - ( 356.060, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 361.200, 2860.220 ) - ( 361.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 367.320, 2860.220 ) - ( 367.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 368.000, 2860.220 ) - ( 368.300, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 373.440, 2860.220 ) - ( 373.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 2860.220 ) - ( 379.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 378.880, 2860.220 ) - ( 379.180, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 390.440, 2860.220 ) - ( 390.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 391.120, 2860.220 ) - ( 391.420, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 448.920, 2860.220 ) - ( 449.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.320, 2860.220 ) - ( 452.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 452.360, 2860.220 ) - ( 452.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 460.480, 2860.220 ) - ( 460.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 461.840, 2860.220 ) - ( 462.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 2860.220 ) - ( 489.980, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 489.720, 2860.220 ) - ( 490.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 491.080, 2860.220 ) - ( 491.380, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.840, 2860.220 ) - ( 496.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 495.880, 2860.220 ) - ( 496.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 2860.220 ) - ( 503.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 503.320, 2860.220 ) - ( 503.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 2860.220 ) - ( 528.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 528.480, 2860.220 ) - ( 528.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 2860.220 ) - ( 534.860, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 534.600, 2860.220 ) - ( 534.900, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 540.720, 2860.220 ) - ( 541.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 625.720, 2860.220 ) - ( 626.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 626.400, 2860.220 ) - ( 626.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 628.440, 2860.220 ) - ( 628.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 629.120, 2130.220 ) - ( 631.730, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3017.430 ) - ( 903.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3017.270 ) - ( 903.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3016.090 ) - ( 903.100, 3017.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3015.670 ) - ( 903.100, 3016.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3014.490 ) - ( 903.100, 3015.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3013.930 ) - ( 903.100, 3014.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3013.930 ) - ( 903.100, 3014.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 904.160, 2864.490 ) - ( 904.860, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 904.860, 2864.490 ) - ( 905.140, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 904.160, 2864.330 ) - ( 905.140, 2864.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3167.430 ) - ( 903.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3167.270 ) - ( 903.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3166.090 ) - ( 903.100, 3167.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3165.670 ) - ( 903.100, 3166.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3164.490 ) - ( 903.100, 3165.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3163.930 ) - ( 903.100, 3164.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 903.000, 3163.930 ) - ( 903.100, 3164.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 978.920, 2860.220 ) - ( 979.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 985.040, 2860.220 ) - ( 985.340, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 991.160, 2860.220 ) - ( 991.460, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 997.280, 2860.220 ) - ( 997.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1002.720, 2860.220 ) - ( 1003.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1008.840, 2860.220 ) - ( 1009.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1014.960, 2860.220 ) - ( 1015.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1020.400, 2860.220 ) - ( 1020.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1025.840, 2860.220 ) - ( 1026.100, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1025.840, 2860.220 ) - ( 1026.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1031.960, 2860.220 ) - ( 1032.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1044.200, 2860.220 ) - ( 1044.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1055.760, 2860.220 ) - ( 1056.060, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1061.200, 2860.220 ) - ( 1061.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1067.320, 2860.220 ) - ( 1067.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1068.000, 2860.220 ) - ( 1068.300, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1073.440, 2860.220 ) - ( 1073.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1078.880, 2860.220 ) - ( 1079.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1078.880, 2860.220 ) - ( 1079.180, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1090.440, 2860.220 ) - ( 1090.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1091.120, 2860.220 ) - ( 1091.420, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1148.920, 2860.220 ) - ( 1149.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1152.320, 2860.220 ) - ( 1152.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1152.360, 2860.220 ) - ( 1152.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1160.480, 2860.220 ) - ( 1160.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1161.840, 2860.220 ) - ( 1162.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1189.720, 2860.220 ) - ( 1189.980, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1189.720, 2860.220 ) - ( 1190.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1191.080, 2860.220 ) - ( 1191.380, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1195.840, 2860.220 ) - ( 1196.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1195.880, 2860.220 ) - ( 1196.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1203.320, 2860.220 ) - ( 1203.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1203.320, 2860.220 ) - ( 1203.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1228.480, 2860.220 ) - ( 1228.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1228.480, 2860.220 ) - ( 1228.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1234.600, 2860.220 ) - ( 1234.860, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1234.600, 2860.220 ) - ( 1234.900, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1240.720, 2860.220 ) - ( 1241.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1325.720, 2860.220 ) - ( 1326.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1326.400, 2860.220 ) - ( 1326.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1328.440, 2860.220 ) - ( 1328.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1664.640, 503.200 ) - ( 1664.940, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1666.680, 503.200 ) - ( 1666.980, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1667.360, 503.200 ) - ( 1667.660, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1752.360, 503.200 ) - ( 1752.660, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1758.480, 503.200 ) - ( 1758.780, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1758.520, 503.200 ) - ( 1758.780, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1764.600, 503.200 ) - ( 1764.900, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1764.640, 503.200 ) - ( 1764.900, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1789.760, 503.200 ) - ( 1790.060, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1789.800, 503.200 ) - ( 1790.060, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1797.240, 503.200 ) - ( 1797.540, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1802.000, 503.200 ) - ( 1802.300, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1803.360, 503.200 ) - ( 1803.660, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1797.240, 503.200 ) - ( 1797.500, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1803.400, 503.200 ) - ( 1803.660, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1831.240, 503.200 ) - ( 1831.540, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1832.600, 503.200 ) - ( 1832.900, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1840.760, 503.200 ) - ( 1841.060, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1844.160, 503.200 ) - ( 1844.460, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1840.760, 503.200 ) - ( 1841.020, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3017.430 ) - ( 1603.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3017.270 ) - ( 1603.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3016.090 ) - ( 1603.100, 3017.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3015.670 ) - ( 1603.100, 3016.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3014.490 ) - ( 1603.100, 3015.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3013.930 ) - ( 1603.100, 3014.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3013.930 ) - ( 1603.100, 3014.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1604.160, 2864.490 ) - ( 1604.860, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1604.860, 2864.490 ) - ( 1605.140, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1604.160, 2864.330 ) - ( 1605.140, 2864.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1678.920, 2860.220 ) - ( 1679.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1685.040, 2860.220 ) - ( 1685.340, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1691.160, 2860.220 ) - ( 1691.460, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1697.280, 2860.220 ) - ( 1697.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1702.720, 2860.220 ) - ( 1703.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1708.840, 2860.220 ) - ( 1709.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1714.960, 2860.220 ) - ( 1715.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1720.400, 2860.220 ) - ( 1720.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1725.840, 2860.220 ) - ( 1726.100, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1725.840, 2860.220 ) - ( 1726.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1731.960, 2860.220 ) - ( 1732.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1744.200, 2860.220 ) - ( 1744.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1755.760, 2860.220 ) - ( 1756.060, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1761.200, 2860.220 ) - ( 1761.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1767.320, 2860.220 ) - ( 1767.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1768.000, 2860.220 ) - ( 1768.300, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1773.440, 2860.220 ) - ( 1773.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1778.880, 2860.220 ) - ( 1779.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1778.880, 2860.220 ) - ( 1779.180, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1790.440, 2860.220 ) - ( 1790.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1791.120, 2860.220 ) - ( 1791.420, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1848.920, 2860.220 ) - ( 1849.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1852.320, 2860.220 ) - ( 1852.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1852.360, 2860.220 ) - ( 1852.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1860.480, 2860.220 ) - ( 1860.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1861.840, 2860.220 ) - ( 1862.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3167.430 ) - ( 1603.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3167.270 ) - ( 1603.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3166.090 ) - ( 1603.100, 3167.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3165.670 ) - ( 1603.100, 3166.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3164.490 ) - ( 1603.100, 3165.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3163.930 ) - ( 1603.100, 3164.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1603.000, 3163.930 ) - ( 1603.100, 3164.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 313.930 ) - ( 2090.380, 314.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 313.930 ) - ( 2090.380, 314.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 314.490 ) - ( 2090.380, 314.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 167.430 ) - ( 2090.380, 167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 163.930 ) - ( 2090.380, 164.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 163.930 ) - ( 2090.380, 164.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 164.490 ) - ( 2090.380, 165.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 165.670 ) - ( 2090.380, 166.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 166.090 ) - ( 2090.380, 167.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 167.270 ) - ( 2090.380, 167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1901.960, 503.200 ) - ( 1902.260, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1902.640, 503.200 ) - ( 1902.940, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1914.200, 503.200 ) - ( 1914.500, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1914.240, 503.200 ) - ( 1914.500, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1919.640, 503.200 ) - ( 1919.940, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1925.080, 503.200 ) - ( 1925.380, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1925.760, 503.200 ) - ( 1926.060, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1931.880, 503.200 ) - ( 1932.180, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1937.320, 503.200 ) - ( 1937.620, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1948.880, 503.200 ) - ( 1949.180, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1961.120, 503.200 ) - ( 1961.420, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1967.240, 503.200 ) - ( 1967.540, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1967.280, 503.200 ) - ( 1967.540, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1972.680, 503.200 ) - ( 1972.980, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1978.120, 503.200 ) - ( 1978.420, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1984.240, 503.200 ) - ( 1984.540, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1990.360, 503.200 ) - ( 1990.660, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1995.800, 503.200 ) - ( 1996.100, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2001.920, 503.200 ) - ( 2002.220, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2008.040, 503.200 ) - ( 2008.340, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2014.160, 503.200 ) - ( 2014.460, 503.400 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 467.430 ) - ( 2090.380, 467.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 463.930 ) - ( 2090.380, 464.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 463.930 ) - ( 2090.380, 464.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 464.490 ) - ( 2090.380, 465.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 465.670 ) - ( 2090.380, 466.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 466.090 ) - ( 2090.380, 467.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 467.270 ) - ( 2090.380, 467.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 317.430 ) - ( 2090.380, 317.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 314.560 ) - ( 2090.380, 315.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 315.670 ) - ( 2090.380, 316.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 316.090 ) - ( 2090.380, 317.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2090.280, 317.270 ) - ( 2090.380, 317.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1889.720, 2860.220 ) - ( 1889.980, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1889.720, 2860.220 ) - ( 1890.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1891.080, 2860.220 ) - ( 1891.380, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1895.840, 2860.220 ) - ( 1896.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1895.880, 2860.220 ) - ( 1896.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1903.320, 2860.220 ) - ( 1903.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1903.320, 2860.220 ) - ( 1903.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1928.480, 2860.220 ) - ( 1928.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1928.480, 2860.220 ) - ( 1928.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1934.600, 2860.220 ) - ( 1934.860, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1934.600, 2860.220 ) - ( 1934.900, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 1940.720, 2860.220 ) - ( 1941.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2025.720, 2860.220 ) - ( 2026.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2026.400, 2860.220 ) - ( 2026.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2028.440, 2860.220 ) - ( 2028.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 314.490 ) - ( 2303.100, 314.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 313.930 ) - ( 2303.100, 314.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 313.930 ) - ( 2303.100, 314.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 167.430 ) - ( 2303.100, 167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 167.270 ) - ( 2303.100, 167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 166.090 ) - ( 2303.100, 167.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 165.670 ) - ( 2303.100, 166.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 164.490 ) - ( 2303.100, 165.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 163.930 ) - ( 2303.100, 164.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 163.930 ) - ( 2303.100, 164.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2378.920, 100.220 ) - ( 2379.220, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2385.040, 100.220 ) - ( 2385.340, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2391.160, 100.220 ) - ( 2391.460, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2397.280, 100.220 ) - ( 2397.580, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2402.720, 100.220 ) - ( 2403.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2408.840, 100.220 ) - ( 2409.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2414.960, 100.220 ) - ( 2415.260, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2420.400, 100.220 ) - ( 2420.700, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 100.220 ) - ( 2426.100, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 100.220 ) - ( 2426.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2431.960, 100.220 ) - ( 2432.260, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2444.200, 100.220 ) - ( 2444.500, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2455.760, 100.220 ) - ( 2456.060, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2461.200, 100.220 ) - ( 2461.500, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2467.320, 100.220 ) - ( 2467.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2468.000, 100.220 ) - ( 2468.300, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2473.440, 100.220 ) - ( 2473.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 100.220 ) - ( 2479.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 100.220 ) - ( 2479.180, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2490.440, 100.220 ) - ( 2490.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2491.120, 100.220 ) - ( 2491.420, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 467.430 ) - ( 2303.100, 467.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 467.270 ) - ( 2303.100, 467.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 466.090 ) - ( 2303.100, 467.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 465.670 ) - ( 2303.100, 466.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 464.490 ) - ( 2303.100, 465.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 463.930 ) - ( 2303.100, 464.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 463.930 ) - ( 2303.100, 464.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 317.430 ) - ( 2303.100, 317.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 317.270 ) - ( 2303.100, 317.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 316.090 ) - ( 2303.100, 317.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 315.670 ) - ( 2303.100, 316.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 314.560 ) - ( 2303.100, 315.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 917.430 ) - ( 2303.100, 917.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 917.270 ) - ( 2303.100, 917.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 916.090 ) - ( 2303.100, 917.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 915.670 ) - ( 2303.100, 916.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 914.490 ) - ( 2303.100, 915.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 913.930 ) - ( 2303.100, 914.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 913.930 ) - ( 2303.100, 914.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2378.920, 790.220 ) - ( 2379.220, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2385.040, 790.220 ) - ( 2385.340, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2391.160, 790.220 ) - ( 2391.460, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2397.280, 790.220 ) - ( 2397.580, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2402.720, 790.220 ) - ( 2403.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2408.840, 790.220 ) - ( 2409.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2414.960, 790.220 ) - ( 2415.260, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2420.400, 790.220 ) - ( 2420.700, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 790.220 ) - ( 2426.100, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 790.220 ) - ( 2426.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2431.960, 790.220 ) - ( 2432.260, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2444.200, 790.220 ) - ( 2444.500, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2455.760, 790.220 ) - ( 2456.060, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2461.200, 790.220 ) - ( 2461.500, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2467.320, 790.220 ) - ( 2467.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2468.000, 790.220 ) - ( 2468.300, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2473.440, 790.220 ) - ( 2473.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 790.220 ) - ( 2479.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 790.220 ) - ( 2479.180, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2490.440, 790.220 ) - ( 2490.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2491.120, 790.220 ) - ( 2491.420, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1067.430 ) - ( 2303.100, 1067.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1067.270 ) - ( 2303.100, 1067.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1066.090 ) - ( 2303.100, 1067.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1065.670 ) - ( 2303.100, 1066.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1064.490 ) - ( 2303.100, 1065.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1063.930 ) - ( 2303.100, 1064.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1063.930 ) - ( 2303.100, 1064.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1517.430 ) - ( 2303.100, 1517.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1517.270 ) - ( 2303.100, 1517.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1516.090 ) - ( 2303.100, 1517.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1515.670 ) - ( 2303.100, 1516.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1514.490 ) - ( 2303.100, 1515.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1513.930 ) - ( 2303.100, 1514.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1513.930 ) - ( 2303.100, 1514.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2378.920, 1480.220 ) - ( 2379.220, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2385.040, 1480.220 ) - ( 2385.340, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2391.160, 1480.220 ) - ( 2391.460, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2397.280, 1480.220 ) - ( 2397.580, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2402.720, 1480.220 ) - ( 2403.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2408.840, 1480.220 ) - ( 2409.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2414.960, 1480.220 ) - ( 2415.260, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2420.400, 1480.220 ) - ( 2420.700, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 1480.220 ) - ( 2426.100, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 1480.220 ) - ( 2426.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2431.960, 1480.220 ) - ( 2432.260, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2444.200, 1480.220 ) - ( 2444.500, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2455.760, 1480.220 ) - ( 2456.060, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2461.200, 1480.220 ) - ( 2461.500, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2467.320, 1480.220 ) - ( 2467.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2468.000, 1480.220 ) - ( 2468.300, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2473.440, 1480.220 ) - ( 2473.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 1480.220 ) - ( 2479.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 1480.220 ) - ( 2479.180, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2490.440, 1480.220 ) - ( 2490.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2491.120, 1480.220 ) - ( 2491.420, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1817.430 ) - ( 2303.100, 1817.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1817.270 ) - ( 2303.100, 1817.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1816.090 ) - ( 2303.100, 1817.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1815.670 ) - ( 2303.100, 1816.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1814.490 ) - ( 2303.100, 1815.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1813.930 ) - ( 2303.100, 1814.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1813.930 ) - ( 2303.100, 1814.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1667.430 ) - ( 2303.100, 1667.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1667.270 ) - ( 2303.100, 1667.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1666.090 ) - ( 2303.100, 1667.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1665.670 ) - ( 2303.100, 1666.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1664.490 ) - ( 2303.100, 1665.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1663.930 ) - ( 2303.100, 1664.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 1663.930 ) - ( 2303.100, 1664.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2375.750, 2130.220 ) - ( 2377.320, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2376.920, 2130.220 ) - ( 2377.320, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2378.100, 2130.220 ) - ( 2378.500, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2378.100, 2130.220 ) - ( 2379.070, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2382.190, 2130.220 ) - ( 2383.440, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2383.040, 2130.220 ) - ( 2383.440, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2384.220, 2130.220 ) - ( 2384.620, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2384.220, 2130.220 ) - ( 2385.190, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2387.710, 2130.220 ) - ( 2388.880, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2388.480, 2130.220 ) - ( 2388.880, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2389.660, 2130.220 ) - ( 2390.060, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2389.660, 2130.220 ) - ( 2391.310, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2396.460, 2130.220 ) - ( 2396.860, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2396.460, 2130.220 ) - ( 2397.430, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2401.510, 2130.220 ) - ( 2401.620, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2401.510, 2130.220 ) - ( 2402.870, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2407.950, 2130.220 ) - ( 2408.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2415.110, 2130.220 ) - ( 2415.610, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2417.150, 2130.220 ) - ( 2418.120, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2417.720, 2130.220 ) - ( 2418.120, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2418.900, 2130.220 ) - ( 2419.300, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2418.900, 2130.220 ) - ( 2420.550, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2422.670, 2130.220 ) - ( 2424.920, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2424.520, 2130.220 ) - ( 2424.920, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.700, 2130.220 ) - ( 2425.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.700, 2130.220 ) - ( 2425.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2429.110, 2130.220 ) - ( 2430.360, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2429.960, 2130.220 ) - ( 2430.360, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2431.140, 2130.220 ) - ( 2431.540, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2431.140, 2130.220 ) - ( 2432.110, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2442.910, 2130.220 ) - ( 2444.350, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2445.670, 2130.220 ) - ( 2446.000, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2445.670, 2130.220 ) - ( 2446.000, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2454.260, 2130.220 ) - ( 2454.660, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2454.260, 2130.220 ) - ( 2455.910, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2456.710, 2130.220 ) - ( 2458.920, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2458.520, 2130.220 ) - ( 2458.920, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2460.390, 2130.220 ) - ( 2460.780, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2460.390, 2130.220 ) - ( 2461.350, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2463.150, 2130.220 ) - ( 2465.040, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2464.640, 2130.220 ) - ( 2465.040, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2466.500, 2130.220 ) - ( 2466.900, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2466.500, 2130.220 ) - ( 2467.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2468.150, 2130.220 ) - ( 2468.970, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2472.620, 2130.220 ) - ( 2473.020, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2472.620, 2130.220 ) - ( 2473.590, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2476.950, 2130.220 ) - ( 2477.280, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2476.950, 2130.220 ) - ( 2477.280, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2489.620, 2130.220 ) - ( 2490.020, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2489.620, 2130.220 ) - ( 2490.590, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2492.590, 2130.220 ) - ( 2494.280, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2493.880, 2130.220 ) - ( 2494.280, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2497.100, 2130.220 ) - ( 2497.490, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2497.100, 2130.220 ) - ( 2497.490, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2499.950, 2130.220 ) - ( 2501.080, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2500.680, 2130.220 ) - ( 2501.080, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2417.430 ) - ( 2303.100, 2417.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2417.270 ) - ( 2303.100, 2417.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2416.090 ) - ( 2303.100, 2417.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2415.670 ) - ( 2303.100, 2416.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2414.490 ) - ( 2303.100, 2415.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2413.930 ) - ( 2303.100, 2414.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2413.930 ) - ( 2303.100, 2414.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2267.430 ) - ( 2303.100, 2267.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2267.270 ) - ( 2303.100, 2267.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2266.090 ) - ( 2303.100, 2267.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2265.670 ) - ( 2303.100, 2266.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2264.490 ) - ( 2303.100, 2265.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2263.930 ) - ( 2303.100, 2264.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 2263.930 ) - ( 2303.100, 2264.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3017.430 ) - ( 2303.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3017.270 ) - ( 2303.100, 3017.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3016.090 ) - ( 2303.100, 3017.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3015.670 ) - ( 2303.100, 3016.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3014.490 ) - ( 2303.100, 3015.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3013.930 ) - ( 2303.100, 3014.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3013.930 ) - ( 2303.100, 3014.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2304.160, 2864.490 ) - ( 2304.860, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2304.860, 2864.490 ) - ( 2305.140, 2864.560 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2304.160, 2864.330 ) - ( 2305.140, 2864.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2378.920, 2860.220 ) - ( 2379.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2385.040, 2860.220 ) - ( 2385.340, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2391.160, 2860.220 ) - ( 2391.460, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2397.280, 2860.220 ) - ( 2397.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2402.720, 2860.220 ) - ( 2403.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2408.840, 2860.220 ) - ( 2409.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2414.960, 2860.220 ) - ( 2415.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2420.400, 2860.220 ) - ( 2420.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 2860.220 ) - ( 2426.100, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2425.840, 2860.220 ) - ( 2426.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2431.960, 2860.220 ) - ( 2432.260, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2444.200, 2860.220 ) - ( 2444.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2455.760, 2860.220 ) - ( 2456.060, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2461.200, 2860.220 ) - ( 2461.500, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2467.320, 2860.220 ) - ( 2467.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2468.000, 2860.220 ) - ( 2468.300, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2473.440, 2860.220 ) - ( 2473.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 2860.220 ) - ( 2479.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2478.880, 2860.220 ) - ( 2479.180, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2490.440, 2860.220 ) - ( 2490.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2491.120, 2860.220 ) - ( 2491.420, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3167.430 ) - ( 2303.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3167.270 ) - ( 2303.100, 3167.830 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3166.090 ) - ( 2303.100, 3167.270 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3165.670 ) - ( 2303.100, 3166.090 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3164.490 ) - ( 2303.100, 3165.670 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3163.930 ) - ( 2303.100, 3164.490 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2303.000, 3163.930 ) - ( 2303.100, 3164.330 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2548.920, 100.220 ) - ( 2549.220, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.320, 100.220 ) - ( 2552.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.360, 100.220 ) - ( 2552.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2560.480, 100.220 ) - ( 2560.780, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2561.840, 100.220 ) - ( 2562.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 100.220 ) - ( 2589.980, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 100.220 ) - ( 2590.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2591.080, 100.220 ) - ( 2591.380, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.840, 100.220 ) - ( 2596.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.880, 100.220 ) - ( 2596.140, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 100.220 ) - ( 2603.580, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 100.220 ) - ( 2603.620, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 100.220 ) - ( 2628.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 100.220 ) - ( 2628.780, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 100.220 ) - ( 2634.860, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 100.220 ) - ( 2634.900, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2640.720, 100.220 ) - ( 2641.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2725.720, 100.220 ) - ( 2726.020, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2726.400, 100.220 ) - ( 2726.700, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2728.440, 100.220 ) - ( 2728.740, 100.300 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2548.920, 790.220 ) - ( 2549.220, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.320, 790.220 ) - ( 2552.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.360, 790.220 ) - ( 2552.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2560.480, 790.220 ) - ( 2560.780, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2561.840, 790.220 ) - ( 2562.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 790.220 ) - ( 2589.980, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 790.220 ) - ( 2590.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2591.080, 790.220 ) - ( 2591.380, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.840, 790.220 ) - ( 2596.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.880, 790.220 ) - ( 2596.140, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 790.220 ) - ( 2603.580, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 790.220 ) - ( 2603.620, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 790.220 ) - ( 2628.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 790.220 ) - ( 2628.780, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 790.220 ) - ( 2634.860, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 790.220 ) - ( 2634.900, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2640.720, 790.220 ) - ( 2641.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2725.720, 790.220 ) - ( 2726.020, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2726.400, 790.220 ) - ( 2726.700, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2728.440, 790.220 ) - ( 2728.740, 790.500 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2548.920, 1480.220 ) - ( 2549.220, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.320, 1480.220 ) - ( 2552.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.360, 1480.220 ) - ( 2552.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2560.480, 1480.220 ) - ( 2560.780, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2561.840, 1480.220 ) - ( 2562.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 1480.220 ) - ( 2589.980, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 1480.220 ) - ( 2590.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2591.080, 1480.220 ) - ( 2591.380, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.840, 1480.220 ) - ( 2596.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.880, 1480.220 ) - ( 2596.140, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 1480.220 ) - ( 2603.580, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 1480.220 ) - ( 2603.620, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 1480.220 ) - ( 2628.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 1480.220 ) - ( 2628.780, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 1480.220 ) - ( 2634.860, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 1480.220 ) - ( 2634.900, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2640.720, 1480.220 ) - ( 2641.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2725.720, 1480.220 ) - ( 2726.020, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2726.400, 1480.220 ) - ( 2726.700, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2728.440, 1480.220 ) - ( 2728.740, 1480.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2547.420, 2130.220 ) - ( 2547.820, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2547.420, 2130.220 ) - ( 2549.070, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2549.630, 2130.220 ) - ( 2552.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.360, 2130.220 ) - ( 2552.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2561.990, 2130.220 ) - ( 2563.730, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2580.910, 2130.220 ) - ( 2582.680, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2582.280, 2130.220 ) - ( 2582.680, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.580, 2130.220 ) - ( 2589.870, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.580, 2130.220 ) - ( 2589.870, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2594.710, 2130.220 ) - ( 2595.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.880, 2130.220 ) - ( 2595.990, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2601.150, 2130.220 ) - ( 2602.400, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2602.000, 2130.220 ) - ( 2602.400, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.180, 2130.220 ) - ( 2603.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.180, 2130.220 ) - ( 2603.470, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2608.510, 2130.220 ) - ( 2609.200, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2608.800, 2130.220 ) - ( 2609.200, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2616.100, 2130.220 ) - ( 2616.500, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2616.100, 2130.220 ) - ( 2618.930, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2619.550, 2130.220 ) - ( 2621.440, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2621.040, 2130.220 ) - ( 2621.440, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2625.070, 2130.220 ) - ( 2627.560, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2627.160, 2130.220 ) - ( 2627.560, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.340, 2130.220 ) - ( 2628.630, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.340, 2130.220 ) - ( 2628.630, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2631.510, 2130.220 ) - ( 2633.680, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2633.280, 2130.220 ) - ( 2633.680, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.460, 2130.220 ) - ( 2634.750, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.460, 2130.220 ) - ( 2634.750, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2637.950, 2130.220 ) - ( 2640.870, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2725.350, 2130.220 ) - ( 2725.870, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2726.550, 2130.220 ) - ( 2727.490, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2728.110, 2130.220 ) - ( 2728.590, 2130.250 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2548.920, 2860.220 ) - ( 2549.220, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.320, 2860.220 ) - ( 2552.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2552.360, 2860.220 ) - ( 2552.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2560.480, 2860.220 ) - ( 2560.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2561.840, 2860.220 ) - ( 2562.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 2860.220 ) - ( 2589.980, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2589.720, 2860.220 ) - ( 2590.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2591.080, 2860.220 ) - ( 2591.380, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.840, 2860.220 ) - ( 2596.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2595.880, 2860.220 ) - ( 2596.140, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 2860.220 ) - ( 2603.580, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2603.320, 2860.220 ) - ( 2603.620, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 2860.220 ) - ( 2628.740, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2628.480, 2860.220 ) - ( 2628.780, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 2860.220 ) - ( 2634.860, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2634.600, 2860.220 ) - ( 2634.900, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2640.720, 2860.220 ) - ( 2641.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2725.720, 2860.220 ) - ( 2726.020, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2726.400, 2860.220 ) - ( 2726.700, 2860.530 ) on Layer met4
+  violation type: Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b
+    srcs: N/A N/A
+    bbox = ( 2728.440, 2860.220 ) - ( 2728.740, 2860.530 ) on Layer met4
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 273.170 ) - ( 200.250, 275.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 273.160 ) - ( 200.250, 273.170 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 272.880 ) - ( 200.250, 273.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 272.870 ) - ( 200.250, 272.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 270.080 ) - ( 200.250, 270.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 269.770 ) - ( 200.250, 270.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 269.760 ) - ( 200.250, 269.770 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 269.480 ) - ( 200.250, 269.760 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 269.470 ) - ( 200.250, 269.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 256.300 ) - ( 200.250, 256.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 262.960 ) - ( 200.250, 262.970 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 262.680 ) - ( 200.250, 262.960 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 262.670 ) - ( 200.250, 262.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 256.300 ) - ( 200.250, 256.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 255.200 ) - ( 200.250, 255.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 255.190 ) - ( 200.250, 255.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 255.200 ) - ( 200.250, 255.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 255.190 ) - ( 200.250, 255.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 242.700 ) - ( 200.250, 242.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 248.680 ) - ( 200.250, 248.690 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 248.400 ) - ( 200.250, 248.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 248.390 ) - ( 200.250, 248.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 242.700 ) - ( 200.250, 242.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 241.600 ) - ( 200.250, 241.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 241.590 ) - ( 200.250, 241.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 241.600 ) - ( 200.250, 241.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 241.590 ) - ( 200.250, 241.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 231.010 ) - ( 200.250, 233.470 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 231.000 ) - ( 200.250, 231.010 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 230.720 ) - ( 200.250, 231.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 230.710 ) - ( 200.250, 230.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 138.530 ) - ( 200.250, 140.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 138.520 ) - ( 200.250, 138.530 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 138.240 ) - ( 200.250, 138.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 138.230 ) - ( 200.250, 138.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 131.730 ) - ( 200.250, 132.150 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 131.720 ) - ( 200.250, 131.730 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 131.440 ) - ( 200.250, 131.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 131.430 ) - ( 200.250, 131.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 133.080 ) - ( 200.250, 133.090 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 132.800 ) - ( 200.250, 133.080 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 132.790 ) - ( 200.250, 132.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 932.700 ) - ( 200.250, 932.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 938.880 ) - ( 200.250, 938.890 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 938.600 ) - ( 200.250, 938.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 938.590 ) - ( 200.250, 938.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 938.430 ) - ( 200.250, 938.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 932.700 ) - ( 200.250, 932.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 920.530 ) - ( 200.250, 923.470 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 920.520 ) - ( 200.250, 920.530 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 920.240 ) - ( 200.250, 920.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 920.230 ) - ( 200.250, 920.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 828.730 ) - ( 200.250, 830.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 828.720 ) - ( 200.250, 828.730 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 828.440 ) - ( 200.250, 828.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 828.430 ) - ( 200.250, 828.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 821.250 ) - ( 200.250, 822.150 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 821.240 ) - ( 200.250, 821.250 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 820.960 ) - ( 200.250, 821.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 820.950 ) - ( 200.250, 820.960 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 823.280 ) - ( 200.250, 823.290 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 823.000 ) - ( 200.250, 823.280 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 822.990 ) - ( 200.250, 823.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 822.830 ) - ( 200.250, 822.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 962.690 ) - ( 200.250, 965.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 962.680 ) - ( 200.250, 962.690 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 962.400 ) - ( 200.250, 962.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 962.390 ) - ( 200.250, 962.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 960.080 ) - ( 200.250, 960.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 959.290 ) - ( 200.250, 960.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 959.280 ) - ( 200.250, 959.290 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 959.000 ) - ( 200.250, 959.280 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 958.990 ) - ( 200.250, 959.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 946.300 ) - ( 200.250, 946.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 952.490 ) - ( 200.250, 952.710 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 952.480 ) - ( 200.250, 952.490 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 952.200 ) - ( 200.250, 952.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 952.190 ) - ( 200.250, 952.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 946.300 ) - ( 200.250, 946.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1518.250 ) - ( 200.250, 1520.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1518.240 ) - ( 200.250, 1518.250 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1517.960 ) - ( 200.250, 1518.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1517.950 ) - ( 200.250, 1517.960 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1511.450 ) - ( 200.250, 1512.150 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1511.440 ) - ( 200.250, 1511.450 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1511.160 ) - ( 200.250, 1511.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1511.150 ) - ( 200.250, 1511.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1652.890 ) - ( 200.250, 1655.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1652.880 ) - ( 200.250, 1652.890 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1652.600 ) - ( 200.250, 1652.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1652.590 ) - ( 200.250, 1652.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1650.080 ) - ( 200.250, 1650.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1649.490 ) - ( 200.250, 1650.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1649.480 ) - ( 200.250, 1649.490 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1649.200 ) - ( 200.250, 1649.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1649.190 ) - ( 200.250, 1649.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1636.300 ) - ( 200.250, 1636.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1642.690 ) - ( 200.250, 1642.710 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1642.680 ) - ( 200.250, 1642.690 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1642.400 ) - ( 200.250, 1642.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1642.390 ) - ( 200.250, 1642.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1636.300 ) - ( 200.250, 1636.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1622.700 ) - ( 200.250, 1622.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1628.410 ) - ( 200.250, 1628.550 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1628.400 ) - ( 200.250, 1628.410 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1628.120 ) - ( 200.250, 1628.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1628.110 ) - ( 200.250, 1628.120 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1622.700 ) - ( 200.250, 1622.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1610.730 ) - ( 200.250, 1613.470 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1610.720 ) - ( 200.250, 1610.730 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1610.440 ) - ( 200.250, 1610.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 1610.430 ) - ( 200.250, 1610.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2168.330 ) - ( 200.250, 2170.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2168.320 ) - ( 200.250, 2168.330 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2168.040 ) - ( 200.250, 2168.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2168.030 ) - ( 200.250, 2168.040 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2160.170 ) - ( 200.250, 2162.150 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2160.160 ) - ( 200.250, 2160.170 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2159.880 ) - ( 200.250, 2160.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2159.870 ) - ( 200.250, 2159.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2305.010 ) - ( 200.250, 2305.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2305.000 ) - ( 200.250, 2305.010 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2304.720 ) - ( 200.250, 2305.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2304.710 ) - ( 200.250, 2304.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2300.080 ) - ( 200.250, 2300.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2298.210 ) - ( 200.250, 2300.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2298.200 ) - ( 200.250, 2298.210 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2297.920 ) - ( 200.250, 2298.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2297.910 ) - ( 200.250, 2297.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2286.300 ) - ( 200.250, 2286.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2291.410 ) - ( 200.250, 2292.710 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2291.400 ) - ( 200.250, 2291.410 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2291.120 ) - ( 200.250, 2291.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2291.110 ) - ( 200.250, 2291.120 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2286.300 ) - ( 200.250, 2286.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2285.120 ) - ( 200.250, 2285.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2284.610 ) - ( 200.250, 2285.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2284.600 ) - ( 200.250, 2284.610 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2284.320 ) - ( 200.250, 2284.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2284.310 ) - ( 200.250, 2284.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2272.700 ) - ( 200.250, 2272.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2277.810 ) - ( 200.250, 2278.430 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2277.800 ) - ( 200.250, 2277.810 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2277.520 ) - ( 200.250, 2277.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2277.510 ) - ( 200.250, 2277.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2272.700 ) - ( 200.250, 2272.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2271.520 ) - ( 200.250, 2271.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2270.330 ) - ( 200.250, 2271.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2270.320 ) - ( 200.250, 2270.330 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2270.040 ) - ( 200.250, 2270.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2270.030 ) - ( 200.250, 2270.040 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2263.520 ) - ( 200.250, 2263.530 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2263.240 ) - ( 200.250, 2263.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2263.230 ) - ( 200.250, 2263.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3032.610 ) - ( 200.250, 3035.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3032.600 ) - ( 200.250, 3032.610 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3032.320 ) - ( 200.250, 3032.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3032.310 ) - ( 200.250, 3032.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3030.080 ) - ( 200.250, 3030.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3029.890 ) - ( 200.250, 3030.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3029.880 ) - ( 200.250, 3029.890 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3029.600 ) - ( 200.250, 3029.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3029.590 ) - ( 200.250, 3029.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3016.300 ) - ( 200.250, 3016.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3022.410 ) - ( 200.250, 3022.710 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3022.400 ) - ( 200.250, 3022.410 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3022.120 ) - ( 200.250, 3022.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3022.110 ) - ( 200.250, 3022.120 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3016.300 ) - ( 200.250, 3016.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3002.700 ) - ( 200.250, 3002.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3008.800 ) - ( 200.250, 3008.810 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3008.520 ) - ( 200.250, 3008.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3008.510 ) - ( 200.250, 3008.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3008.430 ) - ( 200.250, 3008.510 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 3002.700 ) - ( 200.250, 3002.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2990.450 ) - ( 200.250, 2993.470 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2990.440 ) - ( 200.250, 2990.450 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2990.160 ) - ( 200.250, 2990.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2990.150 ) - ( 200.250, 2990.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2898.650 ) - ( 200.250, 2900.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2898.640 ) - ( 200.250, 2898.650 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2898.360 ) - ( 200.250, 2898.640 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2898.350 ) - ( 200.250, 2898.360 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2891.850 ) - ( 200.250, 2892.150 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2891.840 ) - ( 200.250, 2891.850 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2891.560 ) - ( 200.250, 2891.840 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2891.550 ) - ( 200.250, 2891.560 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2893.200 ) - ( 200.250, 2893.210 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2892.920 ) - ( 200.250, 2893.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2892.910 ) - ( 200.250, 2892.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 200.220, 2892.830 ) - ( 200.250, 2892.910 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3032.610 ) - ( 900.310, 3035.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3032.600 ) - ( 900.310, 3032.610 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3032.320 ) - ( 900.310, 3032.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3032.310 ) - ( 900.310, 3032.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3030.080 ) - ( 900.310, 3030.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3029.890 ) - ( 900.310, 3030.480 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3029.880 ) - ( 900.310, 3029.890 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3029.600 ) - ( 900.310, 3029.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3029.590 ) - ( 900.310, 3029.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3016.300 ) - ( 900.310, 3016.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3023.080 ) - ( 900.310, 3023.090 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3022.800 ) - ( 900.310, 3023.080 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3022.790 ) - ( 900.310, 3022.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3022.710 ) - ( 900.310, 3022.790 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3016.300 ) - ( 900.310, 3016.590 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3015.320 ) - ( 900.310, 3015.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3015.310 ) - ( 900.310, 3015.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3015.320 ) - ( 900.310, 3015.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3015.310 ) - ( 900.310, 3015.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3002.700 ) - ( 900.310, 3002.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3008.800 ) - ( 900.310, 3008.810 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3008.520 ) - ( 900.310, 3008.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3008.510 ) - ( 900.310, 3008.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3008.430 ) - ( 900.310, 3008.510 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3002.700 ) - ( 900.310, 3002.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3001.720 ) - ( 900.310, 3001.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3001.710 ) - ( 900.310, 3001.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3001.720 ) - ( 900.310, 3001.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 3001.710 ) - ( 900.310, 3001.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2990.450 ) - ( 900.310, 2993.470 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2990.440 ) - ( 900.310, 2990.450 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2990.160 ) - ( 900.310, 2990.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2990.150 ) - ( 900.310, 2990.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2898.650 ) - ( 900.310, 2900.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2898.640 ) - ( 900.310, 2898.650 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2898.360 ) - ( 900.310, 2898.640 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2898.350 ) - ( 900.310, 2898.360 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2893.200 ) - ( 900.310, 2893.210 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2892.920 ) - ( 900.310, 2893.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2892.910 ) - ( 900.310, 2892.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 900.220, 2892.830 ) - ( 900.310, 2892.910 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3035.480 ) - ( 1600.340, 3035.780 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3016.440 ) - ( 1600.340, 3016.740 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3022.800 ) - ( 1600.340, 3022.860 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3022.790 ) - ( 1600.340, 3022.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3022.560 ) - ( 1600.340, 3022.790 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3016.440 ) - ( 1600.340, 3016.700 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3002.840 ) - ( 1600.340, 3003.140 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3008.520 ) - ( 1600.340, 3008.580 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3008.510 ) - ( 1600.340, 3008.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3008.280 ) - ( 1600.340, 3008.510 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 3002.840 ) - ( 1600.340, 3003.100 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 2993.320 ) - ( 1600.340, 2993.620 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 2900.840 ) - ( 1600.340, 2901.140 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 2892.000 ) - ( 1600.340, 2892.300 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 2892.920 ) - ( 1600.340, 2892.980 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 2892.910 ) - ( 1600.340, 2892.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 1600.220, 2892.680 ) - ( 1600.340, 2892.910 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 474.440 ) - ( 2093.160, 474.450 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 474.160 ) - ( 2093.160, 474.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 474.150 ) - ( 2093.160, 474.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 471.470 ) - ( 2093.160, 474.150 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 465.600 ) - ( 2093.160, 465.610 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 465.320 ) - ( 2093.160, 465.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 465.310 ) - ( 2093.160, 465.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 462.630 ) - ( 2093.160, 465.310 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 367.690 ) - ( 2093.160, 370.150 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 367.680 ) - ( 2093.160, 367.690 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 367.400 ) - ( 2093.160, 367.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 367.390 ) - ( 2093.160, 367.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 360.520 ) - ( 2093.160, 360.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 353.540 ) - ( 2093.160, 353.940 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 359.530 ) - ( 2093.160, 360.630 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 359.520 ) - ( 2093.160, 359.530 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 359.240 ) - ( 2093.160, 359.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 359.230 ) - ( 2093.160, 359.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 353.540 ) - ( 2093.160, 355.190 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 352.440 ) - ( 2093.160, 352.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 352.430 ) - ( 2093.160, 352.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 352.440 ) - ( 2093.160, 352.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 352.430 ) - ( 2093.160, 352.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 346.920 ) - ( 2093.160, 347.030 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 339.260 ) - ( 2093.160, 339.660 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 345.250 ) - ( 2093.160, 347.030 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 345.240 ) - ( 2093.160, 345.250 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 344.960 ) - ( 2093.160, 345.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 344.950 ) - ( 2093.160, 344.960 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 339.260 ) - ( 2093.160, 340.910 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 338.160 ) - ( 2093.160, 338.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 338.150 ) - ( 2093.160, 338.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 338.160 ) - ( 2093.160, 338.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 338.150 ) - ( 2093.160, 338.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 331.960 ) - ( 2093.160, 332.360 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 331.650 ) - ( 2093.160, 332.360 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 331.640 ) - ( 2093.160, 331.650 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 331.360 ) - ( 2093.160, 331.640 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 331.350 ) - ( 2093.160, 331.360 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 326.210 ) - ( 2093.160, 327.990 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 326.200 ) - ( 2093.160, 326.210 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 325.920 ) - ( 2093.160, 326.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2093.070, 325.910 ) - ( 2093.160, 325.920 ) on Layer met3
+  violation type: Metal4_width_lt_0dot3um_met4dot1
+    srcs: N/A N/A
+    bbox = ( 2454.060, 2130.250 ) - ( 2454.250, 2130.300 ) on Layer met4
+  violation type: Metal4_width_lt_0dot3um_met4dot1
+    srcs: N/A N/A
+    bbox = ( 2553.340, 2130.250 ) - ( 2553.610, 2130.300 ) on Layer met4
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3015.600 ) - ( 900.000, 3015.610 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3015.420 ) - ( 900.000, 3015.600 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3015.600 ) - ( 900.010, 3015.610 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3015.420 ) - ( 900.010, 3015.600 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 900.000, 3015.720 ) - ( 900.010, 3015.910 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3002.000 ) - ( 900.000, 3002.010 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3001.820 ) - ( 900.000, 3002.000 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3002.000 ) - ( 900.010, 3002.010 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 899.700, 3001.820 ) - ( 900.010, 3002.000 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 900.000, 3002.120 ) - ( 900.010, 3002.310 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3035.780 ) - ( 1600.640, 3036.080 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3035.180 ) - ( 1600.640, 3035.480 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3035.180 ) - ( 1600.640, 3036.080 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3035.480 ) - ( 1600.340, 3035.780 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3022.860 ) - ( 1600.640, 3023.160 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3022.260 ) - ( 1600.640, 3022.560 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3022.260 ) - ( 1600.640, 3022.790 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3022.790 ) - ( 1600.640, 3022.800 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3022.800 ) - ( 1600.640, 3023.160 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3016.740 ) - ( 1600.640, 3017.040 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3016.700 ) - ( 1600.640, 3017.040 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3016.440 ) - ( 1600.340, 3016.740 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3022.800 ) - ( 1600.340, 3022.860 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3022.790 ) - ( 1600.340, 3022.800 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3022.560 ) - ( 1600.340, 3022.790 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3016.440 ) - ( 1600.340, 3016.700 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3008.580 ) - ( 1600.640, 3008.880 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3007.980 ) - ( 1600.640, 3008.280 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3007.980 ) - ( 1600.640, 3008.510 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3008.510 ) - ( 1600.640, 3008.520 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3008.520 ) - ( 1600.640, 3008.880 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3003.140 ) - ( 1600.640, 3003.440 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 3003.100 ) - ( 1600.640, 3003.440 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3002.840 ) - ( 1600.340, 3003.140 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3008.520 ) - ( 1600.340, 3008.580 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3008.510 ) - ( 1600.340, 3008.520 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3008.280 ) - ( 1600.340, 3008.510 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 3002.840 ) - ( 1600.340, 3003.100 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2993.620 ) - ( 1600.640, 2993.920 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2993.020 ) - ( 1600.640, 2993.320 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2993.020 ) - ( 1600.640, 2993.920 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 2993.320 ) - ( 1600.340, 2993.620 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2901.140 ) - ( 1600.640, 2901.440 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2900.540 ) - ( 1600.640, 2900.840 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2900.540 ) - ( 1600.640, 2901.440 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 2900.840 ) - ( 1600.340, 2901.140 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2892.980 ) - ( 1600.640, 2893.280 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2892.380 ) - ( 1600.640, 2892.680 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2892.380 ) - ( 1600.640, 2892.910 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2892.910 ) - ( 1600.640, 2892.920 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2892.920 ) - ( 1600.640, 2893.280 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2892.300 ) - ( 1600.640, 2892.600 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2891.700 ) - ( 1600.640, 2892.000 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.620, 2891.700 ) - ( 1600.640, 2892.600 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 2892.000 ) - ( 1600.340, 2892.300 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 2892.920 ) - ( 1600.340, 2892.980 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 2892.910 ) - ( 1600.340, 2892.920 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 1600.320, 2892.680 ) - ( 1600.340, 2892.910 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.370, 352.720 ) - ( 2093.680, 352.730 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.370, 352.660 ) - ( 2093.680, 352.720 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.380, 352.720 ) - ( 2093.680, 352.730 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.380, 352.660 ) - ( 2093.680, 352.720 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.370, 352.960 ) - ( 2093.380, 353.030 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.370, 338.440 ) - ( 2093.680, 338.450 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.370, 338.380 ) - ( 2093.680, 338.440 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.380, 338.440 ) - ( 2093.680, 338.450 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.380, 338.380 ) - ( 2093.680, 338.440 ) on Layer met3
+  violation type: Metal3_spacing_lt_0dot3um_met3dot2
+    srcs: N/A N/A
+    bbox = ( 2093.370, 338.680 ) - ( 2093.380, 338.750 ) on Layer met3
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.920, 790.320 ) - ( 279.220, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.620, 790.620 ) - ( 279.520, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.620, 790.620 ) - ( 278.920, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 279.220, 790.620 ) - ( 279.520, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 285.040, 790.320 ) - ( 285.340, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 284.740, 790.620 ) - ( 285.640, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 284.740, 790.620 ) - ( 285.040, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 285.340, 790.620 ) - ( 285.640, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 291.160, 790.320 ) - ( 291.460, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 290.860, 790.620 ) - ( 291.760, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 290.860, 790.620 ) - ( 291.160, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 291.460, 790.620 ) - ( 291.760, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 297.280, 790.320 ) - ( 297.580, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 296.980, 790.620 ) - ( 297.880, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 296.980, 790.620 ) - ( 297.280, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 297.580, 790.620 ) - ( 297.880, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.720, 790.320 ) - ( 303.020, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.420, 790.620 ) - ( 303.320, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.420, 790.620 ) - ( 302.720, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 303.020, 790.620 ) - ( 303.320, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.840, 790.320 ) - ( 309.140, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.540, 790.620 ) - ( 309.440, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.540, 790.620 ) - ( 308.840, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 309.140, 790.620 ) - ( 309.440, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.920, 1480.320 ) - ( 279.220, 1480.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.620, 1480.620 ) - ( 279.520, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.620, 1480.620 ) - ( 278.920, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 279.220, 1480.620 ) - ( 279.520, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 285.040, 1480.320 ) - ( 285.340, 1480.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 284.740, 1480.620 ) - ( 285.640, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 284.740, 1480.620 ) - ( 285.040, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 285.340, 1480.620 ) - ( 285.640, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 291.160, 1480.320 ) - ( 291.460, 1480.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 290.860, 1480.620 ) - ( 291.760, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 290.860, 1480.620 ) - ( 291.160, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 291.460, 1480.620 ) - ( 291.760, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 297.280, 1480.320 ) - ( 297.580, 1480.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 296.980, 1480.620 ) - ( 297.880, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 296.980, 1480.620 ) - ( 297.280, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 297.580, 1480.620 ) - ( 297.880, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.720, 1480.320 ) - ( 303.020, 1480.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.420, 1480.620 ) - ( 303.320, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.420, 1480.620 ) - ( 302.720, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 303.020, 1480.620 ) - ( 303.320, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.840, 1480.320 ) - ( 309.140, 1480.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.540, 1480.620 ) - ( 309.440, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.540, 1480.620 ) - ( 308.840, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 309.140, 1480.620 ) - ( 309.440, 1480.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 300.640, 2130.250 ) - ( 300.830, 2130.550 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 300.640, 2130.000 ) - ( 300.830, 2130.550 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 300.340, 2129.950 ) - ( 300.530, 2130.250 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 300.340, 2129.700 ) - ( 300.530, 2129.950 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 300.340, 2129.950 ) - ( 300.530, 2130.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 300.340, 2129.700 ) - ( 300.530, 2129.950 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 204.160, 2864.030 ) - ( 205.440, 2864.160 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 205.140, 2864.030 ) - ( 205.440, 2864.160 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 204.160, 2864.330 ) - ( 205.140, 2864.460 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.920, 2860.320 ) - ( 279.220, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.620, 2860.620 ) - ( 279.520, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 278.620, 2860.620 ) - ( 278.920, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 279.220, 2860.620 ) - ( 279.520, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 285.040, 2860.320 ) - ( 285.340, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 284.740, 2860.620 ) - ( 285.640, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 284.740, 2860.620 ) - ( 285.040, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 285.340, 2860.620 ) - ( 285.640, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 291.160, 2860.320 ) - ( 291.460, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 290.860, 2860.620 ) - ( 291.760, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 290.860, 2860.620 ) - ( 291.160, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 291.460, 2860.620 ) - ( 291.760, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 297.280, 2860.320 ) - ( 297.580, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 296.980, 2860.620 ) - ( 297.880, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 296.980, 2860.620 ) - ( 297.280, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 297.580, 2860.620 ) - ( 297.880, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.720, 2860.320 ) - ( 303.020, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.420, 2860.620 ) - ( 303.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 302.420, 2860.620 ) - ( 302.720, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 303.020, 2860.620 ) - ( 303.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.840, 2860.320 ) - ( 309.140, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.540, 2860.620 ) - ( 309.440, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 308.540, 2860.620 ) - ( 308.840, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 309.140, 2860.620 ) - ( 309.440, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 314.960, 790.320 ) - ( 315.260, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 314.660, 790.620 ) - ( 315.560, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 314.660, 790.620 ) - ( 314.960, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 315.260, 790.620 ) - ( 315.560, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 320.400, 790.320 ) - ( 320.700, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 320.100, 790.620 ) - ( 321.000, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 320.100, 790.620 ) - ( 320.400, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 320.700, 790.620 ) - ( 321.000, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 325.840, 790.320 ) - ( 326.100, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 325.840, 790.320 ) - ( 326.140, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 326.100, 790.620 ) - ( 326.440, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 326.140, 790.620 ) - ( 326.440, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 331.960, 790.320 ) - ( 332.260, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 331.660, 790.620 ) - ( 332.560, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 331.660, 790.620 ) - ( 331.960, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 332.260, 790.620 ) - ( 332.560, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 338.080, 790.320 ) - ( 338.380, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 337.780, 790.620 ) - ( 338.680, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 337.780, 790.620 ) - ( 338.080, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 338.380, 790.620 ) - ( 338.680, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 344.200, 790.320 ) - ( 344.500, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 343.900, 790.620 ) - ( 344.800, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 343.900, 790.620 ) - ( 344.200, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 344.500, 790.620 ) - ( 344.800, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 349.640, 790.320 ) - ( 349.940, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 349.340, 790.620 ) - ( 350.240, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 349.340, 790.620 ) - ( 349.640, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 349.940, 790.620 ) - ( 350.240, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 353.040, 790.320 ) - ( 353.340, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 353.080, 790.320 ) - ( 353.340, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 352.740, 790.620 ) - ( 353.080, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 352.740, 790.620 ) - ( 353.040, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 355.760, 790.320 ) - ( 356.060, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 355.460, 790.620 ) - ( 356.360, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 355.460, 790.620 ) - ( 355.760, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 356.060, 790.620 ) - ( 356.360, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 361.200, 790.320 ) - ( 361.500, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 360.900, 790.620 ) - ( 361.800, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 360.900, 790.620 ) - ( 361.200, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 361.500, 790.620 ) - ( 361.800, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 367.320, 790.320 ) - ( 367.620, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 368.000, 790.320 ) - ( 368.300, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 367.020, 790.620 ) - ( 367.920, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 367.700, 790.620 ) - ( 368.600, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 367.020, 790.620 ) - ( 367.320, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 367.620, 790.620 ) - ( 367.920, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 367.700, 790.620 ) - ( 368.000, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 368.300, 790.620 ) - ( 368.600, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 373.440, 790.320 ) - ( 373.740, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 373.140, 790.620 ) - ( 374.040, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 373.140, 790.620 ) - ( 373.440, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 373.740, 790.620 ) - ( 374.040, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 378.880, 790.320 ) - ( 379.140, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 378.880, 790.320 ) - ( 379.180, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 379.140, 790.620 ) - ( 379.480, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 379.180, 790.620 ) - ( 379.480, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 385.000, 790.320 ) - ( 385.260, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 385.000, 790.320 ) - ( 385.300, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 385.260, 790.620 ) - ( 385.600, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 385.300, 790.620 ) - ( 385.600, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 390.440, 790.320 ) - ( 390.740, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 391.120, 790.320 ) - ( 391.420, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 390.140, 790.620 ) - ( 391.040, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 390.820, 790.620 ) - ( 391.720, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 390.140, 790.620 ) - ( 390.440, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 390.740, 790.620 ) - ( 391.040, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 390.820, 790.620 ) - ( 391.120, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 391.420, 790.620 ) - ( 391.720, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 395.880, 790.320 ) - ( 396.180, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 395.920, 790.320 ) - ( 396.180, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 395.580, 790.620 ) - ( 395.920, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 395.580, 790.620 ) - ( 395.880, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 402.680, 790.320 ) - ( 402.980, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 402.720, 790.320 ) - ( 402.980, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 402.380, 790.620 ) - ( 402.720, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 402.380, 790.620 ) - ( 402.680, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 408.120, 790.320 ) - ( 408.420, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 407.820, 790.620 ) - ( 408.720, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 408.420, 790.620 ) - ( 408.720, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 414.240, 790.320 ) - ( 414.540, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 413.940, 790.620 ) - ( 414.840, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 413.940, 790.620 ) - ( 414.240, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 419.680, 790.320 ) - ( 419.980, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 419.380, 790.620 ) - ( 420.280, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 419.380, 790.620 ) - ( 419.680, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 419.980, 790.620 ) - ( 420.280, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 422.400, 790.320 ) - ( 422.660, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 422.400, 790.320 ) - ( 422.700, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 422.660, 790.620 ) - ( 423.000, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 422.700, 790.620 ) - ( 423.000, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 425.120, 790.320 ) - ( 425.380, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 425.420, 790.620 ) - ( 425.720, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 428.520, 790.320 ) - ( 428.780, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 437.360, 790.320 ) - ( 437.660, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 440.760, 790.320 ) - ( 441.060, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 448.920, 790.320 ) - ( 449.220, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 460.480, 790.320 ) - ( 460.780, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 460.180, 790.620 ) - ( 461.080, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 462.140, 790.620 ) - ( 462.440, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 466.600, 790.320 ) - ( 466.860, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 466.600, 790.320 ) - ( 466.900, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 474.080, 790.320 ) - ( 474.380, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 473.780, 790.620 ) - ( 474.680, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 473.780, 790.620 ) - ( 474.080, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 477.480, 790.320 ) - ( 477.780, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 477.520, 790.320 ) - ( 477.780, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 477.180, 790.620 ) - ( 477.520, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 489.720, 790.320 ) - ( 489.980, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 495.840, 790.320 ) - ( 496.140, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 495.880, 790.320 ) - ( 496.140, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 489.980, 790.620 ) - ( 490.320, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 490.780, 790.620 ) - ( 491.680, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 495.540, 790.620 ) - ( 495.880, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 490.780, 790.620 ) - ( 491.080, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 491.380, 790.620 ) - ( 491.680, 790.800 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 528.480, 790.320 ) - ( 528.740, 790.500 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 373.440, 1480.320 ) - ( 373.740, 1480.530 ) on Layer met4
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 389.470, 2129.950 ) - ( 389.720, 2130.000 ) on Layer met4
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 368.000, 2860.320 ) - ( 368.300, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 367.020, 2860.620 ) - ( 367.920, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 368.300, 2860.620 ) - ( 368.600, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 373.440, 2860.320 ) - ( 373.740, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 378.880, 2860.320 ) - ( 379.140, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 391.420, 2860.620 ) - ( 391.720, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 395.880, 2860.320 ) - ( 396.180, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 395.920, 2860.320 ) - ( 396.180, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 395.580, 2860.620 ) - ( 395.920, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 402.680, 2860.320 ) - ( 402.980, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 414.240, 2860.320 ) - ( 414.540, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 419.380, 2860.620 ) - ( 420.280, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 422.400, 2860.320 ) - ( 422.660, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 425.120, 2860.320 ) - ( 425.380, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 425.420, 2860.620 ) - ( 425.720, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 428.520, 2860.320 ) - ( 428.780, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 428.780, 2860.620 ) - ( 429.120, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 428.820, 2860.620 ) - ( 429.120, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 431.240, 2860.320 ) - ( 431.540, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 430.940, 2860.620 ) - ( 431.840, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 434.640, 2860.320 ) - ( 434.940, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 437.360, 2860.320 ) - ( 437.660, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 440.760, 2860.320 ) - ( 441.060, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 440.460, 2860.620 ) - ( 440.800, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 460.480, 2860.320 ) - ( 460.780, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 491.380, 2860.620 ) - ( 491.680, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 495.540, 2860.620 ) - ( 495.840, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 528.480, 2860.320 ) - ( 528.740, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1228.480, 2860.320 ) - ( 1228.780, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1228.740, 2860.620 ) - ( 1229.080, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1228.780, 2860.620 ) - ( 1229.080, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1234.600, 2860.320 ) - ( 1234.860, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1234.600, 2860.320 ) - ( 1234.900, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1240.720, 2860.320 ) - ( 1241.020, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1234.860, 2860.620 ) - ( 1235.200, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1240.420, 2860.620 ) - ( 1241.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1234.900, 2860.620 ) - ( 1235.200, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1240.420, 2860.620 ) - ( 1240.720, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1241.020, 2860.620 ) - ( 1241.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1325.720, 2860.320 ) - ( 1326.020, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.400, 2860.320 ) - ( 1326.700, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1328.440, 2860.320 ) - ( 1328.740, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1325.420, 2860.760 ) - ( 1326.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1325.420, 2860.620 ) - ( 1326.320, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.100, 2860.760 ) - ( 1327.000, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.100, 2860.620 ) - ( 1327.000, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1328.140, 2860.760 ) - ( 1329.040, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1328.140, 2860.620 ) - ( 1329.040, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1325.420, 2860.760 ) - ( 1325.720, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1325.420, 2860.620 ) - ( 1325.720, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.020, 2860.760 ) - ( 1326.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.020, 2860.620 ) - ( 1326.320, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.100, 2860.760 ) - ( 1326.400, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.100, 2860.620 ) - ( 1326.400, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.700, 2860.760 ) - ( 1327.000, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1326.700, 2860.620 ) - ( 1327.000, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1328.140, 2860.760 ) - ( 1328.440, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1328.140, 2860.620 ) - ( 1328.440, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1328.740, 2860.760 ) - ( 1329.040, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1328.740, 2860.620 ) - ( 1329.040, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1664.340, 502.900 ) - ( 1664.640, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1664.340, 502.900 ) - ( 1665.240, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1664.940, 502.900 ) - ( 1665.240, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1666.380, 502.900 ) - ( 1666.680, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1666.380, 502.900 ) - ( 1667.280, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1666.980, 502.900 ) - ( 1667.280, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1667.060, 502.900 ) - ( 1667.360, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1667.060, 502.900 ) - ( 1667.960, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1667.660, 502.900 ) - ( 1667.960, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1664.640, 503.200 ) - ( 1664.940, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1666.680, 503.200 ) - ( 1666.980, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1667.360, 503.200 ) - ( 1667.660, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1752.060, 502.900 ) - ( 1752.360, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1752.060, 502.900 ) - ( 1752.960, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1752.660, 502.900 ) - ( 1752.960, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1758.180, 502.900 ) - ( 1758.480, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1758.180, 502.900 ) - ( 1758.520, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1752.360, 503.200 ) - ( 1752.660, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1758.480, 503.200 ) - ( 1758.780, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1758.520, 503.200 ) - ( 1758.780, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1764.300, 502.900 ) - ( 1764.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1764.300, 502.900 ) - ( 1764.640, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1764.600, 503.200 ) - ( 1764.900, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1764.640, 503.200 ) - ( 1764.900, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1789.460, 502.900 ) - ( 1789.760, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1789.460, 502.900 ) - ( 1789.800, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1789.760, 503.200 ) - ( 1790.060, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1789.800, 503.200 ) - ( 1790.060, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1797.500, 502.900 ) - ( 1797.840, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1797.540, 502.900 ) - ( 1797.840, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1801.700, 502.900 ) - ( 1802.000, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1801.700, 502.900 ) - ( 1802.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1802.300, 502.900 ) - ( 1802.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1803.060, 502.900 ) - ( 1803.360, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1803.060, 502.900 ) - ( 1803.400, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1797.240, 503.200 ) - ( 1797.540, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1802.000, 503.200 ) - ( 1802.300, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1803.360, 503.200 ) - ( 1803.660, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1797.240, 503.200 ) - ( 1797.500, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1803.400, 503.200 ) - ( 1803.660, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1815.860, 502.900 ) - ( 1816.200, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1815.900, 502.900 ) - ( 1816.200, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1815.600, 503.200 ) - ( 1815.900, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1815.600, 503.200 ) - ( 1815.860, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1818.700, 502.900 ) - ( 1819.000, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1818.700, 502.900 ) - ( 1819.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1819.300, 502.900 ) - ( 1819.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1819.000, 503.200 ) - ( 1819.300, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1826.180, 502.900 ) - ( 1826.480, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1826.180, 502.900 ) - ( 1826.520, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1826.480, 503.200 ) - ( 1826.780, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1826.520, 503.200 ) - ( 1826.780, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1830.940, 502.900 ) - ( 1831.240, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1830.940, 502.900 ) - ( 1831.840, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1831.540, 502.900 ) - ( 1831.840, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1832.300, 502.900 ) - ( 1832.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1832.300, 502.900 ) - ( 1833.200, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1832.900, 502.900 ) - ( 1833.200, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1831.240, 503.200 ) - ( 1831.540, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1832.600, 503.200 ) - ( 1832.900, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1838.420, 502.900 ) - ( 1838.720, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1838.420, 502.900 ) - ( 1838.760, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1838.720, 503.200 ) - ( 1839.020, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1838.760, 503.200 ) - ( 1839.020, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1841.020, 502.900 ) - ( 1841.360, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1841.060, 502.900 ) - ( 1841.360, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1843.860, 502.900 ) - ( 1844.160, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1843.860, 502.900 ) - ( 1844.760, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1844.460, 502.900 ) - ( 1844.760, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1840.760, 503.200 ) - ( 1841.060, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1844.160, 503.200 ) - ( 1844.460, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1840.760, 503.200 ) - ( 1841.020, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1849.980, 502.900 ) - ( 1850.280, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1849.980, 502.900 ) - ( 1850.880, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1850.580, 502.900 ) - ( 1850.880, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1850.280, 503.200 ) - ( 1850.580, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1852.580, 502.900 ) - ( 1852.920, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1852.620, 502.900 ) - ( 1852.920, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1852.320, 503.200 ) - ( 1852.620, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1852.320, 503.200 ) - ( 1852.580, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1855.420, 502.900 ) - ( 1855.720, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1855.420, 502.900 ) - ( 1856.320, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1856.020, 502.900 ) - ( 1856.320, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1855.720, 503.200 ) - ( 1856.020, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1858.700, 502.900 ) - ( 1859.040, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1924.780, 502.900 ) - ( 1925.080, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1943.740, 502.900 ) - ( 1944.040, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1949.180, 502.900 ) - ( 1949.480, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1948.880, 503.200 ) - ( 1949.180, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1954.700, 502.900 ) - ( 1955.000, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1954.700, 502.900 ) - ( 1955.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1955.300, 502.900 ) - ( 1955.600, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1960.820, 502.900 ) - ( 1961.120, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1961.420, 502.900 ) - ( 1961.720, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1961.120, 503.200 ) - ( 1961.420, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1966.940, 502.900 ) - ( 1967.280, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1967.240, 503.200 ) - ( 1967.540, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1967.280, 503.200 ) - ( 1967.540, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1972.380, 502.900 ) - ( 1972.680, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1972.380, 502.900 ) - ( 1973.280, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1972.980, 502.900 ) - ( 1973.280, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1972.680, 503.200 ) - ( 1972.980, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1977.820, 502.900 ) - ( 1978.120, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1977.820, 502.900 ) - ( 1978.720, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1978.420, 502.900 ) - ( 1978.720, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1978.120, 503.200 ) - ( 1978.420, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1983.940, 502.900 ) - ( 1984.840, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1984.540, 502.900 ) - ( 1984.840, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1984.240, 503.200 ) - ( 1984.540, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1990.060, 502.900 ) - ( 1990.360, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1990.060, 502.900 ) - ( 1990.960, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1990.660, 502.900 ) - ( 1990.960, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1990.360, 503.200 ) - ( 1990.660, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1995.500, 502.900 ) - ( 1995.800, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1995.500, 502.900 ) - ( 1996.400, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1996.100, 502.900 ) - ( 1996.400, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1995.800, 503.200 ) - ( 1996.100, 503.300 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2013.860, 502.900 ) - ( 2014.160, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2013.860, 502.900 ) - ( 2014.760, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2014.460, 502.900 ) - ( 2014.760, 503.000 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1890.780, 2860.620 ) - ( 1891.680, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1890.780, 2860.620 ) - ( 1891.080, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 1934.600, 2860.320 ) - ( 1934.900, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
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+    srcs: N/A N/A
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+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
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+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2603.620, 2860.620 ) - ( 2603.920, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2628.480, 2860.320 ) - ( 2628.740, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2628.480, 2860.320 ) - ( 2628.780, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2628.740, 2860.620 ) - ( 2629.080, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2628.780, 2860.620 ) - ( 2629.080, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2634.600, 2860.320 ) - ( 2634.860, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2634.600, 2860.320 ) - ( 2634.900, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2640.720, 2860.320 ) - ( 2641.020, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2634.860, 2860.620 ) - ( 2635.200, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2640.420, 2860.620 ) - ( 2641.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2634.900, 2860.620 ) - ( 2635.200, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2640.420, 2860.620 ) - ( 2640.720, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2641.020, 2860.620 ) - ( 2641.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2725.720, 2860.320 ) - ( 2726.020, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.400, 2860.320 ) - ( 2726.700, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2728.440, 2860.320 ) - ( 2728.740, 2860.530 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2725.420, 2860.760 ) - ( 2726.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2725.420, 2860.620 ) - ( 2726.320, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.100, 2860.760 ) - ( 2727.000, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.100, 2860.620 ) - ( 2727.000, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2728.140, 2860.760 ) - ( 2729.040, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2728.140, 2860.620 ) - ( 2729.040, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2725.420, 2860.760 ) - ( 2725.720, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2725.420, 2860.620 ) - ( 2725.720, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.020, 2860.760 ) - ( 2726.320, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.020, 2860.620 ) - ( 2726.320, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.100, 2860.760 ) - ( 2726.400, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.100, 2860.620 ) - ( 2726.400, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.700, 2860.760 ) - ( 2727.000, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2726.700, 2860.620 ) - ( 2727.000, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2728.140, 2860.760 ) - ( 2728.440, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2728.140, 2860.620 ) - ( 2728.440, 2860.760 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2728.740, 2860.760 ) - ( 2729.040, 2860.830 ) on Layer met4
+  violation type: Metal4_spacing_lt_0dot3um_met4dot2
+    srcs: N/A N/A
+    bbox = ( 2728.740, 2860.620 ) - ( 2729.040, 2860.760 ) on Layer met4
diff --git a/mpw_precheck/outputs/reports/magic_drc_check.xml b/mpw_precheck/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..cbd079b
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,35799 @@
+<?xml version="1.0" ?>
+<report-database>
+    <categories>
+        <category>
+            <name>Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b</name>
+        </category>
+        <category>
+            <name>Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d</name>
+        </category>
+        <category>
+            <name>Metal4_width_lt_0dot3um_met4dot1</name>
+        </category>
+        <category>
+            <name>Metal3_spacing_lt_0dot3um_met3dot2</name>
+        </category>
+        <category>
+            <name>Metal4_spacing_lt_0dot3um_met4dot2</name>
+        </category>
+    </categories>
+    <cells>
+        <cell>
+            <name>user_project_wrapper</name>
+        </cell>
+    </cells>
+    <items>
+        <item>
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+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (203.000,314.490;203.100,314.560)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (203.000,313.930;203.100,314.490)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b'</category>
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+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (203.000,313.930;203.100,314.330)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b'</category>
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+            <visited>false</visited>
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+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+            <cell>user_project_wrapper</cell>
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+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
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+        <item>
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+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+        <item>
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+                <value>text: 'Between N/A N/A'</value>
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+        </item>
+        <item>
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+            <cell>user_project_wrapper</cell>
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+                <value>text: 'Between N/A N/A'</value>
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+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+                <value>text: 'Between N/A N/A'</value>
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+                <value>text: 'Between N/A N/A'</value>
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+        <item>
+            <category>'Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b'</category>
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+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_gt_3um_spacing_to_unrelated_m4_lt_0dot4um_met4dot5b'</category>
+            <cell>user_project_wrapper</cell>
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+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
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+                <value>text: 'Between N/A N/A'</value>
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+            <cell>user_project_wrapper</cell>
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+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
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+            </values>
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+                <value>text: 'Between N/A N/A'</value>
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+                <value>text: 'Between N/A N/A'</value>
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+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2603.620,2860.620;2603.920,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2628.480,2860.320;2628.740,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2628.480,2860.320;2628.780,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2628.740,2860.620;2629.080,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2628.780,2860.620;2629.080,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2634.600,2860.320;2634.860,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2634.600,2860.320;2634.900,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2640.720,2860.320;2641.020,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2634.860,2860.620;2635.200,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2640.420,2860.620;2641.320,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2634.900,2860.620;2635.200,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2640.420,2860.620;2640.720,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2641.020,2860.620;2641.320,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2725.720,2860.320;2726.020,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.400,2860.320;2726.700,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2728.440,2860.320;2728.740,2860.530)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2725.420,2860.760;2726.320,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2725.420,2860.620;2726.320,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.100,2860.760;2727.000,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.100,2860.620;2727.000,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2728.140,2860.760;2729.040,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2728.140,2860.620;2729.040,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2725.420,2860.760;2725.720,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2725.420,2860.620;2725.720,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.020,2860.760;2726.320,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.020,2860.620;2726.320,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.100,2860.760;2726.400,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.100,2860.620;2726.400,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.700,2860.760;2727.000,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2726.700,2860.620;2727.000,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2728.140,2860.760;2728.440,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2728.140,2860.620;2728.440,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2728.740,2860.760;2729.040,2860.830)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal4_spacing_lt_0dot3um_met4dot2'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2728.740,2860.620;2729.040,2860.760)</value>
+                <value>text: 'On layer met4'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+    </items>
+</report-database>
diff --git a/mpw_precheck/outputs/user_project_wrapper.filtered.v b/mpw_precheck/outputs/user_project_wrapper.filtered.v
new file mode 100644
index 0000000..9eec3a3
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.filtered.v
@@ -0,0 +1,6931 @@
+module user_project_wrapper (user_clock2,
+    wb_clk_i,
+    wb_rst_i,
+    wbs_ack_o,
+    wbs_cyc_i,
+    wbs_stb_i,
+    wbs_we_i,
+    vssa2,
+    vdda2,
+    vssa1,
+    vdda1,
+    vssd2,
+    vccd2,
+    vssd1,
+    vccd1,
+    analog_io,
+    io_in,
+    io_oeb,
+    io_out,
+    la_data_in,
+    la_data_out,
+    la_oenb,
+    user_irq,
+    wbs_adr_i,
+    wbs_dat_i,
+    wbs_dat_o,
+    wbs_sel_i);
+ input user_clock2;
+ input wb_clk_i;
+ input wb_rst_i;
+ output wbs_ack_o;
+ input wbs_cyc_i;
+ input wbs_stb_i;
+ input wbs_we_i;
+ input vssa2;
+ input vdda2;
+ input vssa1;
+ input vdda1;
+ input vssd2;
+ input vccd2;
+ input vssd1;
+ input vccd1;
+ inout [28:0] analog_io;
+ input [37:0] io_in;
+ output [37:0] io_oeb;
+ output [37:0] io_out;
+ input [127:0] la_data_in;
+ output [127:0] la_data_out;
+ input [127:0] la_oenb;
+ output [2:0] user_irq;
+ input [31:0] wbs_adr_i;
+ input [31:0] wbs_dat_i;
+ output [31:0] wbs_dat_o;
+ input [3:0] wbs_sel_i;
+
+ wire \ca_command[0] ;
+ wire \ca_command[10] ;
+ wire \ca_command[11] ;
+ wire \ca_command[12] ;
+ wire \ca_command[13] ;
+ wire \ca_command[14] ;
+ wire \ca_command[15] ;
+ wire \ca_command[16] ;
+ wire \ca_command[17] ;
+ wire \ca_command[18] ;
+ wire \ca_command[19] ;
+ wire \ca_command[1] ;
+ wire \ca_command[20] ;
+ wire \ca_command[21] ;
+ wire \ca_command[22] ;
+ wire \ca_command[23] ;
+ wire \ca_command[24] ;
+ wire \ca_command[25] ;
+ wire \ca_command[26] ;
+ wire \ca_command[27] ;
+ wire \ca_command[28] ;
+ wire \ca_command[29] ;
+ wire \ca_command[2] ;
+ wire \ca_command[30] ;
+ wire \ca_command[31] ;
+ wire \ca_command[3] ;
+ wire \ca_command[4] ;
+ wire \ca_command[5] ;
+ wire \ca_command[6] ;
+ wire \ca_command[7] ;
+ wire \ca_command[8] ;
+ wire \ca_command[9] ;
+ wire ca_dbus_ack;
+ wire ca_dbus_com;
+ wire \ca_dbus_data[0] ;
+ wire \ca_dbus_data[10] ;
+ wire \ca_dbus_data[11] ;
+ wire \ca_dbus_data[12] ;
+ wire \ca_dbus_data[13] ;
+ wire \ca_dbus_data[14] ;
+ wire \ca_dbus_data[15] ;
+ wire \ca_dbus_data[16] ;
+ wire \ca_dbus_data[17] ;
+ wire \ca_dbus_data[18] ;
+ wire \ca_dbus_data[19] ;
+ wire \ca_dbus_data[1] ;
+ wire \ca_dbus_data[20] ;
+ wire \ca_dbus_data[21] ;
+ wire \ca_dbus_data[22] ;
+ wire \ca_dbus_data[23] ;
+ wire \ca_dbus_data[24] ;
+ wire \ca_dbus_data[25] ;
+ wire \ca_dbus_data[26] ;
+ wire \ca_dbus_data[27] ;
+ wire \ca_dbus_data[28] ;
+ wire \ca_dbus_data[29] ;
+ wire \ca_dbus_data[2] ;
+ wire \ca_dbus_data[30] ;
+ wire \ca_dbus_data[31] ;
+ wire \ca_dbus_data[3] ;
+ wire \ca_dbus_data[4] ;
+ wire \ca_dbus_data[5] ;
+ wire \ca_dbus_data[6] ;
+ wire \ca_dbus_data[7] ;
+ wire \ca_dbus_data[8] ;
+ wire \ca_dbus_data[9] ;
+ wire \ca_dbus_tid[0] ;
+ wire \ca_dbus_tid[1] ;
+ wire \ca_dbus_tid[2] ;
+ wire ca_dbus_valid;
+ wire ca_match_ack;
+ wire ca_match_valid;
+ wire ca_time_ack;
+ wire \ca_time_data[0] ;
+ wire \ca_time_data[10] ;
+ wire \ca_time_data[11] ;
+ wire \ca_time_data[12] ;
+ wire \ca_time_data[13] ;
+ wire \ca_time_data[14] ;
+ wire \ca_time_data[15] ;
+ wire \ca_time_data[16] ;
+ wire \ca_time_data[17] ;
+ wire \ca_time_data[18] ;
+ wire \ca_time_data[19] ;
+ wire \ca_time_data[1] ;
+ wire \ca_time_data[20] ;
+ wire \ca_time_data[21] ;
+ wire \ca_time_data[22] ;
+ wire \ca_time_data[2] ;
+ wire \ca_time_data[3] ;
+ wire \ca_time_data[4] ;
+ wire \ca_time_data[5] ;
+ wire \ca_time_data[6] ;
+ wire \ca_time_data[7] ;
+ wire \ca_time_data[8] ;
+ wire \ca_time_data[9] ;
+ wire ca_time_valid;
+ wire \cubev_ca_addr0[0] ;
+ wire \cubev_ca_addr0[1] ;
+ wire \cubev_ca_addr0[2] ;
+ wire \cubev_ca_addr0[3] ;
+ wire \cubev_ca_addr0[4] ;
+ wire \cubev_ca_addr0[5] ;
+ wire \cubev_ca_addr0[6] ;
+ wire \cubev_ca_addr0[7] ;
+ wire \cubev_ca_addr1[0] ;
+ wire \cubev_ca_addr1[1] ;
+ wire \cubev_ca_addr1[2] ;
+ wire \cubev_ca_addr1[3] ;
+ wire \cubev_ca_addr1[4] ;
+ wire \cubev_ca_addr1[5] ;
+ wire \cubev_ca_addr1[6] ;
+ wire \cubev_ca_addr1[7] ;
+ wire cubev_ca_clk0;
+ wire cubev_ca_clk1;
+ wire cubev_ca_csb0;
+ wire cubev_ca_csb1;
+ wire \cubev_ca_din0[0] ;
+ wire \cubev_ca_din0[10] ;
+ wire \cubev_ca_din0[11] ;
+ wire \cubev_ca_din0[12] ;
+ wire \cubev_ca_din0[13] ;
+ wire \cubev_ca_din0[14] ;
+ wire \cubev_ca_din0[15] ;
+ wire \cubev_ca_din0[16] ;
+ wire \cubev_ca_din0[17] ;
+ wire \cubev_ca_din0[18] ;
+ wire \cubev_ca_din0[19] ;
+ wire \cubev_ca_din0[1] ;
+ wire \cubev_ca_din0[20] ;
+ wire \cubev_ca_din0[21] ;
+ wire \cubev_ca_din0[22] ;
+ wire \cubev_ca_din0[23] ;
+ wire \cubev_ca_din0[24] ;
+ wire \cubev_ca_din0[25] ;
+ wire \cubev_ca_din0[26] ;
+ wire \cubev_ca_din0[27] ;
+ wire \cubev_ca_din0[28] ;
+ wire \cubev_ca_din0[29] ;
+ wire \cubev_ca_din0[2] ;
+ wire \cubev_ca_din0[30] ;
+ wire \cubev_ca_din0[31] ;
+ wire \cubev_ca_din0[3] ;
+ wire \cubev_ca_din0[4] ;
+ wire \cubev_ca_din0[5] ;
+ wire \cubev_ca_din0[6] ;
+ wire \cubev_ca_din0[7] ;
+ wire \cubev_ca_din0[8] ;
+ wire \cubev_ca_din0[9] ;
+ wire \cubev_ca_dout0[0] ;
+ wire \cubev_ca_dout0[10] ;
+ wire \cubev_ca_dout0[11] ;
+ wire \cubev_ca_dout0[12] ;
+ wire \cubev_ca_dout0[13] ;
+ wire \cubev_ca_dout0[14] ;
+ wire \cubev_ca_dout0[15] ;
+ wire \cubev_ca_dout0[16] ;
+ wire \cubev_ca_dout0[17] ;
+ wire \cubev_ca_dout0[18] ;
+ wire \cubev_ca_dout0[19] ;
+ wire \cubev_ca_dout0[1] ;
+ wire \cubev_ca_dout0[20] ;
+ wire \cubev_ca_dout0[21] ;
+ wire \cubev_ca_dout0[22] ;
+ wire \cubev_ca_dout0[23] ;
+ wire \cubev_ca_dout0[24] ;
+ wire \cubev_ca_dout0[25] ;
+ wire \cubev_ca_dout0[26] ;
+ wire \cubev_ca_dout0[27] ;
+ wire \cubev_ca_dout0[28] ;
+ wire \cubev_ca_dout0[29] ;
+ wire \cubev_ca_dout0[2] ;
+ wire \cubev_ca_dout0[30] ;
+ wire \cubev_ca_dout0[31] ;
+ wire \cubev_ca_dout0[3] ;
+ wire \cubev_ca_dout0[4] ;
+ wire \cubev_ca_dout0[5] ;
+ wire \cubev_ca_dout0[6] ;
+ wire \cubev_ca_dout0[7] ;
+ wire \cubev_ca_dout0[8] ;
+ wire \cubev_ca_dout0[9] ;
+ wire \cubev_ca_dout1[0] ;
+ wire \cubev_ca_dout1[10] ;
+ wire \cubev_ca_dout1[11] ;
+ wire \cubev_ca_dout1[12] ;
+ wire \cubev_ca_dout1[13] ;
+ wire \cubev_ca_dout1[14] ;
+ wire \cubev_ca_dout1[15] ;
+ wire \cubev_ca_dout1[16] ;
+ wire \cubev_ca_dout1[17] ;
+ wire \cubev_ca_dout1[18] ;
+ wire \cubev_ca_dout1[19] ;
+ wire \cubev_ca_dout1[1] ;
+ wire \cubev_ca_dout1[20] ;
+ wire \cubev_ca_dout1[21] ;
+ wire \cubev_ca_dout1[22] ;
+ wire \cubev_ca_dout1[23] ;
+ wire \cubev_ca_dout1[24] ;
+ wire \cubev_ca_dout1[25] ;
+ wire \cubev_ca_dout1[26] ;
+ wire \cubev_ca_dout1[27] ;
+ wire \cubev_ca_dout1[28] ;
+ wire \cubev_ca_dout1[29] ;
+ wire \cubev_ca_dout1[2] ;
+ wire \cubev_ca_dout1[30] ;
+ wire \cubev_ca_dout1[31] ;
+ wire \cubev_ca_dout1[3] ;
+ wire \cubev_ca_dout1[4] ;
+ wire \cubev_ca_dout1[5] ;
+ wire \cubev_ca_dout1[6] ;
+ wire \cubev_ca_dout1[7] ;
+ wire \cubev_ca_dout1[8] ;
+ wire \cubev_ca_dout1[9] ;
+ wire cubev_ca_web0;
+ wire \cubev_ca_wmask0[0] ;
+ wire \cubev_ca_wmask0[1] ;
+ wire \cubev_ca_wmask0[2] ;
+ wire \cubev_ca_wmask0[3] ;
+ wire \cubev_dhi_addr0[0] ;
+ wire \cubev_dhi_addr0[1] ;
+ wire \cubev_dhi_addr0[2] ;
+ wire \cubev_dhi_addr0[3] ;
+ wire \cubev_dhi_addr0[4] ;
+ wire \cubev_dhi_addr0[5] ;
+ wire \cubev_dhi_addr0[6] ;
+ wire \cubev_dhi_addr0[7] ;
+ wire \cubev_dhi_addr1[0] ;
+ wire \cubev_dhi_addr1[1] ;
+ wire \cubev_dhi_addr1[2] ;
+ wire \cubev_dhi_addr1[3] ;
+ wire \cubev_dhi_addr1[4] ;
+ wire \cubev_dhi_addr1[5] ;
+ wire \cubev_dhi_addr1[6] ;
+ wire \cubev_dhi_addr1[7] ;
+ wire cubev_dhi_clk0;
+ wire cubev_dhi_clk1;
+ wire cubev_dhi_csb0;
+ wire cubev_dhi_csb1;
+ wire \cubev_dhi_din0[0] ;
+ wire \cubev_dhi_din0[10] ;
+ wire \cubev_dhi_din0[11] ;
+ wire \cubev_dhi_din0[12] ;
+ wire \cubev_dhi_din0[13] ;
+ wire \cubev_dhi_din0[14] ;
+ wire \cubev_dhi_din0[15] ;
+ wire \cubev_dhi_din0[16] ;
+ wire \cubev_dhi_din0[17] ;
+ wire \cubev_dhi_din0[18] ;
+ wire \cubev_dhi_din0[19] ;
+ wire \cubev_dhi_din0[1] ;
+ wire \cubev_dhi_din0[20] ;
+ wire \cubev_dhi_din0[21] ;
+ wire \cubev_dhi_din0[22] ;
+ wire \cubev_dhi_din0[23] ;
+ wire \cubev_dhi_din0[24] ;
+ wire \cubev_dhi_din0[25] ;
+ wire \cubev_dhi_din0[26] ;
+ wire \cubev_dhi_din0[27] ;
+ wire \cubev_dhi_din0[28] ;
+ wire \cubev_dhi_din0[29] ;
+ wire \cubev_dhi_din0[2] ;
+ wire \cubev_dhi_din0[30] ;
+ wire \cubev_dhi_din0[31] ;
+ wire \cubev_dhi_din0[3] ;
+ wire \cubev_dhi_din0[4] ;
+ wire \cubev_dhi_din0[5] ;
+ wire \cubev_dhi_din0[6] ;
+ wire \cubev_dhi_din0[7] ;
+ wire \cubev_dhi_din0[8] ;
+ wire \cubev_dhi_din0[9] ;
+ wire \cubev_dhi_dout0[0] ;
+ wire \cubev_dhi_dout0[10] ;
+ wire \cubev_dhi_dout0[11] ;
+ wire \cubev_dhi_dout0[12] ;
+ wire \cubev_dhi_dout0[13] ;
+ wire \cubev_dhi_dout0[14] ;
+ wire \cubev_dhi_dout0[15] ;
+ wire \cubev_dhi_dout0[16] ;
+ wire \cubev_dhi_dout0[17] ;
+ wire \cubev_dhi_dout0[18] ;
+ wire \cubev_dhi_dout0[19] ;
+ wire \cubev_dhi_dout0[1] ;
+ wire \cubev_dhi_dout0[20] ;
+ wire \cubev_dhi_dout0[21] ;
+ wire \cubev_dhi_dout0[22] ;
+ wire \cubev_dhi_dout0[23] ;
+ wire \cubev_dhi_dout0[24] ;
+ wire \cubev_dhi_dout0[25] ;
+ wire \cubev_dhi_dout0[26] ;
+ wire \cubev_dhi_dout0[27] ;
+ wire \cubev_dhi_dout0[28] ;
+ wire \cubev_dhi_dout0[29] ;
+ wire \cubev_dhi_dout0[2] ;
+ wire \cubev_dhi_dout0[30] ;
+ wire \cubev_dhi_dout0[31] ;
+ wire \cubev_dhi_dout0[3] ;
+ wire \cubev_dhi_dout0[4] ;
+ wire \cubev_dhi_dout0[5] ;
+ wire \cubev_dhi_dout0[6] ;
+ wire \cubev_dhi_dout0[7] ;
+ wire \cubev_dhi_dout0[8] ;
+ wire \cubev_dhi_dout0[9] ;
+ wire \cubev_dhi_dout1[0] ;
+ wire \cubev_dhi_dout1[10] ;
+ wire \cubev_dhi_dout1[11] ;
+ wire \cubev_dhi_dout1[12] ;
+ wire \cubev_dhi_dout1[13] ;
+ wire \cubev_dhi_dout1[14] ;
+ wire \cubev_dhi_dout1[15] ;
+ wire \cubev_dhi_dout1[16] ;
+ wire \cubev_dhi_dout1[17] ;
+ wire \cubev_dhi_dout1[18] ;
+ wire \cubev_dhi_dout1[19] ;
+ wire \cubev_dhi_dout1[1] ;
+ wire \cubev_dhi_dout1[20] ;
+ wire \cubev_dhi_dout1[21] ;
+ wire \cubev_dhi_dout1[22] ;
+ wire \cubev_dhi_dout1[23] ;
+ wire \cubev_dhi_dout1[24] ;
+ wire \cubev_dhi_dout1[25] ;
+ wire \cubev_dhi_dout1[26] ;
+ wire \cubev_dhi_dout1[27] ;
+ wire \cubev_dhi_dout1[28] ;
+ wire \cubev_dhi_dout1[29] ;
+ wire \cubev_dhi_dout1[2] ;
+ wire \cubev_dhi_dout1[30] ;
+ wire \cubev_dhi_dout1[31] ;
+ wire \cubev_dhi_dout1[3] ;
+ wire \cubev_dhi_dout1[4] ;
+ wire \cubev_dhi_dout1[5] ;
+ wire \cubev_dhi_dout1[6] ;
+ wire \cubev_dhi_dout1[7] ;
+ wire \cubev_dhi_dout1[8] ;
+ wire \cubev_dhi_dout1[9] ;
+ wire \cubev_dhi_dout1_reg[0] ;
+ wire \cubev_dhi_dout1_reg[10] ;
+ wire \cubev_dhi_dout1_reg[11] ;
+ wire \cubev_dhi_dout1_reg[12] ;
+ wire \cubev_dhi_dout1_reg[13] ;
+ wire \cubev_dhi_dout1_reg[14] ;
+ wire \cubev_dhi_dout1_reg[15] ;
+ wire \cubev_dhi_dout1_reg[16] ;
+ wire \cubev_dhi_dout1_reg[17] ;
+ wire \cubev_dhi_dout1_reg[18] ;
+ wire \cubev_dhi_dout1_reg[19] ;
+ wire \cubev_dhi_dout1_reg[1] ;
+ wire \cubev_dhi_dout1_reg[20] ;
+ wire \cubev_dhi_dout1_reg[21] ;
+ wire \cubev_dhi_dout1_reg[22] ;
+ wire \cubev_dhi_dout1_reg[23] ;
+ wire \cubev_dhi_dout1_reg[24] ;
+ wire \cubev_dhi_dout1_reg[25] ;
+ wire \cubev_dhi_dout1_reg[26] ;
+ wire \cubev_dhi_dout1_reg[27] ;
+ wire \cubev_dhi_dout1_reg[28] ;
+ wire \cubev_dhi_dout1_reg[29] ;
+ wire \cubev_dhi_dout1_reg[2] ;
+ wire \cubev_dhi_dout1_reg[30] ;
+ wire \cubev_dhi_dout1_reg[31] ;
+ wire \cubev_dhi_dout1_reg[3] ;
+ wire \cubev_dhi_dout1_reg[4] ;
+ wire \cubev_dhi_dout1_reg[5] ;
+ wire \cubev_dhi_dout1_reg[6] ;
+ wire \cubev_dhi_dout1_reg[7] ;
+ wire \cubev_dhi_dout1_reg[8] ;
+ wire \cubev_dhi_dout1_reg[9] ;
+ wire cubev_dhi_rstn;
+ wire cubev_dhi_web0;
+ wire \cubev_dhi_wmask0[0] ;
+ wire \cubev_dhi_wmask0[1] ;
+ wire \cubev_dhi_wmask0[2] ;
+ wire \cubev_dhi_wmask0[3] ;
+ wire \cubev_dli_addr0[0] ;
+ wire \cubev_dli_addr0[1] ;
+ wire \cubev_dli_addr0[2] ;
+ wire \cubev_dli_addr0[3] ;
+ wire \cubev_dli_addr0[4] ;
+ wire \cubev_dli_addr0[5] ;
+ wire \cubev_dli_addr0[6] ;
+ wire \cubev_dli_addr0[7] ;
+ wire \cubev_dli_addr1[0] ;
+ wire \cubev_dli_addr1[1] ;
+ wire \cubev_dli_addr1[2] ;
+ wire \cubev_dli_addr1[3] ;
+ wire \cubev_dli_addr1[4] ;
+ wire \cubev_dli_addr1[5] ;
+ wire \cubev_dli_addr1[6] ;
+ wire \cubev_dli_addr1[7] ;
+ wire cubev_dli_clk0;
+ wire cubev_dli_clk1;
+ wire cubev_dli_csb0;
+ wire cubev_dli_csb1;
+ wire \cubev_dli_din0[0] ;
+ wire \cubev_dli_din0[10] ;
+ wire \cubev_dli_din0[11] ;
+ wire \cubev_dli_din0[12] ;
+ wire \cubev_dli_din0[13] ;
+ wire \cubev_dli_din0[14] ;
+ wire \cubev_dli_din0[15] ;
+ wire \cubev_dli_din0[16] ;
+ wire \cubev_dli_din0[17] ;
+ wire \cubev_dli_din0[18] ;
+ wire \cubev_dli_din0[19] ;
+ wire \cubev_dli_din0[1] ;
+ wire \cubev_dli_din0[20] ;
+ wire \cubev_dli_din0[21] ;
+ wire \cubev_dli_din0[22] ;
+ wire \cubev_dli_din0[23] ;
+ wire \cubev_dli_din0[24] ;
+ wire \cubev_dli_din0[25] ;
+ wire \cubev_dli_din0[26] ;
+ wire \cubev_dli_din0[27] ;
+ wire \cubev_dli_din0[28] ;
+ wire \cubev_dli_din0[29] ;
+ wire \cubev_dli_din0[2] ;
+ wire \cubev_dli_din0[30] ;
+ wire \cubev_dli_din0[31] ;
+ wire \cubev_dli_din0[3] ;
+ wire \cubev_dli_din0[4] ;
+ wire \cubev_dli_din0[5] ;
+ wire \cubev_dli_din0[6] ;
+ wire \cubev_dli_din0[7] ;
+ wire \cubev_dli_din0[8] ;
+ wire \cubev_dli_din0[9] ;
+ wire \cubev_dli_dout0[0] ;
+ wire \cubev_dli_dout0[10] ;
+ wire \cubev_dli_dout0[11] ;
+ wire \cubev_dli_dout0[12] ;
+ wire \cubev_dli_dout0[13] ;
+ wire \cubev_dli_dout0[14] ;
+ wire \cubev_dli_dout0[15] ;
+ wire \cubev_dli_dout0[16] ;
+ wire \cubev_dli_dout0[17] ;
+ wire \cubev_dli_dout0[18] ;
+ wire \cubev_dli_dout0[19] ;
+ wire \cubev_dli_dout0[1] ;
+ wire \cubev_dli_dout0[20] ;
+ wire \cubev_dli_dout0[21] ;
+ wire \cubev_dli_dout0[22] ;
+ wire \cubev_dli_dout0[23] ;
+ wire \cubev_dli_dout0[24] ;
+ wire \cubev_dli_dout0[25] ;
+ wire \cubev_dli_dout0[26] ;
+ wire \cubev_dli_dout0[27] ;
+ wire \cubev_dli_dout0[28] ;
+ wire \cubev_dli_dout0[29] ;
+ wire \cubev_dli_dout0[2] ;
+ wire \cubev_dli_dout0[30] ;
+ wire \cubev_dli_dout0[31] ;
+ wire \cubev_dli_dout0[3] ;
+ wire \cubev_dli_dout0[4] ;
+ wire \cubev_dli_dout0[5] ;
+ wire \cubev_dli_dout0[6] ;
+ wire \cubev_dli_dout0[7] ;
+ wire \cubev_dli_dout0[8] ;
+ wire \cubev_dli_dout0[9] ;
+ wire \cubev_dli_dout1[0] ;
+ wire \cubev_dli_dout1[10] ;
+ wire \cubev_dli_dout1[11] ;
+ wire \cubev_dli_dout1[12] ;
+ wire \cubev_dli_dout1[13] ;
+ wire \cubev_dli_dout1[14] ;
+ wire \cubev_dli_dout1[15] ;
+ wire \cubev_dli_dout1[16] ;
+ wire \cubev_dli_dout1[17] ;
+ wire \cubev_dli_dout1[18] ;
+ wire \cubev_dli_dout1[19] ;
+ wire \cubev_dli_dout1[1] ;
+ wire \cubev_dli_dout1[20] ;
+ wire \cubev_dli_dout1[21] ;
+ wire \cubev_dli_dout1[22] ;
+ wire \cubev_dli_dout1[23] ;
+ wire \cubev_dli_dout1[24] ;
+ wire \cubev_dli_dout1[25] ;
+ wire \cubev_dli_dout1[26] ;
+ wire \cubev_dli_dout1[27] ;
+ wire \cubev_dli_dout1[28] ;
+ wire \cubev_dli_dout1[29] ;
+ wire \cubev_dli_dout1[2] ;
+ wire \cubev_dli_dout1[30] ;
+ wire \cubev_dli_dout1[31] ;
+ wire \cubev_dli_dout1[3] ;
+ wire \cubev_dli_dout1[4] ;
+ wire \cubev_dli_dout1[5] ;
+ wire \cubev_dli_dout1[6] ;
+ wire \cubev_dli_dout1[7] ;
+ wire \cubev_dli_dout1[8] ;
+ wire \cubev_dli_dout1[9] ;
+ wire \cubev_dli_dout1_reg[0] ;
+ wire \cubev_dli_dout1_reg[10] ;
+ wire \cubev_dli_dout1_reg[11] ;
+ wire \cubev_dli_dout1_reg[12] ;
+ wire \cubev_dli_dout1_reg[13] ;
+ wire \cubev_dli_dout1_reg[14] ;
+ wire \cubev_dli_dout1_reg[15] ;
+ wire \cubev_dli_dout1_reg[16] ;
+ wire \cubev_dli_dout1_reg[17] ;
+ wire \cubev_dli_dout1_reg[18] ;
+ wire \cubev_dli_dout1_reg[19] ;
+ wire \cubev_dli_dout1_reg[1] ;
+ wire \cubev_dli_dout1_reg[20] ;
+ wire \cubev_dli_dout1_reg[21] ;
+ wire \cubev_dli_dout1_reg[22] ;
+ wire \cubev_dli_dout1_reg[23] ;
+ wire \cubev_dli_dout1_reg[24] ;
+ wire \cubev_dli_dout1_reg[25] ;
+ wire \cubev_dli_dout1_reg[26] ;
+ wire \cubev_dli_dout1_reg[27] ;
+ wire \cubev_dli_dout1_reg[28] ;
+ wire \cubev_dli_dout1_reg[29] ;
+ wire \cubev_dli_dout1_reg[2] ;
+ wire \cubev_dli_dout1_reg[30] ;
+ wire \cubev_dli_dout1_reg[31] ;
+ wire \cubev_dli_dout1_reg[3] ;
+ wire \cubev_dli_dout1_reg[4] ;
+ wire \cubev_dli_dout1_reg[5] ;
+ wire \cubev_dli_dout1_reg[6] ;
+ wire \cubev_dli_dout1_reg[7] ;
+ wire \cubev_dli_dout1_reg[8] ;
+ wire \cubev_dli_dout1_reg[9] ;
+ wire cubev_dli_rstn;
+ wire cubev_dli_web0;
+ wire \cubev_dli_wmask0[0] ;
+ wire \cubev_dli_wmask0[1] ;
+ wire \cubev_dli_wmask0[2] ;
+ wire \cubev_dli_wmask0[3] ;
+ wire \cubev_phi_addr0[0] ;
+ wire \cubev_phi_addr0[1] ;
+ wire \cubev_phi_addr0[2] ;
+ wire \cubev_phi_addr0[3] ;
+ wire \cubev_phi_addr0[4] ;
+ wire \cubev_phi_addr0[5] ;
+ wire \cubev_phi_addr0[6] ;
+ wire \cubev_phi_addr0[7] ;
+ wire \cubev_phi_addr1[0] ;
+ wire \cubev_phi_addr1[1] ;
+ wire \cubev_phi_addr1[2] ;
+ wire \cubev_phi_addr1[3] ;
+ wire \cubev_phi_addr1[4] ;
+ wire \cubev_phi_addr1[5] ;
+ wire \cubev_phi_addr1[6] ;
+ wire \cubev_phi_addr1[7] ;
+ wire cubev_phi_clk0;
+ wire cubev_phi_clk1;
+ wire cubev_phi_csb0;
+ wire cubev_phi_csb1;
+ wire \cubev_phi_din0[0] ;
+ wire \cubev_phi_din0[10] ;
+ wire \cubev_phi_din0[11] ;
+ wire \cubev_phi_din0[12] ;
+ wire \cubev_phi_din0[13] ;
+ wire \cubev_phi_din0[14] ;
+ wire \cubev_phi_din0[15] ;
+ wire \cubev_phi_din0[16] ;
+ wire \cubev_phi_din0[17] ;
+ wire \cubev_phi_din0[18] ;
+ wire \cubev_phi_din0[19] ;
+ wire \cubev_phi_din0[1] ;
+ wire \cubev_phi_din0[20] ;
+ wire \cubev_phi_din0[21] ;
+ wire \cubev_phi_din0[22] ;
+ wire \cubev_phi_din0[23] ;
+ wire \cubev_phi_din0[24] ;
+ wire \cubev_phi_din0[25] ;
+ wire \cubev_phi_din0[26] ;
+ wire \cubev_phi_din0[27] ;
+ wire \cubev_phi_din0[28] ;
+ wire \cubev_phi_din0[29] ;
+ wire \cubev_phi_din0[2] ;
+ wire \cubev_phi_din0[30] ;
+ wire \cubev_phi_din0[31] ;
+ wire \cubev_phi_din0[3] ;
+ wire \cubev_phi_din0[4] ;
+ wire \cubev_phi_din0[5] ;
+ wire \cubev_phi_din0[6] ;
+ wire \cubev_phi_din0[7] ;
+ wire \cubev_phi_din0[8] ;
+ wire \cubev_phi_din0[9] ;
+ wire \cubev_phi_dout0[0] ;
+ wire \cubev_phi_dout0[10] ;
+ wire \cubev_phi_dout0[11] ;
+ wire \cubev_phi_dout0[12] ;
+ wire \cubev_phi_dout0[13] ;
+ wire \cubev_phi_dout0[14] ;
+ wire \cubev_phi_dout0[15] ;
+ wire \cubev_phi_dout0[16] ;
+ wire \cubev_phi_dout0[17] ;
+ wire \cubev_phi_dout0[18] ;
+ wire \cubev_phi_dout0[19] ;
+ wire \cubev_phi_dout0[1] ;
+ wire \cubev_phi_dout0[20] ;
+ wire \cubev_phi_dout0[21] ;
+ wire \cubev_phi_dout0[22] ;
+ wire \cubev_phi_dout0[23] ;
+ wire \cubev_phi_dout0[24] ;
+ wire \cubev_phi_dout0[25] ;
+ wire \cubev_phi_dout0[26] ;
+ wire \cubev_phi_dout0[27] ;
+ wire \cubev_phi_dout0[28] ;
+ wire \cubev_phi_dout0[29] ;
+ wire \cubev_phi_dout0[2] ;
+ wire \cubev_phi_dout0[30] ;
+ wire \cubev_phi_dout0[31] ;
+ wire \cubev_phi_dout0[3] ;
+ wire \cubev_phi_dout0[4] ;
+ wire \cubev_phi_dout0[5] ;
+ wire \cubev_phi_dout0[6] ;
+ wire \cubev_phi_dout0[7] ;
+ wire \cubev_phi_dout0[8] ;
+ wire \cubev_phi_dout0[9] ;
+ wire \cubev_phi_dout1[0] ;
+ wire \cubev_phi_dout1[10] ;
+ wire \cubev_phi_dout1[11] ;
+ wire \cubev_phi_dout1[12] ;
+ wire \cubev_phi_dout1[13] ;
+ wire \cubev_phi_dout1[14] ;
+ wire \cubev_phi_dout1[15] ;
+ wire \cubev_phi_dout1[16] ;
+ wire \cubev_phi_dout1[17] ;
+ wire \cubev_phi_dout1[18] ;
+ wire \cubev_phi_dout1[19] ;
+ wire \cubev_phi_dout1[1] ;
+ wire \cubev_phi_dout1[20] ;
+ wire \cubev_phi_dout1[21] ;
+ wire \cubev_phi_dout1[22] ;
+ wire \cubev_phi_dout1[23] ;
+ wire \cubev_phi_dout1[24] ;
+ wire \cubev_phi_dout1[25] ;
+ wire \cubev_phi_dout1[26] ;
+ wire \cubev_phi_dout1[27] ;
+ wire \cubev_phi_dout1[28] ;
+ wire \cubev_phi_dout1[29] ;
+ wire \cubev_phi_dout1[2] ;
+ wire \cubev_phi_dout1[30] ;
+ wire \cubev_phi_dout1[31] ;
+ wire \cubev_phi_dout1[3] ;
+ wire \cubev_phi_dout1[4] ;
+ wire \cubev_phi_dout1[5] ;
+ wire \cubev_phi_dout1[6] ;
+ wire \cubev_phi_dout1[7] ;
+ wire \cubev_phi_dout1[8] ;
+ wire \cubev_phi_dout1[9] ;
+ wire \cubev_phi_dout1_reg[0] ;
+ wire \cubev_phi_dout1_reg[10] ;
+ wire \cubev_phi_dout1_reg[11] ;
+ wire \cubev_phi_dout1_reg[12] ;
+ wire \cubev_phi_dout1_reg[13] ;
+ wire \cubev_phi_dout1_reg[14] ;
+ wire \cubev_phi_dout1_reg[15] ;
+ wire \cubev_phi_dout1_reg[16] ;
+ wire \cubev_phi_dout1_reg[17] ;
+ wire \cubev_phi_dout1_reg[18] ;
+ wire \cubev_phi_dout1_reg[19] ;
+ wire \cubev_phi_dout1_reg[1] ;
+ wire \cubev_phi_dout1_reg[20] ;
+ wire \cubev_phi_dout1_reg[21] ;
+ wire \cubev_phi_dout1_reg[22] ;
+ wire \cubev_phi_dout1_reg[23] ;
+ wire \cubev_phi_dout1_reg[24] ;
+ wire \cubev_phi_dout1_reg[25] ;
+ wire \cubev_phi_dout1_reg[26] ;
+ wire \cubev_phi_dout1_reg[27] ;
+ wire \cubev_phi_dout1_reg[28] ;
+ wire \cubev_phi_dout1_reg[29] ;
+ wire \cubev_phi_dout1_reg[2] ;
+ wire \cubev_phi_dout1_reg[30] ;
+ wire \cubev_phi_dout1_reg[31] ;
+ wire \cubev_phi_dout1_reg[3] ;
+ wire \cubev_phi_dout1_reg[4] ;
+ wire \cubev_phi_dout1_reg[5] ;
+ wire \cubev_phi_dout1_reg[6] ;
+ wire \cubev_phi_dout1_reg[7] ;
+ wire \cubev_phi_dout1_reg[8] ;
+ wire \cubev_phi_dout1_reg[9] ;
+ wire cubev_phi_rstn;
+ wire cubev_phi_web0;
+ wire \cubev_phi_wmask0[0] ;
+ wire \cubev_phi_wmask0[1] ;
+ wire \cubev_phi_wmask0[2] ;
+ wire \cubev_phi_wmask0[3] ;
+ wire \cubev_pli_addr0[0] ;
+ wire \cubev_pli_addr0[1] ;
+ wire \cubev_pli_addr0[2] ;
+ wire \cubev_pli_addr0[3] ;
+ wire \cubev_pli_addr0[4] ;
+ wire \cubev_pli_addr0[5] ;
+ wire \cubev_pli_addr0[6] ;
+ wire \cubev_pli_addr0[7] ;
+ wire \cubev_pli_addr1[0] ;
+ wire \cubev_pli_addr1[1] ;
+ wire \cubev_pli_addr1[2] ;
+ wire \cubev_pli_addr1[3] ;
+ wire \cubev_pli_addr1[4] ;
+ wire \cubev_pli_addr1[5] ;
+ wire \cubev_pli_addr1[6] ;
+ wire \cubev_pli_addr1[7] ;
+ wire cubev_pli_clk0;
+ wire cubev_pli_clk1;
+ wire cubev_pli_csb0;
+ wire cubev_pli_csb1;
+ wire \cubev_pli_din0[0] ;
+ wire \cubev_pli_din0[10] ;
+ wire \cubev_pli_din0[11] ;
+ wire \cubev_pli_din0[12] ;
+ wire \cubev_pli_din0[13] ;
+ wire \cubev_pli_din0[14] ;
+ wire \cubev_pli_din0[15] ;
+ wire \cubev_pli_din0[16] ;
+ wire \cubev_pli_din0[17] ;
+ wire \cubev_pli_din0[18] ;
+ wire \cubev_pli_din0[19] ;
+ wire \cubev_pli_din0[1] ;
+ wire \cubev_pli_din0[20] ;
+ wire \cubev_pli_din0[21] ;
+ wire \cubev_pli_din0[22] ;
+ wire \cubev_pli_din0[23] ;
+ wire \cubev_pli_din0[24] ;
+ wire \cubev_pli_din0[25] ;
+ wire \cubev_pli_din0[26] ;
+ wire \cubev_pli_din0[27] ;
+ wire \cubev_pli_din0[28] ;
+ wire \cubev_pli_din0[29] ;
+ wire \cubev_pli_din0[2] ;
+ wire \cubev_pli_din0[30] ;
+ wire \cubev_pli_din0[31] ;
+ wire \cubev_pli_din0[3] ;
+ wire \cubev_pli_din0[4] ;
+ wire \cubev_pli_din0[5] ;
+ wire \cubev_pli_din0[6] ;
+ wire \cubev_pli_din0[7] ;
+ wire \cubev_pli_din0[8] ;
+ wire \cubev_pli_din0[9] ;
+ wire \cubev_pli_dout0[0] ;
+ wire \cubev_pli_dout0[10] ;
+ wire \cubev_pli_dout0[11] ;
+ wire \cubev_pli_dout0[12] ;
+ wire \cubev_pli_dout0[13] ;
+ wire \cubev_pli_dout0[14] ;
+ wire \cubev_pli_dout0[15] ;
+ wire \cubev_pli_dout0[16] ;
+ wire \cubev_pli_dout0[17] ;
+ wire \cubev_pli_dout0[18] ;
+ wire \cubev_pli_dout0[19] ;
+ wire \cubev_pli_dout0[1] ;
+ wire \cubev_pli_dout0[20] ;
+ wire \cubev_pli_dout0[21] ;
+ wire \cubev_pli_dout0[22] ;
+ wire \cubev_pli_dout0[23] ;
+ wire \cubev_pli_dout0[24] ;
+ wire \cubev_pli_dout0[25] ;
+ wire \cubev_pli_dout0[26] ;
+ wire \cubev_pli_dout0[27] ;
+ wire \cubev_pli_dout0[28] ;
+ wire \cubev_pli_dout0[29] ;
+ wire \cubev_pli_dout0[2] ;
+ wire \cubev_pli_dout0[30] ;
+ wire \cubev_pli_dout0[31] ;
+ wire \cubev_pli_dout0[3] ;
+ wire \cubev_pli_dout0[4] ;
+ wire \cubev_pli_dout0[5] ;
+ wire \cubev_pli_dout0[6] ;
+ wire \cubev_pli_dout0[7] ;
+ wire \cubev_pli_dout0[8] ;
+ wire \cubev_pli_dout0[9] ;
+ wire \cubev_pli_dout1[0] ;
+ wire \cubev_pli_dout1[10] ;
+ wire \cubev_pli_dout1[11] ;
+ wire \cubev_pli_dout1[12] ;
+ wire \cubev_pli_dout1[13] ;
+ wire \cubev_pli_dout1[14] ;
+ wire \cubev_pli_dout1[15] ;
+ wire \cubev_pli_dout1[16] ;
+ wire \cubev_pli_dout1[17] ;
+ wire \cubev_pli_dout1[18] ;
+ wire \cubev_pli_dout1[19] ;
+ wire \cubev_pli_dout1[1] ;
+ wire \cubev_pli_dout1[20] ;
+ wire \cubev_pli_dout1[21] ;
+ wire \cubev_pli_dout1[22] ;
+ wire \cubev_pli_dout1[23] ;
+ wire \cubev_pli_dout1[24] ;
+ wire \cubev_pli_dout1[25] ;
+ wire \cubev_pli_dout1[26] ;
+ wire \cubev_pli_dout1[27] ;
+ wire \cubev_pli_dout1[28] ;
+ wire \cubev_pli_dout1[29] ;
+ wire \cubev_pli_dout1[2] ;
+ wire \cubev_pli_dout1[30] ;
+ wire \cubev_pli_dout1[31] ;
+ wire \cubev_pli_dout1[3] ;
+ wire \cubev_pli_dout1[4] ;
+ wire \cubev_pli_dout1[5] ;
+ wire \cubev_pli_dout1[6] ;
+ wire \cubev_pli_dout1[7] ;
+ wire \cubev_pli_dout1[8] ;
+ wire \cubev_pli_dout1[9] ;
+ wire \cubev_pli_dout1_reg[0] ;
+ wire \cubev_pli_dout1_reg[10] ;
+ wire \cubev_pli_dout1_reg[11] ;
+ wire \cubev_pli_dout1_reg[12] ;
+ wire \cubev_pli_dout1_reg[13] ;
+ wire \cubev_pli_dout1_reg[14] ;
+ wire \cubev_pli_dout1_reg[15] ;
+ wire \cubev_pli_dout1_reg[16] ;
+ wire \cubev_pli_dout1_reg[17] ;
+ wire \cubev_pli_dout1_reg[18] ;
+ wire \cubev_pli_dout1_reg[19] ;
+ wire \cubev_pli_dout1_reg[1] ;
+ wire \cubev_pli_dout1_reg[20] ;
+ wire \cubev_pli_dout1_reg[21] ;
+ wire \cubev_pli_dout1_reg[22] ;
+ wire \cubev_pli_dout1_reg[23] ;
+ wire \cubev_pli_dout1_reg[24] ;
+ wire \cubev_pli_dout1_reg[25] ;
+ wire \cubev_pli_dout1_reg[26] ;
+ wire \cubev_pli_dout1_reg[27] ;
+ wire \cubev_pli_dout1_reg[28] ;
+ wire \cubev_pli_dout1_reg[29] ;
+ wire \cubev_pli_dout1_reg[2] ;
+ wire \cubev_pli_dout1_reg[30] ;
+ wire \cubev_pli_dout1_reg[31] ;
+ wire \cubev_pli_dout1_reg[3] ;
+ wire \cubev_pli_dout1_reg[4] ;
+ wire \cubev_pli_dout1_reg[5] ;
+ wire \cubev_pli_dout1_reg[6] ;
+ wire \cubev_pli_dout1_reg[7] ;
+ wire \cubev_pli_dout1_reg[8] ;
+ wire \cubev_pli_dout1_reg[9] ;
+ wire cubev_pli_rstn;
+ wire cubev_pli_web0;
+ wire \cubev_pli_wmask0[0] ;
+ wire \cubev_pli_wmask0[1] ;
+ wire \cubev_pli_wmask0[2] ;
+ wire \cubev_pli_wmask0[3] ;
+ wire \cubev_reg_0_addr0[0] ;
+ wire \cubev_reg_0_addr0[1] ;
+ wire \cubev_reg_0_addr0[2] ;
+ wire \cubev_reg_0_addr0[3] ;
+ wire \cubev_reg_0_addr0[4] ;
+ wire \cubev_reg_0_addr0[5] ;
+ wire \cubev_reg_0_addr0[6] ;
+ wire \cubev_reg_0_addr0[7] ;
+ wire \cubev_reg_0_addr1[0] ;
+ wire \cubev_reg_0_addr1[1] ;
+ wire \cubev_reg_0_addr1[2] ;
+ wire \cubev_reg_0_addr1[3] ;
+ wire \cubev_reg_0_addr1[4] ;
+ wire \cubev_reg_0_addr1[5] ;
+ wire \cubev_reg_0_addr1[6] ;
+ wire \cubev_reg_0_addr1[7] ;
+ wire cubev_reg_0_clk0;
+ wire cubev_reg_0_clk1;
+ wire cubev_reg_0_csb0;
+ wire cubev_reg_0_csb1;
+ wire \cubev_reg_0_din0[0] ;
+ wire \cubev_reg_0_din0[10] ;
+ wire \cubev_reg_0_din0[11] ;
+ wire \cubev_reg_0_din0[12] ;
+ wire \cubev_reg_0_din0[13] ;
+ wire \cubev_reg_0_din0[14] ;
+ wire \cubev_reg_0_din0[15] ;
+ wire \cubev_reg_0_din0[16] ;
+ wire \cubev_reg_0_din0[17] ;
+ wire \cubev_reg_0_din0[18] ;
+ wire \cubev_reg_0_din0[19] ;
+ wire \cubev_reg_0_din0[1] ;
+ wire \cubev_reg_0_din0[20] ;
+ wire \cubev_reg_0_din0[21] ;
+ wire \cubev_reg_0_din0[22] ;
+ wire \cubev_reg_0_din0[23] ;
+ wire \cubev_reg_0_din0[24] ;
+ wire \cubev_reg_0_din0[25] ;
+ wire \cubev_reg_0_din0[26] ;
+ wire \cubev_reg_0_din0[27] ;
+ wire \cubev_reg_0_din0[28] ;
+ wire \cubev_reg_0_din0[29] ;
+ wire \cubev_reg_0_din0[2] ;
+ wire \cubev_reg_0_din0[30] ;
+ wire \cubev_reg_0_din0[31] ;
+ wire \cubev_reg_0_din0[3] ;
+ wire \cubev_reg_0_din0[4] ;
+ wire \cubev_reg_0_din0[5] ;
+ wire \cubev_reg_0_din0[6] ;
+ wire \cubev_reg_0_din0[7] ;
+ wire \cubev_reg_0_din0[8] ;
+ wire \cubev_reg_0_din0[9] ;
+ wire \cubev_reg_0_dout0[0] ;
+ wire \cubev_reg_0_dout0[10] ;
+ wire \cubev_reg_0_dout0[11] ;
+ wire \cubev_reg_0_dout0[12] ;
+ wire \cubev_reg_0_dout0[13] ;
+ wire \cubev_reg_0_dout0[14] ;
+ wire \cubev_reg_0_dout0[15] ;
+ wire \cubev_reg_0_dout0[16] ;
+ wire \cubev_reg_0_dout0[17] ;
+ wire \cubev_reg_0_dout0[18] ;
+ wire \cubev_reg_0_dout0[19] ;
+ wire \cubev_reg_0_dout0[1] ;
+ wire \cubev_reg_0_dout0[20] ;
+ wire \cubev_reg_0_dout0[21] ;
+ wire \cubev_reg_0_dout0[22] ;
+ wire \cubev_reg_0_dout0[23] ;
+ wire \cubev_reg_0_dout0[24] ;
+ wire \cubev_reg_0_dout0[25] ;
+ wire \cubev_reg_0_dout0[26] ;
+ wire \cubev_reg_0_dout0[27] ;
+ wire \cubev_reg_0_dout0[28] ;
+ wire \cubev_reg_0_dout0[29] ;
+ wire \cubev_reg_0_dout0[2] ;
+ wire \cubev_reg_0_dout0[30] ;
+ wire \cubev_reg_0_dout0[31] ;
+ wire \cubev_reg_0_dout0[3] ;
+ wire \cubev_reg_0_dout0[4] ;
+ wire \cubev_reg_0_dout0[5] ;
+ wire \cubev_reg_0_dout0[6] ;
+ wire \cubev_reg_0_dout0[7] ;
+ wire \cubev_reg_0_dout0[8] ;
+ wire \cubev_reg_0_dout0[9] ;
+ wire \cubev_reg_0_dout1[0] ;
+ wire \cubev_reg_0_dout1[10] ;
+ wire \cubev_reg_0_dout1[11] ;
+ wire \cubev_reg_0_dout1[12] ;
+ wire \cubev_reg_0_dout1[13] ;
+ wire \cubev_reg_0_dout1[14] ;
+ wire \cubev_reg_0_dout1[15] ;
+ wire \cubev_reg_0_dout1[16] ;
+ wire \cubev_reg_0_dout1[17] ;
+ wire \cubev_reg_0_dout1[18] ;
+ wire \cubev_reg_0_dout1[19] ;
+ wire \cubev_reg_0_dout1[1] ;
+ wire \cubev_reg_0_dout1[20] ;
+ wire \cubev_reg_0_dout1[21] ;
+ wire \cubev_reg_0_dout1[22] ;
+ wire \cubev_reg_0_dout1[23] ;
+ wire \cubev_reg_0_dout1[24] ;
+ wire \cubev_reg_0_dout1[25] ;
+ wire \cubev_reg_0_dout1[26] ;
+ wire \cubev_reg_0_dout1[27] ;
+ wire \cubev_reg_0_dout1[28] ;
+ wire \cubev_reg_0_dout1[29] ;
+ wire \cubev_reg_0_dout1[2] ;
+ wire \cubev_reg_0_dout1[30] ;
+ wire \cubev_reg_0_dout1[31] ;
+ wire \cubev_reg_0_dout1[3] ;
+ wire \cubev_reg_0_dout1[4] ;
+ wire \cubev_reg_0_dout1[5] ;
+ wire \cubev_reg_0_dout1[6] ;
+ wire \cubev_reg_0_dout1[7] ;
+ wire \cubev_reg_0_dout1[8] ;
+ wire \cubev_reg_0_dout1[9] ;
+ wire \cubev_reg_0_dout1_reg[0] ;
+ wire \cubev_reg_0_dout1_reg[10] ;
+ wire \cubev_reg_0_dout1_reg[11] ;
+ wire \cubev_reg_0_dout1_reg[12] ;
+ wire \cubev_reg_0_dout1_reg[13] ;
+ wire \cubev_reg_0_dout1_reg[14] ;
+ wire \cubev_reg_0_dout1_reg[15] ;
+ wire \cubev_reg_0_dout1_reg[16] ;
+ wire \cubev_reg_0_dout1_reg[17] ;
+ wire \cubev_reg_0_dout1_reg[18] ;
+ wire \cubev_reg_0_dout1_reg[19] ;
+ wire \cubev_reg_0_dout1_reg[1] ;
+ wire \cubev_reg_0_dout1_reg[20] ;
+ wire \cubev_reg_0_dout1_reg[21] ;
+ wire \cubev_reg_0_dout1_reg[22] ;
+ wire \cubev_reg_0_dout1_reg[23] ;
+ wire \cubev_reg_0_dout1_reg[24] ;
+ wire \cubev_reg_0_dout1_reg[25] ;
+ wire \cubev_reg_0_dout1_reg[26] ;
+ wire \cubev_reg_0_dout1_reg[27] ;
+ wire \cubev_reg_0_dout1_reg[28] ;
+ wire \cubev_reg_0_dout1_reg[29] ;
+ wire \cubev_reg_0_dout1_reg[2] ;
+ wire \cubev_reg_0_dout1_reg[30] ;
+ wire \cubev_reg_0_dout1_reg[31] ;
+ wire \cubev_reg_0_dout1_reg[3] ;
+ wire \cubev_reg_0_dout1_reg[4] ;
+ wire \cubev_reg_0_dout1_reg[5] ;
+ wire \cubev_reg_0_dout1_reg[6] ;
+ wire \cubev_reg_0_dout1_reg[7] ;
+ wire \cubev_reg_0_dout1_reg[8] ;
+ wire \cubev_reg_0_dout1_reg[9] ;
+ wire cubev_reg_0_rstn;
+ wire cubev_reg_0_web0;
+ wire \cubev_reg_0_wmask0[0] ;
+ wire \cubev_reg_0_wmask0[1] ;
+ wire \cubev_reg_0_wmask0[2] ;
+ wire \cubev_reg_0_wmask0[3] ;
+ wire \cubev_reg_1_addr0[0] ;
+ wire \cubev_reg_1_addr0[1] ;
+ wire \cubev_reg_1_addr0[2] ;
+ wire \cubev_reg_1_addr0[3] ;
+ wire \cubev_reg_1_addr0[4] ;
+ wire \cubev_reg_1_addr0[5] ;
+ wire \cubev_reg_1_addr0[6] ;
+ wire \cubev_reg_1_addr0[7] ;
+ wire \cubev_reg_1_addr1[0] ;
+ wire \cubev_reg_1_addr1[1] ;
+ wire \cubev_reg_1_addr1[2] ;
+ wire \cubev_reg_1_addr1[3] ;
+ wire \cubev_reg_1_addr1[4] ;
+ wire \cubev_reg_1_addr1[5] ;
+ wire \cubev_reg_1_addr1[6] ;
+ wire \cubev_reg_1_addr1[7] ;
+ wire cubev_reg_1_clk0;
+ wire cubev_reg_1_clk1;
+ wire cubev_reg_1_csb0;
+ wire cubev_reg_1_csb1;
+ wire \cubev_reg_1_din0[0] ;
+ wire \cubev_reg_1_din0[10] ;
+ wire \cubev_reg_1_din0[11] ;
+ wire \cubev_reg_1_din0[12] ;
+ wire \cubev_reg_1_din0[13] ;
+ wire \cubev_reg_1_din0[14] ;
+ wire \cubev_reg_1_din0[15] ;
+ wire \cubev_reg_1_din0[16] ;
+ wire \cubev_reg_1_din0[17] ;
+ wire \cubev_reg_1_din0[18] ;
+ wire \cubev_reg_1_din0[19] ;
+ wire \cubev_reg_1_din0[1] ;
+ wire \cubev_reg_1_din0[20] ;
+ wire \cubev_reg_1_din0[21] ;
+ wire \cubev_reg_1_din0[22] ;
+ wire \cubev_reg_1_din0[23] ;
+ wire \cubev_reg_1_din0[24] ;
+ wire \cubev_reg_1_din0[25] ;
+ wire \cubev_reg_1_din0[26] ;
+ wire \cubev_reg_1_din0[27] ;
+ wire \cubev_reg_1_din0[28] ;
+ wire \cubev_reg_1_din0[29] ;
+ wire \cubev_reg_1_din0[2] ;
+ wire \cubev_reg_1_din0[30] ;
+ wire \cubev_reg_1_din0[31] ;
+ wire \cubev_reg_1_din0[3] ;
+ wire \cubev_reg_1_din0[4] ;
+ wire \cubev_reg_1_din0[5] ;
+ wire \cubev_reg_1_din0[6] ;
+ wire \cubev_reg_1_din0[7] ;
+ wire \cubev_reg_1_din0[8] ;
+ wire \cubev_reg_1_din0[9] ;
+ wire \cubev_reg_1_dout0[0] ;
+ wire \cubev_reg_1_dout0[10] ;
+ wire \cubev_reg_1_dout0[11] ;
+ wire \cubev_reg_1_dout0[12] ;
+ wire \cubev_reg_1_dout0[13] ;
+ wire \cubev_reg_1_dout0[14] ;
+ wire \cubev_reg_1_dout0[15] ;
+ wire \cubev_reg_1_dout0[16] ;
+ wire \cubev_reg_1_dout0[17] ;
+ wire \cubev_reg_1_dout0[18] ;
+ wire \cubev_reg_1_dout0[19] ;
+ wire \cubev_reg_1_dout0[1] ;
+ wire \cubev_reg_1_dout0[20] ;
+ wire \cubev_reg_1_dout0[21] ;
+ wire \cubev_reg_1_dout0[22] ;
+ wire \cubev_reg_1_dout0[23] ;
+ wire \cubev_reg_1_dout0[24] ;
+ wire \cubev_reg_1_dout0[25] ;
+ wire \cubev_reg_1_dout0[26] ;
+ wire \cubev_reg_1_dout0[27] ;
+ wire \cubev_reg_1_dout0[28] ;
+ wire \cubev_reg_1_dout0[29] ;
+ wire \cubev_reg_1_dout0[2] ;
+ wire \cubev_reg_1_dout0[30] ;
+ wire \cubev_reg_1_dout0[31] ;
+ wire \cubev_reg_1_dout0[3] ;
+ wire \cubev_reg_1_dout0[4] ;
+ wire \cubev_reg_1_dout0[5] ;
+ wire \cubev_reg_1_dout0[6] ;
+ wire \cubev_reg_1_dout0[7] ;
+ wire \cubev_reg_1_dout0[8] ;
+ wire \cubev_reg_1_dout0[9] ;
+ wire \cubev_reg_1_dout1[0] ;
+ wire \cubev_reg_1_dout1[10] ;
+ wire \cubev_reg_1_dout1[11] ;
+ wire \cubev_reg_1_dout1[12] ;
+ wire \cubev_reg_1_dout1[13] ;
+ wire \cubev_reg_1_dout1[14] ;
+ wire \cubev_reg_1_dout1[15] ;
+ wire \cubev_reg_1_dout1[16] ;
+ wire \cubev_reg_1_dout1[17] ;
+ wire \cubev_reg_1_dout1[18] ;
+ wire \cubev_reg_1_dout1[19] ;
+ wire \cubev_reg_1_dout1[1] ;
+ wire \cubev_reg_1_dout1[20] ;
+ wire \cubev_reg_1_dout1[21] ;
+ wire \cubev_reg_1_dout1[22] ;
+ wire \cubev_reg_1_dout1[23] ;
+ wire \cubev_reg_1_dout1[24] ;
+ wire \cubev_reg_1_dout1[25] ;
+ wire \cubev_reg_1_dout1[26] ;
+ wire \cubev_reg_1_dout1[27] ;
+ wire \cubev_reg_1_dout1[28] ;
+ wire \cubev_reg_1_dout1[29] ;
+ wire \cubev_reg_1_dout1[2] ;
+ wire \cubev_reg_1_dout1[30] ;
+ wire \cubev_reg_1_dout1[31] ;
+ wire \cubev_reg_1_dout1[3] ;
+ wire \cubev_reg_1_dout1[4] ;
+ wire \cubev_reg_1_dout1[5] ;
+ wire \cubev_reg_1_dout1[6] ;
+ wire \cubev_reg_1_dout1[7] ;
+ wire \cubev_reg_1_dout1[8] ;
+ wire \cubev_reg_1_dout1[9] ;
+ wire \cubev_reg_1_dout1_reg[0] ;
+ wire \cubev_reg_1_dout1_reg[10] ;
+ wire \cubev_reg_1_dout1_reg[11] ;
+ wire \cubev_reg_1_dout1_reg[12] ;
+ wire \cubev_reg_1_dout1_reg[13] ;
+ wire \cubev_reg_1_dout1_reg[14] ;
+ wire \cubev_reg_1_dout1_reg[15] ;
+ wire \cubev_reg_1_dout1_reg[16] ;
+ wire \cubev_reg_1_dout1_reg[17] ;
+ wire \cubev_reg_1_dout1_reg[18] ;
+ wire \cubev_reg_1_dout1_reg[19] ;
+ wire \cubev_reg_1_dout1_reg[1] ;
+ wire \cubev_reg_1_dout1_reg[20] ;
+ wire \cubev_reg_1_dout1_reg[21] ;
+ wire \cubev_reg_1_dout1_reg[22] ;
+ wire \cubev_reg_1_dout1_reg[23] ;
+ wire \cubev_reg_1_dout1_reg[24] ;
+ wire \cubev_reg_1_dout1_reg[25] ;
+ wire \cubev_reg_1_dout1_reg[26] ;
+ wire \cubev_reg_1_dout1_reg[27] ;
+ wire \cubev_reg_1_dout1_reg[28] ;
+ wire \cubev_reg_1_dout1_reg[29] ;
+ wire \cubev_reg_1_dout1_reg[2] ;
+ wire \cubev_reg_1_dout1_reg[30] ;
+ wire \cubev_reg_1_dout1_reg[31] ;
+ wire \cubev_reg_1_dout1_reg[3] ;
+ wire \cubev_reg_1_dout1_reg[4] ;
+ wire \cubev_reg_1_dout1_reg[5] ;
+ wire \cubev_reg_1_dout1_reg[6] ;
+ wire \cubev_reg_1_dout1_reg[7] ;
+ wire \cubev_reg_1_dout1_reg[8] ;
+ wire \cubev_reg_1_dout1_reg[9] ;
+ wire cubev_reg_1_rstn;
+ wire cubev_reg_1_web0;
+ wire \cubev_reg_1_wmask0[0] ;
+ wire \cubev_reg_1_wmask0[1] ;
+ wire \cubev_reg_1_wmask0[2] ;
+ wire \cubev_reg_1_wmask0[3] ;
+ wire \cubev_reg_2_addr0[0] ;
+ wire \cubev_reg_2_addr0[1] ;
+ wire \cubev_reg_2_addr0[2] ;
+ wire \cubev_reg_2_addr0[3] ;
+ wire \cubev_reg_2_addr0[4] ;
+ wire \cubev_reg_2_addr0[5] ;
+ wire \cubev_reg_2_addr0[6] ;
+ wire \cubev_reg_2_addr0[7] ;
+ wire \cubev_reg_2_addr1[0] ;
+ wire \cubev_reg_2_addr1[1] ;
+ wire \cubev_reg_2_addr1[2] ;
+ wire \cubev_reg_2_addr1[3] ;
+ wire \cubev_reg_2_addr1[4] ;
+ wire \cubev_reg_2_addr1[5] ;
+ wire \cubev_reg_2_addr1[6] ;
+ wire \cubev_reg_2_addr1[7] ;
+ wire cubev_reg_2_clk0;
+ wire cubev_reg_2_clk1;
+ wire cubev_reg_2_csb0;
+ wire cubev_reg_2_csb1;
+ wire \cubev_reg_2_din0[0] ;
+ wire \cubev_reg_2_din0[10] ;
+ wire \cubev_reg_2_din0[11] ;
+ wire \cubev_reg_2_din0[12] ;
+ wire \cubev_reg_2_din0[13] ;
+ wire \cubev_reg_2_din0[14] ;
+ wire \cubev_reg_2_din0[15] ;
+ wire \cubev_reg_2_din0[16] ;
+ wire \cubev_reg_2_din0[17] ;
+ wire \cubev_reg_2_din0[18] ;
+ wire \cubev_reg_2_din0[19] ;
+ wire \cubev_reg_2_din0[1] ;
+ wire \cubev_reg_2_din0[20] ;
+ wire \cubev_reg_2_din0[21] ;
+ wire \cubev_reg_2_din0[22] ;
+ wire \cubev_reg_2_din0[23] ;
+ wire \cubev_reg_2_din0[24] ;
+ wire \cubev_reg_2_din0[25] ;
+ wire \cubev_reg_2_din0[26] ;
+ wire \cubev_reg_2_din0[27] ;
+ wire \cubev_reg_2_din0[28] ;
+ wire \cubev_reg_2_din0[29] ;
+ wire \cubev_reg_2_din0[2] ;
+ wire \cubev_reg_2_din0[30] ;
+ wire \cubev_reg_2_din0[31] ;
+ wire \cubev_reg_2_din0[3] ;
+ wire \cubev_reg_2_din0[4] ;
+ wire \cubev_reg_2_din0[5] ;
+ wire \cubev_reg_2_din0[6] ;
+ wire \cubev_reg_2_din0[7] ;
+ wire \cubev_reg_2_din0[8] ;
+ wire \cubev_reg_2_din0[9] ;
+ wire \cubev_reg_2_dout0[0] ;
+ wire \cubev_reg_2_dout0[10] ;
+ wire \cubev_reg_2_dout0[11] ;
+ wire \cubev_reg_2_dout0[12] ;
+ wire \cubev_reg_2_dout0[13] ;
+ wire \cubev_reg_2_dout0[14] ;
+ wire \cubev_reg_2_dout0[15] ;
+ wire \cubev_reg_2_dout0[16] ;
+ wire \cubev_reg_2_dout0[17] ;
+ wire \cubev_reg_2_dout0[18] ;
+ wire \cubev_reg_2_dout0[19] ;
+ wire \cubev_reg_2_dout0[1] ;
+ wire \cubev_reg_2_dout0[20] ;
+ wire \cubev_reg_2_dout0[21] ;
+ wire \cubev_reg_2_dout0[22] ;
+ wire \cubev_reg_2_dout0[23] ;
+ wire \cubev_reg_2_dout0[24] ;
+ wire \cubev_reg_2_dout0[25] ;
+ wire \cubev_reg_2_dout0[26] ;
+ wire \cubev_reg_2_dout0[27] ;
+ wire \cubev_reg_2_dout0[28] ;
+ wire \cubev_reg_2_dout0[29] ;
+ wire \cubev_reg_2_dout0[2] ;
+ wire \cubev_reg_2_dout0[30] ;
+ wire \cubev_reg_2_dout0[31] ;
+ wire \cubev_reg_2_dout0[3] ;
+ wire \cubev_reg_2_dout0[4] ;
+ wire \cubev_reg_2_dout0[5] ;
+ wire \cubev_reg_2_dout0[6] ;
+ wire \cubev_reg_2_dout0[7] ;
+ wire \cubev_reg_2_dout0[8] ;
+ wire \cubev_reg_2_dout0[9] ;
+ wire \cubev_reg_2_dout1[0] ;
+ wire \cubev_reg_2_dout1[10] ;
+ wire \cubev_reg_2_dout1[11] ;
+ wire \cubev_reg_2_dout1[12] ;
+ wire \cubev_reg_2_dout1[13] ;
+ wire \cubev_reg_2_dout1[14] ;
+ wire \cubev_reg_2_dout1[15] ;
+ wire \cubev_reg_2_dout1[16] ;
+ wire \cubev_reg_2_dout1[17] ;
+ wire \cubev_reg_2_dout1[18] ;
+ wire \cubev_reg_2_dout1[19] ;
+ wire \cubev_reg_2_dout1[1] ;
+ wire \cubev_reg_2_dout1[20] ;
+ wire \cubev_reg_2_dout1[21] ;
+ wire \cubev_reg_2_dout1[22] ;
+ wire \cubev_reg_2_dout1[23] ;
+ wire \cubev_reg_2_dout1[24] ;
+ wire \cubev_reg_2_dout1[25] ;
+ wire \cubev_reg_2_dout1[26] ;
+ wire \cubev_reg_2_dout1[27] ;
+ wire \cubev_reg_2_dout1[28] ;
+ wire \cubev_reg_2_dout1[29] ;
+ wire \cubev_reg_2_dout1[2] ;
+ wire \cubev_reg_2_dout1[30] ;
+ wire \cubev_reg_2_dout1[31] ;
+ wire \cubev_reg_2_dout1[3] ;
+ wire \cubev_reg_2_dout1[4] ;
+ wire \cubev_reg_2_dout1[5] ;
+ wire \cubev_reg_2_dout1[6] ;
+ wire \cubev_reg_2_dout1[7] ;
+ wire \cubev_reg_2_dout1[8] ;
+ wire \cubev_reg_2_dout1[9] ;
+ wire \cubev_reg_2_dout1_reg[0] ;
+ wire \cubev_reg_2_dout1_reg[10] ;
+ wire \cubev_reg_2_dout1_reg[11] ;
+ wire \cubev_reg_2_dout1_reg[12] ;
+ wire \cubev_reg_2_dout1_reg[13] ;
+ wire \cubev_reg_2_dout1_reg[14] ;
+ wire \cubev_reg_2_dout1_reg[15] ;
+ wire \cubev_reg_2_dout1_reg[16] ;
+ wire \cubev_reg_2_dout1_reg[17] ;
+ wire \cubev_reg_2_dout1_reg[18] ;
+ wire \cubev_reg_2_dout1_reg[19] ;
+ wire \cubev_reg_2_dout1_reg[1] ;
+ wire \cubev_reg_2_dout1_reg[20] ;
+ wire \cubev_reg_2_dout1_reg[21] ;
+ wire \cubev_reg_2_dout1_reg[22] ;
+ wire \cubev_reg_2_dout1_reg[23] ;
+ wire \cubev_reg_2_dout1_reg[24] ;
+ wire \cubev_reg_2_dout1_reg[25] ;
+ wire \cubev_reg_2_dout1_reg[26] ;
+ wire \cubev_reg_2_dout1_reg[27] ;
+ wire \cubev_reg_2_dout1_reg[28] ;
+ wire \cubev_reg_2_dout1_reg[29] ;
+ wire \cubev_reg_2_dout1_reg[2] ;
+ wire \cubev_reg_2_dout1_reg[30] ;
+ wire \cubev_reg_2_dout1_reg[31] ;
+ wire \cubev_reg_2_dout1_reg[3] ;
+ wire \cubev_reg_2_dout1_reg[4] ;
+ wire \cubev_reg_2_dout1_reg[5] ;
+ wire \cubev_reg_2_dout1_reg[6] ;
+ wire \cubev_reg_2_dout1_reg[7] ;
+ wire \cubev_reg_2_dout1_reg[8] ;
+ wire \cubev_reg_2_dout1_reg[9] ;
+ wire cubev_reg_2_rstn;
+ wire cubev_reg_2_web0;
+ wire \cubev_reg_2_wmask0[0] ;
+ wire \cubev_reg_2_wmask0[1] ;
+ wire \cubev_reg_2_wmask0[2] ;
+ wire \cubev_reg_2_wmask0[3] ;
+ wire \cubev_reg_3_addr0[0] ;
+ wire \cubev_reg_3_addr0[1] ;
+ wire \cubev_reg_3_addr0[2] ;
+ wire \cubev_reg_3_addr0[3] ;
+ wire \cubev_reg_3_addr0[4] ;
+ wire \cubev_reg_3_addr0[5] ;
+ wire \cubev_reg_3_addr0[6] ;
+ wire \cubev_reg_3_addr0[7] ;
+ wire \cubev_reg_3_addr1[0] ;
+ wire \cubev_reg_3_addr1[1] ;
+ wire \cubev_reg_3_addr1[2] ;
+ wire \cubev_reg_3_addr1[3] ;
+ wire \cubev_reg_3_addr1[4] ;
+ wire \cubev_reg_3_addr1[5] ;
+ wire \cubev_reg_3_addr1[6] ;
+ wire \cubev_reg_3_addr1[7] ;
+ wire cubev_reg_3_clk0;
+ wire cubev_reg_3_clk1;
+ wire cubev_reg_3_csb0;
+ wire cubev_reg_3_csb1;
+ wire \cubev_reg_3_din0[0] ;
+ wire \cubev_reg_3_din0[10] ;
+ wire \cubev_reg_3_din0[11] ;
+ wire \cubev_reg_3_din0[12] ;
+ wire \cubev_reg_3_din0[13] ;
+ wire \cubev_reg_3_din0[14] ;
+ wire \cubev_reg_3_din0[15] ;
+ wire \cubev_reg_3_din0[16] ;
+ wire \cubev_reg_3_din0[17] ;
+ wire \cubev_reg_3_din0[18] ;
+ wire \cubev_reg_3_din0[19] ;
+ wire \cubev_reg_3_din0[1] ;
+ wire \cubev_reg_3_din0[20] ;
+ wire \cubev_reg_3_din0[21] ;
+ wire \cubev_reg_3_din0[22] ;
+ wire \cubev_reg_3_din0[23] ;
+ wire \cubev_reg_3_din0[24] ;
+ wire \cubev_reg_3_din0[25] ;
+ wire \cubev_reg_3_din0[26] ;
+ wire \cubev_reg_3_din0[27] ;
+ wire \cubev_reg_3_din0[28] ;
+ wire \cubev_reg_3_din0[29] ;
+ wire \cubev_reg_3_din0[2] ;
+ wire \cubev_reg_3_din0[30] ;
+ wire \cubev_reg_3_din0[31] ;
+ wire \cubev_reg_3_din0[3] ;
+ wire \cubev_reg_3_din0[4] ;
+ wire \cubev_reg_3_din0[5] ;
+ wire \cubev_reg_3_din0[6] ;
+ wire \cubev_reg_3_din0[7] ;
+ wire \cubev_reg_3_din0[8] ;
+ wire \cubev_reg_3_din0[9] ;
+ wire \cubev_reg_3_dout0[0] ;
+ wire \cubev_reg_3_dout0[10] ;
+ wire \cubev_reg_3_dout0[11] ;
+ wire \cubev_reg_3_dout0[12] ;
+ wire \cubev_reg_3_dout0[13] ;
+ wire \cubev_reg_3_dout0[14] ;
+ wire \cubev_reg_3_dout0[15] ;
+ wire \cubev_reg_3_dout0[16] ;
+ wire \cubev_reg_3_dout0[17] ;
+ wire \cubev_reg_3_dout0[18] ;
+ wire \cubev_reg_3_dout0[19] ;
+ wire \cubev_reg_3_dout0[1] ;
+ wire \cubev_reg_3_dout0[20] ;
+ wire \cubev_reg_3_dout0[21] ;
+ wire \cubev_reg_3_dout0[22] ;
+ wire \cubev_reg_3_dout0[23] ;
+ wire \cubev_reg_3_dout0[24] ;
+ wire \cubev_reg_3_dout0[25] ;
+ wire \cubev_reg_3_dout0[26] ;
+ wire \cubev_reg_3_dout0[27] ;
+ wire \cubev_reg_3_dout0[28] ;
+ wire \cubev_reg_3_dout0[29] ;
+ wire \cubev_reg_3_dout0[2] ;
+ wire \cubev_reg_3_dout0[30] ;
+ wire \cubev_reg_3_dout0[31] ;
+ wire \cubev_reg_3_dout0[3] ;
+ wire \cubev_reg_3_dout0[4] ;
+ wire \cubev_reg_3_dout0[5] ;
+ wire \cubev_reg_3_dout0[6] ;
+ wire \cubev_reg_3_dout0[7] ;
+ wire \cubev_reg_3_dout0[8] ;
+ wire \cubev_reg_3_dout0[9] ;
+ wire \cubev_reg_3_dout1[0] ;
+ wire \cubev_reg_3_dout1[10] ;
+ wire \cubev_reg_3_dout1[11] ;
+ wire \cubev_reg_3_dout1[12] ;
+ wire \cubev_reg_3_dout1[13] ;
+ wire \cubev_reg_3_dout1[14] ;
+ wire \cubev_reg_3_dout1[15] ;
+ wire \cubev_reg_3_dout1[16] ;
+ wire \cubev_reg_3_dout1[17] ;
+ wire \cubev_reg_3_dout1[18] ;
+ wire \cubev_reg_3_dout1[19] ;
+ wire \cubev_reg_3_dout1[1] ;
+ wire \cubev_reg_3_dout1[20] ;
+ wire \cubev_reg_3_dout1[21] ;
+ wire \cubev_reg_3_dout1[22] ;
+ wire \cubev_reg_3_dout1[23] ;
+ wire \cubev_reg_3_dout1[24] ;
+ wire \cubev_reg_3_dout1[25] ;
+ wire \cubev_reg_3_dout1[26] ;
+ wire \cubev_reg_3_dout1[27] ;
+ wire \cubev_reg_3_dout1[28] ;
+ wire \cubev_reg_3_dout1[29] ;
+ wire \cubev_reg_3_dout1[2] ;
+ wire \cubev_reg_3_dout1[30] ;
+ wire \cubev_reg_3_dout1[31] ;
+ wire \cubev_reg_3_dout1[3] ;
+ wire \cubev_reg_3_dout1[4] ;
+ wire \cubev_reg_3_dout1[5] ;
+ wire \cubev_reg_3_dout1[6] ;
+ wire \cubev_reg_3_dout1[7] ;
+ wire \cubev_reg_3_dout1[8] ;
+ wire \cubev_reg_3_dout1[9] ;
+ wire \cubev_reg_3_dout1_reg[0] ;
+ wire \cubev_reg_3_dout1_reg[10] ;
+ wire \cubev_reg_3_dout1_reg[11] ;
+ wire \cubev_reg_3_dout1_reg[12] ;
+ wire \cubev_reg_3_dout1_reg[13] ;
+ wire \cubev_reg_3_dout1_reg[14] ;
+ wire \cubev_reg_3_dout1_reg[15] ;
+ wire \cubev_reg_3_dout1_reg[16] ;
+ wire \cubev_reg_3_dout1_reg[17] ;
+ wire \cubev_reg_3_dout1_reg[18] ;
+ wire \cubev_reg_3_dout1_reg[19] ;
+ wire \cubev_reg_3_dout1_reg[1] ;
+ wire \cubev_reg_3_dout1_reg[20] ;
+ wire \cubev_reg_3_dout1_reg[21] ;
+ wire \cubev_reg_3_dout1_reg[22] ;
+ wire \cubev_reg_3_dout1_reg[23] ;
+ wire \cubev_reg_3_dout1_reg[24] ;
+ wire \cubev_reg_3_dout1_reg[25] ;
+ wire \cubev_reg_3_dout1_reg[26] ;
+ wire \cubev_reg_3_dout1_reg[27] ;
+ wire \cubev_reg_3_dout1_reg[28] ;
+ wire \cubev_reg_3_dout1_reg[29] ;
+ wire \cubev_reg_3_dout1_reg[2] ;
+ wire \cubev_reg_3_dout1_reg[30] ;
+ wire \cubev_reg_3_dout1_reg[31] ;
+ wire \cubev_reg_3_dout1_reg[3] ;
+ wire \cubev_reg_3_dout1_reg[4] ;
+ wire \cubev_reg_3_dout1_reg[5] ;
+ wire \cubev_reg_3_dout1_reg[6] ;
+ wire \cubev_reg_3_dout1_reg[7] ;
+ wire \cubev_reg_3_dout1_reg[8] ;
+ wire \cubev_reg_3_dout1_reg[9] ;
+ wire cubev_reg_3_rstn;
+ wire cubev_reg_3_web0;
+ wire \cubev_reg_3_wmask0[0] ;
+ wire \cubev_reg_3_wmask0[1] ;
+ wire \cubev_reg_3_wmask0[2] ;
+ wire \cubev_reg_3_wmask0[3] ;
+ wire \cubev_reg_4_addr0[0] ;
+ wire \cubev_reg_4_addr0[1] ;
+ wire \cubev_reg_4_addr0[2] ;
+ wire \cubev_reg_4_addr0[3] ;
+ wire \cubev_reg_4_addr0[4] ;
+ wire \cubev_reg_4_addr0[5] ;
+ wire \cubev_reg_4_addr0[6] ;
+ wire \cubev_reg_4_addr0[7] ;
+ wire \cubev_reg_4_addr1[0] ;
+ wire \cubev_reg_4_addr1[1] ;
+ wire \cubev_reg_4_addr1[2] ;
+ wire \cubev_reg_4_addr1[3] ;
+ wire \cubev_reg_4_addr1[4] ;
+ wire \cubev_reg_4_addr1[5] ;
+ wire \cubev_reg_4_addr1[6] ;
+ wire \cubev_reg_4_addr1[7] ;
+ wire cubev_reg_4_clk0;
+ wire cubev_reg_4_clk1;
+ wire cubev_reg_4_csb0;
+ wire cubev_reg_4_csb1;
+ wire \cubev_reg_4_din0[0] ;
+ wire \cubev_reg_4_din0[10] ;
+ wire \cubev_reg_4_din0[11] ;
+ wire \cubev_reg_4_din0[12] ;
+ wire \cubev_reg_4_din0[13] ;
+ wire \cubev_reg_4_din0[14] ;
+ wire \cubev_reg_4_din0[15] ;
+ wire \cubev_reg_4_din0[16] ;
+ wire \cubev_reg_4_din0[17] ;
+ wire \cubev_reg_4_din0[18] ;
+ wire \cubev_reg_4_din0[19] ;
+ wire \cubev_reg_4_din0[1] ;
+ wire \cubev_reg_4_din0[20] ;
+ wire \cubev_reg_4_din0[21] ;
+ wire \cubev_reg_4_din0[22] ;
+ wire \cubev_reg_4_din0[23] ;
+ wire \cubev_reg_4_din0[24] ;
+ wire \cubev_reg_4_din0[25] ;
+ wire \cubev_reg_4_din0[26] ;
+ wire \cubev_reg_4_din0[27] ;
+ wire \cubev_reg_4_din0[28] ;
+ wire \cubev_reg_4_din0[29] ;
+ wire \cubev_reg_4_din0[2] ;
+ wire \cubev_reg_4_din0[30] ;
+ wire \cubev_reg_4_din0[31] ;
+ wire \cubev_reg_4_din0[3] ;
+ wire \cubev_reg_4_din0[4] ;
+ wire \cubev_reg_4_din0[5] ;
+ wire \cubev_reg_4_din0[6] ;
+ wire \cubev_reg_4_din0[7] ;
+ wire \cubev_reg_4_din0[8] ;
+ wire \cubev_reg_4_din0[9] ;
+ wire \cubev_reg_4_dout0[0] ;
+ wire \cubev_reg_4_dout0[10] ;
+ wire \cubev_reg_4_dout0[11] ;
+ wire \cubev_reg_4_dout0[12] ;
+ wire \cubev_reg_4_dout0[13] ;
+ wire \cubev_reg_4_dout0[14] ;
+ wire \cubev_reg_4_dout0[15] ;
+ wire \cubev_reg_4_dout0[16] ;
+ wire \cubev_reg_4_dout0[17] ;
+ wire \cubev_reg_4_dout0[18] ;
+ wire \cubev_reg_4_dout0[19] ;
+ wire \cubev_reg_4_dout0[1] ;
+ wire \cubev_reg_4_dout0[20] ;
+ wire \cubev_reg_4_dout0[21] ;
+ wire \cubev_reg_4_dout0[22] ;
+ wire \cubev_reg_4_dout0[23] ;
+ wire \cubev_reg_4_dout0[24] ;
+ wire \cubev_reg_4_dout0[25] ;
+ wire \cubev_reg_4_dout0[26] ;
+ wire \cubev_reg_4_dout0[27] ;
+ wire \cubev_reg_4_dout0[28] ;
+ wire \cubev_reg_4_dout0[29] ;
+ wire \cubev_reg_4_dout0[2] ;
+ wire \cubev_reg_4_dout0[30] ;
+ wire \cubev_reg_4_dout0[31] ;
+ wire \cubev_reg_4_dout0[3] ;
+ wire \cubev_reg_4_dout0[4] ;
+ wire \cubev_reg_4_dout0[5] ;
+ wire \cubev_reg_4_dout0[6] ;
+ wire \cubev_reg_4_dout0[7] ;
+ wire \cubev_reg_4_dout0[8] ;
+ wire \cubev_reg_4_dout0[9] ;
+ wire \cubev_reg_4_dout1[0] ;
+ wire \cubev_reg_4_dout1[10] ;
+ wire \cubev_reg_4_dout1[11] ;
+ wire \cubev_reg_4_dout1[12] ;
+ wire \cubev_reg_4_dout1[13] ;
+ wire \cubev_reg_4_dout1[14] ;
+ wire \cubev_reg_4_dout1[15] ;
+ wire \cubev_reg_4_dout1[16] ;
+ wire \cubev_reg_4_dout1[17] ;
+ wire \cubev_reg_4_dout1[18] ;
+ wire \cubev_reg_4_dout1[19] ;
+ wire \cubev_reg_4_dout1[1] ;
+ wire \cubev_reg_4_dout1[20] ;
+ wire \cubev_reg_4_dout1[21] ;
+ wire \cubev_reg_4_dout1[22] ;
+ wire \cubev_reg_4_dout1[23] ;
+ wire \cubev_reg_4_dout1[24] ;
+ wire \cubev_reg_4_dout1[25] ;
+ wire \cubev_reg_4_dout1[26] ;
+ wire \cubev_reg_4_dout1[27] ;
+ wire \cubev_reg_4_dout1[28] ;
+ wire \cubev_reg_4_dout1[29] ;
+ wire \cubev_reg_4_dout1[2] ;
+ wire \cubev_reg_4_dout1[30] ;
+ wire \cubev_reg_4_dout1[31] ;
+ wire \cubev_reg_4_dout1[3] ;
+ wire \cubev_reg_4_dout1[4] ;
+ wire \cubev_reg_4_dout1[5] ;
+ wire \cubev_reg_4_dout1[6] ;
+ wire \cubev_reg_4_dout1[7] ;
+ wire \cubev_reg_4_dout1[8] ;
+ wire \cubev_reg_4_dout1[9] ;
+ wire \cubev_reg_4_dout1_reg[0] ;
+ wire \cubev_reg_4_dout1_reg[10] ;
+ wire \cubev_reg_4_dout1_reg[11] ;
+ wire \cubev_reg_4_dout1_reg[12] ;
+ wire \cubev_reg_4_dout1_reg[13] ;
+ wire \cubev_reg_4_dout1_reg[14] ;
+ wire \cubev_reg_4_dout1_reg[15] ;
+ wire \cubev_reg_4_dout1_reg[16] ;
+ wire \cubev_reg_4_dout1_reg[17] ;
+ wire \cubev_reg_4_dout1_reg[18] ;
+ wire \cubev_reg_4_dout1_reg[19] ;
+ wire \cubev_reg_4_dout1_reg[1] ;
+ wire \cubev_reg_4_dout1_reg[20] ;
+ wire \cubev_reg_4_dout1_reg[21] ;
+ wire \cubev_reg_4_dout1_reg[22] ;
+ wire \cubev_reg_4_dout1_reg[23] ;
+ wire \cubev_reg_4_dout1_reg[24] ;
+ wire \cubev_reg_4_dout1_reg[25] ;
+ wire \cubev_reg_4_dout1_reg[26] ;
+ wire \cubev_reg_4_dout1_reg[27] ;
+ wire \cubev_reg_4_dout1_reg[28] ;
+ wire \cubev_reg_4_dout1_reg[29] ;
+ wire \cubev_reg_4_dout1_reg[2] ;
+ wire \cubev_reg_4_dout1_reg[30] ;
+ wire \cubev_reg_4_dout1_reg[31] ;
+ wire \cubev_reg_4_dout1_reg[3] ;
+ wire \cubev_reg_4_dout1_reg[4] ;
+ wire \cubev_reg_4_dout1_reg[5] ;
+ wire \cubev_reg_4_dout1_reg[6] ;
+ wire \cubev_reg_4_dout1_reg[7] ;
+ wire \cubev_reg_4_dout1_reg[8] ;
+ wire \cubev_reg_4_dout1_reg[9] ;
+ wire cubev_reg_4_rstn;
+ wire cubev_reg_4_web0;
+ wire \cubev_reg_4_wmask0[0] ;
+ wire \cubev_reg_4_wmask0[1] ;
+ wire \cubev_reg_4_wmask0[2] ;
+ wire \cubev_reg_4_wmask0[3] ;
+ wire \cubev_reg_5_addr0[0] ;
+ wire \cubev_reg_5_addr0[1] ;
+ wire \cubev_reg_5_addr0[2] ;
+ wire \cubev_reg_5_addr0[3] ;
+ wire \cubev_reg_5_addr0[4] ;
+ wire \cubev_reg_5_addr0[5] ;
+ wire \cubev_reg_5_addr0[6] ;
+ wire \cubev_reg_5_addr0[7] ;
+ wire \cubev_reg_5_addr1[0] ;
+ wire \cubev_reg_5_addr1[1] ;
+ wire \cubev_reg_5_addr1[2] ;
+ wire \cubev_reg_5_addr1[3] ;
+ wire \cubev_reg_5_addr1[4] ;
+ wire \cubev_reg_5_addr1[5] ;
+ wire \cubev_reg_5_addr1[6] ;
+ wire \cubev_reg_5_addr1[7] ;
+ wire cubev_reg_5_clk0;
+ wire cubev_reg_5_clk1;
+ wire cubev_reg_5_csb0;
+ wire cubev_reg_5_csb1;
+ wire \cubev_reg_5_din0[0] ;
+ wire \cubev_reg_5_din0[10] ;
+ wire \cubev_reg_5_din0[11] ;
+ wire \cubev_reg_5_din0[12] ;
+ wire \cubev_reg_5_din0[13] ;
+ wire \cubev_reg_5_din0[14] ;
+ wire \cubev_reg_5_din0[15] ;
+ wire \cubev_reg_5_din0[16] ;
+ wire \cubev_reg_5_din0[17] ;
+ wire \cubev_reg_5_din0[18] ;
+ wire \cubev_reg_5_din0[19] ;
+ wire \cubev_reg_5_din0[1] ;
+ wire \cubev_reg_5_din0[20] ;
+ wire \cubev_reg_5_din0[21] ;
+ wire \cubev_reg_5_din0[22] ;
+ wire \cubev_reg_5_din0[23] ;
+ wire \cubev_reg_5_din0[24] ;
+ wire \cubev_reg_5_din0[25] ;
+ wire \cubev_reg_5_din0[26] ;
+ wire \cubev_reg_5_din0[27] ;
+ wire \cubev_reg_5_din0[28] ;
+ wire \cubev_reg_5_din0[29] ;
+ wire \cubev_reg_5_din0[2] ;
+ wire \cubev_reg_5_din0[30] ;
+ wire \cubev_reg_5_din0[31] ;
+ wire \cubev_reg_5_din0[3] ;
+ wire \cubev_reg_5_din0[4] ;
+ wire \cubev_reg_5_din0[5] ;
+ wire \cubev_reg_5_din0[6] ;
+ wire \cubev_reg_5_din0[7] ;
+ wire \cubev_reg_5_din0[8] ;
+ wire \cubev_reg_5_din0[9] ;
+ wire \cubev_reg_5_dout0[0] ;
+ wire \cubev_reg_5_dout0[10] ;
+ wire \cubev_reg_5_dout0[11] ;
+ wire \cubev_reg_5_dout0[12] ;
+ wire \cubev_reg_5_dout0[13] ;
+ wire \cubev_reg_5_dout0[14] ;
+ wire \cubev_reg_5_dout0[15] ;
+ wire \cubev_reg_5_dout0[16] ;
+ wire \cubev_reg_5_dout0[17] ;
+ wire \cubev_reg_5_dout0[18] ;
+ wire \cubev_reg_5_dout0[19] ;
+ wire \cubev_reg_5_dout0[1] ;
+ wire \cubev_reg_5_dout0[20] ;
+ wire \cubev_reg_5_dout0[21] ;
+ wire \cubev_reg_5_dout0[22] ;
+ wire \cubev_reg_5_dout0[23] ;
+ wire \cubev_reg_5_dout0[24] ;
+ wire \cubev_reg_5_dout0[25] ;
+ wire \cubev_reg_5_dout0[26] ;
+ wire \cubev_reg_5_dout0[27] ;
+ wire \cubev_reg_5_dout0[28] ;
+ wire \cubev_reg_5_dout0[29] ;
+ wire \cubev_reg_5_dout0[2] ;
+ wire \cubev_reg_5_dout0[30] ;
+ wire \cubev_reg_5_dout0[31] ;
+ wire \cubev_reg_5_dout0[3] ;
+ wire \cubev_reg_5_dout0[4] ;
+ wire \cubev_reg_5_dout0[5] ;
+ wire \cubev_reg_5_dout0[6] ;
+ wire \cubev_reg_5_dout0[7] ;
+ wire \cubev_reg_5_dout0[8] ;
+ wire \cubev_reg_5_dout0[9] ;
+ wire \cubev_reg_5_dout1[0] ;
+ wire \cubev_reg_5_dout1[10] ;
+ wire \cubev_reg_5_dout1[11] ;
+ wire \cubev_reg_5_dout1[12] ;
+ wire \cubev_reg_5_dout1[13] ;
+ wire \cubev_reg_5_dout1[14] ;
+ wire \cubev_reg_5_dout1[15] ;
+ wire \cubev_reg_5_dout1[16] ;
+ wire \cubev_reg_5_dout1[17] ;
+ wire \cubev_reg_5_dout1[18] ;
+ wire \cubev_reg_5_dout1[19] ;
+ wire \cubev_reg_5_dout1[1] ;
+ wire \cubev_reg_5_dout1[20] ;
+ wire \cubev_reg_5_dout1[21] ;
+ wire \cubev_reg_5_dout1[22] ;
+ wire \cubev_reg_5_dout1[23] ;
+ wire \cubev_reg_5_dout1[24] ;
+ wire \cubev_reg_5_dout1[25] ;
+ wire \cubev_reg_5_dout1[26] ;
+ wire \cubev_reg_5_dout1[27] ;
+ wire \cubev_reg_5_dout1[28] ;
+ wire \cubev_reg_5_dout1[29] ;
+ wire \cubev_reg_5_dout1[2] ;
+ wire \cubev_reg_5_dout1[30] ;
+ wire \cubev_reg_5_dout1[31] ;
+ wire \cubev_reg_5_dout1[3] ;
+ wire \cubev_reg_5_dout1[4] ;
+ wire \cubev_reg_5_dout1[5] ;
+ wire \cubev_reg_5_dout1[6] ;
+ wire \cubev_reg_5_dout1[7] ;
+ wire \cubev_reg_5_dout1[8] ;
+ wire \cubev_reg_5_dout1[9] ;
+ wire \cubev_reg_5_dout1_reg[0] ;
+ wire \cubev_reg_5_dout1_reg[10] ;
+ wire \cubev_reg_5_dout1_reg[11] ;
+ wire \cubev_reg_5_dout1_reg[12] ;
+ wire \cubev_reg_5_dout1_reg[13] ;
+ wire \cubev_reg_5_dout1_reg[14] ;
+ wire \cubev_reg_5_dout1_reg[15] ;
+ wire \cubev_reg_5_dout1_reg[16] ;
+ wire \cubev_reg_5_dout1_reg[17] ;
+ wire \cubev_reg_5_dout1_reg[18] ;
+ wire \cubev_reg_5_dout1_reg[19] ;
+ wire \cubev_reg_5_dout1_reg[1] ;
+ wire \cubev_reg_5_dout1_reg[20] ;
+ wire \cubev_reg_5_dout1_reg[21] ;
+ wire \cubev_reg_5_dout1_reg[22] ;
+ wire \cubev_reg_5_dout1_reg[23] ;
+ wire \cubev_reg_5_dout1_reg[24] ;
+ wire \cubev_reg_5_dout1_reg[25] ;
+ wire \cubev_reg_5_dout1_reg[26] ;
+ wire \cubev_reg_5_dout1_reg[27] ;
+ wire \cubev_reg_5_dout1_reg[28] ;
+ wire \cubev_reg_5_dout1_reg[29] ;
+ wire \cubev_reg_5_dout1_reg[2] ;
+ wire \cubev_reg_5_dout1_reg[30] ;
+ wire \cubev_reg_5_dout1_reg[31] ;
+ wire \cubev_reg_5_dout1_reg[3] ;
+ wire \cubev_reg_5_dout1_reg[4] ;
+ wire \cubev_reg_5_dout1_reg[5] ;
+ wire \cubev_reg_5_dout1_reg[6] ;
+ wire \cubev_reg_5_dout1_reg[7] ;
+ wire \cubev_reg_5_dout1_reg[8] ;
+ wire \cubev_reg_5_dout1_reg[9] ;
+ wire cubev_reg_5_rstn;
+ wire cubev_reg_5_web0;
+ wire \cubev_reg_5_wmask0[0] ;
+ wire \cubev_reg_5_wmask0[1] ;
+ wire \cubev_reg_5_wmask0[2] ;
+ wire \cubev_reg_5_wmask0[3] ;
+ wire \cubev_rf1_addr0[0] ;
+ wire \cubev_rf1_addr0[1] ;
+ wire \cubev_rf1_addr0[2] ;
+ wire \cubev_rf1_addr0[3] ;
+ wire \cubev_rf1_addr0[4] ;
+ wire \cubev_rf1_addr0[5] ;
+ wire \cubev_rf1_addr0[6] ;
+ wire \cubev_rf1_addr0[7] ;
+ wire \cubev_rf1_addr1[0] ;
+ wire \cubev_rf1_addr1[1] ;
+ wire \cubev_rf1_addr1[2] ;
+ wire \cubev_rf1_addr1[3] ;
+ wire \cubev_rf1_addr1[4] ;
+ wire \cubev_rf1_addr1[5] ;
+ wire \cubev_rf1_addr1[6] ;
+ wire \cubev_rf1_addr1[7] ;
+ wire cubev_rf1_clk0;
+ wire cubev_rf1_clk1;
+ wire cubev_rf1_csb0;
+ wire cubev_rf1_csb1;
+ wire \cubev_rf1_din0[0] ;
+ wire \cubev_rf1_din0[10] ;
+ wire \cubev_rf1_din0[11] ;
+ wire \cubev_rf1_din0[12] ;
+ wire \cubev_rf1_din0[13] ;
+ wire \cubev_rf1_din0[14] ;
+ wire \cubev_rf1_din0[15] ;
+ wire \cubev_rf1_din0[16] ;
+ wire \cubev_rf1_din0[17] ;
+ wire \cubev_rf1_din0[18] ;
+ wire \cubev_rf1_din0[19] ;
+ wire \cubev_rf1_din0[1] ;
+ wire \cubev_rf1_din0[20] ;
+ wire \cubev_rf1_din0[21] ;
+ wire \cubev_rf1_din0[22] ;
+ wire \cubev_rf1_din0[23] ;
+ wire \cubev_rf1_din0[24] ;
+ wire \cubev_rf1_din0[25] ;
+ wire \cubev_rf1_din0[26] ;
+ wire \cubev_rf1_din0[27] ;
+ wire \cubev_rf1_din0[28] ;
+ wire \cubev_rf1_din0[29] ;
+ wire \cubev_rf1_din0[2] ;
+ wire \cubev_rf1_din0[30] ;
+ wire \cubev_rf1_din0[31] ;
+ wire \cubev_rf1_din0[3] ;
+ wire \cubev_rf1_din0[4] ;
+ wire \cubev_rf1_din0[5] ;
+ wire \cubev_rf1_din0[6] ;
+ wire \cubev_rf1_din0[7] ;
+ wire \cubev_rf1_din0[8] ;
+ wire \cubev_rf1_din0[9] ;
+ wire \cubev_rf1_dout0[0] ;
+ wire \cubev_rf1_dout0[10] ;
+ wire \cubev_rf1_dout0[11] ;
+ wire \cubev_rf1_dout0[12] ;
+ wire \cubev_rf1_dout0[13] ;
+ wire \cubev_rf1_dout0[14] ;
+ wire \cubev_rf1_dout0[15] ;
+ wire \cubev_rf1_dout0[16] ;
+ wire \cubev_rf1_dout0[17] ;
+ wire \cubev_rf1_dout0[18] ;
+ wire \cubev_rf1_dout0[19] ;
+ wire \cubev_rf1_dout0[1] ;
+ wire \cubev_rf1_dout0[20] ;
+ wire \cubev_rf1_dout0[21] ;
+ wire \cubev_rf1_dout0[22] ;
+ wire \cubev_rf1_dout0[23] ;
+ wire \cubev_rf1_dout0[24] ;
+ wire \cubev_rf1_dout0[25] ;
+ wire \cubev_rf1_dout0[26] ;
+ wire \cubev_rf1_dout0[27] ;
+ wire \cubev_rf1_dout0[28] ;
+ wire \cubev_rf1_dout0[29] ;
+ wire \cubev_rf1_dout0[2] ;
+ wire \cubev_rf1_dout0[30] ;
+ wire \cubev_rf1_dout0[31] ;
+ wire \cubev_rf1_dout0[3] ;
+ wire \cubev_rf1_dout0[4] ;
+ wire \cubev_rf1_dout0[5] ;
+ wire \cubev_rf1_dout0[6] ;
+ wire \cubev_rf1_dout0[7] ;
+ wire \cubev_rf1_dout0[8] ;
+ wire \cubev_rf1_dout0[9] ;
+ wire \cubev_rf1_dout1[0] ;
+ wire \cubev_rf1_dout1[10] ;
+ wire \cubev_rf1_dout1[11] ;
+ wire \cubev_rf1_dout1[12] ;
+ wire \cubev_rf1_dout1[13] ;
+ wire \cubev_rf1_dout1[14] ;
+ wire \cubev_rf1_dout1[15] ;
+ wire \cubev_rf1_dout1[16] ;
+ wire \cubev_rf1_dout1[17] ;
+ wire \cubev_rf1_dout1[18] ;
+ wire \cubev_rf1_dout1[19] ;
+ wire \cubev_rf1_dout1[1] ;
+ wire \cubev_rf1_dout1[20] ;
+ wire \cubev_rf1_dout1[21] ;
+ wire \cubev_rf1_dout1[22] ;
+ wire \cubev_rf1_dout1[23] ;
+ wire \cubev_rf1_dout1[24] ;
+ wire \cubev_rf1_dout1[25] ;
+ wire \cubev_rf1_dout1[26] ;
+ wire \cubev_rf1_dout1[27] ;
+ wire \cubev_rf1_dout1[28] ;
+ wire \cubev_rf1_dout1[29] ;
+ wire \cubev_rf1_dout1[2] ;
+ wire \cubev_rf1_dout1[30] ;
+ wire \cubev_rf1_dout1[31] ;
+ wire \cubev_rf1_dout1[3] ;
+ wire \cubev_rf1_dout1[4] ;
+ wire \cubev_rf1_dout1[5] ;
+ wire \cubev_rf1_dout1[6] ;
+ wire \cubev_rf1_dout1[7] ;
+ wire \cubev_rf1_dout1[8] ;
+ wire \cubev_rf1_dout1[9] ;
+ wire \cubev_rf1_dout1_reg[0] ;
+ wire \cubev_rf1_dout1_reg[10] ;
+ wire \cubev_rf1_dout1_reg[11] ;
+ wire \cubev_rf1_dout1_reg[12] ;
+ wire \cubev_rf1_dout1_reg[13] ;
+ wire \cubev_rf1_dout1_reg[14] ;
+ wire \cubev_rf1_dout1_reg[15] ;
+ wire \cubev_rf1_dout1_reg[16] ;
+ wire \cubev_rf1_dout1_reg[17] ;
+ wire \cubev_rf1_dout1_reg[18] ;
+ wire \cubev_rf1_dout1_reg[19] ;
+ wire \cubev_rf1_dout1_reg[1] ;
+ wire \cubev_rf1_dout1_reg[20] ;
+ wire \cubev_rf1_dout1_reg[21] ;
+ wire \cubev_rf1_dout1_reg[22] ;
+ wire \cubev_rf1_dout1_reg[23] ;
+ wire \cubev_rf1_dout1_reg[24] ;
+ wire \cubev_rf1_dout1_reg[25] ;
+ wire \cubev_rf1_dout1_reg[26] ;
+ wire \cubev_rf1_dout1_reg[27] ;
+ wire \cubev_rf1_dout1_reg[28] ;
+ wire \cubev_rf1_dout1_reg[29] ;
+ wire \cubev_rf1_dout1_reg[2] ;
+ wire \cubev_rf1_dout1_reg[30] ;
+ wire \cubev_rf1_dout1_reg[31] ;
+ wire \cubev_rf1_dout1_reg[3] ;
+ wire \cubev_rf1_dout1_reg[4] ;
+ wire \cubev_rf1_dout1_reg[5] ;
+ wire \cubev_rf1_dout1_reg[6] ;
+ wire \cubev_rf1_dout1_reg[7] ;
+ wire \cubev_rf1_dout1_reg[8] ;
+ wire \cubev_rf1_dout1_reg[9] ;
+ wire cubev_rf1_rstn;
+ wire cubev_rf1_web0;
+ wire \cubev_rf1_wmask0[0] ;
+ wire \cubev_rf1_wmask0[1] ;
+ wire \cubev_rf1_wmask0[2] ;
+ wire \cubev_rf1_wmask0[3] ;
+ wire \cubev_rf2_addr0[0] ;
+ wire \cubev_rf2_addr0[1] ;
+ wire \cubev_rf2_addr0[2] ;
+ wire \cubev_rf2_addr0[3] ;
+ wire \cubev_rf2_addr0[4] ;
+ wire \cubev_rf2_addr0[5] ;
+ wire \cubev_rf2_addr0[6] ;
+ wire \cubev_rf2_addr0[7] ;
+ wire \cubev_rf2_addr1[0] ;
+ wire \cubev_rf2_addr1[1] ;
+ wire \cubev_rf2_addr1[2] ;
+ wire \cubev_rf2_addr1[3] ;
+ wire \cubev_rf2_addr1[4] ;
+ wire \cubev_rf2_addr1[5] ;
+ wire \cubev_rf2_addr1[6] ;
+ wire \cubev_rf2_addr1[7] ;
+ wire cubev_rf2_clk0;
+ wire cubev_rf2_clk1;
+ wire cubev_rf2_csb0;
+ wire cubev_rf2_csb1;
+ wire \cubev_rf2_din0[0] ;
+ wire \cubev_rf2_din0[10] ;
+ wire \cubev_rf2_din0[11] ;
+ wire \cubev_rf2_din0[12] ;
+ wire \cubev_rf2_din0[13] ;
+ wire \cubev_rf2_din0[14] ;
+ wire \cubev_rf2_din0[15] ;
+ wire \cubev_rf2_din0[16] ;
+ wire \cubev_rf2_din0[17] ;
+ wire \cubev_rf2_din0[18] ;
+ wire \cubev_rf2_din0[19] ;
+ wire \cubev_rf2_din0[1] ;
+ wire \cubev_rf2_din0[20] ;
+ wire \cubev_rf2_din0[21] ;
+ wire \cubev_rf2_din0[22] ;
+ wire \cubev_rf2_din0[23] ;
+ wire \cubev_rf2_din0[24] ;
+ wire \cubev_rf2_din0[25] ;
+ wire \cubev_rf2_din0[26] ;
+ wire \cubev_rf2_din0[27] ;
+ wire \cubev_rf2_din0[28] ;
+ wire \cubev_rf2_din0[29] ;
+ wire \cubev_rf2_din0[2] ;
+ wire \cubev_rf2_din0[30] ;
+ wire \cubev_rf2_din0[31] ;
+ wire \cubev_rf2_din0[3] ;
+ wire \cubev_rf2_din0[4] ;
+ wire \cubev_rf2_din0[5] ;
+ wire \cubev_rf2_din0[6] ;
+ wire \cubev_rf2_din0[7] ;
+ wire \cubev_rf2_din0[8] ;
+ wire \cubev_rf2_din0[9] ;
+ wire \cubev_rf2_dout0[0] ;
+ wire \cubev_rf2_dout0[10] ;
+ wire \cubev_rf2_dout0[11] ;
+ wire \cubev_rf2_dout0[12] ;
+ wire \cubev_rf2_dout0[13] ;
+ wire \cubev_rf2_dout0[14] ;
+ wire \cubev_rf2_dout0[15] ;
+ wire \cubev_rf2_dout0[16] ;
+ wire \cubev_rf2_dout0[17] ;
+ wire \cubev_rf2_dout0[18] ;
+ wire \cubev_rf2_dout0[19] ;
+ wire \cubev_rf2_dout0[1] ;
+ wire \cubev_rf2_dout0[20] ;
+ wire \cubev_rf2_dout0[21] ;
+ wire \cubev_rf2_dout0[22] ;
+ wire \cubev_rf2_dout0[23] ;
+ wire \cubev_rf2_dout0[24] ;
+ wire \cubev_rf2_dout0[25] ;
+ wire \cubev_rf2_dout0[26] ;
+ wire \cubev_rf2_dout0[27] ;
+ wire \cubev_rf2_dout0[28] ;
+ wire \cubev_rf2_dout0[29] ;
+ wire \cubev_rf2_dout0[2] ;
+ wire \cubev_rf2_dout0[30] ;
+ wire \cubev_rf2_dout0[31] ;
+ wire \cubev_rf2_dout0[3] ;
+ wire \cubev_rf2_dout0[4] ;
+ wire \cubev_rf2_dout0[5] ;
+ wire \cubev_rf2_dout0[6] ;
+ wire \cubev_rf2_dout0[7] ;
+ wire \cubev_rf2_dout0[8] ;
+ wire \cubev_rf2_dout0[9] ;
+ wire \cubev_rf2_dout1[0] ;
+ wire \cubev_rf2_dout1[10] ;
+ wire \cubev_rf2_dout1[11] ;
+ wire \cubev_rf2_dout1[12] ;
+ wire \cubev_rf2_dout1[13] ;
+ wire \cubev_rf2_dout1[14] ;
+ wire \cubev_rf2_dout1[15] ;
+ wire \cubev_rf2_dout1[16] ;
+ wire \cubev_rf2_dout1[17] ;
+ wire \cubev_rf2_dout1[18] ;
+ wire \cubev_rf2_dout1[19] ;
+ wire \cubev_rf2_dout1[1] ;
+ wire \cubev_rf2_dout1[20] ;
+ wire \cubev_rf2_dout1[21] ;
+ wire \cubev_rf2_dout1[22] ;
+ wire \cubev_rf2_dout1[23] ;
+ wire \cubev_rf2_dout1[24] ;
+ wire \cubev_rf2_dout1[25] ;
+ wire \cubev_rf2_dout1[26] ;
+ wire \cubev_rf2_dout1[27] ;
+ wire \cubev_rf2_dout1[28] ;
+ wire \cubev_rf2_dout1[29] ;
+ wire \cubev_rf2_dout1[2] ;
+ wire \cubev_rf2_dout1[30] ;
+ wire \cubev_rf2_dout1[31] ;
+ wire \cubev_rf2_dout1[3] ;
+ wire \cubev_rf2_dout1[4] ;
+ wire \cubev_rf2_dout1[5] ;
+ wire \cubev_rf2_dout1[6] ;
+ wire \cubev_rf2_dout1[7] ;
+ wire \cubev_rf2_dout1[8] ;
+ wire \cubev_rf2_dout1[9] ;
+ wire \cubev_rf2_dout1_reg[0] ;
+ wire \cubev_rf2_dout1_reg[10] ;
+ wire \cubev_rf2_dout1_reg[11] ;
+ wire \cubev_rf2_dout1_reg[12] ;
+ wire \cubev_rf2_dout1_reg[13] ;
+ wire \cubev_rf2_dout1_reg[14] ;
+ wire \cubev_rf2_dout1_reg[15] ;
+ wire \cubev_rf2_dout1_reg[16] ;
+ wire \cubev_rf2_dout1_reg[17] ;
+ wire \cubev_rf2_dout1_reg[18] ;
+ wire \cubev_rf2_dout1_reg[19] ;
+ wire \cubev_rf2_dout1_reg[1] ;
+ wire \cubev_rf2_dout1_reg[20] ;
+ wire \cubev_rf2_dout1_reg[21] ;
+ wire \cubev_rf2_dout1_reg[22] ;
+ wire \cubev_rf2_dout1_reg[23] ;
+ wire \cubev_rf2_dout1_reg[24] ;
+ wire \cubev_rf2_dout1_reg[25] ;
+ wire \cubev_rf2_dout1_reg[26] ;
+ wire \cubev_rf2_dout1_reg[27] ;
+ wire \cubev_rf2_dout1_reg[28] ;
+ wire \cubev_rf2_dout1_reg[29] ;
+ wire \cubev_rf2_dout1_reg[2] ;
+ wire \cubev_rf2_dout1_reg[30] ;
+ wire \cubev_rf2_dout1_reg[31] ;
+ wire \cubev_rf2_dout1_reg[3] ;
+ wire \cubev_rf2_dout1_reg[4] ;
+ wire \cubev_rf2_dout1_reg[5] ;
+ wire \cubev_rf2_dout1_reg[6] ;
+ wire \cubev_rf2_dout1_reg[7] ;
+ wire \cubev_rf2_dout1_reg[8] ;
+ wire \cubev_rf2_dout1_reg[9] ;
+ wire cubev_rf2_rstn;
+ wire cubev_rf2_web0;
+ wire \cubev_rf2_wmask0[0] ;
+ wire \cubev_rf2_wmask0[1] ;
+ wire \cubev_rf2_wmask0[2] ;
+ wire \cubev_rf2_wmask0[3] ;
+ wire rstn_reg;
+
+ cawb cai (.ca_dbus_ack(ca_dbus_ack),
+    .ca_dbus_com(ca_dbus_com),
+    .ca_dbus_valid(ca_dbus_valid),
+    .ca_match_ack(ca_match_ack),
+    .ca_match_valid(ca_match_valid),
+    .ca_time_ack(ca_time_ack),
+    .ca_time_valid(ca_time_valid),
+    .cubev_ca_clk0(cubev_ca_clk0),
+    .cubev_ca_clk1(cubev_ca_clk1),
+    .cubev_ca_csb0(cubev_ca_csb0),
+    .cubev_ca_csb1(cubev_ca_csb1),
+    .cubev_ca_web0(cubev_ca_web0),
+    .cubev_phi_clk0(cubev_phi_clk0),
+    .cubev_phi_csb0(cubev_phi_csb0),
+    .cubev_phi_web0(cubev_phi_web0),
+    .cubev_pli_clk0(cubev_pli_clk0),
+    .cubev_pli_csb0(cubev_pli_csb0),
+    .cubev_pli_web0(cubev_pli_web0),
+    .rstn_reg(rstn_reg),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .wb_clk_i(wb_clk_i),
+    .wb_rst_i(wb_rst_i),
+    .wbs_ack_o(wbs_ack_o),
+    .wbs_cyc_i(wbs_cyc_i),
+    .wbs_stb_i(wbs_stb_i),
+    .wbs_we_i(wbs_we_i),
+    .ca_command({\ca_command[31] ,
+    \ca_command[30] ,
+    \ca_command[29] ,
+    \ca_command[28] ,
+    \ca_command[27] ,
+    \ca_command[26] ,
+    \ca_command[25] ,
+    \ca_command[24] ,
+    \ca_command[23] ,
+    \ca_command[22] ,
+    \ca_command[21] ,
+    \ca_command[20] ,
+    \ca_command[19] ,
+    \ca_command[18] ,
+    \ca_command[17] ,
+    \ca_command[16] ,
+    \ca_command[15] ,
+    \ca_command[14] ,
+    \ca_command[13] ,
+    \ca_command[12] ,
+    \ca_command[11] ,
+    \ca_command[10] ,
+    \ca_command[9] ,
+    \ca_command[8] ,
+    \ca_command[7] ,
+    \ca_command[6] ,
+    \ca_command[5] ,
+    \ca_command[4] ,
+    \ca_command[3] ,
+    \ca_command[2] ,
+    \ca_command[1] ,
+    \ca_command[0] }),
+    .ca_dbus_data({\ca_dbus_data[31] ,
+    \ca_dbus_data[30] ,
+    \ca_dbus_data[29] ,
+    \ca_dbus_data[28] ,
+    \ca_dbus_data[27] ,
+    \ca_dbus_data[26] ,
+    \ca_dbus_data[25] ,
+    \ca_dbus_data[24] ,
+    \ca_dbus_data[23] ,
+    \ca_dbus_data[22] ,
+    \ca_dbus_data[21] ,
+    \ca_dbus_data[20] ,
+    \ca_dbus_data[19] ,
+    \ca_dbus_data[18] ,
+    \ca_dbus_data[17] ,
+    \ca_dbus_data[16] ,
+    \ca_dbus_data[15] ,
+    \ca_dbus_data[14] ,
+    \ca_dbus_data[13] ,
+    \ca_dbus_data[12] ,
+    \ca_dbus_data[11] ,
+    \ca_dbus_data[10] ,
+    \ca_dbus_data[9] ,
+    \ca_dbus_data[8] ,
+    \ca_dbus_data[7] ,
+    \ca_dbus_data[6] ,
+    \ca_dbus_data[5] ,
+    \ca_dbus_data[4] ,
+    \ca_dbus_data[3] ,
+    \ca_dbus_data[2] ,
+    \ca_dbus_data[1] ,
+    \ca_dbus_data[0] }),
+    .ca_dbus_tid({\ca_dbus_tid[2] ,
+    \ca_dbus_tid[1] ,
+    \ca_dbus_tid[0] }),
+    .ca_time_data({\ca_time_data[22] ,
+    \ca_time_data[21] ,
+    \ca_time_data[20] ,
+    \ca_time_data[19] ,
+    \ca_time_data[18] ,
+    \ca_time_data[17] ,
+    \ca_time_data[16] ,
+    \ca_time_data[15] ,
+    \ca_time_data[14] ,
+    \ca_time_data[13] ,
+    \ca_time_data[12] ,
+    \ca_time_data[11] ,
+    \ca_time_data[10] ,
+    \ca_time_data[9] ,
+    \ca_time_data[8] ,
+    \ca_time_data[7] ,
+    \ca_time_data[6] ,
+    \ca_time_data[5] ,
+    \ca_time_data[4] ,
+    \ca_time_data[3] ,
+    \ca_time_data[2] ,
+    \ca_time_data[1] ,
+    \ca_time_data[0] }),
+    .cubev_ca_addr0({\cubev_ca_addr0[7] ,
+    \cubev_ca_addr0[6] ,
+    \cubev_ca_addr0[5] ,
+    \cubev_ca_addr0[4] ,
+    \cubev_ca_addr0[3] ,
+    \cubev_ca_addr0[2] ,
+    \cubev_ca_addr0[1] ,
+    \cubev_ca_addr0[0] }),
+    .cubev_ca_addr1({\cubev_ca_addr1[7] ,
+    \cubev_ca_addr1[6] ,
+    \cubev_ca_addr1[5] ,
+    \cubev_ca_addr1[4] ,
+    \cubev_ca_addr1[3] ,
+    \cubev_ca_addr1[2] ,
+    \cubev_ca_addr1[1] ,
+    \cubev_ca_addr1[0] }),
+    .cubev_ca_din0({\cubev_ca_din0[31] ,
+    \cubev_ca_din0[30] ,
+    \cubev_ca_din0[29] ,
+    \cubev_ca_din0[28] ,
+    \cubev_ca_din0[27] ,
+    \cubev_ca_din0[26] ,
+    \cubev_ca_din0[25] ,
+    \cubev_ca_din0[24] ,
+    \cubev_ca_din0[23] ,
+    \cubev_ca_din0[22] ,
+    \cubev_ca_din0[21] ,
+    \cubev_ca_din0[20] ,
+    \cubev_ca_din0[19] ,
+    \cubev_ca_din0[18] ,
+    \cubev_ca_din0[17] ,
+    \cubev_ca_din0[16] ,
+    \cubev_ca_din0[15] ,
+    \cubev_ca_din0[14] ,
+    \cubev_ca_din0[13] ,
+    \cubev_ca_din0[12] ,
+    \cubev_ca_din0[11] ,
+    \cubev_ca_din0[10] ,
+    \cubev_ca_din0[9] ,
+    \cubev_ca_din0[8] ,
+    \cubev_ca_din0[7] ,
+    \cubev_ca_din0[6] ,
+    \cubev_ca_din0[5] ,
+    \cubev_ca_din0[4] ,
+    \cubev_ca_din0[3] ,
+    \cubev_ca_din0[2] ,
+    \cubev_ca_din0[1] ,
+    \cubev_ca_din0[0] }),
+    .cubev_ca_dout0({\cubev_ca_dout0[31] ,
+    \cubev_ca_dout0[30] ,
+    \cubev_ca_dout0[29] ,
+    \cubev_ca_dout0[28] ,
+    \cubev_ca_dout0[27] ,
+    \cubev_ca_dout0[26] ,
+    \cubev_ca_dout0[25] ,
+    \cubev_ca_dout0[24] ,
+    \cubev_ca_dout0[23] ,
+    \cubev_ca_dout0[22] ,
+    \cubev_ca_dout0[21] ,
+    \cubev_ca_dout0[20] ,
+    \cubev_ca_dout0[19] ,
+    \cubev_ca_dout0[18] ,
+    \cubev_ca_dout0[17] ,
+    \cubev_ca_dout0[16] ,
+    \cubev_ca_dout0[15] ,
+    \cubev_ca_dout0[14] ,
+    \cubev_ca_dout0[13] ,
+    \cubev_ca_dout0[12] ,
+    \cubev_ca_dout0[11] ,
+    \cubev_ca_dout0[10] ,
+    \cubev_ca_dout0[9] ,
+    \cubev_ca_dout0[8] ,
+    \cubev_ca_dout0[7] ,
+    \cubev_ca_dout0[6] ,
+    \cubev_ca_dout0[5] ,
+    \cubev_ca_dout0[4] ,
+    \cubev_ca_dout0[3] ,
+    \cubev_ca_dout0[2] ,
+    \cubev_ca_dout0[1] ,
+    \cubev_ca_dout0[0] }),
+    .cubev_ca_dout1({\cubev_ca_dout1[31] ,
+    \cubev_ca_dout1[30] ,
+    \cubev_ca_dout1[29] ,
+    \cubev_ca_dout1[28] ,
+    \cubev_ca_dout1[27] ,
+    \cubev_ca_dout1[26] ,
+    \cubev_ca_dout1[25] ,
+    \cubev_ca_dout1[24] ,
+    \cubev_ca_dout1[23] ,
+    \cubev_ca_dout1[22] ,
+    \cubev_ca_dout1[21] ,
+    \cubev_ca_dout1[20] ,
+    \cubev_ca_dout1[19] ,
+    \cubev_ca_dout1[18] ,
+    \cubev_ca_dout1[17] ,
+    \cubev_ca_dout1[16] ,
+    \cubev_ca_dout1[15] ,
+    \cubev_ca_dout1[14] ,
+    \cubev_ca_dout1[13] ,
+    \cubev_ca_dout1[12] ,
+    \cubev_ca_dout1[11] ,
+    \cubev_ca_dout1[10] ,
+    \cubev_ca_dout1[9] ,
+    \cubev_ca_dout1[8] ,
+    \cubev_ca_dout1[7] ,
+    \cubev_ca_dout1[6] ,
+    \cubev_ca_dout1[5] ,
+    \cubev_ca_dout1[4] ,
+    \cubev_ca_dout1[3] ,
+    \cubev_ca_dout1[2] ,
+    \cubev_ca_dout1[1] ,
+    \cubev_ca_dout1[0] }),
+    .cubev_ca_wmask0({\cubev_ca_wmask0[3] ,
+    \cubev_ca_wmask0[2] ,
+    \cubev_ca_wmask0[1] ,
+    \cubev_ca_wmask0[0] }),
+    .cubev_phi_addr0({\cubev_phi_addr0[7] ,
+    \cubev_phi_addr0[6] ,
+    \cubev_phi_addr0[5] ,
+    \cubev_phi_addr0[4] ,
+    \cubev_phi_addr0[3] ,
+    \cubev_phi_addr0[2] ,
+    \cubev_phi_addr0[1] ,
+    \cubev_phi_addr0[0] }),
+    .cubev_phi_din0({\cubev_phi_din0[31] ,
+    \cubev_phi_din0[30] ,
+    \cubev_phi_din0[29] ,
+    \cubev_phi_din0[28] ,
+    \cubev_phi_din0[27] ,
+    \cubev_phi_din0[26] ,
+    \cubev_phi_din0[25] ,
+    \cubev_phi_din0[24] ,
+    \cubev_phi_din0[23] ,
+    \cubev_phi_din0[22] ,
+    \cubev_phi_din0[21] ,
+    \cubev_phi_din0[20] ,
+    \cubev_phi_din0[19] ,
+    \cubev_phi_din0[18] ,
+    \cubev_phi_din0[17] ,
+    \cubev_phi_din0[16] ,
+    \cubev_phi_din0[15] ,
+    \cubev_phi_din0[14] ,
+    \cubev_phi_din0[13] ,
+    \cubev_phi_din0[12] ,
+    \cubev_phi_din0[11] ,
+    \cubev_phi_din0[10] ,
+    \cubev_phi_din0[9] ,
+    \cubev_phi_din0[8] ,
+    \cubev_phi_din0[7] ,
+    \cubev_phi_din0[6] ,
+    \cubev_phi_din0[5] ,
+    \cubev_phi_din0[4] ,
+    \cubev_phi_din0[3] ,
+    \cubev_phi_din0[2] ,
+    \cubev_phi_din0[1] ,
+    \cubev_phi_din0[0] }),
+    .cubev_phi_dout0({\cubev_phi_dout0[31] ,
+    \cubev_phi_dout0[30] ,
+    \cubev_phi_dout0[29] ,
+    \cubev_phi_dout0[28] ,
+    \cubev_phi_dout0[27] ,
+    \cubev_phi_dout0[26] ,
+    \cubev_phi_dout0[25] ,
+    \cubev_phi_dout0[24] ,
+    \cubev_phi_dout0[23] ,
+    \cubev_phi_dout0[22] ,
+    \cubev_phi_dout0[21] ,
+    \cubev_phi_dout0[20] ,
+    \cubev_phi_dout0[19] ,
+    \cubev_phi_dout0[18] ,
+    \cubev_phi_dout0[17] ,
+    \cubev_phi_dout0[16] ,
+    \cubev_phi_dout0[15] ,
+    \cubev_phi_dout0[14] ,
+    \cubev_phi_dout0[13] ,
+    \cubev_phi_dout0[12] ,
+    \cubev_phi_dout0[11] ,
+    \cubev_phi_dout0[10] ,
+    \cubev_phi_dout0[9] ,
+    \cubev_phi_dout0[8] ,
+    \cubev_phi_dout0[7] ,
+    \cubev_phi_dout0[6] ,
+    \cubev_phi_dout0[5] ,
+    \cubev_phi_dout0[4] ,
+    \cubev_phi_dout0[3] ,
+    \cubev_phi_dout0[2] ,
+    \cubev_phi_dout0[1] ,
+    \cubev_phi_dout0[0] }),
+    .cubev_phi_wmask0({\cubev_phi_wmask0[3] ,
+    \cubev_phi_wmask0[2] ,
+    \cubev_phi_wmask0[1] ,
+    \cubev_phi_wmask0[0] }),
+    .cubev_pli_addr0({\cubev_pli_addr0[7] ,
+    \cubev_pli_addr0[6] ,
+    \cubev_pli_addr0[5] ,
+    \cubev_pli_addr0[4] ,
+    \cubev_pli_addr0[3] ,
+    \cubev_pli_addr0[2] ,
+    \cubev_pli_addr0[1] ,
+    \cubev_pli_addr0[0] }),
+    .cubev_pli_din0({\cubev_pli_din0[31] ,
+    \cubev_pli_din0[30] ,
+    \cubev_pli_din0[29] ,
+    \cubev_pli_din0[28] ,
+    \cubev_pli_din0[27] ,
+    \cubev_pli_din0[26] ,
+    \cubev_pli_din0[25] ,
+    \cubev_pli_din0[24] ,
+    \cubev_pli_din0[23] ,
+    \cubev_pli_din0[22] ,
+    \cubev_pli_din0[21] ,
+    \cubev_pli_din0[20] ,
+    \cubev_pli_din0[19] ,
+    \cubev_pli_din0[18] ,
+    \cubev_pli_din0[17] ,
+    \cubev_pli_din0[16] ,
+    \cubev_pli_din0[15] ,
+    \cubev_pli_din0[14] ,
+    \cubev_pli_din0[13] ,
+    \cubev_pli_din0[12] ,
+    \cubev_pli_din0[11] ,
+    \cubev_pli_din0[10] ,
+    \cubev_pli_din0[9] ,
+    \cubev_pli_din0[8] ,
+    \cubev_pli_din0[7] ,
+    \cubev_pli_din0[6] ,
+    \cubev_pli_din0[5] ,
+    \cubev_pli_din0[4] ,
+    \cubev_pli_din0[3] ,
+    \cubev_pli_din0[2] ,
+    \cubev_pli_din0[1] ,
+    \cubev_pli_din0[0] }),
+    .cubev_pli_dout0({\cubev_pli_dout0[31] ,
+    \cubev_pli_dout0[30] ,
+    \cubev_pli_dout0[29] ,
+    \cubev_pli_dout0[28] ,
+    \cubev_pli_dout0[27] ,
+    \cubev_pli_dout0[26] ,
+    \cubev_pli_dout0[25] ,
+    \cubev_pli_dout0[24] ,
+    \cubev_pli_dout0[23] ,
+    \cubev_pli_dout0[22] ,
+    \cubev_pli_dout0[21] ,
+    \cubev_pli_dout0[20] ,
+    \cubev_pli_dout0[19] ,
+    \cubev_pli_dout0[18] ,
+    \cubev_pli_dout0[17] ,
+    \cubev_pli_dout0[16] ,
+    \cubev_pli_dout0[15] ,
+    \cubev_pli_dout0[14] ,
+    \cubev_pli_dout0[13] ,
+    \cubev_pli_dout0[12] ,
+    \cubev_pli_dout0[11] ,
+    \cubev_pli_dout0[10] ,
+    \cubev_pli_dout0[9] ,
+    \cubev_pli_dout0[8] ,
+    \cubev_pli_dout0[7] ,
+    \cubev_pli_dout0[6] ,
+    \cubev_pli_dout0[5] ,
+    \cubev_pli_dout0[4] ,
+    \cubev_pli_dout0[3] ,
+    \cubev_pli_dout0[2] ,
+    \cubev_pli_dout0[1] ,
+    \cubev_pli_dout0[0] }),
+    .cubev_pli_wmask0({\cubev_pli_wmask0[3] ,
+    \cubev_pli_wmask0[2] ,
+    \cubev_pli_wmask0[1] ,
+    \cubev_pli_wmask0[0] }),
+    .irq({user_irq[2],
+    user_irq[1],
+    user_irq[0]}),
+    .la_data_in({la_data_in[127],
+    la_data_in[126],
+    la_data_in[125],
+    la_data_in[124],
+    la_data_in[123],
+    la_data_in[122],
+    la_data_in[121],
+    la_data_in[120],
+    la_data_in[119],
+    la_data_in[118],
+    la_data_in[117],
+    la_data_in[116],
+    la_data_in[115],
+    la_data_in[114],
+    la_data_in[113],
+    la_data_in[112],
+    la_data_in[111],
+    la_data_in[110],
+    la_data_in[109],
+    la_data_in[108],
+    la_data_in[107],
+    la_data_in[106],
+    la_data_in[105],
+    la_data_in[104],
+    la_data_in[103],
+    la_data_in[102],
+    la_data_in[101],
+    la_data_in[100],
+    la_data_in[99],
+    la_data_in[98],
+    la_data_in[97],
+    la_data_in[96],
+    la_data_in[95],
+    la_data_in[94],
+    la_data_in[93],
+    la_data_in[92],
+    la_data_in[91],
+    la_data_in[90],
+    la_data_in[89],
+    la_data_in[88],
+    la_data_in[87],
+    la_data_in[86],
+    la_data_in[85],
+    la_data_in[84],
+    la_data_in[83],
+    la_data_in[82],
+    la_data_in[81],
+    la_data_in[80],
+    la_data_in[79],
+    la_data_in[78],
+    la_data_in[77],
+    la_data_in[76],
+    la_data_in[75],
+    la_data_in[74],
+    la_data_in[73],
+    la_data_in[72],
+    la_data_in[71],
+    la_data_in[70],
+    la_data_in[69],
+    la_data_in[68],
+    la_data_in[67],
+    la_data_in[66],
+    la_data_in[65],
+    la_data_in[64],
+    la_data_in[63],
+    la_data_in[62],
+    la_data_in[61],
+    la_data_in[60],
+    la_data_in[59],
+    la_data_in[58],
+    la_data_in[57],
+    la_data_in[56],
+    la_data_in[55],
+    la_data_in[54],
+    la_data_in[53],
+    la_data_in[52],
+    la_data_in[51],
+    la_data_in[50],
+    la_data_in[49],
+    la_data_in[48],
+    la_data_in[47],
+    la_data_in[46],
+    la_data_in[45],
+    la_data_in[44],
+    la_data_in[43],
+    la_data_in[42],
+    la_data_in[41],
+    la_data_in[40],
+    la_data_in[39],
+    la_data_in[38],
+    la_data_in[37],
+    la_data_in[36],
+    la_data_in[35],
+    la_data_in[34],
+    la_data_in[33],
+    la_data_in[32],
+    la_data_in[31],
+    la_data_in[30],
+    la_data_in[29],
+    la_data_in[28],
+    la_data_in[27],
+    la_data_in[26],
+    la_data_in[25],
+    la_data_in[24],
+    la_data_in[23],
+    la_data_in[22],
+    la_data_in[21],
+    la_data_in[20],
+    la_data_in[19],
+    la_data_in[18],
+    la_data_in[17],
+    la_data_in[16],
+    la_data_in[15],
+    la_data_in[14],
+    la_data_in[13],
+    la_data_in[12],
+    la_data_in[11],
+    la_data_in[10],
+    la_data_in[9],
+    la_data_in[8],
+    la_data_in[7],
+    la_data_in[6],
+    la_data_in[5],
+    la_data_in[4],
+    la_data_in[3],
+    la_data_in[2],
+    la_data_in[1],
+    la_data_in[0]}),
+    .la_data_out({la_data_out[127],
+    la_data_out[126],
+    la_data_out[125],
+    la_data_out[124],
+    la_data_out[123],
+    la_data_out[122],
+    la_data_out[121],
+    la_data_out[120],
+    la_data_out[119],
+    la_data_out[118],
+    la_data_out[117],
+    la_data_out[116],
+    la_data_out[115],
+    la_data_out[114],
+    la_data_out[113],
+    la_data_out[112],
+    la_data_out[111],
+    la_data_out[110],
+    la_data_out[109],
+    la_data_out[108],
+    la_data_out[107],
+    la_data_out[106],
+    la_data_out[105],
+    la_data_out[104],
+    la_data_out[103],
+    la_data_out[102],
+    la_data_out[101],
+    la_data_out[100],
+    la_data_out[99],
+    la_data_out[98],
+    la_data_out[97],
+    la_data_out[96],
+    la_data_out[95],
+    la_data_out[94],
+    la_data_out[93],
+    la_data_out[92],
+    la_data_out[91],
+    la_data_out[90],
+    la_data_out[89],
+    la_data_out[88],
+    la_data_out[87],
+    la_data_out[86],
+    la_data_out[85],
+    la_data_out[84],
+    la_data_out[83],
+    la_data_out[82],
+    la_data_out[81],
+    la_data_out[80],
+    la_data_out[79],
+    la_data_out[78],
+    la_data_out[77],
+    la_data_out[76],
+    la_data_out[75],
+    la_data_out[74],
+    la_data_out[73],
+    la_data_out[72],
+    la_data_out[71],
+    la_data_out[70],
+    la_data_out[69],
+    la_data_out[68],
+    la_data_out[67],
+    la_data_out[66],
+    la_data_out[65],
+    la_data_out[64],
+    la_data_out[63],
+    la_data_out[62],
+    la_data_out[61],
+    la_data_out[60],
+    la_data_out[59],
+    la_data_out[58],
+    la_data_out[57],
+    la_data_out[56],
+    la_data_out[55],
+    la_data_out[54],
+    la_data_out[53],
+    la_data_out[52],
+    la_data_out[51],
+    la_data_out[50],
+    la_data_out[49],
+    la_data_out[48],
+    la_data_out[47],
+    la_data_out[46],
+    la_data_out[45],
+    la_data_out[44],
+    la_data_out[43],
+    la_data_out[42],
+    la_data_out[41],
+    la_data_out[40],
+    la_data_out[39],
+    la_data_out[38],
+    la_data_out[37],
+    la_data_out[36],
+    la_data_out[35],
+    la_data_out[34],
+    la_data_out[33],
+    la_data_out[32],
+    la_data_out[31],
+    la_data_out[30],
+    la_data_out[29],
+    la_data_out[28],
+    la_data_out[27],
+    la_data_out[26],
+    la_data_out[25],
+    la_data_out[24],
+    la_data_out[23],
+    la_data_out[22],
+    la_data_out[21],
+    la_data_out[20],
+    la_data_out[19],
+    la_data_out[18],
+    la_data_out[17],
+    la_data_out[16],
+    la_data_out[15],
+    la_data_out[14],
+    la_data_out[13],
+    la_data_out[12],
+    la_data_out[11],
+    la_data_out[10],
+    la_data_out[9],
+    la_data_out[8],
+    la_data_out[7],
+    la_data_out[6],
+    la_data_out[5],
+    la_data_out[4],
+    la_data_out[3],
+    la_data_out[2],
+    la_data_out[1],
+    la_data_out[0]}),
+    .la_oenb({la_oenb[127],
+    la_oenb[126],
+    la_oenb[125],
+    la_oenb[124],
+    la_oenb[123],
+    la_oenb[122],
+    la_oenb[121],
+    la_oenb[120],
+    la_oenb[119],
+    la_oenb[118],
+    la_oenb[117],
+    la_oenb[116],
+    la_oenb[115],
+    la_oenb[114],
+    la_oenb[113],
+    la_oenb[112],
+    la_oenb[111],
+    la_oenb[110],
+    la_oenb[109],
+    la_oenb[108],
+    la_oenb[107],
+    la_oenb[106],
+    la_oenb[105],
+    la_oenb[104],
+    la_oenb[103],
+    la_oenb[102],
+    la_oenb[101],
+    la_oenb[100],
+    la_oenb[99],
+    la_oenb[98],
+    la_oenb[97],
+    la_oenb[96],
+    la_oenb[95],
+    la_oenb[94],
+    la_oenb[93],
+    la_oenb[92],
+    la_oenb[91],
+    la_oenb[90],
+    la_oenb[89],
+    la_oenb[88],
+    la_oenb[87],
+    la_oenb[86],
+    la_oenb[85],
+    la_oenb[84],
+    la_oenb[83],
+    la_oenb[82],
+    la_oenb[81],
+    la_oenb[80],
+    la_oenb[79],
+    la_oenb[78],
+    la_oenb[77],
+    la_oenb[76],
+    la_oenb[75],
+    la_oenb[74],
+    la_oenb[73],
+    la_oenb[72],
+    la_oenb[71],
+    la_oenb[70],
+    la_oenb[69],
+    la_oenb[68],
+    la_oenb[67],
+    la_oenb[66],
+    la_oenb[65],
+    la_oenb[64],
+    la_oenb[63],
+    la_oenb[62],
+    la_oenb[61],
+    la_oenb[60],
+    la_oenb[59],
+    la_oenb[58],
+    la_oenb[57],
+    la_oenb[56],
+    la_oenb[55],
+    la_oenb[54],
+    la_oenb[53],
+    la_oenb[52],
+    la_oenb[51],
+    la_oenb[50],
+    la_oenb[49],
+    la_oenb[48],
+    la_oenb[47],
+    la_oenb[46],
+    la_oenb[45],
+    la_oenb[44],
+    la_oenb[43],
+    la_oenb[42],
+    la_oenb[41],
+    la_oenb[40],
+    la_oenb[39],
+    la_oenb[38],
+    la_oenb[37],
+    la_oenb[36],
+    la_oenb[35],
+    la_oenb[34],
+    la_oenb[33],
+    la_oenb[32],
+    la_oenb[31],
+    la_oenb[30],
+    la_oenb[29],
+    la_oenb[28],
+    la_oenb[27],
+    la_oenb[26],
+    la_oenb[25],
+    la_oenb[24],
+    la_oenb[23],
+    la_oenb[22],
+    la_oenb[21],
+    la_oenb[20],
+    la_oenb[19],
+    la_oenb[18],
+    la_oenb[17],
+    la_oenb[16],
+    la_oenb[15],
+    la_oenb[14],
+    la_oenb[13],
+    la_oenb[12],
+    la_oenb[11],
+    la_oenb[10],
+    la_oenb[9],
+    la_oenb[8],
+    la_oenb[7],
+    la_oenb[6],
+    la_oenb[5],
+    la_oenb[4],
+    la_oenb[3],
+    la_oenb[2],
+    la_oenb[1],
+    la_oenb[0]}),
+    .wbs_adr_i({wbs_adr_i[31],
+    wbs_adr_i[30],
+    wbs_adr_i[29],
+    wbs_adr_i[28],
+    wbs_adr_i[27],
+    wbs_adr_i[26],
+    wbs_adr_i[25],
+    wbs_adr_i[24],
+    wbs_adr_i[23],
+    wbs_adr_i[22],
+    wbs_adr_i[21],
+    wbs_adr_i[20],
+    wbs_adr_i[19],
+    wbs_adr_i[18],
+    wbs_adr_i[17],
+    wbs_adr_i[16],
+    wbs_adr_i[15],
+    wbs_adr_i[14],
+    wbs_adr_i[13],
+    wbs_adr_i[12],
+    wbs_adr_i[11],
+    wbs_adr_i[10],
+    wbs_adr_i[9],
+    wbs_adr_i[8],
+    wbs_adr_i[7],
+    wbs_adr_i[6],
+    wbs_adr_i[5],
+    wbs_adr_i[4],
+    wbs_adr_i[3],
+    wbs_adr_i[2],
+    wbs_adr_i[1],
+    wbs_adr_i[0]}),
+    .wbs_dat_i({wbs_dat_i[31],
+    wbs_dat_i[30],
+    wbs_dat_i[29],
+    wbs_dat_i[28],
+    wbs_dat_i[27],
+    wbs_dat_i[26],
+    wbs_dat_i[25],
+    wbs_dat_i[24],
+    wbs_dat_i[23],
+    wbs_dat_i[22],
+    wbs_dat_i[21],
+    wbs_dat_i[20],
+    wbs_dat_i[19],
+    wbs_dat_i[18],
+    wbs_dat_i[17],
+    wbs_dat_i[16],
+    wbs_dat_i[15],
+    wbs_dat_i[14],
+    wbs_dat_i[13],
+    wbs_dat_i[12],
+    wbs_dat_i[11],
+    wbs_dat_i[10],
+    wbs_dat_i[9],
+    wbs_dat_i[8],
+    wbs_dat_i[7],
+    wbs_dat_i[6],
+    wbs_dat_i[5],
+    wbs_dat_i[4],
+    wbs_dat_i[3],
+    wbs_dat_i[2],
+    wbs_dat_i[1],
+    wbs_dat_i[0]}),
+    .wbs_dat_o({wbs_dat_o[31],
+    wbs_dat_o[30],
+    wbs_dat_o[29],
+    wbs_dat_o[28],
+    wbs_dat_o[27],
+    wbs_dat_o[26],
+    wbs_dat_o[25],
+    wbs_dat_o[24],
+    wbs_dat_o[23],
+    wbs_dat_o[22],
+    wbs_dat_o[21],
+    wbs_dat_o[20],
+    wbs_dat_o[19],
+    wbs_dat_o[18],
+    wbs_dat_o[17],
+    wbs_dat_o[16],
+    wbs_dat_o[15],
+    wbs_dat_o[14],
+    wbs_dat_o[13],
+    wbs_dat_o[12],
+    wbs_dat_o[11],
+    wbs_dat_o[10],
+    wbs_dat_o[9],
+    wbs_dat_o[8],
+    wbs_dat_o[7],
+    wbs_dat_o[6],
+    wbs_dat_o[5],
+    wbs_dat_o[4],
+    wbs_dat_o[3],
+    wbs_dat_o[2],
+    wbs_dat_o[1],
+    wbs_dat_o[0]}),
+    .wbs_sel_i({wbs_sel_i[3],
+    wbs_sel_i[2],
+    wbs_sel_i[1],
+    wbs_sel_i[0]}));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_cai (.csb0(cubev_ca_csb0),
+    .csb1(cubev_ca_csb1),
+    .web0(cubev_ca_web0),
+    .clk0(cubev_ca_clk0),
+    .clk1(cubev_ca_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_ca_addr0[7] ,
+    \cubev_ca_addr0[6] ,
+    \cubev_ca_addr0[5] ,
+    \cubev_ca_addr0[4] ,
+    \cubev_ca_addr0[3] ,
+    \cubev_ca_addr0[2] ,
+    \cubev_ca_addr0[1] ,
+    \cubev_ca_addr0[0] }),
+    .addr1({\cubev_ca_addr1[7] ,
+    \cubev_ca_addr1[6] ,
+    \cubev_ca_addr1[5] ,
+    \cubev_ca_addr1[4] ,
+    \cubev_ca_addr1[3] ,
+    \cubev_ca_addr1[2] ,
+    \cubev_ca_addr1[1] ,
+    \cubev_ca_addr1[0] }),
+    .din0({\cubev_ca_din0[31] ,
+    \cubev_ca_din0[30] ,
+    \cubev_ca_din0[29] ,
+    \cubev_ca_din0[28] ,
+    \cubev_ca_din0[27] ,
+    \cubev_ca_din0[26] ,
+    \cubev_ca_din0[25] ,
+    \cubev_ca_din0[24] ,
+    \cubev_ca_din0[23] ,
+    \cubev_ca_din0[22] ,
+    \cubev_ca_din0[21] ,
+    \cubev_ca_din0[20] ,
+    \cubev_ca_din0[19] ,
+    \cubev_ca_din0[18] ,
+    \cubev_ca_din0[17] ,
+    \cubev_ca_din0[16] ,
+    \cubev_ca_din0[15] ,
+    \cubev_ca_din0[14] ,
+    \cubev_ca_din0[13] ,
+    \cubev_ca_din0[12] ,
+    \cubev_ca_din0[11] ,
+    \cubev_ca_din0[10] ,
+    \cubev_ca_din0[9] ,
+    \cubev_ca_din0[8] ,
+    \cubev_ca_din0[7] ,
+    \cubev_ca_din0[6] ,
+    \cubev_ca_din0[5] ,
+    \cubev_ca_din0[4] ,
+    \cubev_ca_din0[3] ,
+    \cubev_ca_din0[2] ,
+    \cubev_ca_din0[1] ,
+    \cubev_ca_din0[0] }),
+    .dout0({\cubev_ca_dout0[31] ,
+    \cubev_ca_dout0[30] ,
+    \cubev_ca_dout0[29] ,
+    \cubev_ca_dout0[28] ,
+    \cubev_ca_dout0[27] ,
+    \cubev_ca_dout0[26] ,
+    \cubev_ca_dout0[25] ,
+    \cubev_ca_dout0[24] ,
+    \cubev_ca_dout0[23] ,
+    \cubev_ca_dout0[22] ,
+    \cubev_ca_dout0[21] ,
+    \cubev_ca_dout0[20] ,
+    \cubev_ca_dout0[19] ,
+    \cubev_ca_dout0[18] ,
+    \cubev_ca_dout0[17] ,
+    \cubev_ca_dout0[16] ,
+    \cubev_ca_dout0[15] ,
+    \cubev_ca_dout0[14] ,
+    \cubev_ca_dout0[13] ,
+    \cubev_ca_dout0[12] ,
+    \cubev_ca_dout0[11] ,
+    \cubev_ca_dout0[10] ,
+    \cubev_ca_dout0[9] ,
+    \cubev_ca_dout0[8] ,
+    \cubev_ca_dout0[7] ,
+    \cubev_ca_dout0[6] ,
+    \cubev_ca_dout0[5] ,
+    \cubev_ca_dout0[4] ,
+    \cubev_ca_dout0[3] ,
+    \cubev_ca_dout0[2] ,
+    \cubev_ca_dout0[1] ,
+    \cubev_ca_dout0[0] }),
+    .dout1({\cubev_ca_dout1[31] ,
+    \cubev_ca_dout1[30] ,
+    \cubev_ca_dout1[29] ,
+    \cubev_ca_dout1[28] ,
+    \cubev_ca_dout1[27] ,
+    \cubev_ca_dout1[26] ,
+    \cubev_ca_dout1[25] ,
+    \cubev_ca_dout1[24] ,
+    \cubev_ca_dout1[23] ,
+    \cubev_ca_dout1[22] ,
+    \cubev_ca_dout1[21] ,
+    \cubev_ca_dout1[20] ,
+    \cubev_ca_dout1[19] ,
+    \cubev_ca_dout1[18] ,
+    \cubev_ca_dout1[17] ,
+    \cubev_ca_dout1[16] ,
+    \cubev_ca_dout1[15] ,
+    \cubev_ca_dout1[14] ,
+    \cubev_ca_dout1[13] ,
+    \cubev_ca_dout1[12] ,
+    \cubev_ca_dout1[11] ,
+    \cubev_ca_dout1[10] ,
+    \cubev_ca_dout1[9] ,
+    \cubev_ca_dout1[8] ,
+    \cubev_ca_dout1[7] ,
+    \cubev_ca_dout1[6] ,
+    \cubev_ca_dout1[5] ,
+    \cubev_ca_dout1[4] ,
+    \cubev_ca_dout1[3] ,
+    \cubev_ca_dout1[2] ,
+    \cubev_ca_dout1[1] ,
+    \cubev_ca_dout1[0] }),
+    .wmask0({\cubev_ca_wmask0[3] ,
+    \cubev_ca_wmask0[2] ,
+    \cubev_ca_wmask0[1] ,
+    \cubev_ca_wmask0[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_dhi (.csb0(cubev_dhi_csb0),
+    .csb1(cubev_dhi_csb1),
+    .web0(cubev_dhi_web0),
+    .clk0(cubev_dhi_clk0),
+    .clk1(cubev_dhi_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_dhi_addr0[7] ,
+    \cubev_dhi_addr0[6] ,
+    \cubev_dhi_addr0[5] ,
+    \cubev_dhi_addr0[4] ,
+    \cubev_dhi_addr0[3] ,
+    \cubev_dhi_addr0[2] ,
+    \cubev_dhi_addr0[1] ,
+    \cubev_dhi_addr0[0] }),
+    .addr1({\cubev_dhi_addr1[7] ,
+    \cubev_dhi_addr1[6] ,
+    \cubev_dhi_addr1[5] ,
+    \cubev_dhi_addr1[4] ,
+    \cubev_dhi_addr1[3] ,
+    \cubev_dhi_addr1[2] ,
+    \cubev_dhi_addr1[1] ,
+    \cubev_dhi_addr1[0] }),
+    .din0({\cubev_dhi_din0[31] ,
+    \cubev_dhi_din0[30] ,
+    \cubev_dhi_din0[29] ,
+    \cubev_dhi_din0[28] ,
+    \cubev_dhi_din0[27] ,
+    \cubev_dhi_din0[26] ,
+    \cubev_dhi_din0[25] ,
+    \cubev_dhi_din0[24] ,
+    \cubev_dhi_din0[23] ,
+    \cubev_dhi_din0[22] ,
+    \cubev_dhi_din0[21] ,
+    \cubev_dhi_din0[20] ,
+    \cubev_dhi_din0[19] ,
+    \cubev_dhi_din0[18] ,
+    \cubev_dhi_din0[17] ,
+    \cubev_dhi_din0[16] ,
+    \cubev_dhi_din0[15] ,
+    \cubev_dhi_din0[14] ,
+    \cubev_dhi_din0[13] ,
+    \cubev_dhi_din0[12] ,
+    \cubev_dhi_din0[11] ,
+    \cubev_dhi_din0[10] ,
+    \cubev_dhi_din0[9] ,
+    \cubev_dhi_din0[8] ,
+    \cubev_dhi_din0[7] ,
+    \cubev_dhi_din0[6] ,
+    \cubev_dhi_din0[5] ,
+    \cubev_dhi_din0[4] ,
+    \cubev_dhi_din0[3] ,
+    \cubev_dhi_din0[2] ,
+    \cubev_dhi_din0[1] ,
+    \cubev_dhi_din0[0] }),
+    .dout0({\cubev_dhi_dout0[31] ,
+    \cubev_dhi_dout0[30] ,
+    \cubev_dhi_dout0[29] ,
+    \cubev_dhi_dout0[28] ,
+    \cubev_dhi_dout0[27] ,
+    \cubev_dhi_dout0[26] ,
+    \cubev_dhi_dout0[25] ,
+    \cubev_dhi_dout0[24] ,
+    \cubev_dhi_dout0[23] ,
+    \cubev_dhi_dout0[22] ,
+    \cubev_dhi_dout0[21] ,
+    \cubev_dhi_dout0[20] ,
+    \cubev_dhi_dout0[19] ,
+    \cubev_dhi_dout0[18] ,
+    \cubev_dhi_dout0[17] ,
+    \cubev_dhi_dout0[16] ,
+    \cubev_dhi_dout0[15] ,
+    \cubev_dhi_dout0[14] ,
+    \cubev_dhi_dout0[13] ,
+    \cubev_dhi_dout0[12] ,
+    \cubev_dhi_dout0[11] ,
+    \cubev_dhi_dout0[10] ,
+    \cubev_dhi_dout0[9] ,
+    \cubev_dhi_dout0[8] ,
+    \cubev_dhi_dout0[7] ,
+    \cubev_dhi_dout0[6] ,
+    \cubev_dhi_dout0[5] ,
+    \cubev_dhi_dout0[4] ,
+    \cubev_dhi_dout0[3] ,
+    \cubev_dhi_dout0[2] ,
+    \cubev_dhi_dout0[1] ,
+    \cubev_dhi_dout0[0] }),
+    .dout1({\cubev_dhi_dout1[31] ,
+    \cubev_dhi_dout1[30] ,
+    \cubev_dhi_dout1[29] ,
+    \cubev_dhi_dout1[28] ,
+    \cubev_dhi_dout1[27] ,
+    \cubev_dhi_dout1[26] ,
+    \cubev_dhi_dout1[25] ,
+    \cubev_dhi_dout1[24] ,
+    \cubev_dhi_dout1[23] ,
+    \cubev_dhi_dout1[22] ,
+    \cubev_dhi_dout1[21] ,
+    \cubev_dhi_dout1[20] ,
+    \cubev_dhi_dout1[19] ,
+    \cubev_dhi_dout1[18] ,
+    \cubev_dhi_dout1[17] ,
+    \cubev_dhi_dout1[16] ,
+    \cubev_dhi_dout1[15] ,
+    \cubev_dhi_dout1[14] ,
+    \cubev_dhi_dout1[13] ,
+    \cubev_dhi_dout1[12] ,
+    \cubev_dhi_dout1[11] ,
+    \cubev_dhi_dout1[10] ,
+    \cubev_dhi_dout1[9] ,
+    \cubev_dhi_dout1[8] ,
+    \cubev_dhi_dout1[7] ,
+    \cubev_dhi_dout1[6] ,
+    \cubev_dhi_dout1[5] ,
+    \cubev_dhi_dout1[4] ,
+    \cubev_dhi_dout1[3] ,
+    \cubev_dhi_dout1[2] ,
+    \cubev_dhi_dout1[1] ,
+    \cubev_dhi_dout1[0] }),
+    .wmask0({\cubev_dhi_wmask0[3] ,
+    \cubev_dhi_wmask0[2] ,
+    \cubev_dhi_wmask0[1] ,
+    \cubev_dhi_wmask0[0] }));
+ rb cubev_dhi_rb (.clk(cubev_dhi_clk1),
+    .rstn(cubev_dhi_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_dhi_dout1[31] ,
+    \cubev_dhi_dout1[30] ,
+    \cubev_dhi_dout1[29] ,
+    \cubev_dhi_dout1[28] ,
+    \cubev_dhi_dout1[27] ,
+    \cubev_dhi_dout1[26] ,
+    \cubev_dhi_dout1[25] ,
+    \cubev_dhi_dout1[24] ,
+    \cubev_dhi_dout1[23] ,
+    \cubev_dhi_dout1[22] ,
+    \cubev_dhi_dout1[21] ,
+    \cubev_dhi_dout1[20] ,
+    \cubev_dhi_dout1[19] ,
+    \cubev_dhi_dout1[18] ,
+    \cubev_dhi_dout1[17] ,
+    \cubev_dhi_dout1[16] ,
+    \cubev_dhi_dout1[15] ,
+    \cubev_dhi_dout1[14] ,
+    \cubev_dhi_dout1[13] ,
+    \cubev_dhi_dout1[12] ,
+    \cubev_dhi_dout1[11] ,
+    \cubev_dhi_dout1[10] ,
+    \cubev_dhi_dout1[9] ,
+    \cubev_dhi_dout1[8] ,
+    \cubev_dhi_dout1[7] ,
+    \cubev_dhi_dout1[6] ,
+    \cubev_dhi_dout1[5] ,
+    \cubev_dhi_dout1[4] ,
+    \cubev_dhi_dout1[3] ,
+    \cubev_dhi_dout1[2] ,
+    \cubev_dhi_dout1[1] ,
+    \cubev_dhi_dout1[0] }),
+    .dato({\cubev_dhi_dout1_reg[31] ,
+    \cubev_dhi_dout1_reg[30] ,
+    \cubev_dhi_dout1_reg[29] ,
+    \cubev_dhi_dout1_reg[28] ,
+    \cubev_dhi_dout1_reg[27] ,
+    \cubev_dhi_dout1_reg[26] ,
+    \cubev_dhi_dout1_reg[25] ,
+    \cubev_dhi_dout1_reg[24] ,
+    \cubev_dhi_dout1_reg[23] ,
+    \cubev_dhi_dout1_reg[22] ,
+    \cubev_dhi_dout1_reg[21] ,
+    \cubev_dhi_dout1_reg[20] ,
+    \cubev_dhi_dout1_reg[19] ,
+    \cubev_dhi_dout1_reg[18] ,
+    \cubev_dhi_dout1_reg[17] ,
+    \cubev_dhi_dout1_reg[16] ,
+    \cubev_dhi_dout1_reg[15] ,
+    \cubev_dhi_dout1_reg[14] ,
+    \cubev_dhi_dout1_reg[13] ,
+    \cubev_dhi_dout1_reg[12] ,
+    \cubev_dhi_dout1_reg[11] ,
+    \cubev_dhi_dout1_reg[10] ,
+    \cubev_dhi_dout1_reg[9] ,
+    \cubev_dhi_dout1_reg[8] ,
+    \cubev_dhi_dout1_reg[7] ,
+    \cubev_dhi_dout1_reg[6] ,
+    \cubev_dhi_dout1_reg[5] ,
+    \cubev_dhi_dout1_reg[4] ,
+    \cubev_dhi_dout1_reg[3] ,
+    \cubev_dhi_dout1_reg[2] ,
+    \cubev_dhi_dout1_reg[1] ,
+    \cubev_dhi_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_dli (.csb0(cubev_dli_csb0),
+    .csb1(cubev_dli_csb1),
+    .web0(cubev_dli_web0),
+    .clk0(cubev_dli_clk0),
+    .clk1(cubev_dli_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_dli_addr0[7] ,
+    \cubev_dli_addr0[6] ,
+    \cubev_dli_addr0[5] ,
+    \cubev_dli_addr0[4] ,
+    \cubev_dli_addr0[3] ,
+    \cubev_dli_addr0[2] ,
+    \cubev_dli_addr0[1] ,
+    \cubev_dli_addr0[0] }),
+    .addr1({\cubev_dli_addr1[7] ,
+    \cubev_dli_addr1[6] ,
+    \cubev_dli_addr1[5] ,
+    \cubev_dli_addr1[4] ,
+    \cubev_dli_addr1[3] ,
+    \cubev_dli_addr1[2] ,
+    \cubev_dli_addr1[1] ,
+    \cubev_dli_addr1[0] }),
+    .din0({\cubev_dli_din0[31] ,
+    \cubev_dli_din0[30] ,
+    \cubev_dli_din0[29] ,
+    \cubev_dli_din0[28] ,
+    \cubev_dli_din0[27] ,
+    \cubev_dli_din0[26] ,
+    \cubev_dli_din0[25] ,
+    \cubev_dli_din0[24] ,
+    \cubev_dli_din0[23] ,
+    \cubev_dli_din0[22] ,
+    \cubev_dli_din0[21] ,
+    \cubev_dli_din0[20] ,
+    \cubev_dli_din0[19] ,
+    \cubev_dli_din0[18] ,
+    \cubev_dli_din0[17] ,
+    \cubev_dli_din0[16] ,
+    \cubev_dli_din0[15] ,
+    \cubev_dli_din0[14] ,
+    \cubev_dli_din0[13] ,
+    \cubev_dli_din0[12] ,
+    \cubev_dli_din0[11] ,
+    \cubev_dli_din0[10] ,
+    \cubev_dli_din0[9] ,
+    \cubev_dli_din0[8] ,
+    \cubev_dli_din0[7] ,
+    \cubev_dli_din0[6] ,
+    \cubev_dli_din0[5] ,
+    \cubev_dli_din0[4] ,
+    \cubev_dli_din0[3] ,
+    \cubev_dli_din0[2] ,
+    \cubev_dli_din0[1] ,
+    \cubev_dli_din0[0] }),
+    .dout0({\cubev_dli_dout0[31] ,
+    \cubev_dli_dout0[30] ,
+    \cubev_dli_dout0[29] ,
+    \cubev_dli_dout0[28] ,
+    \cubev_dli_dout0[27] ,
+    \cubev_dli_dout0[26] ,
+    \cubev_dli_dout0[25] ,
+    \cubev_dli_dout0[24] ,
+    \cubev_dli_dout0[23] ,
+    \cubev_dli_dout0[22] ,
+    \cubev_dli_dout0[21] ,
+    \cubev_dli_dout0[20] ,
+    \cubev_dli_dout0[19] ,
+    \cubev_dli_dout0[18] ,
+    \cubev_dli_dout0[17] ,
+    \cubev_dli_dout0[16] ,
+    \cubev_dli_dout0[15] ,
+    \cubev_dli_dout0[14] ,
+    \cubev_dli_dout0[13] ,
+    \cubev_dli_dout0[12] ,
+    \cubev_dli_dout0[11] ,
+    \cubev_dli_dout0[10] ,
+    \cubev_dli_dout0[9] ,
+    \cubev_dli_dout0[8] ,
+    \cubev_dli_dout0[7] ,
+    \cubev_dli_dout0[6] ,
+    \cubev_dli_dout0[5] ,
+    \cubev_dli_dout0[4] ,
+    \cubev_dli_dout0[3] ,
+    \cubev_dli_dout0[2] ,
+    \cubev_dli_dout0[1] ,
+    \cubev_dli_dout0[0] }),
+    .dout1({\cubev_dli_dout1[31] ,
+    \cubev_dli_dout1[30] ,
+    \cubev_dli_dout1[29] ,
+    \cubev_dli_dout1[28] ,
+    \cubev_dli_dout1[27] ,
+    \cubev_dli_dout1[26] ,
+    \cubev_dli_dout1[25] ,
+    \cubev_dli_dout1[24] ,
+    \cubev_dli_dout1[23] ,
+    \cubev_dli_dout1[22] ,
+    \cubev_dli_dout1[21] ,
+    \cubev_dli_dout1[20] ,
+    \cubev_dli_dout1[19] ,
+    \cubev_dli_dout1[18] ,
+    \cubev_dli_dout1[17] ,
+    \cubev_dli_dout1[16] ,
+    \cubev_dli_dout1[15] ,
+    \cubev_dli_dout1[14] ,
+    \cubev_dli_dout1[13] ,
+    \cubev_dli_dout1[12] ,
+    \cubev_dli_dout1[11] ,
+    \cubev_dli_dout1[10] ,
+    \cubev_dli_dout1[9] ,
+    \cubev_dli_dout1[8] ,
+    \cubev_dli_dout1[7] ,
+    \cubev_dli_dout1[6] ,
+    \cubev_dli_dout1[5] ,
+    \cubev_dli_dout1[4] ,
+    \cubev_dli_dout1[3] ,
+    \cubev_dli_dout1[2] ,
+    \cubev_dli_dout1[1] ,
+    \cubev_dli_dout1[0] }),
+    .wmask0({\cubev_dli_wmask0[3] ,
+    \cubev_dli_wmask0[2] ,
+    \cubev_dli_wmask0[1] ,
+    \cubev_dli_wmask0[0] }));
+ rb cubev_dli_rb (.clk(cubev_dli_clk1),
+    .rstn(cubev_dli_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_dli_dout1[31] ,
+    \cubev_dli_dout1[30] ,
+    \cubev_dli_dout1[29] ,
+    \cubev_dli_dout1[28] ,
+    \cubev_dli_dout1[27] ,
+    \cubev_dli_dout1[26] ,
+    \cubev_dli_dout1[25] ,
+    \cubev_dli_dout1[24] ,
+    \cubev_dli_dout1[23] ,
+    \cubev_dli_dout1[22] ,
+    \cubev_dli_dout1[21] ,
+    \cubev_dli_dout1[20] ,
+    \cubev_dli_dout1[19] ,
+    \cubev_dli_dout1[18] ,
+    \cubev_dli_dout1[17] ,
+    \cubev_dli_dout1[16] ,
+    \cubev_dli_dout1[15] ,
+    \cubev_dli_dout1[14] ,
+    \cubev_dli_dout1[13] ,
+    \cubev_dli_dout1[12] ,
+    \cubev_dli_dout1[11] ,
+    \cubev_dli_dout1[10] ,
+    \cubev_dli_dout1[9] ,
+    \cubev_dli_dout1[8] ,
+    \cubev_dli_dout1[7] ,
+    \cubev_dli_dout1[6] ,
+    \cubev_dli_dout1[5] ,
+    \cubev_dli_dout1[4] ,
+    \cubev_dli_dout1[3] ,
+    \cubev_dli_dout1[2] ,
+    \cubev_dli_dout1[1] ,
+    \cubev_dli_dout1[0] }),
+    .dato({\cubev_dli_dout1_reg[31] ,
+    \cubev_dli_dout1_reg[30] ,
+    \cubev_dli_dout1_reg[29] ,
+    \cubev_dli_dout1_reg[28] ,
+    \cubev_dli_dout1_reg[27] ,
+    \cubev_dli_dout1_reg[26] ,
+    \cubev_dli_dout1_reg[25] ,
+    \cubev_dli_dout1_reg[24] ,
+    \cubev_dli_dout1_reg[23] ,
+    \cubev_dli_dout1_reg[22] ,
+    \cubev_dli_dout1_reg[21] ,
+    \cubev_dli_dout1_reg[20] ,
+    \cubev_dli_dout1_reg[19] ,
+    \cubev_dli_dout1_reg[18] ,
+    \cubev_dli_dout1_reg[17] ,
+    \cubev_dli_dout1_reg[16] ,
+    \cubev_dli_dout1_reg[15] ,
+    \cubev_dli_dout1_reg[14] ,
+    \cubev_dli_dout1_reg[13] ,
+    \cubev_dli_dout1_reg[12] ,
+    \cubev_dli_dout1_reg[11] ,
+    \cubev_dli_dout1_reg[10] ,
+    \cubev_dli_dout1_reg[9] ,
+    \cubev_dli_dout1_reg[8] ,
+    \cubev_dli_dout1_reg[7] ,
+    \cubev_dli_dout1_reg[6] ,
+    \cubev_dli_dout1_reg[5] ,
+    \cubev_dli_dout1_reg[4] ,
+    \cubev_dli_dout1_reg[3] ,
+    \cubev_dli_dout1_reg[2] ,
+    \cubev_dli_dout1_reg[1] ,
+    \cubev_dli_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_phi (.csb0(cubev_phi_csb0),
+    .csb1(cubev_phi_csb1),
+    .web0(cubev_phi_web0),
+    .clk0(cubev_phi_clk0),
+    .clk1(cubev_phi_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_phi_addr0[7] ,
+    \cubev_phi_addr0[6] ,
+    \cubev_phi_addr0[5] ,
+    \cubev_phi_addr0[4] ,
+    \cubev_phi_addr0[3] ,
+    \cubev_phi_addr0[2] ,
+    \cubev_phi_addr0[1] ,
+    \cubev_phi_addr0[0] }),
+    .addr1({\cubev_phi_addr1[7] ,
+    \cubev_phi_addr1[6] ,
+    \cubev_phi_addr1[5] ,
+    \cubev_phi_addr1[4] ,
+    \cubev_phi_addr1[3] ,
+    \cubev_phi_addr1[2] ,
+    \cubev_phi_addr1[1] ,
+    \cubev_phi_addr1[0] }),
+    .din0({\cubev_phi_din0[31] ,
+    \cubev_phi_din0[30] ,
+    \cubev_phi_din0[29] ,
+    \cubev_phi_din0[28] ,
+    \cubev_phi_din0[27] ,
+    \cubev_phi_din0[26] ,
+    \cubev_phi_din0[25] ,
+    \cubev_phi_din0[24] ,
+    \cubev_phi_din0[23] ,
+    \cubev_phi_din0[22] ,
+    \cubev_phi_din0[21] ,
+    \cubev_phi_din0[20] ,
+    \cubev_phi_din0[19] ,
+    \cubev_phi_din0[18] ,
+    \cubev_phi_din0[17] ,
+    \cubev_phi_din0[16] ,
+    \cubev_phi_din0[15] ,
+    \cubev_phi_din0[14] ,
+    \cubev_phi_din0[13] ,
+    \cubev_phi_din0[12] ,
+    \cubev_phi_din0[11] ,
+    \cubev_phi_din0[10] ,
+    \cubev_phi_din0[9] ,
+    \cubev_phi_din0[8] ,
+    \cubev_phi_din0[7] ,
+    \cubev_phi_din0[6] ,
+    \cubev_phi_din0[5] ,
+    \cubev_phi_din0[4] ,
+    \cubev_phi_din0[3] ,
+    \cubev_phi_din0[2] ,
+    \cubev_phi_din0[1] ,
+    \cubev_phi_din0[0] }),
+    .dout0({\cubev_phi_dout0[31] ,
+    \cubev_phi_dout0[30] ,
+    \cubev_phi_dout0[29] ,
+    \cubev_phi_dout0[28] ,
+    \cubev_phi_dout0[27] ,
+    \cubev_phi_dout0[26] ,
+    \cubev_phi_dout0[25] ,
+    \cubev_phi_dout0[24] ,
+    \cubev_phi_dout0[23] ,
+    \cubev_phi_dout0[22] ,
+    \cubev_phi_dout0[21] ,
+    \cubev_phi_dout0[20] ,
+    \cubev_phi_dout0[19] ,
+    \cubev_phi_dout0[18] ,
+    \cubev_phi_dout0[17] ,
+    \cubev_phi_dout0[16] ,
+    \cubev_phi_dout0[15] ,
+    \cubev_phi_dout0[14] ,
+    \cubev_phi_dout0[13] ,
+    \cubev_phi_dout0[12] ,
+    \cubev_phi_dout0[11] ,
+    \cubev_phi_dout0[10] ,
+    \cubev_phi_dout0[9] ,
+    \cubev_phi_dout0[8] ,
+    \cubev_phi_dout0[7] ,
+    \cubev_phi_dout0[6] ,
+    \cubev_phi_dout0[5] ,
+    \cubev_phi_dout0[4] ,
+    \cubev_phi_dout0[3] ,
+    \cubev_phi_dout0[2] ,
+    \cubev_phi_dout0[1] ,
+    \cubev_phi_dout0[0] }),
+    .dout1({\cubev_phi_dout1[31] ,
+    \cubev_phi_dout1[30] ,
+    \cubev_phi_dout1[29] ,
+    \cubev_phi_dout1[28] ,
+    \cubev_phi_dout1[27] ,
+    \cubev_phi_dout1[26] ,
+    \cubev_phi_dout1[25] ,
+    \cubev_phi_dout1[24] ,
+    \cubev_phi_dout1[23] ,
+    \cubev_phi_dout1[22] ,
+    \cubev_phi_dout1[21] ,
+    \cubev_phi_dout1[20] ,
+    \cubev_phi_dout1[19] ,
+    \cubev_phi_dout1[18] ,
+    \cubev_phi_dout1[17] ,
+    \cubev_phi_dout1[16] ,
+    \cubev_phi_dout1[15] ,
+    \cubev_phi_dout1[14] ,
+    \cubev_phi_dout1[13] ,
+    \cubev_phi_dout1[12] ,
+    \cubev_phi_dout1[11] ,
+    \cubev_phi_dout1[10] ,
+    \cubev_phi_dout1[9] ,
+    \cubev_phi_dout1[8] ,
+    \cubev_phi_dout1[7] ,
+    \cubev_phi_dout1[6] ,
+    \cubev_phi_dout1[5] ,
+    \cubev_phi_dout1[4] ,
+    \cubev_phi_dout1[3] ,
+    \cubev_phi_dout1[2] ,
+    \cubev_phi_dout1[1] ,
+    \cubev_phi_dout1[0] }),
+    .wmask0({\cubev_phi_wmask0[3] ,
+    \cubev_phi_wmask0[2] ,
+    \cubev_phi_wmask0[1] ,
+    \cubev_phi_wmask0[0] }));
+ rb cubev_phi_rb (.clk(cubev_phi_clk1),
+    .rstn(cubev_phi_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_phi_dout1[31] ,
+    \cubev_phi_dout1[30] ,
+    \cubev_phi_dout1[29] ,
+    \cubev_phi_dout1[28] ,
+    \cubev_phi_dout1[27] ,
+    \cubev_phi_dout1[26] ,
+    \cubev_phi_dout1[25] ,
+    \cubev_phi_dout1[24] ,
+    \cubev_phi_dout1[23] ,
+    \cubev_phi_dout1[22] ,
+    \cubev_phi_dout1[21] ,
+    \cubev_phi_dout1[20] ,
+    \cubev_phi_dout1[19] ,
+    \cubev_phi_dout1[18] ,
+    \cubev_phi_dout1[17] ,
+    \cubev_phi_dout1[16] ,
+    \cubev_phi_dout1[15] ,
+    \cubev_phi_dout1[14] ,
+    \cubev_phi_dout1[13] ,
+    \cubev_phi_dout1[12] ,
+    \cubev_phi_dout1[11] ,
+    \cubev_phi_dout1[10] ,
+    \cubev_phi_dout1[9] ,
+    \cubev_phi_dout1[8] ,
+    \cubev_phi_dout1[7] ,
+    \cubev_phi_dout1[6] ,
+    \cubev_phi_dout1[5] ,
+    \cubev_phi_dout1[4] ,
+    \cubev_phi_dout1[3] ,
+    \cubev_phi_dout1[2] ,
+    \cubev_phi_dout1[1] ,
+    \cubev_phi_dout1[0] }),
+    .dato({\cubev_phi_dout1_reg[31] ,
+    \cubev_phi_dout1_reg[30] ,
+    \cubev_phi_dout1_reg[29] ,
+    \cubev_phi_dout1_reg[28] ,
+    \cubev_phi_dout1_reg[27] ,
+    \cubev_phi_dout1_reg[26] ,
+    \cubev_phi_dout1_reg[25] ,
+    \cubev_phi_dout1_reg[24] ,
+    \cubev_phi_dout1_reg[23] ,
+    \cubev_phi_dout1_reg[22] ,
+    \cubev_phi_dout1_reg[21] ,
+    \cubev_phi_dout1_reg[20] ,
+    \cubev_phi_dout1_reg[19] ,
+    \cubev_phi_dout1_reg[18] ,
+    \cubev_phi_dout1_reg[17] ,
+    \cubev_phi_dout1_reg[16] ,
+    \cubev_phi_dout1_reg[15] ,
+    \cubev_phi_dout1_reg[14] ,
+    \cubev_phi_dout1_reg[13] ,
+    \cubev_phi_dout1_reg[12] ,
+    \cubev_phi_dout1_reg[11] ,
+    \cubev_phi_dout1_reg[10] ,
+    \cubev_phi_dout1_reg[9] ,
+    \cubev_phi_dout1_reg[8] ,
+    \cubev_phi_dout1_reg[7] ,
+    \cubev_phi_dout1_reg[6] ,
+    \cubev_phi_dout1_reg[5] ,
+    \cubev_phi_dout1_reg[4] ,
+    \cubev_phi_dout1_reg[3] ,
+    \cubev_phi_dout1_reg[2] ,
+    \cubev_phi_dout1_reg[1] ,
+    \cubev_phi_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_pli (.csb0(cubev_pli_csb0),
+    .csb1(cubev_pli_csb1),
+    .web0(cubev_pli_web0),
+    .clk0(cubev_pli_clk0),
+    .clk1(cubev_pli_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_pli_addr0[7] ,
+    \cubev_pli_addr0[6] ,
+    \cubev_pli_addr0[5] ,
+    \cubev_pli_addr0[4] ,
+    \cubev_pli_addr0[3] ,
+    \cubev_pli_addr0[2] ,
+    \cubev_pli_addr0[1] ,
+    \cubev_pli_addr0[0] }),
+    .addr1({\cubev_pli_addr1[7] ,
+    \cubev_pli_addr1[6] ,
+    \cubev_pli_addr1[5] ,
+    \cubev_pli_addr1[4] ,
+    \cubev_pli_addr1[3] ,
+    \cubev_pli_addr1[2] ,
+    \cubev_pli_addr1[1] ,
+    \cubev_pli_addr1[0] }),
+    .din0({\cubev_pli_din0[31] ,
+    \cubev_pli_din0[30] ,
+    \cubev_pli_din0[29] ,
+    \cubev_pli_din0[28] ,
+    \cubev_pli_din0[27] ,
+    \cubev_pli_din0[26] ,
+    \cubev_pli_din0[25] ,
+    \cubev_pli_din0[24] ,
+    \cubev_pli_din0[23] ,
+    \cubev_pli_din0[22] ,
+    \cubev_pli_din0[21] ,
+    \cubev_pli_din0[20] ,
+    \cubev_pli_din0[19] ,
+    \cubev_pli_din0[18] ,
+    \cubev_pli_din0[17] ,
+    \cubev_pli_din0[16] ,
+    \cubev_pli_din0[15] ,
+    \cubev_pli_din0[14] ,
+    \cubev_pli_din0[13] ,
+    \cubev_pli_din0[12] ,
+    \cubev_pli_din0[11] ,
+    \cubev_pli_din0[10] ,
+    \cubev_pli_din0[9] ,
+    \cubev_pli_din0[8] ,
+    \cubev_pli_din0[7] ,
+    \cubev_pli_din0[6] ,
+    \cubev_pli_din0[5] ,
+    \cubev_pli_din0[4] ,
+    \cubev_pli_din0[3] ,
+    \cubev_pli_din0[2] ,
+    \cubev_pli_din0[1] ,
+    \cubev_pli_din0[0] }),
+    .dout0({\cubev_pli_dout0[31] ,
+    \cubev_pli_dout0[30] ,
+    \cubev_pli_dout0[29] ,
+    \cubev_pli_dout0[28] ,
+    \cubev_pli_dout0[27] ,
+    \cubev_pli_dout0[26] ,
+    \cubev_pli_dout0[25] ,
+    \cubev_pli_dout0[24] ,
+    \cubev_pli_dout0[23] ,
+    \cubev_pli_dout0[22] ,
+    \cubev_pli_dout0[21] ,
+    \cubev_pli_dout0[20] ,
+    \cubev_pli_dout0[19] ,
+    \cubev_pli_dout0[18] ,
+    \cubev_pli_dout0[17] ,
+    \cubev_pli_dout0[16] ,
+    \cubev_pli_dout0[15] ,
+    \cubev_pli_dout0[14] ,
+    \cubev_pli_dout0[13] ,
+    \cubev_pli_dout0[12] ,
+    \cubev_pli_dout0[11] ,
+    \cubev_pli_dout0[10] ,
+    \cubev_pli_dout0[9] ,
+    \cubev_pli_dout0[8] ,
+    \cubev_pli_dout0[7] ,
+    \cubev_pli_dout0[6] ,
+    \cubev_pli_dout0[5] ,
+    \cubev_pli_dout0[4] ,
+    \cubev_pli_dout0[3] ,
+    \cubev_pli_dout0[2] ,
+    \cubev_pli_dout0[1] ,
+    \cubev_pli_dout0[0] }),
+    .dout1({\cubev_pli_dout1[31] ,
+    \cubev_pli_dout1[30] ,
+    \cubev_pli_dout1[29] ,
+    \cubev_pli_dout1[28] ,
+    \cubev_pli_dout1[27] ,
+    \cubev_pli_dout1[26] ,
+    \cubev_pli_dout1[25] ,
+    \cubev_pli_dout1[24] ,
+    \cubev_pli_dout1[23] ,
+    \cubev_pli_dout1[22] ,
+    \cubev_pli_dout1[21] ,
+    \cubev_pli_dout1[20] ,
+    \cubev_pli_dout1[19] ,
+    \cubev_pli_dout1[18] ,
+    \cubev_pli_dout1[17] ,
+    \cubev_pli_dout1[16] ,
+    \cubev_pli_dout1[15] ,
+    \cubev_pli_dout1[14] ,
+    \cubev_pli_dout1[13] ,
+    \cubev_pli_dout1[12] ,
+    \cubev_pli_dout1[11] ,
+    \cubev_pli_dout1[10] ,
+    \cubev_pli_dout1[9] ,
+    \cubev_pli_dout1[8] ,
+    \cubev_pli_dout1[7] ,
+    \cubev_pli_dout1[6] ,
+    \cubev_pli_dout1[5] ,
+    \cubev_pli_dout1[4] ,
+    \cubev_pli_dout1[3] ,
+    \cubev_pli_dout1[2] ,
+    \cubev_pli_dout1[1] ,
+    \cubev_pli_dout1[0] }),
+    .wmask0({\cubev_pli_wmask0[3] ,
+    \cubev_pli_wmask0[2] ,
+    \cubev_pli_wmask0[1] ,
+    \cubev_pli_wmask0[0] }));
+ rb cubev_pli_rb (.clk(cubev_pli_clk1),
+    .rstn(cubev_pli_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_pli_dout1[31] ,
+    \cubev_pli_dout1[30] ,
+    \cubev_pli_dout1[29] ,
+    \cubev_pli_dout1[28] ,
+    \cubev_pli_dout1[27] ,
+    \cubev_pli_dout1[26] ,
+    \cubev_pli_dout1[25] ,
+    \cubev_pli_dout1[24] ,
+    \cubev_pli_dout1[23] ,
+    \cubev_pli_dout1[22] ,
+    \cubev_pli_dout1[21] ,
+    \cubev_pli_dout1[20] ,
+    \cubev_pli_dout1[19] ,
+    \cubev_pli_dout1[18] ,
+    \cubev_pli_dout1[17] ,
+    \cubev_pli_dout1[16] ,
+    \cubev_pli_dout1[15] ,
+    \cubev_pli_dout1[14] ,
+    \cubev_pli_dout1[13] ,
+    \cubev_pli_dout1[12] ,
+    \cubev_pli_dout1[11] ,
+    \cubev_pli_dout1[10] ,
+    \cubev_pli_dout1[9] ,
+    \cubev_pli_dout1[8] ,
+    \cubev_pli_dout1[7] ,
+    \cubev_pli_dout1[6] ,
+    \cubev_pli_dout1[5] ,
+    \cubev_pli_dout1[4] ,
+    \cubev_pli_dout1[3] ,
+    \cubev_pli_dout1[2] ,
+    \cubev_pli_dout1[1] ,
+    \cubev_pli_dout1[0] }),
+    .dato({\cubev_pli_dout1_reg[31] ,
+    \cubev_pli_dout1_reg[30] ,
+    \cubev_pli_dout1_reg[29] ,
+    \cubev_pli_dout1_reg[28] ,
+    \cubev_pli_dout1_reg[27] ,
+    \cubev_pli_dout1_reg[26] ,
+    \cubev_pli_dout1_reg[25] ,
+    \cubev_pli_dout1_reg[24] ,
+    \cubev_pli_dout1_reg[23] ,
+    \cubev_pli_dout1_reg[22] ,
+    \cubev_pli_dout1_reg[21] ,
+    \cubev_pli_dout1_reg[20] ,
+    \cubev_pli_dout1_reg[19] ,
+    \cubev_pli_dout1_reg[18] ,
+    \cubev_pli_dout1_reg[17] ,
+    \cubev_pli_dout1_reg[16] ,
+    \cubev_pli_dout1_reg[15] ,
+    \cubev_pli_dout1_reg[14] ,
+    \cubev_pli_dout1_reg[13] ,
+    \cubev_pli_dout1_reg[12] ,
+    \cubev_pli_dout1_reg[11] ,
+    \cubev_pli_dout1_reg[10] ,
+    \cubev_pli_dout1_reg[9] ,
+    \cubev_pli_dout1_reg[8] ,
+    \cubev_pli_dout1_reg[7] ,
+    \cubev_pli_dout1_reg[6] ,
+    \cubev_pli_dout1_reg[5] ,
+    \cubev_pli_dout1_reg[4] ,
+    \cubev_pli_dout1_reg[3] ,
+    \cubev_pli_dout1_reg[2] ,
+    \cubev_pli_dout1_reg[1] ,
+    \cubev_pli_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_reg_0 (.csb0(cubev_reg_0_csb0),
+    .csb1(cubev_reg_0_csb1),
+    .web0(cubev_reg_0_web0),
+    .clk0(cubev_reg_0_clk0),
+    .clk1(cubev_reg_0_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_reg_0_addr0[7] ,
+    \cubev_reg_0_addr0[6] ,
+    \cubev_reg_0_addr0[5] ,
+    \cubev_reg_0_addr0[4] ,
+    \cubev_reg_0_addr0[3] ,
+    \cubev_reg_0_addr0[2] ,
+    \cubev_reg_0_addr0[1] ,
+    \cubev_reg_0_addr0[0] }),
+    .addr1({\cubev_reg_0_addr1[7] ,
+    \cubev_reg_0_addr1[6] ,
+    \cubev_reg_0_addr1[5] ,
+    \cubev_reg_0_addr1[4] ,
+    \cubev_reg_0_addr1[3] ,
+    \cubev_reg_0_addr1[2] ,
+    \cubev_reg_0_addr1[1] ,
+    \cubev_reg_0_addr1[0] }),
+    .din0({\cubev_reg_0_din0[31] ,
+    \cubev_reg_0_din0[30] ,
+    \cubev_reg_0_din0[29] ,
+    \cubev_reg_0_din0[28] ,
+    \cubev_reg_0_din0[27] ,
+    \cubev_reg_0_din0[26] ,
+    \cubev_reg_0_din0[25] ,
+    \cubev_reg_0_din0[24] ,
+    \cubev_reg_0_din0[23] ,
+    \cubev_reg_0_din0[22] ,
+    \cubev_reg_0_din0[21] ,
+    \cubev_reg_0_din0[20] ,
+    \cubev_reg_0_din0[19] ,
+    \cubev_reg_0_din0[18] ,
+    \cubev_reg_0_din0[17] ,
+    \cubev_reg_0_din0[16] ,
+    \cubev_reg_0_din0[15] ,
+    \cubev_reg_0_din0[14] ,
+    \cubev_reg_0_din0[13] ,
+    \cubev_reg_0_din0[12] ,
+    \cubev_reg_0_din0[11] ,
+    \cubev_reg_0_din0[10] ,
+    \cubev_reg_0_din0[9] ,
+    \cubev_reg_0_din0[8] ,
+    \cubev_reg_0_din0[7] ,
+    \cubev_reg_0_din0[6] ,
+    \cubev_reg_0_din0[5] ,
+    \cubev_reg_0_din0[4] ,
+    \cubev_reg_0_din0[3] ,
+    \cubev_reg_0_din0[2] ,
+    \cubev_reg_0_din0[1] ,
+    \cubev_reg_0_din0[0] }),
+    .dout0({\cubev_reg_0_dout0[31] ,
+    \cubev_reg_0_dout0[30] ,
+    \cubev_reg_0_dout0[29] ,
+    \cubev_reg_0_dout0[28] ,
+    \cubev_reg_0_dout0[27] ,
+    \cubev_reg_0_dout0[26] ,
+    \cubev_reg_0_dout0[25] ,
+    \cubev_reg_0_dout0[24] ,
+    \cubev_reg_0_dout0[23] ,
+    \cubev_reg_0_dout0[22] ,
+    \cubev_reg_0_dout0[21] ,
+    \cubev_reg_0_dout0[20] ,
+    \cubev_reg_0_dout0[19] ,
+    \cubev_reg_0_dout0[18] ,
+    \cubev_reg_0_dout0[17] ,
+    \cubev_reg_0_dout0[16] ,
+    \cubev_reg_0_dout0[15] ,
+    \cubev_reg_0_dout0[14] ,
+    \cubev_reg_0_dout0[13] ,
+    \cubev_reg_0_dout0[12] ,
+    \cubev_reg_0_dout0[11] ,
+    \cubev_reg_0_dout0[10] ,
+    \cubev_reg_0_dout0[9] ,
+    \cubev_reg_0_dout0[8] ,
+    \cubev_reg_0_dout0[7] ,
+    \cubev_reg_0_dout0[6] ,
+    \cubev_reg_0_dout0[5] ,
+    \cubev_reg_0_dout0[4] ,
+    \cubev_reg_0_dout0[3] ,
+    \cubev_reg_0_dout0[2] ,
+    \cubev_reg_0_dout0[1] ,
+    \cubev_reg_0_dout0[0] }),
+    .dout1({\cubev_reg_0_dout1[31] ,
+    \cubev_reg_0_dout1[30] ,
+    \cubev_reg_0_dout1[29] ,
+    \cubev_reg_0_dout1[28] ,
+    \cubev_reg_0_dout1[27] ,
+    \cubev_reg_0_dout1[26] ,
+    \cubev_reg_0_dout1[25] ,
+    \cubev_reg_0_dout1[24] ,
+    \cubev_reg_0_dout1[23] ,
+    \cubev_reg_0_dout1[22] ,
+    \cubev_reg_0_dout1[21] ,
+    \cubev_reg_0_dout1[20] ,
+    \cubev_reg_0_dout1[19] ,
+    \cubev_reg_0_dout1[18] ,
+    \cubev_reg_0_dout1[17] ,
+    \cubev_reg_0_dout1[16] ,
+    \cubev_reg_0_dout1[15] ,
+    \cubev_reg_0_dout1[14] ,
+    \cubev_reg_0_dout1[13] ,
+    \cubev_reg_0_dout1[12] ,
+    \cubev_reg_0_dout1[11] ,
+    \cubev_reg_0_dout1[10] ,
+    \cubev_reg_0_dout1[9] ,
+    \cubev_reg_0_dout1[8] ,
+    \cubev_reg_0_dout1[7] ,
+    \cubev_reg_0_dout1[6] ,
+    \cubev_reg_0_dout1[5] ,
+    \cubev_reg_0_dout1[4] ,
+    \cubev_reg_0_dout1[3] ,
+    \cubev_reg_0_dout1[2] ,
+    \cubev_reg_0_dout1[1] ,
+    \cubev_reg_0_dout1[0] }),
+    .wmask0({\cubev_reg_0_wmask0[3] ,
+    \cubev_reg_0_wmask0[2] ,
+    \cubev_reg_0_wmask0[1] ,
+    \cubev_reg_0_wmask0[0] }));
+ rb cubev_reg_0_rb (.clk(cubev_reg_0_clk1),
+    .rstn(cubev_reg_0_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_reg_0_dout1[31] ,
+    \cubev_reg_0_dout1[30] ,
+    \cubev_reg_0_dout1[29] ,
+    \cubev_reg_0_dout1[28] ,
+    \cubev_reg_0_dout1[27] ,
+    \cubev_reg_0_dout1[26] ,
+    \cubev_reg_0_dout1[25] ,
+    \cubev_reg_0_dout1[24] ,
+    \cubev_reg_0_dout1[23] ,
+    \cubev_reg_0_dout1[22] ,
+    \cubev_reg_0_dout1[21] ,
+    \cubev_reg_0_dout1[20] ,
+    \cubev_reg_0_dout1[19] ,
+    \cubev_reg_0_dout1[18] ,
+    \cubev_reg_0_dout1[17] ,
+    \cubev_reg_0_dout1[16] ,
+    \cubev_reg_0_dout1[15] ,
+    \cubev_reg_0_dout1[14] ,
+    \cubev_reg_0_dout1[13] ,
+    \cubev_reg_0_dout1[12] ,
+    \cubev_reg_0_dout1[11] ,
+    \cubev_reg_0_dout1[10] ,
+    \cubev_reg_0_dout1[9] ,
+    \cubev_reg_0_dout1[8] ,
+    \cubev_reg_0_dout1[7] ,
+    \cubev_reg_0_dout1[6] ,
+    \cubev_reg_0_dout1[5] ,
+    \cubev_reg_0_dout1[4] ,
+    \cubev_reg_0_dout1[3] ,
+    \cubev_reg_0_dout1[2] ,
+    \cubev_reg_0_dout1[1] ,
+    \cubev_reg_0_dout1[0] }),
+    .dato({\cubev_reg_0_dout1_reg[31] ,
+    \cubev_reg_0_dout1_reg[30] ,
+    \cubev_reg_0_dout1_reg[29] ,
+    \cubev_reg_0_dout1_reg[28] ,
+    \cubev_reg_0_dout1_reg[27] ,
+    \cubev_reg_0_dout1_reg[26] ,
+    \cubev_reg_0_dout1_reg[25] ,
+    \cubev_reg_0_dout1_reg[24] ,
+    \cubev_reg_0_dout1_reg[23] ,
+    \cubev_reg_0_dout1_reg[22] ,
+    \cubev_reg_0_dout1_reg[21] ,
+    \cubev_reg_0_dout1_reg[20] ,
+    \cubev_reg_0_dout1_reg[19] ,
+    \cubev_reg_0_dout1_reg[18] ,
+    \cubev_reg_0_dout1_reg[17] ,
+    \cubev_reg_0_dout1_reg[16] ,
+    \cubev_reg_0_dout1_reg[15] ,
+    \cubev_reg_0_dout1_reg[14] ,
+    \cubev_reg_0_dout1_reg[13] ,
+    \cubev_reg_0_dout1_reg[12] ,
+    \cubev_reg_0_dout1_reg[11] ,
+    \cubev_reg_0_dout1_reg[10] ,
+    \cubev_reg_0_dout1_reg[9] ,
+    \cubev_reg_0_dout1_reg[8] ,
+    \cubev_reg_0_dout1_reg[7] ,
+    \cubev_reg_0_dout1_reg[6] ,
+    \cubev_reg_0_dout1_reg[5] ,
+    \cubev_reg_0_dout1_reg[4] ,
+    \cubev_reg_0_dout1_reg[3] ,
+    \cubev_reg_0_dout1_reg[2] ,
+    \cubev_reg_0_dout1_reg[1] ,
+    \cubev_reg_0_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_reg_1 (.csb0(cubev_reg_1_csb0),
+    .csb1(cubev_reg_1_csb1),
+    .web0(cubev_reg_1_web0),
+    .clk0(cubev_reg_1_clk0),
+    .clk1(cubev_reg_1_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_reg_1_addr0[7] ,
+    \cubev_reg_1_addr0[6] ,
+    \cubev_reg_1_addr0[5] ,
+    \cubev_reg_1_addr0[4] ,
+    \cubev_reg_1_addr0[3] ,
+    \cubev_reg_1_addr0[2] ,
+    \cubev_reg_1_addr0[1] ,
+    \cubev_reg_1_addr0[0] }),
+    .addr1({\cubev_reg_1_addr1[7] ,
+    \cubev_reg_1_addr1[6] ,
+    \cubev_reg_1_addr1[5] ,
+    \cubev_reg_1_addr1[4] ,
+    \cubev_reg_1_addr1[3] ,
+    \cubev_reg_1_addr1[2] ,
+    \cubev_reg_1_addr1[1] ,
+    \cubev_reg_1_addr1[0] }),
+    .din0({\cubev_reg_1_din0[31] ,
+    \cubev_reg_1_din0[30] ,
+    \cubev_reg_1_din0[29] ,
+    \cubev_reg_1_din0[28] ,
+    \cubev_reg_1_din0[27] ,
+    \cubev_reg_1_din0[26] ,
+    \cubev_reg_1_din0[25] ,
+    \cubev_reg_1_din0[24] ,
+    \cubev_reg_1_din0[23] ,
+    \cubev_reg_1_din0[22] ,
+    \cubev_reg_1_din0[21] ,
+    \cubev_reg_1_din0[20] ,
+    \cubev_reg_1_din0[19] ,
+    \cubev_reg_1_din0[18] ,
+    \cubev_reg_1_din0[17] ,
+    \cubev_reg_1_din0[16] ,
+    \cubev_reg_1_din0[15] ,
+    \cubev_reg_1_din0[14] ,
+    \cubev_reg_1_din0[13] ,
+    \cubev_reg_1_din0[12] ,
+    \cubev_reg_1_din0[11] ,
+    \cubev_reg_1_din0[10] ,
+    \cubev_reg_1_din0[9] ,
+    \cubev_reg_1_din0[8] ,
+    \cubev_reg_1_din0[7] ,
+    \cubev_reg_1_din0[6] ,
+    \cubev_reg_1_din0[5] ,
+    \cubev_reg_1_din0[4] ,
+    \cubev_reg_1_din0[3] ,
+    \cubev_reg_1_din0[2] ,
+    \cubev_reg_1_din0[1] ,
+    \cubev_reg_1_din0[0] }),
+    .dout0({\cubev_reg_1_dout0[31] ,
+    \cubev_reg_1_dout0[30] ,
+    \cubev_reg_1_dout0[29] ,
+    \cubev_reg_1_dout0[28] ,
+    \cubev_reg_1_dout0[27] ,
+    \cubev_reg_1_dout0[26] ,
+    \cubev_reg_1_dout0[25] ,
+    \cubev_reg_1_dout0[24] ,
+    \cubev_reg_1_dout0[23] ,
+    \cubev_reg_1_dout0[22] ,
+    \cubev_reg_1_dout0[21] ,
+    \cubev_reg_1_dout0[20] ,
+    \cubev_reg_1_dout0[19] ,
+    \cubev_reg_1_dout0[18] ,
+    \cubev_reg_1_dout0[17] ,
+    \cubev_reg_1_dout0[16] ,
+    \cubev_reg_1_dout0[15] ,
+    \cubev_reg_1_dout0[14] ,
+    \cubev_reg_1_dout0[13] ,
+    \cubev_reg_1_dout0[12] ,
+    \cubev_reg_1_dout0[11] ,
+    \cubev_reg_1_dout0[10] ,
+    \cubev_reg_1_dout0[9] ,
+    \cubev_reg_1_dout0[8] ,
+    \cubev_reg_1_dout0[7] ,
+    \cubev_reg_1_dout0[6] ,
+    \cubev_reg_1_dout0[5] ,
+    \cubev_reg_1_dout0[4] ,
+    \cubev_reg_1_dout0[3] ,
+    \cubev_reg_1_dout0[2] ,
+    \cubev_reg_1_dout0[1] ,
+    \cubev_reg_1_dout0[0] }),
+    .dout1({\cubev_reg_1_dout1[31] ,
+    \cubev_reg_1_dout1[30] ,
+    \cubev_reg_1_dout1[29] ,
+    \cubev_reg_1_dout1[28] ,
+    \cubev_reg_1_dout1[27] ,
+    \cubev_reg_1_dout1[26] ,
+    \cubev_reg_1_dout1[25] ,
+    \cubev_reg_1_dout1[24] ,
+    \cubev_reg_1_dout1[23] ,
+    \cubev_reg_1_dout1[22] ,
+    \cubev_reg_1_dout1[21] ,
+    \cubev_reg_1_dout1[20] ,
+    \cubev_reg_1_dout1[19] ,
+    \cubev_reg_1_dout1[18] ,
+    \cubev_reg_1_dout1[17] ,
+    \cubev_reg_1_dout1[16] ,
+    \cubev_reg_1_dout1[15] ,
+    \cubev_reg_1_dout1[14] ,
+    \cubev_reg_1_dout1[13] ,
+    \cubev_reg_1_dout1[12] ,
+    \cubev_reg_1_dout1[11] ,
+    \cubev_reg_1_dout1[10] ,
+    \cubev_reg_1_dout1[9] ,
+    \cubev_reg_1_dout1[8] ,
+    \cubev_reg_1_dout1[7] ,
+    \cubev_reg_1_dout1[6] ,
+    \cubev_reg_1_dout1[5] ,
+    \cubev_reg_1_dout1[4] ,
+    \cubev_reg_1_dout1[3] ,
+    \cubev_reg_1_dout1[2] ,
+    \cubev_reg_1_dout1[1] ,
+    \cubev_reg_1_dout1[0] }),
+    .wmask0({\cubev_reg_1_wmask0[3] ,
+    \cubev_reg_1_wmask0[2] ,
+    \cubev_reg_1_wmask0[1] ,
+    \cubev_reg_1_wmask0[0] }));
+ rb cubev_reg_1_rb (.clk(cubev_reg_1_clk1),
+    .rstn(cubev_reg_1_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_reg_1_dout1[31] ,
+    \cubev_reg_1_dout1[30] ,
+    \cubev_reg_1_dout1[29] ,
+    \cubev_reg_1_dout1[28] ,
+    \cubev_reg_1_dout1[27] ,
+    \cubev_reg_1_dout1[26] ,
+    \cubev_reg_1_dout1[25] ,
+    \cubev_reg_1_dout1[24] ,
+    \cubev_reg_1_dout1[23] ,
+    \cubev_reg_1_dout1[22] ,
+    \cubev_reg_1_dout1[21] ,
+    \cubev_reg_1_dout1[20] ,
+    \cubev_reg_1_dout1[19] ,
+    \cubev_reg_1_dout1[18] ,
+    \cubev_reg_1_dout1[17] ,
+    \cubev_reg_1_dout1[16] ,
+    \cubev_reg_1_dout1[15] ,
+    \cubev_reg_1_dout1[14] ,
+    \cubev_reg_1_dout1[13] ,
+    \cubev_reg_1_dout1[12] ,
+    \cubev_reg_1_dout1[11] ,
+    \cubev_reg_1_dout1[10] ,
+    \cubev_reg_1_dout1[9] ,
+    \cubev_reg_1_dout1[8] ,
+    \cubev_reg_1_dout1[7] ,
+    \cubev_reg_1_dout1[6] ,
+    \cubev_reg_1_dout1[5] ,
+    \cubev_reg_1_dout1[4] ,
+    \cubev_reg_1_dout1[3] ,
+    \cubev_reg_1_dout1[2] ,
+    \cubev_reg_1_dout1[1] ,
+    \cubev_reg_1_dout1[0] }),
+    .dato({\cubev_reg_1_dout1_reg[31] ,
+    \cubev_reg_1_dout1_reg[30] ,
+    \cubev_reg_1_dout1_reg[29] ,
+    \cubev_reg_1_dout1_reg[28] ,
+    \cubev_reg_1_dout1_reg[27] ,
+    \cubev_reg_1_dout1_reg[26] ,
+    \cubev_reg_1_dout1_reg[25] ,
+    \cubev_reg_1_dout1_reg[24] ,
+    \cubev_reg_1_dout1_reg[23] ,
+    \cubev_reg_1_dout1_reg[22] ,
+    \cubev_reg_1_dout1_reg[21] ,
+    \cubev_reg_1_dout1_reg[20] ,
+    \cubev_reg_1_dout1_reg[19] ,
+    \cubev_reg_1_dout1_reg[18] ,
+    \cubev_reg_1_dout1_reg[17] ,
+    \cubev_reg_1_dout1_reg[16] ,
+    \cubev_reg_1_dout1_reg[15] ,
+    \cubev_reg_1_dout1_reg[14] ,
+    \cubev_reg_1_dout1_reg[13] ,
+    \cubev_reg_1_dout1_reg[12] ,
+    \cubev_reg_1_dout1_reg[11] ,
+    \cubev_reg_1_dout1_reg[10] ,
+    \cubev_reg_1_dout1_reg[9] ,
+    \cubev_reg_1_dout1_reg[8] ,
+    \cubev_reg_1_dout1_reg[7] ,
+    \cubev_reg_1_dout1_reg[6] ,
+    \cubev_reg_1_dout1_reg[5] ,
+    \cubev_reg_1_dout1_reg[4] ,
+    \cubev_reg_1_dout1_reg[3] ,
+    \cubev_reg_1_dout1_reg[2] ,
+    \cubev_reg_1_dout1_reg[1] ,
+    \cubev_reg_1_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_reg_2 (.csb0(cubev_reg_2_csb0),
+    .csb1(cubev_reg_2_csb1),
+    .web0(cubev_reg_2_web0),
+    .clk0(cubev_reg_2_clk0),
+    .clk1(cubev_reg_2_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_reg_2_addr0[7] ,
+    \cubev_reg_2_addr0[6] ,
+    \cubev_reg_2_addr0[5] ,
+    \cubev_reg_2_addr0[4] ,
+    \cubev_reg_2_addr0[3] ,
+    \cubev_reg_2_addr0[2] ,
+    \cubev_reg_2_addr0[1] ,
+    \cubev_reg_2_addr0[0] }),
+    .addr1({\cubev_reg_2_addr1[7] ,
+    \cubev_reg_2_addr1[6] ,
+    \cubev_reg_2_addr1[5] ,
+    \cubev_reg_2_addr1[4] ,
+    \cubev_reg_2_addr1[3] ,
+    \cubev_reg_2_addr1[2] ,
+    \cubev_reg_2_addr1[1] ,
+    \cubev_reg_2_addr1[0] }),
+    .din0({\cubev_reg_2_din0[31] ,
+    \cubev_reg_2_din0[30] ,
+    \cubev_reg_2_din0[29] ,
+    \cubev_reg_2_din0[28] ,
+    \cubev_reg_2_din0[27] ,
+    \cubev_reg_2_din0[26] ,
+    \cubev_reg_2_din0[25] ,
+    \cubev_reg_2_din0[24] ,
+    \cubev_reg_2_din0[23] ,
+    \cubev_reg_2_din0[22] ,
+    \cubev_reg_2_din0[21] ,
+    \cubev_reg_2_din0[20] ,
+    \cubev_reg_2_din0[19] ,
+    \cubev_reg_2_din0[18] ,
+    \cubev_reg_2_din0[17] ,
+    \cubev_reg_2_din0[16] ,
+    \cubev_reg_2_din0[15] ,
+    \cubev_reg_2_din0[14] ,
+    \cubev_reg_2_din0[13] ,
+    \cubev_reg_2_din0[12] ,
+    \cubev_reg_2_din0[11] ,
+    \cubev_reg_2_din0[10] ,
+    \cubev_reg_2_din0[9] ,
+    \cubev_reg_2_din0[8] ,
+    \cubev_reg_2_din0[7] ,
+    \cubev_reg_2_din0[6] ,
+    \cubev_reg_2_din0[5] ,
+    \cubev_reg_2_din0[4] ,
+    \cubev_reg_2_din0[3] ,
+    \cubev_reg_2_din0[2] ,
+    \cubev_reg_2_din0[1] ,
+    \cubev_reg_2_din0[0] }),
+    .dout0({\cubev_reg_2_dout0[31] ,
+    \cubev_reg_2_dout0[30] ,
+    \cubev_reg_2_dout0[29] ,
+    \cubev_reg_2_dout0[28] ,
+    \cubev_reg_2_dout0[27] ,
+    \cubev_reg_2_dout0[26] ,
+    \cubev_reg_2_dout0[25] ,
+    \cubev_reg_2_dout0[24] ,
+    \cubev_reg_2_dout0[23] ,
+    \cubev_reg_2_dout0[22] ,
+    \cubev_reg_2_dout0[21] ,
+    \cubev_reg_2_dout0[20] ,
+    \cubev_reg_2_dout0[19] ,
+    \cubev_reg_2_dout0[18] ,
+    \cubev_reg_2_dout0[17] ,
+    \cubev_reg_2_dout0[16] ,
+    \cubev_reg_2_dout0[15] ,
+    \cubev_reg_2_dout0[14] ,
+    \cubev_reg_2_dout0[13] ,
+    \cubev_reg_2_dout0[12] ,
+    \cubev_reg_2_dout0[11] ,
+    \cubev_reg_2_dout0[10] ,
+    \cubev_reg_2_dout0[9] ,
+    \cubev_reg_2_dout0[8] ,
+    \cubev_reg_2_dout0[7] ,
+    \cubev_reg_2_dout0[6] ,
+    \cubev_reg_2_dout0[5] ,
+    \cubev_reg_2_dout0[4] ,
+    \cubev_reg_2_dout0[3] ,
+    \cubev_reg_2_dout0[2] ,
+    \cubev_reg_2_dout0[1] ,
+    \cubev_reg_2_dout0[0] }),
+    .dout1({\cubev_reg_2_dout1[31] ,
+    \cubev_reg_2_dout1[30] ,
+    \cubev_reg_2_dout1[29] ,
+    \cubev_reg_2_dout1[28] ,
+    \cubev_reg_2_dout1[27] ,
+    \cubev_reg_2_dout1[26] ,
+    \cubev_reg_2_dout1[25] ,
+    \cubev_reg_2_dout1[24] ,
+    \cubev_reg_2_dout1[23] ,
+    \cubev_reg_2_dout1[22] ,
+    \cubev_reg_2_dout1[21] ,
+    \cubev_reg_2_dout1[20] ,
+    \cubev_reg_2_dout1[19] ,
+    \cubev_reg_2_dout1[18] ,
+    \cubev_reg_2_dout1[17] ,
+    \cubev_reg_2_dout1[16] ,
+    \cubev_reg_2_dout1[15] ,
+    \cubev_reg_2_dout1[14] ,
+    \cubev_reg_2_dout1[13] ,
+    \cubev_reg_2_dout1[12] ,
+    \cubev_reg_2_dout1[11] ,
+    \cubev_reg_2_dout1[10] ,
+    \cubev_reg_2_dout1[9] ,
+    \cubev_reg_2_dout1[8] ,
+    \cubev_reg_2_dout1[7] ,
+    \cubev_reg_2_dout1[6] ,
+    \cubev_reg_2_dout1[5] ,
+    \cubev_reg_2_dout1[4] ,
+    \cubev_reg_2_dout1[3] ,
+    \cubev_reg_2_dout1[2] ,
+    \cubev_reg_2_dout1[1] ,
+    \cubev_reg_2_dout1[0] }),
+    .wmask0({\cubev_reg_2_wmask0[3] ,
+    \cubev_reg_2_wmask0[2] ,
+    \cubev_reg_2_wmask0[1] ,
+    \cubev_reg_2_wmask0[0] }));
+ rb cubev_reg_2_rb (.clk(cubev_reg_2_clk1),
+    .rstn(cubev_reg_2_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_reg_2_dout1[31] ,
+    \cubev_reg_2_dout1[30] ,
+    \cubev_reg_2_dout1[29] ,
+    \cubev_reg_2_dout1[28] ,
+    \cubev_reg_2_dout1[27] ,
+    \cubev_reg_2_dout1[26] ,
+    \cubev_reg_2_dout1[25] ,
+    \cubev_reg_2_dout1[24] ,
+    \cubev_reg_2_dout1[23] ,
+    \cubev_reg_2_dout1[22] ,
+    \cubev_reg_2_dout1[21] ,
+    \cubev_reg_2_dout1[20] ,
+    \cubev_reg_2_dout1[19] ,
+    \cubev_reg_2_dout1[18] ,
+    \cubev_reg_2_dout1[17] ,
+    \cubev_reg_2_dout1[16] ,
+    \cubev_reg_2_dout1[15] ,
+    \cubev_reg_2_dout1[14] ,
+    \cubev_reg_2_dout1[13] ,
+    \cubev_reg_2_dout1[12] ,
+    \cubev_reg_2_dout1[11] ,
+    \cubev_reg_2_dout1[10] ,
+    \cubev_reg_2_dout1[9] ,
+    \cubev_reg_2_dout1[8] ,
+    \cubev_reg_2_dout1[7] ,
+    \cubev_reg_2_dout1[6] ,
+    \cubev_reg_2_dout1[5] ,
+    \cubev_reg_2_dout1[4] ,
+    \cubev_reg_2_dout1[3] ,
+    \cubev_reg_2_dout1[2] ,
+    \cubev_reg_2_dout1[1] ,
+    \cubev_reg_2_dout1[0] }),
+    .dato({\cubev_reg_2_dout1_reg[31] ,
+    \cubev_reg_2_dout1_reg[30] ,
+    \cubev_reg_2_dout1_reg[29] ,
+    \cubev_reg_2_dout1_reg[28] ,
+    \cubev_reg_2_dout1_reg[27] ,
+    \cubev_reg_2_dout1_reg[26] ,
+    \cubev_reg_2_dout1_reg[25] ,
+    \cubev_reg_2_dout1_reg[24] ,
+    \cubev_reg_2_dout1_reg[23] ,
+    \cubev_reg_2_dout1_reg[22] ,
+    \cubev_reg_2_dout1_reg[21] ,
+    \cubev_reg_2_dout1_reg[20] ,
+    \cubev_reg_2_dout1_reg[19] ,
+    \cubev_reg_2_dout1_reg[18] ,
+    \cubev_reg_2_dout1_reg[17] ,
+    \cubev_reg_2_dout1_reg[16] ,
+    \cubev_reg_2_dout1_reg[15] ,
+    \cubev_reg_2_dout1_reg[14] ,
+    \cubev_reg_2_dout1_reg[13] ,
+    \cubev_reg_2_dout1_reg[12] ,
+    \cubev_reg_2_dout1_reg[11] ,
+    \cubev_reg_2_dout1_reg[10] ,
+    \cubev_reg_2_dout1_reg[9] ,
+    \cubev_reg_2_dout1_reg[8] ,
+    \cubev_reg_2_dout1_reg[7] ,
+    \cubev_reg_2_dout1_reg[6] ,
+    \cubev_reg_2_dout1_reg[5] ,
+    \cubev_reg_2_dout1_reg[4] ,
+    \cubev_reg_2_dout1_reg[3] ,
+    \cubev_reg_2_dout1_reg[2] ,
+    \cubev_reg_2_dout1_reg[1] ,
+    \cubev_reg_2_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_reg_3 (.csb0(cubev_reg_3_csb0),
+    .csb1(cubev_reg_3_csb1),
+    .web0(cubev_reg_3_web0),
+    .clk0(cubev_reg_3_clk0),
+    .clk1(cubev_reg_3_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_reg_3_addr0[7] ,
+    \cubev_reg_3_addr0[6] ,
+    \cubev_reg_3_addr0[5] ,
+    \cubev_reg_3_addr0[4] ,
+    \cubev_reg_3_addr0[3] ,
+    \cubev_reg_3_addr0[2] ,
+    \cubev_reg_3_addr0[1] ,
+    \cubev_reg_3_addr0[0] }),
+    .addr1({\cubev_reg_3_addr1[7] ,
+    \cubev_reg_3_addr1[6] ,
+    \cubev_reg_3_addr1[5] ,
+    \cubev_reg_3_addr1[4] ,
+    \cubev_reg_3_addr1[3] ,
+    \cubev_reg_3_addr1[2] ,
+    \cubev_reg_3_addr1[1] ,
+    \cubev_reg_3_addr1[0] }),
+    .din0({\cubev_reg_3_din0[31] ,
+    \cubev_reg_3_din0[30] ,
+    \cubev_reg_3_din0[29] ,
+    \cubev_reg_3_din0[28] ,
+    \cubev_reg_3_din0[27] ,
+    \cubev_reg_3_din0[26] ,
+    \cubev_reg_3_din0[25] ,
+    \cubev_reg_3_din0[24] ,
+    \cubev_reg_3_din0[23] ,
+    \cubev_reg_3_din0[22] ,
+    \cubev_reg_3_din0[21] ,
+    \cubev_reg_3_din0[20] ,
+    \cubev_reg_3_din0[19] ,
+    \cubev_reg_3_din0[18] ,
+    \cubev_reg_3_din0[17] ,
+    \cubev_reg_3_din0[16] ,
+    \cubev_reg_3_din0[15] ,
+    \cubev_reg_3_din0[14] ,
+    \cubev_reg_3_din0[13] ,
+    \cubev_reg_3_din0[12] ,
+    \cubev_reg_3_din0[11] ,
+    \cubev_reg_3_din0[10] ,
+    \cubev_reg_3_din0[9] ,
+    \cubev_reg_3_din0[8] ,
+    \cubev_reg_3_din0[7] ,
+    \cubev_reg_3_din0[6] ,
+    \cubev_reg_3_din0[5] ,
+    \cubev_reg_3_din0[4] ,
+    \cubev_reg_3_din0[3] ,
+    \cubev_reg_3_din0[2] ,
+    \cubev_reg_3_din0[1] ,
+    \cubev_reg_3_din0[0] }),
+    .dout0({\cubev_reg_3_dout0[31] ,
+    \cubev_reg_3_dout0[30] ,
+    \cubev_reg_3_dout0[29] ,
+    \cubev_reg_3_dout0[28] ,
+    \cubev_reg_3_dout0[27] ,
+    \cubev_reg_3_dout0[26] ,
+    \cubev_reg_3_dout0[25] ,
+    \cubev_reg_3_dout0[24] ,
+    \cubev_reg_3_dout0[23] ,
+    \cubev_reg_3_dout0[22] ,
+    \cubev_reg_3_dout0[21] ,
+    \cubev_reg_3_dout0[20] ,
+    \cubev_reg_3_dout0[19] ,
+    \cubev_reg_3_dout0[18] ,
+    \cubev_reg_3_dout0[17] ,
+    \cubev_reg_3_dout0[16] ,
+    \cubev_reg_3_dout0[15] ,
+    \cubev_reg_3_dout0[14] ,
+    \cubev_reg_3_dout0[13] ,
+    \cubev_reg_3_dout0[12] ,
+    \cubev_reg_3_dout0[11] ,
+    \cubev_reg_3_dout0[10] ,
+    \cubev_reg_3_dout0[9] ,
+    \cubev_reg_3_dout0[8] ,
+    \cubev_reg_3_dout0[7] ,
+    \cubev_reg_3_dout0[6] ,
+    \cubev_reg_3_dout0[5] ,
+    \cubev_reg_3_dout0[4] ,
+    \cubev_reg_3_dout0[3] ,
+    \cubev_reg_3_dout0[2] ,
+    \cubev_reg_3_dout0[1] ,
+    \cubev_reg_3_dout0[0] }),
+    .dout1({\cubev_reg_3_dout1[31] ,
+    \cubev_reg_3_dout1[30] ,
+    \cubev_reg_3_dout1[29] ,
+    \cubev_reg_3_dout1[28] ,
+    \cubev_reg_3_dout1[27] ,
+    \cubev_reg_3_dout1[26] ,
+    \cubev_reg_3_dout1[25] ,
+    \cubev_reg_3_dout1[24] ,
+    \cubev_reg_3_dout1[23] ,
+    \cubev_reg_3_dout1[22] ,
+    \cubev_reg_3_dout1[21] ,
+    \cubev_reg_3_dout1[20] ,
+    \cubev_reg_3_dout1[19] ,
+    \cubev_reg_3_dout1[18] ,
+    \cubev_reg_3_dout1[17] ,
+    \cubev_reg_3_dout1[16] ,
+    \cubev_reg_3_dout1[15] ,
+    \cubev_reg_3_dout1[14] ,
+    \cubev_reg_3_dout1[13] ,
+    \cubev_reg_3_dout1[12] ,
+    \cubev_reg_3_dout1[11] ,
+    \cubev_reg_3_dout1[10] ,
+    \cubev_reg_3_dout1[9] ,
+    \cubev_reg_3_dout1[8] ,
+    \cubev_reg_3_dout1[7] ,
+    \cubev_reg_3_dout1[6] ,
+    \cubev_reg_3_dout1[5] ,
+    \cubev_reg_3_dout1[4] ,
+    \cubev_reg_3_dout1[3] ,
+    \cubev_reg_3_dout1[2] ,
+    \cubev_reg_3_dout1[1] ,
+    \cubev_reg_3_dout1[0] }),
+    .wmask0({\cubev_reg_3_wmask0[3] ,
+    \cubev_reg_3_wmask0[2] ,
+    \cubev_reg_3_wmask0[1] ,
+    \cubev_reg_3_wmask0[0] }));
+ rb cubev_reg_3_rb (.clk(cubev_reg_3_clk1),
+    .rstn(cubev_reg_3_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_reg_3_dout1[31] ,
+    \cubev_reg_3_dout1[30] ,
+    \cubev_reg_3_dout1[29] ,
+    \cubev_reg_3_dout1[28] ,
+    \cubev_reg_3_dout1[27] ,
+    \cubev_reg_3_dout1[26] ,
+    \cubev_reg_3_dout1[25] ,
+    \cubev_reg_3_dout1[24] ,
+    \cubev_reg_3_dout1[23] ,
+    \cubev_reg_3_dout1[22] ,
+    \cubev_reg_3_dout1[21] ,
+    \cubev_reg_3_dout1[20] ,
+    \cubev_reg_3_dout1[19] ,
+    \cubev_reg_3_dout1[18] ,
+    \cubev_reg_3_dout1[17] ,
+    \cubev_reg_3_dout1[16] ,
+    \cubev_reg_3_dout1[15] ,
+    \cubev_reg_3_dout1[14] ,
+    \cubev_reg_3_dout1[13] ,
+    \cubev_reg_3_dout1[12] ,
+    \cubev_reg_3_dout1[11] ,
+    \cubev_reg_3_dout1[10] ,
+    \cubev_reg_3_dout1[9] ,
+    \cubev_reg_3_dout1[8] ,
+    \cubev_reg_3_dout1[7] ,
+    \cubev_reg_3_dout1[6] ,
+    \cubev_reg_3_dout1[5] ,
+    \cubev_reg_3_dout1[4] ,
+    \cubev_reg_3_dout1[3] ,
+    \cubev_reg_3_dout1[2] ,
+    \cubev_reg_3_dout1[1] ,
+    \cubev_reg_3_dout1[0] }),
+    .dato({\cubev_reg_3_dout1_reg[31] ,
+    \cubev_reg_3_dout1_reg[30] ,
+    \cubev_reg_3_dout1_reg[29] ,
+    \cubev_reg_3_dout1_reg[28] ,
+    \cubev_reg_3_dout1_reg[27] ,
+    \cubev_reg_3_dout1_reg[26] ,
+    \cubev_reg_3_dout1_reg[25] ,
+    \cubev_reg_3_dout1_reg[24] ,
+    \cubev_reg_3_dout1_reg[23] ,
+    \cubev_reg_3_dout1_reg[22] ,
+    \cubev_reg_3_dout1_reg[21] ,
+    \cubev_reg_3_dout1_reg[20] ,
+    \cubev_reg_3_dout1_reg[19] ,
+    \cubev_reg_3_dout1_reg[18] ,
+    \cubev_reg_3_dout1_reg[17] ,
+    \cubev_reg_3_dout1_reg[16] ,
+    \cubev_reg_3_dout1_reg[15] ,
+    \cubev_reg_3_dout1_reg[14] ,
+    \cubev_reg_3_dout1_reg[13] ,
+    \cubev_reg_3_dout1_reg[12] ,
+    \cubev_reg_3_dout1_reg[11] ,
+    \cubev_reg_3_dout1_reg[10] ,
+    \cubev_reg_3_dout1_reg[9] ,
+    \cubev_reg_3_dout1_reg[8] ,
+    \cubev_reg_3_dout1_reg[7] ,
+    \cubev_reg_3_dout1_reg[6] ,
+    \cubev_reg_3_dout1_reg[5] ,
+    \cubev_reg_3_dout1_reg[4] ,
+    \cubev_reg_3_dout1_reg[3] ,
+    \cubev_reg_3_dout1_reg[2] ,
+    \cubev_reg_3_dout1_reg[1] ,
+    \cubev_reg_3_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_reg_4 (.csb0(cubev_reg_4_csb0),
+    .csb1(cubev_reg_4_csb1),
+    .web0(cubev_reg_4_web0),
+    .clk0(cubev_reg_4_clk0),
+    .clk1(cubev_reg_4_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_reg_4_addr0[7] ,
+    \cubev_reg_4_addr0[6] ,
+    \cubev_reg_4_addr0[5] ,
+    \cubev_reg_4_addr0[4] ,
+    \cubev_reg_4_addr0[3] ,
+    \cubev_reg_4_addr0[2] ,
+    \cubev_reg_4_addr0[1] ,
+    \cubev_reg_4_addr0[0] }),
+    .addr1({\cubev_reg_4_addr1[7] ,
+    \cubev_reg_4_addr1[6] ,
+    \cubev_reg_4_addr1[5] ,
+    \cubev_reg_4_addr1[4] ,
+    \cubev_reg_4_addr1[3] ,
+    \cubev_reg_4_addr1[2] ,
+    \cubev_reg_4_addr1[1] ,
+    \cubev_reg_4_addr1[0] }),
+    .din0({\cubev_reg_4_din0[31] ,
+    \cubev_reg_4_din0[30] ,
+    \cubev_reg_4_din0[29] ,
+    \cubev_reg_4_din0[28] ,
+    \cubev_reg_4_din0[27] ,
+    \cubev_reg_4_din0[26] ,
+    \cubev_reg_4_din0[25] ,
+    \cubev_reg_4_din0[24] ,
+    \cubev_reg_4_din0[23] ,
+    \cubev_reg_4_din0[22] ,
+    \cubev_reg_4_din0[21] ,
+    \cubev_reg_4_din0[20] ,
+    \cubev_reg_4_din0[19] ,
+    \cubev_reg_4_din0[18] ,
+    \cubev_reg_4_din0[17] ,
+    \cubev_reg_4_din0[16] ,
+    \cubev_reg_4_din0[15] ,
+    \cubev_reg_4_din0[14] ,
+    \cubev_reg_4_din0[13] ,
+    \cubev_reg_4_din0[12] ,
+    \cubev_reg_4_din0[11] ,
+    \cubev_reg_4_din0[10] ,
+    \cubev_reg_4_din0[9] ,
+    \cubev_reg_4_din0[8] ,
+    \cubev_reg_4_din0[7] ,
+    \cubev_reg_4_din0[6] ,
+    \cubev_reg_4_din0[5] ,
+    \cubev_reg_4_din0[4] ,
+    \cubev_reg_4_din0[3] ,
+    \cubev_reg_4_din0[2] ,
+    \cubev_reg_4_din0[1] ,
+    \cubev_reg_4_din0[0] }),
+    .dout0({\cubev_reg_4_dout0[31] ,
+    \cubev_reg_4_dout0[30] ,
+    \cubev_reg_4_dout0[29] ,
+    \cubev_reg_4_dout0[28] ,
+    \cubev_reg_4_dout0[27] ,
+    \cubev_reg_4_dout0[26] ,
+    \cubev_reg_4_dout0[25] ,
+    \cubev_reg_4_dout0[24] ,
+    \cubev_reg_4_dout0[23] ,
+    \cubev_reg_4_dout0[22] ,
+    \cubev_reg_4_dout0[21] ,
+    \cubev_reg_4_dout0[20] ,
+    \cubev_reg_4_dout0[19] ,
+    \cubev_reg_4_dout0[18] ,
+    \cubev_reg_4_dout0[17] ,
+    \cubev_reg_4_dout0[16] ,
+    \cubev_reg_4_dout0[15] ,
+    \cubev_reg_4_dout0[14] ,
+    \cubev_reg_4_dout0[13] ,
+    \cubev_reg_4_dout0[12] ,
+    \cubev_reg_4_dout0[11] ,
+    \cubev_reg_4_dout0[10] ,
+    \cubev_reg_4_dout0[9] ,
+    \cubev_reg_4_dout0[8] ,
+    \cubev_reg_4_dout0[7] ,
+    \cubev_reg_4_dout0[6] ,
+    \cubev_reg_4_dout0[5] ,
+    \cubev_reg_4_dout0[4] ,
+    \cubev_reg_4_dout0[3] ,
+    \cubev_reg_4_dout0[2] ,
+    \cubev_reg_4_dout0[1] ,
+    \cubev_reg_4_dout0[0] }),
+    .dout1({\cubev_reg_4_dout1[31] ,
+    \cubev_reg_4_dout1[30] ,
+    \cubev_reg_4_dout1[29] ,
+    \cubev_reg_4_dout1[28] ,
+    \cubev_reg_4_dout1[27] ,
+    \cubev_reg_4_dout1[26] ,
+    \cubev_reg_4_dout1[25] ,
+    \cubev_reg_4_dout1[24] ,
+    \cubev_reg_4_dout1[23] ,
+    \cubev_reg_4_dout1[22] ,
+    \cubev_reg_4_dout1[21] ,
+    \cubev_reg_4_dout1[20] ,
+    \cubev_reg_4_dout1[19] ,
+    \cubev_reg_4_dout1[18] ,
+    \cubev_reg_4_dout1[17] ,
+    \cubev_reg_4_dout1[16] ,
+    \cubev_reg_4_dout1[15] ,
+    \cubev_reg_4_dout1[14] ,
+    \cubev_reg_4_dout1[13] ,
+    \cubev_reg_4_dout1[12] ,
+    \cubev_reg_4_dout1[11] ,
+    \cubev_reg_4_dout1[10] ,
+    \cubev_reg_4_dout1[9] ,
+    \cubev_reg_4_dout1[8] ,
+    \cubev_reg_4_dout1[7] ,
+    \cubev_reg_4_dout1[6] ,
+    \cubev_reg_4_dout1[5] ,
+    \cubev_reg_4_dout1[4] ,
+    \cubev_reg_4_dout1[3] ,
+    \cubev_reg_4_dout1[2] ,
+    \cubev_reg_4_dout1[1] ,
+    \cubev_reg_4_dout1[0] }),
+    .wmask0({\cubev_reg_4_wmask0[3] ,
+    \cubev_reg_4_wmask0[2] ,
+    \cubev_reg_4_wmask0[1] ,
+    \cubev_reg_4_wmask0[0] }));
+ rb cubev_reg_4_rb (.clk(cubev_reg_4_clk1),
+    .rstn(cubev_reg_4_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_reg_4_dout1[31] ,
+    \cubev_reg_4_dout1[30] ,
+    \cubev_reg_4_dout1[29] ,
+    \cubev_reg_4_dout1[28] ,
+    \cubev_reg_4_dout1[27] ,
+    \cubev_reg_4_dout1[26] ,
+    \cubev_reg_4_dout1[25] ,
+    \cubev_reg_4_dout1[24] ,
+    \cubev_reg_4_dout1[23] ,
+    \cubev_reg_4_dout1[22] ,
+    \cubev_reg_4_dout1[21] ,
+    \cubev_reg_4_dout1[20] ,
+    \cubev_reg_4_dout1[19] ,
+    \cubev_reg_4_dout1[18] ,
+    \cubev_reg_4_dout1[17] ,
+    \cubev_reg_4_dout1[16] ,
+    \cubev_reg_4_dout1[15] ,
+    \cubev_reg_4_dout1[14] ,
+    \cubev_reg_4_dout1[13] ,
+    \cubev_reg_4_dout1[12] ,
+    \cubev_reg_4_dout1[11] ,
+    \cubev_reg_4_dout1[10] ,
+    \cubev_reg_4_dout1[9] ,
+    \cubev_reg_4_dout1[8] ,
+    \cubev_reg_4_dout1[7] ,
+    \cubev_reg_4_dout1[6] ,
+    \cubev_reg_4_dout1[5] ,
+    \cubev_reg_4_dout1[4] ,
+    \cubev_reg_4_dout1[3] ,
+    \cubev_reg_4_dout1[2] ,
+    \cubev_reg_4_dout1[1] ,
+    \cubev_reg_4_dout1[0] }),
+    .dato({\cubev_reg_4_dout1_reg[31] ,
+    \cubev_reg_4_dout1_reg[30] ,
+    \cubev_reg_4_dout1_reg[29] ,
+    \cubev_reg_4_dout1_reg[28] ,
+    \cubev_reg_4_dout1_reg[27] ,
+    \cubev_reg_4_dout1_reg[26] ,
+    \cubev_reg_4_dout1_reg[25] ,
+    \cubev_reg_4_dout1_reg[24] ,
+    \cubev_reg_4_dout1_reg[23] ,
+    \cubev_reg_4_dout1_reg[22] ,
+    \cubev_reg_4_dout1_reg[21] ,
+    \cubev_reg_4_dout1_reg[20] ,
+    \cubev_reg_4_dout1_reg[19] ,
+    \cubev_reg_4_dout1_reg[18] ,
+    \cubev_reg_4_dout1_reg[17] ,
+    \cubev_reg_4_dout1_reg[16] ,
+    \cubev_reg_4_dout1_reg[15] ,
+    \cubev_reg_4_dout1_reg[14] ,
+    \cubev_reg_4_dout1_reg[13] ,
+    \cubev_reg_4_dout1_reg[12] ,
+    \cubev_reg_4_dout1_reg[11] ,
+    \cubev_reg_4_dout1_reg[10] ,
+    \cubev_reg_4_dout1_reg[9] ,
+    \cubev_reg_4_dout1_reg[8] ,
+    \cubev_reg_4_dout1_reg[7] ,
+    \cubev_reg_4_dout1_reg[6] ,
+    \cubev_reg_4_dout1_reg[5] ,
+    \cubev_reg_4_dout1_reg[4] ,
+    \cubev_reg_4_dout1_reg[3] ,
+    \cubev_reg_4_dout1_reg[2] ,
+    \cubev_reg_4_dout1_reg[1] ,
+    \cubev_reg_4_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_reg_5 (.csb0(cubev_reg_5_csb0),
+    .csb1(cubev_reg_5_csb1),
+    .web0(cubev_reg_5_web0),
+    .clk0(cubev_reg_5_clk0),
+    .clk1(cubev_reg_5_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_reg_5_addr0[7] ,
+    \cubev_reg_5_addr0[6] ,
+    \cubev_reg_5_addr0[5] ,
+    \cubev_reg_5_addr0[4] ,
+    \cubev_reg_5_addr0[3] ,
+    \cubev_reg_5_addr0[2] ,
+    \cubev_reg_5_addr0[1] ,
+    \cubev_reg_5_addr0[0] }),
+    .addr1({\cubev_reg_5_addr1[7] ,
+    \cubev_reg_5_addr1[6] ,
+    \cubev_reg_5_addr1[5] ,
+    \cubev_reg_5_addr1[4] ,
+    \cubev_reg_5_addr1[3] ,
+    \cubev_reg_5_addr1[2] ,
+    \cubev_reg_5_addr1[1] ,
+    \cubev_reg_5_addr1[0] }),
+    .din0({\cubev_reg_5_din0[31] ,
+    \cubev_reg_5_din0[30] ,
+    \cubev_reg_5_din0[29] ,
+    \cubev_reg_5_din0[28] ,
+    \cubev_reg_5_din0[27] ,
+    \cubev_reg_5_din0[26] ,
+    \cubev_reg_5_din0[25] ,
+    \cubev_reg_5_din0[24] ,
+    \cubev_reg_5_din0[23] ,
+    \cubev_reg_5_din0[22] ,
+    \cubev_reg_5_din0[21] ,
+    \cubev_reg_5_din0[20] ,
+    \cubev_reg_5_din0[19] ,
+    \cubev_reg_5_din0[18] ,
+    \cubev_reg_5_din0[17] ,
+    \cubev_reg_5_din0[16] ,
+    \cubev_reg_5_din0[15] ,
+    \cubev_reg_5_din0[14] ,
+    \cubev_reg_5_din0[13] ,
+    \cubev_reg_5_din0[12] ,
+    \cubev_reg_5_din0[11] ,
+    \cubev_reg_5_din0[10] ,
+    \cubev_reg_5_din0[9] ,
+    \cubev_reg_5_din0[8] ,
+    \cubev_reg_5_din0[7] ,
+    \cubev_reg_5_din0[6] ,
+    \cubev_reg_5_din0[5] ,
+    \cubev_reg_5_din0[4] ,
+    \cubev_reg_5_din0[3] ,
+    \cubev_reg_5_din0[2] ,
+    \cubev_reg_5_din0[1] ,
+    \cubev_reg_5_din0[0] }),
+    .dout0({\cubev_reg_5_dout0[31] ,
+    \cubev_reg_5_dout0[30] ,
+    \cubev_reg_5_dout0[29] ,
+    \cubev_reg_5_dout0[28] ,
+    \cubev_reg_5_dout0[27] ,
+    \cubev_reg_5_dout0[26] ,
+    \cubev_reg_5_dout0[25] ,
+    \cubev_reg_5_dout0[24] ,
+    \cubev_reg_5_dout0[23] ,
+    \cubev_reg_5_dout0[22] ,
+    \cubev_reg_5_dout0[21] ,
+    \cubev_reg_5_dout0[20] ,
+    \cubev_reg_5_dout0[19] ,
+    \cubev_reg_5_dout0[18] ,
+    \cubev_reg_5_dout0[17] ,
+    \cubev_reg_5_dout0[16] ,
+    \cubev_reg_5_dout0[15] ,
+    \cubev_reg_5_dout0[14] ,
+    \cubev_reg_5_dout0[13] ,
+    \cubev_reg_5_dout0[12] ,
+    \cubev_reg_5_dout0[11] ,
+    \cubev_reg_5_dout0[10] ,
+    \cubev_reg_5_dout0[9] ,
+    \cubev_reg_5_dout0[8] ,
+    \cubev_reg_5_dout0[7] ,
+    \cubev_reg_5_dout0[6] ,
+    \cubev_reg_5_dout0[5] ,
+    \cubev_reg_5_dout0[4] ,
+    \cubev_reg_5_dout0[3] ,
+    \cubev_reg_5_dout0[2] ,
+    \cubev_reg_5_dout0[1] ,
+    \cubev_reg_5_dout0[0] }),
+    .dout1({\cubev_reg_5_dout1[31] ,
+    \cubev_reg_5_dout1[30] ,
+    \cubev_reg_5_dout1[29] ,
+    \cubev_reg_5_dout1[28] ,
+    \cubev_reg_5_dout1[27] ,
+    \cubev_reg_5_dout1[26] ,
+    \cubev_reg_5_dout1[25] ,
+    \cubev_reg_5_dout1[24] ,
+    \cubev_reg_5_dout1[23] ,
+    \cubev_reg_5_dout1[22] ,
+    \cubev_reg_5_dout1[21] ,
+    \cubev_reg_5_dout1[20] ,
+    \cubev_reg_5_dout1[19] ,
+    \cubev_reg_5_dout1[18] ,
+    \cubev_reg_5_dout1[17] ,
+    \cubev_reg_5_dout1[16] ,
+    \cubev_reg_5_dout1[15] ,
+    \cubev_reg_5_dout1[14] ,
+    \cubev_reg_5_dout1[13] ,
+    \cubev_reg_5_dout1[12] ,
+    \cubev_reg_5_dout1[11] ,
+    \cubev_reg_5_dout1[10] ,
+    \cubev_reg_5_dout1[9] ,
+    \cubev_reg_5_dout1[8] ,
+    \cubev_reg_5_dout1[7] ,
+    \cubev_reg_5_dout1[6] ,
+    \cubev_reg_5_dout1[5] ,
+    \cubev_reg_5_dout1[4] ,
+    \cubev_reg_5_dout1[3] ,
+    \cubev_reg_5_dout1[2] ,
+    \cubev_reg_5_dout1[1] ,
+    \cubev_reg_5_dout1[0] }),
+    .wmask0({\cubev_reg_5_wmask0[3] ,
+    \cubev_reg_5_wmask0[2] ,
+    \cubev_reg_5_wmask0[1] ,
+    \cubev_reg_5_wmask0[0] }));
+ rb cubev_reg_5_rb (.clk(cubev_reg_5_clk1),
+    .rstn(cubev_reg_5_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_reg_5_dout1[31] ,
+    \cubev_reg_5_dout1[30] ,
+    \cubev_reg_5_dout1[29] ,
+    \cubev_reg_5_dout1[28] ,
+    \cubev_reg_5_dout1[27] ,
+    \cubev_reg_5_dout1[26] ,
+    \cubev_reg_5_dout1[25] ,
+    \cubev_reg_5_dout1[24] ,
+    \cubev_reg_5_dout1[23] ,
+    \cubev_reg_5_dout1[22] ,
+    \cubev_reg_5_dout1[21] ,
+    \cubev_reg_5_dout1[20] ,
+    \cubev_reg_5_dout1[19] ,
+    \cubev_reg_5_dout1[18] ,
+    \cubev_reg_5_dout1[17] ,
+    \cubev_reg_5_dout1[16] ,
+    \cubev_reg_5_dout1[15] ,
+    \cubev_reg_5_dout1[14] ,
+    \cubev_reg_5_dout1[13] ,
+    \cubev_reg_5_dout1[12] ,
+    \cubev_reg_5_dout1[11] ,
+    \cubev_reg_5_dout1[10] ,
+    \cubev_reg_5_dout1[9] ,
+    \cubev_reg_5_dout1[8] ,
+    \cubev_reg_5_dout1[7] ,
+    \cubev_reg_5_dout1[6] ,
+    \cubev_reg_5_dout1[5] ,
+    \cubev_reg_5_dout1[4] ,
+    \cubev_reg_5_dout1[3] ,
+    \cubev_reg_5_dout1[2] ,
+    \cubev_reg_5_dout1[1] ,
+    \cubev_reg_5_dout1[0] }),
+    .dato({\cubev_reg_5_dout1_reg[31] ,
+    \cubev_reg_5_dout1_reg[30] ,
+    \cubev_reg_5_dout1_reg[29] ,
+    \cubev_reg_5_dout1_reg[28] ,
+    \cubev_reg_5_dout1_reg[27] ,
+    \cubev_reg_5_dout1_reg[26] ,
+    \cubev_reg_5_dout1_reg[25] ,
+    \cubev_reg_5_dout1_reg[24] ,
+    \cubev_reg_5_dout1_reg[23] ,
+    \cubev_reg_5_dout1_reg[22] ,
+    \cubev_reg_5_dout1_reg[21] ,
+    \cubev_reg_5_dout1_reg[20] ,
+    \cubev_reg_5_dout1_reg[19] ,
+    \cubev_reg_5_dout1_reg[18] ,
+    \cubev_reg_5_dout1_reg[17] ,
+    \cubev_reg_5_dout1_reg[16] ,
+    \cubev_reg_5_dout1_reg[15] ,
+    \cubev_reg_5_dout1_reg[14] ,
+    \cubev_reg_5_dout1_reg[13] ,
+    \cubev_reg_5_dout1_reg[12] ,
+    \cubev_reg_5_dout1_reg[11] ,
+    \cubev_reg_5_dout1_reg[10] ,
+    \cubev_reg_5_dout1_reg[9] ,
+    \cubev_reg_5_dout1_reg[8] ,
+    \cubev_reg_5_dout1_reg[7] ,
+    \cubev_reg_5_dout1_reg[6] ,
+    \cubev_reg_5_dout1_reg[5] ,
+    \cubev_reg_5_dout1_reg[4] ,
+    \cubev_reg_5_dout1_reg[3] ,
+    \cubev_reg_5_dout1_reg[2] ,
+    \cubev_reg_5_dout1_reg[1] ,
+    \cubev_reg_5_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_rf1i (.csb0(cubev_rf1_csb0),
+    .csb1(cubev_rf1_csb1),
+    .web0(cubev_rf1_web0),
+    .clk0(cubev_rf1_clk0),
+    .clk1(cubev_rf1_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_rf1_addr0[7] ,
+    \cubev_rf1_addr0[6] ,
+    \cubev_rf1_addr0[5] ,
+    \cubev_rf1_addr0[4] ,
+    \cubev_rf1_addr0[3] ,
+    \cubev_rf1_addr0[2] ,
+    \cubev_rf1_addr0[1] ,
+    \cubev_rf1_addr0[0] }),
+    .addr1({\cubev_rf1_addr1[7] ,
+    \cubev_rf1_addr1[6] ,
+    \cubev_rf1_addr1[5] ,
+    \cubev_rf1_addr1[4] ,
+    \cubev_rf1_addr1[3] ,
+    \cubev_rf1_addr1[2] ,
+    \cubev_rf1_addr1[1] ,
+    \cubev_rf1_addr1[0] }),
+    .din0({\cubev_rf1_din0[31] ,
+    \cubev_rf1_din0[30] ,
+    \cubev_rf1_din0[29] ,
+    \cubev_rf1_din0[28] ,
+    \cubev_rf1_din0[27] ,
+    \cubev_rf1_din0[26] ,
+    \cubev_rf1_din0[25] ,
+    \cubev_rf1_din0[24] ,
+    \cubev_rf1_din0[23] ,
+    \cubev_rf1_din0[22] ,
+    \cubev_rf1_din0[21] ,
+    \cubev_rf1_din0[20] ,
+    \cubev_rf1_din0[19] ,
+    \cubev_rf1_din0[18] ,
+    \cubev_rf1_din0[17] ,
+    \cubev_rf1_din0[16] ,
+    \cubev_rf1_din0[15] ,
+    \cubev_rf1_din0[14] ,
+    \cubev_rf1_din0[13] ,
+    \cubev_rf1_din0[12] ,
+    \cubev_rf1_din0[11] ,
+    \cubev_rf1_din0[10] ,
+    \cubev_rf1_din0[9] ,
+    \cubev_rf1_din0[8] ,
+    \cubev_rf1_din0[7] ,
+    \cubev_rf1_din0[6] ,
+    \cubev_rf1_din0[5] ,
+    \cubev_rf1_din0[4] ,
+    \cubev_rf1_din0[3] ,
+    \cubev_rf1_din0[2] ,
+    \cubev_rf1_din0[1] ,
+    \cubev_rf1_din0[0] }),
+    .dout0({\cubev_rf1_dout0[31] ,
+    \cubev_rf1_dout0[30] ,
+    \cubev_rf1_dout0[29] ,
+    \cubev_rf1_dout0[28] ,
+    \cubev_rf1_dout0[27] ,
+    \cubev_rf1_dout0[26] ,
+    \cubev_rf1_dout0[25] ,
+    \cubev_rf1_dout0[24] ,
+    \cubev_rf1_dout0[23] ,
+    \cubev_rf1_dout0[22] ,
+    \cubev_rf1_dout0[21] ,
+    \cubev_rf1_dout0[20] ,
+    \cubev_rf1_dout0[19] ,
+    \cubev_rf1_dout0[18] ,
+    \cubev_rf1_dout0[17] ,
+    \cubev_rf1_dout0[16] ,
+    \cubev_rf1_dout0[15] ,
+    \cubev_rf1_dout0[14] ,
+    \cubev_rf1_dout0[13] ,
+    \cubev_rf1_dout0[12] ,
+    \cubev_rf1_dout0[11] ,
+    \cubev_rf1_dout0[10] ,
+    \cubev_rf1_dout0[9] ,
+    \cubev_rf1_dout0[8] ,
+    \cubev_rf1_dout0[7] ,
+    \cubev_rf1_dout0[6] ,
+    \cubev_rf1_dout0[5] ,
+    \cubev_rf1_dout0[4] ,
+    \cubev_rf1_dout0[3] ,
+    \cubev_rf1_dout0[2] ,
+    \cubev_rf1_dout0[1] ,
+    \cubev_rf1_dout0[0] }),
+    .dout1({\cubev_rf1_dout1[31] ,
+    \cubev_rf1_dout1[30] ,
+    \cubev_rf1_dout1[29] ,
+    \cubev_rf1_dout1[28] ,
+    \cubev_rf1_dout1[27] ,
+    \cubev_rf1_dout1[26] ,
+    \cubev_rf1_dout1[25] ,
+    \cubev_rf1_dout1[24] ,
+    \cubev_rf1_dout1[23] ,
+    \cubev_rf1_dout1[22] ,
+    \cubev_rf1_dout1[21] ,
+    \cubev_rf1_dout1[20] ,
+    \cubev_rf1_dout1[19] ,
+    \cubev_rf1_dout1[18] ,
+    \cubev_rf1_dout1[17] ,
+    \cubev_rf1_dout1[16] ,
+    \cubev_rf1_dout1[15] ,
+    \cubev_rf1_dout1[14] ,
+    \cubev_rf1_dout1[13] ,
+    \cubev_rf1_dout1[12] ,
+    \cubev_rf1_dout1[11] ,
+    \cubev_rf1_dout1[10] ,
+    \cubev_rf1_dout1[9] ,
+    \cubev_rf1_dout1[8] ,
+    \cubev_rf1_dout1[7] ,
+    \cubev_rf1_dout1[6] ,
+    \cubev_rf1_dout1[5] ,
+    \cubev_rf1_dout1[4] ,
+    \cubev_rf1_dout1[3] ,
+    \cubev_rf1_dout1[2] ,
+    \cubev_rf1_dout1[1] ,
+    \cubev_rf1_dout1[0] }),
+    .wmask0({\cubev_rf1_wmask0[3] ,
+    \cubev_rf1_wmask0[2] ,
+    \cubev_rf1_wmask0[1] ,
+    \cubev_rf1_wmask0[0] }));
+ rb cubev_rf1i_rb (.clk(cubev_rf1_clk1),
+    .rstn(cubev_rf1_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_rf1_dout1[31] ,
+    \cubev_rf1_dout1[30] ,
+    \cubev_rf1_dout1[29] ,
+    \cubev_rf1_dout1[28] ,
+    \cubev_rf1_dout1[27] ,
+    \cubev_rf1_dout1[26] ,
+    \cubev_rf1_dout1[25] ,
+    \cubev_rf1_dout1[24] ,
+    \cubev_rf1_dout1[23] ,
+    \cubev_rf1_dout1[22] ,
+    \cubev_rf1_dout1[21] ,
+    \cubev_rf1_dout1[20] ,
+    \cubev_rf1_dout1[19] ,
+    \cubev_rf1_dout1[18] ,
+    \cubev_rf1_dout1[17] ,
+    \cubev_rf1_dout1[16] ,
+    \cubev_rf1_dout1[15] ,
+    \cubev_rf1_dout1[14] ,
+    \cubev_rf1_dout1[13] ,
+    \cubev_rf1_dout1[12] ,
+    \cubev_rf1_dout1[11] ,
+    \cubev_rf1_dout1[10] ,
+    \cubev_rf1_dout1[9] ,
+    \cubev_rf1_dout1[8] ,
+    \cubev_rf1_dout1[7] ,
+    \cubev_rf1_dout1[6] ,
+    \cubev_rf1_dout1[5] ,
+    \cubev_rf1_dout1[4] ,
+    \cubev_rf1_dout1[3] ,
+    \cubev_rf1_dout1[2] ,
+    \cubev_rf1_dout1[1] ,
+    \cubev_rf1_dout1[0] }),
+    .dato({\cubev_rf1_dout1_reg[31] ,
+    \cubev_rf1_dout1_reg[30] ,
+    \cubev_rf1_dout1_reg[29] ,
+    \cubev_rf1_dout1_reg[28] ,
+    \cubev_rf1_dout1_reg[27] ,
+    \cubev_rf1_dout1_reg[26] ,
+    \cubev_rf1_dout1_reg[25] ,
+    \cubev_rf1_dout1_reg[24] ,
+    \cubev_rf1_dout1_reg[23] ,
+    \cubev_rf1_dout1_reg[22] ,
+    \cubev_rf1_dout1_reg[21] ,
+    \cubev_rf1_dout1_reg[20] ,
+    \cubev_rf1_dout1_reg[19] ,
+    \cubev_rf1_dout1_reg[18] ,
+    \cubev_rf1_dout1_reg[17] ,
+    \cubev_rf1_dout1_reg[16] ,
+    \cubev_rf1_dout1_reg[15] ,
+    \cubev_rf1_dout1_reg[14] ,
+    \cubev_rf1_dout1_reg[13] ,
+    \cubev_rf1_dout1_reg[12] ,
+    \cubev_rf1_dout1_reg[11] ,
+    \cubev_rf1_dout1_reg[10] ,
+    \cubev_rf1_dout1_reg[9] ,
+    \cubev_rf1_dout1_reg[8] ,
+    \cubev_rf1_dout1_reg[7] ,
+    \cubev_rf1_dout1_reg[6] ,
+    \cubev_rf1_dout1_reg[5] ,
+    \cubev_rf1_dout1_reg[4] ,
+    \cubev_rf1_dout1_reg[3] ,
+    \cubev_rf1_dout1_reg[2] ,
+    \cubev_rf1_dout1_reg[1] ,
+    \cubev_rf1_dout1_reg[0] }));
+ sky130_sram_1kbyte_1rw1r_32x256_8 cubev_rf2i (.csb0(cubev_rf2_csb0),
+    .csb1(cubev_rf2_csb1),
+    .web0(cubev_rf2_web0),
+    .clk0(cubev_rf2_clk0),
+    .clk1(cubev_rf2_clk1),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({\cubev_rf2_addr0[7] ,
+    \cubev_rf2_addr0[6] ,
+    \cubev_rf2_addr0[5] ,
+    \cubev_rf2_addr0[4] ,
+    \cubev_rf2_addr0[3] ,
+    \cubev_rf2_addr0[2] ,
+    \cubev_rf2_addr0[1] ,
+    \cubev_rf2_addr0[0] }),
+    .addr1({\cubev_rf2_addr1[7] ,
+    \cubev_rf2_addr1[6] ,
+    \cubev_rf2_addr1[5] ,
+    \cubev_rf2_addr1[4] ,
+    \cubev_rf2_addr1[3] ,
+    \cubev_rf2_addr1[2] ,
+    \cubev_rf2_addr1[1] ,
+    \cubev_rf2_addr1[0] }),
+    .din0({\cubev_rf2_din0[31] ,
+    \cubev_rf2_din0[30] ,
+    \cubev_rf2_din0[29] ,
+    \cubev_rf2_din0[28] ,
+    \cubev_rf2_din0[27] ,
+    \cubev_rf2_din0[26] ,
+    \cubev_rf2_din0[25] ,
+    \cubev_rf2_din0[24] ,
+    \cubev_rf2_din0[23] ,
+    \cubev_rf2_din0[22] ,
+    \cubev_rf2_din0[21] ,
+    \cubev_rf2_din0[20] ,
+    \cubev_rf2_din0[19] ,
+    \cubev_rf2_din0[18] ,
+    \cubev_rf2_din0[17] ,
+    \cubev_rf2_din0[16] ,
+    \cubev_rf2_din0[15] ,
+    \cubev_rf2_din0[14] ,
+    \cubev_rf2_din0[13] ,
+    \cubev_rf2_din0[12] ,
+    \cubev_rf2_din0[11] ,
+    \cubev_rf2_din0[10] ,
+    \cubev_rf2_din0[9] ,
+    \cubev_rf2_din0[8] ,
+    \cubev_rf2_din0[7] ,
+    \cubev_rf2_din0[6] ,
+    \cubev_rf2_din0[5] ,
+    \cubev_rf2_din0[4] ,
+    \cubev_rf2_din0[3] ,
+    \cubev_rf2_din0[2] ,
+    \cubev_rf2_din0[1] ,
+    \cubev_rf2_din0[0] }),
+    .dout0({\cubev_rf2_dout0[31] ,
+    \cubev_rf2_dout0[30] ,
+    \cubev_rf2_dout0[29] ,
+    \cubev_rf2_dout0[28] ,
+    \cubev_rf2_dout0[27] ,
+    \cubev_rf2_dout0[26] ,
+    \cubev_rf2_dout0[25] ,
+    \cubev_rf2_dout0[24] ,
+    \cubev_rf2_dout0[23] ,
+    \cubev_rf2_dout0[22] ,
+    \cubev_rf2_dout0[21] ,
+    \cubev_rf2_dout0[20] ,
+    \cubev_rf2_dout0[19] ,
+    \cubev_rf2_dout0[18] ,
+    \cubev_rf2_dout0[17] ,
+    \cubev_rf2_dout0[16] ,
+    \cubev_rf2_dout0[15] ,
+    \cubev_rf2_dout0[14] ,
+    \cubev_rf2_dout0[13] ,
+    \cubev_rf2_dout0[12] ,
+    \cubev_rf2_dout0[11] ,
+    \cubev_rf2_dout0[10] ,
+    \cubev_rf2_dout0[9] ,
+    \cubev_rf2_dout0[8] ,
+    \cubev_rf2_dout0[7] ,
+    \cubev_rf2_dout0[6] ,
+    \cubev_rf2_dout0[5] ,
+    \cubev_rf2_dout0[4] ,
+    \cubev_rf2_dout0[3] ,
+    \cubev_rf2_dout0[2] ,
+    \cubev_rf2_dout0[1] ,
+    \cubev_rf2_dout0[0] }),
+    .dout1({\cubev_rf2_dout1[31] ,
+    \cubev_rf2_dout1[30] ,
+    \cubev_rf2_dout1[29] ,
+    \cubev_rf2_dout1[28] ,
+    \cubev_rf2_dout1[27] ,
+    \cubev_rf2_dout1[26] ,
+    \cubev_rf2_dout1[25] ,
+    \cubev_rf2_dout1[24] ,
+    \cubev_rf2_dout1[23] ,
+    \cubev_rf2_dout1[22] ,
+    \cubev_rf2_dout1[21] ,
+    \cubev_rf2_dout1[20] ,
+    \cubev_rf2_dout1[19] ,
+    \cubev_rf2_dout1[18] ,
+    \cubev_rf2_dout1[17] ,
+    \cubev_rf2_dout1[16] ,
+    \cubev_rf2_dout1[15] ,
+    \cubev_rf2_dout1[14] ,
+    \cubev_rf2_dout1[13] ,
+    \cubev_rf2_dout1[12] ,
+    \cubev_rf2_dout1[11] ,
+    \cubev_rf2_dout1[10] ,
+    \cubev_rf2_dout1[9] ,
+    \cubev_rf2_dout1[8] ,
+    \cubev_rf2_dout1[7] ,
+    \cubev_rf2_dout1[6] ,
+    \cubev_rf2_dout1[5] ,
+    \cubev_rf2_dout1[4] ,
+    \cubev_rf2_dout1[3] ,
+    \cubev_rf2_dout1[2] ,
+    \cubev_rf2_dout1[1] ,
+    \cubev_rf2_dout1[0] }),
+    .wmask0({\cubev_rf2_wmask0[3] ,
+    \cubev_rf2_wmask0[2] ,
+    \cubev_rf2_wmask0[1] ,
+    \cubev_rf2_wmask0[0] }));
+ rb cubev_rf2i_rb (.clk(cubev_rf2_clk1),
+    .rstn(cubev_rf2_rstn),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .dati({\cubev_rf2_dout1[31] ,
+    \cubev_rf2_dout1[30] ,
+    \cubev_rf2_dout1[29] ,
+    \cubev_rf2_dout1[28] ,
+    \cubev_rf2_dout1[27] ,
+    \cubev_rf2_dout1[26] ,
+    \cubev_rf2_dout1[25] ,
+    \cubev_rf2_dout1[24] ,
+    \cubev_rf2_dout1[23] ,
+    \cubev_rf2_dout1[22] ,
+    \cubev_rf2_dout1[21] ,
+    \cubev_rf2_dout1[20] ,
+    \cubev_rf2_dout1[19] ,
+    \cubev_rf2_dout1[18] ,
+    \cubev_rf2_dout1[17] ,
+    \cubev_rf2_dout1[16] ,
+    \cubev_rf2_dout1[15] ,
+    \cubev_rf2_dout1[14] ,
+    \cubev_rf2_dout1[13] ,
+    \cubev_rf2_dout1[12] ,
+    \cubev_rf2_dout1[11] ,
+    \cubev_rf2_dout1[10] ,
+    \cubev_rf2_dout1[9] ,
+    \cubev_rf2_dout1[8] ,
+    \cubev_rf2_dout1[7] ,
+    \cubev_rf2_dout1[6] ,
+    \cubev_rf2_dout1[5] ,
+    \cubev_rf2_dout1[4] ,
+    \cubev_rf2_dout1[3] ,
+    \cubev_rf2_dout1[2] ,
+    \cubev_rf2_dout1[1] ,
+    \cubev_rf2_dout1[0] }),
+    .dato({\cubev_rf2_dout1_reg[31] ,
+    \cubev_rf2_dout1_reg[30] ,
+    \cubev_rf2_dout1_reg[29] ,
+    \cubev_rf2_dout1_reg[28] ,
+    \cubev_rf2_dout1_reg[27] ,
+    \cubev_rf2_dout1_reg[26] ,
+    \cubev_rf2_dout1_reg[25] ,
+    \cubev_rf2_dout1_reg[24] ,
+    \cubev_rf2_dout1_reg[23] ,
+    \cubev_rf2_dout1_reg[22] ,
+    \cubev_rf2_dout1_reg[21] ,
+    \cubev_rf2_dout1_reg[20] ,
+    \cubev_rf2_dout1_reg[19] ,
+    \cubev_rf2_dout1_reg[18] ,
+    \cubev_rf2_dout1_reg[17] ,
+    \cubev_rf2_dout1_reg[16] ,
+    \cubev_rf2_dout1_reg[15] ,
+    \cubev_rf2_dout1_reg[14] ,
+    \cubev_rf2_dout1_reg[13] ,
+    \cubev_rf2_dout1_reg[12] ,
+    \cubev_rf2_dout1_reg[11] ,
+    \cubev_rf2_dout1_reg[10] ,
+    \cubev_rf2_dout1_reg[9] ,
+    \cubev_rf2_dout1_reg[8] ,
+    \cubev_rf2_dout1_reg[7] ,
+    \cubev_rf2_dout1_reg[6] ,
+    \cubev_rf2_dout1_reg[5] ,
+    \cubev_rf2_dout1_reg[4] ,
+    \cubev_rf2_dout1_reg[3] ,
+    \cubev_rf2_dout1_reg[2] ,
+    \cubev_rf2_dout1_reg[1] ,
+    \cubev_rf2_dout1_reg[0] }));
+ minisoc mprj (.ca_dbus_ack(ca_dbus_ack),
+    .ca_dbus_com(ca_dbus_com),
+    .ca_dbus_valid(ca_dbus_valid),
+    .ca_match_ack(ca_match_ack),
+    .ca_match_valid(ca_match_valid),
+    .ca_time_ack(ca_time_ack),
+    .ca_time_valid(ca_time_valid),
+    .cubev_dhi_clk0(cubev_dhi_clk0),
+    .cubev_dhi_clk1(cubev_dhi_clk1),
+    .cubev_dhi_csb0(cubev_dhi_csb0),
+    .cubev_dhi_csb1(cubev_dhi_csb1),
+    .cubev_dhi_rstn(cubev_dhi_rstn),
+    .cubev_dhi_web0(cubev_dhi_web0),
+    .cubev_dli_clk0(cubev_dli_clk0),
+    .cubev_dli_clk1(cubev_dli_clk1),
+    .cubev_dli_csb0(cubev_dli_csb0),
+    .cubev_dli_csb1(cubev_dli_csb1),
+    .cubev_dli_rstn(cubev_dli_rstn),
+    .cubev_dli_web0(cubev_dli_web0),
+    .cubev_phi_clk1(cubev_phi_clk1),
+    .cubev_phi_csb1(cubev_phi_csb1),
+    .cubev_phi_rstn(cubev_phi_rstn),
+    .cubev_pli_clk1(cubev_pli_clk1),
+    .cubev_pli_csb1(cubev_pli_csb1),
+    .cubev_pli_rstn(cubev_pli_rstn),
+    .cubev_reg_0_clk0(cubev_reg_0_clk0),
+    .cubev_reg_0_clk1(cubev_reg_0_clk1),
+    .cubev_reg_0_csb0(cubev_reg_0_csb0),
+    .cubev_reg_0_csb1(cubev_reg_0_csb1),
+    .cubev_reg_0_rstn(cubev_reg_0_rstn),
+    .cubev_reg_0_web0(cubev_reg_0_web0),
+    .cubev_reg_1_clk0(cubev_reg_1_clk0),
+    .cubev_reg_1_clk1(cubev_reg_1_clk1),
+    .cubev_reg_1_csb0(cubev_reg_1_csb0),
+    .cubev_reg_1_csb1(cubev_reg_1_csb1),
+    .cubev_reg_1_rstn(cubev_reg_1_rstn),
+    .cubev_reg_1_web0(cubev_reg_1_web0),
+    .cubev_reg_2_clk0(cubev_reg_2_clk0),
+    .cubev_reg_2_clk1(cubev_reg_2_clk1),
+    .cubev_reg_2_csb0(cubev_reg_2_csb0),
+    .cubev_reg_2_csb1(cubev_reg_2_csb1),
+    .cubev_reg_2_rstn(cubev_reg_2_rstn),
+    .cubev_reg_2_web0(cubev_reg_2_web0),
+    .cubev_reg_3_clk0(cubev_reg_3_clk0),
+    .cubev_reg_3_clk1(cubev_reg_3_clk1),
+    .cubev_reg_3_csb0(cubev_reg_3_csb0),
+    .cubev_reg_3_csb1(cubev_reg_3_csb1),
+    .cubev_reg_3_rstn(cubev_reg_3_rstn),
+    .cubev_reg_3_web0(cubev_reg_3_web0),
+    .cubev_reg_4_clk0(cubev_reg_4_clk0),
+    .cubev_reg_4_clk1(cubev_reg_4_clk1),
+    .cubev_reg_4_csb0(cubev_reg_4_csb0),
+    .cubev_reg_4_csb1(cubev_reg_4_csb1),
+    .cubev_reg_4_rstn(cubev_reg_4_rstn),
+    .cubev_reg_4_web0(cubev_reg_4_web0),
+    .cubev_reg_5_clk0(cubev_reg_5_clk0),
+    .cubev_reg_5_clk1(cubev_reg_5_clk1),
+    .cubev_reg_5_csb0(cubev_reg_5_csb0),
+    .cubev_reg_5_csb1(cubev_reg_5_csb1),
+    .cubev_reg_5_rstn(cubev_reg_5_rstn),
+    .cubev_reg_5_web0(cubev_reg_5_web0),
+    .cubev_rf1_clk0(cubev_rf1_clk0),
+    .cubev_rf1_clk1(cubev_rf1_clk1),
+    .cubev_rf1_csb0(cubev_rf1_csb0),
+    .cubev_rf1_csb1(cubev_rf1_csb1),
+    .cubev_rf1_rstn(cubev_rf1_rstn),
+    .cubev_rf1_web0(cubev_rf1_web0),
+    .cubev_rf2_clk0(cubev_rf2_clk0),
+    .cubev_rf2_clk1(cubev_rf2_clk1),
+    .cubev_rf2_csb0(cubev_rf2_csb0),
+    .cubev_rf2_csb1(cubev_rf2_csb1),
+    .cubev_rf2_rstn(cubev_rf2_rstn),
+    .cubev_rf2_web0(cubev_rf2_web0),
+    .rstn_reg(rstn_reg),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .ca_command({\ca_command[31] ,
+    \ca_command[30] ,
+    \ca_command[29] ,
+    \ca_command[28] ,
+    \ca_command[27] ,
+    \ca_command[26] ,
+    \ca_command[25] ,
+    \ca_command[24] ,
+    \ca_command[23] ,
+    \ca_command[22] ,
+    \ca_command[21] ,
+    \ca_command[20] ,
+    \ca_command[19] ,
+    \ca_command[18] ,
+    \ca_command[17] ,
+    \ca_command[16] ,
+    \ca_command[15] ,
+    \ca_command[14] ,
+    \ca_command[13] ,
+    \ca_command[12] ,
+    \ca_command[11] ,
+    \ca_command[10] ,
+    \ca_command[9] ,
+    \ca_command[8] ,
+    \ca_command[7] ,
+    \ca_command[6] ,
+    \ca_command[5] ,
+    \ca_command[4] ,
+    \ca_command[3] ,
+    \ca_command[2] ,
+    \ca_command[1] ,
+    \ca_command[0] }),
+    .ca_dbus_data({\ca_dbus_data[31] ,
+    \ca_dbus_data[30] ,
+    \ca_dbus_data[29] ,
+    \ca_dbus_data[28] ,
+    \ca_dbus_data[27] ,
+    \ca_dbus_data[26] ,
+    \ca_dbus_data[25] ,
+    \ca_dbus_data[24] ,
+    \ca_dbus_data[23] ,
+    \ca_dbus_data[22] ,
+    \ca_dbus_data[21] ,
+    \ca_dbus_data[20] ,
+    \ca_dbus_data[19] ,
+    \ca_dbus_data[18] ,
+    \ca_dbus_data[17] ,
+    \ca_dbus_data[16] ,
+    \ca_dbus_data[15] ,
+    \ca_dbus_data[14] ,
+    \ca_dbus_data[13] ,
+    \ca_dbus_data[12] ,
+    \ca_dbus_data[11] ,
+    \ca_dbus_data[10] ,
+    \ca_dbus_data[9] ,
+    \ca_dbus_data[8] ,
+    \ca_dbus_data[7] ,
+    \ca_dbus_data[6] ,
+    \ca_dbus_data[5] ,
+    \ca_dbus_data[4] ,
+    \ca_dbus_data[3] ,
+    \ca_dbus_data[2] ,
+    \ca_dbus_data[1] ,
+    \ca_dbus_data[0] }),
+    .ca_dbus_tid({\ca_dbus_tid[2] ,
+    \ca_dbus_tid[1] ,
+    \ca_dbus_tid[0] }),
+    .ca_time_data({\ca_time_data[22] ,
+    \ca_time_data[21] ,
+    \ca_time_data[20] ,
+    \ca_time_data[19] ,
+    \ca_time_data[18] ,
+    \ca_time_data[17] ,
+    \ca_time_data[16] ,
+    \ca_time_data[15] ,
+    \ca_time_data[14] ,
+    \ca_time_data[13] ,
+    \ca_time_data[12] ,
+    \ca_time_data[11] ,
+    \ca_time_data[10] ,
+    \ca_time_data[9] ,
+    \ca_time_data[8] ,
+    \ca_time_data[7] ,
+    \ca_time_data[6] ,
+    \ca_time_data[5] ,
+    \ca_time_data[4] ,
+    \ca_time_data[3] ,
+    \ca_time_data[2] ,
+    \ca_time_data[1] ,
+    \ca_time_data[0] }),
+    .cubev_dhi_addr0({\cubev_dhi_addr0[7] ,
+    \cubev_dhi_addr0[6] ,
+    \cubev_dhi_addr0[5] ,
+    \cubev_dhi_addr0[4] ,
+    \cubev_dhi_addr0[3] ,
+    \cubev_dhi_addr0[2] ,
+    \cubev_dhi_addr0[1] ,
+    \cubev_dhi_addr0[0] }),
+    .cubev_dhi_addr1({\cubev_dhi_addr1[7] ,
+    \cubev_dhi_addr1[6] ,
+    \cubev_dhi_addr1[5] ,
+    \cubev_dhi_addr1[4] ,
+    \cubev_dhi_addr1[3] ,
+    \cubev_dhi_addr1[2] ,
+    \cubev_dhi_addr1[1] ,
+    \cubev_dhi_addr1[0] }),
+    .cubev_dhi_din0({\cubev_dhi_din0[31] ,
+    \cubev_dhi_din0[30] ,
+    \cubev_dhi_din0[29] ,
+    \cubev_dhi_din0[28] ,
+    \cubev_dhi_din0[27] ,
+    \cubev_dhi_din0[26] ,
+    \cubev_dhi_din0[25] ,
+    \cubev_dhi_din0[24] ,
+    \cubev_dhi_din0[23] ,
+    \cubev_dhi_din0[22] ,
+    \cubev_dhi_din0[21] ,
+    \cubev_dhi_din0[20] ,
+    \cubev_dhi_din0[19] ,
+    \cubev_dhi_din0[18] ,
+    \cubev_dhi_din0[17] ,
+    \cubev_dhi_din0[16] ,
+    \cubev_dhi_din0[15] ,
+    \cubev_dhi_din0[14] ,
+    \cubev_dhi_din0[13] ,
+    \cubev_dhi_din0[12] ,
+    \cubev_dhi_din0[11] ,
+    \cubev_dhi_din0[10] ,
+    \cubev_dhi_din0[9] ,
+    \cubev_dhi_din0[8] ,
+    \cubev_dhi_din0[7] ,
+    \cubev_dhi_din0[6] ,
+    \cubev_dhi_din0[5] ,
+    \cubev_dhi_din0[4] ,
+    \cubev_dhi_din0[3] ,
+    \cubev_dhi_din0[2] ,
+    \cubev_dhi_din0[1] ,
+    \cubev_dhi_din0[0] }),
+    .cubev_dhi_dout0({\cubev_dhi_dout0[31] ,
+    \cubev_dhi_dout0[30] ,
+    \cubev_dhi_dout0[29] ,
+    \cubev_dhi_dout0[28] ,
+    \cubev_dhi_dout0[27] ,
+    \cubev_dhi_dout0[26] ,
+    \cubev_dhi_dout0[25] ,
+    \cubev_dhi_dout0[24] ,
+    \cubev_dhi_dout0[23] ,
+    \cubev_dhi_dout0[22] ,
+    \cubev_dhi_dout0[21] ,
+    \cubev_dhi_dout0[20] ,
+    \cubev_dhi_dout0[19] ,
+    \cubev_dhi_dout0[18] ,
+    \cubev_dhi_dout0[17] ,
+    \cubev_dhi_dout0[16] ,
+    \cubev_dhi_dout0[15] ,
+    \cubev_dhi_dout0[14] ,
+    \cubev_dhi_dout0[13] ,
+    \cubev_dhi_dout0[12] ,
+    \cubev_dhi_dout0[11] ,
+    \cubev_dhi_dout0[10] ,
+    \cubev_dhi_dout0[9] ,
+    \cubev_dhi_dout0[8] ,
+    \cubev_dhi_dout0[7] ,
+    \cubev_dhi_dout0[6] ,
+    \cubev_dhi_dout0[5] ,
+    \cubev_dhi_dout0[4] ,
+    \cubev_dhi_dout0[3] ,
+    \cubev_dhi_dout0[2] ,
+    \cubev_dhi_dout0[1] ,
+    \cubev_dhi_dout0[0] }),
+    .cubev_dhi_dout1({\cubev_dhi_dout1_reg[31] ,
+    \cubev_dhi_dout1_reg[30] ,
+    \cubev_dhi_dout1_reg[29] ,
+    \cubev_dhi_dout1_reg[28] ,
+    \cubev_dhi_dout1_reg[27] ,
+    \cubev_dhi_dout1_reg[26] ,
+    \cubev_dhi_dout1_reg[25] ,
+    \cubev_dhi_dout1_reg[24] ,
+    \cubev_dhi_dout1_reg[23] ,
+    \cubev_dhi_dout1_reg[22] ,
+    \cubev_dhi_dout1_reg[21] ,
+    \cubev_dhi_dout1_reg[20] ,
+    \cubev_dhi_dout1_reg[19] ,
+    \cubev_dhi_dout1_reg[18] ,
+    \cubev_dhi_dout1_reg[17] ,
+    \cubev_dhi_dout1_reg[16] ,
+    \cubev_dhi_dout1_reg[15] ,
+    \cubev_dhi_dout1_reg[14] ,
+    \cubev_dhi_dout1_reg[13] ,
+    \cubev_dhi_dout1_reg[12] ,
+    \cubev_dhi_dout1_reg[11] ,
+    \cubev_dhi_dout1_reg[10] ,
+    \cubev_dhi_dout1_reg[9] ,
+    \cubev_dhi_dout1_reg[8] ,
+    \cubev_dhi_dout1_reg[7] ,
+    \cubev_dhi_dout1_reg[6] ,
+    \cubev_dhi_dout1_reg[5] ,
+    \cubev_dhi_dout1_reg[4] ,
+    \cubev_dhi_dout1_reg[3] ,
+    \cubev_dhi_dout1_reg[2] ,
+    \cubev_dhi_dout1_reg[1] ,
+    \cubev_dhi_dout1_reg[0] }),
+    .cubev_dhi_wmask0({\cubev_dhi_wmask0[3] ,
+    \cubev_dhi_wmask0[2] ,
+    \cubev_dhi_wmask0[1] ,
+    \cubev_dhi_wmask0[0] }),
+    .cubev_dli_addr0({\cubev_dli_addr0[7] ,
+    \cubev_dli_addr0[6] ,
+    \cubev_dli_addr0[5] ,
+    \cubev_dli_addr0[4] ,
+    \cubev_dli_addr0[3] ,
+    \cubev_dli_addr0[2] ,
+    \cubev_dli_addr0[1] ,
+    \cubev_dli_addr0[0] }),
+    .cubev_dli_addr1({\cubev_dli_addr1[7] ,
+    \cubev_dli_addr1[6] ,
+    \cubev_dli_addr1[5] ,
+    \cubev_dli_addr1[4] ,
+    \cubev_dli_addr1[3] ,
+    \cubev_dli_addr1[2] ,
+    \cubev_dli_addr1[1] ,
+    \cubev_dli_addr1[0] }),
+    .cubev_dli_din0({\cubev_dli_din0[31] ,
+    \cubev_dli_din0[30] ,
+    \cubev_dli_din0[29] ,
+    \cubev_dli_din0[28] ,
+    \cubev_dli_din0[27] ,
+    \cubev_dli_din0[26] ,
+    \cubev_dli_din0[25] ,
+    \cubev_dli_din0[24] ,
+    \cubev_dli_din0[23] ,
+    \cubev_dli_din0[22] ,
+    \cubev_dli_din0[21] ,
+    \cubev_dli_din0[20] ,
+    \cubev_dli_din0[19] ,
+    \cubev_dli_din0[18] ,
+    \cubev_dli_din0[17] ,
+    \cubev_dli_din0[16] ,
+    \cubev_dli_din0[15] ,
+    \cubev_dli_din0[14] ,
+    \cubev_dli_din0[13] ,
+    \cubev_dli_din0[12] ,
+    \cubev_dli_din0[11] ,
+    \cubev_dli_din0[10] ,
+    \cubev_dli_din0[9] ,
+    \cubev_dli_din0[8] ,
+    \cubev_dli_din0[7] ,
+    \cubev_dli_din0[6] ,
+    \cubev_dli_din0[5] ,
+    \cubev_dli_din0[4] ,
+    \cubev_dli_din0[3] ,
+    \cubev_dli_din0[2] ,
+    \cubev_dli_din0[1] ,
+    \cubev_dli_din0[0] }),
+    .cubev_dli_dout0({\cubev_dli_dout0[31] ,
+    \cubev_dli_dout0[30] ,
+    \cubev_dli_dout0[29] ,
+    \cubev_dli_dout0[28] ,
+    \cubev_dli_dout0[27] ,
+    \cubev_dli_dout0[26] ,
+    \cubev_dli_dout0[25] ,
+    \cubev_dli_dout0[24] ,
+    \cubev_dli_dout0[23] ,
+    \cubev_dli_dout0[22] ,
+    \cubev_dli_dout0[21] ,
+    \cubev_dli_dout0[20] ,
+    \cubev_dli_dout0[19] ,
+    \cubev_dli_dout0[18] ,
+    \cubev_dli_dout0[17] ,
+    \cubev_dli_dout0[16] ,
+    \cubev_dli_dout0[15] ,
+    \cubev_dli_dout0[14] ,
+    \cubev_dli_dout0[13] ,
+    \cubev_dli_dout0[12] ,
+    \cubev_dli_dout0[11] ,
+    \cubev_dli_dout0[10] ,
+    \cubev_dli_dout0[9] ,
+    \cubev_dli_dout0[8] ,
+    \cubev_dli_dout0[7] ,
+    \cubev_dli_dout0[6] ,
+    \cubev_dli_dout0[5] ,
+    \cubev_dli_dout0[4] ,
+    \cubev_dli_dout0[3] ,
+    \cubev_dli_dout0[2] ,
+    \cubev_dli_dout0[1] ,
+    \cubev_dli_dout0[0] }),
+    .cubev_dli_dout1({\cubev_dli_dout1_reg[31] ,
+    \cubev_dli_dout1_reg[30] ,
+    \cubev_dli_dout1_reg[29] ,
+    \cubev_dli_dout1_reg[28] ,
+    \cubev_dli_dout1_reg[27] ,
+    \cubev_dli_dout1_reg[26] ,
+    \cubev_dli_dout1_reg[25] ,
+    \cubev_dli_dout1_reg[24] ,
+    \cubev_dli_dout1_reg[23] ,
+    \cubev_dli_dout1_reg[22] ,
+    \cubev_dli_dout1_reg[21] ,
+    \cubev_dli_dout1_reg[20] ,
+    \cubev_dli_dout1_reg[19] ,
+    \cubev_dli_dout1_reg[18] ,
+    \cubev_dli_dout1_reg[17] ,
+    \cubev_dli_dout1_reg[16] ,
+    \cubev_dli_dout1_reg[15] ,
+    \cubev_dli_dout1_reg[14] ,
+    \cubev_dli_dout1_reg[13] ,
+    \cubev_dli_dout1_reg[12] ,
+    \cubev_dli_dout1_reg[11] ,
+    \cubev_dli_dout1_reg[10] ,
+    \cubev_dli_dout1_reg[9] ,
+    \cubev_dli_dout1_reg[8] ,
+    \cubev_dli_dout1_reg[7] ,
+    \cubev_dli_dout1_reg[6] ,
+    \cubev_dli_dout1_reg[5] ,
+    \cubev_dli_dout1_reg[4] ,
+    \cubev_dli_dout1_reg[3] ,
+    \cubev_dli_dout1_reg[2] ,
+    \cubev_dli_dout1_reg[1] ,
+    \cubev_dli_dout1_reg[0] }),
+    .cubev_dli_wmask0({\cubev_dli_wmask0[3] ,
+    \cubev_dli_wmask0[2] ,
+    \cubev_dli_wmask0[1] ,
+    \cubev_dli_wmask0[0] }),
+    .cubev_phi_addr1({\cubev_phi_addr1[7] ,
+    \cubev_phi_addr1[6] ,
+    \cubev_phi_addr1[5] ,
+    \cubev_phi_addr1[4] ,
+    \cubev_phi_addr1[3] ,
+    \cubev_phi_addr1[2] ,
+    \cubev_phi_addr1[1] ,
+    \cubev_phi_addr1[0] }),
+    .cubev_phi_dout1({\cubev_phi_dout1_reg[31] ,
+    \cubev_phi_dout1_reg[30] ,
+    \cubev_phi_dout1_reg[29] ,
+    \cubev_phi_dout1_reg[28] ,
+    \cubev_phi_dout1_reg[27] ,
+    \cubev_phi_dout1_reg[26] ,
+    \cubev_phi_dout1_reg[25] ,
+    \cubev_phi_dout1_reg[24] ,
+    \cubev_phi_dout1_reg[23] ,
+    \cubev_phi_dout1_reg[22] ,
+    \cubev_phi_dout1_reg[21] ,
+    \cubev_phi_dout1_reg[20] ,
+    \cubev_phi_dout1_reg[19] ,
+    \cubev_phi_dout1_reg[18] ,
+    \cubev_phi_dout1_reg[17] ,
+    \cubev_phi_dout1_reg[16] ,
+    \cubev_phi_dout1_reg[15] ,
+    \cubev_phi_dout1_reg[14] ,
+    \cubev_phi_dout1_reg[13] ,
+    \cubev_phi_dout1_reg[12] ,
+    \cubev_phi_dout1_reg[11] ,
+    \cubev_phi_dout1_reg[10] ,
+    \cubev_phi_dout1_reg[9] ,
+    \cubev_phi_dout1_reg[8] ,
+    \cubev_phi_dout1_reg[7] ,
+    \cubev_phi_dout1_reg[6] ,
+    \cubev_phi_dout1_reg[5] ,
+    \cubev_phi_dout1_reg[4] ,
+    \cubev_phi_dout1_reg[3] ,
+    \cubev_phi_dout1_reg[2] ,
+    \cubev_phi_dout1_reg[1] ,
+    \cubev_phi_dout1_reg[0] }),
+    .cubev_pli_addr1({\cubev_pli_addr1[7] ,
+    \cubev_pli_addr1[6] ,
+    \cubev_pli_addr1[5] ,
+    \cubev_pli_addr1[4] ,
+    \cubev_pli_addr1[3] ,
+    \cubev_pli_addr1[2] ,
+    \cubev_pli_addr1[1] ,
+    \cubev_pli_addr1[0] }),
+    .cubev_pli_dout1({\cubev_pli_dout1_reg[31] ,
+    \cubev_pli_dout1_reg[30] ,
+    \cubev_pli_dout1_reg[29] ,
+    \cubev_pli_dout1_reg[28] ,
+    \cubev_pli_dout1_reg[27] ,
+    \cubev_pli_dout1_reg[26] ,
+    \cubev_pli_dout1_reg[25] ,
+    \cubev_pli_dout1_reg[24] ,
+    \cubev_pli_dout1_reg[23] ,
+    \cubev_pli_dout1_reg[22] ,
+    \cubev_pli_dout1_reg[21] ,
+    \cubev_pli_dout1_reg[20] ,
+    \cubev_pli_dout1_reg[19] ,
+    \cubev_pli_dout1_reg[18] ,
+    \cubev_pli_dout1_reg[17] ,
+    \cubev_pli_dout1_reg[16] ,
+    \cubev_pli_dout1_reg[15] ,
+    \cubev_pli_dout1_reg[14] ,
+    \cubev_pli_dout1_reg[13] ,
+    \cubev_pli_dout1_reg[12] ,
+    \cubev_pli_dout1_reg[11] ,
+    \cubev_pli_dout1_reg[10] ,
+    \cubev_pli_dout1_reg[9] ,
+    \cubev_pli_dout1_reg[8] ,
+    \cubev_pli_dout1_reg[7] ,
+    \cubev_pli_dout1_reg[6] ,
+    \cubev_pli_dout1_reg[5] ,
+    \cubev_pli_dout1_reg[4] ,
+    \cubev_pli_dout1_reg[3] ,
+    \cubev_pli_dout1_reg[2] ,
+    \cubev_pli_dout1_reg[1] ,
+    \cubev_pli_dout1_reg[0] }),
+    .cubev_reg_0_addr0({\cubev_reg_0_addr0[7] ,
+    \cubev_reg_0_addr0[6] ,
+    \cubev_reg_0_addr0[5] ,
+    \cubev_reg_0_addr0[4] ,
+    \cubev_reg_0_addr0[3] ,
+    \cubev_reg_0_addr0[2] ,
+    \cubev_reg_0_addr0[1] ,
+    \cubev_reg_0_addr0[0] }),
+    .cubev_reg_0_addr1({\cubev_reg_0_addr1[7] ,
+    \cubev_reg_0_addr1[6] ,
+    \cubev_reg_0_addr1[5] ,
+    \cubev_reg_0_addr1[4] ,
+    \cubev_reg_0_addr1[3] ,
+    \cubev_reg_0_addr1[2] ,
+    \cubev_reg_0_addr1[1] ,
+    \cubev_reg_0_addr1[0] }),
+    .cubev_reg_0_din0({\cubev_reg_0_din0[31] ,
+    \cubev_reg_0_din0[30] ,
+    \cubev_reg_0_din0[29] ,
+    \cubev_reg_0_din0[28] ,
+    \cubev_reg_0_din0[27] ,
+    \cubev_reg_0_din0[26] ,
+    \cubev_reg_0_din0[25] ,
+    \cubev_reg_0_din0[24] ,
+    \cubev_reg_0_din0[23] ,
+    \cubev_reg_0_din0[22] ,
+    \cubev_reg_0_din0[21] ,
+    \cubev_reg_0_din0[20] ,
+    \cubev_reg_0_din0[19] ,
+    \cubev_reg_0_din0[18] ,
+    \cubev_reg_0_din0[17] ,
+    \cubev_reg_0_din0[16] ,
+    \cubev_reg_0_din0[15] ,
+    \cubev_reg_0_din0[14] ,
+    \cubev_reg_0_din0[13] ,
+    \cubev_reg_0_din0[12] ,
+    \cubev_reg_0_din0[11] ,
+    \cubev_reg_0_din0[10] ,
+    \cubev_reg_0_din0[9] ,
+    \cubev_reg_0_din0[8] ,
+    \cubev_reg_0_din0[7] ,
+    \cubev_reg_0_din0[6] ,
+    \cubev_reg_0_din0[5] ,
+    \cubev_reg_0_din0[4] ,
+    \cubev_reg_0_din0[3] ,
+    \cubev_reg_0_din0[2] ,
+    \cubev_reg_0_din0[1] ,
+    \cubev_reg_0_din0[0] }),
+    .cubev_reg_0_dout0({\cubev_reg_0_dout0[31] ,
+    \cubev_reg_0_dout0[30] ,
+    \cubev_reg_0_dout0[29] ,
+    \cubev_reg_0_dout0[28] ,
+    \cubev_reg_0_dout0[27] ,
+    \cubev_reg_0_dout0[26] ,
+    \cubev_reg_0_dout0[25] ,
+    \cubev_reg_0_dout0[24] ,
+    \cubev_reg_0_dout0[23] ,
+    \cubev_reg_0_dout0[22] ,
+    \cubev_reg_0_dout0[21] ,
+    \cubev_reg_0_dout0[20] ,
+    \cubev_reg_0_dout0[19] ,
+    \cubev_reg_0_dout0[18] ,
+    \cubev_reg_0_dout0[17] ,
+    \cubev_reg_0_dout0[16] ,
+    \cubev_reg_0_dout0[15] ,
+    \cubev_reg_0_dout0[14] ,
+    \cubev_reg_0_dout0[13] ,
+    \cubev_reg_0_dout0[12] ,
+    \cubev_reg_0_dout0[11] ,
+    \cubev_reg_0_dout0[10] ,
+    \cubev_reg_0_dout0[9] ,
+    \cubev_reg_0_dout0[8] ,
+    \cubev_reg_0_dout0[7] ,
+    \cubev_reg_0_dout0[6] ,
+    \cubev_reg_0_dout0[5] ,
+    \cubev_reg_0_dout0[4] ,
+    \cubev_reg_0_dout0[3] ,
+    \cubev_reg_0_dout0[2] ,
+    \cubev_reg_0_dout0[1] ,
+    \cubev_reg_0_dout0[0] }),
+    .cubev_reg_0_dout1({\cubev_reg_0_dout1_reg[31] ,
+    \cubev_reg_0_dout1_reg[30] ,
+    \cubev_reg_0_dout1_reg[29] ,
+    \cubev_reg_0_dout1_reg[28] ,
+    \cubev_reg_0_dout1_reg[27] ,
+    \cubev_reg_0_dout1_reg[26] ,
+    \cubev_reg_0_dout1_reg[25] ,
+    \cubev_reg_0_dout1_reg[24] ,
+    \cubev_reg_0_dout1_reg[23] ,
+    \cubev_reg_0_dout1_reg[22] ,
+    \cubev_reg_0_dout1_reg[21] ,
+    \cubev_reg_0_dout1_reg[20] ,
+    \cubev_reg_0_dout1_reg[19] ,
+    \cubev_reg_0_dout1_reg[18] ,
+    \cubev_reg_0_dout1_reg[17] ,
+    \cubev_reg_0_dout1_reg[16] ,
+    \cubev_reg_0_dout1_reg[15] ,
+    \cubev_reg_0_dout1_reg[14] ,
+    \cubev_reg_0_dout1_reg[13] ,
+    \cubev_reg_0_dout1_reg[12] ,
+    \cubev_reg_0_dout1_reg[11] ,
+    \cubev_reg_0_dout1_reg[10] ,
+    \cubev_reg_0_dout1_reg[9] ,
+    \cubev_reg_0_dout1_reg[8] ,
+    \cubev_reg_0_dout1_reg[7] ,
+    \cubev_reg_0_dout1_reg[6] ,
+    \cubev_reg_0_dout1_reg[5] ,
+    \cubev_reg_0_dout1_reg[4] ,
+    \cubev_reg_0_dout1_reg[3] ,
+    \cubev_reg_0_dout1_reg[2] ,
+    \cubev_reg_0_dout1_reg[1] ,
+    \cubev_reg_0_dout1_reg[0] }),
+    .cubev_reg_0_wmask0({\cubev_reg_0_wmask0[3] ,
+    \cubev_reg_0_wmask0[2] ,
+    \cubev_reg_0_wmask0[1] ,
+    \cubev_reg_0_wmask0[0] }),
+    .cubev_reg_1_addr0({\cubev_reg_1_addr0[7] ,
+    \cubev_reg_1_addr0[6] ,
+    \cubev_reg_1_addr0[5] ,
+    \cubev_reg_1_addr0[4] ,
+    \cubev_reg_1_addr0[3] ,
+    \cubev_reg_1_addr0[2] ,
+    \cubev_reg_1_addr0[1] ,
+    \cubev_reg_1_addr0[0] }),
+    .cubev_reg_1_addr1({\cubev_reg_1_addr1[7] ,
+    \cubev_reg_1_addr1[6] ,
+    \cubev_reg_1_addr1[5] ,
+    \cubev_reg_1_addr1[4] ,
+    \cubev_reg_1_addr1[3] ,
+    \cubev_reg_1_addr1[2] ,
+    \cubev_reg_1_addr1[1] ,
+    \cubev_reg_1_addr1[0] }),
+    .cubev_reg_1_din0({\cubev_reg_1_din0[31] ,
+    \cubev_reg_1_din0[30] ,
+    \cubev_reg_1_din0[29] ,
+    \cubev_reg_1_din0[28] ,
+    \cubev_reg_1_din0[27] ,
+    \cubev_reg_1_din0[26] ,
+    \cubev_reg_1_din0[25] ,
+    \cubev_reg_1_din0[24] ,
+    \cubev_reg_1_din0[23] ,
+    \cubev_reg_1_din0[22] ,
+    \cubev_reg_1_din0[21] ,
+    \cubev_reg_1_din0[20] ,
+    \cubev_reg_1_din0[19] ,
+    \cubev_reg_1_din0[18] ,
+    \cubev_reg_1_din0[17] ,
+    \cubev_reg_1_din0[16] ,
+    \cubev_reg_1_din0[15] ,
+    \cubev_reg_1_din0[14] ,
+    \cubev_reg_1_din0[13] ,
+    \cubev_reg_1_din0[12] ,
+    \cubev_reg_1_din0[11] ,
+    \cubev_reg_1_din0[10] ,
+    \cubev_reg_1_din0[9] ,
+    \cubev_reg_1_din0[8] ,
+    \cubev_reg_1_din0[7] ,
+    \cubev_reg_1_din0[6] ,
+    \cubev_reg_1_din0[5] ,
+    \cubev_reg_1_din0[4] ,
+    \cubev_reg_1_din0[3] ,
+    \cubev_reg_1_din0[2] ,
+    \cubev_reg_1_din0[1] ,
+    \cubev_reg_1_din0[0] }),
+    .cubev_reg_1_dout0({\cubev_reg_1_dout0[31] ,
+    \cubev_reg_1_dout0[30] ,
+    \cubev_reg_1_dout0[29] ,
+    \cubev_reg_1_dout0[28] ,
+    \cubev_reg_1_dout0[27] ,
+    \cubev_reg_1_dout0[26] ,
+    \cubev_reg_1_dout0[25] ,
+    \cubev_reg_1_dout0[24] ,
+    \cubev_reg_1_dout0[23] ,
+    \cubev_reg_1_dout0[22] ,
+    \cubev_reg_1_dout0[21] ,
+    \cubev_reg_1_dout0[20] ,
+    \cubev_reg_1_dout0[19] ,
+    \cubev_reg_1_dout0[18] ,
+    \cubev_reg_1_dout0[17] ,
+    \cubev_reg_1_dout0[16] ,
+    \cubev_reg_1_dout0[15] ,
+    \cubev_reg_1_dout0[14] ,
+    \cubev_reg_1_dout0[13] ,
+    \cubev_reg_1_dout0[12] ,
+    \cubev_reg_1_dout0[11] ,
+    \cubev_reg_1_dout0[10] ,
+    \cubev_reg_1_dout0[9] ,
+    \cubev_reg_1_dout0[8] ,
+    \cubev_reg_1_dout0[7] ,
+    \cubev_reg_1_dout0[6] ,
+    \cubev_reg_1_dout0[5] ,
+    \cubev_reg_1_dout0[4] ,
+    \cubev_reg_1_dout0[3] ,
+    \cubev_reg_1_dout0[2] ,
+    \cubev_reg_1_dout0[1] ,
+    \cubev_reg_1_dout0[0] }),
+    .cubev_reg_1_dout1({\cubev_reg_1_dout1_reg[31] ,
+    \cubev_reg_1_dout1_reg[30] ,
+    \cubev_reg_1_dout1_reg[29] ,
+    \cubev_reg_1_dout1_reg[28] ,
+    \cubev_reg_1_dout1_reg[27] ,
+    \cubev_reg_1_dout1_reg[26] ,
+    \cubev_reg_1_dout1_reg[25] ,
+    \cubev_reg_1_dout1_reg[24] ,
+    \cubev_reg_1_dout1_reg[23] ,
+    \cubev_reg_1_dout1_reg[22] ,
+    \cubev_reg_1_dout1_reg[21] ,
+    \cubev_reg_1_dout1_reg[20] ,
+    \cubev_reg_1_dout1_reg[19] ,
+    \cubev_reg_1_dout1_reg[18] ,
+    \cubev_reg_1_dout1_reg[17] ,
+    \cubev_reg_1_dout1_reg[16] ,
+    \cubev_reg_1_dout1_reg[15] ,
+    \cubev_reg_1_dout1_reg[14] ,
+    \cubev_reg_1_dout1_reg[13] ,
+    \cubev_reg_1_dout1_reg[12] ,
+    \cubev_reg_1_dout1_reg[11] ,
+    \cubev_reg_1_dout1_reg[10] ,
+    \cubev_reg_1_dout1_reg[9] ,
+    \cubev_reg_1_dout1_reg[8] ,
+    \cubev_reg_1_dout1_reg[7] ,
+    \cubev_reg_1_dout1_reg[6] ,
+    \cubev_reg_1_dout1_reg[5] ,
+    \cubev_reg_1_dout1_reg[4] ,
+    \cubev_reg_1_dout1_reg[3] ,
+    \cubev_reg_1_dout1_reg[2] ,
+    \cubev_reg_1_dout1_reg[1] ,
+    \cubev_reg_1_dout1_reg[0] }),
+    .cubev_reg_1_wmask0({\cubev_reg_1_wmask0[3] ,
+    \cubev_reg_1_wmask0[2] ,
+    \cubev_reg_1_wmask0[1] ,
+    \cubev_reg_1_wmask0[0] }),
+    .cubev_reg_2_addr0({\cubev_reg_2_addr0[7] ,
+    \cubev_reg_2_addr0[6] ,
+    \cubev_reg_2_addr0[5] ,
+    \cubev_reg_2_addr0[4] ,
+    \cubev_reg_2_addr0[3] ,
+    \cubev_reg_2_addr0[2] ,
+    \cubev_reg_2_addr0[1] ,
+    \cubev_reg_2_addr0[0] }),
+    .cubev_reg_2_addr1({\cubev_reg_2_addr1[7] ,
+    \cubev_reg_2_addr1[6] ,
+    \cubev_reg_2_addr1[5] ,
+    \cubev_reg_2_addr1[4] ,
+    \cubev_reg_2_addr1[3] ,
+    \cubev_reg_2_addr1[2] ,
+    \cubev_reg_2_addr1[1] ,
+    \cubev_reg_2_addr1[0] }),
+    .cubev_reg_2_din0({\cubev_reg_2_din0[31] ,
+    \cubev_reg_2_din0[30] ,
+    \cubev_reg_2_din0[29] ,
+    \cubev_reg_2_din0[28] ,
+    \cubev_reg_2_din0[27] ,
+    \cubev_reg_2_din0[26] ,
+    \cubev_reg_2_din0[25] ,
+    \cubev_reg_2_din0[24] ,
+    \cubev_reg_2_din0[23] ,
+    \cubev_reg_2_din0[22] ,
+    \cubev_reg_2_din0[21] ,
+    \cubev_reg_2_din0[20] ,
+    \cubev_reg_2_din0[19] ,
+    \cubev_reg_2_din0[18] ,
+    \cubev_reg_2_din0[17] ,
+    \cubev_reg_2_din0[16] ,
+    \cubev_reg_2_din0[15] ,
+    \cubev_reg_2_din0[14] ,
+    \cubev_reg_2_din0[13] ,
+    \cubev_reg_2_din0[12] ,
+    \cubev_reg_2_din0[11] ,
+    \cubev_reg_2_din0[10] ,
+    \cubev_reg_2_din0[9] ,
+    \cubev_reg_2_din0[8] ,
+    \cubev_reg_2_din0[7] ,
+    \cubev_reg_2_din0[6] ,
+    \cubev_reg_2_din0[5] ,
+    \cubev_reg_2_din0[4] ,
+    \cubev_reg_2_din0[3] ,
+    \cubev_reg_2_din0[2] ,
+    \cubev_reg_2_din0[1] ,
+    \cubev_reg_2_din0[0] }),
+    .cubev_reg_2_dout0({\cubev_reg_2_dout0[31] ,
+    \cubev_reg_2_dout0[30] ,
+    \cubev_reg_2_dout0[29] ,
+    \cubev_reg_2_dout0[28] ,
+    \cubev_reg_2_dout0[27] ,
+    \cubev_reg_2_dout0[26] ,
+    \cubev_reg_2_dout0[25] ,
+    \cubev_reg_2_dout0[24] ,
+    \cubev_reg_2_dout0[23] ,
+    \cubev_reg_2_dout0[22] ,
+    \cubev_reg_2_dout0[21] ,
+    \cubev_reg_2_dout0[20] ,
+    \cubev_reg_2_dout0[19] ,
+    \cubev_reg_2_dout0[18] ,
+    \cubev_reg_2_dout0[17] ,
+    \cubev_reg_2_dout0[16] ,
+    \cubev_reg_2_dout0[15] ,
+    \cubev_reg_2_dout0[14] ,
+    \cubev_reg_2_dout0[13] ,
+    \cubev_reg_2_dout0[12] ,
+    \cubev_reg_2_dout0[11] ,
+    \cubev_reg_2_dout0[10] ,
+    \cubev_reg_2_dout0[9] ,
+    \cubev_reg_2_dout0[8] ,
+    \cubev_reg_2_dout0[7] ,
+    \cubev_reg_2_dout0[6] ,
+    \cubev_reg_2_dout0[5] ,
+    \cubev_reg_2_dout0[4] ,
+    \cubev_reg_2_dout0[3] ,
+    \cubev_reg_2_dout0[2] ,
+    \cubev_reg_2_dout0[1] ,
+    \cubev_reg_2_dout0[0] }),
+    .cubev_reg_2_dout1({\cubev_reg_2_dout1_reg[31] ,
+    \cubev_reg_2_dout1_reg[30] ,
+    \cubev_reg_2_dout1_reg[29] ,
+    \cubev_reg_2_dout1_reg[28] ,
+    \cubev_reg_2_dout1_reg[27] ,
+    \cubev_reg_2_dout1_reg[26] ,
+    \cubev_reg_2_dout1_reg[25] ,
+    \cubev_reg_2_dout1_reg[24] ,
+    \cubev_reg_2_dout1_reg[23] ,
+    \cubev_reg_2_dout1_reg[22] ,
+    \cubev_reg_2_dout1_reg[21] ,
+    \cubev_reg_2_dout1_reg[20] ,
+    \cubev_reg_2_dout1_reg[19] ,
+    \cubev_reg_2_dout1_reg[18] ,
+    \cubev_reg_2_dout1_reg[17] ,
+    \cubev_reg_2_dout1_reg[16] ,
+    \cubev_reg_2_dout1_reg[15] ,
+    \cubev_reg_2_dout1_reg[14] ,
+    \cubev_reg_2_dout1_reg[13] ,
+    \cubev_reg_2_dout1_reg[12] ,
+    \cubev_reg_2_dout1_reg[11] ,
+    \cubev_reg_2_dout1_reg[10] ,
+    \cubev_reg_2_dout1_reg[9] ,
+    \cubev_reg_2_dout1_reg[8] ,
+    \cubev_reg_2_dout1_reg[7] ,
+    \cubev_reg_2_dout1_reg[6] ,
+    \cubev_reg_2_dout1_reg[5] ,
+    \cubev_reg_2_dout1_reg[4] ,
+    \cubev_reg_2_dout1_reg[3] ,
+    \cubev_reg_2_dout1_reg[2] ,
+    \cubev_reg_2_dout1_reg[1] ,
+    \cubev_reg_2_dout1_reg[0] }),
+    .cubev_reg_2_wmask0({\cubev_reg_2_wmask0[3] ,
+    \cubev_reg_2_wmask0[2] ,
+    \cubev_reg_2_wmask0[1] ,
+    \cubev_reg_2_wmask0[0] }),
+    .cubev_reg_3_addr0({\cubev_reg_3_addr0[7] ,
+    \cubev_reg_3_addr0[6] ,
+    \cubev_reg_3_addr0[5] ,
+    \cubev_reg_3_addr0[4] ,
+    \cubev_reg_3_addr0[3] ,
+    \cubev_reg_3_addr0[2] ,
+    \cubev_reg_3_addr0[1] ,
+    \cubev_reg_3_addr0[0] }),
+    .cubev_reg_3_addr1({\cubev_reg_3_addr1[7] ,
+    \cubev_reg_3_addr1[6] ,
+    \cubev_reg_3_addr1[5] ,
+    \cubev_reg_3_addr1[4] ,
+    \cubev_reg_3_addr1[3] ,
+    \cubev_reg_3_addr1[2] ,
+    \cubev_reg_3_addr1[1] ,
+    \cubev_reg_3_addr1[0] }),
+    .cubev_reg_3_din0({\cubev_reg_3_din0[31] ,
+    \cubev_reg_3_din0[30] ,
+    \cubev_reg_3_din0[29] ,
+    \cubev_reg_3_din0[28] ,
+    \cubev_reg_3_din0[27] ,
+    \cubev_reg_3_din0[26] ,
+    \cubev_reg_3_din0[25] ,
+    \cubev_reg_3_din0[24] ,
+    \cubev_reg_3_din0[23] ,
+    \cubev_reg_3_din0[22] ,
+    \cubev_reg_3_din0[21] ,
+    \cubev_reg_3_din0[20] ,
+    \cubev_reg_3_din0[19] ,
+    \cubev_reg_3_din0[18] ,
+    \cubev_reg_3_din0[17] ,
+    \cubev_reg_3_din0[16] ,
+    \cubev_reg_3_din0[15] ,
+    \cubev_reg_3_din0[14] ,
+    \cubev_reg_3_din0[13] ,
+    \cubev_reg_3_din0[12] ,
+    \cubev_reg_3_din0[11] ,
+    \cubev_reg_3_din0[10] ,
+    \cubev_reg_3_din0[9] ,
+    \cubev_reg_3_din0[8] ,
+    \cubev_reg_3_din0[7] ,
+    \cubev_reg_3_din0[6] ,
+    \cubev_reg_3_din0[5] ,
+    \cubev_reg_3_din0[4] ,
+    \cubev_reg_3_din0[3] ,
+    \cubev_reg_3_din0[2] ,
+    \cubev_reg_3_din0[1] ,
+    \cubev_reg_3_din0[0] }),
+    .cubev_reg_3_dout0({\cubev_reg_3_dout0[31] ,
+    \cubev_reg_3_dout0[30] ,
+    \cubev_reg_3_dout0[29] ,
+    \cubev_reg_3_dout0[28] ,
+    \cubev_reg_3_dout0[27] ,
+    \cubev_reg_3_dout0[26] ,
+    \cubev_reg_3_dout0[25] ,
+    \cubev_reg_3_dout0[24] ,
+    \cubev_reg_3_dout0[23] ,
+    \cubev_reg_3_dout0[22] ,
+    \cubev_reg_3_dout0[21] ,
+    \cubev_reg_3_dout0[20] ,
+    \cubev_reg_3_dout0[19] ,
+    \cubev_reg_3_dout0[18] ,
+    \cubev_reg_3_dout0[17] ,
+    \cubev_reg_3_dout0[16] ,
+    \cubev_reg_3_dout0[15] ,
+    \cubev_reg_3_dout0[14] ,
+    \cubev_reg_3_dout0[13] ,
+    \cubev_reg_3_dout0[12] ,
+    \cubev_reg_3_dout0[11] ,
+    \cubev_reg_3_dout0[10] ,
+    \cubev_reg_3_dout0[9] ,
+    \cubev_reg_3_dout0[8] ,
+    \cubev_reg_3_dout0[7] ,
+    \cubev_reg_3_dout0[6] ,
+    \cubev_reg_3_dout0[5] ,
+    \cubev_reg_3_dout0[4] ,
+    \cubev_reg_3_dout0[3] ,
+    \cubev_reg_3_dout0[2] ,
+    \cubev_reg_3_dout0[1] ,
+    \cubev_reg_3_dout0[0] }),
+    .cubev_reg_3_dout1({\cubev_reg_3_dout1_reg[31] ,
+    \cubev_reg_3_dout1_reg[30] ,
+    \cubev_reg_3_dout1_reg[29] ,
+    \cubev_reg_3_dout1_reg[28] ,
+    \cubev_reg_3_dout1_reg[27] ,
+    \cubev_reg_3_dout1_reg[26] ,
+    \cubev_reg_3_dout1_reg[25] ,
+    \cubev_reg_3_dout1_reg[24] ,
+    \cubev_reg_3_dout1_reg[23] ,
+    \cubev_reg_3_dout1_reg[22] ,
+    \cubev_reg_3_dout1_reg[21] ,
+    \cubev_reg_3_dout1_reg[20] ,
+    \cubev_reg_3_dout1_reg[19] ,
+    \cubev_reg_3_dout1_reg[18] ,
+    \cubev_reg_3_dout1_reg[17] ,
+    \cubev_reg_3_dout1_reg[16] ,
+    \cubev_reg_3_dout1_reg[15] ,
+    \cubev_reg_3_dout1_reg[14] ,
+    \cubev_reg_3_dout1_reg[13] ,
+    \cubev_reg_3_dout1_reg[12] ,
+    \cubev_reg_3_dout1_reg[11] ,
+    \cubev_reg_3_dout1_reg[10] ,
+    \cubev_reg_3_dout1_reg[9] ,
+    \cubev_reg_3_dout1_reg[8] ,
+    \cubev_reg_3_dout1_reg[7] ,
+    \cubev_reg_3_dout1_reg[6] ,
+    \cubev_reg_3_dout1_reg[5] ,
+    \cubev_reg_3_dout1_reg[4] ,
+    \cubev_reg_3_dout1_reg[3] ,
+    \cubev_reg_3_dout1_reg[2] ,
+    \cubev_reg_3_dout1_reg[1] ,
+    \cubev_reg_3_dout1_reg[0] }),
+    .cubev_reg_3_wmask0({\cubev_reg_3_wmask0[3] ,
+    \cubev_reg_3_wmask0[2] ,
+    \cubev_reg_3_wmask0[1] ,
+    \cubev_reg_3_wmask0[0] }),
+    .cubev_reg_4_addr0({\cubev_reg_4_addr0[7] ,
+    \cubev_reg_4_addr0[6] ,
+    \cubev_reg_4_addr0[5] ,
+    \cubev_reg_4_addr0[4] ,
+    \cubev_reg_4_addr0[3] ,
+    \cubev_reg_4_addr0[2] ,
+    \cubev_reg_4_addr0[1] ,
+    \cubev_reg_4_addr0[0] }),
+    .cubev_reg_4_addr1({\cubev_reg_4_addr1[7] ,
+    \cubev_reg_4_addr1[6] ,
+    \cubev_reg_4_addr1[5] ,
+    \cubev_reg_4_addr1[4] ,
+    \cubev_reg_4_addr1[3] ,
+    \cubev_reg_4_addr1[2] ,
+    \cubev_reg_4_addr1[1] ,
+    \cubev_reg_4_addr1[0] }),
+    .cubev_reg_4_din0({\cubev_reg_4_din0[31] ,
+    \cubev_reg_4_din0[30] ,
+    \cubev_reg_4_din0[29] ,
+    \cubev_reg_4_din0[28] ,
+    \cubev_reg_4_din0[27] ,
+    \cubev_reg_4_din0[26] ,
+    \cubev_reg_4_din0[25] ,
+    \cubev_reg_4_din0[24] ,
+    \cubev_reg_4_din0[23] ,
+    \cubev_reg_4_din0[22] ,
+    \cubev_reg_4_din0[21] ,
+    \cubev_reg_4_din0[20] ,
+    \cubev_reg_4_din0[19] ,
+    \cubev_reg_4_din0[18] ,
+    \cubev_reg_4_din0[17] ,
+    \cubev_reg_4_din0[16] ,
+    \cubev_reg_4_din0[15] ,
+    \cubev_reg_4_din0[14] ,
+    \cubev_reg_4_din0[13] ,
+    \cubev_reg_4_din0[12] ,
+    \cubev_reg_4_din0[11] ,
+    \cubev_reg_4_din0[10] ,
+    \cubev_reg_4_din0[9] ,
+    \cubev_reg_4_din0[8] ,
+    \cubev_reg_4_din0[7] ,
+    \cubev_reg_4_din0[6] ,
+    \cubev_reg_4_din0[5] ,
+    \cubev_reg_4_din0[4] ,
+    \cubev_reg_4_din0[3] ,
+    \cubev_reg_4_din0[2] ,
+    \cubev_reg_4_din0[1] ,
+    \cubev_reg_4_din0[0] }),
+    .cubev_reg_4_dout0({\cubev_reg_4_dout0[31] ,
+    \cubev_reg_4_dout0[30] ,
+    \cubev_reg_4_dout0[29] ,
+    \cubev_reg_4_dout0[28] ,
+    \cubev_reg_4_dout0[27] ,
+    \cubev_reg_4_dout0[26] ,
+    \cubev_reg_4_dout0[25] ,
+    \cubev_reg_4_dout0[24] ,
+    \cubev_reg_4_dout0[23] ,
+    \cubev_reg_4_dout0[22] ,
+    \cubev_reg_4_dout0[21] ,
+    \cubev_reg_4_dout0[20] ,
+    \cubev_reg_4_dout0[19] ,
+    \cubev_reg_4_dout0[18] ,
+    \cubev_reg_4_dout0[17] ,
+    \cubev_reg_4_dout0[16] ,
+    \cubev_reg_4_dout0[15] ,
+    \cubev_reg_4_dout0[14] ,
+    \cubev_reg_4_dout0[13] ,
+    \cubev_reg_4_dout0[12] ,
+    \cubev_reg_4_dout0[11] ,
+    \cubev_reg_4_dout0[10] ,
+    \cubev_reg_4_dout0[9] ,
+    \cubev_reg_4_dout0[8] ,
+    \cubev_reg_4_dout0[7] ,
+    \cubev_reg_4_dout0[6] ,
+    \cubev_reg_4_dout0[5] ,
+    \cubev_reg_4_dout0[4] ,
+    \cubev_reg_4_dout0[3] ,
+    \cubev_reg_4_dout0[2] ,
+    \cubev_reg_4_dout0[1] ,
+    \cubev_reg_4_dout0[0] }),
+    .cubev_reg_4_dout1({\cubev_reg_4_dout1_reg[31] ,
+    \cubev_reg_4_dout1_reg[30] ,
+    \cubev_reg_4_dout1_reg[29] ,
+    \cubev_reg_4_dout1_reg[28] ,
+    \cubev_reg_4_dout1_reg[27] ,
+    \cubev_reg_4_dout1_reg[26] ,
+    \cubev_reg_4_dout1_reg[25] ,
+    \cubev_reg_4_dout1_reg[24] ,
+    \cubev_reg_4_dout1_reg[23] ,
+    \cubev_reg_4_dout1_reg[22] ,
+    \cubev_reg_4_dout1_reg[21] ,
+    \cubev_reg_4_dout1_reg[20] ,
+    \cubev_reg_4_dout1_reg[19] ,
+    \cubev_reg_4_dout1_reg[18] ,
+    \cubev_reg_4_dout1_reg[17] ,
+    \cubev_reg_4_dout1_reg[16] ,
+    \cubev_reg_4_dout1_reg[15] ,
+    \cubev_reg_4_dout1_reg[14] ,
+    \cubev_reg_4_dout1_reg[13] ,
+    \cubev_reg_4_dout1_reg[12] ,
+    \cubev_reg_4_dout1_reg[11] ,
+    \cubev_reg_4_dout1_reg[10] ,
+    \cubev_reg_4_dout1_reg[9] ,
+    \cubev_reg_4_dout1_reg[8] ,
+    \cubev_reg_4_dout1_reg[7] ,
+    \cubev_reg_4_dout1_reg[6] ,
+    \cubev_reg_4_dout1_reg[5] ,
+    \cubev_reg_4_dout1_reg[4] ,
+    \cubev_reg_4_dout1_reg[3] ,
+    \cubev_reg_4_dout1_reg[2] ,
+    \cubev_reg_4_dout1_reg[1] ,
+    \cubev_reg_4_dout1_reg[0] }),
+    .cubev_reg_4_wmask0({\cubev_reg_4_wmask0[3] ,
+    \cubev_reg_4_wmask0[2] ,
+    \cubev_reg_4_wmask0[1] ,
+    \cubev_reg_4_wmask0[0] }),
+    .cubev_reg_5_addr0({\cubev_reg_5_addr0[7] ,
+    \cubev_reg_5_addr0[6] ,
+    \cubev_reg_5_addr0[5] ,
+    \cubev_reg_5_addr0[4] ,
+    \cubev_reg_5_addr0[3] ,
+    \cubev_reg_5_addr0[2] ,
+    \cubev_reg_5_addr0[1] ,
+    \cubev_reg_5_addr0[0] }),
+    .cubev_reg_5_addr1({\cubev_reg_5_addr1[7] ,
+    \cubev_reg_5_addr1[6] ,
+    \cubev_reg_5_addr1[5] ,
+    \cubev_reg_5_addr1[4] ,
+    \cubev_reg_5_addr1[3] ,
+    \cubev_reg_5_addr1[2] ,
+    \cubev_reg_5_addr1[1] ,
+    \cubev_reg_5_addr1[0] }),
+    .cubev_reg_5_din0({\cubev_reg_5_din0[31] ,
+    \cubev_reg_5_din0[30] ,
+    \cubev_reg_5_din0[29] ,
+    \cubev_reg_5_din0[28] ,
+    \cubev_reg_5_din0[27] ,
+    \cubev_reg_5_din0[26] ,
+    \cubev_reg_5_din0[25] ,
+    \cubev_reg_5_din0[24] ,
+    \cubev_reg_5_din0[23] ,
+    \cubev_reg_5_din0[22] ,
+    \cubev_reg_5_din0[21] ,
+    \cubev_reg_5_din0[20] ,
+    \cubev_reg_5_din0[19] ,
+    \cubev_reg_5_din0[18] ,
+    \cubev_reg_5_din0[17] ,
+    \cubev_reg_5_din0[16] ,
+    \cubev_reg_5_din0[15] ,
+    \cubev_reg_5_din0[14] ,
+    \cubev_reg_5_din0[13] ,
+    \cubev_reg_5_din0[12] ,
+    \cubev_reg_5_din0[11] ,
+    \cubev_reg_5_din0[10] ,
+    \cubev_reg_5_din0[9] ,
+    \cubev_reg_5_din0[8] ,
+    \cubev_reg_5_din0[7] ,
+    \cubev_reg_5_din0[6] ,
+    \cubev_reg_5_din0[5] ,
+    \cubev_reg_5_din0[4] ,
+    \cubev_reg_5_din0[3] ,
+    \cubev_reg_5_din0[2] ,
+    \cubev_reg_5_din0[1] ,
+    \cubev_reg_5_din0[0] }),
+    .cubev_reg_5_dout0({\cubev_reg_5_dout0[31] ,
+    \cubev_reg_5_dout0[30] ,
+    \cubev_reg_5_dout0[29] ,
+    \cubev_reg_5_dout0[28] ,
+    \cubev_reg_5_dout0[27] ,
+    \cubev_reg_5_dout0[26] ,
+    \cubev_reg_5_dout0[25] ,
+    \cubev_reg_5_dout0[24] ,
+    \cubev_reg_5_dout0[23] ,
+    \cubev_reg_5_dout0[22] ,
+    \cubev_reg_5_dout0[21] ,
+    \cubev_reg_5_dout0[20] ,
+    \cubev_reg_5_dout0[19] ,
+    \cubev_reg_5_dout0[18] ,
+    \cubev_reg_5_dout0[17] ,
+    \cubev_reg_5_dout0[16] ,
+    \cubev_reg_5_dout0[15] ,
+    \cubev_reg_5_dout0[14] ,
+    \cubev_reg_5_dout0[13] ,
+    \cubev_reg_5_dout0[12] ,
+    \cubev_reg_5_dout0[11] ,
+    \cubev_reg_5_dout0[10] ,
+    \cubev_reg_5_dout0[9] ,
+    \cubev_reg_5_dout0[8] ,
+    \cubev_reg_5_dout0[7] ,
+    \cubev_reg_5_dout0[6] ,
+    \cubev_reg_5_dout0[5] ,
+    \cubev_reg_5_dout0[4] ,
+    \cubev_reg_5_dout0[3] ,
+    \cubev_reg_5_dout0[2] ,
+    \cubev_reg_5_dout0[1] ,
+    \cubev_reg_5_dout0[0] }),
+    .cubev_reg_5_dout1({\cubev_reg_5_dout1_reg[31] ,
+    \cubev_reg_5_dout1_reg[30] ,
+    \cubev_reg_5_dout1_reg[29] ,
+    \cubev_reg_5_dout1_reg[28] ,
+    \cubev_reg_5_dout1_reg[27] ,
+    \cubev_reg_5_dout1_reg[26] ,
+    \cubev_reg_5_dout1_reg[25] ,
+    \cubev_reg_5_dout1_reg[24] ,
+    \cubev_reg_5_dout1_reg[23] ,
+    \cubev_reg_5_dout1_reg[22] ,
+    \cubev_reg_5_dout1_reg[21] ,
+    \cubev_reg_5_dout1_reg[20] ,
+    \cubev_reg_5_dout1_reg[19] ,
+    \cubev_reg_5_dout1_reg[18] ,
+    \cubev_reg_5_dout1_reg[17] ,
+    \cubev_reg_5_dout1_reg[16] ,
+    \cubev_reg_5_dout1_reg[15] ,
+    \cubev_reg_5_dout1_reg[14] ,
+    \cubev_reg_5_dout1_reg[13] ,
+    \cubev_reg_5_dout1_reg[12] ,
+    \cubev_reg_5_dout1_reg[11] ,
+    \cubev_reg_5_dout1_reg[10] ,
+    \cubev_reg_5_dout1_reg[9] ,
+    \cubev_reg_5_dout1_reg[8] ,
+    \cubev_reg_5_dout1_reg[7] ,
+    \cubev_reg_5_dout1_reg[6] ,
+    \cubev_reg_5_dout1_reg[5] ,
+    \cubev_reg_5_dout1_reg[4] ,
+    \cubev_reg_5_dout1_reg[3] ,
+    \cubev_reg_5_dout1_reg[2] ,
+    \cubev_reg_5_dout1_reg[1] ,
+    \cubev_reg_5_dout1_reg[0] }),
+    .cubev_reg_5_wmask0({\cubev_reg_5_wmask0[3] ,
+    \cubev_reg_5_wmask0[2] ,
+    \cubev_reg_5_wmask0[1] ,
+    \cubev_reg_5_wmask0[0] }),
+    .cubev_rf1_addr0({\cubev_rf1_addr0[7] ,
+    \cubev_rf1_addr0[6] ,
+    \cubev_rf1_addr0[5] ,
+    \cubev_rf1_addr0[4] ,
+    \cubev_rf1_addr0[3] ,
+    \cubev_rf1_addr0[2] ,
+    \cubev_rf1_addr0[1] ,
+    \cubev_rf1_addr0[0] }),
+    .cubev_rf1_addr1({\cubev_rf1_addr1[7] ,
+    \cubev_rf1_addr1[6] ,
+    \cubev_rf1_addr1[5] ,
+    \cubev_rf1_addr1[4] ,
+    \cubev_rf1_addr1[3] ,
+    \cubev_rf1_addr1[2] ,
+    \cubev_rf1_addr1[1] ,
+    \cubev_rf1_addr1[0] }),
+    .cubev_rf1_din0({\cubev_rf1_din0[31] ,
+    \cubev_rf1_din0[30] ,
+    \cubev_rf1_din0[29] ,
+    \cubev_rf1_din0[28] ,
+    \cubev_rf1_din0[27] ,
+    \cubev_rf1_din0[26] ,
+    \cubev_rf1_din0[25] ,
+    \cubev_rf1_din0[24] ,
+    \cubev_rf1_din0[23] ,
+    \cubev_rf1_din0[22] ,
+    \cubev_rf1_din0[21] ,
+    \cubev_rf1_din0[20] ,
+    \cubev_rf1_din0[19] ,
+    \cubev_rf1_din0[18] ,
+    \cubev_rf1_din0[17] ,
+    \cubev_rf1_din0[16] ,
+    \cubev_rf1_din0[15] ,
+    \cubev_rf1_din0[14] ,
+    \cubev_rf1_din0[13] ,
+    \cubev_rf1_din0[12] ,
+    \cubev_rf1_din0[11] ,
+    \cubev_rf1_din0[10] ,
+    \cubev_rf1_din0[9] ,
+    \cubev_rf1_din0[8] ,
+    \cubev_rf1_din0[7] ,
+    \cubev_rf1_din0[6] ,
+    \cubev_rf1_din0[5] ,
+    \cubev_rf1_din0[4] ,
+    \cubev_rf1_din0[3] ,
+    \cubev_rf1_din0[2] ,
+    \cubev_rf1_din0[1] ,
+    \cubev_rf1_din0[0] }),
+    .cubev_rf1_dout0({\cubev_rf1_dout0[31] ,
+    \cubev_rf1_dout0[30] ,
+    \cubev_rf1_dout0[29] ,
+    \cubev_rf1_dout0[28] ,
+    \cubev_rf1_dout0[27] ,
+    \cubev_rf1_dout0[26] ,
+    \cubev_rf1_dout0[25] ,
+    \cubev_rf1_dout0[24] ,
+    \cubev_rf1_dout0[23] ,
+    \cubev_rf1_dout0[22] ,
+    \cubev_rf1_dout0[21] ,
+    \cubev_rf1_dout0[20] ,
+    \cubev_rf1_dout0[19] ,
+    \cubev_rf1_dout0[18] ,
+    \cubev_rf1_dout0[17] ,
+    \cubev_rf1_dout0[16] ,
+    \cubev_rf1_dout0[15] ,
+    \cubev_rf1_dout0[14] ,
+    \cubev_rf1_dout0[13] ,
+    \cubev_rf1_dout0[12] ,
+    \cubev_rf1_dout0[11] ,
+    \cubev_rf1_dout0[10] ,
+    \cubev_rf1_dout0[9] ,
+    \cubev_rf1_dout0[8] ,
+    \cubev_rf1_dout0[7] ,
+    \cubev_rf1_dout0[6] ,
+    \cubev_rf1_dout0[5] ,
+    \cubev_rf1_dout0[4] ,
+    \cubev_rf1_dout0[3] ,
+    \cubev_rf1_dout0[2] ,
+    \cubev_rf1_dout0[1] ,
+    \cubev_rf1_dout0[0] }),
+    .cubev_rf1_dout1({\cubev_rf1_dout1_reg[31] ,
+    \cubev_rf1_dout1_reg[30] ,
+    \cubev_rf1_dout1_reg[29] ,
+    \cubev_rf1_dout1_reg[28] ,
+    \cubev_rf1_dout1_reg[27] ,
+    \cubev_rf1_dout1_reg[26] ,
+    \cubev_rf1_dout1_reg[25] ,
+    \cubev_rf1_dout1_reg[24] ,
+    \cubev_rf1_dout1_reg[23] ,
+    \cubev_rf1_dout1_reg[22] ,
+    \cubev_rf1_dout1_reg[21] ,
+    \cubev_rf1_dout1_reg[20] ,
+    \cubev_rf1_dout1_reg[19] ,
+    \cubev_rf1_dout1_reg[18] ,
+    \cubev_rf1_dout1_reg[17] ,
+    \cubev_rf1_dout1_reg[16] ,
+    \cubev_rf1_dout1_reg[15] ,
+    \cubev_rf1_dout1_reg[14] ,
+    \cubev_rf1_dout1_reg[13] ,
+    \cubev_rf1_dout1_reg[12] ,
+    \cubev_rf1_dout1_reg[11] ,
+    \cubev_rf1_dout1_reg[10] ,
+    \cubev_rf1_dout1_reg[9] ,
+    \cubev_rf1_dout1_reg[8] ,
+    \cubev_rf1_dout1_reg[7] ,
+    \cubev_rf1_dout1_reg[6] ,
+    \cubev_rf1_dout1_reg[5] ,
+    \cubev_rf1_dout1_reg[4] ,
+    \cubev_rf1_dout1_reg[3] ,
+    \cubev_rf1_dout1_reg[2] ,
+    \cubev_rf1_dout1_reg[1] ,
+    \cubev_rf1_dout1_reg[0] }),
+    .cubev_rf1_wmask0({\cubev_rf1_wmask0[3] ,
+    \cubev_rf1_wmask0[2] ,
+    \cubev_rf1_wmask0[1] ,
+    \cubev_rf1_wmask0[0] }),
+    .cubev_rf2_addr0({\cubev_rf2_addr0[7] ,
+    \cubev_rf2_addr0[6] ,
+    \cubev_rf2_addr0[5] ,
+    \cubev_rf2_addr0[4] ,
+    \cubev_rf2_addr0[3] ,
+    \cubev_rf2_addr0[2] ,
+    \cubev_rf2_addr0[1] ,
+    \cubev_rf2_addr0[0] }),
+    .cubev_rf2_addr1({\cubev_rf2_addr1[7] ,
+    \cubev_rf2_addr1[6] ,
+    \cubev_rf2_addr1[5] ,
+    \cubev_rf2_addr1[4] ,
+    \cubev_rf2_addr1[3] ,
+    \cubev_rf2_addr1[2] ,
+    \cubev_rf2_addr1[1] ,
+    \cubev_rf2_addr1[0] }),
+    .cubev_rf2_din0({\cubev_rf2_din0[31] ,
+    \cubev_rf2_din0[30] ,
+    \cubev_rf2_din0[29] ,
+    \cubev_rf2_din0[28] ,
+    \cubev_rf2_din0[27] ,
+    \cubev_rf2_din0[26] ,
+    \cubev_rf2_din0[25] ,
+    \cubev_rf2_din0[24] ,
+    \cubev_rf2_din0[23] ,
+    \cubev_rf2_din0[22] ,
+    \cubev_rf2_din0[21] ,
+    \cubev_rf2_din0[20] ,
+    \cubev_rf2_din0[19] ,
+    \cubev_rf2_din0[18] ,
+    \cubev_rf2_din0[17] ,
+    \cubev_rf2_din0[16] ,
+    \cubev_rf2_din0[15] ,
+    \cubev_rf2_din0[14] ,
+    \cubev_rf2_din0[13] ,
+    \cubev_rf2_din0[12] ,
+    \cubev_rf2_din0[11] ,
+    \cubev_rf2_din0[10] ,
+    \cubev_rf2_din0[9] ,
+    \cubev_rf2_din0[8] ,
+    \cubev_rf2_din0[7] ,
+    \cubev_rf2_din0[6] ,
+    \cubev_rf2_din0[5] ,
+    \cubev_rf2_din0[4] ,
+    \cubev_rf2_din0[3] ,
+    \cubev_rf2_din0[2] ,
+    \cubev_rf2_din0[1] ,
+    \cubev_rf2_din0[0] }),
+    .cubev_rf2_dout0({\cubev_rf2_dout0[31] ,
+    \cubev_rf2_dout0[30] ,
+    \cubev_rf2_dout0[29] ,
+    \cubev_rf2_dout0[28] ,
+    \cubev_rf2_dout0[27] ,
+    \cubev_rf2_dout0[26] ,
+    \cubev_rf2_dout0[25] ,
+    \cubev_rf2_dout0[24] ,
+    \cubev_rf2_dout0[23] ,
+    \cubev_rf2_dout0[22] ,
+    \cubev_rf2_dout0[21] ,
+    \cubev_rf2_dout0[20] ,
+    \cubev_rf2_dout0[19] ,
+    \cubev_rf2_dout0[18] ,
+    \cubev_rf2_dout0[17] ,
+    \cubev_rf2_dout0[16] ,
+    \cubev_rf2_dout0[15] ,
+    \cubev_rf2_dout0[14] ,
+    \cubev_rf2_dout0[13] ,
+    \cubev_rf2_dout0[12] ,
+    \cubev_rf2_dout0[11] ,
+    \cubev_rf2_dout0[10] ,
+    \cubev_rf2_dout0[9] ,
+    \cubev_rf2_dout0[8] ,
+    \cubev_rf2_dout0[7] ,
+    \cubev_rf2_dout0[6] ,
+    \cubev_rf2_dout0[5] ,
+    \cubev_rf2_dout0[4] ,
+    \cubev_rf2_dout0[3] ,
+    \cubev_rf2_dout0[2] ,
+    \cubev_rf2_dout0[1] ,
+    \cubev_rf2_dout0[0] }),
+    .cubev_rf2_dout1({\cubev_rf2_dout1_reg[31] ,
+    \cubev_rf2_dout1_reg[30] ,
+    \cubev_rf2_dout1_reg[29] ,
+    \cubev_rf2_dout1_reg[28] ,
+    \cubev_rf2_dout1_reg[27] ,
+    \cubev_rf2_dout1_reg[26] ,
+    \cubev_rf2_dout1_reg[25] ,
+    \cubev_rf2_dout1_reg[24] ,
+    \cubev_rf2_dout1_reg[23] ,
+    \cubev_rf2_dout1_reg[22] ,
+    \cubev_rf2_dout1_reg[21] ,
+    \cubev_rf2_dout1_reg[20] ,
+    \cubev_rf2_dout1_reg[19] ,
+    \cubev_rf2_dout1_reg[18] ,
+    \cubev_rf2_dout1_reg[17] ,
+    \cubev_rf2_dout1_reg[16] ,
+    \cubev_rf2_dout1_reg[15] ,
+    \cubev_rf2_dout1_reg[14] ,
+    \cubev_rf2_dout1_reg[13] ,
+    \cubev_rf2_dout1_reg[12] ,
+    \cubev_rf2_dout1_reg[11] ,
+    \cubev_rf2_dout1_reg[10] ,
+    \cubev_rf2_dout1_reg[9] ,
+    \cubev_rf2_dout1_reg[8] ,
+    \cubev_rf2_dout1_reg[7] ,
+    \cubev_rf2_dout1_reg[6] ,
+    \cubev_rf2_dout1_reg[5] ,
+    \cubev_rf2_dout1_reg[4] ,
+    \cubev_rf2_dout1_reg[3] ,
+    \cubev_rf2_dout1_reg[2] ,
+    \cubev_rf2_dout1_reg[1] ,
+    \cubev_rf2_dout1_reg[0] }),
+    .cubev_rf2_wmask0({\cubev_rf2_wmask0[3] ,
+    \cubev_rf2_wmask0[2] ,
+    \cubev_rf2_wmask0[1] ,
+    \cubev_rf2_wmask0[0] }),
+    .io_in({io_in[37],
+    io_in[36],
+    io_in[35],
+    io_in[34],
+    io_in[33],
+    io_in[32],
+    io_in[31],
+    io_in[30],
+    io_in[29],
+    io_in[28],
+    io_in[27],
+    io_in[26],
+    io_in[25],
+    io_in[24],
+    io_in[23],
+    io_in[22],
+    io_in[21],
+    io_in[20],
+    io_in[19],
+    io_in[18],
+    io_in[17],
+    io_in[16],
+    io_in[15],
+    io_in[14],
+    io_in[13],
+    io_in[12],
+    io_in[11],
+    io_in[10],
+    io_in[9],
+    io_in[8],
+    io_in[7],
+    io_in[6],
+    io_in[5],
+    io_in[4],
+    io_in[3],
+    io_in[2],
+    io_in[1],
+    io_in[0]}),
+    .io_oeb({io_oeb[37],
+    io_oeb[36],
+    io_oeb[35],
+    io_oeb[34],
+    io_oeb[33],
+    io_oeb[32],
+    io_oeb[31],
+    io_oeb[30],
+    io_oeb[29],
+    io_oeb[28],
+    io_oeb[27],
+    io_oeb[26],
+    io_oeb[25],
+    io_oeb[24],
+    io_oeb[23],
+    io_oeb[22],
+    io_oeb[21],
+    io_oeb[20],
+    io_oeb[19],
+    io_oeb[18],
+    io_oeb[17],
+    io_oeb[16],
+    io_oeb[15],
+    io_oeb[14],
+    io_oeb[13],
+    io_oeb[12],
+    io_oeb[11],
+    io_oeb[10],
+    io_oeb[9],
+    io_oeb[8],
+    io_oeb[7],
+    io_oeb[6],
+    io_oeb[5],
+    io_oeb[4],
+    io_oeb[3],
+    io_oeb[2],
+    io_oeb[1],
+    io_oeb[0]}),
+    .io_out({io_out[37],
+    io_out[36],
+    io_out[35],
+    io_out[34],
+    io_out[33],
+    io_out[32],
+    io_out[31],
+    io_out[30],
+    io_out[29],
+    io_out[28],
+    io_out[27],
+    io_out[26],
+    io_out[25],
+    io_out[24],
+    io_out[23],
+    io_out[22],
+    io_out[21],
+    io_out[20],
+    io_out[19],
+    io_out[18],
+    io_out[17],
+    io_out[16],
+    io_out[15],
+    io_out[14],
+    io_out[13],
+    io_out[12],
+    io_out[11],
+    io_out[10],
+    io_out[9],
+    io_out[8],
+    io_out[7],
+    io_out[6],
+    io_out[5],
+    io_out[4],
+    io_out[3],
+    io_out[2],
+    io_out[1],
+    io_out[0]}));
+endmodule
diff --git a/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag b/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..b505ee8
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag
@@ -0,0 +1,133760 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1670661060
+<< checkpaint >>
+rect -12658 -11586 596582 715522
+<< metal1 >>
+rect 137830 700612 137836 700664
+rect 137888 700652 137894 700664
+rect 173342 700652 173348 700664
+rect 137888 700624 173348 700652
+rect 137888 700612 137894 700624
+rect 173342 700612 173348 700624
+rect 173400 700612 173406 700664
+rect 105446 700544 105452 700596
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+rect 167730 700584 167736 700596
+rect 105504 700556 167736 700584
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+rect 267642 700544 267648 700596
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+rect 278866 700584 278872 700596
+rect 267700 700556 278872 700584
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+rect 278866 700544 278872 700556
+rect 278924 700544 278930 700596
+rect 315390 700544 315396 700596
+rect 315448 700584 315454 700596
+rect 332502 700584 332508 700596
+rect 315448 700556 332508 700584
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+rect 332502 700544 332508 700556
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+rect 516102 -1862 545546 -1306
+rect 546102 -1862 575546 -1306
+rect 576102 -1862 586302 -1306
+rect 586858 -1862 586890 -1306
+rect -2966 -1894 586890 -1862
+rect -3926 -2266 587850 -2234
+rect -3926 -2822 -3894 -2266
+rect -3338 -2822 9266 -2266
+rect 9822 -2822 39266 -2266
+rect 39822 -2822 69266 -2266
+rect 69822 -2822 99266 -2266
+rect 99822 -2822 129266 -2266
+rect 129822 -2822 159266 -2266
+rect 159822 -2822 189266 -2266
+rect 189822 -2822 219266 -2266
+rect 219822 -2822 249266 -2266
+rect 249822 -2822 279266 -2266
+rect 279822 -2822 309266 -2266
+rect 309822 -2822 339266 -2266
+rect 339822 -2822 369266 -2266
+rect 369822 -2822 399266 -2266
+rect 399822 -2822 429266 -2266
+rect 429822 -2822 459266 -2266
+rect 459822 -2822 489266 -2266
+rect 489822 -2822 519266 -2266
+rect 519822 -2822 549266 -2266
+rect 549822 -2822 579266 -2266
+rect 579822 -2822 587262 -2266
+rect 587818 -2822 587850 -2266
+rect -3926 -2854 587850 -2822
+rect -4886 -3226 588810 -3194
+rect -4886 -3782 -4854 -3226
+rect -4298 -3782 12986 -3226
+rect 13542 -3782 42986 -3226
+rect 43542 -3782 72986 -3226
+rect 73542 -3782 102986 -3226
+rect 103542 -3782 132986 -3226
+rect 133542 -3782 162986 -3226
+rect 163542 -3782 192986 -3226
+rect 193542 -3782 222986 -3226
+rect 223542 -3782 252986 -3226
+rect 253542 -3782 282986 -3226
+rect 283542 -3782 312986 -3226
+rect 313542 -3782 342986 -3226
+rect 343542 -3782 372986 -3226
+rect 373542 -3782 402986 -3226
+rect 403542 -3782 432986 -3226
+rect 433542 -3782 462986 -3226
+rect 463542 -3782 492986 -3226
+rect 493542 -3782 522986 -3226
+rect 523542 -3782 552986 -3226
+rect 553542 -3782 588222 -3226
+rect 588778 -3782 588810 -3226
+rect -4886 -3814 588810 -3782
+rect -5846 -4186 589770 -4154
+rect -5846 -4742 -5814 -4186
+rect -5258 -4742 16706 -4186
+rect 17262 -4742 46706 -4186
+rect 47262 -4742 76706 -4186
+rect 77262 -4742 106706 -4186
+rect 107262 -4742 136706 -4186
+rect 137262 -4742 166706 -4186
+rect 167262 -4742 196706 -4186
+rect 197262 -4742 226706 -4186
+rect 227262 -4742 256706 -4186
+rect 257262 -4742 286706 -4186
+rect 287262 -4742 316706 -4186
+rect 317262 -4742 346706 -4186
+rect 347262 -4742 376706 -4186
+rect 377262 -4742 406706 -4186
+rect 407262 -4742 436706 -4186
+rect 437262 -4742 466706 -4186
+rect 467262 -4742 496706 -4186
+rect 497262 -4742 526706 -4186
+rect 527262 -4742 556706 -4186
+rect 557262 -4742 589182 -4186
+rect 589738 -4742 589770 -4186
+rect -5846 -4774 589770 -4742
+rect -6806 -5146 590730 -5114
+rect -6806 -5702 -6774 -5146
+rect -6218 -5702 20426 -5146
+rect 20982 -5702 140426 -5146
+rect 140982 -5702 170426 -5146
+rect 170982 -5702 290426 -5146
+rect 290982 -5702 440426 -5146
+rect 440982 -5702 560426 -5146
+rect 560982 -5702 590142 -5146
+rect 590698 -5702 590730 -5146
+rect -6806 -5734 590730 -5702
+rect -7766 -6106 591690 -6074
+rect -7766 -6662 -7734 -6106
+rect -7178 -6662 24146 -6106
+rect 24702 -6662 144146 -6106
+rect 144702 -6662 174146 -6106
+rect 174702 -6662 294146 -6106
+rect 294702 -6662 444146 -6106
+rect 444702 -6662 564146 -6106
+rect 564702 -6662 591102 -6106
+rect 591658 -6662 591690 -6106
+rect -7766 -6694 591690 -6662
+rect -8726 -7066 592650 -7034
+rect -8726 -7622 -8694 -7066
+rect -8138 -7622 27866 -7066
+rect 28422 -7622 147866 -7066
+rect 148422 -7622 177866 -7066
+rect 178422 -7622 297866 -7066
+rect 298422 -7622 447866 -7066
+rect 448422 -7622 567866 -7066
+rect 568422 -7622 592062 -7066
+rect 592618 -7622 592650 -7066
+rect -8726 -7654 592650 -7622
+use cawb  cai
+timestamp 0
+transform 1 0 180000 0 1 20000
+box 0 0 100000 80000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_cai $PDK_PATH/libs.ref/sky130_sram_macros/maglef
+timestamp 1666464484
+transform -1 0 418676 0 -1 100724
+box 0 0 95956 79500
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_dhi
+timestamp 1666464484
+transform 1 0 180000 0 1 572000
+box 0 0 95956 79500
+use rb  cubev_dhi_rb
+timestamp 0
+transform 1 0 207600 0 1 655200
+box 934 0 42000 40000
+use rb  cubev_dli_rb
+timestamp 0
+transform 1 0 347600 0 1 655200
+box 934 0 42000 40000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_dli
+timestamp 1666464484
+transform 1 0 320000 0 1 572000
+box 0 0 95956 79500
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_phi
+timestamp 1666464484
+transform 1 0 460000 0 1 20000
+box 0 0 95956 79500
+use rb  cubev_phi_rb
+timestamp 0
+transform 1 0 487600 0 1 103200
+box 934 0 42000 40000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_pli
+timestamp 1666464484
+transform 1 0 40000 0 1 20000
+box 0 0 95956 79500
+use rb  cubev_pli_rb
+timestamp 0
+transform 1 0 67600 0 1 103200
+box 934 0 42000 40000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_reg_0
+timestamp 1666464484
+transform 1 0 460000 0 1 158000
+box 0 0 95956 79500
+use rb  cubev_reg_0_rb
+timestamp 0
+transform 1 0 487600 0 1 241200
+box 934 0 42000 40000
+use rb  cubev_reg_1_rb
+timestamp 0
+transform 1 0 487600 0 1 379200
+box 934 0 42000 40000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_reg_1
+timestamp 1666464484
+transform 1 0 460000 0 1 296000
+box 0 0 95956 79500
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_reg_2
+timestamp 1666464484
+transform 1 0 40000 0 1 158000
+box 0 0 95956 79500
+use rb  cubev_reg_2_rb
+timestamp 0
+transform 1 0 67600 0 1 241200
+box 934 0 42000 40000
+use rb  cubev_reg_3_rb
+timestamp 0
+transform 1 0 487600 0 1 509200
+box 934 0 42000 40000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_reg_3
+timestamp 1666464484
+transform 1 0 460000 0 1 426000
+box 0 0 95956 79500
+use rb  cubev_reg_4_rb
+timestamp 0
+transform 1 0 487600 0 1 655200
+box 934 0 42000 40000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_reg_4
+timestamp 1666464484
+transform 1 0 460000 0 1 572000
+box 0 0 95956 79500
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_reg_5
+timestamp 1666464484
+transform 1 0 40000 0 1 572000
+box 0 0 95956 79500
+use rb  cubev_reg_5_rb
+timestamp 0
+transform 1 0 67600 0 1 655200
+box 934 0 42000 40000
+use rb  cubev_rf1i_rb
+timestamp 0
+transform 1 0 67600 0 1 379200
+box 934 0 42000 40000
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_rf1i
+timestamp 1666464484
+transform 1 0 40000 0 1 296000
+box 0 0 95956 79500
+use sky130_sram_1kbyte_1rw1r_32x256_8  cubev_rf2i
+timestamp 1666464484
+transform 1 0 40000 0 1 426000
+box 0 0 95956 79500
+use rb  cubev_rf2i_rb
+timestamp 0
+transform 1 0 67600 0 1 509200
+box 934 0 42000 40000
+use minisoc  mprj
+timestamp 0
+transform 1 0 180000 0 1 140000
+box 0 0 240000 400000
+<< labels >>
+rlabel metal5 s -8726 482866 592650 483486 4 vccd1
+port 1 nsew
+rlabel metal5 s -8726 520306 592650 520926 4 vccd2
+port 2 nsew
+rlabel metal5 s -8726 527746 592650 528366 4 vdda1
+port 3 nsew
+rlabel metal5 s -8726 535186 592650 535806 4 vdda2
+port 4 nsew
+rlabel metal5 s -8726 531466 592650 532086 4 vssa1
+port 5 nsew
+rlabel metal5 s -8726 538906 592650 539526 4 vssa2
+port 6 nsew
+rlabel metal5 s -8726 486586 592650 487206 4 vssd1
+port 7 nsew
+rlabel metal5 s -8726 524026 592650 524646 4 vssd2
+port 8 nsew
+rlabel metal2 s 293342 122196 293342 122196 4 ca_command\[0\]
+port 9 nsew
+rlabel metal2 s 296102 122162 296102 122162 4 ca_command\[10\]
+port 10 nsew
+rlabel metal2 s 365769 139876 365769 139876 4 ca_command\[11\]
+port 11 nsew
+rlabel metal2 s 367648 140148 367648 140148 4 ca_command\[12\]
+port 12 nsew
+rlabel metal2 s 267966 99892 267966 99892 4 ca_command\[13\]
+port 13 nsew
+rlabel metal2 s 268472 99892 268472 99892 4 ca_command\[14\]
+port 14 nsew
+rlabel metal2 s 269314 99756 269314 99756 4 ca_command\[15\]
+port 15 nsew
+rlabel metal2 s 269622 99892 269622 99892 4 ca_command\[16\]
+port 16 nsew
+rlabel metal2 s 270128 99892 270128 99892 4 ca_command\[17\]
+port 17 nsew
+rlabel metal2 s 270726 99892 270726 99892 4 ca_command\[18\]
+port 18 nsew
+rlabel metal2 s 271232 99892 271232 99892 4 ca_command\[19\]
+port 19 nsew
+rlabel metal2 s 261296 99892 261296 99892 4 ca_command\[1\]
+port 20 nsew
+rlabel metal2 s 272028 99892 272028 99892 4 ca_command\[20\]
+port 21 nsew
+rlabel metal2 s 272336 99892 272336 99892 4 ca_command\[21\]
+port 22 nsew
+rlabel metal2 s 272888 99892 272888 99892 4 ca_command\[22\]
+port 23 nsew
+rlabel metal2 s 273486 99892 273486 99892 4 ca_command\[23\]
+port 24 nsew
+rlabel metal2 s 273992 99892 273992 99892 4 ca_command\[24\]
+port 25 nsew
+rlabel metal2 s 274788 99892 274788 99892 4 ca_command\[25\]
+port 26 nsew
+rlabel metal2 s 275096 99892 275096 99892 4 ca_command\[26\]
+port 27 nsew
+rlabel metal2 s 275648 99892 275648 99892 4 ca_command\[27\]
+port 28 nsew
+rlabel metal2 s 276292 99892 276292 99892 4 ca_command\[28\]
+port 29 nsew
+rlabel metal2 s 276752 99892 276752 99892 4 ca_command\[29\]
+port 30 nsew
+rlabel metal2 s 261848 99892 261848 99892 4 ca_command\[2\]
+port 31 nsew
+rlabel metal2 s 411286 137887 411286 137887 4 ca_command\[30\]
+port 32 nsew
+rlabel metal2 s 277810 99892 277810 99892 4 ca_command\[31\]
+port 33 nsew
+rlabel metal1 s 346058 136646 346058 136646 4 ca_command\[3\]
+port 34 nsew
+rlabel metal2 s 348726 136663 348726 136663 4 ca_command\[4\]
+port 35 nsew
+rlabel metal2 s 351118 137343 351118 137343 4 ca_command\[5\]
+port 36 nsew
+rlabel metal2 s 353572 140148 353572 140148 4 ca_command\[6\]
+port 37 nsew
+rlabel metal2 s 264562 99892 264562 99892 4 ca_command\[7\]
+port 38 nsew
+rlabel metal2 s 265160 99892 265160 99892 4 ca_command\[8\]
+port 39 nsew
+rlabel metal2 s 265666 99892 265666 99892 4 ca_command\[9\]
+port 40 nsew
+rlabel metal2 s 186369 139876 186369 139876 4 ca_dbus_ack
+port 41 nsew
+rlabel metal2 s 188248 140148 188248 140148 4 ca_dbus_com
+port 42 nsew
+rlabel metal2 s 197862 140148 197862 140148 4 ca_dbus_data\[0\]
+port 43 nsew
+rlabel metal2 s 222249 139876 222249 139876 4 ca_dbus_data\[10\]
+port 44 nsew
+rlabel metal2 s 224128 140148 224128 140148 4 ca_dbus_data\[11\]
+port 45 nsew
+rlabel metal2 s 234846 99892 234846 99892 4 ca_dbus_data\[12\]
+port 46 nsew
+rlabel metal2 s 235352 99892 235352 99892 4 ca_dbus_data\[13\]
+port 47 nsew
+rlabel metal2 s 236072 100035 236072 100035 4 ca_dbus_data\[14\]
+port 48 nsew
+rlabel metal2 s 236410 99892 236410 99892 4 ca_dbus_data\[15\]
+port 49 nsew
+rlabel metal2 s 237008 99892 237008 99892 4 ca_dbus_data\[16\]
+port 50 nsew
+rlabel metal2 s 237896 99892 237896 99892 4 ca_dbus_data\[17\]
+port 51 nsew
+rlabel metal2 s 238448 99892 238448 99892 4 ca_dbus_data\[18\]
+port 52 nsew
+rlabel metal2 s 239000 99892 239000 99892 4 ca_dbus_data\[19\]
+port 53 nsew
+rlabel metal2 s 200438 140148 200438 140148 4 ca_dbus_data\[1\]
+port 54 nsew
+rlabel metal2 s 239308 99892 239308 99892 4 ca_dbus_data\[20\]
+port 55 nsew
+rlabel metal2 s 248446 138057 248446 138057 4 ca_dbus_data\[21\]
+port 56 nsew
+rlabel metal2 s 250654 138703 250654 138703 4 ca_dbus_data\[22\]
+port 57 nsew
+rlabel metal2 s 253046 137343 253046 137343 4 ca_dbus_data\[23\]
+port 58 nsew
+rlabel metal2 s 255438 136663 255438 136663 4 ca_dbus_data\[24\]
+port 59 nsew
+rlabel metal2 s 241930 99892 241930 99892 4 ca_dbus_data\[25\]
+port 60 nsew
+rlabel metal2 s 242482 99892 242482 99892 4 ca_dbus_data\[26\]
+port 61 nsew
+rlabel metal2 s 243416 99892 243416 99892 4 ca_dbus_data\[27\]
+port 62 nsew
+rlabel metal2 s 243968 99892 243968 99892 4 ca_dbus_data\[28\]
+port 63 nsew
+rlabel metal2 s 267766 137887 267766 137887 4 ca_dbus_data\[29\]
+port 64 nsew
+rlabel metal2 s 203014 140148 203014 140148 4 ca_dbus_data\[2\]
+port 65 nsew
+rlabel metal2 s 269622 140148 269622 140148 4 ca_dbus_data\[30\]
+port 66 nsew
+rlabel metal2 s 272198 140148 272198 140148 4 ca_dbus_data\[31\]
+port 67 nsew
+rlabel metal2 s 205574 137207 205574 137207 4 ca_dbus_data\[3\]
+port 68 nsew
+rlabel metal2 s 208242 138771 208242 138771 4 ca_dbus_data\[4\]
+port 69 nsew
+rlabel metal2 s 210634 138805 210634 138805 4 ca_dbus_data\[5\]
+port 70 nsew
+rlabel metal2 s 213026 138839 213026 138839 4 ca_dbus_data\[6\]
+port 71 nsew
+rlabel metal2 s 215234 138873 215234 138873 4 ca_dbus_data\[7\]
+port 72 nsew
+rlabel metal2 s 217810 138907 217810 138907 4 ca_dbus_data\[8\]
+port 73 nsew
+rlabel metal2 s 219666 140148 219666 140148 4 ca_dbus_data\[9\]
+port 74 nsew
+rlabel metal2 s 190824 140148 190824 140148 4 ca_dbus_tid\[0\]
+port 75 nsew
+rlabel metal1 s 194580 136646 194580 136646 4 ca_dbus_tid\[1\]
+port 76 nsew
+rlabel metal2 s 196282 138737 196282 138737 4 ca_dbus_tid\[2\]
+port 77 nsew
+rlabel metal2 s 184322 138703 184322 138703 4 ca_dbus_valid
+port 78 nsew
+rlabel metal2 s 260146 99892 260146 99892 4 ca_match_ack
+port 79 nsew
+rlabel metal2 s 334344 140148 334344 140148 4 ca_match_valid
+port 80 nsew
+rlabel metal2 s 276660 140148 276660 140148 4 ca_time_ack
+port 81 nsew
+rlabel metal2 s 247112 100035 247112 100035 4 ca_time_data\[0\]
+port 82 nsew
+rlabel metal2 s 252708 99892 252708 99892 4 ca_time_data\[10\]
+port 83 nsew
+rlabel metal2 s 253016 99892 253016 99892 4 ca_time_data\[11\]
+port 84 nsew
+rlabel metal2 s 253568 99892 253568 99892 4 ca_time_data\[12\]
+port 85 nsew
+rlabel metal2 s 254166 99892 254166 99892 4 ca_time_data\[13\]
+port 86 nsew
+rlabel metal2 s 254672 99892 254672 99892 4 ca_time_data\[14\]
+port 87 nsew
+rlabel metal2 s 255468 99892 255468 99892 4 ca_time_data\[15\]
+port 88 nsew
+rlabel metal2 s 255776 99892 255776 99892 4 ca_time_data\[16\]
+port 89 nsew
+rlabel metal2 s 256328 99892 256328 99892 4 ca_time_data\[17\]
+port 90 nsew
+rlabel metal2 s 256926 99892 256926 99892 4 ca_time_data\[18\]
+port 91 nsew
+rlabel metal2 s 257432 99892 257432 99892 4 ca_time_data\[19\]
+port 92 nsew
+rlabel metal2 s 247450 99892 247450 99892 4 ca_time_data\[1\]
+port 93 nsew
+rlabel metal2 s 327306 140148 327306 140148 4 ca_time_data\[20\]
+port 94 nsew
+rlabel metal2 s 329889 139876 329889 139876 4 ca_time_data\[21\]
+port 95 nsew
+rlabel metal2 s 331768 140148 331768 140148 4 ca_time_data\[22\]
+port 96 nsew
+rlabel metal2 s 248048 99892 248048 99892 4 ca_time_data\[2\]
+port 97 nsew
+rlabel metal2 s 248646 99892 248646 99892 4 ca_time_data\[3\]
+port 98 nsew
+rlabel metal2 s 249106 99892 249106 99892 4 ca_time_data\[4\]
+port 99 nsew
+rlabel metal2 s 249872 100035 249872 100035 4 ca_time_data\[5\]
+port 100 nsew
+rlabel metal2 s 250256 99892 250256 99892 4 ca_time_data\[6\]
+port 101 nsew
+rlabel metal2 s 250808 99892 250808 99892 4 ca_time_data\[7\]
+port 102 nsew
+rlabel metal2 s 251406 99892 251406 99892 4 ca_time_data\[8\]
+port 103 nsew
+rlabel metal2 s 251912 99892 251912 99892 4 ca_time_data\[9\]
+port 104 nsew
+rlabel metal2 s 274666 138941 274666 138941 4 ca_time_valid
+port 105 nsew
+rlabel metal2 s 319102 101405 319102 101405 4 cubev_ca_addr0\[0\]
+port 106 nsew
+rlabel metal2 s 315606 24106 315606 24106 4 cubev_ca_addr0\[1\]
+port 107 nsew
+rlabel metal2 s 315698 25500 315698 25500 4 cubev_ca_addr0\[2\]
+port 108 nsew
+rlabel metal2 s 315422 24888 315422 24888 4 cubev_ca_addr0\[3\]
+port 109 nsew
+rlabel metal2 s 315514 26282 315514 26282 4 cubev_ca_addr0\[4\]
+port 110 nsew
+rlabel metal1 s 370346 19142 370346 19142 4 cubev_ca_addr0\[5\]
+port 111 nsew
+rlabel metal1 s 369426 20026 369426 20026 4 cubev_ca_addr0\[6\]
+port 112 nsew
+rlabel metal1 s 370668 17782 370668 17782 4 cubev_ca_addr0\[7\]
+port 113 nsew
+rlabel metal2 s 314410 43452 314410 43452 4 cubev_ca_addr1\[0\]
+port 114 nsew
+rlabel metal2 s 317262 82977 317262 82977 4 cubev_ca_addr1\[1\]
+port 115 nsew
+rlabel metal2 s 313214 83878 313214 83878 4 cubev_ca_addr1\[2\]
+port 116 nsew
+rlabel metal3 s 280776 72964 280776 72964 4 cubev_ca_addr1\[3\]
+port 117 nsew
+rlabel metal3 s 281006 73508 281006 73508 4 cubev_ca_addr1\[4\]
+port 118 nsew
+rlabel metal2 s 332718 102459 332718 102459 4 cubev_ca_addr1\[5\]
+port 119 nsew
+rlabel metal3 s 333454 102221 333454 102221 4 cubev_ca_addr1\[6\]
+port 120 nsew
+rlabel metal3 s 332971 102204 332971 102204 4 cubev_ca_addr1\[7\]
+port 121 nsew
+rlabel metal2 s 315330 65620 315330 65620 4 cubev_ca_clk0
+port 122 nsew
+rlabel metal2 s 326278 19771 326278 19771 4 cubev_ca_clk1
+port 123 nsew
+rlabel metal3 s 420141 94180 420141 94180 4 cubev_ca_csb0
+port 124 nsew
+rlabel metal2 s 316526 23171 316526 23171 4 cubev_ca_csb1
+port 125 nsew
+rlabel metal2 s 308706 69836 308706 69836 4 cubev_ca_din0\[0\]
+port 126 nsew
+rlabel metal4 s 385181 102748 385181 102748 4 cubev_ca_din0\[10\]
+port 127 nsew
+rlabel metal3 s 383801 102204 383801 102204 4 cubev_ca_din0\[11\]
+port 128 nsew
+rlabel metal3 s 280914 41956 280914 41956 4 cubev_ca_din0\[12\]
+port 129 nsew
+rlabel metal2 s 312662 73916 312662 73916 4 cubev_ca_din0\[13\]
+port 130 nsew
+rlabel metal2 s 315514 74664 315514 74664 4 cubev_ca_din0\[14\]
+port 131 nsew
+rlabel metal2 s 311834 74596 311834 74596 4 cubev_ca_din0\[15\]
+port 132 nsew
+rlabel metal3 s 281374 44132 281374 44132 4 cubev_ca_din0\[16\]
+port 133 nsew
+rlabel metal2 s 314226 75412 314226 75412 4 cubev_ca_din0\[17\]
+port 134 nsew
+rlabel metal2 s 370990 102986 370990 102986 4 cubev_ca_din0\[18\]
+port 135 nsew
+rlabel metal2 s 314318 75548 314318 75548 4 cubev_ca_din0\[19\]
+port 136 nsew
+rlabel metal3 s 280868 35972 280868 35972 4 cubev_ca_din0\[1\]
+port 137 nsew
+rlabel metal2 s 373014 102527 373014 102527 4 cubev_ca_din0\[20\]
+port 138 nsew
+rlabel metal3 s 372278 101507 372278 101507 4 cubev_ca_din0\[21\]
+port 139 nsew
+rlabel metal3 s 370645 102884 370645 102884 4 cubev_ca_din0\[22\]
+port 140 nsew
+rlabel metal3 s 370047 102204 370047 102204 4 cubev_ca_din0\[23\]
+port 141 nsew
+rlabel metal3 s 368782 101541 368782 101541 4 cubev_ca_din0\[24\]
+port 142 nsew
+rlabel metal3 s 367563 102204 367563 102204 4 cubev_ca_din0\[25\]
+port 143 nsew
+rlabel metal3 s 366137 102748 366137 102748 4 cubev_ca_din0\[26\]
+port 144 nsew
+rlabel metal3 s 364895 102204 364895 102204 4 cubev_ca_din0\[27\]
+port 145 nsew
+rlabel metal2 s 307142 78234 307142 78234 4 cubev_ca_din0\[28\]
+port 146 nsew
+rlabel metal2 s 314594 77044 314594 77044 4 cubev_ca_din0\[29\]
+port 147 nsew
+rlabel metal2 s 287730 71842 287730 71842 4 cubev_ca_din0\[2\]
+port 148 nsew
+rlabel metal2 s 315882 77112 315882 77112 4 cubev_ca_din0\[30\]
+port 149 nsew
+rlabel metal2 s 311098 79696 311098 79696 4 cubev_ca_din0\[31\]
+port 150 nsew
+rlabel metal3 s 281420 37060 281420 37060 4 cubev_ca_din0\[3\]
+port 151 nsew
+rlabel metal3 s 392081 102204 392081 102204 4 cubev_ca_din0\[4\]
+port 152 nsew
+rlabel metal3 s 390747 102204 390747 102204 4 cubev_ca_din0\[5\]
+port 153 nsew
+rlabel metal3 s 389505 102204 389505 102204 4 cubev_ca_din0\[6\]
+port 154 nsew
+rlabel metal3 s 388309 102748 388309 102748 4 cubev_ca_din0\[7\]
+port 155 nsew
+rlabel metal3 s 387113 102204 387113 102204 4 cubev_ca_din0\[8\]
+port 156 nsew
+rlabel metal4 s 386449 100980 386449 100980 4 cubev_ca_din0\[9\]
+port 157 nsew
+rlabel metal2 s 389390 101473 389390 101473 4 cubev_ca_dout0\[0\]
+port 158 nsew
+rlabel metal2 s 313030 81736 313030 81736 4 cubev_ca_dout0\[10\]
+port 159 nsew
+rlabel metal2 s 312938 83096 312938 83096 4 cubev_ca_dout0\[11\]
+port 160 nsew
+rlabel metal3 s 281006 59364 281006 59364 4 cubev_ca_dout0\[12\]
+port 161 nsew
+rlabel metal2 s 332810 102272 332810 102272 4 cubev_ca_dout0\[13\]
+port 162 nsew
+rlabel metal3 s 371519 102204 371519 102204 4 cubev_ca_dout0\[14\]
+port 163 nsew
+rlabel metal3 s 370185 102748 370185 102748 4 cubev_ca_dout0\[15\]
+port 164 nsew
+rlabel metal3 s 369518 101677 369518 101677 4 cubev_ca_dout0\[16\]
+port 165 nsew
+rlabel metal3 s 367609 102748 367609 102748 4 cubev_ca_dout0\[17\]
+port 166 nsew
+rlabel metal3 s 365999 102204 365999 102204 4 cubev_ca_dout0\[18\]
+port 167 nsew
+rlabel metal3 s 364941 102748 364941 102748 4 cubev_ca_dout0\[19\]
+port 168 nsew
+rlabel metal3 s 387895 102204 387895 102204 4 cubev_ca_dout0\[1\]
+port 169 nsew
+rlabel metal2 s 313858 86564 313858 86564 4 cubev_ca_dout0\[20\]
+port 170 nsew
+rlabel metal2 s 315974 86666 315974 86666 4 cubev_ca_dout0\[21\]
+port 171 nsew
+rlabel metal2 s 313122 86564 313122 86564 4 cubev_ca_dout0\[22\]
+port 172 nsew
+rlabel metal4 s 360341 102204 360341 102204 4 cubev_ca_dout0\[23\]
+port 173 nsew
+rlabel metal2 s 313766 87346 313766 87346 4 cubev_ca_dout0\[24\]
+port 174 nsew
+rlabel metal2 s 319562 101558 319562 101558 4 cubev_ca_dout0\[25\]
+port 175 nsew
+rlabel metal2 s 356086 102051 356086 102051 4 cubev_ca_dout0\[26\]
+port 176 nsew
+rlabel metal3 s 355143 102204 355143 102204 4 cubev_ca_dout0\[27\]
+port 177 nsew
+rlabel metal3 s 353809 102204 353809 102204 4 cubev_ca_dout0\[28\]
+port 178 nsew
+rlabel metal3 s 352475 102204 352475 102204 4 cubev_ca_dout0\[29\]
+port 179 nsew
+rlabel metal3 s 386653 102748 386653 102748 4 cubev_ca_dout0\[2\]
+port 180 nsew
+rlabel metal3 s 351141 102204 351141 102204 4 cubev_ca_dout0\[30\]
+port 181 nsew
+rlabel metal3 s 349807 103020 349807 103020 4 cubev_ca_dout0\[31\]
+port 182 nsew
+rlabel metal4 s 385043 102204 385043 102204 4 cubev_ca_dout0\[3\]
+port 183 nsew
+rlabel metal3 s 384123 102748 384123 102748 4 cubev_ca_dout0\[4\]
+port 184 nsew
+rlabel metal2 s 309902 83164 309902 83164 4 cubev_ca_dout0\[5\]
+port 185 nsew
+rlabel metal2 s 308338 83062 308338 83062 4 cubev_ca_dout0\[6\]
+port 186 nsew
+rlabel metal3 s 281328 56644 281328 56644 4 cubev_ca_dout0\[7\]
+port 187 nsew
+rlabel metal2 s 312846 83844 312846 83844 4 cubev_ca_dout0\[8\]
+port 188 nsew
+rlabel metal3 s 281420 57732 281420 57732 4 cubev_ca_dout0\[9\]
+port 189 nsew
+rlabel metal4 s 389257 19380 389257 19380 4 cubev_ca_dout1\[0\]
+port 190 nsew
+rlabel metal3 s 281052 81124 281052 81124 4 cubev_ca_dout1\[10\]
+port 191 nsew
+rlabel metal3 s 299199 81668 299199 81668 4 cubev_ca_dout1\[11\]
+port 192 nsew
+rlabel metal4 s 373796 18088 373796 18088 4 cubev_ca_dout1\[12\]
+port 193 nsew
+rlabel metal2 s 349830 18836 349830 18836 4 cubev_ca_dout1\[13\]
+port 194 nsew
+rlabel metal3 s 371565 17884 371565 17884 4 cubev_ca_dout1\[14\]
+port 195 nsew
+rlabel metal3 s 370093 17884 370093 17884 4 cubev_ca_dout1\[15\]
+port 196 nsew
+rlabel metal3 s 368759 17884 368759 17884 4 cubev_ca_dout1\[16\]
+port 197 nsew
+rlabel metal3 s 367563 17884 367563 17884 4 cubev_ca_dout1\[17\]
+port 198 nsew
+rlabel metal3 s 366091 17884 366091 17884 4 cubev_ca_dout1\[18\]
+port 199 nsew
+rlabel metal3 s 364895 17884 364895 17884 4 cubev_ca_dout1\[19\]
+port 200 nsew
+rlabel metal3 s 387895 17884 387895 17884 4 cubev_ca_dout1\[1\]
+port 201 nsew
+rlabel metal3 s 363607 17884 363607 17884 4 cubev_ca_dout1\[20\]
+port 202 nsew
+rlabel metal3 s 362181 16932 362181 16932 4 cubev_ca_dout1\[21\]
+port 203 nsew
+rlabel metal4 s 361675 17884 361675 17884 4 cubev_ca_dout1\[22\]
+port 204 nsew
+rlabel metal3 s 360295 17884 360295 17884 4 cubev_ca_dout1\[23\]
+port 205 nsew
+rlabel metal1 s 338468 6766 338468 6766 4 cubev_ca_dout1\[24\]
+port 206 nsew
+rlabel metal3 s 357627 17884 357627 17884 4 cubev_ca_dout1\[25\]
+port 207 nsew
+rlabel metal3 s 356385 17884 356385 17884 4 cubev_ca_dout1\[26\]
+port 208 nsew
+rlabel metal4 s 354476 18088 354476 18088 4 cubev_ca_dout1\[27\]
+port 209 nsew
+rlabel metal3 s 353809 17884 353809 17884 4 cubev_ca_dout1\[28\]
+port 210 nsew
+rlabel metal3 s 352475 17884 352475 17884 4 cubev_ca_dout1\[29\]
+port 211 nsew
+rlabel metal4 s 386469 17884 386469 17884 4 cubev_ca_dout1\[2\]
+port 212 nsew
+rlabel metal2 s 351486 18479 351486 18479 4 cubev_ca_dout1\[30\]
+port 213 nsew
+rlabel metal2 s 350382 19737 350382 19737 4 cubev_ca_dout1\[31\]
+port 214 nsew
+rlabel metal3 s 385273 17884 385273 17884 4 cubev_ca_dout1\[3\]
+port 215 nsew
+rlabel metal3 s 383893 17884 383893 17884 4 cubev_ca_dout1\[4\]
+port 216 nsew
+rlabel metal3 s 281167 78404 281167 78404 4 cubev_ca_dout1\[5\]
+port 217 nsew
+rlabel metal3 s 281420 78948 281420 78948 4 cubev_ca_dout1\[6\]
+port 218 nsew
+rlabel metal3 s 281144 79492 281144 79492 4 cubev_ca_dout1\[7\]
+port 219 nsew
+rlabel metal3 s 281098 80036 281098 80036 4 cubev_ca_dout1\[8\]
+port 220 nsew
+rlabel metal3 s 281420 80580 281420 80580 4 cubev_ca_dout1\[9\]
+port 221 nsew
+rlabel metal2 s 293250 67694 293250 67694 4 cubev_ca_web0
+port 222 nsew
+rlabel metal4 s 313812 68748 313812 68748 4 cubev_ca_wmask0\[0\]
+port 223 nsew
+rlabel metal4 s 400269 102204 400269 102204 4 cubev_ca_wmask0\[1\]
+port 224 nsew
+rlabel metal2 s 311558 69836 311558 69836 4 cubev_ca_wmask0\[2\]
+port 225 nsew
+rlabel metal2 s 291870 71366 291870 71366 4 cubev_ca_wmask0\[3\]
+port 226 nsew
+rlabel metal4 s 195814 571808 195814 571808 4 cubev_dhi_addr0\[0\]
+port 227 nsew
+rlabel metal3 s 179601 598060 179601 598060 4 cubev_dhi_addr0\[1\]
+port 228 nsew
+rlabel metal3 s 179371 600372 179371 600372 4 cubev_dhi_addr0\[2\]
+port 229 nsew
+rlabel metal3 s 179647 601732 179647 601732 4 cubev_dhi_addr0\[3\]
+port 230 nsew
+rlabel metal3 s 179463 603092 179463 603092 4 cubev_dhi_addr0\[4\]
+port 231 nsew
+rlabel metal3 s 179509 604588 179509 604588 4 cubev_dhi_addr0\[5\]
+port 232 nsew
+rlabel metal2 s 212076 539852 212076 539852 4 cubev_dhi_addr0\[6\]
+port 233 nsew
+rlabel metal2 s 212858 539852 212858 539852 4 cubev_dhi_addr0\[7\]
+port 234 nsew
+rlabel metal2 s 268716 539852 268716 539852 4 cubev_dhi_addr1\[0\]
+port 235 nsew
+rlabel metal2 s 269254 539852 269254 539852 4 cubev_dhi_addr1\[1\]
+port 236 nsew
+rlabel metal2 s 269990 539852 269990 539852 4 cubev_dhi_addr1\[2\]
+port 237 nsew
+rlabel metal2 s 270818 539852 270818 539852 4 cubev_dhi_addr1\[3\]
+port 238 nsew
+rlabel metal2 s 271860 539995 271860 539995 4 cubev_dhi_addr1\[4\]
+port 239 nsew
+rlabel metal2 s 272474 539852 272474 539852 4 cubev_dhi_addr1\[5\]
+port 240 nsew
+rlabel metal2 s 273440 539852 273440 539852 4 cubev_dhi_addr1\[6\]
+port 241 nsew
+rlabel metal2 s 274176 539852 274176 539852 4 cubev_dhi_addr1\[7\]
+port 242 nsew
+rlabel metal3 s 178733 578340 178733 578340 4 cubev_dhi_clk0
+port 243 nsew
+rlabel metal3 s 272481 654636 272481 654636 4 cubev_dhi_clk1
+port 244 nsew
+rlabel metal3 s 179325 578612 179325 578612 4 cubev_dhi_csb0
+port 245 nsew
+rlabel metal2 s 267766 554659 267766 554659 4 cubev_dhi_csb1
+port 246 nsew
+rlabel metal2 s 213976 539716 213976 539716 4 cubev_dhi_din0\[0\]
+port 247 nsew
+rlabel metal4 s 213494 571808 213494 571808 4 cubev_dhi_din0\[10\]
+port 248 nsew
+rlabel metal4 s 214718 571808 214718 571808 4 cubev_dhi_din0\[11\]
+port 249 nsew
+rlabel metal4 s 215806 571808 215806 571808 4 cubev_dhi_din0\[12\]
+port 250 nsew
+rlabel metal4 s 216894 571808 216894 571808 4 cubev_dhi_din0\[13\]
+port 251 nsew
+rlabel metal4 s 218118 571808 218118 571808 4 cubev_dhi_din0\[14\]
+port 252 nsew
+rlabel metal4 s 219342 571876 219342 571876 4 cubev_dhi_din0\[15\]
+port 253 nsew
+rlabel metal2 s 226980 539852 226980 539852 4 cubev_dhi_din0\[16\]
+port 254 nsew
+rlabel metal2 s 227900 539852 227900 539852 4 cubev_dhi_din0\[17\]
+port 255 nsew
+rlabel metal2 s 228636 539852 228636 539852 4 cubev_dhi_din0\[18\]
+port 256 nsew
+rlabel metal2 s 229510 539852 229510 539852 4 cubev_dhi_din0\[19\]
+port 257 nsew
+rlabel metal2 s 214514 539852 214514 539852 4 cubev_dhi_din0\[1\]
+port 258 nsew
+rlabel metal2 s 230536 539852 230536 539852 4 cubev_dhi_din0\[20\]
+port 259 nsew
+rlabel metal2 s 231120 539852 231120 539852 4 cubev_dhi_din0\[21\]
+port 260 nsew
+rlabel metal2 s 231994 539852 231994 539852 4 cubev_dhi_din0\[22\]
+port 261 nsew
+rlabel metal2 s 232730 539852 232730 539852 4 cubev_dhi_din0\[23\]
+port 262 nsew
+rlabel metal2 s 233558 539852 233558 539852 4 cubev_dhi_din0\[24\]
+port 263 nsew
+rlabel metal2 s 234600 540012 234600 540012 4 cubev_dhi_din0\[25\]
+port 264 nsew
+rlabel metal2 s 235260 539852 235260 539852 4 cubev_dhi_din0\[26\]
+port 265 nsew
+rlabel metal2 s 236180 539852 236180 539852 4 cubev_dhi_din0\[27\]
+port 266 nsew
+rlabel metal2 s 236916 539852 236916 539852 4 cubev_dhi_din0\[28\]
+port 267 nsew
+rlabel metal2 s 237744 539852 237744 539852 4 cubev_dhi_din0\[29\]
+port 268 nsew
+rlabel metal2 s 215434 539852 215434 539852 4 cubev_dhi_din0\[2\]
+port 269 nsew
+rlabel metal4 s 236750 571808 236750 571808 4 cubev_dhi_din0\[30\]
+port 270 nsew
+rlabel metal4 s 237974 571808 237974 571808 4 cubev_dhi_din0\[31\]
+port 271 nsew
+rlabel metal2 s 216216 539852 216216 539852 4 cubev_dhi_din0\[3\]
+port 272 nsew
+rlabel metal2 s 216998 539852 216998 539852 4 cubev_dhi_din0\[4\]
+port 273 nsew
+rlabel metal2 s 218116 539852 218116 539852 4 cubev_dhi_din0\[5\]
+port 274 nsew
+rlabel metal2 s 218700 539852 218700 539852 4 cubev_dhi_din0\[6\]
+port 275 nsew
+rlabel metal4 s 209958 571808 209958 571808 4 cubev_dhi_din0\[7\]
+port 276 nsew
+rlabel metal4 s 211182 571808 211182 571808 4 cubev_dhi_din0\[8\]
+port 277 nsew
+rlabel metal4 s 212270 571808 212270 571808 4 cubev_dhi_din0\[9\]
+port 278 nsew
+rlabel metal2 s 213670 566882 213670 566882 4 cubev_dhi_dout0\[0\]
+port 279 nsew
+rlabel metal2 s 248600 539852 248600 539852 4 cubev_dhi_dout0\[10\]
+port 280 nsew
+rlabel metal2 s 249336 539852 249336 539852 4 cubev_dhi_dout0\[11\]
+port 281 nsew
+rlabel metal2 s 250118 539852 250118 539852 4 cubev_dhi_dout0\[12\]
+port 282 nsew
+rlabel metal2 s 251236 539852 251236 539852 4 cubev_dhi_dout0\[13\]
+port 283 nsew
+rlabel metal2 s 251820 539852 251820 539852 4 cubev_dhi_dout0\[14\]
+port 284 nsew
+rlabel metal2 s 252694 539852 252694 539852 4 cubev_dhi_dout0\[15\]
+port 285 nsew
+rlabel metal2 s 253476 539852 253476 539852 4 cubev_dhi_dout0\[16\]
+port 286 nsew
+rlabel metal2 s 254258 539852 254258 539852 4 cubev_dhi_dout0\[17\]
+port 287 nsew
+rlabel metal2 s 255376 539852 255376 539852 4 cubev_dhi_dout0\[18\]
+port 288 nsew
+rlabel metal2 s 255960 539852 255960 539852 4 cubev_dhi_dout0\[19\]
+port 289 nsew
+rlabel metal4 s 210638 571808 210638 571808 4 cubev_dhi_dout0\[1\]
+port 290 nsew
+rlabel metal2 s 256880 539852 256880 539852 4 cubev_dhi_dout0\[20\]
+port 291 nsew
+rlabel metal2 s 257616 539852 257616 539852 4 cubev_dhi_dout0\[21\]
+port 292 nsew
+rlabel metal4 s 236886 571808 236886 571808 4 cubev_dhi_dout0\[22\]
+port 293 nsew
+rlabel metal2 s 238694 562747 238694 562747 4 cubev_dhi_dout0\[23\]
+port 294 nsew
+rlabel metal2 s 260100 539852 260100 539852 4 cubev_dhi_dout0\[24\]
+port 295 nsew
+rlabel metal2 s 260974 539852 260974 539852 4 cubev_dhi_dout0\[25\]
+port 296 nsew
+rlabel metal2 s 261710 539852 261710 539852 4 cubev_dhi_dout0\[26\]
+port 297 nsew
+rlabel metal2 s 262538 539852 262538 539852 4 cubev_dhi_dout0\[27\]
+port 298 nsew
+rlabel metal2 s 263580 539995 263580 539995 4 cubev_dhi_dout0\[28\]
+port 299 nsew
+rlabel metal2 s 253230 557192 253230 557192 4 cubev_dhi_dout0\[29\]
+port 300 nsew
+rlabel metal4 s 211862 571808 211862 571808 4 cubev_dhi_dout0\[2\]
+port 301 nsew
+rlabel metal2 s 265114 539852 265114 539852 4 cubev_dhi_dout0\[30\]
+port 302 nsew
+rlabel metal2 s 265896 539852 265896 539852 4 cubev_dhi_dout0\[31\]
+port 303 nsew
+rlabel metal4 s 213630 571808 213630 571808 4 cubev_dhi_dout0\[3\]
+port 304 nsew
+rlabel metal4 s 214174 571808 214174 571808 4 cubev_dhi_dout0\[4\]
+port 305 nsew
+rlabel metal4 s 215670 571808 215670 571808 4 cubev_dhi_dout0\[5\]
+port 306 nsew
+rlabel metal4 s 217030 571808 217030 571808 4 cubev_dhi_dout0\[6\]
+port 307 nsew
+rlabel metal4 s 218254 571808 218254 571808 4 cubev_dhi_dout0\[7\]
+port 308 nsew
+rlabel metal4 s 219206 571808 219206 571808 4 cubev_dhi_dout0\[8\]
+port 309 nsew
+rlabel metal2 s 247680 539852 247680 539852 4 cubev_dhi_dout0\[9\]
+port 310 nsew
+rlabel metal3 s 208932 655316 208932 655316 4 cubev_dhi_dout1\[0\]
+port 311 nsew
+rlabel metal4 s 222062 652894 222062 652894 4 cubev_dhi_dout1\[10\]
+port 312 nsew
+rlabel metal4 s 223150 652894 223150 652894 4 cubev_dhi_dout1\[11\]
+port 313 nsew
+rlabel metal4 s 224646 652894 224646 652894 4 cubev_dhi_dout1\[12\]
+port 314 nsew
+rlabel metal3 s 225492 655316 225492 655316 4 cubev_dhi_dout1\[13\]
+port 315 nsew
+rlabel metal3 s 226780 655316 226780 655316 4 cubev_dhi_dout1\[14\]
+port 316 nsew
+rlabel metal3 s 228068 655316 228068 655316 4 cubev_dhi_dout1\[15\]
+port 317 nsew
+rlabel metal3 s 229264 655316 229264 655316 4 cubev_dhi_dout1\[16\]
+port 318 nsew
+rlabel metal4 s 230621 654636 230621 654636 4 cubev_dhi_dout1\[17\]
+port 319 nsew
+rlabel metal2 s 231771 655044 231771 655044 4 cubev_dhi_dout1\[18\]
+port 320 nsew
+rlabel metal4 s 233243 655316 233243 655316 4 cubev_dhi_dout1\[19\]
+port 321 nsew
+rlabel metal3 s 210312 655316 210312 655316 4 cubev_dhi_dout1\[1\]
+port 322 nsew
+rlabel metal4 s 234485 654636 234485 654636 4 cubev_dhi_dout1\[20\]
+port 323 nsew
+rlabel metal3 s 235704 655316 235704 655316 4 cubev_dhi_dout1\[21\]
+port 324 nsew
+rlabel metal4 s 237022 652894 237022 652894 4 cubev_dhi_dout1\[22\]
+port 325 nsew
+rlabel metal4 s 238349 654636 238349 654636 4 cubev_dhi_dout1\[23\]
+port 326 nsew
+rlabel metal4 s 239470 652894 239470 652894 4 cubev_dhi_dout1\[24\]
+port 327 nsew
+rlabel metal4 s 240830 652894 240830 652894 4 cubev_dhi_dout1\[25\]
+port 328 nsew
+rlabel metal4 s 241891 654636 241891 654636 4 cubev_dhi_dout1\[26\]
+port 329 nsew
+rlabel metal3 s 243248 655316 243248 655316 4 cubev_dhi_dout1\[27\]
+port 330 nsew
+rlabel metal3 s 244536 655316 244536 655316 4 cubev_dhi_dout1\[28\]
+port 331 nsew
+rlabel metal4 s 245755 654636 245755 654636 4 cubev_dhi_dout1\[29\]
+port 332 nsew
+rlabel metal3 s 211600 655316 211600 655316 4 cubev_dhi_dout1\[2\]
+port 333 nsew
+rlabel metal4 s 247086 652894 247086 652894 4 cubev_dhi_dout1\[30\]
+port 334 nsew
+rlabel metal4 s 248331 655316 248331 655316 4 cubev_dhi_dout1\[31\]
+port 335 nsew
+rlabel metal4 s 213141 654228 213141 654228 4 cubev_dhi_dout1\[3\]
+port 336 nsew
+rlabel metal3 s 214337 655316 214337 655316 4 cubev_dhi_dout1\[4\]
+port 337 nsew
+rlabel metal4 s 215806 652894 215806 652894 4 cubev_dhi_dout1\[5\]
+port 338 nsew
+rlabel metal4 s 217166 652894 217166 652894 4 cubev_dhi_dout1\[6\]
+port 339 nsew
+rlabel metal4 s 218390 652894 218390 652894 4 cubev_dhi_dout1\[7\]
+port 340 nsew
+rlabel metal4 s 219478 652894 219478 652894 4 cubev_dhi_dout1\[8\]
+port 341 nsew
+rlabel metal4 s 220702 652894 220702 652894 4 cubev_dhi_dout1\[9\]
+port 342 nsew
+rlabel metal2 s 275340 539852 275340 539852 4 cubev_dhi_dout1_reg\[0\]
+port 343 nsew
+rlabel metal2 s 221612 695164 221612 695164 4 cubev_dhi_dout1_reg\[10\]
+port 344 nsew
+rlabel metal1 s 223054 694382 223054 694382 4 cubev_dhi_dout1_reg\[11\]
+port 345 nsew
+rlabel metal2 s 224188 695164 224188 695164 4 cubev_dhi_dout1_reg\[12\]
+port 346 nsew
+rlabel metal1 s 225630 694416 225630 694416 4 cubev_dhi_dout1_reg\[13\]
+port 347 nsew
+rlabel metal2 s 226764 695164 226764 695164 4 cubev_dhi_dout1_reg\[14\]
+port 348 nsew
+rlabel metal2 s 287378 539852 287378 539852 4 cubev_dhi_dout1_reg\[15\]
+port 349 nsew
+rlabel metal2 s 229340 695164 229340 695164 4 cubev_dhi_dout1_reg\[16\]
+port 350 nsew
+rlabel metal2 s 230782 694501 230782 694501 4 cubev_dhi_dout1_reg\[17\]
+port 351 nsew
+rlabel metal2 s 231672 694892 231672 694892 4 cubev_dhi_dout1_reg\[18\]
+port 352 nsew
+rlabel metal2 s 233358 694875 233358 694875 4 cubev_dhi_dout1_reg\[19\]
+port 353 nsew
+rlabel metal2 s 210020 695164 210020 695164 4 cubev_dhi_dout1_reg\[1\]
+port 354 nsew
+rlabel metal2 s 234554 694773 234554 694773 4 cubev_dhi_dout1_reg\[20\]
+port 355 nsew
+rlabel metal2 s 235780 695164 235780 695164 4 cubev_dhi_dout1_reg\[21\]
+port 356 nsew
+rlabel metal2 s 237068 695164 237068 695164 4 cubev_dhi_dout1_reg\[22\]
+port 357 nsew
+rlabel metal2 s 238310 695164 238310 695164 4 cubev_dhi_dout1_reg\[23\]
+port 358 nsew
+rlabel metal2 s 294876 539852 294876 539852 4 cubev_dhi_dout1_reg\[24\]
+port 359 nsew
+rlabel metal2 s 249642 695640 249642 695640 4 cubev_dhi_dout1_reg\[25\]
+port 360 nsew
+rlabel metal2 s 248630 694280 248630 694280 4 cubev_dhi_dout1_reg\[26\]
+port 361 nsew
+rlabel metal2 s 248538 697187 248538 697187 4 cubev_dhi_dout1_reg\[27\]
+port 362 nsew
+rlabel metal1 s 248722 697136 248722 697136 4 cubev_dhi_dout1_reg\[28\]
+port 363 nsew
+rlabel metal1 s 248630 697068 248630 697068 4 cubev_dhi_dout1_reg\[29\]
+port 364 nsew
+rlabel metal2 s 211308 695164 211308 695164 4 cubev_dhi_dout1_reg\[2\]
+port 365 nsew
+rlabel metal2 s 249090 675172 249090 675172 4 cubev_dhi_dout1_reg\[30\]
+port 366 nsew
+rlabel metal2 s 248660 695164 248660 695164 4 cubev_dhi_dout1_reg\[31\]
+port 367 nsew
+rlabel metal2 s 212566 694501 212566 694501 4 cubev_dhi_dout1_reg\[3\]
+port 368 nsew
+rlabel metal2 s 213792 695164 213792 695164 4 cubev_dhi_dout1_reg\[4\]
+port 369 nsew
+rlabel metal2 s 215126 695164 215126 695164 4 cubev_dhi_dout1_reg\[5\]
+port 370 nsew
+rlabel metal2 s 216460 695164 216460 695164 4 cubev_dhi_dout1_reg\[6\]
+port 371 nsew
+rlabel metal2 s 217748 695164 217748 695164 4 cubev_dhi_dout1_reg\[7\]
+port 372 nsew
+rlabel metal2 s 218990 695164 218990 695164 4 cubev_dhi_dout1_reg\[8\]
+port 373 nsew
+rlabel metal2 s 220324 695164 220324 695164 4 cubev_dhi_dout1_reg\[9\]
+port 374 nsew
+rlabel metal2 s 179354 599046 179354 599046 4 cubev_dhi_rstn
+port 375 nsew
+rlabel metal3 s 179739 579700 179739 579700 4 cubev_dhi_web0
+port 376 nsew
+rlabel metal4 s 197038 571808 197038 571808 4 cubev_dhi_wmask0\[0\]
+port 377 nsew
+rlabel metal4 s 198262 571808 198262 571808 4 cubev_dhi_wmask0\[1\]
+port 378 nsew
+rlabel metal4 s 199486 571808 199486 571808 4 cubev_dhi_wmask0\[2\]
+port 379 nsew
+rlabel metal2 s 206280 539852 206280 539852 4 cubev_dhi_wmask0\[3\]
+port 380 nsew
+rlabel metal2 s 308078 539852 308078 539852 4 cubev_dli_addr0\[0\]
+port 381 nsew
+rlabel metal2 s 309120 539995 309120 539995 4 cubev_dli_addr0\[1\]
+port 382 nsew
+rlabel metal2 s 310116 539852 310116 539852 4 cubev_dli_addr0\[2\]
+port 383 nsew
+rlabel metal2 s 310654 539852 310654 539852 4 cubev_dli_addr0\[3\]
+port 384 nsew
+rlabel metal2 s 311726 539852 311726 539852 4 cubev_dli_addr0\[4\]
+port 385 nsew
+rlabel metal2 s 312218 539852 312218 539852 4 cubev_dli_addr0\[5\]
+port 386 nsew
+rlabel metal2 s 313260 539995 313260 539995 4 cubev_dli_addr0\[6\]
+port 387 nsew
+rlabel metal2 s 313874 539852 313874 539852 4 cubev_dli_addr0\[7\]
+port 388 nsew
+rlabel metal2 s 369686 539852 369686 539852 4 cubev_dli_addr1\[0\]
+port 389 nsew
+rlabel metal2 s 370132 539852 370132 539852 4 cubev_dli_addr1\[1\]
+port 390 nsew
+rlabel metal2 s 371296 539852 371296 539852 4 cubev_dli_addr1\[2\]
+port 391 nsew
+rlabel metal2 s 371880 539852 371880 539852 4 cubev_dli_addr1\[3\]
+port 392 nsew
+rlabel metal2 s 372754 539852 372754 539852 4 cubev_dli_addr1\[4\]
+port 393 nsew
+rlabel metal2 s 373490 539852 373490 539852 4 cubev_dli_addr1\[5\]
+port 394 nsew
+rlabel metal4 s 405174 571808 405174 571808 4 cubev_dli_addr1\[6\]
+port 395 nsew
+rlabel metal4 s 405310 571808 405310 571808 4 cubev_dli_addr1\[7\]
+port 396 nsew
+rlabel metal2 s 302374 539852 302374 539852 4 cubev_dli_clk0
+port 397 nsew
+rlabel metal2 s 368076 539852 368076 539852 4 cubev_dli_clk1
+port 398 nsew
+rlabel metal2 s 303110 539852 303110 539852 4 cubev_dli_csb0
+port 399 nsew
+rlabel metal2 s 368614 539852 368614 539852 4 cubev_dli_csb1
+port 400 nsew
+rlabel metal2 s 315038 539852 315038 539852 4 cubev_dli_din0\[0\]
+port 401 nsew
+rlabel metal4 s 353494 571808 353494 571808 4 cubev_dli_din0\[10\]
+port 402 nsew
+rlabel metal1 s 338928 565250 338928 565250 4 cubev_dli_din0\[11\]
+port 403 nsew
+rlabel metal1 s 339618 563822 339618 563822 4 cubev_dli_din0\[12\]
+port 404 nsew
+rlabel metal1 s 340998 562462 340998 562462 4 cubev_dli_din0\[13\]
+port 405 nsew
+rlabel metal1 s 325956 543762 325956 543762 4 cubev_dli_din0\[14\]
+port 406 nsew
+rlabel metal1 s 343022 561102 343022 561102 4 cubev_dli_din0\[15\]
+port 407 nsew
+rlabel metal1 s 344080 549950 344080 549950 4 cubev_dli_din0\[16\]
+port 408 nsew
+rlabel metal2 s 328486 558597 328486 558597 4 cubev_dli_din0\[17\]
+port 409 nsew
+rlabel metal4 s 362878 571808 362878 571808 4 cubev_dli_din0\[18\]
+port 410 nsew
+rlabel metal1 s 330096 543762 330096 543762 4 cubev_dli_din0\[19\]
+port 411 nsew
+rlabel metal2 s 315530 539852 315530 539852 4 cubev_dli_din0\[1\]
+port 412 nsew
+rlabel metal2 s 331400 539852 331400 539852 4 cubev_dli_din0\[20\]
+port 413 nsew
+rlabel metal2 s 332136 539852 332136 539852 4 cubev_dli_din0\[21\]
+port 414 nsew
+rlabel metal2 s 332918 539852 332918 539852 4 cubev_dli_din0\[22\]
+port 415 nsew
+rlabel metal2 s 333960 540012 333960 540012 4 cubev_dli_din0\[23\]
+port 416 nsew
+rlabel metal2 s 334574 539852 334574 539852 4 cubev_dli_din0\[24\]
+port 417 nsew
+rlabel metal4 s 370902 571808 370902 571808 4 cubev_dli_din0\[25\]
+port 418 nsew
+rlabel metal4 s 372126 571808 372126 571808 4 cubev_dli_din0\[26\]
+port 419 nsew
+rlabel metal4 s 373350 571808 373350 571808 4 cubev_dli_din0\[27\]
+port 420 nsew
+rlabel metal4 s 373796 570180 373796 570180 4 cubev_dli_din0\[28\]
+port 421 nsew
+rlabel metal2 s 338760 539852 338760 539852 4 cubev_dli_din0\[29\]
+port 422 nsew
+rlabel metal2 s 316358 539852 316358 539852 4 cubev_dli_din0\[2\]
+port 423 nsew
+rlabel metal2 s 339634 539852 339634 539852 4 cubev_dli_din0\[30\]
+port 424 nsew
+rlabel metal2 s 340370 539852 340370 539852 4 cubev_dli_din0\[31\]
+port 425 nsew
+rlabel metal4 s 345198 571808 345198 571808 4 cubev_dli_din0\[3\]
+port 426 nsew
+rlabel metal4 s 346422 571808 346422 571808 4 cubev_dli_din0\[4\]
+port 427 nsew
+rlabel metal4 s 347646 571808 347646 571808 4 cubev_dli_din0\[5\]
+port 428 nsew
+rlabel metal4 s 348870 571808 348870 571808 4 cubev_dli_din0\[6\]
+port 429 nsew
+rlabel metal4 s 349958 571808 349958 571808 4 cubev_dli_din0\[7\]
+port 430 nsew
+rlabel metal4 s 351182 571808 351182 571808 4 cubev_dli_din0\[8\]
+port 431 nsew
+rlabel metal4 s 352270 571808 352270 571808 4 cubev_dli_din0\[9\]
+port 432 nsew
+rlabel metal4 s 349278 571808 349278 571808 4 cubev_dli_dout0\[0\]
+port 433 nsew
+rlabel metal2 s 349860 539852 349860 539852 4 cubev_dli_dout0\[10\]
+port 434 nsew
+rlabel metal2 s 350520 539995 350520 539995 4 cubev_dli_dout0\[11\]
+port 435 nsew
+rlabel metal2 s 351134 539852 351134 539852 4 cubev_dli_dout0\[12\]
+port 436 nsew
+rlabel metal2 s 352054 539852 352054 539852 4 cubev_dli_dout0\[13\]
+port 437 nsew
+rlabel metal2 s 352790 539852 352790 539852 4 cubev_dli_dout0\[14\]
+port 438 nsew
+rlabel metal2 s 353572 539852 353572 539852 4 cubev_dli_dout0\[15\]
+port 439 nsew
+rlabel metal4 s 369134 571808 369134 571808 4 cubev_dli_dout0\[16\]
+port 440 nsew
+rlabel metal4 s 370494 571808 370494 571808 4 cubev_dli_dout0\[17\]
+port 441 nsew
+rlabel metal4 s 372398 571808 372398 571808 4 cubev_dli_dout0\[18\]
+port 442 nsew
+rlabel metal4 s 373214 571808 373214 571808 4 cubev_dli_dout0\[19\]
+port 443 nsew
+rlabel metal4 s 350638 571808 350638 571808 4 cubev_dli_dout0\[1\]
+port 444 nsew
+rlabel metal2 s 357758 539852 357758 539852 4 cubev_dli_dout0\[20\]
+port 445 nsew
+rlabel metal2 s 358876 539852 358876 539852 4 cubev_dli_dout0\[21\]
+port 446 nsew
+rlabel metal2 s 359414 539852 359414 539852 4 cubev_dli_dout0\[22\]
+port 447 nsew
+rlabel metal2 s 360380 539852 360380 539852 4 cubev_dli_dout0\[23\]
+port 448 nsew
+rlabel metal2 s 361116 539852 361116 539852 4 cubev_dli_dout0\[24\]
+port 449 nsew
+rlabel metal2 s 361944 539852 361944 539852 4 cubev_dli_dout0\[25\]
+port 450 nsew
+rlabel metal2 s 363016 539852 363016 539852 4 cubev_dli_dout0\[26\]
+port 451 nsew
+rlabel metal2 s 363554 539852 363554 539852 4 cubev_dli_dout0\[27\]
+port 452 nsew
+rlabel metal2 s 364520 539852 364520 539852 4 cubev_dli_dout0\[28\]
+port 453 nsew
+rlabel metal2 s 365210 539852 365210 539852 4 cubev_dli_dout0\[29\]
+port 454 nsew
+rlabel metal4 s 351862 571808 351862 571808 4 cubev_dli_dout0\[2\]
+port 455 nsew
+rlabel metal2 s 366038 539852 366038 539852 4 cubev_dli_dout0\[30\]
+port 456 nsew
+rlabel metal2 s 367080 539995 367080 539995 4 cubev_dli_dout0\[31\]
+port 457 nsew
+rlabel metal4 s 353630 571808 353630 571808 4 cubev_dli_dout0\[3\]
+port 458 nsew
+rlabel metal4 s 354174 571808 354174 571808 4 cubev_dli_dout0\[4\]
+port 459 nsew
+rlabel metal2 s 345338 539852 345338 539852 4 cubev_dli_dout0\[5\]
+port 460 nsew
+rlabel metal2 s 346548 539852 346548 539852 4 cubev_dli_dout0\[6\]
+port 461 nsew
+rlabel metal2 s 347040 539852 347040 539852 4 cubev_dli_dout0\[7\]
+port 462 nsew
+rlabel metal2 s 347960 539852 347960 539852 4 cubev_dli_dout0\[8\]
+port 463 nsew
+rlabel metal2 s 348650 539852 348650 539852 4 cubev_dli_dout0\[9\]
+port 464 nsew
+rlabel metal3 s 349255 655316 349255 655316 4 cubev_dli_dout1\[0\]
+port 465 nsew
+rlabel metal3 s 361859 654636 361859 654636 4 cubev_dli_dout1\[10\]
+port 466 nsew
+rlabel metal3 s 363055 655316 363055 655316 4 cubev_dli_dout1\[11\]
+port 467 nsew
+rlabel metal3 s 364481 655316 364481 655316 4 cubev_dli_dout1\[12\]
+port 468 nsew
+rlabel metal4 s 365723 654636 365723 654636 4 cubev_dli_dout1\[13\]
+port 469 nsew
+rlabel metal3 s 366781 655316 366781 655316 4 cubev_dli_dout1\[14\]
+port 470 nsew
+rlabel metal3 s 368069 655316 368069 655316 4 cubev_dli_dout1\[15\]
+port 471 nsew
+rlabel metal3 s 369265 654636 369265 654636 4 cubev_dli_dout1\[16\]
+port 472 nsew
+rlabel metal3 s 370553 655316 370553 655316 4 cubev_dli_dout1\[17\]
+port 473 nsew
+rlabel metal3 s 371933 655316 371933 655316 4 cubev_dli_dout1\[18\]
+port 474 nsew
+rlabel metal3 s 373129 654636 373129 654636 4 cubev_dli_dout1\[19\]
+port 475 nsew
+rlabel metal3 s 350451 654636 350451 654636 4 cubev_dli_dout1\[1\]
+port 476 nsew
+rlabel metal4 s 374325 655316 374325 655316 4 cubev_dli_dout1\[20\]
+port 477 nsew
+rlabel metal3 s 375705 655316 375705 655316 4 cubev_dli_dout1\[21\]
+port 478 nsew
+rlabel metal4 s 376901 654636 376901 654636 4 cubev_dli_dout1\[22\]
+port 479 nsew
+rlabel metal3 s 378281 655316 378281 655316 4 cubev_dli_dout1\[23\]
+port 480 nsew
+rlabel metal4 s 379523 654772 379523 654772 4 cubev_dli_dout1\[24\]
+port 481 nsew
+rlabel metal4 s 380765 654636 380765 654636 4 cubev_dli_dout1\[25\]
+port 482 nsew
+rlabel metal3 s 381961 655316 381961 655316 4 cubev_dli_dout1\[26\]
+port 483 nsew
+rlabel metal3 s 383249 655316 383249 655316 4 cubev_dli_dout1\[27\]
+port 484 nsew
+rlabel metal3 s 384537 654636 384537 654636 4 cubev_dli_dout1\[28\]
+port 485 nsew
+rlabel metal3 s 385825 655316 385825 655316 4 cubev_dli_dout1\[29\]
+port 486 nsew
+rlabel metal3 s 351739 655316 351739 655316 4 cubev_dli_dout1\[2\]
+port 487 nsew
+rlabel metal3 s 387113 655316 387113 655316 4 cubev_dli_dout1\[30\]
+port 488 nsew
+rlabel metal3 s 388401 654636 388401 654636 4 cubev_dli_dout1\[31\]
+port 489 nsew
+rlabel metal3 s 352797 655316 352797 655316 4 cubev_dli_dout1\[3\]
+port 490 nsew
+rlabel metal3 s 354085 654636 354085 654636 4 cubev_dli_dout1\[4\]
+port 491 nsew
+rlabel metal3 s 355373 655316 355373 655316 4 cubev_dli_dout1\[5\]
+port 492 nsew
+rlabel metal3 s 356661 655316 356661 655316 4 cubev_dli_dout1\[6\]
+port 493 nsew
+rlabel metal3 s 357949 654636 357949 654636 4 cubev_dli_dout1\[7\]
+port 494 nsew
+rlabel metal3 s 359145 655316 359145 655316 4 cubev_dli_dout1\[8\]
+port 495 nsew
+rlabel metal3 s 360571 655316 360571 655316 4 cubev_dli_dout1\[9\]
+port 496 nsew
+rlabel metal2 s 348542 696310 348542 696310 4 cubev_dli_dout1_reg\[0\]
+port 497 nsew
+rlabel metal2 s 384636 539852 384636 539852 4 cubev_dli_dout1_reg\[10\]
+port 498 nsew
+rlabel metal2 s 385464 539852 385464 539852 4 cubev_dli_dout1_reg\[11\]
+port 499 nsew
+rlabel metal2 s 386246 539852 386246 539852 4 cubev_dli_dout1_reg\[12\]
+port 500 nsew
+rlabel metal2 s 387120 539852 387120 539852 4 cubev_dli_dout1_reg\[13\]
+port 501 nsew
+rlabel metal2 s 366574 696140 366574 696140 4 cubev_dli_dout1_reg\[14\]
+port 502 nsew
+rlabel metal1 s 368138 694348 368138 694348 4 cubev_dli_dout1_reg\[15\]
+port 503 nsew
+rlabel metal2 s 369150 696174 369150 696174 4 cubev_dli_dout1_reg\[16\]
+port 504 nsew
+rlabel metal1 s 370714 694382 370714 694382 4 cubev_dli_dout1_reg\[17\]
+port 505 nsew
+rlabel metal2 s 372002 694501 372002 694501 4 cubev_dli_dout1_reg\[18\]
+port 506 nsew
+rlabel metal2 s 373014 696208 373014 696208 4 cubev_dli_dout1_reg\[19\]
+port 507 nsew
+rlabel metal2 s 349830 696276 349830 696276 4 cubev_dli_dout1_reg\[1\]
+port 508 nsew
+rlabel metal2 s 392870 539852 392870 539852 4 cubev_dli_dout1_reg\[20\]
+port 509 nsew
+rlabel metal1 s 375866 694484 375866 694484 4 cubev_dli_dout1_reg\[21\]
+port 510 nsew
+rlabel metal2 s 376878 696242 376878 696242 4 cubev_dli_dout1_reg\[22\]
+port 511 nsew
+rlabel metal2 s 378442 694501 378442 694501 4 cubev_dli_dout1_reg\[23\]
+port 512 nsew
+rlabel metal2 s 379638 694603 379638 694603 4 cubev_dli_dout1_reg\[24\]
+port 513 nsew
+rlabel metal2 s 380742 696276 380742 696276 4 cubev_dli_dout1_reg\[25\]
+port 514 nsew
+rlabel metal2 s 382214 694637 382214 694637 4 cubev_dli_dout1_reg\[26\]
+port 515 nsew
+rlabel metal2 s 383502 694739 383502 694739 4 cubev_dli_dout1_reg\[27\]
+port 516 nsew
+rlabel metal2 s 384606 696310 384606 696310 4 cubev_dli_dout1_reg\[28\]
+port 517 nsew
+rlabel metal2 s 386170 694875 386170 694875 4 cubev_dli_dout1_reg\[29\]
+port 518 nsew
+rlabel metal2 s 351118 696242 351118 696242 4 cubev_dli_dout1_reg\[2\]
+port 519 nsew
+rlabel metal2 s 387458 694773 387458 694773 4 cubev_dli_dout1_reg\[30\]
+port 520 nsew
+rlabel metal2 s 388470 696344 388470 696344 4 cubev_dli_dout1_reg\[31\]
+port 521 nsew
+rlabel metal2 s 352406 696208 352406 696208 4 cubev_dli_dout1_reg\[3\]
+port 522 nsew
+rlabel metal2 s 353694 696174 353694 696174 4 cubev_dli_dout1_reg\[4\]
+port 523 nsew
+rlabel metal2 s 354982 696140 354982 696140 4 cubev_dli_dout1_reg\[5\]
+port 524 nsew
+rlabel metal2 s 356270 696106 356270 696106 4 cubev_dli_dout1_reg\[6\]
+port 525 nsew
+rlabel metal2 s 357558 696072 357558 696072 4 cubev_dli_dout1_reg\[7\]
+port 526 nsew
+rlabel metal2 s 358846 696072 358846 696072 4 cubev_dli_dout1_reg\[8\]
+port 527 nsew
+rlabel metal2 s 383962 542776 383962 542776 4 cubev_dli_dout1_reg\[9\]
+port 528 nsew
+rlabel metal3 s 390716 685236 390716 685236 4 cubev_dli_rstn
+port 529 nsew
+rlabel metal2 s 303938 539852 303938 539852 4 cubev_dli_web0
+port 530 nsew
+rlabel metal2 s 307142 547468 307142 547468 4 cubev_dli_wmask0\[0\]
+port 531 nsew
+rlabel metal2 s 305594 539852 305594 539852 4 cubev_dli_wmask0\[1\]
+port 532 nsew
+rlabel metal2 s 306804 539852 306804 539852 4 cubev_dli_wmask0\[2\]
+port 533 nsew
+rlabel metal2 s 307250 539852 307250 539852 4 cubev_dli_wmask0\[3\]
+port 534 nsew
+rlabel metal2 s 311190 59721 311190 59721 4 cubev_phi_addr0\[0\]
+port 535 nsew
+rlabel metal2 s 424442 78846 424442 78846 4 cubev_phi_addr0\[1\]
+port 536 nsew
+rlabel metal2 s 428490 80206 428490 80206 4 cubev_phi_addr0\[2\]
+port 537 nsew
+rlabel metal2 s 431250 80818 431250 80818 4 cubev_phi_addr0\[3\]
+port 538 nsew
+rlabel metal1 s 303646 110942 303646 110942 4 cubev_phi_addr0\[4\]
+port 539 nsew
+rlabel metal2 s 420302 78642 420302 78642 4 cubev_phi_addr0\[5\]
+port 540 nsew
+rlabel metal1 s 310408 110670 310408 110670 4 cubev_phi_addr0\[6\]
+port 541 nsew
+rlabel metal1 s 455768 55114 455768 55114 4 cubev_phi_addr0\[7\]
+port 542 nsew
+rlabel metal2 s 541006 103037 541006 103037 4 cubev_phi_addr1\[0\]
+port 543 nsew
+rlabel metal3 s 558961 37718 558961 37718 4 cubev_phi_addr1\[1\]
+port 544 nsew
+rlabel metal3 s 558892 36086 558892 36086 4 cubev_phi_addr1\[2\]
+port 545 nsew
+rlabel metal2 s 422510 148087 422510 148087 4 cubev_phi_addr1\[3\]
+port 546 nsew
+rlabel metal3 s 423614 149107 423614 149107 4 cubev_phi_addr1\[4\]
+port 547 nsew
+rlabel metal2 s 545698 19601 545698 19601 4 cubev_phi_addr1\[5\]
+port 548 nsew
+rlabel metal2 s 545146 19499 545146 19499 4 cubev_phi_addr1\[6\]
+port 549 nsew
+rlabel metal3 s 545238 19091 545238 19091 4 cubev_phi_addr1\[7\]
+port 550 nsew
+rlabel metal2 s 418830 64294 418830 64294 4 cubev_phi_clk0
+port 551 nsew
+rlabel metal2 s 423660 145044 423660 145044 4 cubev_phi_clk1
+port 552 nsew
+rlabel metal3 s 458459 26588 458459 26588 4 cubev_phi_csb0
+port 553 nsew
+rlabel metal3 s 558961 97830 558961 97830 4 cubev_phi_csb1
+port 554 nsew
+rlabel metal2 s 481666 17833 481666 17833 4 cubev_phi_din0\[0\]
+port 555 nsew
+rlabel metal2 s 427110 59551 427110 59551 4 cubev_phi_din0\[10\]
+port 556 nsew
+rlabel metal2 s 443762 61353 443762 61353 4 cubev_phi_din0\[11\]
+port 557 nsew
+rlabel metal2 s 196160 99892 196160 99892 4 cubev_phi_din0\[12\]
+port 558 nsew
+rlabel metal2 s 196666 99892 196666 99892 4 cubev_phi_din0\[13\]
+port 559 nsew
+rlabel metal2 s 197554 99892 197554 99892 4 cubev_phi_din0\[14\]
+port 560 nsew
+rlabel metal2 s 198060 99892 198060 99892 4 cubev_phi_din0\[15\]
+port 561 nsew
+rlabel metal2 s 198368 99892 198368 99892 4 cubev_phi_din0\[16\]
+port 562 nsew
+rlabel metal2 s 199088 100035 199088 100035 4 cubev_phi_din0\[17\]
+port 563 nsew
+rlabel metal2 s 199426 99892 199426 99892 4 cubev_phi_din0\[18\]
+port 564 nsew
+rlabel metal2 s 503838 18989 503838 18989 4 cubev_phi_din0\[19\]
+port 565 nsew
+rlabel metal2 s 483046 19329 483046 19329 4 cubev_phi_din0\[1\]
+port 566 nsew
+rlabel metal3 s 504942 18683 504942 18683 4 cubev_phi_din0\[20\]
+port 567 nsew
+rlabel metal4 s 506276 19108 506276 19108 4 cubev_phi_din0\[21\]
+port 568 nsew
+rlabel metal3 s 504068 18768 504068 18768 4 cubev_phi_din0\[22\]
+port 569 nsew
+rlabel metal2 s 503654 18632 503654 18632 4 cubev_phi_din0\[23\]
+port 570 nsew
+rlabel metal2 s 202952 100035 202952 100035 4 cubev_phi_din0\[24\]
+port 571 nsew
+rlabel metal2 s 203672 99892 203672 99892 4 cubev_phi_din0\[25\]
+port 572 nsew
+rlabel metal2 s 308614 59228 308614 59228 4 cubev_phi_din0\[26\]
+port 573 nsew
+rlabel metal2 s 204440 99892 204440 99892 4 cubev_phi_din0\[27\]
+port 574 nsew
+rlabel metal2 s 205328 99892 205328 99892 4 cubev_phi_din0\[28\]
+port 575 nsew
+rlabel metal2 s 308430 59432 308430 59432 4 cubev_phi_din0\[29\]
+port 576 nsew
+rlabel metal3 s 483046 17051 483046 17051 4 cubev_phi_din0\[2\]
+port 577 nsew
+rlabel metal2 s 308982 59432 308982 59432 4 cubev_phi_din0\[30\]
+port 578 nsew
+rlabel metal3 s 482057 17748 482057 17748 4 cubev_phi_din0\[31\]
+port 579 nsew
+rlabel metal2 s 484426 17153 484426 17153 4 cubev_phi_din0\[3\]
+port 580 nsew
+rlabel metal2 s 486450 19261 486450 19261 4 cubev_phi_din0\[4\]
+port 581 nsew
+rlabel metal2 s 487646 19635 487646 19635 4 cubev_phi_din0\[5\]
+port 582 nsew
+rlabel metal2 s 488842 19227 488842 19227 4 cubev_phi_din0\[6\]
+port 583 nsew
+rlabel metal3 s 490015 17884 490015 17884 4 cubev_phi_din0\[7\]
+port 584 nsew
+rlabel metal3 s 490613 17204 490613 17204 4 cubev_phi_din0\[8\]
+port 585 nsew
+rlabel metal2 s 492246 19193 492246 19193 4 cubev_phi_din0\[9\]
+port 586 nsew
+rlabel metal2 s 488566 17561 488566 17561 4 cubev_phi_dout0\[0\]
+port 587 nsew
+rlabel metal3 s 501423 17884 501423 17884 4 cubev_phi_dout0\[10\]
+port 588 nsew
+rlabel metal3 s 502757 17884 502757 17884 4 cubev_phi_dout0\[11\]
+port 589 nsew
+rlabel metal3 s 504091 17884 504091 17884 4 cubev_phi_dout0\[12\]
+port 590 nsew
+rlabel metal3 s 505425 17884 505425 17884 4 cubev_phi_dout0\[13\]
+port 591 nsew
+rlabel metal3 s 506759 17884 506759 17884 4 cubev_phi_dout0\[14\]
+port 592 nsew
+rlabel metal2 s 508162 19499 508162 19499 4 cubev_phi_dout0\[15\]
+port 593 nsew
+rlabel metal3 s 508461 17884 508461 17884 4 cubev_phi_dout0\[16\]
+port 594 nsew
+rlabel metal2 s 510462 19465 510462 19465 4 cubev_phi_dout0\[17\]
+port 595 nsew
+rlabel metal2 s 512302 18649 512302 18649 4 cubev_phi_dout0\[18\]
+port 596 nsew
+rlabel metal3 s 512877 17884 512877 17884 4 cubev_phi_dout0\[19\]
+port 597 nsew
+rlabel metal2 s 449466 61744 449466 61744 4 cubev_phi_dout0\[1\]
+port 598 nsew
+rlabel metal3 s 407675 19516 407675 19516 4 cubev_phi_dout0\[20\]
+port 599 nsew
+rlabel metal2 s 449650 62747 449650 62747 4 cubev_phi_dout0\[21\]
+port 600 nsew
+rlabel metal2 s 449374 62169 449374 62169 4 cubev_phi_dout0\[22\]
+port 601 nsew
+rlabel metal2 s 449834 60197 449834 60197 4 cubev_phi_dout0\[23\]
+port 602 nsew
+rlabel metal4 s 518949 17884 518949 17884 4 cubev_phi_dout0\[24\]
+port 603 nsew
+rlabel metal3 s 520467 17884 520467 17884 4 cubev_phi_dout0\[25\]
+port 604 nsew
+rlabel metal3 s 521801 17884 521801 17884 4 cubev_phi_dout0\[26\]
+port 605 nsew
+rlabel metal4 s 523142 19773 523142 19773 4 cubev_phi_dout0\[27\]
+port 606 nsew
+rlabel metal3 s 523687 17476 523687 17476 4 cubev_phi_dout0\[28\]
+port 607 nsew
+rlabel metal3 s 525113 17884 525113 17884 4 cubev_phi_dout0\[29\]
+port 608 nsew
+rlabel metal2 s 446430 62526 446430 62526 4 cubev_phi_dout0\[2\]
+port 609 nsew
+rlabel metal3 s 525918 17901 525918 17901 4 cubev_phi_dout0\[30\]
+port 610 nsew
+rlabel metal3 s 527689 17884 527689 17884 4 cubev_phi_dout0\[31\]
+port 611 nsew
+rlabel metal2 s 493626 19091 493626 19091 4 cubev_phi_dout0\[3\]
+port 612 nsew
+rlabel metal2 s 446982 59228 446982 59228 4 cubev_phi_dout0\[4\]
+port 613 nsew
+rlabel metal2 s 446798 58616 446798 58616 4 cubev_phi_dout0\[5\]
+port 614 nsew
+rlabel metal2 s 446890 59296 446890 59296 4 cubev_phi_dout0\[6\]
+port 615 nsew
+rlabel metal2 s 446706 58820 446706 58820 4 cubev_phi_dout0\[7\]
+port 616 nsew
+rlabel metal3 s 498663 17340 498663 17340 4 cubev_phi_dout0\[8\]
+port 617 nsew
+rlabel metal3 s 500181 17884 500181 17884 4 cubev_phi_dout0\[9\]
+port 618 nsew
+rlabel metal4 s 489414 100825 489414 100825 4 cubev_phi_dout1\[0\]
+port 619 nsew
+rlabel metal4 s 502062 100825 502062 100825 4 cubev_phi_dout1\[10\]
+port 620 nsew
+rlabel metal4 s 503150 100825 503150 100825 4 cubev_phi_dout1\[11\]
+port 621 nsew
+rlabel metal4 s 504646 100825 504646 100825 4 cubev_phi_dout1\[12\]
+port 622 nsew
+rlabel metal4 s 505734 100825 505734 100825 4 cubev_phi_dout1\[13\]
+port 623 nsew
+rlabel metal4 s 506958 100825 506958 100825 4 cubev_phi_dout1\[14\]
+port 624 nsew
+rlabel metal4 s 508318 100825 508318 100825 4 cubev_phi_dout1\[15\]
+port 625 nsew
+rlabel metal3 s 509335 103292 509335 103292 4 cubev_phi_dout1\[16\]
+port 626 nsew
+rlabel metal4 s 510766 100893 510766 100893 4 cubev_phi_dout1\[17\]
+port 627 nsew
+rlabel metal4 s 512126 100825 512126 100825 4 cubev_phi_dout1\[18\]
+port 628 nsew
+rlabel metal4 s 513214 100825 513214 100825 4 cubev_phi_dout1\[19\]
+port 629 nsew
+rlabel metal3 s 490383 103292 490383 103292 4 cubev_phi_dout1\[1\]
+port 630 nsew
+rlabel metal4 s 514438 100893 514438 100893 4 cubev_phi_dout1\[20\]
+port 631 nsew
+rlabel metal4 s 515798 100825 515798 100825 4 cubev_phi_dout1\[21\]
+port 632 nsew
+rlabel metal4 s 517022 100893 517022 100893 4 cubev_phi_dout1\[22\]
+port 633 nsew
+rlabel metal4 s 518382 100825 518382 100825 4 cubev_phi_dout1\[23\]
+port 634 nsew
+rlabel metal4 s 519470 100825 519470 100825 4 cubev_phi_dout1\[24\]
+port 635 nsew
+rlabel metal4 s 520830 100825 520830 100825 4 cubev_phi_dout1\[25\]
+port 636 nsew
+rlabel metal4 s 521918 100825 521918 100825 4 cubev_phi_dout1\[26\]
+port 637 nsew
+rlabel metal4 s 523142 100825 523142 100825 4 cubev_phi_dout1\[27\]
+port 638 nsew
+rlabel metal4 s 524366 100825 524366 100825 4 cubev_phi_dout1\[28\]
+port 639 nsew
+rlabel metal4 s 525726 100825 525726 100825 4 cubev_phi_dout1\[29\]
+port 640 nsew
+rlabel metal4 s 492134 100825 492134 100825 4 cubev_phi_dout1\[2\]
+port 641 nsew
+rlabel metal4 s 527086 100825 527086 100825 4 cubev_phi_dout1\[30\]
+port 642 nsew
+rlabel metal4 s 528310 100825 528310 100825 4 cubev_phi_dout1\[31\]
+port 643 nsew
+rlabel metal4 s 493222 100825 493222 100825 4 cubev_phi_dout1\[3\]
+port 644 nsew
+rlabel metal4 s 494582 100825 494582 100825 4 cubev_phi_dout1\[4\]
+port 645 nsew
+rlabel metal4 s 495806 100825 495806 100825 4 cubev_phi_dout1\[5\]
+port 646 nsew
+rlabel metal4 s 497166 100893 497166 100893 4 cubev_phi_dout1\[6\]
+port 647 nsew
+rlabel metal4 s 498390 100825 498390 100825 4 cubev_phi_dout1\[7\]
+port 648 nsew
+rlabel metal4 s 499478 100825 499478 100825 4 cubev_phi_dout1\[8\]
+port 649 nsew
+rlabel metal4 s 500702 100825 500702 100825 4 cubev_phi_dout1\[9\]
+port 650 nsew
+rlabel metal3 s 422510 151822 422510 151822 4 cubev_phi_dout1_reg\[0\]
+port 651 nsew
+rlabel metal2 s 422694 158355 422694 158355 4 cubev_phi_dout1_reg\[10\]
+port 652 nsew
+rlabel metal2 s 423338 159069 423338 159069 4 cubev_phi_dout1_reg\[11\]
+port 653 nsew
+rlabel metal2 s 423614 159375 423614 159375 4 cubev_phi_dout1_reg\[12\]
+port 654 nsew
+rlabel metal2 s 423430 160395 423430 160395 4 cubev_phi_dout1_reg\[13\]
+port 655 nsew
+rlabel metal2 s 423614 160769 423614 160769 4 cubev_phi_dout1_reg\[14\]
+port 656 nsew
+rlabel metal2 s 422786 161755 422786 161755 4 cubev_phi_dout1_reg\[15\]
+port 657 nsew
+rlabel metal2 s 422602 162129 422602 162129 4 cubev_phi_dout1_reg\[16\]
+port 658 nsew
+rlabel metal2 s 422510 163183 422510 163183 4 cubev_phi_dout1_reg\[17\]
+port 659 nsew
+rlabel metal2 s 422786 163489 422786 163489 4 cubev_phi_dout1_reg\[18\]
+port 660 nsew
+rlabel metal3 s 423614 164339 423614 164339 4 cubev_phi_dout1_reg\[19\]
+port 661 nsew
+rlabel metal2 s 423614 152167 423614 152167 4 cubev_phi_dout1_reg\[1\]
+port 662 nsew
+rlabel metal2 s 422786 164849 422786 164849 4 cubev_phi_dout1_reg\[20\]
+port 663 nsew
+rlabel metal2 s 422510 165869 422510 165869 4 cubev_phi_dout1_reg\[21\]
+port 664 nsew
+rlabel metal2 s 422786 166243 422786 166243 4 cubev_phi_dout1_reg\[22\]
+port 665 nsew
+rlabel metal2 s 422510 167263 422510 167263 4 cubev_phi_dout1_reg\[23\]
+port 666 nsew
+rlabel metal2 s 422694 167637 422694 167637 4 cubev_phi_dout1_reg\[24\]
+port 667 nsew
+rlabel metal2 s 422510 168623 422510 168623 4 cubev_phi_dout1_reg\[25\]
+port 668 nsew
+rlabel metal2 s 422786 169269 422786 169269 4 cubev_phi_dout1_reg\[26\]
+port 669 nsew
+rlabel metal2 s 422510 169983 422510 169983 4 cubev_phi_dout1_reg\[27\]
+port 670 nsew
+rlabel metal2 s 422602 170357 422602 170357 4 cubev_phi_dout1_reg\[28\]
+port 671 nsew
+rlabel metal2 s 422510 171343 422510 171343 4 cubev_phi_dout1_reg\[29\]
+port 672 nsew
+rlabel metal3 s 423614 153221 423614 153221 4 cubev_phi_dout1_reg\[2\]
+port 673 nsew
+rlabel metal2 s 422694 171717 422694 171717 4 cubev_phi_dout1_reg\[30\]
+port 674 nsew
+rlabel metal2 s 422786 172771 422786 172771 4 cubev_phi_dout1_reg\[31\]
+port 675 nsew
+rlabel metal2 s 423522 153595 423522 153595 4 cubev_phi_dout1_reg\[3\]
+port 676 nsew
+rlabel metal3 s 423522 154581 423522 154581 4 cubev_phi_dout1_reg\[4\]
+port 677 nsew
+rlabel metal2 s 422878 154989 422878 154989 4 cubev_phi_dout1_reg\[5\]
+port 678 nsew
+rlabel metal2 s 423660 155924 423660 155924 4 cubev_phi_dout1_reg\[6\]
+port 679 nsew
+rlabel metal2 s 423338 156009 423338 156009 4 cubev_phi_dout1_reg\[7\]
+port 680 nsew
+rlabel metal2 s 423246 154887 423246 154887 4 cubev_phi_dout1_reg\[8\]
+port 681 nsew
+rlabel metal2 s 423246 157777 423246 157777 4 cubev_phi_dout1_reg\[9\]
+port 682 nsew
+rlabel metal2 s 423522 143973 423522 143973 4 cubev_phi_rstn
+port 683 nsew
+rlabel metal2 s 418922 65790 418922 65790 4 cubev_phi_web0
+port 684 nsew
+rlabel metal2 s 477066 19295 477066 19295 4 cubev_phi_wmask0\[0\]
+port 685 nsew
+rlabel metal3 s 478262 18445 478262 18445 4 cubev_phi_wmask0\[1\]
+port 686 nsew
+rlabel metal3 s 479366 18411 479366 18411 4 cubev_phi_wmask0\[2\]
+port 687 nsew
+rlabel metal3 s 480378 17187 480378 17187 4 cubev_phi_wmask0\[3\]
+port 688 nsew
+rlabel metal2 s 56534 17833 56534 17833 4 cubev_pli_addr0\[0\]
+port 689 nsew
+rlabel metal3 s 39353 46172 39353 46172 4 cubev_pli_addr0\[1\]
+port 690 nsew
+rlabel metal3 s 39169 48348 39169 48348 4 cubev_pli_addr0\[2\]
+port 691 nsew
+rlabel metal3 s 39123 49708 39123 49708 4 cubev_pli_addr0\[3\]
+port 692 nsew
+rlabel metal1 s 38042 29954 38042 29954 4 cubev_pli_addr0\[4\]
+port 693 nsew
+rlabel metal1 s 38272 29818 38272 29818 4 cubev_pli_addr0\[5\]
+port 694 nsew
+rlabel metal3 s 39031 53924 39031 53924 4 cubev_pli_addr0\[6\]
+port 695 nsew
+rlabel metal2 s 38410 21984 38410 21984 4 cubev_pli_addr0\[7\]
+port 696 nsew
+rlabel metal3 s 122245 102204 122245 102204 4 cubev_pli_addr1\[0\]
+port 697 nsew
+rlabel metal2 s 141082 38369 141082 38369 4 cubev_pli_addr1\[1\]
+port 698 nsew
+rlabel metal3 s 138644 36384 138644 36384 4 cubev_pli_addr1\[2\]
+port 699 nsew
+rlabel metal3 s 178779 153204 178779 153204 4 cubev_pli_addr1\[3\]
+port 700 nsew
+rlabel metal3 s 178687 153884 178687 153884 4 cubev_pli_addr1\[4\]
+port 701 nsew
+rlabel metal2 s 139150 18479 139150 18479 4 cubev_pli_addr1\[5\]
+port 702 nsew
+rlabel metal1 s 175904 154598 175904 154598 4 cubev_pli_addr1\[6\]
+port 703 nsew
+rlabel metal1 s 175950 155958 175950 155958 4 cubev_pli_addr1\[7\]
+port 704 nsew
+rlabel metal1 s 38640 26146 38640 26146 4 cubev_pli_clk0
+port 705 nsew
+rlabel metal2 s 176778 149481 176778 149481 4 cubev_pli_clk1
+port 706 nsew
+rlabel metal2 s 139426 20706 139426 20706 4 cubev_pli_csb0
+port 707 nsew
+rlabel metal3 s 140093 97852 140093 97852 4 cubev_pli_csb1
+port 708 nsew
+rlabel metal3 s 61203 17884 61203 17884 4 cubev_pli_din0\[0\]
+port 709 nsew
+rlabel metal2 s 138046 18666 138046 18666 4 cubev_pli_din0\[10\]
+port 710 nsew
+rlabel metal2 s 75854 17425 75854 17425 4 cubev_pli_din0\[11\]
+port 711 nsew
+rlabel metal3 s 75785 17884 75785 17884 4 cubev_pli_din0\[12\]
+port 712 nsew
+rlabel metal3 s 76843 17884 76843 17884 4 cubev_pli_din0\[13\]
+port 713 nsew
+rlabel metal3 s 77947 17884 77947 17884 4 cubev_pli_din0\[14\]
+port 714 nsew
+rlabel metal3 s 79235 17884 79235 17884 4 cubev_pli_din0\[15\]
+port 715 nsew
+rlabel metal2 s 140622 35122 140622 35122 4 cubev_pli_din0\[16\]
+port 716 nsew
+rlabel metal2 s 141910 35802 141910 35802 4 cubev_pli_din0\[17\]
+port 717 nsew
+rlabel metal2 s 176686 54043 176686 54043 4 cubev_pli_din0\[18\]
+port 718 nsew
+rlabel metal2 s 141818 34816 141818 34816 4 cubev_pli_din0\[19\]
+port 719 nsew
+rlabel metal4 s 63043 17884 63043 17884 4 cubev_pli_din0\[1\]
+port 720 nsew
+rlabel metal2 s 176686 55675 176686 55675 4 cubev_pli_din0\[20\]
+port 721 nsew
+rlabel metal3 s 178856 57052 178856 57052 4 cubev_pli_din0\[21\]
+port 722 nsew
+rlabel metal3 s 176686 57987 176686 57987 4 cubev_pli_din0\[22\]
+port 723 nsew
+rlabel metal2 s 139242 19278 139242 19278 4 cubev_pli_din0\[23\]
+port 724 nsew
+rlabel metal2 s 176686 59653 176686 59653 4 cubev_pli_din0\[24\]
+port 725 nsew
+rlabel metal3 s 176686 60843 176686 60843 4 cubev_pli_din0\[25\]
+port 726 nsew
+rlabel metal2 s 176778 61285 176778 61285 4 cubev_pli_din0\[26\]
+port 727 nsew
+rlabel metal2 s 176686 62441 176686 62441 4 cubev_pli_din0\[27\]
+port 728 nsew
+rlabel metal3 s 94553 17884 94553 17884 4 cubev_pli_din0\[28\]
+port 729 nsew
+rlabel metal3 s 96439 17884 96439 17884 4 cubev_pli_din0\[29\]
+port 730 nsew
+rlabel metal3 s 64239 17884 64239 17884 4 cubev_pli_din0\[2\]
+port 731 nsew
+rlabel metal3 s 96738 18547 96738 18547 4 cubev_pli_din0\[30\]
+port 732 nsew
+rlabel metal3 s 98049 17612 98049 17612 4 cubev_pli_din0\[31\]
+port 733 nsew
+rlabel metal2 s 176778 39321 176778 39321 4 cubev_pli_din0\[3\]
+port 734 nsew
+rlabel metal2 s 176686 40477 176686 40477 4 cubev_pli_din0\[4\]
+port 735 nsew
+rlabel metal2 s 176686 41667 176686 41667 4 cubev_pli_din0\[5\]
+port 736 nsew
+rlabel metal2 s 176778 42109 176778 42109 4 cubev_pli_din0\[6\]
+port 737 nsew
+rlabel metal2 s 176686 43265 176686 43265 4 cubev_pli_din0\[7\]
+port 738 nsew
+rlabel metal2 s 176686 44421 176686 44421 4 cubev_pli_din0\[8\]
+port 739 nsew
+rlabel metal2 s 138690 32300 138690 32300 4 cubev_pli_din0\[9\]
+port 740 nsew
+rlabel metal3 s 178810 67524 178810 67524 4 cubev_pli_dout0\[0\]
+port 741 nsew
+rlabel metal2 s 139334 19210 139334 19210 4 cubev_pli_dout0\[10\]
+port 742 nsew
+rlabel metal2 s 176686 77639 176686 77639 4 cubev_pli_dout0\[11\]
+port 743 nsew
+rlabel metal2 s 176686 78829 176686 78829 4 cubev_pli_dout0\[12\]
+port 744 nsew
+rlabel metal2 s 176778 79339 176778 79339 4 cubev_pli_dout0\[13\]
+port 745 nsew
+rlabel metal2 s 176686 80461 176686 80461 4 cubev_pli_dout0\[14\]
+port 746 nsew
+rlabel metal2 s 176686 81651 176686 81651 4 cubev_pli_dout0\[15\]
+port 747 nsew
+rlabel metal2 s 176778 82093 176778 82093 4 cubev_pli_dout0\[16\]
+port 748 nsew
+rlabel metal2 s 176686 83283 176686 83283 4 cubev_pli_dout0\[17\]
+port 749 nsew
+rlabel metal2 s 141634 51527 141634 51527 4 cubev_pli_dout0\[18\]
+port 750 nsew
+rlabel metal2 s 141542 50014 141542 50014 4 cubev_pli_dout0\[19\]
+port 751 nsew
+rlabel metal2 s 176686 68051 176686 68051 4 cubev_pli_dout0\[1\]
+port 752 nsew
+rlabel metal3 s 94599 17612 94599 17612 4 cubev_pli_dout0\[20\]
+port 753 nsew
+rlabel metal3 s 95289 17884 95289 17884 4 cubev_pli_dout0\[21\]
+port 754 nsew
+rlabel metal3 s 97313 17884 97313 17884 4 cubev_pli_dout0\[22\]
+port 755 nsew
+rlabel metal4 s 98187 17884 98187 17884 4 cubev_pli_dout0\[23\]
+port 756 nsew
+rlabel metal3 s 98923 17884 98923 17884 4 cubev_pli_dout0\[24\]
+port 757 nsew
+rlabel metal3 s 100487 17884 100487 17884 4 cubev_pli_dout0\[25\]
+port 758 nsew
+rlabel metal3 s 101637 17884 101637 17884 4 cubev_pli_dout0\[26\]
+port 759 nsew
+rlabel metal2 s 103178 19431 103178 19431 4 cubev_pli_dout0\[27\]
+port 760 nsew
+rlabel metal2 s 176686 94061 176686 94061 4 cubev_pli_dout0\[28\]
+port 761 nsew
+rlabel metal2 s 176778 94503 176778 94503 4 cubev_pli_dout0\[29\]
+port 762 nsew
+rlabel metal2 s 141726 42058 141726 42058 4 cubev_pli_dout0\[2\]
+port 763 nsew
+rlabel metal2 s 176686 95659 176686 95659 4 cubev_pli_dout0\[30\]
+port 764 nsew
+rlabel metal2 s 176686 96849 176686 96849 4 cubev_pli_dout0\[31\]
+port 765 nsew
+rlabel metal2 s 140162 42789 140162 42789 4 cubev_pli_dout0\[3\]
+port 766 nsew
+rlabel metal4 s 139012 43520 139012 43520 4 cubev_pli_dout0\[4\]
+port 767 nsew
+rlabel metal3 s 75256 16660 75256 16660 4 cubev_pli_dout0\[5\]
+port 768 nsew
+rlabel metal4 s 77004 19108 77004 19108 4 cubev_pli_dout0\[6\]
+port 769 nsew
+rlabel metal3 s 78407 17884 78407 17884 4 cubev_pli_dout0\[7\]
+port 770 nsew
+rlabel metal3 s 79603 17612 79603 17612 4 cubev_pli_dout0\[8\]
+port 771 nsew
+rlabel metal2 s 176686 76007 176686 76007 4 cubev_pli_dout0\[9\]
+port 772 nsew
+rlabel metal4 s 69414 100893 69414 100893 4 cubev_pli_dout1\[0\]
+port 773 nsew
+rlabel metal4 s 82062 100825 82062 100825 4 cubev_pli_dout1\[10\]
+port 774 nsew
+rlabel metal4 s 83150 100893 83150 100893 4 cubev_pli_dout1\[11\]
+port 775 nsew
+rlabel metal2 s 84226 102748 84226 102748 4 cubev_pli_dout1\[12\]
+port 776 nsew
+rlabel metal4 s 85734 100893 85734 100893 4 cubev_pli_dout1\[13\]
+port 777 nsew
+rlabel metal4 s 86958 100825 86958 100825 4 cubev_pli_dout1\[14\]
+port 778 nsew
+rlabel metal4 s 88318 100757 88318 100757 4 cubev_pli_dout1\[15\]
+port 779 nsew
+rlabel metal4 s 89406 100893 89406 100893 4 cubev_pli_dout1\[16\]
+port 780 nsew
+rlabel metal4 s 90766 100825 90766 100825 4 cubev_pli_dout1\[17\]
+port 781 nsew
+rlabel metal4 s 92126 100825 92126 100825 4 cubev_pli_dout1\[18\]
+port 782 nsew
+rlabel metal4 s 93214 100825 93214 100825 4 cubev_pli_dout1\[19\]
+port 783 nsew
+rlabel metal4 s 70774 100893 70774 100893 4 cubev_pli_dout1\[1\]
+port 784 nsew
+rlabel metal4 s 94438 100825 94438 100825 4 cubev_pli_dout1\[20\]
+port 785 nsew
+rlabel metal4 s 95798 100825 95798 100825 4 cubev_pli_dout1\[21\]
+port 786 nsew
+rlabel metal4 s 97022 100825 97022 100825 4 cubev_pli_dout1\[22\]
+port 787 nsew
+rlabel metal4 s 98382 100825 98382 100825 4 cubev_pli_dout1\[23\]
+port 788 nsew
+rlabel metal4 s 99470 100825 99470 100825 4 cubev_pli_dout1\[24\]
+port 789 nsew
+rlabel metal4 s 100830 100893 100830 100893 4 cubev_pli_dout1\[25\]
+port 790 nsew
+rlabel metal4 s 101918 100893 101918 100893 4 cubev_pli_dout1\[26\]
+port 791 nsew
+rlabel metal4 s 103142 100825 103142 100825 4 cubev_pli_dout1\[27\]
+port 792 nsew
+rlabel metal4 s 104366 100825 104366 100825 4 cubev_pli_dout1\[28\]
+port 793 nsew
+rlabel metal4 s 105726 100825 105726 100825 4 cubev_pli_dout1\[29\]
+port 794 nsew
+rlabel metal4 s 72134 100893 72134 100893 4 cubev_pli_dout1\[2\]
+port 795 nsew
+rlabel metal4 s 107086 100893 107086 100893 4 cubev_pli_dout1\[30\]
+port 796 nsew
+rlabel metal4 s 108310 100825 108310 100825 4 cubev_pli_dout1\[31\]
+port 797 nsew
+rlabel metal4 s 73222 100893 73222 100893 4 cubev_pli_dout1\[3\]
+port 798 nsew
+rlabel metal4 s 74582 100893 74582 100893 4 cubev_pli_dout1\[4\]
+port 799 nsew
+rlabel metal4 s 75806 100825 75806 100825 4 cubev_pli_dout1\[5\]
+port 800 nsew
+rlabel metal4 s 77166 100825 77166 100825 4 cubev_pli_dout1\[6\]
+port 801 nsew
+rlabel metal4 s 78390 100825 78390 100825 4 cubev_pli_dout1\[7\]
+port 802 nsew
+rlabel metal4 s 79478 100825 79478 100825 4 cubev_pli_dout1\[8\]
+port 803 nsew
+rlabel metal4 s 80702 100825 80702 100825 4 cubev_pli_dout1\[9\]
+port 804 nsew
+rlabel metal2 s 176778 154547 176778 154547 4 cubev_pli_dout1_reg\[0\]
+port 805 nsew
+rlabel metal2 s 81466 145748 81466 145748 4 cubev_pli_dout1_reg\[10\]
+port 806 nsew
+rlabel metal2 s 82754 147142 82754 147142 4 cubev_pli_dout1_reg\[11\]
+port 807 nsew
+rlabel metal2 s 82846 152179 82846 152179 4 cubev_pli_dout1_reg\[12\]
+port 808 nsew
+rlabel metal3 s 176686 165699 176686 165699 4 cubev_pli_dout1_reg\[13\]
+port 809 nsew
+rlabel metal2 s 176778 165869 176778 165869 4 cubev_pli_dout1_reg\[14\]
+port 810 nsew
+rlabel metal3 s 176686 167093 176686 167093 4 cubev_pli_dout1_reg\[15\]
+port 811 nsew
+rlabel metal2 s 176778 167263 176778 167263 4 cubev_pli_dout1_reg\[16\]
+port 812 nsew
+rlabel metal2 s 154054 158474 154054 158474 4 cubev_pli_dout1_reg\[17\]
+port 813 nsew
+rlabel metal2 s 176778 168623 176778 168623 4 cubev_pli_dout1_reg\[18\]
+port 814 nsew
+rlabel metal3 s 176686 169779 176686 169779 4 cubev_pli_dout1_reg\[19\]
+port 815 nsew
+rlabel metal3 s 178089 157420 178089 157420 4 cubev_pli_dout1_reg\[1\]
+port 816 nsew
+rlabel metal2 s 94346 145102 94346 145102 4 cubev_pli_dout1_reg\[20\]
+port 817 nsew
+rlabel metal3 s 176686 171139 176686 171139 4 cubev_pli_dout1_reg\[21\]
+port 818 nsew
+rlabel metal2 s 176778 171377 176778 171377 4 cubev_pli_dout1_reg\[22\]
+port 819 nsew
+rlabel metal2 s 176686 172567 176686 172567 4 cubev_pli_dout1_reg\[23\]
+port 820 nsew
+rlabel metal2 s 176778 172737 176778 172737 4 cubev_pli_dout1_reg\[24\]
+port 821 nsew
+rlabel metal2 s 176686 174029 176686 174029 4 cubev_pli_dout1_reg\[25\]
+port 822 nsew
+rlabel metal1 s 174984 173978 174984 173978 4 cubev_pli_dout1_reg\[26\]
+port 823 nsew
+rlabel metal2 s 176686 175423 176686 175423 4 cubev_pli_dout1_reg\[27\]
+port 824 nsew
+rlabel metal2 s 176778 175457 176778 175457 4 cubev_pli_dout1_reg\[28\]
+port 825 nsew
+rlabel metal2 s 176686 176817 176686 176817 4 cubev_pli_dout1_reg\[29\]
+port 826 nsew
+rlabel metal2 s 176686 157675 176686 157675 4 cubev_pli_dout1_reg\[2\]
+port 827 nsew
+rlabel metal2 s 176778 176851 176778 176851 4 cubev_pli_dout1_reg\[30\]
+port 828 nsew
+rlabel metal2 s 176686 178143 176686 178143 4 cubev_pli_dout1_reg\[31\]
+port 829 nsew
+rlabel metal3 s 176686 158763 176686 158763 4 cubev_pli_dout1_reg\[3\]
+port 830 nsew
+rlabel metal2 s 176778 159069 176778 159069 4 cubev_pli_dout1_reg\[4\]
+port 831 nsew
+rlabel metal3 s 176686 160123 176686 160123 4 cubev_pli_dout1_reg\[5\]
+port 832 nsew
+rlabel metal2 s 176778 160429 176778 160429 4 cubev_pli_dout1_reg\[6\]
+port 833 nsew
+rlabel metal2 s 77602 144388 77602 144388 4 cubev_pli_dout1_reg\[7\]
+port 834 nsew
+rlabel metal2 s 78791 143140 78791 143140 4 cubev_pli_dout1_reg\[8\]
+port 835 nsew
+rlabel metal2 s 80178 144490 80178 144490 4 cubev_pli_dout1_reg\[9\]
+port 836 nsew
+rlabel metal3 s 176686 149107 176686 149107 4 cubev_pli_rstn
+port 837 nsew
+rlabel metal1 s 38732 26214 38732 26214 4 cubev_pli_web0
+port 838 nsew
+rlabel metal2 s 57178 18649 57178 18649 4 cubev_pli_wmask0\[0\]
+port 839 nsew
+rlabel metal2 s 59294 17221 59294 17221 4 cubev_pli_wmask0\[1\]
+port 840 nsew
+rlabel metal3 s 59570 18683 59570 18683 4 cubev_pli_wmask0\[2\]
+port 841 nsew
+rlabel metal3 s 60674 17595 60674 17595 4 cubev_pli_wmask0\[3\]
+port 842 nsew
+rlabel metal2 s 423430 235059 423430 235059 4 cubev_reg_0_addr0\[0\]
+port 843 nsew
+rlabel metal2 s 423614 236079 423614 236079 4 cubev_reg_0_addr0\[1\]
+port 844 nsew
+rlabel metal2 s 422602 234685 422602 234685 4 cubev_reg_0_addr0\[2\]
+port 845 nsew
+rlabel metal3 s 423614 237507 423614 237507 4 cubev_reg_0_addr0\[3\]
+port 846 nsew
+rlabel metal3 s 422510 238187 422510 238187 4 cubev_reg_0_addr0\[4\]
+port 847 nsew
+rlabel metal3 s 423614 238901 423614 238901 4 cubev_reg_0_addr0\[5\]
+port 848 nsew
+rlabel metal2 s 422510 239207 422510 239207 4 cubev_reg_0_addr0\[6\]
+port 849 nsew
+rlabel metal2 s 423614 240193 423614 240193 4 cubev_reg_0_addr0\[7\]
+port 850 nsew
+rlabel metal2 s 422878 182019 422878 182019 4 cubev_reg_0_addr1\[0\]
+port 851 nsew
+rlabel metal3 s 558961 175718 558961 175718 4 cubev_reg_0_addr1\[1\]
+port 852 nsew
+rlabel metal3 s 558961 174086 558961 174086 4 cubev_reg_0_addr1\[2\]
+port 853 nsew
+rlabel metal3 s 558961 172998 558961 172998 4 cubev_reg_0_addr1\[3\]
+port 854 nsew
+rlabel metal2 s 422694 184059 422694 184059 4 cubev_reg_0_addr1\[4\]
+port 855 nsew
+rlabel metal2 s 545330 154411 545330 154411 4 cubev_reg_0_addr1\[5\]
+port 856 nsew
+rlabel metal2 s 545146 154445 545146 154445 4 cubev_reg_0_addr1\[6\]
+port 857 nsew
+rlabel metal2 s 545238 154547 545238 154547 4 cubev_reg_0_addr1\[7\]
+port 858 nsew
+rlabel metal2 s 423614 233393 423614 233393 4 cubev_reg_0_clk0
+port 859 nsew
+rlabel metal2 s 422786 180659 422786 180659 4 cubev_reg_0_clk1
+port 860 nsew
+rlabel metal2 s 423430 233699 423430 233699 4 cubev_reg_0_csb0
+port 861 nsew
+rlabel metal3 s 558961 235830 558961 235830 4 cubev_reg_0_csb1
+port 862 nsew
+rlabel metal2 s 481666 154513 481666 154513 4 cubev_reg_0_din0\[0\]
+port 863 nsew
+rlabel metal2 s 423476 160820 423476 160820 4 cubev_reg_0_din0\[10\]
+port 864 nsew
+rlabel metal2 s 423292 158644 423292 158644 4 cubev_reg_0_din0\[11\]
+port 865 nsew
+rlabel metal1 s 422970 161194 422970 161194 4 cubev_reg_0_din0\[12\]
+port 866 nsew
+rlabel metal2 s 423614 217243 423614 217243 4 cubev_reg_0_din0\[13\]
+port 867 nsew
+rlabel metal2 s 423614 218263 423614 218263 4 cubev_reg_0_din0\[14\]
+port 868 nsew
+rlabel metal2 s 423522 218637 423522 218637 4 cubev_reg_0_din0\[15\]
+port 869 nsew
+rlabel metal2 s 500526 157403 500526 157403 4 cubev_reg_0_din0\[16\]
+port 870 nsew
+rlabel metal2 s 501630 157369 501630 157369 4 cubev_reg_0_din0\[17\]
+port 871 nsew
+rlabel metal2 s 502366 154309 502366 154309 4 cubev_reg_0_din0\[18\]
+port 872 nsew
+rlabel metal2 s 503746 155737 503746 155737 4 cubev_reg_0_din0\[19\]
+port 873 nsew
+rlabel metal2 s 483046 157539 483046 157539 4 cubev_reg_0_din0\[1\]
+port 874 nsew
+rlabel metal2 s 505034 157335 505034 157335 4 cubev_reg_0_din0\[20\]
+port 875 nsew
+rlabel metal2 s 505126 154343 505126 154343 4 cubev_reg_0_din0\[21\]
+port 876 nsew
+rlabel metal2 s 506598 154377 506598 154377 4 cubev_reg_0_din0\[22\]
+port 877 nsew
+rlabel metal4 s 508668 156468 508668 156468 4 cubev_reg_0_din0\[23\]
+port 878 nsew
+rlabel metal2 s 423614 225131 423614 225131 4 cubev_reg_0_din0\[24\]
+port 879 nsew
+rlabel metal2 s 422602 225505 422602 225505 4 cubev_reg_0_din0\[25\]
+port 880 nsew
+rlabel metal2 s 423614 226491 423614 226491 4 cubev_reg_0_din0\[26\]
+port 881 nsew
+rlabel metal2 s 422602 226865 422602 226865 4 cubev_reg_0_din0\[27\]
+port 882 nsew
+rlabel metal4 s 514372 157216 514372 157216 4 cubev_reg_0_din0\[28\]
+port 883 nsew
+rlabel metal2 s 423062 193171 423062 193171 4 cubev_reg_0_din0\[29\]
+port 884 nsew
+rlabel metal2 s 423614 210103 423614 210103 4 cubev_reg_0_din0\[2\]
+port 885 nsew
+rlabel metal2 s 423614 229245 423614 229245 4 cubev_reg_0_din0\[30\]
+port 886 nsew
+rlabel metal2 s 423430 229619 423430 229619 4 cubev_reg_0_din0\[31\]
+port 887 nsew
+rlabel metal2 s 423522 210409 423522 210409 4 cubev_reg_0_din0\[3\]
+port 888 nsew
+rlabel metal2 s 423614 211463 423614 211463 4 cubev_reg_0_din0\[4\]
+port 889 nsew
+rlabel metal2 s 423522 211769 423522 211769 4 cubev_reg_0_din0\[5\]
+port 890 nsew
+rlabel metal2 s 423338 212789 423338 212789 4 cubev_reg_0_din0\[6\]
+port 891 nsew
+rlabel metal2 s 423614 213163 423614 213163 4 cubev_reg_0_din0\[7\]
+port 892 nsew
+rlabel metal2 s 423614 214183 423614 214183 4 cubev_reg_0_din0\[8\]
+port 893 nsew
+rlabel metal2 s 423522 214557 423522 214557 4 cubev_reg_0_din0\[9\]
+port 894 nsew
+rlabel metal2 s 488566 154479 488566 154479 4 cubev_reg_0_dout0\[0\]
+port 895 nsew
+rlabel metal2 s 423614 193613 423614 193613 4 cubev_reg_0_dout0\[10\]
+port 896 nsew
+rlabel metal1 s 423246 161058 423246 161058 4 cubev_reg_0_dout0\[11\]
+port 897 nsew
+rlabel metal2 s 423614 194973 423614 194973 4 cubev_reg_0_dout0\[12\]
+port 898 nsew
+rlabel metal3 s 423614 196027 423614 196027 4 cubev_reg_0_dout0\[13\]
+port 899 nsew
+rlabel metal2 s 423522 196401 423522 196401 4 cubev_reg_0_dout0\[14\]
+port 900 nsew
+rlabel metal3 s 423614 197387 423614 197387 4 cubev_reg_0_dout0\[15\]
+port 901 nsew
+rlabel metal2 s 423522 197761 423522 197761 4 cubev_reg_0_dout0\[16\]
+port 902 nsew
+rlabel metal3 s 423614 198781 423614 198781 4 cubev_reg_0_dout0\[17\]
+port 903 nsew
+rlabel metal2 s 423522 199087 423522 199087 4 cubev_reg_0_dout0\[18\]
+port 904 nsew
+rlabel metal3 s 423614 200243 423614 200243 4 cubev_reg_0_dout0\[19\]
+port 905 nsew
+rlabel metal2 s 422878 187799 422878 187799 4 cubev_reg_0_dout0\[1\]
+port 906 nsew
+rlabel metal2 s 423522 200481 423522 200481 4 cubev_reg_0_dout0\[20\]
+port 907 nsew
+rlabel metal3 s 423338 201637 423338 201637 4 cubev_reg_0_dout0\[21\]
+port 908 nsew
+rlabel metal2 s 423614 201875 423614 201875 4 cubev_reg_0_dout0\[22\]
+port 909 nsew
+rlabel metal2 s 423522 202181 423522 202181 4 cubev_reg_0_dout0\[23\]
+port 910 nsew
+rlabel metal4 s 518949 154972 518949 154972 4 cubev_reg_0_dout0\[24\]
+port 911 nsew
+rlabel metal3 s 520306 155771 520306 155771 4 cubev_reg_0_dout0\[25\]
+port 912 nsew
+rlabel metal3 s 521870 156723 521870 156723 4 cubev_reg_0_dout0\[26\]
+port 913 nsew
+rlabel metal2 s 523066 155397 523066 155397 4 cubev_reg_0_dout0\[27\]
+port 914 nsew
+rlabel metal3 s 523158 154955 523158 154955 4 cubev_reg_0_dout0\[28\]
+port 915 nsew
+rlabel metal2 s 525734 156689 525734 156689 4 cubev_reg_0_dout0\[29\]
+port 916 nsew
+rlabel metal2 s 422694 188173 422694 188173 4 cubev_reg_0_dout0\[2\]
+port 917 nsew
+rlabel metal4 s 526516 156264 526516 156264 4 cubev_reg_0_dout0\[30\]
+port 918 nsew
+rlabel metal4 s 528172 157352 528172 157352 4 cubev_reg_0_dout0\[31\]
+port 919 nsew
+rlabel metal2 s 422786 185504 422786 185504 4 cubev_reg_0_dout0\[3\]
+port 920 nsew
+rlabel metal2 s 422878 189499 422878 189499 4 cubev_reg_0_dout0\[4\]
+port 921 nsew
+rlabel metal3 s 423614 190587 423614 190587 4 cubev_reg_0_dout0\[5\]
+port 922 nsew
+rlabel metal2 s 422694 190893 422694 190893 4 cubev_reg_0_dout0\[6\]
+port 923 nsew
+rlabel metal2 s 423660 158644 423660 158644 4 cubev_reg_0_dout0\[7\]
+port 924 nsew
+rlabel metal2 s 423614 192253 423614 192253 4 cubev_reg_0_dout0\[8\]
+port 925 nsew
+rlabel metal1 s 423430 160922 423430 160922 4 cubev_reg_0_dout0\[9\]
+port 926 nsew
+rlabel metal4 s 489414 238725 489414 238725 4 cubev_reg_0_dout1\[0\]
+port 927 nsew
+rlabel metal4 s 502062 238725 502062 238725 4 cubev_reg_0_dout1\[10\]
+port 928 nsew
+rlabel metal4 s 503150 238725 503150 238725 4 cubev_reg_0_dout1\[11\]
+port 929 nsew
+rlabel metal4 s 504646 238725 504646 238725 4 cubev_reg_0_dout1\[12\]
+port 930 nsew
+rlabel metal4 s 505734 238725 505734 238725 4 cubev_reg_0_dout1\[13\]
+port 931 nsew
+rlabel metal4 s 506958 238725 506958 238725 4 cubev_reg_0_dout1\[14\]
+port 932 nsew
+rlabel metal4 s 508318 238725 508318 238725 4 cubev_reg_0_dout1\[15\]
+port 933 nsew
+rlabel metal4 s 509406 238725 509406 238725 4 cubev_reg_0_dout1\[16\]
+port 934 nsew
+rlabel metal4 s 510766 238725 510766 238725 4 cubev_reg_0_dout1\[17\]
+port 935 nsew
+rlabel metal4 s 512126 238725 512126 238725 4 cubev_reg_0_dout1\[18\]
+port 936 nsew
+rlabel metal4 s 513214 238725 513214 238725 4 cubev_reg_0_dout1\[19\]
+port 937 nsew
+rlabel metal4 s 490774 238725 490774 238725 4 cubev_reg_0_dout1\[1\]
+port 938 nsew
+rlabel metal4 s 514438 238725 514438 238725 4 cubev_reg_0_dout1\[20\]
+port 939 nsew
+rlabel metal4 s 515798 238725 515798 238725 4 cubev_reg_0_dout1\[21\]
+port 940 nsew
+rlabel metal4 s 517022 238725 517022 238725 4 cubev_reg_0_dout1\[22\]
+port 941 nsew
+rlabel metal4 s 518382 238725 518382 238725 4 cubev_reg_0_dout1\[23\]
+port 942 nsew
+rlabel metal4 s 519470 238725 519470 238725 4 cubev_reg_0_dout1\[24\]
+port 943 nsew
+rlabel metal4 s 520830 238725 520830 238725 4 cubev_reg_0_dout1\[25\]
+port 944 nsew
+rlabel metal4 s 521918 238725 521918 238725 4 cubev_reg_0_dout1\[26\]
+port 945 nsew
+rlabel metal4 s 523142 238725 523142 238725 4 cubev_reg_0_dout1\[27\]
+port 946 nsew
+rlabel metal4 s 524366 238725 524366 238725 4 cubev_reg_0_dout1\[28\]
+port 947 nsew
+rlabel metal4 s 525726 238725 525726 238725 4 cubev_reg_0_dout1\[29\]
+port 948 nsew
+rlabel metal4 s 492134 238725 492134 238725 4 cubev_reg_0_dout1\[2\]
+port 949 nsew
+rlabel metal4 s 527086 238725 527086 238725 4 cubev_reg_0_dout1\[30\]
+port 950 nsew
+rlabel metal4 s 528310 238725 528310 238725 4 cubev_reg_0_dout1\[31\]
+port 951 nsew
+rlabel metal4 s 493222 238725 493222 238725 4 cubev_reg_0_dout1\[3\]
+port 952 nsew
+rlabel metal4 s 494582 238725 494582 238725 4 cubev_reg_0_dout1\[4\]
+port 953 nsew
+rlabel metal4 s 495806 238725 495806 238725 4 cubev_reg_0_dout1\[5\]
+port 954 nsew
+rlabel metal4 s 497166 238725 497166 238725 4 cubev_reg_0_dout1\[6\]
+port 955 nsew
+rlabel metal4 s 498390 238725 498390 238725 4 cubev_reg_0_dout1\[7\]
+port 956 nsew
+rlabel metal4 s 499478 238725 499478 238725 4 cubev_reg_0_dout1\[8\]
+port 957 nsew
+rlabel metal4 s 500702 238725 500702 238725 4 cubev_reg_0_dout1\[9\]
+port 958 nsew
+rlabel metal3 s 422878 241077 422878 241077 4 cubev_reg_0_dout1_reg\[0\]
+port 959 nsew
+rlabel metal2 s 423614 248115 423614 248115 4 cubev_reg_0_dout1_reg\[10\]
+port 960 nsew
+rlabel metal2 s 423430 249135 423430 249135 4 cubev_reg_0_dout1_reg\[11\]
+port 961 nsew
+rlabel metal2 s 423614 249407 423614 249407 4 cubev_reg_0_dout1_reg\[12\]
+port 962 nsew
+rlabel metal2 s 423522 249713 423522 249713 4 cubev_reg_0_dout1_reg\[13\]
+port 963 nsew
+rlabel metal2 s 423522 250869 423522 250869 4 cubev_reg_0_dout1_reg\[14\]
+port 964 nsew
+rlabel metal3 s 423614 251107 423614 251107 4 cubev_reg_0_dout1_reg\[15\]
+port 965 nsew
+rlabel metal2 s 423522 252229 423522 252229 4 cubev_reg_0_dout1_reg\[16\]
+port 966 nsew
+rlabel metal3 s 423614 252467 423614 252467 4 cubev_reg_0_dout1_reg\[17\]
+port 967 nsew
+rlabel metal2 s 423522 253555 423522 253555 4 cubev_reg_0_dout1_reg\[18\]
+port 968 nsew
+rlabel metal3 s 423614 253861 423614 253861 4 cubev_reg_0_dout1_reg\[19\]
+port 969 nsew
+rlabel metal2 s 423062 243321 423062 243321 4 cubev_reg_0_dout1_reg\[1\]
+port 970 nsew
+rlabel metal2 s 423522 254915 423522 254915 4 cubev_reg_0_dout1_reg\[20\]
+port 971 nsew
+rlabel metal3 s 423614 255221 423614 255221 4 cubev_reg_0_dout1_reg\[21\]
+port 972 nsew
+rlabel metal2 s 423338 256343 423338 256343 4 cubev_reg_0_dout1_reg\[22\]
+port 973 nsew
+rlabel metal3 s 423614 256581 423614 256581 4 cubev_reg_0_dout1_reg\[23\]
+port 974 nsew
+rlabel metal2 s 423430 257669 423430 257669 4 cubev_reg_0_dout1_reg\[24\]
+port 975 nsew
+rlabel metal3 s 422326 258043 422326 258043 4 cubev_reg_0_dout1_reg\[25\]
+port 976 nsew
+rlabel metal2 s 423430 259063 423430 259063 4 cubev_reg_0_dout1_reg\[26\]
+port 977 nsew
+rlabel metal2 s 423154 263570 423154 263570 4 cubev_reg_0_dout1_reg\[27\]
+port 978 nsew
+rlabel metal2 s 423430 260457 423430 260457 4 cubev_reg_0_dout1_reg\[28\]
+port 979 nsew
+rlabel metal3 s 423614 260763 423614 260763 4 cubev_reg_0_dout1_reg\[29\]
+port 980 nsew
+rlabel metal2 s 423614 242641 423614 242641 4 cubev_reg_0_dout1_reg\[2\]
+port 981 nsew
+rlabel metal2 s 423430 261817 423430 261817 4 cubev_reg_0_dout1_reg\[30\]
+port 982 nsew
+rlabel metal3 s 423614 262123 423614 262123 4 cubev_reg_0_dout1_reg\[31\]
+port 983 nsew
+rlabel metal2 s 422878 243355 422878 243355 4 cubev_reg_0_dout1_reg\[3\]
+port 984 nsew
+rlabel metal2 s 423614 243967 423614 243967 4 cubev_reg_0_dout1_reg\[4\]
+port 985 nsew
+rlabel metal2 s 423522 244987 423522 244987 4 cubev_reg_0_dout1_reg\[5\]
+port 986 nsew
+rlabel metal2 s 423614 245361 423614 245361 4 cubev_reg_0_dout1_reg\[6\]
+port 987 nsew
+rlabel metal2 s 422878 246109 422878 246109 4 cubev_reg_0_dout1_reg\[7\]
+port 988 nsew
+rlabel metal2 s 423430 246755 423430 246755 4 cubev_reg_0_dout1_reg\[8\]
+port 989 nsew
+rlabel metal2 s 423522 247741 423522 247741 4 cubev_reg_0_dout1_reg\[9\]
+port 990 nsew
+rlabel metal3 s 422786 179877 422786 179877 4 cubev_reg_0_rstn
+port 991 nsew
+rlabel metal2 s 423614 234753 423614 234753 4 cubev_reg_0_web0
+port 992 nsew
+rlabel metal2 s 422970 195041 422970 195041 4 cubev_reg_0_wmask0\[0\]
+port 993 nsew
+rlabel metal2 s 423522 230945 423522 230945 4 cubev_reg_0_wmask0\[1\]
+port 994 nsew
+rlabel metal2 s 423062 231965 423062 231965 4 cubev_reg_0_wmask0\[2\]
+port 995 nsew
+rlabel metal2 s 423614 232339 423614 232339 4 cubev_reg_0_wmask0\[3\]
+port 996 nsew
+rlabel metal2 s 423062 308975 423062 308975 4 cubev_reg_1_addr0\[0\]
+port 997 nsew
+rlabel metal2 s 423614 323085 423614 323085 4 cubev_reg_1_addr0\[1\]
+port 998 nsew
+rlabel metal2 s 423614 324139 423614 324139 4 cubev_reg_1_addr0\[2\]
+port 999 nsew
+rlabel metal2 s 423614 324819 423614 324819 4 cubev_reg_1_addr0\[3\]
+port 1000 nsew
+rlabel metal2 s 423660 325380 423660 325380 4 cubev_reg_1_addr0\[4\]
+port 1001 nsew
+rlabel metal2 s 423062 326485 423062 326485 4 cubev_reg_1_addr0\[5\]
+port 1002 nsew
+rlabel metal2 s 423614 326893 423614 326893 4 cubev_reg_1_addr0\[6\]
+port 1003 nsew
+rlabel metal2 s 423660 327420 423660 327420 4 cubev_reg_1_addr0\[7\]
+port 1004 nsew
+rlabel metal2 s 422970 322473 422970 322473 4 cubev_reg_1_addr1\[0\]
+port 1005 nsew
+rlabel metal3 s 558846 313718 558846 313718 4 cubev_reg_1_addr1\[1\]
+port 1006 nsew
+rlabel metal2 s 422878 270385 422878 270385 4 cubev_reg_1_addr1\[2\]
+port 1007 nsew
+rlabel metal2 s 423430 271405 423430 271405 4 cubev_reg_1_addr1\[3\]
+port 1008 nsew
+rlabel metal2 s 423614 271711 423614 271711 4 cubev_reg_1_addr1\[4\]
+port 1009 nsew
+rlabel metal2 s 423614 272765 423614 272765 4 cubev_reg_1_addr1\[5\]
+port 1010 nsew
+rlabel metal3 s 423522 273037 423522 273037 4 cubev_reg_1_addr1\[6\]
+port 1011 nsew
+rlabel metal2 s 423430 274125 423430 274125 4 cubev_reg_1_addr1\[7\]
+port 1012 nsew
+rlabel metal2 s 423660 320484 423660 320484 4 cubev_reg_1_clk0
+port 1013 nsew
+rlabel metal2 s 423614 267631 423614 267631 4 cubev_reg_1_clk1
+port 1014 nsew
+rlabel metal2 s 422878 320943 422878 320943 4 cubev_reg_1_csb0
+port 1015 nsew
+rlabel metal3 s 558800 373830 558800 373830 4 cubev_reg_1_csb1
+port 1016 nsew
+rlabel metal2 s 423614 295919 423614 295919 4 cubev_reg_1_din0\[0\]
+port 1017 nsew
+rlabel metal2 s 423614 302549 423614 302549 4 cubev_reg_1_din0\[10\]
+port 1018 nsew
+rlabel metal2 s 423522 302855 423522 302855 4 cubev_reg_1_din0\[11\]
+port 1019 nsew
+rlabel metal2 s 423614 303943 423614 303943 4 cubev_reg_1_din0\[12\]
+port 1020 nsew
+rlabel metal2 s 423522 304249 423522 304249 4 cubev_reg_1_din0\[13\]
+port 1021 nsew
+rlabel metal2 s 423614 305269 423614 305269 4 cubev_reg_1_din0\[14\]
+port 1022 nsew
+rlabel metal2 s 423522 305643 423522 305643 4 cubev_reg_1_din0\[15\]
+port 1023 nsew
+rlabel metal2 s 423614 306629 423614 306629 4 cubev_reg_1_din0\[16\]
+port 1024 nsew
+rlabel metal4 s 501654 295768 501654 295768 4 cubev_reg_1_din0\[17\]
+port 1025 nsew
+rlabel metal2 s 423614 308057 423614 308057 4 cubev_reg_1_din0\[18\]
+port 1026 nsew
+rlabel metal2 s 423522 308363 423522 308363 4 cubev_reg_1_din0\[19\]
+port 1027 nsew
+rlabel metal2 s 423522 296157 423522 296157 4 cubev_reg_1_din0\[1\]
+port 1028 nsew
+rlabel metal2 s 423614 309417 423614 309417 4 cubev_reg_1_din0\[20\]
+port 1029 nsew
+rlabel metal2 s 423522 309723 423522 309723 4 cubev_reg_1_din0\[21\]
+port 1030 nsew
+rlabel metal2 s 423614 310743 423614 310743 4 cubev_reg_1_din0\[22\]
+port 1031 nsew
+rlabel metal2 s 423522 311117 423522 311117 4 cubev_reg_1_din0\[23\]
+port 1032 nsew
+rlabel metal2 s 423614 312137 423614 312137 4 cubev_reg_1_din0\[24\]
+port 1033 nsew
+rlabel metal2 s 423522 312443 423522 312443 4 cubev_reg_1_din0\[25\]
+port 1034 nsew
+rlabel metal2 s 423614 313531 423614 313531 4 cubev_reg_1_din0\[26\]
+port 1035 nsew
+rlabel metal2 s 423522 313837 423522 313837 4 cubev_reg_1_din0\[27\]
+port 1036 nsew
+rlabel metal2 s 423614 314857 423614 314857 4 cubev_reg_1_din0\[28\]
+port 1037 nsew
+rlabel metal2 s 423522 315231 423522 315231 4 cubev_reg_1_din0\[29\]
+port 1038 nsew
+rlabel metal4 s 484110 295768 484110 295768 4 cubev_reg_1_din0\[2\]
+port 1039 nsew
+rlabel metal2 s 423614 316217 423614 316217 4 cubev_reg_1_din0\[30\]
+port 1040 nsew
+rlabel metal2 s 423522 316591 423522 316591 4 cubev_reg_1_din0\[31\]
+port 1041 nsew
+rlabel metal4 s 485198 295768 485198 295768 4 cubev_reg_1_din0\[3\]
+port 1042 nsew
+rlabel metal4 s 486422 295768 486422 295768 4 cubev_reg_1_din0\[4\]
+port 1043 nsew
+rlabel metal4 s 487646 295768 487646 295768 4 cubev_reg_1_din0\[5\]
+port 1044 nsew
+rlabel metal4 s 488870 295836 488870 295836 4 cubev_reg_1_din0\[6\]
+port 1045 nsew
+rlabel metal4 s 489716 295256 489716 295256 4 cubev_reg_1_din0\[7\]
+port 1046 nsew
+rlabel metal2 s 423614 301155 423614 301155 4 cubev_reg_1_din0\[8\]
+port 1047 nsew
+rlabel metal2 s 423522 301529 423522 301529 4 cubev_reg_1_din0\[9\]
+port 1048 nsew
+rlabel metal2 s 423614 274499 423614 274499 4 cubev_reg_1_dout0\[0\]
+port 1049 nsew
+rlabel metal4 s 501926 295698 501926 295698 4 cubev_reg_1_dout0\[10\]
+port 1050 nsew
+rlabel metal4 s 503150 295768 503150 295768 4 cubev_reg_1_dout0\[11\]
+port 1051 nsew
+rlabel metal4 s 504510 295698 504510 295698 4 cubev_reg_1_dout0\[12\]
+port 1052 nsew
+rlabel metal4 s 505734 295768 505734 295768 4 cubev_reg_1_dout0\[13\]
+port 1053 nsew
+rlabel metal4 s 506958 295768 506958 295768 4 cubev_reg_1_dout0\[14\]
+port 1054 nsew
+rlabel metal4 s 508182 295698 508182 295698 4 cubev_reg_1_dout0\[15\]
+port 1055 nsew
+rlabel metal4 s 509134 295768 509134 295768 4 cubev_reg_1_dout0\[16\]
+port 1056 nsew
+rlabel metal2 s 423522 286433 423522 286433 4 cubev_reg_1_dout0\[17\]
+port 1057 nsew
+rlabel metal2 s 423614 286807 423614 286807 4 cubev_reg_1_dout0\[18\]
+port 1058 nsew
+rlabel metal2 s 423522 287827 423522 287827 4 cubev_reg_1_dout0\[19\]
+port 1059 nsew
+rlabel metal2 s 423522 275519 423522 275519 4 cubev_reg_1_dout0\[1\]
+port 1060 nsew
+rlabel metal2 s 423614 288133 423614 288133 4 cubev_reg_1_dout0\[20\]
+port 1061 nsew
+rlabel metal2 s 423522 289187 423522 289187 4 cubev_reg_1_dout0\[21\]
+port 1062 nsew
+rlabel metal2 s 423614 289561 423614 289561 4 cubev_reg_1_dout0\[22\]
+port 1063 nsew
+rlabel metal2 s 423614 290581 423614 290581 4 cubev_reg_1_dout0\[23\]
+port 1064 nsew
+rlabel metal2 s 423154 290887 423154 290887 4 cubev_reg_1_dout0\[24\]
+port 1065 nsew
+rlabel metal2 s 423522 291907 423522 291907 4 cubev_reg_1_dout0\[25\]
+port 1066 nsew
+rlabel metal2 s 423614 292281 423614 292281 4 cubev_reg_1_dout0\[26\]
+port 1067 nsew
+rlabel metal2 s 423522 293063 423522 293063 4 cubev_reg_1_dout0\[27\]
+port 1068 nsew
+rlabel metal3 s 423614 293267 423614 293267 4 cubev_reg_1_dout0\[28\]
+port 1069 nsew
+rlabel metal3 s 423614 294083 423614 294083 4 cubev_reg_1_dout0\[29\]
+port 1070 nsew
+rlabel metal2 s 422878 275825 422878 275825 4 cubev_reg_1_dout0\[2\]
+port 1071 nsew
+rlabel metal2 s 423522 294321 423522 294321 4 cubev_reg_1_dout0\[30\]
+port 1072 nsew
+rlabel metal2 s 423614 295511 423614 295511 4 cubev_reg_1_dout0\[31\]
+port 1073 nsew
+rlabel metal2 s 423522 276879 423522 276879 4 cubev_reg_1_dout0\[3\]
+port 1074 nsew
+rlabel metal2 s 422878 277185 422878 277185 4 cubev_reg_1_dout0\[4\]
+port 1075 nsew
+rlabel metal2 s 423522 278239 423522 278239 4 cubev_reg_1_dout0\[5\]
+port 1076 nsew
+rlabel metal2 s 423614 278545 423614 278545 4 cubev_reg_1_dout0\[6\]
+port 1077 nsew
+rlabel metal2 s 423522 279633 423522 279633 4 cubev_reg_1_dout0\[7\]
+port 1078 nsew
+rlabel metal2 s 423614 279939 423614 279939 4 cubev_reg_1_dout0\[8\]
+port 1079 nsew
+rlabel metal4 s 500702 295768 500702 295768 4 cubev_reg_1_dout0\[9\]
+port 1080 nsew
+rlabel metal4 s 489414 376905 489414 376905 4 cubev_reg_1_dout1\[0\]
+port 1081 nsew
+rlabel metal4 s 502062 376905 502062 376905 4 cubev_reg_1_dout1\[10\]
+port 1082 nsew
+rlabel metal4 s 503150 376905 503150 376905 4 cubev_reg_1_dout1\[11\]
+port 1083 nsew
+rlabel metal4 s 504646 376905 504646 376905 4 cubev_reg_1_dout1\[12\]
+port 1084 nsew
+rlabel metal4 s 505734 376905 505734 376905 4 cubev_reg_1_dout1\[13\]
+port 1085 nsew
+rlabel metal4 s 506958 376905 506958 376905 4 cubev_reg_1_dout1\[14\]
+port 1086 nsew
+rlabel metal4 s 508318 376905 508318 376905 4 cubev_reg_1_dout1\[15\]
+port 1087 nsew
+rlabel metal3 s 509335 379236 509335 379236 4 cubev_reg_1_dout1\[16\]
+port 1088 nsew
+rlabel metal4 s 510766 376973 510766 376973 4 cubev_reg_1_dout1\[17\]
+port 1089 nsew
+rlabel metal4 s 512126 376905 512126 376905 4 cubev_reg_1_dout1\[18\]
+port 1090 nsew
+rlabel metal4 s 513214 376905 513214 376905 4 cubev_reg_1_dout1\[19\]
+port 1091 nsew
+rlabel metal3 s 490383 379236 490383 379236 4 cubev_reg_1_dout1\[1\]
+port 1092 nsew
+rlabel metal4 s 514438 376973 514438 376973 4 cubev_reg_1_dout1\[20\]
+port 1093 nsew
+rlabel metal4 s 515798 376905 515798 376905 4 cubev_reg_1_dout1\[21\]
+port 1094 nsew
+rlabel metal4 s 517022 376973 517022 376973 4 cubev_reg_1_dout1\[22\]
+port 1095 nsew
+rlabel metal4 s 518382 376905 518382 376905 4 cubev_reg_1_dout1\[23\]
+port 1096 nsew
+rlabel metal4 s 519470 376905 519470 376905 4 cubev_reg_1_dout1\[24\]
+port 1097 nsew
+rlabel metal4 s 520830 376905 520830 376905 4 cubev_reg_1_dout1\[25\]
+port 1098 nsew
+rlabel metal4 s 521918 376905 521918 376905 4 cubev_reg_1_dout1\[26\]
+port 1099 nsew
+rlabel metal4 s 523142 376905 523142 376905 4 cubev_reg_1_dout1\[27\]
+port 1100 nsew
+rlabel metal4 s 524366 376905 524366 376905 4 cubev_reg_1_dout1\[28\]
+port 1101 nsew
+rlabel metal4 s 525726 376905 525726 376905 4 cubev_reg_1_dout1\[29\]
+port 1102 nsew
+rlabel metal4 s 492134 376905 492134 376905 4 cubev_reg_1_dout1\[2\]
+port 1103 nsew
+rlabel metal4 s 527086 376905 527086 376905 4 cubev_reg_1_dout1\[30\]
+port 1104 nsew
+rlabel metal4 s 528310 376905 528310 376905 4 cubev_reg_1_dout1\[31\]
+port 1105 nsew
+rlabel metal4 s 493222 376905 493222 376905 4 cubev_reg_1_dout1\[3\]
+port 1106 nsew
+rlabel metal4 s 494582 376905 494582 376905 4 cubev_reg_1_dout1\[4\]
+port 1107 nsew
+rlabel metal4 s 495806 376905 495806 376905 4 cubev_reg_1_dout1\[5\]
+port 1108 nsew
+rlabel metal4 s 497166 376905 497166 376905 4 cubev_reg_1_dout1\[6\]
+port 1109 nsew
+rlabel metal4 s 498390 376905 498390 376905 4 cubev_reg_1_dout1\[7\]
+port 1110 nsew
+rlabel metal4 s 499478 376905 499478 376905 4 cubev_reg_1_dout1\[8\]
+port 1111 nsew
+rlabel metal4 s 500702 376905 500702 376905 4 cubev_reg_1_dout1\[9\]
+port 1112 nsew
+rlabel metal2 s 422878 328185 422878 328185 4 cubev_reg_1_dout1_reg\[0\]
+port 1113 nsew
+rlabel metal2 s 423430 334951 423430 334951 4 cubev_reg_1_dout1_reg\[10\]
+port 1114 nsew
+rlabel metal2 s 423154 336141 423154 336141 4 cubev_reg_1_dout1_reg\[11\]
+port 1115 nsew
+rlabel metal2 s 423522 336447 423522 336447 4 cubev_reg_1_dout1_reg\[12\]
+port 1116 nsew
+rlabel metal2 s 423522 337467 423522 337467 4 cubev_reg_1_dout1_reg\[13\]
+port 1117 nsew
+rlabel metal2 s 422878 337841 422878 337841 4 cubev_reg_1_dout1_reg\[14\]
+port 1118 nsew
+rlabel metal2 s 423522 338827 423522 338827 4 cubev_reg_1_dout1_reg\[15\]
+port 1119 nsew
+rlabel metal2 s 422878 339201 422878 339201 4 cubev_reg_1_dout1_reg\[16\]
+port 1120 nsew
+rlabel metal2 s 423522 340221 423522 340221 4 cubev_reg_1_dout1_reg\[17\]
+port 1121 nsew
+rlabel metal2 s 422878 340595 422878 340595 4 cubev_reg_1_dout1_reg\[18\]
+port 1122 nsew
+rlabel metal2 s 423522 341581 423522 341581 4 cubev_reg_1_dout1_reg\[19\]
+port 1123 nsew
+rlabel metal2 s 423614 329273 423614 329273 4 cubev_reg_1_dout1_reg\[1\]
+port 1124 nsew
+rlabel metal2 s 422878 341955 422878 341955 4 cubev_reg_1_dout1_reg\[20\]
+port 1125 nsew
+rlabel metal2 s 422878 343043 422878 343043 4 cubev_reg_1_dout1_reg\[21\]
+port 1126 nsew
+rlabel metal2 s 423154 343315 423154 343315 4 cubev_reg_1_dout1_reg\[22\]
+port 1127 nsew
+rlabel metal2 s 423522 343553 423522 343553 4 cubev_reg_1_dout1_reg\[23\]
+port 1128 nsew
+rlabel metal2 s 422602 344675 422602 344675 4 cubev_reg_1_dout1_reg\[24\]
+port 1129 nsew
+rlabel metal3 s 423522 344981 423522 344981 4 cubev_reg_1_dout1_reg\[25\]
+port 1130 nsew
+rlabel metal2 s 422878 346035 422878 346035 4 cubev_reg_1_dout1_reg\[26\]
+port 1131 nsew
+rlabel metal3 s 423522 346341 423522 346341 4 cubev_reg_1_dout1_reg\[27\]
+port 1132 nsew
+rlabel metal2 s 422878 347395 422878 347395 4 cubev_reg_1_dout1_reg\[28\]
+port 1133 nsew
+rlabel metal3 s 423522 347701 423522 347701 4 cubev_reg_1_dout1_reg\[29\]
+port 1134 nsew
+rlabel metal2 s 423154 332299 423154 332299 4 cubev_reg_1_dout1_reg\[2\]
+port 1135 nsew
+rlabel metal2 s 423338 348789 423338 348789 4 cubev_reg_1_dout1_reg\[30\]
+port 1136 nsew
+rlabel metal3 s 423522 349027 423522 349027 4 cubev_reg_1_dout1_reg\[31\]
+port 1137 nsew
+rlabel metal2 s 423062 372368 423062 372368 4 cubev_reg_1_dout1_reg\[3\]
+port 1138 nsew
+rlabel metal2 s 423614 331007 423614 331007 4 cubev_reg_1_dout1_reg\[4\]
+port 1139 nsew
+rlabel metal2 s 423522 332027 423522 332027 4 cubev_reg_1_dout1_reg\[5\]
+port 1140 nsew
+rlabel metal2 s 423614 332333 423614 332333 4 cubev_reg_1_dout1_reg\[6\]
+port 1141 nsew
+rlabel metal2 s 423522 333387 423522 333387 4 cubev_reg_1_dout1_reg\[7\]
+port 1142 nsew
+rlabel metal1 s 423246 374918 423246 374918 4 cubev_reg_1_dout1_reg\[8\]
+port 1143 nsew
+rlabel metal2 s 423522 334747 423522 334747 4 cubev_reg_1_dout1_reg\[9\]
+port 1144 nsew
+rlabel metal2 s 423430 267257 423430 267257 4 cubev_reg_1_rstn
+port 1145 nsew
+rlabel metal2 s 423614 321725 423614 321725 4 cubev_reg_1_web0
+port 1146 nsew
+rlabel metal2 s 423614 317645 423614 317645 4 cubev_reg_1_wmask0\[0\]
+port 1147 nsew
+rlabel metal2 s 423522 317951 423522 317951 4 cubev_reg_1_wmask0\[1\]
+port 1148 nsew
+rlabel metal2 s 423614 318971 423614 318971 4 cubev_reg_1_wmask0\[2\]
+port 1149 nsew
+rlabel metal4 s 480574 295768 480574 295768 4 cubev_reg_1_wmask0\[3\]
+port 1150 nsew
+rlabel metal2 s 56534 155703 56534 155703 4 cubev_reg_2_addr0\[0\]
+port 1151 nsew
+rlabel metal3 s 39031 184076 39031 184076 4 cubev_reg_2_addr0\[1\]
+port 1152 nsew
+rlabel metal3 s 39077 186388 39077 186388 4 cubev_reg_2_addr0\[2\]
+port 1153 nsew
+rlabel metal3 s 39123 187748 39123 187748 4 cubev_reg_2_addr0\[3\]
+port 1154 nsew
+rlabel metal1 s 175950 190706 175950 190706 4 cubev_reg_2_addr0\[4\]
+port 1155 nsew
+rlabel metal3 s 39169 190468 39169 190468 4 cubev_reg_2_addr0\[5\]
+port 1156 nsew
+rlabel metal3 s 38939 191828 38939 191828 4 cubev_reg_2_addr0\[6\]
+port 1157 nsew
+rlabel metal3 s 39307 192508 39307 192508 4 cubev_reg_2_addr0\[7\]
+port 1158 nsew
+rlabel metal2 s 176778 238595 176778 238595 4 cubev_reg_2_addr1\[0\]
+port 1159 nsew
+rlabel metal2 s 140806 176477 140806 176477 4 cubev_reg_2_addr1\[1\]
+port 1160 nsew
+rlabel metal2 s 140806 174947 140806 174947 4 cubev_reg_2_addr1\[2\]
+port 1161 nsew
+rlabel metal2 s 140806 173723 140806 173723 4 cubev_reg_2_addr1\[3\]
+port 1162 nsew
+rlabel metal3 s 140806 171037 140806 171037 4 cubev_reg_2_addr1\[4\]
+port 1163 nsew
+rlabel metal1 s 175766 241502 175766 241502 4 cubev_reg_2_addr1\[5\]
+port 1164 nsew
+rlabel metal1 s 176042 241570 176042 241570 4 cubev_reg_2_addr1\[6\]
+port 1165 nsew
+rlabel metal1 s 175996 242930 175996 242930 4 cubev_reg_2_addr1\[7\]
+port 1166 nsew
+rlabel metal3 s 39261 164220 39261 164220 4 cubev_reg_2_clk0
+port 1167 nsew
+rlabel metal3 s 178319 237116 178319 237116 4 cubev_reg_2_clk1
+port 1168 nsew
+rlabel metal3 s 38893 164628 38893 164628 4 cubev_reg_2_csb0
+port 1169 nsew
+rlabel metal2 s 140806 236657 140806 236657 4 cubev_reg_2_csb1
+port 1170 nsew
+rlabel metal4 s 61548 155924 61548 155924 4 cubev_reg_2_din0\[0\]
+port 1171 nsew
+rlabel metal2 s 138874 178534 138874 178534 4 cubev_reg_2_din0\[10\]
+port 1172 nsew
+rlabel metal2 s 75762 154377 75762 154377 4 cubev_reg_2_din0\[11\]
+port 1173 nsew
+rlabel metal2 s 75854 154139 75854 154139 4 cubev_reg_2_din0\[12\]
+port 1174 nsew
+rlabel metal2 s 77234 155057 77234 155057 4 cubev_reg_2_din0\[13\]
+port 1175 nsew
+rlabel metal2 s 78614 154411 78614 154411 4 cubev_reg_2_din0\[14\]
+port 1176 nsew
+rlabel metal2 s 79994 154173 79994 154173 4 cubev_reg_2_din0\[15\]
+port 1177 nsew
+rlabel metal2 s 81374 155601 81374 155601 4 cubev_reg_2_din0\[16\]
+port 1178 nsew
+rlabel metal3 s 81650 156995 81650 156995 4 cubev_reg_2_din0\[17\]
+port 1179 nsew
+rlabel metal2 s 83858 155465 83858 155465 4 cubev_reg_2_din0\[18\]
+port 1180 nsew
+rlabel metal2 s 83950 157301 83950 157301 4 cubev_reg_2_din0\[19\]
+port 1181 nsew
+rlabel metal2 s 63434 154309 63434 154309 4 cubev_reg_2_din0\[1\]
+port 1182 nsew
+rlabel metal2 s 140254 181186 140254 181186 4 cubev_reg_2_din0\[20\]
+port 1183 nsew
+rlabel metal3 s 178043 207604 178043 207604 4 cubev_reg_2_din0\[21\]
+port 1184 nsew
+rlabel metal3 s 176686 208403 176686 208403 4 cubev_reg_2_din0\[22\]
+port 1185 nsew
+rlabel metal1 s 174340 208454 174340 208454 4 cubev_reg_2_din0\[23\]
+port 1186 nsew
+rlabel metal2 s 176686 209865 176686 209865 4 cubev_reg_2_din0\[24\]
+port 1187 nsew
+rlabel metal2 s 176778 210103 176778 210103 4 cubev_reg_2_din0\[25\]
+port 1188 nsew
+rlabel metal2 s 98670 156774 98670 156774 4 cubev_reg_2_din0\[26\]
+port 1189 nsew
+rlabel metal2 s 176686 211429 176686 211429 4 cubev_reg_2_din0\[27\]
+port 1190 nsew
+rlabel metal2 s 95174 153697 95174 153697 4 cubev_reg_2_din0\[28\]
+port 1191 nsew
+rlabel metal2 s 96554 155193 96554 155193 4 cubev_reg_2_din0\[29\]
+port 1192 nsew
+rlabel metal3 s 64170 156723 64170 156723 4 cubev_reg_2_din0\[2\]
+port 1193 nsew
+rlabel metal3 s 97934 155227 97934 155227 4 cubev_reg_2_din0\[30\]
+port 1194 nsew
+rlabel metal2 s 99314 154343 99314 154343 4 cubev_reg_2_din0\[31\]
+port 1195 nsew
+rlabel metal2 s 176778 195007 176778 195007 4 cubev_reg_2_din0\[3\]
+port 1196 nsew
+rlabel metal3 s 176686 196027 176686 196027 4 cubev_reg_2_din0\[4\]
+port 1197 nsew
+rlabel metal2 s 176778 196401 176778 196401 4 cubev_reg_2_din0\[5\]
+port 1198 nsew
+rlabel metal3 s 176686 197387 176686 197387 4 cubev_reg_2_din0\[6\]
+port 1199 nsew
+rlabel metal2 s 176778 197761 176778 197761 4 cubev_reg_2_din0\[7\]
+port 1200 nsew
+rlabel metal2 s 176686 198849 176686 198849 4 cubev_reg_2_din0\[8\]
+port 1201 nsew
+rlabel metal2 s 176778 199087 176778 199087 4 cubev_reg_2_din0\[9\]
+port 1202 nsew
+rlabel metal3 s 176686 215339 176686 215339 4 cubev_reg_2_dout0\[0\]
+port 1203 nsew
+rlabel metal3 s 82363 154972 82363 154972 4 cubev_reg_2_dout0\[10\]
+port 1204 nsew
+rlabel metal2 s 83950 155805 83950 155805 4 cubev_reg_2_dout0\[11\]
+port 1205 nsew
+rlabel metal2 s 176686 223703 176686 223703 4 cubev_reg_2_dout0\[12\]
+port 1206 nsew
+rlabel metal2 s 158102 188326 158102 188326 4 cubev_reg_2_dout0\[13\]
+port 1207 nsew
+rlabel metal2 s 141542 190927 141542 190927 4 cubev_reg_2_dout0\[14\]
+port 1208 nsew
+rlabel metal3 s 178779 225284 178779 225284 4 cubev_reg_2_dout0\[15\]
+port 1209 nsew
+rlabel metal2 s 153870 190349 153870 190349 4 cubev_reg_2_dout0\[16\]
+port 1210 nsew
+rlabel metal2 s 176778 226491 176778 226491 4 cubev_reg_2_dout0\[17\]
+port 1211 nsew
+rlabel metal3 s 176686 227851 176686 227851 4 cubev_reg_2_dout0\[18\]
+port 1212 nsew
+rlabel metal2 s 141450 189380 141450 189380 4 cubev_reg_2_dout0\[19\]
+port 1213 nsew
+rlabel metal2 s 176778 215577 176778 215577 4 cubev_reg_2_dout0\[1\]
+port 1214 nsew
+rlabel metal3 s 94898 156587 94898 156587 4 cubev_reg_2_dout0\[20\]
+port 1215 nsew
+rlabel metal2 s 96554 155771 96554 155771 4 cubev_reg_2_dout0\[21\]
+port 1216 nsew
+rlabel metal3 s 97359 154836 97359 154836 4 cubev_reg_2_dout0\[22\]
+port 1217 nsew
+rlabel metal2 s 98394 156621 98394 156621 4 cubev_reg_2_dout0\[23\]
+port 1218 nsew
+rlabel metal2 s 99314 155499 99314 155499 4 cubev_reg_2_dout0\[24\]
+port 1219 nsew
+rlabel metal2 s 100694 155703 100694 155703 4 cubev_reg_2_dout0\[25\]
+port 1220 nsew
+rlabel metal4 s 102051 154836 102051 154836 4 cubev_reg_2_dout0\[26\]
+port 1221 nsew
+rlabel metal3 s 103178 156451 103178 156451 4 cubev_reg_2_dout0\[27\]
+port 1222 nsew
+rlabel metal2 s 176778 233733 176778 233733 4 cubev_reg_2_dout0\[28\]
+port 1223 nsew
+rlabel metal2 s 176686 234787 176686 234787 4 cubev_reg_2_dout0\[29\]
+port 1224 nsew
+rlabel metal3 s 176686 216733 176686 216733 4 cubev_reg_2_dout0\[2\]
+port 1225 nsew
+rlabel metal2 s 139334 157216 139334 157216 4 cubev_reg_2_dout0\[30\]
+port 1226 nsew
+rlabel metal2 s 176686 236147 176686 236147 4 cubev_reg_2_dout0\[31\]
+port 1227 nsew
+rlabel metal2 s 176778 216903 176778 216903 4 cubev_reg_2_dout0\[3\]
+port 1228 nsew
+rlabel metal2 s 96278 156043 96278 156043 4 cubev_reg_2_dout0\[4\]
+port 1229 nsew
+rlabel metal3 s 81604 155584 81604 155584 4 cubev_reg_2_dout0\[5\]
+port 1230 nsew
+rlabel metal3 s 83628 157080 83628 157080 4 cubev_reg_2_dout0\[6\]
+port 1231 nsew
+rlabel metal4 s 78292 156264 78292 156264 4 cubev_reg_2_dout0\[7\]
+port 1232 nsew
+rlabel metal4 s 79212 157148 79212 157148 4 cubev_reg_2_dout0\[8\]
+port 1233 nsew
+rlabel metal4 s 81420 156400 81420 156400 4 cubev_reg_2_dout0\[9\]
+port 1234 nsew
+rlabel metal4 s 69414 238725 69414 238725 4 cubev_reg_2_dout1\[0\]
+port 1235 nsew
+rlabel metal4 s 82062 238725 82062 238725 4 cubev_reg_2_dout1\[10\]
+port 1236 nsew
+rlabel metal4 s 83150 238725 83150 238725 4 cubev_reg_2_dout1\[11\]
+port 1237 nsew
+rlabel metal4 s 84646 238725 84646 238725 4 cubev_reg_2_dout1\[12\]
+port 1238 nsew
+rlabel metal4 s 85734 238725 85734 238725 4 cubev_reg_2_dout1\[13\]
+port 1239 nsew
+rlabel metal4 s 86958 238725 86958 238725 4 cubev_reg_2_dout1\[14\]
+port 1240 nsew
+rlabel metal4 s 88318 238725 88318 238725 4 cubev_reg_2_dout1\[15\]
+port 1241 nsew
+rlabel metal4 s 89406 238725 89406 238725 4 cubev_reg_2_dout1\[16\]
+port 1242 nsew
+rlabel metal4 s 90766 238725 90766 238725 4 cubev_reg_2_dout1\[17\]
+port 1243 nsew
+rlabel metal4 s 92126 238725 92126 238725 4 cubev_reg_2_dout1\[18\]
+port 1244 nsew
+rlabel metal4 s 93214 238725 93214 238725 4 cubev_reg_2_dout1\[19\]
+port 1245 nsew
+rlabel metal4 s 70774 238725 70774 238725 4 cubev_reg_2_dout1\[1\]
+port 1246 nsew
+rlabel metal4 s 94438 238725 94438 238725 4 cubev_reg_2_dout1\[20\]
+port 1247 nsew
+rlabel metal4 s 95798 238725 95798 238725 4 cubev_reg_2_dout1\[21\]
+port 1248 nsew
+rlabel metal4 s 97022 238725 97022 238725 4 cubev_reg_2_dout1\[22\]
+port 1249 nsew
+rlabel metal4 s 98382 238725 98382 238725 4 cubev_reg_2_dout1\[23\]
+port 1250 nsew
+rlabel metal4 s 99470 238725 99470 238725 4 cubev_reg_2_dout1\[24\]
+port 1251 nsew
+rlabel metal4 s 100830 238725 100830 238725 4 cubev_reg_2_dout1\[25\]
+port 1252 nsew
+rlabel metal4 s 101918 238725 101918 238725 4 cubev_reg_2_dout1\[26\]
+port 1253 nsew
+rlabel metal4 s 103142 238725 103142 238725 4 cubev_reg_2_dout1\[27\]
+port 1254 nsew
+rlabel metal4 s 104366 238725 104366 238725 4 cubev_reg_2_dout1\[28\]
+port 1255 nsew
+rlabel metal4 s 105726 238725 105726 238725 4 cubev_reg_2_dout1\[29\]
+port 1256 nsew
+rlabel metal4 s 72134 238725 72134 238725 4 cubev_reg_2_dout1\[2\]
+port 1257 nsew
+rlabel metal4 s 107086 238725 107086 238725 4 cubev_reg_2_dout1\[30\]
+port 1258 nsew
+rlabel metal4 s 108310 238725 108310 238725 4 cubev_reg_2_dout1\[31\]
+port 1259 nsew
+rlabel metal4 s 73222 238725 73222 238725 4 cubev_reg_2_dout1\[3\]
+port 1260 nsew
+rlabel metal4 s 74582 238725 74582 238725 4 cubev_reg_2_dout1\[4\]
+port 1261 nsew
+rlabel metal4 s 75806 238725 75806 238725 4 cubev_reg_2_dout1\[5\]
+port 1262 nsew
+rlabel metal4 s 77166 238725 77166 238725 4 cubev_reg_2_dout1\[6\]
+port 1263 nsew
+rlabel metal4 s 78390 238725 78390 238725 4 cubev_reg_2_dout1\[7\]
+port 1264 nsew
+rlabel metal4 s 79478 238725 79478 238725 4 cubev_reg_2_dout1\[8\]
+port 1265 nsew
+rlabel metal4 s 80702 238725 80702 238725 4 cubev_reg_2_dout1\[9\]
+port 1266 nsew
+rlabel metal3 s 176686 244205 176686 244205 4 cubev_reg_2_dout1_reg\[0\]
+port 1267 nsew
+rlabel metal3 s 176686 251141 176686 251141 4 cubev_reg_2_dout1_reg\[10\]
+port 1268 nsew
+rlabel metal2 s 176778 252263 176778 252263 4 cubev_reg_2_dout1_reg\[11\]
+port 1269 nsew
+rlabel metal3 s 176686 252501 176686 252501 4 cubev_reg_2_dout1_reg\[12\]
+port 1270 nsew
+rlabel metal2 s 176778 253623 176778 253623 4 cubev_reg_2_dout1_reg\[13\]
+port 1271 nsew
+rlabel metal3 s 176686 253861 176686 253861 4 cubev_reg_2_dout1_reg\[14\]
+port 1272 nsew
+rlabel metal2 s 176778 254983 176778 254983 4 cubev_reg_2_dout1_reg\[15\]
+port 1273 nsew
+rlabel metal3 s 176686 255221 176686 255221 4 cubev_reg_2_dout1_reg\[16\]
+port 1274 nsew
+rlabel metal2 s 176778 256377 176778 256377 4 cubev_reg_2_dout1_reg\[17\]
+port 1275 nsew
+rlabel metal2 s 176686 256615 176686 256615 4 cubev_reg_2_dout1_reg\[18\]
+port 1276 nsew
+rlabel metal2 s 176778 257771 176778 257771 4 cubev_reg_2_dout1_reg\[19\]
+port 1277 nsew
+rlabel metal2 s 176778 245429 176778 245429 4 cubev_reg_2_dout1_reg\[1\]
+port 1278 nsew
+rlabel metal3 s 176686 257941 176686 257941 4 cubev_reg_2_dout1_reg\[20\]
+port 1279 nsew
+rlabel metal2 s 95634 281408 95634 281408 4 cubev_reg_2_dout1_reg\[21\]
+port 1280 nsew
+rlabel metal2 s 96922 282428 96922 282428 4 cubev_reg_2_dout1_reg\[22\]
+port 1281 nsew
+rlabel metal2 s 98210 282088 98210 282088 4 cubev_reg_2_dout1_reg\[23\]
+port 1282 nsew
+rlabel metal2 s 99498 281442 99498 281442 4 cubev_reg_2_dout1_reg\[24\]
+port 1283 nsew
+rlabel metal2 s 100786 282122 100786 282122 4 cubev_reg_2_dout1_reg\[25\]
+port 1284 nsew
+rlabel metal2 s 102166 280483 102166 280483 4 cubev_reg_2_dout1_reg\[26\]
+port 1285 nsew
+rlabel metal2 s 103454 280517 103454 280517 4 cubev_reg_2_dout1_reg\[27\]
+port 1286 nsew
+rlabel metal3 s 180044 262873 180044 262873 4 cubev_reg_2_dout1_reg\[28\]
+port 1287 nsew
+rlabel metal2 s 176778 264605 176778 264605 4 cubev_reg_2_dout1_reg\[29\]
+port 1288 nsew
+rlabel metal2 s 117990 264928 117990 264928 4 cubev_reg_2_dout1_reg\[2\]
+port 1289 nsew
+rlabel metal2 s 176686 264775 176686 264775 4 cubev_reg_2_dout1_reg\[30\]
+port 1290 nsew
+rlabel metal2 s 116794 272884 116794 272884 4 cubev_reg_2_dout1_reg\[31\]
+port 1291 nsew
+rlabel metal3 s 178733 246636 178733 246636 4 cubev_reg_2_dout1_reg\[3\]
+port 1292 nsew
+rlabel metal2 s 113850 265268 113850 265268 4 cubev_reg_2_dout1_reg\[4\]
+port 1293 nsew
+rlabel metal2 s 75026 282156 75026 282156 4 cubev_reg_2_dout1_reg\[5\]
+port 1294 nsew
+rlabel metal2 s 76314 282394 76314 282394 4 cubev_reg_2_dout1_reg\[6\]
+port 1295 nsew
+rlabel metal2 s 176778 249543 176778 249543 4 cubev_reg_2_dout1_reg\[7\]
+port 1296 nsew
+rlabel metal3 s 176686 249645 176686 249645 4 cubev_reg_2_dout1_reg\[8\]
+port 1297 nsew
+rlabel metal2 s 176778 250903 176778 250903 4 cubev_reg_2_dout1_reg\[9\]
+port 1298 nsew
+rlabel metal3 s 177997 182988 177997 182988 4 cubev_reg_2_rstn
+port 1299 nsew
+rlabel metal3 s 38985 165716 38985 165716 4 cubev_reg_2_web0
+port 1300 nsew
+rlabel metal3 s 57523 154972 57523 154972 4 cubev_reg_2_wmask0\[0\]
+port 1301 nsew
+rlabel metal3 s 59294 155771 59294 155771 4 cubev_reg_2_wmask0\[1\]
+port 1302 nsew
+rlabel metal2 s 59570 156689 59570 156689 4 cubev_reg_2_wmask0\[2\]
+port 1303 nsew
+rlabel metal2 s 60674 155873 60674 155873 4 cubev_reg_2_wmask0\[3\]
+port 1304 nsew
+rlabel metal2 s 423430 412165 423430 412165 4 cubev_reg_3_addr0\[0\]
+port 1305 nsew
+rlabel metal2 s 423614 412471 423614 412471 4 cubev_reg_3_addr0\[1\]
+port 1306 nsew
+rlabel metal2 s 423430 413491 423430 413491 4 cubev_reg_3_addr0\[2\]
+port 1307 nsew
+rlabel metal2 s 423614 413865 423614 413865 4 cubev_reg_3_addr0\[3\]
+port 1308 nsew
+rlabel metal2 s 423430 414885 423430 414885 4 cubev_reg_3_addr0\[4\]
+port 1309 nsew
+rlabel metal2 s 423614 415259 423614 415259 4 cubev_reg_3_addr0\[5\]
+port 1310 nsew
+rlabel metal2 s 423430 416245 423430 416245 4 cubev_reg_3_addr0\[6\]
+port 1311 nsew
+rlabel metal2 s 423614 416619 423614 416619 4 cubev_reg_3_addr0\[7\]
+port 1312 nsew
+rlabel metal4 s 541774 506794 541774 506794 4 cubev_reg_3_addr1\[0\]
+port 1313 nsew
+rlabel metal3 s 558961 443718 558961 443718 4 cubev_reg_3_addr1\[1\]
+port 1314 nsew
+rlabel metal3 s 558961 442086 558961 442086 4 cubev_reg_3_addr1\[2\]
+port 1315 nsew
+rlabel metal3 s 423522 360077 423522 360077 4 cubev_reg_3_addr1\[3\]
+port 1316 nsew
+rlabel metal2 s 423338 361097 423338 361097 4 cubev_reg_3_addr1\[4\]
+port 1317 nsew
+rlabel metal3 s 545445 423300 545445 423300 4 cubev_reg_3_addr1\[5\]
+port 1318 nsew
+rlabel metal4 s 545123 423572 545123 423572 4 cubev_reg_3_addr1\[6\]
+port 1319 nsew
+rlabel metal3 s 545399 423572 545399 423572 4 cubev_reg_3_addr1\[7\]
+port 1320 nsew
+rlabel metal3 s 423614 409717 423614 409717 4 cubev_reg_3_clk0
+port 1321 nsew
+rlabel metal2 s 423522 357017 423522 357017 4 cubev_reg_3_clk1
+port 1322 nsew
+rlabel metal2 s 422878 410805 422878 410805 4 cubev_reg_3_csb0
+port 1323 nsew
+rlabel metal3 s 558961 503830 558961 503830 4 cubev_reg_3_csb1
+port 1324 nsew
+rlabel metal2 s 423522 385747 423522 385747 4 cubev_reg_3_din0\[0\]
+port 1325 nsew
+rlabel metal3 s 423614 391901 423614 391901 4 cubev_reg_3_din0\[10\]
+port 1326 nsew
+rlabel metal2 s 423522 392955 423522 392955 4 cubev_reg_3_din0\[11\]
+port 1327 nsew
+rlabel metal3 s 423614 393261 423614 393261 4 cubev_reg_3_din0\[12\]
+port 1328 nsew
+rlabel metal2 s 423522 394349 423522 394349 4 cubev_reg_3_din0\[13\]
+port 1329 nsew
+rlabel metal3 s 423614 394587 423614 394587 4 cubev_reg_3_din0\[14\]
+port 1330 nsew
+rlabel metal2 s 422694 395675 422694 395675 4 cubev_reg_3_din0\[15\]
+port 1331 nsew
+rlabel metal3 s 499813 423572 499813 423572 4 cubev_reg_3_din0\[16\]
+port 1332 nsew
+rlabel metal3 s 501055 424116 501055 424116 4 cubev_reg_3_din0\[17\]
+port 1333 nsew
+rlabel metal4 s 502389 423572 502389 423572 4 cubev_reg_3_din0\[18\]
+port 1334 nsew
+rlabel metal3 s 503746 422773 503746 422773 4 cubev_reg_3_din0\[19\]
+port 1335 nsew
+rlabel metal2 s 423614 386121 423614 386121 4 cubev_reg_3_din0\[1\]
+port 1336 nsew
+rlabel metal2 s 504022 423215 504022 423215 4 cubev_reg_3_din0\[20\]
+port 1337 nsew
+rlabel metal3 s 505517 423572 505517 423572 4 cubev_reg_3_din0\[21\]
+port 1338 nsew
+rlabel metal3 s 506851 422756 506851 422756 4 cubev_reg_3_din0\[22\]
+port 1339 nsew
+rlabel metal2 s 508438 423759 508438 423759 4 cubev_reg_3_din0\[23\]
+port 1340 nsew
+rlabel metal2 s 423476 412692 423476 412692 4 cubev_reg_3_din0\[24\]
+port 1341 nsew
+rlabel metal2 s 422786 402543 422786 402543 4 cubev_reg_3_din0\[25\]
+port 1342 nsew
+rlabel metal3 s 423614 402917 423614 402917 4 cubev_reg_3_din0\[26\]
+port 1343 nsew
+rlabel metal2 s 423430 403903 423430 403903 4 cubev_reg_3_din0\[27\]
+port 1344 nsew
+rlabel metal3 s 423614 404277 423614 404277 4 cubev_reg_3_din0\[28\]
+port 1345 nsew
+rlabel metal2 s 423614 405297 423614 405297 4 cubev_reg_3_din0\[29\]
+port 1346 nsew
+rlabel metal2 s 423522 387175 423522 387175 4 cubev_reg_3_din0\[2\]
+port 1347 nsew
+rlabel metal2 s 423430 408459 423430 408459 4 cubev_reg_3_din0\[30\]
+port 1348 nsew
+rlabel metal2 s 422510 409768 422510 409768 4 cubev_reg_3_din0\[31\]
+port 1349 nsew
+rlabel metal2 s 423614 387481 423614 387481 4 cubev_reg_3_din0\[3\]
+port 1350 nsew
+rlabel metal2 s 423522 388501 423522 388501 4 cubev_reg_3_din0\[4\]
+port 1351 nsew
+rlabel metal2 s 423614 388875 423614 388875 4 cubev_reg_3_din0\[5\]
+port 1352 nsew
+rlabel metal1 s 486818 423538 486818 423538 4 cubev_reg_3_din0\[6\]
+port 1353 nsew
+rlabel metal2 s 423338 403699 423338 403699 4 cubev_reg_3_din0\[7\]
+port 1354 nsew
+rlabel metal3 s 423430 390507 423430 390507 4 cubev_reg_3_din0\[8\]
+port 1355 nsew
+rlabel metal3 s 423522 391357 423522 391357 4 cubev_reg_3_din0\[9\]
+port 1356 nsew
+rlabel metal1 s 423108 366758 423108 366758 4 cubev_reg_3_dout0\[0\]
+port 1357 nsew
+rlabel metal2 s 423338 370719 423338 370719 4 cubev_reg_3_dout0\[10\]
+port 1358 nsew
+rlabel metal2 s 423522 371025 423522 371025 4 cubev_reg_3_dout0\[11\]
+port 1359 nsew
+rlabel metal2 s 423338 372164 423338 372164 4 cubev_reg_3_dout0\[12\]
+port 1360 nsew
+rlabel metal2 s 423522 372419 423522 372419 4 cubev_reg_3_dout0\[13\]
+port 1361 nsew
+rlabel metal2 s 422878 373473 422878 373473 4 cubev_reg_3_dout0\[14\]
+port 1362 nsew
+rlabel metal3 s 507748 423572 507748 423572 4 cubev_reg_3_dout0\[15\]
+port 1363 nsew
+rlabel metal3 s 507288 422620 507288 422620 4 cubev_reg_3_dout0\[16\]
+port 1364 nsew
+rlabel metal2 s 423614 375173 423614 375173 4 cubev_reg_3_dout0\[17\]
+port 1365 nsew
+rlabel metal2 s 423614 376193 423614 376193 4 cubev_reg_3_dout0\[18\]
+port 1366 nsew
+rlabel metal2 s 423430 376856 423430 376856 4 cubev_reg_3_dout0\[19\]
+port 1367 nsew
+rlabel metal3 s 423522 364157 423522 364157 4 cubev_reg_3_dout0\[1\]
+port 1368 nsew
+rlabel metal2 s 423522 377315 423522 377315 4 cubev_reg_3_dout0\[20\]
+port 1369 nsew
+rlabel metal2 s 423614 377519 423614 377519 4 cubev_reg_3_dout0\[21\]
+port 1370 nsew
+rlabel metal4 s 516641 425340 516641 425340 4 cubev_reg_3_dout0\[22\]
+port 1371 nsew
+rlabel metal2 s 423614 378879 423614 378879 4 cubev_reg_3_dout0\[23\]
+port 1372 nsew
+rlabel metal4 s 519070 426020 519070 426020 4 cubev_reg_3_dout0\[24\]
+port 1373 nsew
+rlabel metal4 s 520462 426020 520462 426020 4 cubev_reg_3_dout0\[25\]
+port 1374 nsew
+rlabel metal4 s 521732 424456 521732 424456 4 cubev_reg_3_dout0\[26\]
+port 1375 nsew
+rlabel metal4 s 523756 424660 523756 424660 4 cubev_reg_3_dout0\[27\]
+port 1376 nsew
+rlabel metal4 s 523940 424524 523940 424524 4 cubev_reg_3_dout0\[28\]
+port 1377 nsew
+rlabel metal3 s 524745 423572 524745 423572 4 cubev_reg_3_dout0\[29\]
+port 1378 nsew
+rlabel metal2 s 423522 365245 423522 365245 4 cubev_reg_3_dout0\[2\]
+port 1379 nsew
+rlabel metal2 s 423430 386512 423430 386512 4 cubev_reg_3_dout0\[30\]
+port 1380 nsew
+rlabel metal4 s 527882 426020 527882 426020 4 cubev_reg_3_dout0\[31\]
+port 1381 nsew
+rlabel metal2 s 423246 390728 423246 390728 4 cubev_reg_3_dout0\[3\]
+port 1382 nsew
+rlabel metal3 s 422878 366197 422878 366197 4 cubev_reg_3_dout0\[4\]
+port 1383 nsew
+rlabel metal2 s 423522 366945 423522 366945 4 cubev_reg_3_dout0\[5\]
+port 1384 nsew
+rlabel metal2 s 423338 367965 423338 367965 4 cubev_reg_3_dout0\[6\]
+port 1385 nsew
+rlabel metal2 s 423522 368339 423522 368339 4 cubev_reg_3_dout0\[7\]
+port 1386 nsew
+rlabel metal2 s 423338 369325 423338 369325 4 cubev_reg_3_dout0\[8\]
+port 1387 nsew
+rlabel metal2 s 423522 369699 423522 369699 4 cubev_reg_3_dout0\[9\]
+port 1388 nsew
+rlabel metal4 s 489414 506794 489414 506794 4 cubev_reg_3_dout1\[0\]
+port 1389 nsew
+rlabel metal4 s 502062 506794 502062 506794 4 cubev_reg_3_dout1\[10\]
+port 1390 nsew
+rlabel metal4 s 503150 506794 503150 506794 4 cubev_reg_3_dout1\[11\]
+port 1391 nsew
+rlabel metal4 s 504646 506794 504646 506794 4 cubev_reg_3_dout1\[12\]
+port 1392 nsew
+rlabel metal4 s 505734 506794 505734 506794 4 cubev_reg_3_dout1\[13\]
+port 1393 nsew
+rlabel metal4 s 506958 506794 506958 506794 4 cubev_reg_3_dout1\[14\]
+port 1394 nsew
+rlabel metal4 s 508318 506794 508318 506794 4 cubev_reg_3_dout1\[15\]
+port 1395 nsew
+rlabel metal4 s 509406 506794 509406 506794 4 cubev_reg_3_dout1\[16\]
+port 1396 nsew
+rlabel metal4 s 510766 506794 510766 506794 4 cubev_reg_3_dout1\[17\]
+port 1397 nsew
+rlabel metal4 s 512126 506794 512126 506794 4 cubev_reg_3_dout1\[18\]
+port 1398 nsew
+rlabel metal4 s 513214 506794 513214 506794 4 cubev_reg_3_dout1\[19\]
+port 1399 nsew
+rlabel metal4 s 490774 506794 490774 506794 4 cubev_reg_3_dout1\[1\]
+port 1400 nsew
+rlabel metal4 s 514438 506794 514438 506794 4 cubev_reg_3_dout1\[20\]
+port 1401 nsew
+rlabel metal4 s 515798 506862 515798 506862 4 cubev_reg_3_dout1\[21\]
+port 1402 nsew
+rlabel metal4 s 517022 506794 517022 506794 4 cubev_reg_3_dout1\[22\]
+port 1403 nsew
+rlabel metal4 s 518382 506794 518382 506794 4 cubev_reg_3_dout1\[23\]
+port 1404 nsew
+rlabel metal4 s 519470 506862 519470 506862 4 cubev_reg_3_dout1\[24\]
+port 1405 nsew
+rlabel metal4 s 520830 506794 520830 506794 4 cubev_reg_3_dout1\[25\]
+port 1406 nsew
+rlabel metal4 s 521918 506794 521918 506794 4 cubev_reg_3_dout1\[26\]
+port 1407 nsew
+rlabel metal4 s 523142 506862 523142 506862 4 cubev_reg_3_dout1\[27\]
+port 1408 nsew
+rlabel metal4 s 524366 506794 524366 506794 4 cubev_reg_3_dout1\[28\]
+port 1409 nsew
+rlabel metal4 s 525726 506794 525726 506794 4 cubev_reg_3_dout1\[29\]
+port 1410 nsew
+rlabel metal4 s 492134 506794 492134 506794 4 cubev_reg_3_dout1\[2\]
+port 1411 nsew
+rlabel metal4 s 527086 506862 527086 506862 4 cubev_reg_3_dout1\[30\]
+port 1412 nsew
+rlabel metal4 s 528310 506794 528310 506794 4 cubev_reg_3_dout1\[31\]
+port 1413 nsew
+rlabel metal4 s 493222 506794 493222 506794 4 cubev_reg_3_dout1\[3\]
+port 1414 nsew
+rlabel metal4 s 494582 506794 494582 506794 4 cubev_reg_3_dout1\[4\]
+port 1415 nsew
+rlabel metal4 s 495806 506794 495806 506794 4 cubev_reg_3_dout1\[5\]
+port 1416 nsew
+rlabel metal4 s 497166 506794 497166 506794 4 cubev_reg_3_dout1\[6\]
+port 1417 nsew
+rlabel metal4 s 498390 506794 498390 506794 4 cubev_reg_3_dout1\[7\]
+port 1418 nsew
+rlabel metal4 s 499478 506794 499478 506794 4 cubev_reg_3_dout1\[8\]
+port 1419 nsew
+rlabel metal4 s 500702 506794 500702 506794 4 cubev_reg_3_dout1\[9\]
+port 1420 nsew
+rlabel metal2 s 423430 417605 423430 417605 4 cubev_reg_3_dout1_reg\[0\]
+port 1421 nsew
+rlabel metal2 s 423522 424507 423522 424507 4 cubev_reg_3_dout1_reg\[10\]
+port 1422 nsew
+rlabel metal2 s 423614 424813 423614 424813 4 cubev_reg_3_dout1_reg\[11\]
+port 1423 nsew
+rlabel metal2 s 423522 425867 423522 425867 4 cubev_reg_3_dout1_reg\[12\]
+port 1424 nsew
+rlabel metal2 s 423614 426173 423614 426173 4 cubev_reg_3_dout1_reg\[13\]
+port 1425 nsew
+rlabel metal2 s 423522 427227 423522 427227 4 cubev_reg_3_dout1_reg\[14\]
+port 1426 nsew
+rlabel metal2 s 423614 427533 423614 427533 4 cubev_reg_3_dout1_reg\[15\]
+port 1427 nsew
+rlabel metal2 s 423522 428587 423522 428587 4 cubev_reg_3_dout1_reg\[16\]
+port 1428 nsew
+rlabel metal2 s 423614 428893 423614 428893 4 cubev_reg_3_dout1_reg\[17\]
+port 1429 nsew
+rlabel metal2 s 423522 429947 423522 429947 4 cubev_reg_3_dout1_reg\[18\]
+port 1430 nsew
+rlabel metal2 s 423614 430321 423614 430321 4 cubev_reg_3_dout1_reg\[19\]
+port 1431 nsew
+rlabel metal2 s 423614 417979 423614 417979 4 cubev_reg_3_dout1_reg\[1\]
+port 1432 nsew
+rlabel metal3 s 422878 430797 422878 430797 4 cubev_reg_3_dout1_reg\[20\]
+port 1433 nsew
+rlabel metal2 s 423614 431681 423614 431681 4 cubev_reg_3_dout1_reg\[21\]
+port 1434 nsew
+rlabel metal2 s 423614 432701 423614 432701 4 cubev_reg_3_dout1_reg\[22\]
+port 1435 nsew
+rlabel metal2 s 423154 433007 423154 433007 4 cubev_reg_3_dout1_reg\[23\]
+port 1436 nsew
+rlabel metal2 s 422694 434061 422694 434061 4 cubev_reg_3_dout1_reg\[24\]
+port 1437 nsew
+rlabel metal2 s 423614 434435 423614 434435 4 cubev_reg_3_dout1_reg\[25\]
+port 1438 nsew
+rlabel metal2 s 423154 435421 423154 435421 4 cubev_reg_3_dout1_reg\[26\]
+port 1439 nsew
+rlabel metal2 s 423614 435795 423614 435795 4 cubev_reg_3_dout1_reg\[27\]
+port 1440 nsew
+rlabel metal2 s 423430 436611 423430 436611 4 cubev_reg_3_dout1_reg\[28\]
+port 1441 nsew
+rlabel metal1 s 423062 502078 423062 502078 4 cubev_reg_3_dout1_reg\[29\]
+port 1442 nsew
+rlabel metal2 s 423430 418999 423430 418999 4 cubev_reg_3_dout1_reg\[2\]
+port 1443 nsew
+rlabel metal3 s 423614 437427 423614 437427 4 cubev_reg_3_dout1_reg\[30\]
+port 1444 nsew
+rlabel metal2 s 423614 438549 423614 438549 4 cubev_reg_3_dout1_reg\[31\]
+port 1445 nsew
+rlabel metal2 s 423614 419305 423614 419305 4 cubev_reg_3_dout1_reg\[3\]
+port 1446 nsew
+rlabel metal2 s 422878 420393 422878 420393 4 cubev_reg_3_dout1_reg\[4\]
+port 1447 nsew
+rlabel metal2 s 422418 421753 422418 421753 4 cubev_reg_3_dout1_reg\[5\]
+port 1448 nsew
+rlabel metal2 s 423614 421753 423614 421753 4 cubev_reg_3_dout1_reg\[6\]
+port 1449 nsew
+rlabel metal2 s 422970 434877 422970 434877 4 cubev_reg_3_dout1_reg\[7\]
+port 1450 nsew
+rlabel metal1 s 423246 436696 423246 436696 4 cubev_reg_3_dout1_reg\[8\]
+port 1451 nsew
+rlabel metal2 s 423614 423453 423614 423453 4 cubev_reg_3_dout1_reg\[9\]
+port 1452 nsew
+rlabel metal3 s 423338 355997 423338 355997 4 cubev_reg_3_rstn
+port 1453 nsew
+rlabel metal3 s 423614 411077 423614 411077 4 cubev_reg_3_web0
+port 1454 nsew
+rlabel metal2 s 423614 407031 423614 407031 4 cubev_reg_3_wmask0\[0\]
+port 1455 nsew
+rlabel metal2 s 422878 408017 422878 408017 4 cubev_reg_3_wmask0\[1\]
+port 1456 nsew
+rlabel metal2 s 423614 408391 423614 408391 4 cubev_reg_3_wmask0\[2\]
+port 1457 nsew
+rlabel metal2 s 422878 409411 422878 409411 4 cubev_reg_3_wmask0\[3\]
+port 1458 nsew
+rlabel metal2 s 422786 500871 422786 500871 4 cubev_reg_4_addr0\[0\]
+port 1459 nsew
+rlabel metal2 s 423154 501857 423154 501857 4 cubev_reg_4_addr0\[1\]
+port 1460 nsew
+rlabel metal2 s 423338 502231 423338 502231 4 cubev_reg_4_addr0\[2\]
+port 1461 nsew
+rlabel metal2 s 423154 503217 423154 503217 4 cubev_reg_4_addr0\[3\]
+port 1462 nsew
+rlabel metal2 s 423338 503591 423338 503591 4 cubev_reg_4_addr0\[4\]
+port 1463 nsew
+rlabel metal2 s 423062 504611 423062 504611 4 cubev_reg_4_addr0\[5\]
+port 1464 nsew
+rlabel metal2 s 423338 504985 423338 504985 4 cubev_reg_4_addr0\[6\]
+port 1465 nsew
+rlabel metal2 s 423062 506005 423062 506005 4 cubev_reg_4_addr0\[7\]
+port 1466 nsew
+rlabel metal3 s 423614 446981 423614 446981 4 cubev_reg_4_addr1\[0\]
+port 1467 nsew
+rlabel metal2 s 423522 448103 423522 448103 4 cubev_reg_4_addr1\[1\]
+port 1468 nsew
+rlabel metal3 s 423614 448477 423614 448477 4 cubev_reg_4_addr1\[2\]
+port 1469 nsew
+rlabel metal2 s 423522 449463 423522 449463 4 cubev_reg_4_addr1\[3\]
+port 1470 nsew
+rlabel metal3 s 423614 449837 423614 449837 4 cubev_reg_4_addr1\[4\]
+port 1471 nsew
+rlabel metal2 s 422694 450653 422694 450653 4 cubev_reg_4_addr1\[5\]
+port 1472 nsew
+rlabel metal3 s 423614 451197 423614 451197 4 cubev_reg_4_addr1\[6\]
+port 1473 nsew
+rlabel metal2 s 423522 452183 423522 452183 4 cubev_reg_4_addr1\[7\]
+port 1474 nsew
+rlabel metal2 s 422602 499103 422602 499103 4 cubev_reg_4_clk0
+port 1475 nsew
+rlabel metal3 s 423614 445723 423614 445723 4 cubev_reg_4_clk1
+port 1476 nsew
+rlabel metal3 s 423154 499477 423154 499477 4 cubev_reg_4_csb0
+port 1477 nsew
+rlabel metal2 s 423522 446743 423522 446743 4 cubev_reg_4_csb1
+port 1478 nsew
+rlabel metal2 s 423154 474453 423154 474453 4 cubev_reg_4_din0\[0\]
+port 1479 nsew
+rlabel metal2 s 423154 481321 423154 481321 4 cubev_reg_4_din0\[10\]
+port 1480 nsew
+rlabel metal2 s 423154 482375 423154 482375 4 cubev_reg_4_din0\[11\]
+port 1481 nsew
+rlabel metal2 s 422694 482579 422694 482579 4 cubev_reg_4_din0\[12\]
+port 1482 nsew
+rlabel metal2 s 423154 483701 423154 483701 4 cubev_reg_4_din0\[13\]
+port 1483 nsew
+rlabel metal2 s 422694 484075 422694 484075 4 cubev_reg_4_din0\[14\]
+port 1484 nsew
+rlabel metal2 s 422786 484279 422786 484279 4 cubev_reg_4_din0\[15\]
+port 1485 nsew
+rlabel metal2 s 422694 485435 422694 485435 4 cubev_reg_4_din0\[16\]
+port 1486 nsew
+rlabel metal3 s 423154 485741 423154 485741 4 cubev_reg_4_din0\[17\]
+port 1487 nsew
+rlabel metal2 s 422510 486795 422510 486795 4 cubev_reg_4_din0\[18\]
+port 1488 nsew
+rlabel metal3 s 423154 487101 423154 487101 4 cubev_reg_4_din0\[19\]
+port 1489 nsew
+rlabel metal2 s 423154 475337 423154 475337 4 cubev_reg_4_din0\[1\]
+port 1490 nsew
+rlabel metal2 s 422786 488189 422786 488189 4 cubev_reg_4_din0\[20\]
+port 1491 nsew
+rlabel metal3 s 423154 488427 423154 488427 4 cubev_reg_4_din0\[21\]
+port 1492 nsew
+rlabel metal2 s 422510 489515 422510 489515 4 cubev_reg_4_din0\[22\]
+port 1493 nsew
+rlabel metal3 s 423154 489821 423154 489821 4 cubev_reg_4_din0\[23\]
+port 1494 nsew
+rlabel metal2 s 423154 490739 423154 490739 4 cubev_reg_4_din0\[24\]
+port 1495 nsew
+rlabel metal2 s 423154 491215 423154 491215 4 cubev_reg_4_din0\[25\]
+port 1496 nsew
+rlabel metal2 s 423154 492303 423154 492303 4 cubev_reg_4_din0\[26\]
+port 1497 nsew
+rlabel metal3 s 422786 492541 422786 492541 4 cubev_reg_4_din0\[27\]
+port 1498 nsew
+rlabel metal2 s 422786 493357 422786 493357 4 cubev_reg_4_din0\[28\]
+port 1499 nsew
+rlabel metal3 s 423154 494003 423154 494003 4 cubev_reg_4_din0\[29\]
+port 1500 nsew
+rlabel metal2 s 422694 475711 422694 475711 4 cubev_reg_4_din0\[2\]
+port 1501 nsew
+rlabel metal2 s 422602 495023 422602 495023 4 cubev_reg_4_din0\[30\]
+port 1502 nsew
+rlabel metal3 s 423154 495397 423154 495397 4 cubev_reg_4_din0\[31\]
+port 1503 nsew
+rlabel metal2 s 423154 476629 423154 476629 4 cubev_reg_4_din0\[3\]
+port 1504 nsew
+rlabel metal2 s 423154 477241 423154 477241 4 cubev_reg_4_din0\[4\]
+port 1505 nsew
+rlabel metal2 s 422786 477819 422786 477819 4 cubev_reg_4_din0\[5\]
+port 1506 nsew
+rlabel metal2 s 423154 478601 423154 478601 4 cubev_reg_4_din0\[6\]
+port 1507 nsew
+rlabel metal2 s 423154 479621 423154 479621 4 cubev_reg_4_din0\[7\]
+port 1508 nsew
+rlabel metal2 s 422878 494480 422878 494480 4 cubev_reg_4_din0\[8\]
+port 1509 nsew
+rlabel metal2 s 422786 481015 422786 481015 4 cubev_reg_4_din0\[9\]
+port 1510 nsew
+rlabel metal3 s 423614 452557 423614 452557 4 cubev_reg_4_dout0\[0\]
+port 1511 nsew
+rlabel metal2 s 423614 459425 423614 459425 4 cubev_reg_4_dout0\[10\]
+port 1512 nsew
+rlabel metal2 s 423062 460275 423062 460275 4 cubev_reg_4_dout0\[11\]
+port 1513 nsew
+rlabel metal2 s 423522 460785 423522 460785 4 cubev_reg_4_dout0\[12\]
+port 1514 nsew
+rlabel metal2 s 423154 463233 423154 463233 4 cubev_reg_4_dout0\[13\]
+port 1515 nsew
+rlabel metal2 s 423614 462179 423614 462179 4 cubev_reg_4_dout0\[14\]
+port 1516 nsew
+rlabel metal2 s 423522 463165 423522 463165 4 cubev_reg_4_dout0\[15\]
+port 1517 nsew
+rlabel metal2 s 423614 463539 423614 463539 4 cubev_reg_4_dout0\[16\]
+port 1518 nsew
+rlabel metal2 s 423522 464525 423522 464525 4 cubev_reg_4_dout0\[17\]
+port 1519 nsew
+rlabel metal2 s 423614 464899 423614 464899 4 cubev_reg_4_dout0\[18\]
+port 1520 nsew
+rlabel metal2 s 422970 486319 422970 486319 4 cubev_reg_4_dout0\[19\]
+port 1521 nsew
+rlabel metal2 s 423430 454988 423430 454988 4 cubev_reg_4_dout0\[1\]
+port 1522 nsew
+rlabel metal2 s 423614 466259 423614 466259 4 cubev_reg_4_dout0\[20\]
+port 1523 nsew
+rlabel metal2 s 422694 466871 422694 466871 4 cubev_reg_4_dout0\[21\]
+port 1524 nsew
+rlabel metal2 s 423614 467653 423614 467653 4 cubev_reg_4_dout0\[22\]
+port 1525 nsew
+rlabel metal2 s 422418 468639 422418 468639 4 cubev_reg_4_dout0\[23\]
+port 1526 nsew
+rlabel metal2 s 423614 469013 423614 469013 4 cubev_reg_4_dout0\[24\]
+port 1527 nsew
+rlabel metal2 s 423154 470033 423154 470033 4 cubev_reg_4_dout0\[25\]
+port 1528 nsew
+rlabel metal2 s 423614 490739 423614 490739 4 cubev_reg_4_dout0\[26\]
+port 1529 nsew
+rlabel metal2 s 422694 471393 422694 471393 4 cubev_reg_4_dout0\[27\]
+port 1530 nsew
+rlabel metal2 s 423154 471767 423154 471767 4 cubev_reg_4_dout0\[28\]
+port 1531 nsew
+rlabel metal2 s 423154 472787 423154 472787 4 cubev_reg_4_dout0\[29\]
+port 1532 nsew
+rlabel metal2 s 423062 463309 423062 463309 4 cubev_reg_4_dout0\[2\]
+port 1533 nsew
+rlabel metal1 s 422878 499562 422878 499562 4 cubev_reg_4_dout0\[30\]
+port 1534 nsew
+rlabel metal2 s 423062 474147 423062 474147 4 cubev_reg_4_dout0\[31\]
+port 1535 nsew
+rlabel metal2 s 422878 454903 422878 454903 4 cubev_reg_4_dout0\[3\]
+port 1536 nsew
+rlabel metal2 s 423614 455311 423614 455311 4 cubev_reg_4_dout0\[4\]
+port 1537 nsew
+rlabel metal2 s 423522 456297 423522 456297 4 cubev_reg_4_dout0\[5\]
+port 1538 nsew
+rlabel metal2 s 423614 456671 423614 456671 4 cubev_reg_4_dout0\[6\]
+port 1539 nsew
+rlabel metal2 s 422878 457691 422878 457691 4 cubev_reg_4_dout0\[7\]
+port 1540 nsew
+rlabel metal2 s 423614 458065 423614 458065 4 cubev_reg_4_dout0\[8\]
+port 1541 nsew
+rlabel metal2 s 423476 512108 423476 512108 4 cubev_reg_4_dout0\[9\]
+port 1542 nsew
+rlabel metal3 s 488957 654500 488957 654500 4 cubev_reg_4_dout1\[0\]
+port 1543 nsew
+rlabel metal3 s 501745 655316 501745 655316 4 cubev_reg_4_dout1\[10\]
+port 1544 nsew
+rlabel metal3 s 502941 655316 502941 655316 4 cubev_reg_4_dout1\[11\]
+port 1545 nsew
+rlabel metal3 s 504321 654364 504321 654364 4 cubev_reg_4_dout1\[12\]
+port 1546 nsew
+rlabel metal3 s 505517 655316 505517 655316 4 cubev_reg_4_dout1\[13\]
+port 1547 nsew
+rlabel metal3 s 506805 655316 506805 655316 4 cubev_reg_4_dout1\[14\]
+port 1548 nsew
+rlabel metal3 s 508093 654636 508093 654636 4 cubev_reg_4_dout1\[15\]
+port 1549 nsew
+rlabel metal3 s 509335 655316 509335 655316 4 cubev_reg_4_dout1\[16\]
+port 1550 nsew
+rlabel metal4 s 510669 655316 510669 655316 4 cubev_reg_4_dout1\[17\]
+port 1551 nsew
+rlabel metal4 s 512141 654228 512141 654228 4 cubev_reg_4_dout1\[18\]
+port 1552 nsew
+rlabel metal3 s 513153 655316 513153 655316 4 cubev_reg_4_dout1\[19\]
+port 1553 nsew
+rlabel metal3 s 490383 655316 490383 655316 4 cubev_reg_4_dout1\[1\]
+port 1554 nsew
+rlabel metal4 s 514349 655316 514349 655316 4 cubev_reg_4_dout1\[20\]
+port 1555 nsew
+rlabel metal3 s 515729 654500 515729 654500 4 cubev_reg_4_dout1\[21\]
+port 1556 nsew
+rlabel metal4 s 516925 655316 516925 655316 4 cubev_reg_4_dout1\[22\]
+port 1557 nsew
+rlabel metal3 s 518305 655316 518305 655316 4 cubev_reg_4_dout1\[23\]
+port 1558 nsew
+rlabel metal4 s 519501 654636 519501 654636 4 cubev_reg_4_dout1\[24\]
+port 1559 nsew
+rlabel metal4 s 520789 655316 520789 655316 4 cubev_reg_4_dout1\[25\]
+port 1560 nsew
+rlabel metal3 s 521985 655316 521985 655316 4 cubev_reg_4_dout1\[26\]
+port 1561 nsew
+rlabel metal3 s 523273 654636 523273 654636 4 cubev_reg_4_dout1\[27\]
+port 1562 nsew
+rlabel metal4 s 524331 655316 524331 655316 4 cubev_reg_4_dout1\[28\]
+port 1563 nsew
+rlabel metal4 s 525757 655316 525757 655316 4 cubev_reg_4_dout1\[29\]
+port 1564 nsew
+rlabel metal3 s 491763 655316 491763 655316 4 cubev_reg_4_dout1\[2\]
+port 1565 nsew
+rlabel metal4 s 527091 654636 527091 654636 4 cubev_reg_4_dout1\[30\]
+port 1566 nsew
+rlabel metal3 s 528425 655316 528425 655316 4 cubev_reg_4_dout1\[31\]
+port 1567 nsew
+rlabel metal4 s 493189 654228 493189 654228 4 cubev_reg_4_dout1\[3\]
+port 1568 nsew
+rlabel metal3 s 494293 655316 494293 655316 4 cubev_reg_4_dout1\[4\]
+port 1569 nsew
+rlabel metal3 s 495627 655316 495627 655316 4 cubev_reg_4_dout1\[5\]
+port 1570 nsew
+rlabel metal3 s 496961 654636 496961 654636 4 cubev_reg_4_dout1\[6\]
+port 1571 nsew
+rlabel metal3 s 498295 655316 498295 655316 4 cubev_reg_4_dout1\[7\]
+port 1572 nsew
+rlabel metal3 s 499169 655316 499169 655316 4 cubev_reg_4_dout1\[8\]
+port 1573 nsew
+rlabel metal3 s 500457 654364 500457 654364 4 cubev_reg_4_dout1\[9\]
+port 1574 nsew
+rlabel metal2 s 423338 506311 423338 506311 4 cubev_reg_4_dout1_reg\[0\]
+port 1575 nsew
+rlabel metal3 s 423338 513077 423338 513077 4 cubev_reg_4_dout1_reg\[10\]
+port 1576 nsew
+rlabel metal2 s 423614 514233 423614 514233 4 cubev_reg_4_dout1_reg\[11\]
+port 1577 nsew
+rlabel metal2 s 423522 514471 423522 514471 4 cubev_reg_4_dout1_reg\[12\]
+port 1578 nsew
+rlabel metal2 s 505310 695392 505310 695392 4 cubev_reg_4_dout1_reg\[13\]
+port 1579 nsew
+rlabel metal2 s 422878 515933 422878 515933 4 cubev_reg_4_dout1_reg\[14\]
+port 1580 nsew
+rlabel metal2 s 507886 695596 507886 695596 4 cubev_reg_4_dout1_reg\[15\]
+port 1581 nsew
+rlabel metal2 s 508806 694773 508806 694773 4 cubev_reg_4_dout1_reg\[16\]
+port 1582 nsew
+rlabel metal2 s 423522 518347 423522 518347 4 cubev_reg_4_dout1_reg\[17\]
+port 1583 nsew
+rlabel metal2 s 423614 518653 423614 518653 4 cubev_reg_4_dout1_reg\[18\]
+port 1584 nsew
+rlabel metal2 s 423522 519707 423522 519707 4 cubev_reg_4_dout1_reg\[19\]
+port 1585 nsew
+rlabel metal2 s 423062 507365 423062 507365 4 cubev_reg_4_dout1_reg\[1\]
+port 1586 nsew
+rlabel metal2 s 423614 520013 423614 520013 4 cubev_reg_4_dout1_reg\[20\]
+port 1587 nsew
+rlabel metal2 s 422878 521033 422878 521033 4 cubev_reg_4_dout1_reg\[21\]
+port 1588 nsew
+rlabel metal3 s 422694 521237 422694 521237 4 cubev_reg_4_dout1_reg\[22\]
+port 1589 nsew
+rlabel metal2 s 423522 522427 423522 522427 4 cubev_reg_4_dout1_reg\[23\]
+port 1590 nsew
+rlabel metal2 s 423614 523141 423614 523141 4 cubev_reg_4_dout1_reg\[24\]
+port 1591 nsew
+rlabel metal2 s 423522 523787 423522 523787 4 cubev_reg_4_dout1_reg\[25\]
+port 1592 nsew
+rlabel metal2 s 423614 524161 423614 524161 4 cubev_reg_4_dout1_reg\[26\]
+port 1593 nsew
+rlabel metal2 s 423614 525181 423614 525181 4 cubev_reg_4_dout1_reg\[27\]
+port 1594 nsew
+rlabel metal2 s 524630 696344 524630 696344 4 cubev_reg_4_dout1_reg\[28\]
+port 1595 nsew
+rlabel metal2 s 423522 526541 423522 526541 4 cubev_reg_4_dout1_reg\[29\]
+port 1596 nsew
+rlabel metal2 s 423154 586041 423154 586041 4 cubev_reg_4_dout1_reg\[2\]
+port 1597 nsew
+rlabel metal2 s 423614 526847 423614 526847 4 cubev_reg_4_dout1_reg\[30\]
+port 1598 nsew
+rlabel metal2 s 528494 696208 528494 696208 4 cubev_reg_4_dout1_reg\[31\]
+port 1599 nsew
+rlabel metal2 s 422970 600865 422970 600865 4 cubev_reg_4_dout1_reg\[3\]
+port 1600 nsew
+rlabel metal3 s 423338 508997 423338 508997 4 cubev_reg_4_dout1_reg\[4\]
+port 1601 nsew
+rlabel metal2 s 422786 521509 422786 521509 4 cubev_reg_4_dout1_reg\[5\]
+port 1602 nsew
+rlabel metal2 s 423062 601205 423062 601205 4 cubev_reg_4_dout1_reg\[6\]
+port 1603 nsew
+rlabel metal2 s 423522 511479 423522 511479 4 cubev_reg_4_dout1_reg\[7\]
+port 1604 nsew
+rlabel metal2 s 423246 582641 423246 582641 4 cubev_reg_4_dout1_reg\[8\]
+port 1605 nsew
+rlabel metal2 s 423430 518721 423430 518721 4 cubev_reg_4_dout1_reg\[9\]
+port 1606 nsew
+rlabel metal2 s 422878 445349 422878 445349 4 cubev_reg_4_rstn
+port 1607 nsew
+rlabel metal2 s 423062 500497 423062 500497 4 cubev_reg_4_web0
+port 1608 nsew
+rlabel metal2 s 422694 496383 422694 496383 4 cubev_reg_4_wmask0\[0\]
+port 1609 nsew
+rlabel metal3 s 423154 496757 423154 496757 4 cubev_reg_4_wmask0\[1\]
+port 1610 nsew
+rlabel metal2 s 422786 497743 422786 497743 4 cubev_reg_4_wmask0\[2\]
+port 1611 nsew
+rlabel metal3 s 423154 498117 423154 498117 4 cubev_reg_4_wmask0\[3\]
+port 1612 nsew
+rlabel metal4 s 55814 571808 55814 571808 4 cubev_reg_5_addr0\[0\]
+port 1613 nsew
+rlabel metal3 s 39031 598060 39031 598060 4 cubev_reg_5_addr0\[1\]
+port 1614 nsew
+rlabel metal3 s 39077 600372 39077 600372 4 cubev_reg_5_addr0\[2\]
+port 1615 nsew
+rlabel metal3 s 39123 601732 39123 601732 4 cubev_reg_5_addr0\[3\]
+port 1616 nsew
+rlabel metal3 s 39169 603092 39169 603092 4 cubev_reg_5_addr0\[4\]
+port 1617 nsew
+rlabel metal3 s 39215 604452 39215 604452 4 cubev_reg_5_addr0\[5\]
+port 1618 nsew
+rlabel metal2 s 176686 462179 176686 462179 4 cubev_reg_5_addr0\[6\]
+port 1619 nsew
+rlabel metal2 s 176778 463233 176778 463233 4 cubev_reg_5_addr0\[7\]
+port 1620 nsew
+rlabel metal4 s 121739 654228 121739 654228 4 cubev_reg_5_addr1\[0\]
+port 1621 nsew
+rlabel metal3 s 178135 508844 178135 508844 4 cubev_reg_5_addr1\[1\]
+port 1622 nsew
+rlabel metal2 s 140806 588013 140806 588013 4 cubev_reg_5_addr1\[2\]
+port 1623 nsew
+rlabel metal2 s 140806 586585 140806 586585 4 cubev_reg_5_addr1\[3\]
+port 1624 nsew
+rlabel metal2 s 140806 584103 140806 584103 4 cubev_reg_5_addr1\[4\]
+port 1625 nsew
+rlabel metal2 s 176778 511717 176778 511717 4 cubev_reg_5_addr1\[5\]
+port 1626 nsew
+rlabel metal2 s 176686 511887 176686 511887 4 cubev_reg_5_addr1\[6\]
+port 1627 nsew
+rlabel metal2 s 176686 513247 176686 513247 4 cubev_reg_5_addr1\[7\]
+port 1628 nsew
+rlabel metal2 s 176778 453679 176778 453679 4 cubev_reg_5_clk0
+port 1629 nsew
+rlabel metal3 s 178043 507076 178043 507076 4 cubev_reg_5_clk1
+port 1630 nsew
+rlabel metal1 s 38318 570758 38318 570758 4 cubev_reg_5_csb0
+port 1631 nsew
+rlabel metal3 s 178181 507756 178181 507756 4 cubev_reg_5_csb1
+port 1632 nsew
+rlabel metal2 s 176686 463539 176686 463539 4 cubev_reg_5_din0\[0\]
+port 1633 nsew
+rlabel metal1 s 175168 470186 175168 470186 4 cubev_reg_5_din0\[10\]
+port 1634 nsew
+rlabel metal2 s 176686 470441 176686 470441 4 cubev_reg_5_din0\[11\]
+port 1635 nsew
+rlabel metal4 s 75806 571808 75806 571808 4 cubev_reg_5_din0\[12\]
+port 1636 nsew
+rlabel metal4 s 76894 571808 76894 571808 4 cubev_reg_5_din0\[13\]
+port 1637 nsew
+rlabel metal4 s 78118 571808 78118 571808 4 cubev_reg_5_din0\[14\]
+port 1638 nsew
+rlabel metal4 s 79342 571808 79342 571808 4 cubev_reg_5_din0\[15\]
+port 1639 nsew
+rlabel metal4 s 80566 571808 80566 571808 4 cubev_reg_5_din0\[16\]
+port 1640 nsew
+rlabel metal4 s 81654 571808 81654 571808 4 cubev_reg_5_din0\[17\]
+port 1641 nsew
+rlabel metal4 s 82878 571808 82878 571808 4 cubev_reg_5_din0\[18\]
+port 1642 nsew
+rlabel metal4 s 83966 571808 83966 571808 4 cubev_reg_5_din0\[19\]
+port 1643 nsew
+rlabel metal2 s 176686 464627 176686 464627 4 cubev_reg_5_din0\[1\]
+port 1644 nsew
+rlabel metal2 s 155434 519316 155434 519316 4 cubev_reg_5_din0\[20\]
+port 1645 nsew
+rlabel metal3 s 176686 477411 176686 477411 4 cubev_reg_5_din0\[21\]
+port 1646 nsew
+rlabel metal2 s 156906 518568 156906 518568 4 cubev_reg_5_din0\[22\]
+port 1647 nsew
+rlabel metal3 s 176686 478805 176686 478805 4 cubev_reg_5_din0\[23\]
+port 1648 nsew
+rlabel metal2 s 161046 517140 161046 517140 4 cubev_reg_5_din0\[24\]
+port 1649 nsew
+rlabel metal2 s 140346 524450 140346 524450 4 cubev_reg_5_din0\[25\]
+port 1650 nsew
+rlabel metal2 s 176778 481355 176778 481355 4 cubev_reg_5_din0\[26\]
+port 1651 nsew
+rlabel metal3 s 176686 481525 176686 481525 4 cubev_reg_5_din0\[27\]
+port 1652 nsew
+rlabel metal2 s 176686 482783 176686 482783 4 cubev_reg_5_din0\[28\]
+port 1653 nsew
+rlabel metal1 s 174432 482902 174432 482902 4 cubev_reg_5_din0\[29\]
+port 1654 nsew
+rlabel metal1 s 175766 464950 175766 464950 4 cubev_reg_5_din0\[2\]
+port 1655 nsew
+rlabel metal2 s 176778 484075 176778 484075 4 cubev_reg_5_din0\[30\]
+port 1656 nsew
+rlabel metal3 s 176686 484245 176686 484245 4 cubev_reg_5_din0\[31\]
+port 1657 nsew
+rlabel metal1 s 175122 464882 175122 464882 4 cubev_reg_5_din0\[3\]
+port 1658 nsew
+rlabel metal2 s 176778 466259 176778 466259 4 cubev_reg_5_din0\[4\]
+port 1659 nsew
+rlabel metal3 s 176686 466293 176686 466293 4 cubev_reg_5_din0\[5\]
+port 1660 nsew
+rlabel metal2 s 176778 467653 176778 467653 4 cubev_reg_5_din0\[6\]
+port 1661 nsew
+rlabel metal2 s 176686 467687 176686 467687 4 cubev_reg_5_din0\[7\]
+port 1662 nsew
+rlabel metal2 s 176778 469013 176778 469013 4 cubev_reg_5_din0\[8\]
+port 1663 nsew
+rlabel metal2 s 176686 469047 176686 469047 4 cubev_reg_5_din0\[9\]
+port 1664 nsew
+rlabel metal2 s 176778 485435 176778 485435 4 cubev_reg_5_dout0\[0\]
+port 1665 nsew
+rlabel metal4 s 81926 571808 81926 571808 4 cubev_reg_5_dout0\[10\]
+port 1666 nsew
+rlabel metal4 s 83150 571808 83150 571808 4 cubev_reg_5_dout0\[11\]
+port 1667 nsew
+rlabel metal2 s 176778 493697 176778 493697 4 cubev_reg_5_dout0\[12\]
+port 1668 nsew
+rlabel metal2 s 159574 524042 159574 524042 4 cubev_reg_5_dout0\[13\]
+port 1669 nsew
+rlabel metal2 s 176778 495091 176778 495091 4 cubev_reg_5_dout0\[14\]
+port 1670 nsew
+rlabel metal2 s 140622 524178 140622 524178 4 cubev_reg_5_dout0\[15\]
+port 1671 nsew
+rlabel metal2 s 176778 496451 176778 496451 4 cubev_reg_5_dout0\[16\]
+port 1672 nsew
+rlabel metal2 s 141910 526252 141910 526252 4 cubev_reg_5_dout0\[17\]
+port 1673 nsew
+rlabel metal2 s 157090 531012 157090 531012 4 cubev_reg_5_dout0\[18\]
+port 1674 nsew
+rlabel metal3 s 176686 498117 176686 498117 4 cubev_reg_5_dout0\[19\]
+port 1675 nsew
+rlabel metal3 s 176686 485741 176686 485741 4 cubev_reg_5_dout0\[1\]
+port 1676 nsew
+rlabel metal4 s 94846 571808 94846 571808 4 cubev_reg_5_dout0\[20\]
+port 1677 nsew
+rlabel metal4 s 95526 571808 95526 571808 4 cubev_reg_5_dout0\[21\]
+port 1678 nsew
+rlabel metal2 s 176778 500599 176778 500599 4 cubev_reg_5_dout0\[22\]
+port 1679 nsew
+rlabel metal3 s 176686 500837 176686 500837 4 cubev_reg_5_dout0\[23\]
+port 1680 nsew
+rlabel metal2 s 176686 501959 176686 501959 4 cubev_reg_5_dout0\[24\]
+port 1681 nsew
+rlabel metal1 s 175996 502214 175996 502214 4 cubev_reg_5_dout0\[25\]
+port 1682 nsew
+rlabel metal1 s 175720 503574 175720 503574 4 cubev_reg_5_dout0\[26\]
+port 1683 nsew
+rlabel metal2 s 176686 503591 176686 503591 4 cubev_reg_5_dout0\[27\]
+port 1684 nsew
+rlabel metal2 s 176686 504713 176686 504713 4 cubev_reg_5_dout0\[28\]
+port 1685 nsew
+rlabel metal3 s 179009 505036 179009 505036 4 cubev_reg_5_dout0\[29\]
+port 1686 nsew
+rlabel metal2 s 176778 486897 176778 486897 4 cubev_reg_5_dout0\[2\]
+port 1687 nsew
+rlabel metal2 s 176686 506073 176686 506073 4 cubev_reg_5_dout0\[30\]
+port 1688 nsew
+rlabel metal3 s 178641 506396 178641 506396 4 cubev_reg_5_dout0\[31\]
+port 1689 nsew
+rlabel metal2 s 176686 486999 176686 486999 4 cubev_reg_5_dout0\[3\]
+port 1690 nsew
+rlabel metal2 s 176778 488257 176778 488257 4 cubev_reg_5_dout0\[4\]
+port 1691 nsew
+rlabel metal2 s 176686 488359 176686 488359 4 cubev_reg_5_dout0\[5\]
+port 1692 nsew
+rlabel metal2 s 176778 489617 176778 489617 4 cubev_reg_5_dout0\[6\]
+port 1693 nsew
+rlabel metal2 s 176686 489719 176686 489719 4 cubev_reg_5_dout0\[7\]
+port 1694 nsew
+rlabel metal4 s 79206 571808 79206 571808 4 cubev_reg_5_dout0\[8\]
+port 1695 nsew
+rlabel metal4 s 80702 571808 80702 571808 4 cubev_reg_5_dout0\[9\]
+port 1696 nsew
+rlabel metal3 s 69253 654636 69253 654636 4 cubev_reg_5_dout1\[0\]
+port 1697 nsew
+rlabel metal3 s 81719 655316 81719 655316 4 cubev_reg_5_dout1\[10\]
+port 1698 nsew
+rlabel metal3 s 83007 655316 83007 655316 4 cubev_reg_5_dout1\[11\]
+port 1699 nsew
+rlabel metal2 s 84226 654976 84226 654976 4 cubev_reg_5_dout1\[12\]
+port 1700 nsew
+rlabel metal4 s 85629 655316 85629 655316 4 cubev_reg_5_dout1\[13\]
+port 1701 nsew
+rlabel metal3 s 87055 654228 87055 654228 4 cubev_reg_5_dout1\[14\]
+port 1702 nsew
+rlabel metal3 s 88067 654636 88067 654636 4 cubev_reg_5_dout1\[15\]
+port 1703 nsew
+rlabel metal3 s 89263 655316 89263 655316 4 cubev_reg_5_dout1\[16\]
+port 1704 nsew
+rlabel metal3 s 90643 655316 90643 655316 4 cubev_reg_5_dout1\[17\]
+port 1705 nsew
+rlabel metal3 s 91931 654636 91931 654636 4 cubev_reg_5_dout1\[18\]
+port 1706 nsew
+rlabel metal3 s 93127 655316 93127 655316 4 cubev_reg_5_dout1\[19\]
+port 1707 nsew
+rlabel metal3 s 70587 655316 70587 655316 4 cubev_reg_5_dout1\[1\]
+port 1708 nsew
+rlabel metal3 s 94415 655316 94415 655316 4 cubev_reg_5_dout1\[20\]
+port 1709 nsew
+rlabel metal3 s 95703 654636 95703 654636 4 cubev_reg_5_dout1\[21\]
+port 1710 nsew
+rlabel metal3 s 96991 655316 96991 655316 4 cubev_reg_5_dout1\[22\]
+port 1711 nsew
+rlabel metal3 s 98279 655316 98279 655316 4 cubev_reg_5_dout1\[23\]
+port 1712 nsew
+rlabel metal4 s 99475 654636 99475 654636 4 cubev_reg_5_dout1\[24\]
+port 1713 nsew
+rlabel metal4 s 100763 655316 100763 655316 4 cubev_reg_5_dout1\[25\]
+port 1714 nsew
+rlabel metal4 s 102051 655316 102051 655316 4 cubev_reg_5_dout1\[26\]
+port 1715 nsew
+rlabel metal3 s 103247 654636 103247 654636 4 cubev_reg_5_dout1\[27\]
+port 1716 nsew
+rlabel metal3 s 104535 655316 104535 655316 4 cubev_reg_5_dout1\[28\]
+port 1717 nsew
+rlabel metal3 s 105823 655316 105823 655316 4 cubev_reg_5_dout1\[29\]
+port 1718 nsew
+rlabel metal3 s 71921 655316 71921 655316 4 cubev_reg_5_dout1\[2\]
+port 1719 nsew
+rlabel metal3 s 106835 655316 106835 655316 4 cubev_reg_5_dout1\[30\]
+port 1720 nsew
+rlabel metal3 s 108399 655316 108399 655316 4 cubev_reg_5_dout1\[31\]
+port 1721 nsew
+rlabel metal2 s 72641 655316 72641 655316 4 cubev_reg_5_dout1\[3\]
+port 1722 nsew
+rlabel metal4 s 74582 652894 74582 652894 4 cubev_reg_5_dout1\[4\]
+port 1723 nsew
+rlabel metal3 s 75371 655316 75371 655316 4 cubev_reg_5_dout1\[5\]
+port 1724 nsew
+rlabel metal3 s 76751 654636 76751 654636 4 cubev_reg_5_dout1\[6\]
+port 1725 nsew
+rlabel metal3 s 77947 655316 77947 655316 4 cubev_reg_5_dout1\[7\]
+port 1726 nsew
+rlabel metal3 s 79143 655316 79143 655316 4 cubev_reg_5_dout1\[8\]
+port 1727 nsew
+rlabel metal3 s 80431 654636 80431 654636 4 cubev_reg_5_dout1\[9\]
+port 1728 nsew
+rlabel metal1 s 174984 513230 174984 513230 4 cubev_reg_5_dout1_reg\[0\]
+port 1729 nsew
+rlabel metal2 s 81466 695392 81466 695392 4 cubev_reg_5_dout1_reg\[10\]
+port 1730 nsew
+rlabel metal2 s 82754 695426 82754 695426 4 cubev_reg_5_dout1_reg\[11\]
+port 1731 nsew
+rlabel metal2 s 84042 695562 84042 695562 4 cubev_reg_5_dout1_reg\[12\]
+port 1732 nsew
+rlabel metal2 s 176778 522835 176778 522835 4 cubev_reg_5_dout1_reg\[13\]
+port 1733 nsew
+rlabel metal2 s 176686 522937 176686 522937 4 cubev_reg_5_dout1_reg\[14\]
+port 1734 nsew
+rlabel metal2 s 176778 524229 176778 524229 4 cubev_reg_5_dout1_reg\[15\]
+port 1735 nsew
+rlabel metal3 s 176686 524331 176686 524331 4 cubev_reg_5_dout1_reg\[16\]
+port 1736 nsew
+rlabel metal2 s 176778 525589 176778 525589 4 cubev_reg_5_dout1_reg\[17\]
+port 1737 nsew
+rlabel metal3 s 176686 525691 176686 525691 4 cubev_reg_5_dout1_reg\[18\]
+port 1738 nsew
+rlabel metal2 s 176778 526915 176778 526915 4 cubev_reg_5_dout1_reg\[19\]
+port 1739 nsew
+rlabel metal3 s 178687 514420 178687 514420 4 cubev_reg_5_dout1_reg\[1\]
+port 1740 nsew
+rlabel metal3 s 176686 527085 176686 527085 4 cubev_reg_5_dout1_reg\[20\]
+port 1741 nsew
+rlabel metal2 s 102166 695878 102166 695878 4 cubev_reg_5_dout1_reg\[21\]
+port 1742 nsew
+rlabel metal1 s 102258 697034 102258 697034 4 cubev_reg_5_dout1_reg\[22\]
+port 1743 nsew
+rlabel metal2 s 160770 612884 160770 612884 4 cubev_reg_5_dout1_reg\[23\]
+port 1744 nsew
+rlabel metal2 s 99498 696055 99498 696055 4 cubev_reg_5_dout1_reg\[24\]
+port 1745 nsew
+rlabel metal2 s 101154 694603 101154 694603 4 cubev_reg_5_dout1_reg\[25\]
+port 1746 nsew
+rlabel metal2 s 102074 696123 102074 696123 4 cubev_reg_5_dout1_reg\[26\]
+port 1747 nsew
+rlabel metal2 s 103362 696140 103362 696140 4 cubev_reg_5_dout1_reg\[27\]
+port 1748 nsew
+rlabel metal3 s 176686 532661 176686 532661 4 cubev_reg_5_dout1_reg\[28\]
+port 1749 nsew
+rlabel metal2 s 176686 533817 176686 533817 4 cubev_reg_5_dout1_reg\[29\]
+port 1750 nsew
+rlabel metal3 s 178917 514556 178917 514556 4 cubev_reg_5_dout1_reg\[2\]
+port 1751 nsew
+rlabel metal1 s 174294 533970 174294 533970 4 cubev_reg_5_dout1_reg\[30\]
+port 1752 nsew
+rlabel metal2 s 176686 535177 176686 535177 4 cubev_reg_5_dout1_reg\[31\]
+port 1753 nsew
+rlabel metal2 s 176686 516001 176686 516001 4 cubev_reg_5_dout1_reg\[3\]
+port 1754 nsew
+rlabel metal2 s 155250 613428 155250 613428 4 cubev_reg_5_dout1_reg\[4\]
+port 1755 nsew
+rlabel metal2 s 75026 696378 75026 696378 4 cubev_reg_5_dout1_reg\[5\]
+port 1756 nsew
+rlabel metal2 s 76314 696242 76314 696242 4 cubev_reg_5_dout1_reg\[6\]
+port 1757 nsew
+rlabel metal2 s 77602 696344 77602 696344 4 cubev_reg_5_dout1_reg\[7\]
+port 1758 nsew
+rlabel metal3 s 79603 694484 79603 694484 4 cubev_reg_5_dout1_reg\[8\]
+port 1759 nsew
+rlabel metal2 s 80546 694603 80546 694603 4 cubev_reg_5_dout1_reg\[9\]
+port 1760 nsew
+rlabel metal3 s 177997 452540 177997 452540 4 cubev_reg_5_rstn
+port 1761 nsew
+rlabel metal1 s 38272 570962 38272 570962 4 cubev_reg_5_web0
+port 1762 nsew
+rlabel metal4 s 57038 571808 57038 571808 4 cubev_reg_5_wmask0\[0\]
+port 1763 nsew
+rlabel metal4 s 58262 571808 58262 571808 4 cubev_reg_5_wmask0\[1\]
+port 1764 nsew
+rlabel metal4 s 59486 571808 59486 571808 4 cubev_reg_5_wmask0\[2\]
+port 1765 nsew
+rlabel metal4 s 60574 571808 60574 571808 4 cubev_reg_5_wmask0\[3\]
+port 1766 nsew
+rlabel metal4 s 55814 295768 55814 295768 4 cubev_rf1_addr0\[0\]
+port 1767 nsew
+rlabel metal3 s 39491 322116 39491 322116 4 cubev_rf1_addr0\[1\]
+port 1768 nsew
+rlabel metal3 s 39215 324428 39215 324428 4 cubev_rf1_addr0\[2\]
+port 1769 nsew
+rlabel metal3 s 40020 325668 40020 325668 4 cubev_rf1_addr0\[3\]
+port 1770 nsew
+rlabel metal3 s 39261 327148 39261 327148 4 cubev_rf1_addr0\[4\]
+port 1771 nsew
+rlabel metal3 s 39399 328508 39399 328508 4 cubev_rf1_addr0\[5\]
+port 1772 nsew
+rlabel metal3 s 39353 329868 39353 329868 4 cubev_rf1_addr0\[6\]
+port 1773 nsew
+rlabel metal3 s 39077 330548 39077 330548 4 cubev_rf1_addr0\[7\]
+port 1774 nsew
+rlabel metal2 s 176962 330531 176962 330531 4 cubev_rf1_addr1\[0\]
+port 1775 nsew
+rlabel metal2 s 141634 314347 141634 314347 4 cubev_rf1_addr1\[1\]
+port 1776 nsew
+rlabel metal3 s 140277 312732 140277 312732 4 cubev_rf1_addr1\[2\]
+port 1777 nsew
+rlabel metal2 s 140806 312103 140806 312103 4 cubev_rf1_addr1\[3\]
+port 1778 nsew
+rlabel metal3 s 140806 309077 140806 309077 4 cubev_rf1_addr1\[4\]
+port 1779 nsew
+rlabel metal2 s 176778 330259 176778 330259 4 cubev_rf1_addr1\[5\]
+port 1780 nsew
+rlabel metal2 s 176686 331381 176686 331381 4 cubev_rf1_addr1\[6\]
+port 1781 nsew
+rlabel metal2 s 176778 331687 176778 331687 4 cubev_rf1_addr1\[7\]
+port 1782 nsew
+rlabel metal3 s 176686 273173 176686 273173 4 cubev_rf1_clk0
+port 1783 nsew
+rlabel metal2 s 176870 327913 176870 327913 4 cubev_rf1_clk1
+port 1784 nsew
+rlabel metal2 s 176778 274193 176778 274193 4 cubev_rf1_csb0
+port 1785 nsew
+rlabel metal2 s 141082 372929 141082 372929 4 cubev_rf1_csb1
+port 1786 nsew
+rlabel metal4 s 61798 295768 61798 295768 4 cubev_rf1_din0\[0\]
+port 1787 nsew
+rlabel metal3 s 176686 289731 176686 289731 4 cubev_rf1_din0\[10\]
+port 1788 nsew
+rlabel metal4 s 74718 295768 74718 295768 4 cubev_rf1_din0\[11\]
+port 1789 nsew
+rlabel metal4 s 75806 295768 75806 295768 4 cubev_rf1_din0\[12\]
+port 1790 nsew
+rlabel metal4 s 76894 295768 76894 295768 4 cubev_rf1_din0\[13\]
+port 1791 nsew
+rlabel metal4 s 78118 295768 78118 295768 4 cubev_rf1_din0\[14\]
+port 1792 nsew
+rlabel metal4 s 79342 295768 79342 295768 4 cubev_rf1_din0\[15\]
+port 1793 nsew
+rlabel metal4 s 80566 295768 80566 295768 4 cubev_rf1_din0\[16\]
+port 1794 nsew
+rlabel metal4 s 81654 295768 81654 295768 4 cubev_rf1_din0\[17\]
+port 1795 nsew
+rlabel metal4 s 82878 295768 82878 295768 4 cubev_rf1_din0\[18\]
+port 1796 nsew
+rlabel metal4 s 83966 295768 83966 295768 4 cubev_rf1_din0\[19\]
+port 1797 nsew
+rlabel metal4 s 63022 295768 63022 295768 4 cubev_rf1_din0\[1\]
+port 1798 nsew
+rlabel metal2 s 176502 294083 176502 294083 4 cubev_rf1_din0\[20\]
+port 1799 nsew
+rlabel metal3 s 178503 296956 178503 296956 4 cubev_rf1_din0\[21\]
+port 1800 nsew
+rlabel metal2 s 139334 295800 139334 295800 4 cubev_rf1_din0\[22\]
+port 1801 nsew
+rlabel metal2 s 140806 295052 140806 295052 4 cubev_rf1_din0\[23\]
+port 1802 nsew
+rlabel metal2 s 176732 297908 176732 297908 4 cubev_rf1_din0\[24\]
+port 1803 nsew
+rlabel metal2 s 140714 297432 140714 297432 4 cubev_rf1_din0\[25\]
+port 1804 nsew
+rlabel metal2 s 176778 299829 176778 299829 4 cubev_rf1_din0\[26\]
+port 1805 nsew
+rlabel metal2 s 176686 300985 176686 300985 4 cubev_rf1_din0\[27\]
+port 1806 nsew
+rlabel metal4 s 94438 295768 94438 295768 4 cubev_rf1_din0\[28\]
+port 1807 nsew
+rlabel metal4 s 95662 295836 95662 295836 4 cubev_rf1_din0\[29\]
+port 1808 nsew
+rlabel metal4 s 64110 295768 64110 295768 4 cubev_rf1_din0\[2\]
+port 1809 nsew
+rlabel metal4 s 96750 295768 96750 295768 4 cubev_rf1_din0\[30\]
+port 1810 nsew
+rlabel metal4 s 97974 295768 97974 295768 4 cubev_rf1_din0\[31\]
+port 1811 nsew
+rlabel metal2 s 176778 285447 176778 285447 4 cubev_rf1_din0\[3\]
+port 1812 nsew
+rlabel metal2 s 176686 285481 176686 285481 4 cubev_rf1_din0\[4\]
+port 1813 nsew
+rlabel metal2 s 176778 286875 176778 286875 4 cubev_rf1_din0\[5\]
+port 1814 nsew
+rlabel metal2 s 176686 286977 176686 286977 4 cubev_rf1_din0\[6\]
+port 1815 nsew
+rlabel metal2 s 176778 288235 176778 288235 4 cubev_rf1_din0\[7\]
+port 1816 nsew
+rlabel metal2 s 176686 288337 176686 288337 4 cubev_rf1_din0\[8\]
+port 1817 nsew
+rlabel metal2 s 176778 289629 176778 289629 4 cubev_rf1_din0\[9\]
+port 1818 nsew
+rlabel metal2 s 176686 303909 176686 303909 4 cubev_rf1_dout0\[0\]
+port 1819 nsew
+rlabel metal4 s 81926 295768 81926 295768 4 cubev_rf1_dout0\[10\]
+port 1820 nsew
+rlabel metal4 s 83150 295768 83150 295768 4 cubev_rf1_dout0\[11\]
+port 1821 nsew
+rlabel metal2 s 176778 312137 176778 312137 4 cubev_rf1_dout0\[12\]
+port 1822 nsew
+rlabel metal2 s 141772 310692 141772 310692 4 cubev_rf1_dout0\[13\]
+port 1823 nsew
+rlabel metal2 s 176778 313497 176778 313497 4 cubev_rf1_dout0\[14\]
+port 1824 nsew
+rlabel metal2 s 141726 313548 141726 313548 4 cubev_rf1_dout0\[15\]
+port 1825 nsew
+rlabel metal2 s 176778 314891 176778 314891 4 cubev_rf1_dout0\[16\]
+port 1826 nsew
+rlabel metal2 s 176686 316149 176686 316149 4 cubev_rf1_dout0\[17\]
+port 1827 nsew
+rlabel metal2 s 138046 294644 138046 294644 4 cubev_rf1_dout0\[18\]
+port 1828 nsew
+rlabel metal2 s 176686 317543 176686 317543 4 cubev_rf1_dout0\[19\]
+port 1829 nsew
+rlabel metal3 s 176686 305099 176686 305099 4 cubev_rf1_dout0\[1\]
+port 1830 nsew
+rlabel metal4 s 94846 295768 94846 295768 4 cubev_rf1_dout0\[20\]
+port 1831 nsew
+rlabel metal4 s 95526 295768 95526 295768 4 cubev_rf1_dout0\[21\]
+port 1832 nsew
+rlabel metal4 s 96886 295768 96886 295768 4 cubev_rf1_dout0\[22\]
+port 1833 nsew
+rlabel metal4 s 98246 295768 98246 295768 4 cubev_rf1_dout0\[23\]
+port 1834 nsew
+rlabel metal4 s 99198 295836 99198 295836 4 cubev_rf1_dout0\[24\]
+port 1835 nsew
+rlabel metal4 s 100694 295768 100694 295768 4 cubev_rf1_dout0\[25\]
+port 1836 nsew
+rlabel metal4 s 101918 295836 101918 295836 4 cubev_rf1_dout0\[26\]
+port 1837 nsew
+rlabel metal4 s 103142 295768 103142 295768 4 cubev_rf1_dout0\[27\]
+port 1838 nsew
+rlabel metal2 s 140254 308720 140254 308720 4 cubev_rf1_dout0\[28\]
+port 1839 nsew
+rlabel metal2 s 140162 308040 140162 308040 4 cubev_rf1_dout0\[29\]
+port 1840 nsew
+rlabel metal2 s 176778 305269 176778 305269 4 cubev_rf1_dout0\[2\]
+port 1841 nsew
+rlabel metal2 s 140070 308686 140070 308686 4 cubev_rf1_dout0\[30\]
+port 1842 nsew
+rlabel metal2 s 141450 309910 141450 309910 4 cubev_rf1_dout0\[31\]
+port 1843 nsew
+rlabel metal2 s 176686 306425 176686 306425 4 cubev_rf1_dout0\[3\]
+port 1844 nsew
+rlabel metal2 s 139058 294984 139058 294984 4 cubev_rf1_dout0\[4\]
+port 1845 nsew
+rlabel metal4 s 75670 295768 75670 295768 4 cubev_rf1_dout0\[5\]
+port 1846 nsew
+rlabel metal4 s 77030 295768 77030 295768 4 cubev_rf1_dout0\[6\]
+port 1847 nsew
+rlabel metal4 s 78254 295768 78254 295768 4 cubev_rf1_dout0\[7\]
+port 1848 nsew
+rlabel metal4 s 79206 295768 79206 295768 4 cubev_rf1_dout0\[8\]
+port 1849 nsew
+rlabel metal4 s 80702 295768 80702 295768 4 cubev_rf1_dout0\[9\]
+port 1850 nsew
+rlabel metal4 s 69414 376905 69414 376905 4 cubev_rf1_dout1\[0\]
+port 1851 nsew
+rlabel metal4 s 82062 376745 82062 376745 4 cubev_rf1_dout1\[10\]
+port 1852 nsew
+rlabel metal4 s 83150 376745 83150 376745 4 cubev_rf1_dout1\[11\]
+port 1853 nsew
+rlabel metal2 s 84042 377604 84042 377604 4 cubev_rf1_dout1\[12\]
+port 1854 nsew
+rlabel metal4 s 85734 376973 85734 376973 4 cubev_rf1_dout1\[13\]
+port 1855 nsew
+rlabel metal4 s 86958 376905 86958 376905 4 cubev_rf1_dout1\[14\]
+port 1856 nsew
+rlabel metal4 s 88318 376905 88318 376905 4 cubev_rf1_dout1\[15\]
+port 1857 nsew
+rlabel metal4 s 89406 376973 89406 376973 4 cubev_rf1_dout1\[16\]
+port 1858 nsew
+rlabel metal4 s 90766 376905 90766 376905 4 cubev_rf1_dout1\[17\]
+port 1859 nsew
+rlabel metal4 s 92126 376905 92126 376905 4 cubev_rf1_dout1\[18\]
+port 1860 nsew
+rlabel metal4 s 93214 376905 93214 376905 4 cubev_rf1_dout1\[19\]
+port 1861 nsew
+rlabel metal4 s 70774 376905 70774 376905 4 cubev_rf1_dout1\[1\]
+port 1862 nsew
+rlabel metal4 s 94438 376905 94438 376905 4 cubev_rf1_dout1\[20\]
+port 1863 nsew
+rlabel metal4 s 95798 376905 95798 376905 4 cubev_rf1_dout1\[21\]
+port 1864 nsew
+rlabel metal4 s 97022 376905 97022 376905 4 cubev_rf1_dout1\[22\]
+port 1865 nsew
+rlabel metal4 s 98382 376905 98382 376905 4 cubev_rf1_dout1\[23\]
+port 1866 nsew
+rlabel metal4 s 99470 376905 99470 376905 4 cubev_rf1_dout1\[24\]
+port 1867 nsew
+rlabel metal4 s 100830 376973 100830 376973 4 cubev_rf1_dout1\[25\]
+port 1868 nsew
+rlabel metal4 s 101918 376973 101918 376973 4 cubev_rf1_dout1\[26\]
+port 1869 nsew
+rlabel metal4 s 103142 376905 103142 376905 4 cubev_rf1_dout1\[27\]
+port 1870 nsew
+rlabel metal4 s 104366 376905 104366 376905 4 cubev_rf1_dout1\[28\]
+port 1871 nsew
+rlabel metal4 s 105726 376905 105726 376905 4 cubev_rf1_dout1\[29\]
+port 1872 nsew
+rlabel metal4 s 72134 376973 72134 376973 4 cubev_rf1_dout1\[2\]
+port 1873 nsew
+rlabel metal4 s 107086 376973 107086 376973 4 cubev_rf1_dout1\[30\]
+port 1874 nsew
+rlabel metal4 s 108310 376905 108310 376905 4 cubev_rf1_dout1\[31\]
+port 1875 nsew
+rlabel metal4 s 73222 376973 73222 376973 4 cubev_rf1_dout1\[3\]
+port 1876 nsew
+rlabel metal3 s 74566 378131 74566 378131 4 cubev_rf1_dout1\[4\]
+port 1877 nsew
+rlabel metal4 s 75806 376745 75806 376745 4 cubev_rf1_dout1\[5\]
+port 1878 nsew
+rlabel metal4 s 77166 376905 77166 376905 4 cubev_rf1_dout1\[6\]
+port 1879 nsew
+rlabel metal4 s 78390 376745 78390 376745 4 cubev_rf1_dout1\[7\]
+port 1880 nsew
+rlabel metal4 s 79478 376745 79478 376745 4 cubev_rf1_dout1\[8\]
+port 1881 nsew
+rlabel metal4 s 80702 376905 80702 376905 4 cubev_rf1_dout1\[9\]
+port 1882 nsew
+rlabel metal2 s 176778 333795 176778 333795 4 cubev_rf1_dout1_reg\[0\]
+port 1883 nsew
+rlabel metal3 s 82639 418540 82639 418540 4 cubev_rf1_dout1_reg\[10\]
+port 1884 nsew
+rlabel metal2 s 82754 419346 82754 419346 4 cubev_rf1_dout1_reg\[11\]
+port 1885 nsew
+rlabel metal2 s 84042 419312 84042 419312 4 cubev_rf1_dout1_reg\[12\]
+port 1886 nsew
+rlabel metal2 s 176686 342159 176686 342159 4 cubev_rf1_dout1_reg\[13\]
+port 1887 nsew
+rlabel metal2 s 176778 343349 176778 343349 4 cubev_rf1_dout1_reg\[14\]
+port 1888 nsew
+rlabel metal2 s 176686 343519 176686 343519 4 cubev_rf1_dout1_reg\[15\]
+port 1889 nsew
+rlabel metal2 s 176778 344777 176778 344777 4 cubev_rf1_dout1_reg\[16\]
+port 1890 nsew
+rlabel metal2 s 176686 344879 176686 344879 4 cubev_rf1_dout1_reg\[17\]
+port 1891 nsew
+rlabel metal3 s 178825 345916 178825 345916 4 cubev_rf1_dout1_reg\[18\]
+port 1892 nsew
+rlabel metal3 s 176686 346341 176686 346341 4 cubev_rf1_dout1_reg\[19\]
+port 1893 nsew
+rlabel metal2 s 176686 333897 176686 333897 4 cubev_rf1_dout1_reg\[1\]
+port 1894 nsew
+rlabel metal2 s 176778 347497 176778 347497 4 cubev_rf1_dout1_reg\[20\]
+port 1895 nsew
+rlabel metal2 s 176686 347599 176686 347599 4 cubev_rf1_dout1_reg\[21\]
+port 1896 nsew
+rlabel metal2 s 176778 348823 176778 348823 4 cubev_rf1_dout1_reg\[22\]
+port 1897 nsew
+rlabel metal3 s 176686 349061 176686 349061 4 cubev_rf1_dout1_reg\[23\]
+port 1898 nsew
+rlabel metal2 s 176778 350251 176778 350251 4 cubev_rf1_dout1_reg\[24\]
+port 1899 nsew
+rlabel metal3 s 176686 350421 176686 350421 4 cubev_rf1_dout1_reg\[25\]
+port 1900 nsew
+rlabel metal3 s 178549 351356 178549 351356 4 cubev_rf1_dout1_reg\[26\]
+port 1901 nsew
+rlabel metal3 s 178917 351900 178917 351900 4 cubev_rf1_dout1_reg\[27\]
+port 1902 nsew
+rlabel metal2 s 176686 352971 176686 352971 4 cubev_rf1_dout1_reg\[28\]
+port 1903 nsew
+rlabel metal3 s 178871 353260 178871 353260 4 cubev_rf1_dout1_reg\[29\]
+port 1904 nsew
+rlabel metal2 s 176778 335155 176778 335155 4 cubev_rf1_dout1_reg\[2\]
+port 1905 nsew
+rlabel metal2 s 176686 354365 176686 354365 4 cubev_rf1_dout1_reg\[30\]
+port 1906 nsew
+rlabel metal3 s 178733 354484 178733 354484 4 cubev_rf1_dout1_reg\[31\]
+port 1907 nsew
+rlabel metal2 s 176686 335257 176686 335257 4 cubev_rf1_dout1_reg\[3\]
+port 1908 nsew
+rlabel metal2 s 176778 336515 176778 336515 4 cubev_rf1_dout1_reg\[4\]
+port 1909 nsew
+rlabel metal2 s 75026 420128 75026 420128 4 cubev_rf1_dout1_reg\[5\]
+port 1910 nsew
+rlabel metal3 s 80316 418472 80316 418472 4 cubev_rf1_dout1_reg\[6\]
+port 1911 nsew
+rlabel metal2 s 77602 420162 77602 420162 4 cubev_rf1_dout1_reg\[7\]
+port 1912 nsew
+rlabel metal2 s 78890 420094 78890 420094 4 cubev_rf1_dout1_reg\[8\]
+port 1913 nsew
+rlabel metal2 s 80178 420196 80178 420196 4 cubev_rf1_dout1_reg\[9\]
+port 1914 nsew
+rlabel metal2 s 176778 272799 176778 272799 4 cubev_rf1_rstn
+port 1915 nsew
+rlabel metal2 s 176686 274567 176686 274567 4 cubev_rf1_web0
+port 1916 nsew
+rlabel metal4 s 57038 295768 57038 295768 4 cubev_rf1_wmask0\[0\]
+port 1917 nsew
+rlabel metal4 s 58262 295768 58262 295768 4 cubev_rf1_wmask0\[1\]
+port 1918 nsew
+rlabel metal4 s 59486 295768 59486 295768 4 cubev_rf1_wmask0\[2\]
+port 1919 nsew
+rlabel metal4 s 60574 295768 60574 295768 4 cubev_rf1_wmask0\[3\]
+port 1920 nsew
+rlabel metal3 s 56465 423572 56465 423572 4 cubev_rf2_addr0\[0\]
+port 1921 nsew
+rlabel metal2 s 176778 368033 176778 368033 4 cubev_rf2_addr0\[1\]
+port 1922 nsew
+rlabel metal2 s 176686 368407 176686 368407 4 cubev_rf2_addr0\[2\]
+port 1923 nsew
+rlabel metal2 s 176778 369393 176778 369393 4 cubev_rf2_addr0\[3\]
+port 1924 nsew
+rlabel metal2 s 176686 369767 176686 369767 4 cubev_rf2_addr0\[4\]
+port 1925 nsew
+rlabel metal2 s 176870 370787 176870 370787 4 cubev_rf2_addr0\[5\]
+port 1926 nsew
+rlabel metal1 s 38594 431766 38594 431766 4 cubev_rf2_addr0\[6\]
+port 1927 nsew
+rlabel metal3 s 39215 460972 39215 460972 4 cubev_rf2_addr0\[7\]
+port 1928 nsew
+rlabel metal4 s 121774 506794 121774 506794 4 cubev_rf2_addr1\[0\]
+port 1929 nsew
+rlabel metal3 s 140277 443156 140277 443156 4 cubev_rf2_addr1\[1\]
+port 1930 nsew
+rlabel metal3 s 140231 441796 140231 441796 4 cubev_rf2_addr1\[2\]
+port 1931 nsew
+rlabel metal2 s 141082 440487 141082 440487 4 cubev_rf2_addr1\[3\]
+port 1932 nsew
+rlabel metal3 s 140806 438923 140806 438923 4 cubev_rf2_addr1\[4\]
+port 1933 nsew
+rlabel metal1 s 173972 420818 173972 420818 4 cubev_rf2_addr1\[5\]
+port 1934 nsew
+rlabel metal2 s 176686 420801 176686 420801 4 cubev_rf2_addr1\[6\]
+port 1935 nsew
+rlabel metal2 s 176778 422093 176778 422093 4 cubev_rf2_addr1\[7\]
+port 1936 nsew
+rlabel metal2 s 38594 431732 38594 431732 4 cubev_rf2_clk0
+port 1937 nsew
+rlabel metal2 s 160770 463352 160770 463352 4 cubev_rf2_clk1
+port 1938 nsew
+rlabel metal3 s 38663 432548 38663 432548 4 cubev_rf2_csb0
+port 1939 nsew
+rlabel metal3 s 140047 503812 140047 503812 4 cubev_rf2_csb1
+port 1940 nsew
+rlabel metal3 s 61801 423572 61801 423572 4 cubev_rf2_din0\[0\]
+port 1941 nsew
+rlabel metal2 s 156722 401183 156722 401183 4 cubev_rf2_din0\[10\]
+port 1942 nsew
+rlabel metal2 s 82386 423232 82386 423232 4 cubev_rf2_din0\[11\]
+port 1943 nsew
+rlabel metal2 s 82570 422892 82570 422892 4 cubev_rf2_din0\[12\]
+port 1944 nsew
+rlabel metal3 s 76268 422348 76268 422348 4 cubev_rf2_din0\[13\]
+port 1945 nsew
+rlabel metal3 s 77855 423572 77855 423572 4 cubev_rf2_din0\[14\]
+port 1946 nsew
+rlabel metal3 s 79051 423572 79051 423572 4 cubev_rf2_din0\[15\]
+port 1947 nsew
+rlabel metal3 s 80707 423436 80707 423436 4 cubev_rf2_din0\[16\]
+port 1948 nsew
+rlabel metal3 s 81903 423436 81903 423436 4 cubev_rf2_din0\[17\]
+port 1949 nsew
+rlabel metal2 s 83858 422433 83858 422433 4 cubev_rf2_din0\[18\]
+port 1950 nsew
+rlabel metal2 s 84042 422569 84042 422569 4 cubev_rf2_din0\[19\]
+port 1951 nsew
+rlabel metal4 s 63411 423572 63411 423572 4 cubev_rf2_din0\[1\]
+port 1952 nsew
+rlabel metal2 s 176686 386189 176686 386189 4 cubev_rf2_din0\[20\]
+port 1953 nsew
+rlabel metal3 s 178871 386308 178871 386308 4 cubev_rf2_din0\[21\]
+port 1954 nsew
+rlabel metal2 s 176778 387583 176778 387583 4 cubev_rf2_din0\[22\]
+port 1955 nsew
+rlabel metal3 s 176686 387685 176686 387685 4 cubev_rf2_din0\[23\]
+port 1956 nsew
+rlabel metal3 s 178825 388756 178825 388756 4 cubev_rf2_din0\[24\]
+port 1957 nsew
+rlabel metal2 s 176686 389079 176686 389079 4 cubev_rf2_din0\[25\]
+port 1958 nsew
+rlabel metal3 s 178779 390116 178779 390116 4 cubev_rf2_din0\[26\]
+port 1959 nsew
+rlabel metal3 s 178917 390524 178917 390524 4 cubev_rf2_din0\[27\]
+port 1960 nsew
+rlabel metal3 s 94829 423572 94829 423572 4 cubev_rf2_din0\[28\]
+port 1961 nsew
+rlabel metal3 s 96117 423572 96117 423572 4 cubev_rf2_din0\[29\]
+port 1962 nsew
+rlabel metal3 s 64745 423572 64745 423572 4 cubev_rf2_din0\[2\]
+port 1963 nsew
+rlabel metal2 s 97934 423079 97934 423079 4 cubev_rf2_din0\[30\]
+port 1964 nsew
+rlabel metal3 s 98233 423436 98233 423436 4 cubev_rf2_din0\[31\]
+port 1965 nsew
+rlabel metal2 s 176686 373881 176686 373881 4 cubev_rf2_din0\[3\]
+port 1966 nsew
+rlabel metal2 s 138782 376618 138782 376618 4 cubev_rf2_din0\[4\]
+port 1967 nsew
+rlabel metal2 s 139426 377264 139426 377264 4 cubev_rf2_din0\[5\]
+port 1968 nsew
+rlabel metal2 s 138598 378012 138598 378012 4 cubev_rf2_din0\[6\]
+port 1969 nsew
+rlabel metal2 s 176778 377672 176778 377672 4 cubev_rf2_din0\[7\]
+port 1970 nsew
+rlabel metal4 s 98532 398684 98532 398684 4 cubev_rf2_din0\[8\]
+port 1971 nsew
+rlabel metal4 s 82064 383640 82064 383640 4 cubev_rf2_din0\[9\]
+port 1972 nsew
+rlabel metal2 s 176778 394417 176778 394417 4 cubev_rf2_dout0\[0\]
+port 1973 nsew
+rlabel metal3 s 81811 423572 81811 423572 4 cubev_rf2_dout0\[10\]
+port 1974 nsew
+rlabel metal3 s 83973 423572 83973 423572 4 cubev_rf2_dout0\[11\]
+port 1975 nsew
+rlabel metal2 s 176778 402645 176778 402645 4 cubev_rf2_dout0\[12\]
+port 1976 nsew
+rlabel metal2 s 176686 402815 176686 402815 4 cubev_rf2_dout0\[13\]
+port 1977 nsew
+rlabel metal2 s 176778 403971 176778 403971 4 cubev_rf2_dout0\[14\]
+port 1978 nsew
+rlabel metal3 s 176686 404277 176686 404277 4 cubev_rf2_dout0\[15\]
+port 1979 nsew
+rlabel metal2 s 176686 405161 176686 405161 4 cubev_rf2_dout0\[16\]
+port 1980 nsew
+rlabel metal3 s 180044 404993 180044 404993 4 cubev_rf2_dout0\[17\]
+port 1981 nsew
+rlabel metal3 s 178641 406436 178641 406436 4 cubev_rf2_dout0\[18\]
+port 1982 nsew
+rlabel metal3 s 178963 406980 178963 406980 4 cubev_rf2_dout0\[19\]
+port 1983 nsew
+rlabel metal2 s 113942 409122 113942 409122 4 cubev_rf2_dout0\[1\]
+port 1984 nsew
+rlabel metal3 s 94392 422348 94392 422348 4 cubev_rf2_dout0\[20\]
+port 1985 nsew
+rlabel metal3 s 95887 423436 95887 423436 4 cubev_rf2_dout0\[21\]
+port 1986 nsew
+rlabel metal4 s 96789 425340 96789 425340 4 cubev_rf2_dout0\[22\]
+port 1987 nsew
+rlabel metal3 s 98233 423572 98233 423572 4 cubev_rf2_dout0\[23\]
+port 1988 nsew
+rlabel metal2 s 99314 423215 99314 423215 4 cubev_rf2_dout0\[24\]
+port 1989 nsew
+rlabel metal3 s 100487 423572 100487 423572 4 cubev_rf2_dout0\[25\]
+port 1990 nsew
+rlabel metal4 s 101590 426020 101590 426020 4 cubev_rf2_dout0\[26\]
+port 1991 nsew
+rlabel metal4 s 102557 423572 102557 423572 4 cubev_rf2_dout0\[27\]
+port 1992 nsew
+rlabel metal2 s 177054 415344 177054 415344 4 cubev_rf2_dout0\[28\]
+port 1993 nsew
+rlabel metal2 s 176870 415667 176870 415667 4 cubev_rf2_dout0\[29\]
+port 1994 nsew
+rlabel metal2 s 176778 395777 176778 395777 4 cubev_rf2_dout0\[2\]
+port 1995 nsew
+rlabel metal2 s 176778 414987 176778 414987 4 cubev_rf2_dout0\[30\]
+port 1996 nsew
+rlabel metal3 s 176686 415293 176686 415293 4 cubev_rf2_dout0\[31\]
+port 1997 nsew
+rlabel metal2 s 115322 409836 115322 409836 4 cubev_rf2_dout0\[3\]
+port 1998 nsew
+rlabel metal2 s 176778 397171 176778 397171 4 cubev_rf2_dout0\[4\]
+port 1999 nsew
+rlabel metal2 s 75670 425289 75670 425289 4 cubev_rf2_dout0\[5\]
+port 2000 nsew
+rlabel metal3 s 76475 423572 76475 423572 4 cubev_rf2_dout0\[6\]
+port 2001 nsew
+rlabel metal2 s 78246 425323 78246 425323 4 cubev_rf2_dout0\[7\]
+port 2002 nsew
+rlabel metal2 s 79258 425357 79258 425357 4 cubev_rf2_dout0\[8\]
+port 2003 nsew
+rlabel metal3 s 80937 423572 80937 423572 4 cubev_rf2_dout0\[9\]
+port 2004 nsew
+rlabel metal4 s 69414 506794 69414 506794 4 cubev_rf2_dout1\[0\]
+port 2005 nsew
+rlabel metal4 s 82062 506794 82062 506794 4 cubev_rf2_dout1\[10\]
+port 2006 nsew
+rlabel metal4 s 83150 506794 83150 506794 4 cubev_rf2_dout1\[11\]
+port 2007 nsew
+rlabel metal2 s 84095 509252 84095 509252 4 cubev_rf2_dout1\[12\]
+port 2008 nsew
+rlabel metal4 s 85734 506794 85734 506794 4 cubev_rf2_dout1\[13\]
+port 2009 nsew
+rlabel metal4 s 86958 506794 86958 506794 4 cubev_rf2_dout1\[14\]
+port 2010 nsew
+rlabel metal4 s 88318 506862 88318 506862 4 cubev_rf2_dout1\[15\]
+port 2011 nsew
+rlabel metal4 s 89406 506794 89406 506794 4 cubev_rf2_dout1\[16\]
+port 2012 nsew
+rlabel metal4 s 90766 506794 90766 506794 4 cubev_rf2_dout1\[17\]
+port 2013 nsew
+rlabel metal4 s 92126 506862 92126 506862 4 cubev_rf2_dout1\[18\]
+port 2014 nsew
+rlabel metal4 s 93214 506794 93214 506794 4 cubev_rf2_dout1\[19\]
+port 2015 nsew
+rlabel metal4 s 70774 506794 70774 506794 4 cubev_rf2_dout1\[1\]
+port 2016 nsew
+rlabel metal4 s 94438 506794 94438 506794 4 cubev_rf2_dout1\[20\]
+port 2017 nsew
+rlabel metal4 s 95798 506794 95798 506794 4 cubev_rf2_dout1\[21\]
+port 2018 nsew
+rlabel metal4 s 97022 506794 97022 506794 4 cubev_rf2_dout1\[22\]
+port 2019 nsew
+rlabel metal4 s 98382 506794 98382 506794 4 cubev_rf2_dout1\[23\]
+port 2020 nsew
+rlabel metal4 s 99470 506794 99470 506794 4 cubev_rf2_dout1\[24\]
+port 2021 nsew
+rlabel metal4 s 100830 506794 100830 506794 4 cubev_rf2_dout1\[25\]
+port 2022 nsew
+rlabel metal4 s 101918 506794 101918 506794 4 cubev_rf2_dout1\[26\]
+port 2023 nsew
+rlabel metal4 s 103142 506794 103142 506794 4 cubev_rf2_dout1\[27\]
+port 2024 nsew
+rlabel metal4 s 104366 506794 104366 506794 4 cubev_rf2_dout1\[28\]
+port 2025 nsew
+rlabel metal4 s 105726 506794 105726 506794 4 cubev_rf2_dout1\[29\]
+port 2026 nsew
+rlabel metal4 s 72134 506794 72134 506794 4 cubev_rf2_dout1\[2\]
+port 2027 nsew
+rlabel metal4 s 107086 506794 107086 506794 4 cubev_rf2_dout1\[30\]
+port 2028 nsew
+rlabel metal4 s 108310 506794 108310 506794 4 cubev_rf2_dout1\[31\]
+port 2029 nsew
+rlabel metal4 s 73222 506862 73222 506862 4 cubev_rf2_dout1\[3\]
+port 2030 nsew
+rlabel metal4 s 74582 506794 74582 506794 4 cubev_rf2_dout1\[4\]
+port 2031 nsew
+rlabel metal4 s 75806 506794 75806 506794 4 cubev_rf2_dout1\[5\]
+port 2032 nsew
+rlabel metal4 s 77166 506862 77166 506862 4 cubev_rf2_dout1\[6\]
+port 2033 nsew
+rlabel metal4 s 78390 506794 78390 506794 4 cubev_rf2_dout1\[7\]
+port 2034 nsew
+rlabel metal4 s 79478 506794 79478 506794 4 cubev_rf2_dout1\[8\]
+port 2035 nsew
+rlabel metal4 s 80702 506862 80702 506862 4 cubev_rf2_dout1\[9\]
+port 2036 nsew
+rlabel metal2 s 158010 464678 158010 464678 4 cubev_rf2_dout1_reg\[0\]
+port 2037 nsew
+rlabel metal3 s 176686 429131 176686 429131 4 cubev_rf2_dout1_reg\[10\]
+port 2038 nsew
+rlabel metal2 s 176778 430389 176778 430389 4 cubev_rf2_dout1_reg\[11\]
+port 2039 nsew
+rlabel metal3 s 176686 430491 176686 430491 4 cubev_rf2_dout1_reg\[12\]
+port 2040 nsew
+rlabel metal2 s 176686 431749 176686 431749 4 cubev_rf2_dout1_reg\[13\]
+port 2041 nsew
+rlabel metal1 s 175076 431834 175076 431834 4 cubev_rf2_dout1_reg\[14\]
+port 2042 nsew
+rlabel metal2 s 97382 549678 97382 549678 4 cubev_rf2_dout1_reg\[15\]
+port 2043 nsew
+rlabel metal3 s 176686 433245 176686 433245 4 cubev_rf2_dout1_reg\[16\]
+port 2044 nsew
+rlabel metal3 s 178825 434316 178825 434316 4 cubev_rf2_dout1_reg\[17\]
+port 2045 nsew
+rlabel metal2 s 140254 492150 140254 492150 4 cubev_rf2_dout1_reg\[18\]
+port 2046 nsew
+rlabel metal3 s 178779 435676 178779 435676 4 cubev_rf2_dout1_reg\[19\]
+port 2047 nsew
+rlabel metal3 s 178687 423300 178687 423300 4 cubev_rf2_dout1_reg\[1\]
+port 2048 nsew
+rlabel metal2 s 94346 550042 94346 550042 4 cubev_rf2_dout1_reg\[20\]
+port 2049 nsew
+rlabel metal2 s 95634 550076 95634 550076 4 cubev_rf2_dout1_reg\[21\]
+port 2050 nsew
+rlabel metal2 s 96922 550110 96922 550110 4 cubev_rf2_dout1_reg\[22\]
+port 2051 nsew
+rlabel metal2 s 98578 548573 98578 548573 4 cubev_rf2_dout1_reg\[23\]
+port 2052 nsew
+rlabel metal2 s 99498 549940 99498 549940 4 cubev_rf2_dout1_reg\[24\]
+port 2053 nsew
+rlabel metal2 s 100786 550008 100786 550008 4 cubev_rf2_dout1_reg\[25\]
+port 2054 nsew
+rlabel metal1 s 102166 548284 102166 548284 4 cubev_rf2_dout1_reg\[26\]
+port 2055 nsew
+rlabel metal2 s 103362 549906 103362 549906 4 cubev_rf2_dout1_reg\[27\]
+port 2056 nsew
+rlabel metal2 s 141634 494904 141634 494904 4 cubev_rf2_dout1_reg\[28\]
+port 2057 nsew
+rlabel metal2 s 176686 442697 176686 442697 4 cubev_rf2_dout1_reg\[29\]
+port 2058 nsew
+rlabel metal2 s 176686 423521 176686 423521 4 cubev_rf2_dout1_reg\[2\]
+port 2059 nsew
+rlabel metal3 s 178871 442884 178871 442884 4 cubev_rf2_dout1_reg\[30\]
+port 2060 nsew
+rlabel metal2 s 176778 444057 176778 444057 4 cubev_rf2_dout1_reg\[31\]
+port 2061 nsew
+rlabel metal3 s 178733 424660 178733 424660 4 cubev_rf2_dout1_reg\[3\]
+port 2062 nsew
+rlabel metal3 s 178825 424796 178825 424796 4 cubev_rf2_dout1_reg\[4\]
+port 2063 nsew
+rlabel metal2 s 176778 426207 176778 426207 4 cubev_rf2_dout1_reg\[5\]
+port 2064 nsew
+rlabel metal2 s 176686 426241 176686 426241 4 cubev_rf2_dout1_reg\[6\]
+port 2065 nsew
+rlabel metal2 s 176778 427635 176778 427635 4 cubev_rf2_dout1_reg\[7\]
+port 2066 nsew
+rlabel metal2 s 176686 427737 176686 427737 4 cubev_rf2_dout1_reg\[8\]
+port 2067 nsew
+rlabel metal2 s 176778 428961 176778 428961 4 cubev_rf2_dout1_reg\[9\]
+port 2068 nsew
+rlabel metal3 s 176686 361437 176686 361437 4 cubev_rf2_rstn
+port 2069 nsew
+rlabel metal3 s 38893 433636 38893 433636 4 cubev_rf2_web0
+port 2070 nsew
+rlabel metal3 s 57799 423572 57799 423572 4 cubev_rf2_wmask0\[0\]
+port 2071 nsew
+rlabel metal3 s 59041 423572 59041 423572 4 cubev_rf2_wmask0\[1\]
+port 2072 nsew
+rlabel metal4 s 60076 424592 60076 424592 4 cubev_rf2_wmask0\[2\]
+port 2073 nsew
+rlabel metal4 s 60651 423572 60651 423572 4 cubev_rf2_wmask0\[3\]
+port 2074 nsew
+rlabel metal2 s 422602 173077 422602 173077 4 io_in[0]
+port 2075 nsew
+rlabel metal2 s 423522 442289 423522 442289 4 io_in[10]
+port 2076 nsew
+rlabel metal2 s 423614 527527 423614 527527 4 io_in[11]
+port 2077 nsew
+rlabel metal2 s 580198 563703 580198 563703 4 io_in[12]
+port 2078 nsew
+rlabel metal3 s 582046 617508 582046 617508 4 io_in[13]
+port 2079 nsew
+rlabel metal3 s 423614 533987 423614 533987 4 io_in[14]
+port 2080 nsew
+rlabel metal2 s 558946 636521 558946 636521 4 io_in[15]
+port 2081 nsew
+rlabel metal2 s 192158 539852 192158 539852 4 io_in[16]
+port 2082 nsew
+rlabel metal2 s 194734 539852 194734 539852 4 io_in[17]
+port 2083 nsew
+rlabel metal2 s 197340 539995 197340 539995 4 io_in[18]
+port 2084 nsew
+rlabel metal2 s 199900 539852 199900 539852 4 io_in[19]
+port 2085 nsew
+rlabel metal3 s 422694 175627 422694 175627 4 io_in[1]
+port 2086 nsew
+rlabel metal2 s 404416 539852 404416 539852 4 io_in[20]
+port 2087 nsew
+rlabel metal2 s 406656 539852 406656 539852 4 io_in[21]
+port 2088 nsew
+rlabel metal2 s 409094 539852 409094 539852 4 io_in[22]
+port 2089 nsew
+rlabel metal2 s 411578 539852 411578 539852 4 io_in[23]
+port 2090 nsew
+rlabel metal2 s 176778 450925 176778 450925 4 io_in[24]
+port 2091 nsew
+rlabel metal2 s 176686 448375 176686 448375 4 io_in[25]
+port 2092 nsew
+rlabel metal3 s 2016 579972 2016 579972 4 io_in[26]
+port 2093 nsew
+rlabel metal3 s 1878 527884 1878 527884 4 io_in[27]
+port 2094 nsew
+rlabel metal3 s 1924 475660 1924 475660 4 io_in[28]
+port 2095 nsew
+rlabel metal3 s 1924 423572 1924 423572 4 io_in[29]
+port 2096 nsew
+rlabel metal2 s 422786 177395 422786 177395 4 io_in[2]
+port 2097 nsew
+rlabel metal3 s 1970 371348 1970 371348 4 io_in[30]
+port 2098 nsew
+rlabel metal3 s 176686 270453 176686 270453 4 io_in[31]
+port 2099 nsew
+rlabel metal2 s 176686 268719 176686 268719 4 io_in[32]
+port 2100 nsew
+rlabel metal3 s 1970 214948 1970 214948 4 io_in[33]
+port 2101 nsew
+rlabel metal3 s 2200 162860 2200 162860 4 io_in[34]
+port 2102 nsew
+rlabel metal2 s 176778 178245 176778 178245 4 io_in[35]
+port 2103 nsew
+rlabel metal3 s 1878 71604 1878 71604 4 io_in[36]
+port 2104 nsew
+rlabel metal3 s 1740 32436 1740 32436 4 io_in[37]
+port 2105 nsew
+rlabel metal2 s 423246 262497 423246 262497 4 io_in[3]
+port 2106 nsew
+rlabel metal2 s 423108 245004 423108 245004 4 io_in[4]
+port 2107 nsew
+rlabel metal2 s 423522 349435 423522 349435 4 io_in[5]
+port 2108 nsew
+rlabel metal2 s 423522 351169 423522 351169 4 io_in[6]
+port 2109 nsew
+rlabel metal2 s 423522 353583 423522 353583 4 io_in[7]
+port 2110 nsew
+rlabel metal3 s 581908 351900 581908 351900 4 io_in[8]
+port 2111 nsew
+rlabel metal2 s 580198 405297 580198 405297 4 io_in[9]
+port 2112 nsew
+rlabel metal2 s 422602 174437 422602 174437 4 io_oeb[0]
+port 2113 nsew
+rlabel metal2 s 423522 443649 423522 443649 4 io_oeb[10]
+port 2114 nsew
+rlabel metal2 s 423614 529635 423614 529635 4 io_oeb[11]
+port 2115 nsew
+rlabel metal2 s 423614 531233 423614 531233 4 io_oeb[12]
+port 2116 nsew
+rlabel metal3 s 581954 644028 581954 644028 4 io_oeb[13]
+port 2117 nsew
+rlabel metal3 s 581908 697204 581908 697204 4 io_oeb[14]
+port 2118 nsew
+rlabel metal2 s 431342 632706 431342 632706 4 io_oeb[15]
+port 2119 nsew
+rlabel metal2 s 190594 539852 190594 539852 4 io_oeb[16]
+port 2120 nsew
+rlabel metal2 s 193276 539852 193276 539852 4 io_oeb[17]
+port 2121 nsew
+rlabel metal2 s 195470 539852 195470 539852 4 io_oeb[18]
+port 2122 nsew
+rlabel metal2 s 198336 539852 198336 539852 4 io_oeb[19]
+port 2123 nsew
+rlabel metal2 s 422786 176851 422786 176851 4 io_oeb[1]
+port 2124 nsew
+rlabel metal2 s 296010 622404 296010 622404 4 io_oeb[20]
+port 2125 nsew
+rlabel metal2 s 405000 539852 405000 539852 4 io_oeb[21]
+port 2126 nsew
+rlabel metal2 s 407484 539852 407484 539852 4 io_oeb[22]
+port 2127 nsew
+rlabel metal2 s 410014 539852 410014 539852 4 io_oeb[23]
+port 2128 nsew
+rlabel metal3 s 1970 658172 1970 658172 4 io_oeb[24]
+port 2129 nsew
+rlabel metal2 s 176686 449735 176686 449735 4 io_oeb[25]
+port 2130 nsew
+rlabel metal2 s 176778 448205 176778 448205 4 io_oeb[26]
+port 2131 nsew
+rlabel metal3 s 1832 501772 1832 501772 4 io_oeb[27]
+port 2132 nsew
+rlabel metal3 s 1970 449548 1970 449548 4 io_oeb[28]
+port 2133 nsew
+rlabel metal3 s 2016 397460 2016 397460 4 io_oeb[29]
+port 2134 nsew
+rlabel metal2 s 422694 178551 422694 178551 4 io_oeb[2]
+port 2135 nsew
+rlabel metal3 s 1878 345372 1878 345372 4 io_oeb[30]
+port 2136 nsew
+rlabel metal3 s 1970 293148 1970 293148 4 io_oeb[31]
+port 2137 nsew
+rlabel metal2 s 176778 269229 176778 269229 4 io_oeb[32]
+port 2138 nsew
+rlabel metal3 s 1878 188836 1878 188836 4 io_oeb[33]
+port 2139 nsew
+rlabel metal3 s 1878 136748 1878 136748 4 io_oeb[34]
+port 2140 nsew
+rlabel metal2 s 176778 179571 176778 179571 4 io_oeb[35]
+port 2141 nsew
+rlabel metal3 s 1878 45492 1878 45492 4 io_oeb[36]
+port 2142 nsew
+rlabel metal3 s 1556 6460 1556 6460 4 io_oeb[37]
+port 2143 nsew
+rlabel metal3 s 581908 152660 581908 152660 4 io_oeb[3]
+port 2144 nsew
+rlabel metal2 s 580198 192831 580198 192831 4 io_oeb[4]
+port 2145 nsew
+rlabel metal2 s 422786 349333 422786 349333 4 io_oeb[5]
+port 2146 nsew
+rlabel metal2 s 423338 352529 423338 352529 4 io_oeb[6]
+port 2147 nsew
+rlabel metal2 s 422878 355351 422878 355351 4 io_oeb[7]
+port 2148 nsew
+rlabel metal2 s 423062 436424 423062 436424 4 io_oeb[8]
+port 2149 nsew
+rlabel metal2 s 423614 441915 423614 441915 4 io_oeb[9]
+port 2150 nsew
+rlabel metal2 s 422786 174131 422786 174131 4 io_out[0]
+port 2151 nsew
+rlabel metal2 s 423614 443275 423614 443275 4 io_out[10]
+port 2152 nsew
+rlabel metal3 s 581908 524484 581908 524484 4 io_out[11]
+port 2153 nsew
+rlabel metal3 s 582138 577660 582138 577660 4 io_out[12]
+port 2154 nsew
+rlabel metal3 s 423614 532661 423614 532661 4 io_out[13]
+port 2155 nsew
+rlabel metal2 s 422878 535041 422878 535041 4 io_out[14]
+port 2156 nsew
+rlabel metal2 s 543490 701260 543490 701260 4 io_out[15]
+port 2157 nsew
+rlabel metal2 s 191666 539852 191666 539852 4 io_out[16]
+port 2158 nsew
+rlabel metal2 s 193860 539852 193860 539852 4 io_out[17]
+port 2159 nsew
+rlabel metal2 s 196298 539852 196298 539852 4 io_out[18]
+port 2160 nsew
+rlabel metal2 s 199164 539852 199164 539852 4 io_out[19]
+port 2161 nsew
+rlabel metal2 s 422786 175797 422786 175797 4 io_out[1]
+port 2162 nsew
+rlabel metal2 s 403298 539852 403298 539852 4 io_out[20]
+port 2163 nsew
+rlabel metal2 s 405874 539852 405874 539852 4 io_out[21]
+port 2164 nsew
+rlabel metal2 s 408556 539716 408556 539716 4 io_out[22]
+port 2165 nsew
+rlabel metal2 s 410750 539852 410750 539852 4 io_out[23]
+port 2166 nsew
+rlabel metal2 s 176686 451095 176686 451095 4 io_out[24]
+port 2167 nsew
+rlabel metal3 s 1878 619140 1878 619140 4 io_out[25]
+port 2168 nsew
+rlabel metal3 s 1786 566916 1786 566916 4 io_out[26]
+port 2169 nsew
+rlabel metal2 s 176778 445417 176778 445417 4 io_out[27]
+port 2170 nsew
+rlabel metal3 s 1878 462604 1878 462604 4 io_out[28]
+port 2171 nsew
+rlabel metal3 s 1970 410516 1970 410516 4 io_out[29]
+port 2172 nsew
+rlabel metal3 s 422786 178347 422786 178347 4 io_out[2]
+port 2173 nsew
+rlabel metal3 s 1924 358428 1924 358428 4 io_out[30]
+port 2174 nsew
+rlabel metal2 s 176778 271439 176778 271439 4 io_out[31]
+port 2175 nsew
+rlabel metal3 s 1878 254116 1878 254116 4 io_out[32]
+port 2176 nsew
+rlabel metal3 s 1924 201892 1924 201892 4 io_out[33]
+port 2177 nsew
+rlabel metal3 s 1878 149804 1878 149804 4 io_out[34]
+port 2178 nsew
+rlabel metal3 s 1878 97580 1878 97580 4 io_out[35]
+port 2179 nsew
+rlabel metal3 s 1694 58548 1694 58548 4 io_out[36]
+port 2180 nsew
+rlabel metal3 s 1878 19380 1878 19380 4 io_out[37]
+port 2181 nsew
+rlabel metal3 s 581954 139332 581954 139332 4 io_out[3]
+port 2182 nsew
+rlabel metal2 s 580198 179265 580198 179265 4 io_out[4]
+port 2183 nsew
+rlabel metal2 s 423246 349044 423246 349044 4 io_out[5]
+port 2184 nsew
+rlabel metal2 s 423522 352223 423522 352223 4 io_out[6]
+port 2185 nsew
+rlabel metal2 s 423338 353889 423338 353889 4 io_out[7]
+port 2186 nsew
+rlabel metal3 s 581954 365092 581954 365092 4 io_out[8]
+port 2187 nsew
+rlabel metal2 s 422878 437053 422878 437053 4 io_out[9]
+port 2188 nsew
+rlabel metal2 s 125902 1180 125902 1180 4 la_data_in[0]
+port 2189 nsew
+rlabel metal2 s 259463 19788 259463 19788 4 la_data_in[100]
+port 2190 nsew
+rlabel metal2 s 259969 19788 259969 19788 4 la_data_in[101]
+port 2191 nsew
+rlabel metal2 s 260521 19788 260521 19788 4 la_data_in[102]
+port 2192 nsew
+rlabel metal2 s 261073 19788 261073 19788 4 la_data_in[103]
+port 2193 nsew
+rlabel metal2 s 261625 19788 261625 19788 4 la_data_in[104]
+port 2194 nsew
+rlabel metal2 s 262223 19788 262223 19788 4 la_data_in[105]
+port 2195 nsew
+rlabel metal2 s 262729 19788 262729 19788 4 la_data_in[106]
+port 2196 nsew
+rlabel metal2 s 263281 19788 263281 19788 4 la_data_in[107]
+port 2197 nsew
+rlabel metal2 s 263833 19788 263833 19788 4 la_data_in[108]
+port 2198 nsew
+rlabel metal2 s 264385 19788 264385 19788 4 la_data_in[109]
+port 2199 nsew
+rlabel metal2 s 161322 2098 161322 2098 4 la_data_in[10]
+port 2200 nsew
+rlabel metal2 s 264983 19788 264983 19788 4 la_data_in[110]
+port 2201 nsew
+rlabel metal2 s 265489 19788 265489 19788 4 la_data_in[111]
+port 2202 nsew
+rlabel metal2 s 266041 19788 266041 19788 4 la_data_in[112]
+port 2203 nsew
+rlabel metal2 s 266593 19788 266593 19788 4 la_data_in[113]
+port 2204 nsew
+rlabel metal2 s 267145 19788 267145 19788 4 la_data_in[114]
+port 2205 nsew
+rlabel metal2 s 267743 19788 267743 19788 4 la_data_in[115]
+port 2206 nsew
+rlabel metal2 s 268249 19788 268249 19788 4 la_data_in[116]
+port 2207 nsew
+rlabel metal2 s 268801 19788 268801 19788 4 la_data_in[117]
+port 2208 nsew
+rlabel metal2 s 269353 19788 269353 19788 4 la_data_in[118]
+port 2209 nsew
+rlabel metal2 s 269905 19788 269905 19788 4 la_data_in[119]
+port 2210 nsew
+rlabel metal2 s 210335 19788 210335 19788 4 la_data_in[11]
+port 2211 nsew
+rlabel metal2 s 270526 18411 270526 18411 4 la_data_in[120]
+port 2212 nsew
+rlabel metal2 s 271009 19788 271009 19788 4 la_data_in[121]
+port 2213 nsew
+rlabel metal2 s 271561 19788 271561 19788 4 la_data_in[122]
+port 2214 nsew
+rlabel metal2 s 272113 19788 272113 19788 4 la_data_in[123]
+port 2215 nsew
+rlabel metal2 s 272665 19788 272665 19788 4 la_data_in[124]
+port 2216 nsew
+rlabel metal2 s 273263 19788 273263 19788 4 la_data_in[125]
+port 2217 nsew
+rlabel metal2 s 273769 19788 273769 19788 4 la_data_in[126]
+port 2218 nsew
+rlabel metal2 s 274321 19788 274321 19788 4 la_data_in[127]
+port 2219 nsew
+rlabel metal2 s 210841 19788 210841 19788 4 la_data_in[12]
+port 2220 nsew
+rlabel metal2 s 211439 19788 211439 19788 4 la_data_in[13]
+port 2221 nsew
+rlabel metal2 s 211945 19788 211945 19788 4 la_data_in[14]
+port 2222 nsew
+rlabel metal2 s 178841 340 178841 340 4 la_data_in[15]
+port 2223 nsew
+rlabel metal2 s 213049 19788 213049 19788 4 la_data_in[16]
+port 2224 nsew
+rlabel metal2 s 213601 19788 213601 19788 4 la_data_in[17]
+port 2225 nsew
+rlabel metal2 s 214153 19788 214153 19788 4 la_data_in[18]
+port 2226 nsew
+rlabel metal2 s 193246 1911 193246 1911 4 la_data_in[19]
+port 2227 nsew
+rlabel metal2 s 129161 340 129161 340 4 la_data_in[1]
+port 2228 nsew
+rlabel metal2 s 196834 1894 196834 1894 4 la_data_in[20]
+port 2229 nsew
+rlabel metal2 s 215809 19788 215809 19788 4 la_data_in[21]
+port 2230 nsew
+rlabel metal2 s 216361 19788 216361 19788 4 la_data_in[22]
+port 2231 nsew
+rlabel metal1 s 213670 17170 213670 17170 4 la_data_in[23]
+port 2232 nsew
+rlabel metal2 s 211002 1928 211002 1928 4 la_data_in[24]
+port 2233 nsew
+rlabel metal2 s 214498 1928 214498 1928 4 la_data_in[25]
+port 2234 nsew
+rlabel metal2 s 218086 1928 218086 1928 4 la_data_in[26]
+port 2235 nsew
+rlabel metal2 s 219236 3876 219236 3876 4 la_data_in[27]
+port 2236 nsew
+rlabel metal2 s 225170 1962 225170 1962 4 la_data_in[28]
+port 2237 nsew
+rlabel metal2 s 228758 1826 228758 1826 4 la_data_in[29]
+port 2238 nsew
+rlabel metal2 s 132986 2540 132986 2540 4 la_data_in[2]
+port 2239 nsew
+rlabel metal2 s 232254 2030 232254 2030 4 la_data_in[30]
+port 2240 nsew
+rlabel metal2 s 235842 1690 235842 1690 4 la_data_in[31]
+port 2241 nsew
+rlabel metal1 s 223790 17578 223790 17578 4 la_data_in[32]
+port 2242 nsew
+rlabel metal2 s 236670 13362 236670 13362 4 la_data_in[33]
+port 2243 nsew
+rlabel metal2 s 223054 18615 223054 18615 4 la_data_in[34]
+port 2244 nsew
+rlabel metal2 s 250010 1911 250010 1911 4 la_data_in[35]
+port 2245 nsew
+rlabel metal2 s 253506 1911 253506 1911 4 la_data_in[36]
+port 2246 nsew
+rlabel metal2 s 256949 340 256949 340 4 la_data_in[37]
+port 2247 nsew
+rlabel metal2 s 225262 18547 225262 18547 4 la_data_in[38]
+port 2248 nsew
+rlabel metal2 s 236026 4420 236026 4420 4 la_data_in[39]
+port 2249 nsew
+rlabel metal2 s 136482 2506 136482 2506 4 la_data_in[3]
+port 2250 nsew
+rlabel metal2 s 267766 1588 267766 1588 4 la_data_in[40]
+port 2251 nsew
+rlabel metal2 s 271262 2234 271262 2234 4 la_data_in[41]
+port 2252 nsew
+rlabel metal2 s 274850 1792 274850 1792 4 la_data_in[42]
+port 2253 nsew
+rlabel metal1 s 276276 3094 276276 3094 4 la_data_in[43]
+port 2254 nsew
+rlabel metal2 s 268962 3910 268962 3910 4 la_data_in[44]
+port 2255 nsew
+rlabel metal2 s 229126 17153 229126 17153 4 la_data_in[45]
+port 2256 nsew
+rlabel metal2 s 229609 19788 229609 19788 4 la_data_in[46]
+port 2257 nsew
+rlabel metal2 s 230230 18377 230230 18377 4 la_data_in[47]
+port 2258 nsew
+rlabel metal2 s 230713 19788 230713 19788 4 la_data_in[48]
+port 2259 nsew
+rlabel metal2 s 231265 19788 231265 19788 4 la_data_in[49]
+port 2260 nsew
+rlabel metal2 s 139833 340 139833 340 4 la_data_in[4]
+port 2261 nsew
+rlabel metal2 s 231863 19788 231863 19788 4 la_data_in[50]
+port 2262 nsew
+rlabel metal2 s 232369 19788 232369 19788 4 la_data_in[51]
+port 2263 nsew
+rlabel metal2 s 232990 18309 232990 18309 4 la_data_in[52]
+port 2264 nsew
+rlabel metal2 s 260774 19533 260774 19533 4 la_data_in[53]
+port 2265 nsew
+rlabel metal2 s 234094 18717 234094 18717 4 la_data_in[54]
+port 2266 nsew
+rlabel metal2 s 234646 19669 234646 19669 4 la_data_in[55]
+port 2267 nsew
+rlabel metal2 s 235129 19788 235129 19788 4 la_data_in[56]
+port 2268 nsew
+rlabel metal2 s 235681 19788 235681 19788 4 la_data_in[57]
+port 2269 nsew
+rlabel metal2 s 236233 19788 236233 19788 4 la_data_in[58]
+port 2270 nsew
+rlabel metal2 s 236785 19788 236785 19788 4 la_data_in[59]
+port 2271 nsew
+rlabel metal2 s 207023 19788 207023 19788 4 la_data_in[5]
+port 2272 nsew
+rlabel metal2 s 237383 19788 237383 19788 4 la_data_in[60]
+port 2273 nsew
+rlabel metal2 s 237889 19788 237889 19788 4 la_data_in[61]
+port 2274 nsew
+rlabel metal2 s 238441 19788 238441 19788 4 la_data_in[62]
+port 2275 nsew
+rlabel metal2 s 349222 -960 349334 480 4 la_data_in[63]
+port 2276 nsew
+rlabel metal2 s 352866 2914 352866 2914 4 la_data_in[64]
+port 2277 nsew
+rlabel metal2 s 240143 19788 240143 19788 4 la_data_in[65]
+port 2278 nsew
+rlabel metal2 s 240649 19788 240649 19788 4 la_data_in[66]
+port 2279 nsew
+rlabel metal2 s 241201 19788 241201 19788 4 la_data_in[67]
+port 2280 nsew
+rlabel metal2 s 367034 3866 367034 3866 4 la_data_in[68]
+port 2281 nsew
+rlabel metal2 s 370622 4104 370622 4104 4 la_data_in[69]
+port 2282 nsew
+rlabel metal2 s 147154 1911 147154 1911 4 la_data_in[6]
+port 2283 nsew
+rlabel metal2 s 242903 19788 242903 19788 4 la_data_in[70]
+port 2284 nsew
+rlabel metal2 s 243409 19788 243409 19788 4 la_data_in[71]
+port 2285 nsew
+rlabel metal2 s 243961 19788 243961 19788 4 la_data_in[72]
+port 2286 nsew
+rlabel metal2 s 384599 340 384599 340 4 la_data_in[73]
+port 2287 nsew
+rlabel metal2 s 388286 4036 388286 4036 4 la_data_in[74]
+port 2288 nsew
+rlabel metal2 s 391874 2846 391874 2846 4 la_data_in[75]
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+rlabel metal2 s 246169 19788 246169 19788 4 la_data_in[76]
+port 2290 nsew
+rlabel metal2 s 246721 19788 246721 19788 4 la_data_in[77]
+port 2291 nsew
+rlabel metal2 s 247273 19788 247273 19788 4 la_data_in[78]
+port 2292 nsew
+rlabel metal2 s 406042 4852 406042 4852 4 la_data_in[79]
+port 2293 nsew
+rlabel metal2 s 208081 19788 208081 19788 4 la_data_in[7]
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+rlabel metal2 s 248446 14535 248446 14535 4 la_data_in[80]
+port 2295 nsew
+rlabel metal2 s 248929 19788 248929 19788 4 la_data_in[81]
+port 2296 nsew
+rlabel metal2 s 249481 19788 249481 19788 4 la_data_in[82]
+port 2297 nsew
+rlabel metal2 s 250033 19788 250033 19788 4 la_data_in[83]
+port 2298 nsew
+rlabel metal2 s 250585 19788 250585 19788 4 la_data_in[84]
+port 2299 nsew
+rlabel metal2 s 251183 19788 251183 19788 4 la_data_in[85]
+port 2300 nsew
+rlabel metal2 s 251689 19788 251689 19788 4 la_data_in[86]
+port 2301 nsew
+rlabel metal2 s 252241 19788 252241 19788 4 la_data_in[87]
+port 2302 nsew
+rlabel metal2 s 252793 19788 252793 19788 4 la_data_in[88]
+port 2303 nsew
+rlabel metal2 s 253345 19788 253345 19788 4 la_data_in[89]
+port 2304 nsew
+rlabel metal2 s 154001 340 154001 340 4 la_data_in[8]
+port 2305 nsew
+rlabel metal2 s 253943 19788 253943 19788 4 la_data_in[90]
+port 2306 nsew
+rlabel metal2 s 254449 19788 254449 19788 4 la_data_in[91]
+port 2307 nsew
+rlabel metal2 s 255001 19788 255001 19788 4 la_data_in[92]
+port 2308 nsew
+rlabel metal2 s 255553 19788 255553 19788 4 la_data_in[93]
+port 2309 nsew
+rlabel metal2 s 256105 19788 256105 19788 4 la_data_in[94]
+port 2310 nsew
+rlabel metal2 s 256703 19788 256703 19788 4 la_data_in[95]
+port 2311 nsew
+rlabel metal2 s 257209 19788 257209 19788 4 la_data_in[96]
+port 2312 nsew
+rlabel metal2 s 257761 19788 257761 19788 4 la_data_in[97]
+port 2313 nsew
+rlabel metal2 s 258313 19788 258313 19788 4 la_data_in[98]
+port 2314 nsew
+rlabel metal2 s 258865 19788 258865 19788 4 la_data_in[99]
+port 2315 nsew
+rlabel metal2 s 157826 8218 157826 8218 4 la_data_in[9]
+port 2316 nsew
+rlabel metal2 s 127006 2914 127006 2914 4 la_data_out[0]
+port 2317 nsew
+rlabel metal2 s 259601 19788 259601 19788 4 la_data_out[100]
+port 2318 nsew
+rlabel metal2 s 260153 19788 260153 19788 4 la_data_out[101]
+port 2319 nsew
+rlabel metal2 s 260705 19788 260705 19788 4 la_data_out[102]
+port 2320 nsew
+rlabel metal2 s 261257 19788 261257 19788 4 la_data_out[103]
+port 2321 nsew
+rlabel metal2 s 261809 19788 261809 19788 4 la_data_out[104]
+port 2322 nsew
+rlabel metal2 s 262361 19788 262361 19788 4 la_data_out[105]
+port 2323 nsew
+rlabel metal2 s 262913 19788 262913 19788 4 la_data_out[106]
+port 2324 nsew
+rlabel metal2 s 263465 19788 263465 19788 4 la_data_out[107]
+port 2325 nsew
+rlabel metal2 s 264017 19788 264017 19788 4 la_data_out[108]
+port 2326 nsew
+rlabel metal2 s 264569 19788 264569 19788 4 la_data_out[109]
+port 2327 nsew
+rlabel metal2 s 209921 19788 209921 19788 4 la_data_out[10]
+port 2328 nsew
+rlabel metal2 s 265121 19788 265121 19788 4 la_data_out[110]
+port 2329 nsew
+rlabel metal2 s 265673 19788 265673 19788 4 la_data_out[111]
+port 2330 nsew
+rlabel metal2 s 266225 19788 266225 19788 4 la_data_out[112]
+port 2331 nsew
+rlabel metal2 s 266777 19788 266777 19788 4 la_data_out[113]
+port 2332 nsew
+rlabel metal2 s 267329 19788 267329 19788 4 la_data_out[114]
+port 2333 nsew
+rlabel metal2 s 267927 19788 267927 19788 4 la_data_out[115]
+port 2334 nsew
+rlabel metal2 s 268433 19788 268433 19788 4 la_data_out[116]
+port 2335 nsew
+rlabel metal2 s 268985 19788 268985 19788 4 la_data_out[117]
+port 2336 nsew
+rlabel metal2 s 269537 19788 269537 19788 4 la_data_out[118]
+port 2337 nsew
+rlabel metal2 s 270089 19788 270089 19788 4 la_data_out[119]
+port 2338 nsew
+rlabel metal1 s 210289 19822 210289 19822 4 la_data_out[11]
+port 2339 nsew
+rlabel metal2 s 270641 19788 270641 19788 4 la_data_out[120]
+port 2340 nsew
+rlabel metal2 s 271193 19788 271193 19788 4 la_data_out[121]
+port 2341 nsew
+rlabel metal2 s 271745 19788 271745 19788 4 la_data_out[122]
+port 2342 nsew
+rlabel metal2 s 272297 19788 272297 19788 4 la_data_out[123]
+port 2343 nsew
+rlabel metal2 s 272849 19788 272849 19788 4 la_data_out[124]
+port 2344 nsew
+rlabel metal3 s 274436 17884 274436 17884 4 la_data_out[125]
+port 2345 nsew
+rlabel metal2 s 273953 19788 273953 19788 4 la_data_out[126]
+port 2346 nsew
+rlabel metal2 s 274505 19788 274505 19788 4 la_data_out[127]
+port 2347 nsew
+rlabel metal2 s 211025 19788 211025 19788 4 la_data_out[12]
+port 2348 nsew
+rlabel metal2 s 172953 340 172953 340 4 la_data_out[13]
+port 2349 nsew
+rlabel metal2 s 212129 19788 212129 19788 4 la_data_out[14]
+port 2350 nsew
+rlabel metal2 s 212750 18615 212750 18615 4 la_data_out[15]
+port 2351 nsew
+rlabel metal1 s 213095 19822 213095 19822 4 la_data_out[16]
+port 2352 nsew
+rlabel metal2 s 213785 19788 213785 19788 4 la_data_out[17]
+port 2353 nsew
+rlabel metal2 s 190854 3254 190854 3254 4 la_data_out[18]
+port 2354 nsew
+rlabel metal2 s 194442 3288 194442 3288 4 la_data_out[19]
+port 2355 nsew
+rlabel metal2 s 130594 3594 130594 3594 4 la_data_out[1]
+port 2356 nsew
+rlabel metal2 s 197938 1928 197938 1928 4 la_data_out[20]
+port 2357 nsew
+rlabel metal2 s 216039 19788 216039 19788 4 la_data_out[21]
+port 2358 nsew
+rlabel metal2 s 216522 18581 216522 18581 4 la_data_out[22]
+port 2359 nsew
+rlabel metal1 s 214452 17646 214452 17646 4 la_data_out[23]
+port 2360 nsew
+rlabel metal2 s 212198 1894 212198 1894 4 la_data_out[24]
+port 2361 nsew
+rlabel metal2 s 215694 1996 215694 1996 4 la_data_out[25]
+port 2362 nsew
+rlabel metal2 s 219282 1911 219282 1911 4 la_data_out[26]
+port 2363 nsew
+rlabel metal2 s 219305 19788 219305 19788 4 la_data_out[27]
+port 2364 nsew
+rlabel metal2 s 226366 1860 226366 1860 4 la_data_out[28]
+port 2365 nsew
+rlabel metal2 s 229862 2098 229862 2098 4 la_data_out[29]
+port 2366 nsew
+rlabel metal2 s 134182 3492 134182 3492 4 la_data_out[2]
+port 2367 nsew
+rlabel metal2 s 233450 1996 233450 1996 4 la_data_out[30]
+port 2368 nsew
+rlabel metal2 s 237038 4002 237038 4002 4 la_data_out[31]
+port 2369 nsew
+rlabel metal2 s 222065 19788 222065 19788 4 la_data_out[32]
+port 2370 nsew
+rlabel metal2 s 222617 19788 222617 19788 4 la_data_out[33]
+port 2371 nsew
+rlabel metal2 s 223169 19788 223169 19788 4 la_data_out[34]
+port 2372 nsew
+rlabel metal2 s 251206 8150 251206 8150 4 la_data_out[35]
+port 2373 nsew
+rlabel metal2 s 254465 340 254465 340 4 la_data_out[36]
+port 2374 nsew
+rlabel metal2 s 224825 19788 224825 19788 4 la_data_out[37]
+port 2375 nsew
+rlabel metal2 s 225377 19788 225377 19788 4 la_data_out[38]
+port 2376 nsew
+rlabel metal2 s 225929 19788 225929 19788 4 la_data_out[39]
+port 2377 nsew
+rlabel metal2 s 137678 3220 137678 3220 4 la_data_out[3]
+port 2378 nsew
+rlabel metal2 s 268633 340 268633 340 4 la_data_out[40]
+port 2379 nsew
+rlabel metal2 s 272458 2030 272458 2030 4 la_data_out[41]
+port 2380 nsew
+rlabel metal2 s 276046 1911 276046 1911 4 la_data_out[42]
+port 2381 nsew
+rlabel metal2 s 253874 14280 253874 14280 4 la_data_out[43]
+port 2382 nsew
+rlabel metal2 s 228689 19788 228689 19788 4 la_data_out[44]
+port 2383 nsew
+rlabel metal2 s 229241 19788 229241 19788 4 la_data_out[45]
+port 2384 nsew
+rlabel metal2 s 229793 19788 229793 19788 4 la_data_out[46]
+port 2385 nsew
+rlabel metal2 s 230345 19788 230345 19788 4 la_data_out[47]
+port 2386 nsew
+rlabel metal2 s 230966 19771 230966 19771 4 la_data_out[48]
+port 2387 nsew
+rlabel metal2 s 231518 19737 231518 19737 4 la_data_out[49]
+port 2388 nsew
+rlabel metal2 s 141266 3186 141266 3186 4 la_data_out[4]
+port 2389 nsew
+rlabel metal2 s 232070 18853 232070 18853 4 la_data_out[50]
+port 2390 nsew
+rlabel metal2 s 232576 19934 232576 19934 4 la_data_out[51]
+port 2391 nsew
+rlabel metal2 s 233105 19788 233105 19788 4 la_data_out[52]
+port 2392 nsew
+rlabel metal2 s 233680 19968 233680 19968 4 la_data_out[53]
+port 2393 nsew
+rlabel metal2 s 234209 19788 234209 19788 4 la_data_out[54]
+port 2394 nsew
+rlabel metal2 s 234830 19703 234830 19703 4 la_data_out[55]
+port 2395 nsew
+rlabel metal2 s 235313 19788 235313 19788 4 la_data_out[56]
+port 2396 nsew
+rlabel metal2 s 235934 19635 235934 19635 4 la_data_out[57]
+port 2397 nsew
+rlabel metal2 s 236417 19788 236417 19788 4 la_data_out[58]
+port 2398 nsew
+rlabel metal2 s 237038 18411 237038 18411 4 la_data_out[59]
+port 2399 nsew
+rlabel metal2 s 207138 18751 207138 18751 4 la_data_out[5]
+port 2400 nsew
+rlabel metal2 s 237521 19788 237521 19788 4 la_data_out[60]
+port 2401 nsew
+rlabel metal2 s 238073 19788 238073 19788 4 la_data_out[61]
+port 2402 nsew
+rlabel metal2 s 238625 19788 238625 19788 4 la_data_out[62]
+port 2403 nsew
+rlabel metal2 s 350474 3526 350474 3526 4 la_data_out[63]
+port 2404 nsew
+rlabel metal2 s 353871 340 353871 340 4 la_data_out[64]
+port 2405 nsew
+rlabel metal2 s 240281 19788 240281 19788 4 la_data_out[65]
+port 2406 nsew
+rlabel metal2 s 252494 15912 252494 15912 4 la_data_out[66]
+port 2407 nsew
+rlabel metal2 s 364642 7742 364642 7742 4 la_data_out[67]
+port 2408 nsew
+rlabel metal2 s 367993 340 367993 340 4 la_data_out[68]
+port 2409 nsew
+rlabel metal2 s 371489 340 371489 340 4 la_data_out[69]
+port 2410 nsew
+rlabel metal2 s 148113 340 148113 340 4 la_data_out[6]
+port 2411 nsew
+rlabel metal2 s 243041 19788 243041 19788 4 la_data_out[70]
+port 2412 nsew
+rlabel metal2 s 243593 19788 243593 19788 4 la_data_out[71]
+port 2413 nsew
+rlabel metal2 s 244145 19788 244145 19788 4 la_data_out[72]
+port 2414 nsew
+rlabel metal2 s 385986 7538 385986 7538 4 la_data_out[73]
+port 2415 nsew
+rlabel metal2 s 389482 7504 389482 7504 4 la_data_out[74]
+port 2416 nsew
+rlabel metal2 s 392833 340 392833 340 4 la_data_out[75]
+port 2417 nsew
+rlabel metal2 s 246353 19788 246353 19788 4 la_data_out[76]
+port 2418 nsew
+rlabel metal2 s 246905 19788 246905 19788 4 la_data_out[77]
+port 2419 nsew
+rlabel metal2 s 403650 7691 403650 7691 4 la_data_out[78]
+port 2420 nsew
+rlabel metal2 s 407238 7623 407238 7623 4 la_data_out[79]
+port 2421 nsew
+rlabel metal2 s 151846 8184 151846 8184 4 la_data_out[7]
+port 2422 nsew
+rlabel metal2 s 248561 19788 248561 19788 4 la_data_out[80]
+port 2423 nsew
+rlabel metal2 s 249113 19788 249113 19788 4 la_data_out[81]
+port 2424 nsew
+rlabel metal2 s 249665 19788 249665 19788 4 la_data_out[82]
+port 2425 nsew
+rlabel metal2 s 250217 19788 250217 19788 4 la_data_out[83]
+port 2426 nsew
+rlabel metal2 s 250769 19788 250769 19788 4 la_data_out[84]
+port 2427 nsew
+rlabel metal2 s 251413 19788 251413 19788 4 la_data_out[85]
+port 2428 nsew
+rlabel metal2 s 251873 19788 251873 19788 4 la_data_out[86]
+port 2429 nsew
+rlabel metal2 s 252425 19788 252425 19788 4 la_data_out[87]
+port 2430 nsew
+rlabel metal2 s 252977 19788 252977 19788 4 la_data_out[88]
+port 2431 nsew
+rlabel metal2 s 253529 19788 253529 19788 4 la_data_out[89]
+port 2432 nsew
+rlabel metal2 s 155434 6994 155434 6994 4 la_data_out[8]
+port 2433 nsew
+rlabel metal2 s 254081 19788 254081 19788 4 la_data_out[90]
+port 2434 nsew
+rlabel metal2 s 254633 19788 254633 19788 4 la_data_out[91]
+port 2435 nsew
+rlabel metal2 s 255185 19788 255185 19788 4 la_data_out[92]
+port 2436 nsew
+rlabel metal2 s 255806 18581 255806 18581 4 la_data_out[93]
+port 2437 nsew
+rlabel metal2 s 256289 19788 256289 19788 4 la_data_out[94]
+port 2438 nsew
+rlabel metal2 s 256841 19788 256841 19788 4 la_data_out[95]
+port 2439 nsew
+rlabel metal2 s 257393 19788 257393 19788 4 la_data_out[96]
+port 2440 nsew
+rlabel metal2 s 257945 19788 257945 19788 4 la_data_out[97]
+port 2441 nsew
+rlabel metal2 s 258497 19788 258497 19788 4 la_data_out[98]
+port 2442 nsew
+rlabel metal2 s 259049 19788 259049 19788 4 la_data_out[99]
+port 2443 nsew
+rlabel metal2 s 158930 7538 158930 7538 4 la_data_out[9]
+port 2444 nsew
+rlabel metal2 s 128202 3560 128202 3560 4 la_oenb[0]
+port 2445 nsew
+rlabel metal2 s 259785 19788 259785 19788 4 la_oenb[100]
+port 2446 nsew
+rlabel metal2 s 260337 19788 260337 19788 4 la_oenb[101]
+port 2447 nsew
+rlabel metal2 s 260935 19788 260935 19788 4 la_oenb[102]
+port 2448 nsew
+rlabel metal2 s 261441 19788 261441 19788 4 la_oenb[103]
+port 2449 nsew
+rlabel metal2 s 261993 19788 261993 19788 4 la_oenb[104]
+port 2450 nsew
+rlabel metal2 s 262545 19788 262545 19788 4 la_oenb[105]
+port 2451 nsew
+rlabel metal2 s 263097 19788 263097 19788 4 la_oenb[106]
+port 2452 nsew
+rlabel metal2 s 263649 19788 263649 19788 4 la_oenb[107]
+port 2453 nsew
+rlabel metal2 s 264201 19788 264201 19788 4 la_oenb[108]
+port 2454 nsew
+rlabel metal2 s 264753 19788 264753 19788 4 la_oenb[109]
+port 2455 nsew
+rlabel metal1 s 210174 16660 210174 16660 4 la_oenb[10]
+port 2456 nsew
+rlabel metal2 s 265305 19788 265305 19788 4 la_oenb[110]
+port 2457 nsew
+rlabel metal2 s 265857 19788 265857 19788 4 la_oenb[111]
+port 2458 nsew
+rlabel metal2 s 266409 19788 266409 19788 4 la_oenb[112]
+port 2459 nsew
+rlabel metal2 s 266961 19788 266961 19788 4 la_oenb[113]
+port 2460 nsew
+rlabel metal2 s 267513 19788 267513 19788 4 la_oenb[114]
+port 2461 nsew
+rlabel metal2 s 268065 19788 268065 19788 4 la_oenb[115]
+port 2462 nsew
+rlabel metal1 s 269238 17918 269238 17918 4 la_oenb[116]
+port 2463 nsew
+rlabel metal2 s 269169 19788 269169 19788 4 la_oenb[117]
+port 2464 nsew
+rlabel metal2 s 269721 19788 269721 19788 4 la_oenb[118]
+port 2465 nsew
+rlabel metal1 s 270894 17918 270894 17918 4 la_oenb[119]
+port 2466 nsew
+rlabel metal2 s 210726 18411 210726 18411 4 la_oenb[11]
+port 2467 nsew
+rlabel metal2 s 270825 19788 270825 19788 4 la_oenb[120]
+port 2468 nsew
+rlabel metal2 s 271377 19788 271377 19788 4 la_oenb[121]
+port 2469 nsew
+rlabel metal3 s 273010 17748 273010 17748 4 la_oenb[122]
+port 2470 nsew
+rlabel metal2 s 272481 19788 272481 19788 4 la_oenb[123]
+port 2471 nsew
+rlabel metal2 s 273033 19788 273033 19788 4 la_oenb[124]
+port 2472 nsew
+rlabel metal2 s 273585 19788 273585 19788 4 la_oenb[125]
+port 2473 nsew
+rlabel metal2 s 274137 19788 274137 19788 4 la_oenb[126]
+port 2474 nsew
+rlabel metal2 s 274689 19788 274689 19788 4 la_oenb[127]
+port 2475 nsew
+rlabel metal1 s 210910 17442 210910 17442 4 la_oenb[12]
+port 2476 nsew
+rlabel metal2 s 211738 18275 211738 18275 4 la_oenb[13]
+port 2477 nsew
+rlabel metal2 s 212313 19788 212313 19788 4 la_oenb[14]
+port 2478 nsew
+rlabel metal1 s 212428 17442 212428 17442 4 la_oenb[15]
+port 2479 nsew
+rlabel metal2 s 213463 19788 213463 19788 4 la_oenb[16]
+port 2480 nsew
+rlabel metal1 s 213670 17782 213670 17782 4 la_oenb[17]
+port 2481 nsew
+rlabel metal2 s 192050 1928 192050 1928 4 la_oenb[18]
+port 2482 nsew
+rlabel metal2 s 195401 340 195401 340 4 la_oenb[19]
+port 2483 nsew
+rlabel metal2 s 131790 4240 131790 4240 4 la_oenb[1]
+port 2484 nsew
+rlabel metal2 s 199035 340 199035 340 4 la_oenb[20]
+port 2485 nsew
+rlabel metal2 s 216177 19788 216177 19788 4 la_oenb[21]
+port 2486 nsew
+rlabel metal2 s 216798 18513 216798 18513 4 la_oenb[22]
+port 2487 nsew
+rlabel metal2 s 209806 1758 209806 1758 4 la_oenb[23]
+port 2488 nsew
+rlabel metal2 s 213394 1758 213394 1758 4 la_oenb[24]
+port 2489 nsew
+rlabel metal1 s 217534 17578 217534 17578 4 la_oenb[25]
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+rlabel metal2 s 218937 19788 218937 19788 4 la_oenb[26]
+port 2491 nsew
+rlabel metal2 s 223974 1928 223974 1928 4 la_oenb[27]
+port 2492 nsew
+rlabel metal2 s 227562 1894 227562 1894 4 la_oenb[28]
+port 2493 nsew
+rlabel metal2 s 231058 2064 231058 2064 4 la_oenb[29]
+port 2494 nsew
+rlabel metal2 s 135286 4274 135286 4274 4 la_oenb[2]
+port 2495 nsew
+rlabel metal2 s 234646 1588 234646 1588 4 la_oenb[30]
+port 2496 nsew
+rlabel metal2 s 238142 1962 238142 1962 4 la_oenb[31]
+port 2497 nsew
+rlabel metal2 s 231150 9282 231150 9282 4 la_oenb[32]
+port 2498 nsew
+rlabel metal1 s 225262 6358 225262 6358 4 la_oenb[33]
+port 2499 nsew
+rlabel metal2 s 248814 4648 248814 4648 4 la_oenb[34]
+port 2500 nsew
+rlabel metal2 s 252402 2098 252402 2098 4 la_oenb[35]
+port 2501 nsew
+rlabel metal2 s 255898 6790 255898 6790 4 la_oenb[36]
+port 2502 nsew
+rlabel metal2 s 225009 19788 225009 19788 4 la_oenb[37]
+port 2503 nsew
+rlabel metal2 s 254702 9894 254702 9894 4 la_oenb[38]
+port 2504 nsew
+rlabel metal2 s 226113 19788 226113 19788 4 la_oenb[39]
+port 2505 nsew
+rlabel metal2 s 139065 340 139065 340 4 la_oenb[3]
+port 2506 nsew
+rlabel metal2 s 270066 1656 270066 1656 4 la_oenb[40]
+port 2507 nsew
+rlabel metal2 s 273509 340 273509 340 4 la_oenb[41]
+port 2508 nsew
+rlabel metal2 s 276959 340 276959 340 4 la_oenb[42]
+port 2509 nsew
+rlabel metal2 s 228390 18581 228390 18581 4 la_oenb[43]
+port 2510 nsew
+rlabel metal2 s 228873 19788 228873 19788 4 la_oenb[44]
+port 2511 nsew
+rlabel metal2 s 229425 19788 229425 19788 4 la_oenb[45]
+port 2512 nsew
+rlabel metal2 s 229977 19788 229977 19788 4 la_oenb[46]
+port 2513 nsew
+rlabel metal2 s 230529 19788 230529 19788 4 la_oenb[47]
+port 2514 nsew
+rlabel metal2 s 231081 19788 231081 19788 4 la_oenb[48]
+port 2515 nsew
+rlabel metal2 s 231633 19788 231633 19788 4 la_oenb[49]
+port 2516 nsew
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+port 2517 nsew
+rlabel metal2 s 232185 19788 232185 19788 4 la_oenb[50]
+port 2518 nsew
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+port 2519 nsew
+rlabel metal2 s 233289 19788 233289 19788 4 la_oenb[52]
+port 2520 nsew
+rlabel metal2 s 233841 19788 233841 19788 4 la_oenb[53]
+port 2521 nsew
+rlabel metal2 s 234393 19788 234393 19788 4 la_oenb[54]
+port 2522 nsew
+rlabel metal2 s 234945 19788 234945 19788 4 la_oenb[55]
+port 2523 nsew
+rlabel metal2 s 235497 19788 235497 19788 4 la_oenb[56]
+port 2524 nsew
+rlabel metal2 s 236049 19788 236049 19788 4 la_oenb[57]
+port 2525 nsew
+rlabel metal2 s 236601 19788 236601 19788 4 la_oenb[58]
+port 2526 nsew
+rlabel metal2 s 237153 19788 237153 19788 4 la_oenb[59]
+port 2527 nsew
+rlabel metal2 s 145721 340 145721 340 4 la_oenb[5]
+port 2528 nsew
+rlabel metal2 s 237705 19788 237705 19788 4 la_oenb[60]
+port 2529 nsew
+rlabel metal2 s 238257 19788 238257 19788 4 la_oenb[61]
+port 2530 nsew
+rlabel metal2 s 348082 2540 348082 2540 4 la_oenb[62]
+port 2531 nsew
+rlabel metal2 s 351670 1826 351670 1826 4 la_oenb[63]
+port 2532 nsew
+rlabel metal2 s 239913 19788 239913 19788 4 la_oenb[64]
+port 2533 nsew
+rlabel metal1 s 275632 3162 275632 3162 4 la_oenb[65]
+port 2534 nsew
+rlabel metal2 s 241017 19788 241017 19788 4 la_oenb[66]
+port 2535 nsew
+rlabel metal2 s 365838 2234 365838 2234 4 la_oenb[67]
+port 2536 nsew
+rlabel metal2 s 369426 3186 369426 3186 4 la_oenb[68]
+port 2537 nsew
+rlabel metal2 s 372922 2200 372922 2200 4 la_oenb[69]
+port 2538 nsew
+rlabel metal2 s 207874 18717 207874 18717 4 la_oenb[6]
+port 2539 nsew
+rlabel metal1 s 245962 17680 245962 17680 4 la_oenb[70]
+port 2540 nsew
+rlabel metal2 s 268594 17510 268594 17510 4 la_oenb[71]
+port 2541 nsew
+rlabel metal1 s 273516 3366 273516 3366 4 la_oenb[72]
+port 2542 nsew
+rlabel metal2 s 386945 340 386945 340 4 la_oenb[73]
+port 2543 nsew
+rlabel metal1 s 274068 3978 274068 3978 4 la_oenb[74]
+port 2544 nsew
+rlabel metal2 s 246054 18275 246054 18275 4 la_oenb[75]
+port 2545 nsew
+rlabel metal2 s 246537 19788 246537 19788 4 la_oenb[76]
+port 2546 nsew
+rlabel metal2 s 247158 18751 247158 18751 4 la_oenb[77]
+port 2547 nsew
+rlabel metal2 s 404846 1996 404846 1996 4 la_oenb[78]
+port 2548 nsew
+rlabel metal2 s 408434 2540 408434 2540 4 la_oenb[79]
+port 2549 nsew
+rlabel metal2 s 153042 6858 153042 6858 4 la_oenb[7]
+port 2550 nsew
+rlabel metal2 s 248745 19788 248745 19788 4 la_oenb[80]
+port 2551 nsew
+rlabel metal2 s 249366 18683 249366 18683 4 la_oenb[81]
+port 2552 nsew
+rlabel metal2 s 249895 19788 249895 19788 4 la_oenb[82]
+port 2553 nsew
+rlabel metal2 s 250378 18717 250378 18717 4 la_oenb[83]
+port 2554 nsew
+rlabel metal2 s 250953 19788 250953 19788 4 la_oenb[84]
+port 2555 nsew
+rlabel metal2 s 258290 17238 258290 17238 4 la_oenb[85]
+port 2556 nsew
+rlabel metal2 s 252057 19788 252057 19788 4 la_oenb[86]
+port 2557 nsew
+rlabel metal2 s 252586 18683 252586 18683 4 la_oenb[87]
+port 2558 nsew
+rlabel metal2 s 253161 19788 253161 19788 4 la_oenb[88]
+port 2559 nsew
+rlabel metal2 s 253782 18496 253782 18496 4 la_oenb[89]
+port 2560 nsew
+rlabel metal2 s 156630 3934 156630 3934 4 la_oenb[8]
+port 2561 nsew
+rlabel metal2 s 254265 19788 254265 19788 4 la_oenb[90]
+port 2562 nsew
+rlabel metal2 s 254886 18547 254886 18547 4 la_oenb[91]
+port 2563 nsew
+rlabel metal2 s 255369 19788 255369 19788 4 la_oenb[92]
+port 2564 nsew
+rlabel metal2 s 255990 18700 255990 18700 4 la_oenb[93]
+port 2565 nsew
+rlabel metal2 s 256473 19788 256473 19788 4 la_oenb[94]
+port 2566 nsew
+rlabel metal2 s 257094 18513 257094 18513 4 la_oenb[95]
+port 2567 nsew
+rlabel metal2 s 257577 19788 257577 19788 4 la_oenb[96]
+port 2568 nsew
+rlabel metal2 s 258129 19788 258129 19788 4 la_oenb[97]
+port 2569 nsew
+rlabel metal2 s 258681 19788 258681 19788 4 la_oenb[98]
+port 2570 nsew
+rlabel metal2 s 259233 19788 259233 19788 4 la_oenb[99]
+port 2571 nsew
+rlabel metal2 s 160126 1911 160126 1911 4 la_oenb[9]
+port 2572 nsew
+rlabel metal2 s 278362 99892 278362 99892 4 rstn_reg
+port 2573 nsew
+rlabel metal2 s 274942 18768 274942 18768 4 user_irq[0]
+port 2574 nsew
+rlabel metal2 s 275057 19788 275057 19788 4 user_irq[1]
+port 2575 nsew
+rlabel metal2 s 275586 18768 275586 18768 4 user_irq[2]
+port 2576 nsew
+rlabel metal2 s 598 1622 598 1622 4 wb_clk_i
+port 2577 nsew
+rlabel metal2 s 1557 340 1557 340 4 wb_rst_i
+port 2578 nsew
+rlabel metal2 s 2898 2574 2898 2574 4 wbs_ack_o
+port 2579 nsew
+rlabel metal2 s 7682 2608 7682 2608 4 wbs_adr_i[0]
+port 2580 nsew
+rlabel metal2 s 47886 2676 47886 2676 4 wbs_adr_i[10]
+port 2581 nsew
+rlabel metal2 s 51382 2710 51382 2710 4 wbs_adr_i[11]
+port 2582 nsew
+rlabel metal2 s 54970 3390 54970 3390 4 wbs_adr_i[12]
+port 2583 nsew
+rlabel metal2 s 58466 3424 58466 3424 4 wbs_adr_i[13]
+port 2584 nsew
+rlabel metal2 s 62054 4138 62054 4138 4 wbs_adr_i[14]
+port 2585 nsew
+rlabel metal2 s 65550 2744 65550 2744 4 wbs_adr_i[15]
+port 2586 nsew
+rlabel metal2 s 69138 4172 69138 4172 4 wbs_adr_i[16]
+port 2587 nsew
+rlabel metal2 s 72634 2812 72634 2812 4 wbs_adr_i[17]
+port 2588 nsew
+rlabel metal2 s 76222 4682 76222 4682 4 wbs_adr_i[18]
+port 2589 nsew
+rlabel metal2 s 79718 4716 79718 4716 4 wbs_adr_i[19]
+port 2590 nsew
+rlabel metal2 s 12374 3288 12374 3288 4 wbs_adr_i[1]
+port 2591 nsew
+rlabel metal2 s 83306 4750 83306 4750 4 wbs_adr_i[20]
+port 2592 nsew
+rlabel metal2 s 86894 4784 86894 4784 4 wbs_adr_i[21]
+port 2593 nsew
+rlabel metal2 s 90390 4818 90390 4818 4 wbs_adr_i[22]
+port 2594 nsew
+rlabel metal2 s 93978 4852 93978 4852 4 wbs_adr_i[23]
+port 2595 nsew
+rlabel metal2 s 97474 4886 97474 4886 4 wbs_adr_i[24]
+port 2596 nsew
+rlabel metal2 s 101062 4920 101062 4920 4 wbs_adr_i[25]
+port 2597 nsew
+rlabel metal2 s 104558 4954 104558 4954 4 wbs_adr_i[26]
+port 2598 nsew
+rlabel metal2 s 108146 2880 108146 2880 4 wbs_adr_i[27]
+port 2599 nsew
+rlabel metal2 s 111642 4988 111642 4988 4 wbs_adr_i[28]
+port 2600 nsew
+rlabel metal2 s 115230 4206 115230 4206 4 wbs_adr_i[29]
+port 2601 nsew
+rlabel metal2 s 17066 3356 17066 3356 4 wbs_adr_i[2]
+port 2602 nsew
+rlabel metal2 s 118818 3526 118818 3526 4 wbs_adr_i[30]
+port 2603 nsew
+rlabel metal2 s 122314 4614 122314 4614 4 wbs_adr_i[31]
+port 2604 nsew
+rlabel metal2 s 21850 3798 21850 3798 4 wbs_adr_i[3]
+port 2605 nsew
+rlabel metal2 s 26542 4036 26542 4036 4 wbs_adr_i[4]
+port 2606 nsew
+rlabel metal2 s 30130 2642 30130 2642 4 wbs_adr_i[5]
+port 2607 nsew
+rlabel metal2 s 33626 4070 33626 4070 4 wbs_adr_i[6]
+port 2608 nsew
+rlabel metal2 s 37214 1248 37214 1248 4 wbs_adr_i[7]
+port 2609 nsew
+rlabel metal2 s 40473 340 40473 340 4 wbs_adr_i[8]
+port 2610 nsew
+rlabel metal2 s 44298 5396 44298 5396 4 wbs_adr_i[9]
+port 2611 nsew
+rlabel metal2 s 4094 3968 4094 3968 4 wbs_cyc_i
+port 2612 nsew
+rlabel metal2 s 186001 19788 186001 19788 4 wbs_dat_i[0]
+port 2613 nsew
+rlabel metal2 s 48753 340 48753 340 4 wbs_dat_i[10]
+port 2614 nsew
+rlabel metal2 s 52578 5464 52578 5464 4 wbs_dat_i[11]
+port 2615 nsew
+rlabel metal2 s 56074 5498 56074 5498 4 wbs_dat_i[12]
+port 2616 nsew
+rlabel metal2 s 59517 340 59517 340 4 wbs_dat_i[13]
+port 2617 nsew
+rlabel metal2 s 63250 5566 63250 5566 4 wbs_dat_i[14]
+port 2618 nsew
+rlabel metal2 s 66746 5600 66746 5600 4 wbs_dat_i[15]
+port 2619 nsew
+rlabel metal2 s 70097 340 70097 340 4 wbs_dat_i[16]
+port 2620 nsew
+rlabel metal2 s 73593 340 73593 340 4 wbs_dat_i[17]
+port 2621 nsew
+rlabel metal2 s 77418 1452 77418 1452 4 wbs_dat_i[18]
+port 2622 nsew
+rlabel metal2 s 80914 1486 80914 1486 4 wbs_dat_i[19]
+port 2623 nsew
+rlabel metal2 s 13570 3322 13570 3322 4 wbs_dat_i[1]
+port 2624 nsew
+rlabel metal2 s 84357 340 84357 340 4 wbs_dat_i[20]
+port 2625 nsew
+rlabel metal2 s 87998 1520 87998 1520 4 wbs_dat_i[21]
+port 2626 nsew
+rlabel metal2 s 91586 1554 91586 1554 4 wbs_dat_i[22]
+port 2627 nsew
+rlabel metal2 s 95174 2846 95174 2846 4 wbs_dat_i[23]
+port 2628 nsew
+rlabel metal2 s 98433 340 98433 340 4 wbs_dat_i[24]
+port 2629 nsew
+rlabel metal2 s 102258 6280 102258 6280 4 wbs_dat_i[25]
+port 2630 nsew
+rlabel metal2 s 105754 6314 105754 6314 4 wbs_dat_i[26]
+port 2631 nsew
+rlabel metal2 s 109197 340 109197 340 4 wbs_dat_i[27]
+port 2632 nsew
+rlabel metal2 s 112601 340 112601 340 4 wbs_dat_i[28]
+port 2633 nsew
+rlabel metal2 s 116426 6008 116426 6008 4 wbs_dat_i[29]
+port 2634 nsew
+rlabel metal2 s 18117 340 18117 340 4 wbs_dat_i[2]
+port 2635 nsew
+rlabel metal2 s 119922 1758 119922 1758 4 wbs_dat_i[30]
+port 2636 nsew
+rlabel metal2 s 123273 340 123273 340 4 wbs_dat_i[31]
+port 2637 nsew
+rlabel metal2 s 22809 340 22809 340 4 wbs_dat_i[3]
+port 2638 nsew
+rlabel metal2 s 27738 6110 27738 6110 4 wbs_dat_i[4]
+port 2639 nsew
+rlabel metal2 s 31089 340 31089 340 4 wbs_dat_i[5]
+port 2640 nsew
+rlabel metal2 s 34822 1214 34822 1214 4 wbs_dat_i[6]
+port 2641 nsew
+rlabel metal2 s 38410 1282 38410 1282 4 wbs_dat_i[7]
+port 2642 nsew
+rlabel metal2 s 41906 6178 41906 6178 4 wbs_dat_i[8]
+port 2643 nsew
+rlabel metal2 s 45494 1316 45494 1316 4 wbs_dat_i[9]
+port 2644 nsew
+rlabel metal2 s 9982 1928 9982 1928 4 wbs_dat_o[0]
+port 2645 nsew
+rlabel metal2 s 50186 1350 50186 1350 4 wbs_dat_o[10]
+port 2646 nsew
+rlabel metal2 s 53774 4104 53774 4104 4 wbs_dat_o[11]
+port 2647 nsew
+rlabel metal2 s 57270 1384 57270 1384 4 wbs_dat_o[12]
+port 2648 nsew
+rlabel metal2 s 60858 3458 60858 3458 4 wbs_dat_o[13]
+port 2649 nsew
+rlabel metal2 s 64354 2778 64354 2778 4 wbs_dat_o[14]
+port 2650 nsew
+rlabel metal2 s 82202 7038 82202 7038 4 wbs_dat_o[15]
+port 2651 nsew
+rlabel metal2 s 71530 6212 71530 6212 4 wbs_dat_o[16]
+port 2652 nsew
+rlabel metal2 s 75026 1418 75026 1418 4 wbs_dat_o[17]
+port 2653 nsew
+rlabel metal2 s 78614 1860 78614 1860 4 wbs_dat_o[18]
+port 2654 nsew
+rlabel metal2 s 82110 3186 82110 3186 4 wbs_dat_o[19]
+port 2655 nsew
+rlabel metal2 s 141450 8364 141450 8364 4 wbs_dat_o[1]
+port 2656 nsew
+rlabel metal2 s 140346 11560 140346 11560 4 wbs_dat_o[20]
+port 2657 nsew
+rlabel metal2 s 141634 8976 141634 8976 4 wbs_dat_o[21]
+port 2658 nsew
+rlabel metal2 s 138690 11152 138690 11152 4 wbs_dat_o[22]
+port 2659 nsew
+rlabel metal2 s 96278 1792 96278 1792 4 wbs_dat_o[23]
+port 2660 nsew
+rlabel metal2 s 99866 3934 99866 3934 4 wbs_dat_o[24]
+port 2661 nsew
+rlabel metal2 s 103362 2132 103362 2132 4 wbs_dat_o[25]
+port 2662 nsew
+rlabel metal2 s 137310 11730 137310 11730 4 wbs_dat_o[26]
+port 2663 nsew
+rlabel metal2 s 198122 7412 198122 7412 4 wbs_dat_o[27]
+port 2664 nsew
+rlabel metal2 s 114034 2540 114034 2540 4 wbs_dat_o[28]
+port 2665 nsew
+rlabel metal2 s 117622 2200 117622 2200 4 wbs_dat_o[29]
+port 2666 nsew
+rlabel metal2 s 19458 3492 19458 3492 4 wbs_dat_o[2]
+port 2667 nsew
+rlabel metal2 s 121118 2234 121118 2234 4 wbs_dat_o[30]
+port 2668 nsew
+rlabel metal2 s 124706 4580 124706 4580 4 wbs_dat_o[31]
+port 2669 nsew
+rlabel metal2 s 24242 2098 24242 2098 4 wbs_dat_o[3]
+port 2670 nsew
+rlabel metal2 s 28743 340 28743 340 4 wbs_dat_o[4]
+port 2671 nsew
+rlabel metal2 s 32430 1962 32430 1962 4 wbs_dat_o[5]
+port 2672 nsew
+rlabel metal2 s 36018 4750 36018 4750 4 wbs_dat_o[6]
+port 2673 nsew
+rlabel metal2 s 39606 1996 39606 1996 4 wbs_dat_o[7]
+port 2674 nsew
+rlabel metal2 s 42957 340 42957 340 4 wbs_dat_o[8]
+port 2675 nsew
+rlabel metal2 s 46690 2030 46690 2030 4 wbs_dat_o[9]
+port 2676 nsew
+rlabel metal2 s 11178 7402 11178 7402 4 wbs_sel_i[0]
+port 2677 nsew
+rlabel metal2 s 15962 1894 15962 1894 4 wbs_sel_i[1]
+port 2678 nsew
+rlabel metal2 s 20417 340 20417 340 4 wbs_sel_i[2]
+port 2679 nsew
+rlabel metal2 s 25346 1928 25346 1928 4 wbs_sel_i[3]
+port 2680 nsew
+rlabel metal2 s 5290 2098 5290 2098 4 wbs_stb_i
+port 2681 nsew
+rlabel metal2 s 6486 1843 6486 1843 4 wbs_we_i
+port 2682 nsew
+flabel metal3 s 583520 285276 584960 285516 0 FreeSans 1200 0 0 0 analog_io[0]
+port 2683 nsew
+flabel metal2 s 446098 703520 446210 704960 0 FreeSans 560 90 0 0 analog_io[10]
+port 2684 nsew
+flabel metal2 s 381146 703520 381258 704960 0 FreeSans 560 90 0 0 analog_io[11]
+port 2685 nsew
+flabel metal2 s 316286 703520 316398 704960 0 FreeSans 560 90 0 0 analog_io[12]
+port 2686 nsew
+flabel metal2 s 251426 703520 251538 704960 0 FreeSans 560 90 0 0 analog_io[13]
+port 2687 nsew
+flabel metal2 s 186474 703520 186586 704960 0 FreeSans 560 90 0 0 analog_io[14]
+port 2688 nsew
+flabel metal2 s 121614 703520 121726 704960 0 FreeSans 560 90 0 0 analog_io[15]
+port 2689 nsew
+flabel metal2 s 56754 703520 56866 704960 0 FreeSans 560 90 0 0 analog_io[16]
+port 2690 nsew
+flabel metal3 s -960 697220 480 697460 0 FreeSans 1200 0 0 0 analog_io[17]
+port 2691 nsew
+flabel metal3 s -960 644996 480 645236 0 FreeSans 1200 0 0 0 analog_io[18]
+port 2692 nsew
+flabel metal3 s -960 592908 480 593148 0 FreeSans 1200 0 0 0 analog_io[19]
+port 2693 nsew
+flabel metal3 s 583520 338452 584960 338692 0 FreeSans 1200 0 0 0 analog_io[1]
+port 2694 nsew
+flabel metal3 s -960 540684 480 540924 0 FreeSans 1200 0 0 0 analog_io[20]
+port 2695 nsew
+flabel metal3 s -960 488596 480 488836 0 FreeSans 1200 0 0 0 analog_io[21]
+port 2696 nsew
+flabel metal3 s -960 436508 480 436748 0 FreeSans 1200 0 0 0 analog_io[22]
+port 2697 nsew
+flabel metal3 s -960 384284 480 384524 0 FreeSans 1200 0 0 0 analog_io[23]
+port 2698 nsew
+flabel metal3 s -960 332196 480 332436 0 FreeSans 1200 0 0 0 analog_io[24]
+port 2699 nsew
+flabel metal3 s -960 279972 480 280212 0 FreeSans 1200 0 0 0 analog_io[25]
+port 2700 nsew
+flabel metal3 s -960 227884 480 228124 0 FreeSans 1200 0 0 0 analog_io[26]
+port 2701 nsew
+flabel metal3 s -960 175796 480 176036 0 FreeSans 1200 0 0 0 analog_io[27]
+port 2702 nsew
+flabel metal3 s -960 123572 480 123812 0 FreeSans 1200 0 0 0 analog_io[28]
+port 2703 nsew
+flabel metal3 s 583520 391628 584960 391868 0 FreeSans 1200 0 0 0 analog_io[2]
+port 2704 nsew
+flabel metal3 s 583520 444668 584960 444908 0 FreeSans 1200 0 0 0 analog_io[3]
+port 2705 nsew
+flabel metal3 s 583520 497844 584960 498084 0 FreeSans 1200 0 0 0 analog_io[4]
+port 2706 nsew
+flabel metal3 s 583520 551020 584960 551260 0 FreeSans 1200 0 0 0 analog_io[5]
+port 2707 nsew
+flabel metal3 s 583520 604060 584960 604300 0 FreeSans 1200 0 0 0 analog_io[6]
+port 2708 nsew
+flabel metal3 s 583520 657236 584960 657476 0 FreeSans 1200 0 0 0 analog_io[7]
+port 2709 nsew
+flabel metal2 s 575818 703520 575930 704960 0 FreeSans 560 90 0 0 analog_io[8]
+port 2710 nsew
+flabel metal2 s 510958 703520 511070 704960 0 FreeSans 560 90 0 0 analog_io[9]
+port 2711 nsew
+flabel metal3 s 583520 6476 584960 6716 0 FreeSans 1200 0 0 0 io_in[0]
+port 2075 nsew
+flabel metal3 s 583520 457996 584960 458236 0 FreeSans 1200 0 0 0 io_in[10]
+port 2076 nsew
+flabel metal3 s 583520 511172 584960 511412 0 FreeSans 1200 0 0 0 io_in[11]
+port 2077 nsew
+flabel metal3 s 583520 564212 584960 564452 0 FreeSans 1200 0 0 0 io_in[12]
+port 2078 nsew
+flabel metal3 s 583520 617388 584960 617628 0 FreeSans 1200 0 0 0 io_in[13]
+port 2079 nsew
+flabel metal3 s 583520 670564 584960 670804 0 FreeSans 1200 0 0 0 io_in[14]
+port 2080 nsew
+flabel metal2 s 559626 703520 559738 704960 0 FreeSans 560 90 0 0 io_in[15]
+port 2081 nsew
+flabel metal2 s 494766 703520 494878 704960 0 FreeSans 560 90 0 0 io_in[16]
+port 2082 nsew
+flabel metal2 s 429814 703520 429926 704960 0 FreeSans 560 90 0 0 io_in[17]
+port 2083 nsew
+flabel metal2 s 364954 703520 365066 704960 0 FreeSans 560 90 0 0 io_in[18]
+port 2084 nsew
+flabel metal2 s 300094 703520 300206 704960 0 FreeSans 560 90 0 0 io_in[19]
+port 2085 nsew
+flabel metal3 s 583520 46188 584960 46428 0 FreeSans 1200 0 0 0 io_in[1]
+port 2086 nsew
+flabel metal2 s 235142 703520 235254 704960 0 FreeSans 560 90 0 0 io_in[20]
+port 2087 nsew
+flabel metal2 s 170282 703520 170394 704960 0 FreeSans 560 90 0 0 io_in[21]
+port 2088 nsew
+flabel metal2 s 105422 703520 105534 704960 0 FreeSans 560 90 0 0 io_in[22]
+port 2089 nsew
+flabel metal2 s 40470 703520 40582 704960 0 FreeSans 560 90 0 0 io_in[23]
+port 2090 nsew
+flabel metal3 s -960 684164 480 684404 0 FreeSans 1200 0 0 0 io_in[24]
+port 2091 nsew
+flabel metal3 s -960 631940 480 632180 0 FreeSans 1200 0 0 0 io_in[25]
+port 2092 nsew
+flabel metal3 s -960 579852 480 580092 0 FreeSans 1200 0 0 0 io_in[26]
+port 2093 nsew
+flabel metal3 s -960 527764 480 528004 0 FreeSans 1200 0 0 0 io_in[27]
+port 2094 nsew
+flabel metal3 s -960 475540 480 475780 0 FreeSans 1200 0 0 0 io_in[28]
+port 2095 nsew
+flabel metal3 s -960 423452 480 423692 0 FreeSans 1200 0 0 0 io_in[29]
+port 2096 nsew
+flabel metal3 s 583520 86036 584960 86276 0 FreeSans 1200 0 0 0 io_in[2]
+port 2097 nsew
+flabel metal3 s -960 371228 480 371468 0 FreeSans 1200 0 0 0 io_in[30]
+port 2098 nsew
+flabel metal3 s -960 319140 480 319380 0 FreeSans 1200 0 0 0 io_in[31]
+port 2099 nsew
+flabel metal3 s -960 267052 480 267292 0 FreeSans 1200 0 0 0 io_in[32]
+port 2100 nsew
+flabel metal3 s -960 214828 480 215068 0 FreeSans 1200 0 0 0 io_in[33]
+port 2101 nsew
+flabel metal3 s -960 162740 480 162980 0 FreeSans 1200 0 0 0 io_in[34]
+port 2102 nsew
+flabel metal3 s -960 110516 480 110756 0 FreeSans 1200 0 0 0 io_in[35]
+port 2103 nsew
+flabel metal3 s -960 71484 480 71724 0 FreeSans 1200 0 0 0 io_in[36]
+port 2104 nsew
+flabel metal3 s -960 32316 480 32556 0 FreeSans 1200 0 0 0 io_in[37]
+port 2105 nsew
+flabel metal3 s 583520 125884 584960 126124 0 FreeSans 1200 0 0 0 io_in[3]
+port 2106 nsew
+flabel metal3 s 583520 165732 584960 165972 0 FreeSans 1200 0 0 0 io_in[4]
+port 2107 nsew
+flabel metal3 s 583520 205580 584960 205820 0 FreeSans 1200 0 0 0 io_in[5]
+port 2108 nsew
+flabel metal3 s 583520 245428 584960 245668 0 FreeSans 1200 0 0 0 io_in[6]
+port 2109 nsew
+flabel metal3 s 583520 298604 584960 298844 0 FreeSans 1200 0 0 0 io_in[7]
+port 2110 nsew
+flabel metal3 s 583520 351780 584960 352020 0 FreeSans 1200 0 0 0 io_in[8]
+port 2111 nsew
+flabel metal3 s 583520 404820 584960 405060 0 FreeSans 1200 0 0 0 io_in[9]
+port 2112 nsew
+flabel metal3 s 583520 32996 584960 33236 0 FreeSans 1200 0 0 0 io_oeb[0]
+port 2113 nsew
+flabel metal3 s 583520 484516 584960 484756 0 FreeSans 1200 0 0 0 io_oeb[10]
+port 2114 nsew
+flabel metal3 s 583520 537692 584960 537932 0 FreeSans 1200 0 0 0 io_oeb[11]
+port 2115 nsew
+flabel metal3 s 583520 590868 584960 591108 0 FreeSans 1200 0 0 0 io_oeb[12]
+port 2116 nsew
+flabel metal3 s 583520 643908 584960 644148 0 FreeSans 1200 0 0 0 io_oeb[13]
+port 2117 nsew
+flabel metal3 s 583520 697084 584960 697324 0 FreeSans 1200 0 0 0 io_oeb[14]
+port 2118 nsew
+flabel metal2 s 527150 703520 527262 704960 0 FreeSans 560 90 0 0 io_oeb[15]
+port 2119 nsew
+flabel metal2 s 462290 703520 462402 704960 0 FreeSans 560 90 0 0 io_oeb[16]
+port 2120 nsew
+flabel metal2 s 397430 703520 397542 704960 0 FreeSans 560 90 0 0 io_oeb[17]
+port 2121 nsew
+flabel metal2 s 332478 703520 332590 704960 0 FreeSans 560 90 0 0 io_oeb[18]
+port 2122 nsew
+flabel metal2 s 267618 703520 267730 704960 0 FreeSans 560 90 0 0 io_oeb[19]
+port 2123 nsew
+flabel metal3 s 583520 72844 584960 73084 0 FreeSans 1200 0 0 0 io_oeb[1]
+port 2124 nsew
+flabel metal2 s 202758 703520 202870 704960 0 FreeSans 560 90 0 0 io_oeb[20]
+port 2125 nsew
+flabel metal2 s 137806 703520 137918 704960 0 FreeSans 560 90 0 0 io_oeb[21]
+port 2126 nsew
+flabel metal2 s 72946 703520 73058 704960 0 FreeSans 560 90 0 0 io_oeb[22]
+port 2127 nsew
+flabel metal2 s 8086 703520 8198 704960 0 FreeSans 560 90 0 0 io_oeb[23]
+port 2128 nsew
+flabel metal3 s -960 658052 480 658292 0 FreeSans 1200 0 0 0 io_oeb[24]
+port 2129 nsew
+flabel metal3 s -960 605964 480 606204 0 FreeSans 1200 0 0 0 io_oeb[25]
+port 2130 nsew
+flabel metal3 s -960 553740 480 553980 0 FreeSans 1200 0 0 0 io_oeb[26]
+port 2131 nsew
+flabel metal3 s -960 501652 480 501892 0 FreeSans 1200 0 0 0 io_oeb[27]
+port 2132 nsew
+flabel metal3 s -960 449428 480 449668 0 FreeSans 1200 0 0 0 io_oeb[28]
+port 2133 nsew
+flabel metal3 s -960 397340 480 397580 0 FreeSans 1200 0 0 0 io_oeb[29]
+port 2134 nsew
+flabel metal3 s 583520 112692 584960 112932 0 FreeSans 1200 0 0 0 io_oeb[2]
+port 2135 nsew
+flabel metal3 s -960 345252 480 345492 0 FreeSans 1200 0 0 0 io_oeb[30]
+port 2136 nsew
+flabel metal3 s -960 293028 480 293268 0 FreeSans 1200 0 0 0 io_oeb[31]
+port 2137 nsew
+flabel metal3 s -960 240940 480 241180 0 FreeSans 1200 0 0 0 io_oeb[32]
+port 2138 nsew
+flabel metal3 s -960 188716 480 188956 0 FreeSans 1200 0 0 0 io_oeb[33]
+port 2139 nsew
+flabel metal3 s -960 136628 480 136868 0 FreeSans 1200 0 0 0 io_oeb[34]
+port 2140 nsew
+flabel metal3 s -960 84540 480 84780 0 FreeSans 1200 0 0 0 io_oeb[35]
+port 2141 nsew
+flabel metal3 s -960 45372 480 45612 0 FreeSans 1200 0 0 0 io_oeb[36]
+port 2142 nsew
+flabel metal3 s -960 6340 480 6580 0 FreeSans 1200 0 0 0 io_oeb[37]
+port 2143 nsew
+flabel metal3 s 583520 152540 584960 152780 0 FreeSans 1200 0 0 0 io_oeb[3]
+port 2144 nsew
+flabel metal3 s 583520 192388 584960 192628 0 FreeSans 1200 0 0 0 io_oeb[4]
+port 2145 nsew
+flabel metal3 s 583520 232236 584960 232476 0 FreeSans 1200 0 0 0 io_oeb[5]
+port 2146 nsew
+flabel metal3 s 583520 272084 584960 272324 0 FreeSans 1200 0 0 0 io_oeb[6]
+port 2147 nsew
+flabel metal3 s 583520 325124 584960 325364 0 FreeSans 1200 0 0 0 io_oeb[7]
+port 2148 nsew
+flabel metal3 s 583520 378300 584960 378540 0 FreeSans 1200 0 0 0 io_oeb[8]
+port 2149 nsew
+flabel metal3 s 583520 431476 584960 431716 0 FreeSans 1200 0 0 0 io_oeb[9]
+port 2150 nsew
+flabel metal3 s 583520 19668 584960 19908 0 FreeSans 1200 0 0 0 io_out[0]
+port 2151 nsew
+flabel metal3 s 583520 471324 584960 471564 0 FreeSans 1200 0 0 0 io_out[10]
+port 2152 nsew
+flabel metal3 s 583520 524364 584960 524604 0 FreeSans 1200 0 0 0 io_out[11]
+port 2153 nsew
+flabel metal3 s 583520 577540 584960 577780 0 FreeSans 1200 0 0 0 io_out[12]
+port 2154 nsew
+flabel metal3 s 583520 630716 584960 630956 0 FreeSans 1200 0 0 0 io_out[13]
+port 2155 nsew
+flabel metal3 s 583520 683756 584960 683996 0 FreeSans 1200 0 0 0 io_out[14]
+port 2156 nsew
+flabel metal2 s 543434 703520 543546 704960 0 FreeSans 560 90 0 0 io_out[15]
+port 2157 nsew
+flabel metal2 s 478482 703520 478594 704960 0 FreeSans 560 90 0 0 io_out[16]
+port 2158 nsew
+flabel metal2 s 413622 703520 413734 704960 0 FreeSans 560 90 0 0 io_out[17]
+port 2159 nsew
+flabel metal2 s 348762 703520 348874 704960 0 FreeSans 560 90 0 0 io_out[18]
+port 2160 nsew
+flabel metal2 s 283810 703520 283922 704960 0 FreeSans 560 90 0 0 io_out[19]
+port 2161 nsew
+flabel metal3 s 583520 59516 584960 59756 0 FreeSans 1200 0 0 0 io_out[1]
+port 2162 nsew
+flabel metal2 s 218950 703520 219062 704960 0 FreeSans 560 90 0 0 io_out[20]
+port 2163 nsew
+flabel metal2 s 154090 703520 154202 704960 0 FreeSans 560 90 0 0 io_out[21]
+port 2164 nsew
+flabel metal2 s 89138 703520 89250 704960 0 FreeSans 560 90 0 0 io_out[22]
+port 2165 nsew
+flabel metal2 s 24278 703520 24390 704960 0 FreeSans 560 90 0 0 io_out[23]
+port 2166 nsew
+flabel metal3 s -960 671108 480 671348 0 FreeSans 1200 0 0 0 io_out[24]
+port 2167 nsew
+flabel metal3 s -960 619020 480 619260 0 FreeSans 1200 0 0 0 io_out[25]
+port 2168 nsew
+flabel metal3 s -960 566796 480 567036 0 FreeSans 1200 0 0 0 io_out[26]
+port 2169 nsew
+flabel metal3 s -960 514708 480 514948 0 FreeSans 1200 0 0 0 io_out[27]
+port 2170 nsew
+flabel metal3 s -960 462484 480 462724 0 FreeSans 1200 0 0 0 io_out[28]
+port 2171 nsew
+flabel metal3 s -960 410396 480 410636 0 FreeSans 1200 0 0 0 io_out[29]
+port 2172 nsew
+flabel metal3 s 583520 99364 584960 99604 0 FreeSans 1200 0 0 0 io_out[2]
+port 2173 nsew
+flabel metal3 s -960 358308 480 358548 0 FreeSans 1200 0 0 0 io_out[30]
+port 2174 nsew
+flabel metal3 s -960 306084 480 306324 0 FreeSans 1200 0 0 0 io_out[31]
+port 2175 nsew
+flabel metal3 s -960 253996 480 254236 0 FreeSans 1200 0 0 0 io_out[32]
+port 2176 nsew
+flabel metal3 s -960 201772 480 202012 0 FreeSans 1200 0 0 0 io_out[33]
+port 2177 nsew
+flabel metal3 s -960 149684 480 149924 0 FreeSans 1200 0 0 0 io_out[34]
+port 2178 nsew
+flabel metal3 s -960 97460 480 97700 0 FreeSans 1200 0 0 0 io_out[35]
+port 2179 nsew
+flabel metal3 s -960 58428 480 58668 0 FreeSans 1200 0 0 0 io_out[36]
+port 2180 nsew
+flabel metal3 s -960 19260 480 19500 0 FreeSans 1200 0 0 0 io_out[37]
+port 2181 nsew
+flabel metal3 s 583520 139212 584960 139452 0 FreeSans 1200 0 0 0 io_out[3]
+port 2182 nsew
+flabel metal3 s 583520 179060 584960 179300 0 FreeSans 1200 0 0 0 io_out[4]
+port 2183 nsew
+flabel metal3 s 583520 218908 584960 219148 0 FreeSans 1200 0 0 0 io_out[5]
+port 2184 nsew
+flabel metal3 s 583520 258756 584960 258996 0 FreeSans 1200 0 0 0 io_out[6]
+port 2185 nsew
+flabel metal3 s 583520 311932 584960 312172 0 FreeSans 1200 0 0 0 io_out[7]
+port 2186 nsew
+flabel metal3 s 583520 364972 584960 365212 0 FreeSans 1200 0 0 0 io_out[8]
+port 2187 nsew
+flabel metal3 s 583520 418148 584960 418388 0 FreeSans 1200 0 0 0 io_out[9]
+port 2188 nsew
+flabel metal2 s 125846 -960 125958 480 0 FreeSans 560 90 0 0 la_data_in[0]
+port 2189 nsew
+flabel metal2 s 480506 -960 480618 480 0 FreeSans 560 90 0 0 la_data_in[100]
+port 2190 nsew
+flabel metal2 s 484002 -960 484114 480 0 FreeSans 560 90 0 0 la_data_in[101]
+port 2191 nsew
+flabel metal2 s 487590 -960 487702 480 0 FreeSans 560 90 0 0 la_data_in[102]
+port 2192 nsew
+flabel metal2 s 491086 -960 491198 480 0 FreeSans 560 90 0 0 la_data_in[103]
+port 2193 nsew
+flabel metal2 s 494674 -960 494786 480 0 FreeSans 560 90 0 0 la_data_in[104]
+port 2194 nsew
+flabel metal2 s 498170 -960 498282 480 0 FreeSans 560 90 0 0 la_data_in[105]
+port 2195 nsew
+flabel metal2 s 501758 -960 501870 480 0 FreeSans 560 90 0 0 la_data_in[106]
+port 2196 nsew
+flabel metal2 s 505346 -960 505458 480 0 FreeSans 560 90 0 0 la_data_in[107]
+port 2197 nsew
+flabel metal2 s 508842 -960 508954 480 0 FreeSans 560 90 0 0 la_data_in[108]
+port 2198 nsew
+flabel metal2 s 512430 -960 512542 480 0 FreeSans 560 90 0 0 la_data_in[109]
+port 2199 nsew
+flabel metal2 s 161266 -960 161378 480 0 FreeSans 560 90 0 0 la_data_in[10]
+port 2200 nsew
+flabel metal2 s 515926 -960 516038 480 0 FreeSans 560 90 0 0 la_data_in[110]
+port 2201 nsew
+flabel metal2 s 519514 -960 519626 480 0 FreeSans 560 90 0 0 la_data_in[111]
+port 2202 nsew
+flabel metal2 s 523010 -960 523122 480 0 FreeSans 560 90 0 0 la_data_in[112]
+port 2203 nsew
+flabel metal2 s 526598 -960 526710 480 0 FreeSans 560 90 0 0 la_data_in[113]
+port 2204 nsew
+flabel metal2 s 530094 -960 530206 480 0 FreeSans 560 90 0 0 la_data_in[114]
+port 2205 nsew
+flabel metal2 s 533682 -960 533794 480 0 FreeSans 560 90 0 0 la_data_in[115]
+port 2206 nsew
+flabel metal2 s 537178 -960 537290 480 0 FreeSans 560 90 0 0 la_data_in[116]
+port 2207 nsew
+flabel metal2 s 540766 -960 540878 480 0 FreeSans 560 90 0 0 la_data_in[117]
+port 2208 nsew
+flabel metal2 s 544354 -960 544466 480 0 FreeSans 560 90 0 0 la_data_in[118]
+port 2209 nsew
+flabel metal2 s 547850 -960 547962 480 0 FreeSans 560 90 0 0 la_data_in[119]
+port 2210 nsew
+flabel metal2 s 164854 -960 164966 480 0 FreeSans 560 90 0 0 la_data_in[11]
+port 2211 nsew
+flabel metal2 s 551438 -960 551550 480 0 FreeSans 560 90 0 0 la_data_in[120]
+port 2212 nsew
+flabel metal2 s 554934 -960 555046 480 0 FreeSans 560 90 0 0 la_data_in[121]
+port 2213 nsew
+flabel metal2 s 558522 -960 558634 480 0 FreeSans 560 90 0 0 la_data_in[122]
+port 2214 nsew
+flabel metal2 s 562018 -960 562130 480 0 FreeSans 560 90 0 0 la_data_in[123]
+port 2215 nsew
+flabel metal2 s 565606 -960 565718 480 0 FreeSans 560 90 0 0 la_data_in[124]
+port 2216 nsew
+flabel metal2 s 569102 -960 569214 480 0 FreeSans 560 90 0 0 la_data_in[125]
+port 2217 nsew
+flabel metal2 s 572690 -960 572802 480 0 FreeSans 560 90 0 0 la_data_in[126]
+port 2218 nsew
+flabel metal2 s 576278 -960 576390 480 0 FreeSans 560 90 0 0 la_data_in[127]
+port 2219 nsew
+flabel metal2 s 168350 -960 168462 480 0 FreeSans 560 90 0 0 la_data_in[12]
+port 2220 nsew
+flabel metal2 s 171938 -960 172050 480 0 FreeSans 560 90 0 0 la_data_in[13]
+port 2221 nsew
+flabel metal2 s 175434 -960 175546 480 0 FreeSans 560 90 0 0 la_data_in[14]
+port 2222 nsew
+flabel metal2 s 179022 -960 179134 480 0 FreeSans 560 90 0 0 la_data_in[15]
+port 2223 nsew
+flabel metal2 s 182518 -960 182630 480 0 FreeSans 560 90 0 0 la_data_in[16]
+port 2224 nsew
+flabel metal2 s 186106 -960 186218 480 0 FreeSans 560 90 0 0 la_data_in[17]
+port 2225 nsew
+flabel metal2 s 189694 -960 189806 480 0 FreeSans 560 90 0 0 la_data_in[18]
+port 2226 nsew
+flabel metal2 s 193190 -960 193302 480 0 FreeSans 560 90 0 0 la_data_in[19]
+port 2227 nsew
+flabel metal2 s 129342 -960 129454 480 0 FreeSans 560 90 0 0 la_data_in[1]
+port 2228 nsew
+flabel metal2 s 196778 -960 196890 480 0 FreeSans 560 90 0 0 la_data_in[20]
+port 2229 nsew
+flabel metal2 s 200274 -960 200386 480 0 FreeSans 560 90 0 0 la_data_in[21]
+port 2230 nsew
+flabel metal2 s 203862 -960 203974 480 0 FreeSans 560 90 0 0 la_data_in[22]
+port 2231 nsew
+flabel metal2 s 207358 -960 207470 480 0 FreeSans 560 90 0 0 la_data_in[23]
+port 2232 nsew
+flabel metal2 s 210946 -960 211058 480 0 FreeSans 560 90 0 0 la_data_in[24]
+port 2233 nsew
+flabel metal2 s 214442 -960 214554 480 0 FreeSans 560 90 0 0 la_data_in[25]
+port 2234 nsew
+flabel metal2 s 218030 -960 218142 480 0 FreeSans 560 90 0 0 la_data_in[26]
+port 2235 nsew
+flabel metal2 s 221526 -960 221638 480 0 FreeSans 560 90 0 0 la_data_in[27]
+port 2236 nsew
+flabel metal2 s 225114 -960 225226 480 0 FreeSans 560 90 0 0 la_data_in[28]
+port 2237 nsew
+flabel metal2 s 228702 -960 228814 480 0 FreeSans 560 90 0 0 la_data_in[29]
+port 2238 nsew
+flabel metal2 s 132930 -960 133042 480 0 FreeSans 560 90 0 0 la_data_in[2]
+port 2239 nsew
+flabel metal2 s 232198 -960 232310 480 0 FreeSans 560 90 0 0 la_data_in[30]
+port 2240 nsew
+flabel metal2 s 235786 -960 235898 480 0 FreeSans 560 90 0 0 la_data_in[31]
+port 2241 nsew
+flabel metal2 s 239282 -960 239394 480 0 FreeSans 560 90 0 0 la_data_in[32]
+port 2242 nsew
+flabel metal2 s 242870 -960 242982 480 0 FreeSans 560 90 0 0 la_data_in[33]
+port 2243 nsew
+flabel metal2 s 246366 -960 246478 480 0 FreeSans 560 90 0 0 la_data_in[34]
+port 2244 nsew
+flabel metal2 s 249954 -960 250066 480 0 FreeSans 560 90 0 0 la_data_in[35]
+port 2245 nsew
+flabel metal2 s 253450 -960 253562 480 0 FreeSans 560 90 0 0 la_data_in[36]
+port 2246 nsew
+flabel metal2 s 257038 -960 257150 480 0 FreeSans 560 90 0 0 la_data_in[37]
+port 2247 nsew
+flabel metal2 s 260626 -960 260738 480 0 FreeSans 560 90 0 0 la_data_in[38]
+port 2248 nsew
+flabel metal2 s 264122 -960 264234 480 0 FreeSans 560 90 0 0 la_data_in[39]
+port 2249 nsew
+flabel metal2 s 136426 -960 136538 480 0 FreeSans 560 90 0 0 la_data_in[3]
+port 2250 nsew
+flabel metal2 s 267710 -960 267822 480 0 FreeSans 560 90 0 0 la_data_in[40]
+port 2251 nsew
+flabel metal2 s 271206 -960 271318 480 0 FreeSans 560 90 0 0 la_data_in[41]
+port 2252 nsew
+flabel metal2 s 274794 -960 274906 480 0 FreeSans 560 90 0 0 la_data_in[42]
+port 2253 nsew
+flabel metal2 s 278290 -960 278402 480 0 FreeSans 560 90 0 0 la_data_in[43]
+port 2254 nsew
+flabel metal2 s 281878 -960 281990 480 0 FreeSans 560 90 0 0 la_data_in[44]
+port 2255 nsew
+flabel metal2 s 285374 -960 285486 480 0 FreeSans 560 90 0 0 la_data_in[45]
+port 2256 nsew
+flabel metal2 s 288962 -960 289074 480 0 FreeSans 560 90 0 0 la_data_in[46]
+port 2257 nsew
+flabel metal2 s 292550 -960 292662 480 0 FreeSans 560 90 0 0 la_data_in[47]
+port 2258 nsew
+flabel metal2 s 296046 -960 296158 480 0 FreeSans 560 90 0 0 la_data_in[48]
+port 2259 nsew
+flabel metal2 s 299634 -960 299746 480 0 FreeSans 560 90 0 0 la_data_in[49]
+port 2260 nsew
+flabel metal2 s 140014 -960 140126 480 0 FreeSans 560 90 0 0 la_data_in[4]
+port 2261 nsew
+flabel metal2 s 303130 -960 303242 480 0 FreeSans 560 90 0 0 la_data_in[50]
+port 2262 nsew
+flabel metal2 s 306718 -960 306830 480 0 FreeSans 560 90 0 0 la_data_in[51]
+port 2263 nsew
+flabel metal2 s 310214 -960 310326 480 0 FreeSans 560 90 0 0 la_data_in[52]
+port 2264 nsew
+flabel metal2 s 313802 -960 313914 480 0 FreeSans 560 90 0 0 la_data_in[53]
+port 2265 nsew
+flabel metal2 s 317298 -960 317410 480 0 FreeSans 560 90 0 0 la_data_in[54]
+port 2266 nsew
+flabel metal2 s 320886 -960 320998 480 0 FreeSans 560 90 0 0 la_data_in[55]
+port 2267 nsew
+flabel metal2 s 324382 -960 324494 480 0 FreeSans 560 90 0 0 la_data_in[56]
+port 2268 nsew
+flabel metal2 s 327970 -960 328082 480 0 FreeSans 560 90 0 0 la_data_in[57]
+port 2269 nsew
+flabel metal2 s 331558 -960 331670 480 0 FreeSans 560 90 0 0 la_data_in[58]
+port 2270 nsew
+flabel metal2 s 335054 -960 335166 480 0 FreeSans 560 90 0 0 la_data_in[59]
+port 2271 nsew
+flabel metal2 s 143510 -960 143622 480 0 FreeSans 560 90 0 0 la_data_in[5]
+port 2272 nsew
+flabel metal2 s 338642 -960 338754 480 0 FreeSans 560 90 0 0 la_data_in[60]
+port 2273 nsew
+flabel metal2 s 342138 -960 342250 480 0 FreeSans 560 90 0 0 la_data_in[61]
+port 2274 nsew
+flabel metal2 s 345726 -960 345838 480 0 FreeSans 560 90 0 0 la_data_in[62]
+port 2275 nsew
+flabel metal2 s 349278 -240 349278 -240 0 FreeSans 560 90 0 0 la_data_in[63]
+port 2276 nsew
+flabel metal2 s 352810 -960 352922 480 0 FreeSans 560 90 0 0 la_data_in[64]
+port 2277 nsew
+flabel metal2 s 356306 -960 356418 480 0 FreeSans 560 90 0 0 la_data_in[65]
+port 2278 nsew
+flabel metal2 s 359894 -960 360006 480 0 FreeSans 560 90 0 0 la_data_in[66]
+port 2279 nsew
+flabel metal2 s 363482 -960 363594 480 0 FreeSans 560 90 0 0 la_data_in[67]
+port 2280 nsew
+flabel metal2 s 366978 -960 367090 480 0 FreeSans 560 90 0 0 la_data_in[68]
+port 2281 nsew
+flabel metal2 s 370566 -960 370678 480 0 FreeSans 560 90 0 0 la_data_in[69]
+port 2282 nsew
+flabel metal2 s 147098 -960 147210 480 0 FreeSans 560 90 0 0 la_data_in[6]
+port 2283 nsew
+flabel metal2 s 374062 -960 374174 480 0 FreeSans 560 90 0 0 la_data_in[70]
+port 2284 nsew
+flabel metal2 s 377650 -960 377762 480 0 FreeSans 560 90 0 0 la_data_in[71]
+port 2285 nsew
+flabel metal2 s 381146 -960 381258 480 0 FreeSans 560 90 0 0 la_data_in[72]
+port 2286 nsew
+flabel metal2 s 384734 -960 384846 480 0 FreeSans 560 90 0 0 la_data_in[73]
+port 2287 nsew
+flabel metal2 s 388230 -960 388342 480 0 FreeSans 560 90 0 0 la_data_in[74]
+port 2288 nsew
+flabel metal2 s 391818 -960 391930 480 0 FreeSans 560 90 0 0 la_data_in[75]
+port 2289 nsew
+flabel metal2 s 395314 -960 395426 480 0 FreeSans 560 90 0 0 la_data_in[76]
+port 2290 nsew
+flabel metal2 s 398902 -960 399014 480 0 FreeSans 560 90 0 0 la_data_in[77]
+port 2291 nsew
+flabel metal2 s 402490 -960 402602 480 0 FreeSans 560 90 0 0 la_data_in[78]
+port 2292 nsew
+flabel metal2 s 405986 -960 406098 480 0 FreeSans 560 90 0 0 la_data_in[79]
+port 2293 nsew
+flabel metal2 s 150594 -960 150706 480 0 FreeSans 560 90 0 0 la_data_in[7]
+port 2294 nsew
+flabel metal2 s 409574 -960 409686 480 0 FreeSans 560 90 0 0 la_data_in[80]
+port 2295 nsew
+flabel metal2 s 413070 -960 413182 480 0 FreeSans 560 90 0 0 la_data_in[81]
+port 2296 nsew
+flabel metal2 s 416658 -960 416770 480 0 FreeSans 560 90 0 0 la_data_in[82]
+port 2297 nsew
+flabel metal2 s 420154 -960 420266 480 0 FreeSans 560 90 0 0 la_data_in[83]
+port 2298 nsew
+flabel metal2 s 423742 -960 423854 480 0 FreeSans 560 90 0 0 la_data_in[84]
+port 2299 nsew
+flabel metal2 s 427238 -960 427350 480 0 FreeSans 560 90 0 0 la_data_in[85]
+port 2300 nsew
+flabel metal2 s 430826 -960 430938 480 0 FreeSans 560 90 0 0 la_data_in[86]
+port 2301 nsew
+flabel metal2 s 434414 -960 434526 480 0 FreeSans 560 90 0 0 la_data_in[87]
+port 2302 nsew
+flabel metal2 s 437910 -960 438022 480 0 FreeSans 560 90 0 0 la_data_in[88]
+port 2303 nsew
+flabel metal2 s 441498 -960 441610 480 0 FreeSans 560 90 0 0 la_data_in[89]
+port 2304 nsew
+flabel metal2 s 154182 -960 154294 480 0 FreeSans 560 90 0 0 la_data_in[8]
+port 2305 nsew
+flabel metal2 s 444994 -960 445106 480 0 FreeSans 560 90 0 0 la_data_in[90]
+port 2306 nsew
+flabel metal2 s 448582 -960 448694 480 0 FreeSans 560 90 0 0 la_data_in[91]
+port 2307 nsew
+flabel metal2 s 452078 -960 452190 480 0 FreeSans 560 90 0 0 la_data_in[92]
+port 2308 nsew
+flabel metal2 s 455666 -960 455778 480 0 FreeSans 560 90 0 0 la_data_in[93]
+port 2309 nsew
+flabel metal2 s 459162 -960 459274 480 0 FreeSans 560 90 0 0 la_data_in[94]
+port 2310 nsew
+flabel metal2 s 462750 -960 462862 480 0 FreeSans 560 90 0 0 la_data_in[95]
+port 2311 nsew
+flabel metal2 s 466246 -960 466358 480 0 FreeSans 560 90 0 0 la_data_in[96]
+port 2312 nsew
+flabel metal2 s 469834 -960 469946 480 0 FreeSans 560 90 0 0 la_data_in[97]
+port 2313 nsew
+flabel metal2 s 473422 -960 473534 480 0 FreeSans 560 90 0 0 la_data_in[98]
+port 2314 nsew
+flabel metal2 s 476918 -960 477030 480 0 FreeSans 560 90 0 0 la_data_in[99]
+port 2315 nsew
+flabel metal2 s 157770 -960 157882 480 0 FreeSans 560 90 0 0 la_data_in[9]
+port 2316 nsew
+flabel metal2 s 126950 -960 127062 480 0 FreeSans 560 90 0 0 la_data_out[0]
+port 2317 nsew
+flabel metal2 s 481702 -960 481814 480 0 FreeSans 560 90 0 0 la_data_out[100]
+port 2318 nsew
+flabel metal2 s 485198 -960 485310 480 0 FreeSans 560 90 0 0 la_data_out[101]
+port 2319 nsew
+flabel metal2 s 488786 -960 488898 480 0 FreeSans 560 90 0 0 la_data_out[102]
+port 2320 nsew
+flabel metal2 s 492282 -960 492394 480 0 FreeSans 560 90 0 0 la_data_out[103]
+port 2321 nsew
+flabel metal2 s 495870 -960 495982 480 0 FreeSans 560 90 0 0 la_data_out[104]
+port 2322 nsew
+flabel metal2 s 499366 -960 499478 480 0 FreeSans 560 90 0 0 la_data_out[105]
+port 2323 nsew
+flabel metal2 s 502954 -960 503066 480 0 FreeSans 560 90 0 0 la_data_out[106]
+port 2324 nsew
+flabel metal2 s 506450 -960 506562 480 0 FreeSans 560 90 0 0 la_data_out[107]
+port 2325 nsew
+flabel metal2 s 510038 -960 510150 480 0 FreeSans 560 90 0 0 la_data_out[108]
+port 2326 nsew
+flabel metal2 s 513534 -960 513646 480 0 FreeSans 560 90 0 0 la_data_out[109]
+port 2327 nsew
+flabel metal2 s 162462 -960 162574 480 0 FreeSans 560 90 0 0 la_data_out[10]
+port 2328 nsew
+flabel metal2 s 517122 -960 517234 480 0 FreeSans 560 90 0 0 la_data_out[110]
+port 2329 nsew
+flabel metal2 s 520710 -960 520822 480 0 FreeSans 560 90 0 0 la_data_out[111]
+port 2330 nsew
+flabel metal2 s 524206 -960 524318 480 0 FreeSans 560 90 0 0 la_data_out[112]
+port 2331 nsew
+flabel metal2 s 527794 -960 527906 480 0 FreeSans 560 90 0 0 la_data_out[113]
+port 2332 nsew
+flabel metal2 s 531290 -960 531402 480 0 FreeSans 560 90 0 0 la_data_out[114]
+port 2333 nsew
+flabel metal2 s 534878 -960 534990 480 0 FreeSans 560 90 0 0 la_data_out[115]
+port 2334 nsew
+flabel metal2 s 538374 -960 538486 480 0 FreeSans 560 90 0 0 la_data_out[116]
+port 2335 nsew
+flabel metal2 s 541962 -960 542074 480 0 FreeSans 560 90 0 0 la_data_out[117]
+port 2336 nsew
+flabel metal2 s 545458 -960 545570 480 0 FreeSans 560 90 0 0 la_data_out[118]
+port 2337 nsew
+flabel metal2 s 549046 -960 549158 480 0 FreeSans 560 90 0 0 la_data_out[119]
+port 2338 nsew
+flabel metal2 s 166050 -960 166162 480 0 FreeSans 560 90 0 0 la_data_out[11]
+port 2339 nsew
+flabel metal2 s 552634 -960 552746 480 0 FreeSans 560 90 0 0 la_data_out[120]
+port 2340 nsew
+flabel metal2 s 556130 -960 556242 480 0 FreeSans 560 90 0 0 la_data_out[121]
+port 2341 nsew
+flabel metal2 s 559718 -960 559830 480 0 FreeSans 560 90 0 0 la_data_out[122]
+port 2342 nsew
+flabel metal2 s 563214 -960 563326 480 0 FreeSans 560 90 0 0 la_data_out[123]
+port 2343 nsew
+flabel metal2 s 566802 -960 566914 480 0 FreeSans 560 90 0 0 la_data_out[124]
+port 2344 nsew
+flabel metal2 s 570298 -960 570410 480 0 FreeSans 560 90 0 0 la_data_out[125]
+port 2345 nsew
+flabel metal2 s 573886 -960 573998 480 0 FreeSans 560 90 0 0 la_data_out[126]
+port 2346 nsew
+flabel metal2 s 577382 -960 577494 480 0 FreeSans 560 90 0 0 la_data_out[127]
+port 2347 nsew
+flabel metal2 s 169546 -960 169658 480 0 FreeSans 560 90 0 0 la_data_out[12]
+port 2348 nsew
+flabel metal2 s 173134 -960 173246 480 0 FreeSans 560 90 0 0 la_data_out[13]
+port 2349 nsew
+flabel metal2 s 176630 -960 176742 480 0 FreeSans 560 90 0 0 la_data_out[14]
+port 2350 nsew
+flabel metal2 s 180218 -960 180330 480 0 FreeSans 560 90 0 0 la_data_out[15]
+port 2351 nsew
+flabel metal2 s 183714 -960 183826 480 0 FreeSans 560 90 0 0 la_data_out[16]
+port 2352 nsew
+flabel metal2 s 187302 -960 187414 480 0 FreeSans 560 90 0 0 la_data_out[17]
+port 2353 nsew
+flabel metal2 s 190798 -960 190910 480 0 FreeSans 560 90 0 0 la_data_out[18]
+port 2354 nsew
+flabel metal2 s 194386 -960 194498 480 0 FreeSans 560 90 0 0 la_data_out[19]
+port 2355 nsew
+flabel metal2 s 130538 -960 130650 480 0 FreeSans 560 90 0 0 la_data_out[1]
+port 2356 nsew
+flabel metal2 s 197882 -960 197994 480 0 FreeSans 560 90 0 0 la_data_out[20]
+port 2357 nsew
+flabel metal2 s 201470 -960 201582 480 0 FreeSans 560 90 0 0 la_data_out[21]
+port 2358 nsew
+flabel metal2 s 205058 -960 205170 480 0 FreeSans 560 90 0 0 la_data_out[22]
+port 2359 nsew
+flabel metal2 s 208554 -960 208666 480 0 FreeSans 560 90 0 0 la_data_out[23]
+port 2360 nsew
+flabel metal2 s 212142 -960 212254 480 0 FreeSans 560 90 0 0 la_data_out[24]
+port 2361 nsew
+flabel metal2 s 215638 -960 215750 480 0 FreeSans 560 90 0 0 la_data_out[25]
+port 2362 nsew
+flabel metal2 s 219226 -960 219338 480 0 FreeSans 560 90 0 0 la_data_out[26]
+port 2363 nsew
+flabel metal2 s 222722 -960 222834 480 0 FreeSans 560 90 0 0 la_data_out[27]
+port 2364 nsew
+flabel metal2 s 226310 -960 226422 480 0 FreeSans 560 90 0 0 la_data_out[28]
+port 2365 nsew
+flabel metal2 s 229806 -960 229918 480 0 FreeSans 560 90 0 0 la_data_out[29]
+port 2366 nsew
+flabel metal2 s 134126 -960 134238 480 0 FreeSans 560 90 0 0 la_data_out[2]
+port 2367 nsew
+flabel metal2 s 233394 -960 233506 480 0 FreeSans 560 90 0 0 la_data_out[30]
+port 2368 nsew
+flabel metal2 s 236982 -960 237094 480 0 FreeSans 560 90 0 0 la_data_out[31]
+port 2369 nsew
+flabel metal2 s 240478 -960 240590 480 0 FreeSans 560 90 0 0 la_data_out[32]
+port 2370 nsew
+flabel metal2 s 244066 -960 244178 480 0 FreeSans 560 90 0 0 la_data_out[33]
+port 2371 nsew
+flabel metal2 s 247562 -960 247674 480 0 FreeSans 560 90 0 0 la_data_out[34]
+port 2372 nsew
+flabel metal2 s 251150 -960 251262 480 0 FreeSans 560 90 0 0 la_data_out[35]
+port 2373 nsew
+flabel metal2 s 254646 -960 254758 480 0 FreeSans 560 90 0 0 la_data_out[36]
+port 2374 nsew
+flabel metal2 s 258234 -960 258346 480 0 FreeSans 560 90 0 0 la_data_out[37]
+port 2375 nsew
+flabel metal2 s 261730 -960 261842 480 0 FreeSans 560 90 0 0 la_data_out[38]
+port 2376 nsew
+flabel metal2 s 265318 -960 265430 480 0 FreeSans 560 90 0 0 la_data_out[39]
+port 2377 nsew
+flabel metal2 s 137622 -960 137734 480 0 FreeSans 560 90 0 0 la_data_out[3]
+port 2378 nsew
+flabel metal2 s 268814 -960 268926 480 0 FreeSans 560 90 0 0 la_data_out[40]
+port 2379 nsew
+flabel metal2 s 272402 -960 272514 480 0 FreeSans 560 90 0 0 la_data_out[41]
+port 2380 nsew
+flabel metal2 s 275990 -960 276102 480 0 FreeSans 560 90 0 0 la_data_out[42]
+port 2381 nsew
+flabel metal2 s 279486 -960 279598 480 0 FreeSans 560 90 0 0 la_data_out[43]
+port 2382 nsew
+flabel metal2 s 283074 -960 283186 480 0 FreeSans 560 90 0 0 la_data_out[44]
+port 2383 nsew
+flabel metal2 s 286570 -960 286682 480 0 FreeSans 560 90 0 0 la_data_out[45]
+port 2384 nsew
+flabel metal2 s 290158 -960 290270 480 0 FreeSans 560 90 0 0 la_data_out[46]
+port 2385 nsew
+flabel metal2 s 293654 -960 293766 480 0 FreeSans 560 90 0 0 la_data_out[47]
+port 2386 nsew
+flabel metal2 s 297242 -960 297354 480 0 FreeSans 560 90 0 0 la_data_out[48]
+port 2387 nsew
+flabel metal2 s 300738 -960 300850 480 0 FreeSans 560 90 0 0 la_data_out[49]
+port 2388 nsew
+flabel metal2 s 141210 -960 141322 480 0 FreeSans 560 90 0 0 la_data_out[4]
+port 2389 nsew
+flabel metal2 s 304326 -960 304438 480 0 FreeSans 560 90 0 0 la_data_out[50]
+port 2390 nsew
+flabel metal2 s 307914 -960 308026 480 0 FreeSans 560 90 0 0 la_data_out[51]
+port 2391 nsew
+flabel metal2 s 311410 -960 311522 480 0 FreeSans 560 90 0 0 la_data_out[52]
+port 2392 nsew
+flabel metal2 s 314998 -960 315110 480 0 FreeSans 560 90 0 0 la_data_out[53]
+port 2393 nsew
+flabel metal2 s 318494 -960 318606 480 0 FreeSans 560 90 0 0 la_data_out[54]
+port 2394 nsew
+flabel metal2 s 322082 -960 322194 480 0 FreeSans 560 90 0 0 la_data_out[55]
+port 2395 nsew
+flabel metal2 s 325578 -960 325690 480 0 FreeSans 560 90 0 0 la_data_out[56]
+port 2396 nsew
+flabel metal2 s 329166 -960 329278 480 0 FreeSans 560 90 0 0 la_data_out[57]
+port 2397 nsew
+flabel metal2 s 332662 -960 332774 480 0 FreeSans 560 90 0 0 la_data_out[58]
+port 2398 nsew
+flabel metal2 s 336250 -960 336362 480 0 FreeSans 560 90 0 0 la_data_out[59]
+port 2399 nsew
+flabel metal2 s 144706 -960 144818 480 0 FreeSans 560 90 0 0 la_data_out[5]
+port 2400 nsew
+flabel metal2 s 339838 -960 339950 480 0 FreeSans 560 90 0 0 la_data_out[60]
+port 2401 nsew
+flabel metal2 s 343334 -960 343446 480 0 FreeSans 560 90 0 0 la_data_out[61]
+port 2402 nsew
+flabel metal2 s 346922 -960 347034 480 0 FreeSans 560 90 0 0 la_data_out[62]
+port 2403 nsew
+flabel metal2 s 350418 -960 350530 480 0 FreeSans 560 90 0 0 la_data_out[63]
+port 2404 nsew
+flabel metal2 s 354006 -960 354118 480 0 FreeSans 560 90 0 0 la_data_out[64]
+port 2405 nsew
+flabel metal2 s 357502 -960 357614 480 0 FreeSans 560 90 0 0 la_data_out[65]
+port 2406 nsew
+flabel metal2 s 361090 -960 361202 480 0 FreeSans 560 90 0 0 la_data_out[66]
+port 2407 nsew
+flabel metal2 s 364586 -960 364698 480 0 FreeSans 560 90 0 0 la_data_out[67]
+port 2408 nsew
+flabel metal2 s 368174 -960 368286 480 0 FreeSans 560 90 0 0 la_data_out[68]
+port 2409 nsew
+flabel metal2 s 371670 -960 371782 480 0 FreeSans 560 90 0 0 la_data_out[69]
+port 2410 nsew
+flabel metal2 s 148294 -960 148406 480 0 FreeSans 560 90 0 0 la_data_out[6]
+port 2411 nsew
+flabel metal2 s 375258 -960 375370 480 0 FreeSans 560 90 0 0 la_data_out[70]
+port 2412 nsew
+flabel metal2 s 378846 -960 378958 480 0 FreeSans 560 90 0 0 la_data_out[71]
+port 2413 nsew
+flabel metal2 s 382342 -960 382454 480 0 FreeSans 560 90 0 0 la_data_out[72]
+port 2414 nsew
+flabel metal2 s 385930 -960 386042 480 0 FreeSans 560 90 0 0 la_data_out[73]
+port 2415 nsew
+flabel metal2 s 389426 -960 389538 480 0 FreeSans 560 90 0 0 la_data_out[74]
+port 2416 nsew
+flabel metal2 s 393014 -960 393126 480 0 FreeSans 560 90 0 0 la_data_out[75]
+port 2417 nsew
+flabel metal2 s 396510 -960 396622 480 0 FreeSans 560 90 0 0 la_data_out[76]
+port 2418 nsew
+flabel metal2 s 400098 -960 400210 480 0 FreeSans 560 90 0 0 la_data_out[77]
+port 2419 nsew
+flabel metal2 s 403594 -960 403706 480 0 FreeSans 560 90 0 0 la_data_out[78]
+port 2420 nsew
+flabel metal2 s 407182 -960 407294 480 0 FreeSans 560 90 0 0 la_data_out[79]
+port 2421 nsew
+flabel metal2 s 151790 -960 151902 480 0 FreeSans 560 90 0 0 la_data_out[7]
+port 2422 nsew
+flabel metal2 s 410770 -960 410882 480 0 FreeSans 560 90 0 0 la_data_out[80]
+port 2423 nsew
+flabel metal2 s 414266 -960 414378 480 0 FreeSans 560 90 0 0 la_data_out[81]
+port 2424 nsew
+flabel metal2 s 417854 -960 417966 480 0 FreeSans 560 90 0 0 la_data_out[82]
+port 2425 nsew
+flabel metal2 s 421350 -960 421462 480 0 FreeSans 560 90 0 0 la_data_out[83]
+port 2426 nsew
+flabel metal2 s 424938 -960 425050 480 0 FreeSans 560 90 0 0 la_data_out[84]
+port 2427 nsew
+flabel metal2 s 428434 -960 428546 480 0 FreeSans 560 90 0 0 la_data_out[85]
+port 2428 nsew
+flabel metal2 s 432022 -960 432134 480 0 FreeSans 560 90 0 0 la_data_out[86]
+port 2429 nsew
+flabel metal2 s 435518 -960 435630 480 0 FreeSans 560 90 0 0 la_data_out[87]
+port 2430 nsew
+flabel metal2 s 439106 -960 439218 480 0 FreeSans 560 90 0 0 la_data_out[88]
+port 2431 nsew
+flabel metal2 s 442602 -960 442714 480 0 FreeSans 560 90 0 0 la_data_out[89]
+port 2432 nsew
+flabel metal2 s 155378 -960 155490 480 0 FreeSans 560 90 0 0 la_data_out[8]
+port 2433 nsew
+flabel metal2 s 446190 -960 446302 480 0 FreeSans 560 90 0 0 la_data_out[90]
+port 2434 nsew
+flabel metal2 s 449778 -960 449890 480 0 FreeSans 560 90 0 0 la_data_out[91]
+port 2435 nsew
+flabel metal2 s 453274 -960 453386 480 0 FreeSans 560 90 0 0 la_data_out[92]
+port 2436 nsew
+flabel metal2 s 456862 -960 456974 480 0 FreeSans 560 90 0 0 la_data_out[93]
+port 2437 nsew
+flabel metal2 s 460358 -960 460470 480 0 FreeSans 560 90 0 0 la_data_out[94]
+port 2438 nsew
+flabel metal2 s 463946 -960 464058 480 0 FreeSans 560 90 0 0 la_data_out[95]
+port 2439 nsew
+flabel metal2 s 467442 -960 467554 480 0 FreeSans 560 90 0 0 la_data_out[96]
+port 2440 nsew
+flabel metal2 s 471030 -960 471142 480 0 FreeSans 560 90 0 0 la_data_out[97]
+port 2441 nsew
+flabel metal2 s 474526 -960 474638 480 0 FreeSans 560 90 0 0 la_data_out[98]
+port 2442 nsew
+flabel metal2 s 478114 -960 478226 480 0 FreeSans 560 90 0 0 la_data_out[99]
+port 2443 nsew
+flabel metal2 s 158874 -960 158986 480 0 FreeSans 560 90 0 0 la_data_out[9]
+port 2444 nsew
+flabel metal2 s 128146 -960 128258 480 0 FreeSans 560 90 0 0 la_oenb[0]
+port 2445 nsew
+flabel metal2 s 482806 -960 482918 480 0 FreeSans 560 90 0 0 la_oenb[100]
+port 2446 nsew
+flabel metal2 s 486394 -960 486506 480 0 FreeSans 560 90 0 0 la_oenb[101]
+port 2447 nsew
+flabel metal2 s 489890 -960 490002 480 0 FreeSans 560 90 0 0 la_oenb[102]
+port 2448 nsew
+flabel metal2 s 493478 -960 493590 480 0 FreeSans 560 90 0 0 la_oenb[103]
+port 2449 nsew
+flabel metal2 s 497066 -960 497178 480 0 FreeSans 560 90 0 0 la_oenb[104]
+port 2450 nsew
+flabel metal2 s 500562 -960 500674 480 0 FreeSans 560 90 0 0 la_oenb[105]
+port 2451 nsew
+flabel metal2 s 504150 -960 504262 480 0 FreeSans 560 90 0 0 la_oenb[106]
+port 2452 nsew
+flabel metal2 s 507646 -960 507758 480 0 FreeSans 560 90 0 0 la_oenb[107]
+port 2453 nsew
+flabel metal2 s 511234 -960 511346 480 0 FreeSans 560 90 0 0 la_oenb[108]
+port 2454 nsew
+flabel metal2 s 514730 -960 514842 480 0 FreeSans 560 90 0 0 la_oenb[109]
+port 2455 nsew
+flabel metal2 s 163658 -960 163770 480 0 FreeSans 560 90 0 0 la_oenb[10]
+port 2456 nsew
+flabel metal2 s 518318 -960 518430 480 0 FreeSans 560 90 0 0 la_oenb[110]
+port 2457 nsew
+flabel metal2 s 521814 -960 521926 480 0 FreeSans 560 90 0 0 la_oenb[111]
+port 2458 nsew
+flabel metal2 s 525402 -960 525514 480 0 FreeSans 560 90 0 0 la_oenb[112]
+port 2459 nsew
+flabel metal2 s 528990 -960 529102 480 0 FreeSans 560 90 0 0 la_oenb[113]
+port 2460 nsew
+flabel metal2 s 532486 -960 532598 480 0 FreeSans 560 90 0 0 la_oenb[114]
+port 2461 nsew
+flabel metal2 s 536074 -960 536186 480 0 FreeSans 560 90 0 0 la_oenb[115]
+port 2462 nsew
+flabel metal2 s 539570 -960 539682 480 0 FreeSans 560 90 0 0 la_oenb[116]
+port 2463 nsew
+flabel metal2 s 543158 -960 543270 480 0 FreeSans 560 90 0 0 la_oenb[117]
+port 2464 nsew
+flabel metal2 s 546654 -960 546766 480 0 FreeSans 560 90 0 0 la_oenb[118]
+port 2465 nsew
+flabel metal2 s 550242 -960 550354 480 0 FreeSans 560 90 0 0 la_oenb[119]
+port 2466 nsew
+flabel metal2 s 167154 -960 167266 480 0 FreeSans 560 90 0 0 la_oenb[11]
+port 2467 nsew
+flabel metal2 s 553738 -960 553850 480 0 FreeSans 560 90 0 0 la_oenb[120]
+port 2468 nsew
+flabel metal2 s 557326 -960 557438 480 0 FreeSans 560 90 0 0 la_oenb[121]
+port 2469 nsew
+flabel metal2 s 560822 -960 560934 480 0 FreeSans 560 90 0 0 la_oenb[122]
+port 2470 nsew
+flabel metal2 s 564410 -960 564522 480 0 FreeSans 560 90 0 0 la_oenb[123]
+port 2471 nsew
+flabel metal2 s 567998 -960 568110 480 0 FreeSans 560 90 0 0 la_oenb[124]
+port 2472 nsew
+flabel metal2 s 571494 -960 571606 480 0 FreeSans 560 90 0 0 la_oenb[125]
+port 2473 nsew
+flabel metal2 s 575082 -960 575194 480 0 FreeSans 560 90 0 0 la_oenb[126]
+port 2474 nsew
+flabel metal2 s 578578 -960 578690 480 0 FreeSans 560 90 0 0 la_oenb[127]
+port 2475 nsew
+flabel metal2 s 170742 -960 170854 480 0 FreeSans 560 90 0 0 la_oenb[12]
+port 2476 nsew
+flabel metal2 s 174238 -960 174350 480 0 FreeSans 560 90 0 0 la_oenb[13]
+port 2477 nsew
+flabel metal2 s 177826 -960 177938 480 0 FreeSans 560 90 0 0 la_oenb[14]
+port 2478 nsew
+flabel metal2 s 181414 -960 181526 480 0 FreeSans 560 90 0 0 la_oenb[15]
+port 2479 nsew
+flabel metal2 s 184910 -960 185022 480 0 FreeSans 560 90 0 0 la_oenb[16]
+port 2480 nsew
+flabel metal2 s 188498 -960 188610 480 0 FreeSans 560 90 0 0 la_oenb[17]
+port 2481 nsew
+flabel metal2 s 191994 -960 192106 480 0 FreeSans 560 90 0 0 la_oenb[18]
+port 2482 nsew
+flabel metal2 s 195582 -960 195694 480 0 FreeSans 560 90 0 0 la_oenb[19]
+port 2483 nsew
+flabel metal2 s 131734 -960 131846 480 0 FreeSans 560 90 0 0 la_oenb[1]
+port 2484 nsew
+flabel metal2 s 199078 -960 199190 480 0 FreeSans 560 90 0 0 la_oenb[20]
+port 2485 nsew
+flabel metal2 s 202666 -960 202778 480 0 FreeSans 560 90 0 0 la_oenb[21]
+port 2486 nsew
+flabel metal2 s 206162 -960 206274 480 0 FreeSans 560 90 0 0 la_oenb[22]
+port 2487 nsew
+flabel metal2 s 209750 -960 209862 480 0 FreeSans 560 90 0 0 la_oenb[23]
+port 2488 nsew
+flabel metal2 s 213338 -960 213450 480 0 FreeSans 560 90 0 0 la_oenb[24]
+port 2489 nsew
+flabel metal2 s 216834 -960 216946 480 0 FreeSans 560 90 0 0 la_oenb[25]
+port 2490 nsew
+flabel metal2 s 220422 -960 220534 480 0 FreeSans 560 90 0 0 la_oenb[26]
+port 2491 nsew
+flabel metal2 s 223918 -960 224030 480 0 FreeSans 560 90 0 0 la_oenb[27]
+port 2492 nsew
+flabel metal2 s 227506 -960 227618 480 0 FreeSans 560 90 0 0 la_oenb[28]
+port 2493 nsew
+flabel metal2 s 231002 -960 231114 480 0 FreeSans 560 90 0 0 la_oenb[29]
+port 2494 nsew
+flabel metal2 s 135230 -960 135342 480 0 FreeSans 560 90 0 0 la_oenb[2]
+port 2495 nsew
+flabel metal2 s 234590 -960 234702 480 0 FreeSans 560 90 0 0 la_oenb[30]
+port 2496 nsew
+flabel metal2 s 238086 -960 238198 480 0 FreeSans 560 90 0 0 la_oenb[31]
+port 2497 nsew
+flabel metal2 s 241674 -960 241786 480 0 FreeSans 560 90 0 0 la_oenb[32]
+port 2498 nsew
+flabel metal2 s 245170 -960 245282 480 0 FreeSans 560 90 0 0 la_oenb[33]
+port 2499 nsew
+flabel metal2 s 248758 -960 248870 480 0 FreeSans 560 90 0 0 la_oenb[34]
+port 2500 nsew
+flabel metal2 s 252346 -960 252458 480 0 FreeSans 560 90 0 0 la_oenb[35]
+port 2501 nsew
+flabel metal2 s 255842 -960 255954 480 0 FreeSans 560 90 0 0 la_oenb[36]
+port 2502 nsew
+flabel metal2 s 259430 -960 259542 480 0 FreeSans 560 90 0 0 la_oenb[37]
+port 2503 nsew
+flabel metal2 s 262926 -960 263038 480 0 FreeSans 560 90 0 0 la_oenb[38]
+port 2504 nsew
+flabel metal2 s 266514 -960 266626 480 0 FreeSans 560 90 0 0 la_oenb[39]
+port 2505 nsew
+flabel metal2 s 138818 -960 138930 480 0 FreeSans 560 90 0 0 la_oenb[3]
+port 2506 nsew
+flabel metal2 s 270010 -960 270122 480 0 FreeSans 560 90 0 0 la_oenb[40]
+port 2507 nsew
+flabel metal2 s 273598 -960 273710 480 0 FreeSans 560 90 0 0 la_oenb[41]
+port 2508 nsew
+flabel metal2 s 277094 -960 277206 480 0 FreeSans 560 90 0 0 la_oenb[42]
+port 2509 nsew
+flabel metal2 s 280682 -960 280794 480 0 FreeSans 560 90 0 0 la_oenb[43]
+port 2510 nsew
+flabel metal2 s 284270 -960 284382 480 0 FreeSans 560 90 0 0 la_oenb[44]
+port 2511 nsew
+flabel metal2 s 287766 -960 287878 480 0 FreeSans 560 90 0 0 la_oenb[45]
+port 2512 nsew
+flabel metal2 s 291354 -960 291466 480 0 FreeSans 560 90 0 0 la_oenb[46]
+port 2513 nsew
+flabel metal2 s 294850 -960 294962 480 0 FreeSans 560 90 0 0 la_oenb[47]
+port 2514 nsew
+flabel metal2 s 298438 -960 298550 480 0 FreeSans 560 90 0 0 la_oenb[48]
+port 2515 nsew
+flabel metal2 s 301934 -960 302046 480 0 FreeSans 560 90 0 0 la_oenb[49]
+port 2516 nsew
+flabel metal2 s 142406 -960 142518 480 0 FreeSans 560 90 0 0 la_oenb[4]
+port 2517 nsew
+flabel metal2 s 305522 -960 305634 480 0 FreeSans 560 90 0 0 la_oenb[50]
+port 2518 nsew
+flabel metal2 s 309018 -960 309130 480 0 FreeSans 560 90 0 0 la_oenb[51]
+port 2519 nsew
+flabel metal2 s 312606 -960 312718 480 0 FreeSans 560 90 0 0 la_oenb[52]
+port 2520 nsew
+flabel metal2 s 316194 -960 316306 480 0 FreeSans 560 90 0 0 la_oenb[53]
+port 2521 nsew
+flabel metal2 s 319690 -960 319802 480 0 FreeSans 560 90 0 0 la_oenb[54]
+port 2522 nsew
+flabel metal2 s 323278 -960 323390 480 0 FreeSans 560 90 0 0 la_oenb[55]
+port 2523 nsew
+flabel metal2 s 326774 -960 326886 480 0 FreeSans 560 90 0 0 la_oenb[56]
+port 2524 nsew
+flabel metal2 s 330362 -960 330474 480 0 FreeSans 560 90 0 0 la_oenb[57]
+port 2525 nsew
+flabel metal2 s 333858 -960 333970 480 0 FreeSans 560 90 0 0 la_oenb[58]
+port 2526 nsew
+flabel metal2 s 337446 -960 337558 480 0 FreeSans 560 90 0 0 la_oenb[59]
+port 2527 nsew
+flabel metal2 s 145902 -960 146014 480 0 FreeSans 560 90 0 0 la_oenb[5]
+port 2528 nsew
+flabel metal2 s 340942 -960 341054 480 0 FreeSans 560 90 0 0 la_oenb[60]
+port 2529 nsew
+flabel metal2 s 344530 -960 344642 480 0 FreeSans 560 90 0 0 la_oenb[61]
+port 2530 nsew
+flabel metal2 s 348026 -960 348138 480 0 FreeSans 560 90 0 0 la_oenb[62]
+port 2531 nsew
+flabel metal2 s 351614 -960 351726 480 0 FreeSans 560 90 0 0 la_oenb[63]
+port 2532 nsew
+flabel metal2 s 355202 -960 355314 480 0 FreeSans 560 90 0 0 la_oenb[64]
+port 2533 nsew
+flabel metal2 s 358698 -960 358810 480 0 FreeSans 560 90 0 0 la_oenb[65]
+port 2534 nsew
+flabel metal2 s 362286 -960 362398 480 0 FreeSans 560 90 0 0 la_oenb[66]
+port 2535 nsew
+flabel metal2 s 365782 -960 365894 480 0 FreeSans 560 90 0 0 la_oenb[67]
+port 2536 nsew
+flabel metal2 s 369370 -960 369482 480 0 FreeSans 560 90 0 0 la_oenb[68]
+port 2537 nsew
+flabel metal2 s 372866 -960 372978 480 0 FreeSans 560 90 0 0 la_oenb[69]
+port 2538 nsew
+flabel metal2 s 149490 -960 149602 480 0 FreeSans 560 90 0 0 la_oenb[6]
+port 2539 nsew
+flabel metal2 s 376454 -960 376566 480 0 FreeSans 560 90 0 0 la_oenb[70]
+port 2540 nsew
+flabel metal2 s 379950 -960 380062 480 0 FreeSans 560 90 0 0 la_oenb[71]
+port 2541 nsew
+flabel metal2 s 383538 -960 383650 480 0 FreeSans 560 90 0 0 la_oenb[72]
+port 2542 nsew
+flabel metal2 s 387126 -960 387238 480 0 FreeSans 560 90 0 0 la_oenb[73]
+port 2543 nsew
+flabel metal2 s 390622 -960 390734 480 0 FreeSans 560 90 0 0 la_oenb[74]
+port 2544 nsew
+flabel metal2 s 394210 -960 394322 480 0 FreeSans 560 90 0 0 la_oenb[75]
+port 2545 nsew
+flabel metal2 s 397706 -960 397818 480 0 FreeSans 560 90 0 0 la_oenb[76]
+port 2546 nsew
+flabel metal2 s 401294 -960 401406 480 0 FreeSans 560 90 0 0 la_oenb[77]
+port 2547 nsew
+flabel metal2 s 404790 -960 404902 480 0 FreeSans 560 90 0 0 la_oenb[78]
+port 2548 nsew
+flabel metal2 s 408378 -960 408490 480 0 FreeSans 560 90 0 0 la_oenb[79]
+port 2549 nsew
+flabel metal2 s 152986 -960 153098 480 0 FreeSans 560 90 0 0 la_oenb[7]
+port 2550 nsew
+flabel metal2 s 411874 -960 411986 480 0 FreeSans 560 90 0 0 la_oenb[80]
+port 2551 nsew
+flabel metal2 s 415462 -960 415574 480 0 FreeSans 560 90 0 0 la_oenb[81]
+port 2552 nsew
+flabel metal2 s 418958 -960 419070 480 0 FreeSans 560 90 0 0 la_oenb[82]
+port 2553 nsew
+flabel metal2 s 422546 -960 422658 480 0 FreeSans 560 90 0 0 la_oenb[83]
+port 2554 nsew
+flabel metal2 s 426134 -960 426246 480 0 FreeSans 560 90 0 0 la_oenb[84]
+port 2555 nsew
+flabel metal2 s 429630 -960 429742 480 0 FreeSans 560 90 0 0 la_oenb[85]
+port 2556 nsew
+flabel metal2 s 433218 -960 433330 480 0 FreeSans 560 90 0 0 la_oenb[86]
+port 2557 nsew
+flabel metal2 s 436714 -960 436826 480 0 FreeSans 560 90 0 0 la_oenb[87]
+port 2558 nsew
+flabel metal2 s 440302 -960 440414 480 0 FreeSans 560 90 0 0 la_oenb[88]
+port 2559 nsew
+flabel metal2 s 443798 -960 443910 480 0 FreeSans 560 90 0 0 la_oenb[89]
+port 2560 nsew
+flabel metal2 s 156574 -960 156686 480 0 FreeSans 560 90 0 0 la_oenb[8]
+port 2561 nsew
+flabel metal2 s 447386 -960 447498 480 0 FreeSans 560 90 0 0 la_oenb[90]
+port 2562 nsew
+flabel metal2 s 450882 -960 450994 480 0 FreeSans 560 90 0 0 la_oenb[91]
+port 2563 nsew
+flabel metal2 s 454470 -960 454582 480 0 FreeSans 560 90 0 0 la_oenb[92]
+port 2564 nsew
+flabel metal2 s 458058 -960 458170 480 0 FreeSans 560 90 0 0 la_oenb[93]
+port 2565 nsew
+flabel metal2 s 461554 -960 461666 480 0 FreeSans 560 90 0 0 la_oenb[94]
+port 2566 nsew
+flabel metal2 s 465142 -960 465254 480 0 FreeSans 560 90 0 0 la_oenb[95]
+port 2567 nsew
+flabel metal2 s 468638 -960 468750 480 0 FreeSans 560 90 0 0 la_oenb[96]
+port 2568 nsew
+flabel metal2 s 472226 -960 472338 480 0 FreeSans 560 90 0 0 la_oenb[97]
+port 2569 nsew
+flabel metal2 s 475722 -960 475834 480 0 FreeSans 560 90 0 0 la_oenb[98]
+port 2570 nsew
+flabel metal2 s 479310 -960 479422 480 0 FreeSans 560 90 0 0 la_oenb[99]
+port 2571 nsew
+flabel metal2 s 160070 -960 160182 480 0 FreeSans 560 90 0 0 la_oenb[9]
+port 2572 nsew
+flabel metal2 s 579774 -960 579886 480 0 FreeSans 560 90 0 0 user_clock2
+port 2712 nsew
+flabel metal2 s 580970 -960 581082 480 0 FreeSans 560 90 0 0 user_irq[0]
+port 2574 nsew
+flabel metal2 s 582166 -960 582278 480 0 FreeSans 560 90 0 0 user_irq[1]
+port 2575 nsew
+flabel metal2 s 583362 -960 583474 480 0 FreeSans 560 90 0 0 user_irq[2]
+port 2576 nsew
+flabel metal4 s -2006 -934 -1386 704870 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal5 s -2006 -934 585930 -314 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -2006 704250 585930 704870 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal4 s 585310 -934 585930 704870 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 1794 -7654 2414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 31794 -7654 32414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 61794 -7654 62414 17940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 61794 102660 62414 155940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 61794 240660 62414 293940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 61794 378660 62414 423940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 61794 508660 62414 569940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 61794 654660 62414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 91794 -7654 92414 17940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 91794 102784 92414 155940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 91794 240784 92414 293940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 91794 378784 92414 423940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 91794 508784 92414 569940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 91794 654784 92414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 121794 -7654 122414 18064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 121794 102784 122414 156064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 121794 240784 122414 294064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 121794 378784 122414 424064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 121794 508784 122414 570064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 121794 654784 122414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 151794 -7654 152414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 181794 -7654 182414 19199 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 181794 84857 182414 140559 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 181794 654660 182414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 211794 -7654 212414 19199 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 211794 84857 212414 140559 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 241794 -7654 242414 19199 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 241794 84857 242414 140559 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 241794 654784 242414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 271794 -7654 272414 140559 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 271794 654784 272414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 301794 -7654 302414 140559 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 301794 539417 302414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 331794 -7654 332414 18064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 331794 654660 332414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 361794 -7654 362414 18064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 361794 654784 362414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 391794 -7654 392414 18064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 391794 654660 392414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 421794 -7654 422414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 451794 -7654 452414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 481794 -7654 482414 17940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 481794 102660 482414 155940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 481794 240660 482414 293940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 481794 378660 482414 423940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 481794 508660 482414 569940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 481794 654660 482414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 511794 -7654 512414 17940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 511794 102784 512414 155940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 511794 240784 512414 293940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 511794 378784 512414 423940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 511794 508784 512414 569940 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 511794 654784 512414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 541794 -7654 542414 18064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 541794 102784 542414 156064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 541794 240784 542414 294064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 541794 378784 542414 424064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 541794 508784 542414 570064 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 541794 654784 542414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal4 s 571794 -7654 572414 711590 0 FreeSans 4800 90 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 2866 592650 3486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 32866 592650 33486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 62866 592650 63486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 92866 592650 93486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 122866 592650 123486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 152866 592650 153486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 182866 592650 183486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 212866 592650 213486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 242866 592650 243486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 272866 592650 273486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 302866 592650 303486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 332866 592650 333486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 362866 592650 363486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 392866 592650 393486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 422866 592650 423486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 452866 592650 453486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s 291962 483176 291962 483176 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 512866 592650 513486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 542866 592650 543486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 572866 592650 573486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 602866 592650 603486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 632866 592650 633486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 662866 592650 663486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal5 s -8726 692866 592650 693486 0 FreeSans 3200 0 0 0 vccd1
+port 1 nsew
+flabel metal4 s -3926 -2854 -3306 706790 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal5 s -3926 -2854 587850 -2234 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -3926 706170 587850 706790 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal4 s 587230 -2854 587850 706790 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 9234 -7654 9854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 39234 -7654 39854 18064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 39234 240660 39854 294064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 39234 508660 39854 570064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 39234 654660 39854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 69234 -7654 69854 17940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 69234 102784 69854 155940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 69234 240784 69854 293940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 69234 378784 69854 423940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 69234 508784 69854 569940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 69234 654784 69854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 99234 -7654 99854 17940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 99234 102784 99854 155940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 99234 240784 99854 293940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 99234 378784 99854 423940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 99234 508784 99854 569940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 99234 654784 99854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 129234 -7654 129854 18064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 129234 240660 129854 294064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 129234 508660 129854 570064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 129234 654660 129854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 159234 -7654 159854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 189234 -7654 189854 19199 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 189234 84857 189854 140559 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 189234 654660 189854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 219234 -7654 219854 19199 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 219234 84857 219854 140559 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 219234 654784 219854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 249234 -7654 249854 19199 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 249234 84857 249854 140559 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 249234 654660 249854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 279234 -7654 279854 140559 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 279234 654660 279854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 309234 -7654 309854 140559 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 309234 539417 309854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 339234 -7654 339854 18064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 339234 654660 339854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 369234 -7654 369854 17940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 369234 654784 369854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 399234 -7654 399854 18064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 399234 654660 399854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 429234 -7654 429854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 459234 -7654 459854 18064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 459234 240660 459854 294064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 459234 508660 459854 570064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 459234 654660 459854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 489234 -7654 489854 17940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 489234 102784 489854 155940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 489234 240784 489854 293940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 489234 378784 489854 423940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 489234 508784 489854 569940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 489234 654784 489854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 519234 -7654 519854 17940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 519234 102784 519854 155940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 519234 240784 519854 293940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 519234 378784 519854 423940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 519234 508784 519854 569940 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 519234 654784 519854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 549234 -7654 549854 18064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 549234 240660 549854 294064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 549234 508660 549854 570064 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 549234 654660 549854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal4 s 579234 -7654 579854 711590 0 FreeSans 4800 90 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 10306 592650 10926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 40306 592650 40926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 70306 592650 70926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 100306 592650 100926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 130306 592650 130926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 160306 592650 160926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 190306 592650 190926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 220306 592650 220926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 250306 592650 250926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 280306 592650 280926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 310306 592650 310926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 340306 592650 340926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 370306 592650 370926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 400306 592650 400926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 430306 592650 430926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 460306 592650 460926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 490306 592650 490926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s 291962 520616 291962 520616 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 550306 592650 550926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 580306 592650 580926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 610306 592650 610926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 640306 592650 640926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 670306 592650 670926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal5 s -8726 700306 592650 700926 0 FreeSans 3200 0 0 0 vccd2
+port 2 nsew
+flabel metal4 s -5846 -4774 -5226 708710 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal5 s -5846 -4774 589770 -4154 0 FreeSans 3200 0 0 0 vdda1
+port 3 nsew
+flabel metal5 s -5846 708090 589770 708710 0 FreeSans 3200 0 0 0 vdda1
+port 3 nsew
+flabel metal4 s 589150 -4774 589770 708710 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 16674 -7654 17294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 46674 -7654 47294 18064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 46674 102660 47294 156064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 46674 240660 47294 294064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 46674 508660 47294 570064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 46674 654660 47294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 76674 -7654 77294 17940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 76674 102784 77294 155940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 76674 240784 77294 293940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 76674 378784 77294 423940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 76674 508784 77294 569940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 76674 654784 77294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 106674 -7654 107294 17940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 106674 102784 107294 155940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 106674 240784 107294 293940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 106674 378784 107294 423940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 106674 508784 107294 569940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 106674 654784 107294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 136674 -7654 137294 18064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 136674 102660 137294 156064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 136674 240660 137294 294064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 136674 508660 137294 570064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 136674 654660 137294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 166674 -7654 167294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 196674 -7654 197294 19199 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 196674 84857 197294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 196674 654660 197294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 226674 -7654 227294 19199 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 226674 84857 227294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 256674 -7654 257294 19199 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 256674 84857 257294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 256674 654660 257294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 286674 -7654 287294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 286674 539417 287294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 316674 -7654 317294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 316674 539417 317294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 346674 -7654 347294 18064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 346674 102660 347294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 346674 654660 347294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 376674 -7654 377294 17940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 376674 102784 377294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 376674 654784 377294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 406674 -7654 407294 18064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 406674 102660 407294 140559 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 406674 654660 407294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 436674 -7654 437294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 466674 -7654 467294 18064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 466674 102660 467294 156064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 466674 240660 467294 294064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 466674 508660 467294 570064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 466674 654660 467294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 496674 -7654 497294 17940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 496674 102784 497294 155940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 496674 240784 497294 293940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 496674 378784 497294 423940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 496674 508784 497294 569940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 496674 654784 497294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 526674 -7654 527294 17940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 526674 102784 527294 155940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 526674 240784 527294 293940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 526674 378784 527294 423940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 526674 508784 527294 569940 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 526674 654784 527294 711590 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 556674 -7654 557294 18064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 556674 102660 557294 156064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
+flabel metal4 s 556674 240660 557294 294064 0 FreeSans 4800 90 0 0 vdda1
+port 3 nsew
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+port 8 nsew
+flabel metal5 s -8726 404026 592650 404646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 434026 592650 434646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 464026 592650 464646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 494026 592650 494646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s 291962 524336 291962 524336 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 554026 592650 554646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 584026 592650 584646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 614026 592650 614646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 644026 592650 644646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal5 s -8726 674026 592650 674646 0 FreeSans 3200 0 0 0 vssd2
+port 8 nsew
+flabel metal2 s 542 -960 654 480 0 FreeSans 560 90 0 0 wb_clk_i
+port 2577 nsew
+flabel metal2 s 1646 -960 1758 480 0 FreeSans 560 90 0 0 wb_rst_i
+port 2578 nsew
+flabel metal2 s 2842 -960 2954 480 0 FreeSans 560 90 0 0 wbs_ack_o
+port 2579 nsew
+flabel metal2 s 7626 -960 7738 480 0 FreeSans 560 90 0 0 wbs_adr_i[0]
+port 2580 nsew
+flabel metal2 s 47830 -960 47942 480 0 FreeSans 560 90 0 0 wbs_adr_i[10]
+port 2581 nsew
+flabel metal2 s 51326 -960 51438 480 0 FreeSans 560 90 0 0 wbs_adr_i[11]
+port 2582 nsew
+flabel metal2 s 54914 -960 55026 480 0 FreeSans 560 90 0 0 wbs_adr_i[12]
+port 2583 nsew
+flabel metal2 s 58410 -960 58522 480 0 FreeSans 560 90 0 0 wbs_adr_i[13]
+port 2584 nsew
+flabel metal2 s 61998 -960 62110 480 0 FreeSans 560 90 0 0 wbs_adr_i[14]
+port 2585 nsew
+flabel metal2 s 65494 -960 65606 480 0 FreeSans 560 90 0 0 wbs_adr_i[15]
+port 2586 nsew
+flabel metal2 s 69082 -960 69194 480 0 FreeSans 560 90 0 0 wbs_adr_i[16]
+port 2587 nsew
+flabel metal2 s 72578 -960 72690 480 0 FreeSans 560 90 0 0 wbs_adr_i[17]
+port 2588 nsew
+flabel metal2 s 76166 -960 76278 480 0 FreeSans 560 90 0 0 wbs_adr_i[18]
+port 2589 nsew
+flabel metal2 s 79662 -960 79774 480 0 FreeSans 560 90 0 0 wbs_adr_i[19]
+port 2590 nsew
+flabel metal2 s 12318 -960 12430 480 0 FreeSans 560 90 0 0 wbs_adr_i[1]
+port 2591 nsew
+flabel metal2 s 83250 -960 83362 480 0 FreeSans 560 90 0 0 wbs_adr_i[20]
+port 2592 nsew
+flabel metal2 s 86838 -960 86950 480 0 FreeSans 560 90 0 0 wbs_adr_i[21]
+port 2593 nsew
+flabel metal2 s 90334 -960 90446 480 0 FreeSans 560 90 0 0 wbs_adr_i[22]
+port 2594 nsew
+flabel metal2 s 93922 -960 94034 480 0 FreeSans 560 90 0 0 wbs_adr_i[23]
+port 2595 nsew
+flabel metal2 s 97418 -960 97530 480 0 FreeSans 560 90 0 0 wbs_adr_i[24]
+port 2596 nsew
+flabel metal2 s 101006 -960 101118 480 0 FreeSans 560 90 0 0 wbs_adr_i[25]
+port 2597 nsew
+flabel metal2 s 104502 -960 104614 480 0 FreeSans 560 90 0 0 wbs_adr_i[26]
+port 2598 nsew
+flabel metal2 s 108090 -960 108202 480 0 FreeSans 560 90 0 0 wbs_adr_i[27]
+port 2599 nsew
+flabel metal2 s 111586 -960 111698 480 0 FreeSans 560 90 0 0 wbs_adr_i[28]
+port 2600 nsew
+flabel metal2 s 115174 -960 115286 480 0 FreeSans 560 90 0 0 wbs_adr_i[29]
+port 2601 nsew
+flabel metal2 s 17010 -960 17122 480 0 FreeSans 560 90 0 0 wbs_adr_i[2]
+port 2602 nsew
+flabel metal2 s 118762 -960 118874 480 0 FreeSans 560 90 0 0 wbs_adr_i[30]
+port 2603 nsew
+flabel metal2 s 122258 -960 122370 480 0 FreeSans 560 90 0 0 wbs_adr_i[31]
+port 2604 nsew
+flabel metal2 s 21794 -960 21906 480 0 FreeSans 560 90 0 0 wbs_adr_i[3]
+port 2605 nsew
+flabel metal2 s 26486 -960 26598 480 0 FreeSans 560 90 0 0 wbs_adr_i[4]
+port 2606 nsew
+flabel metal2 s 30074 -960 30186 480 0 FreeSans 560 90 0 0 wbs_adr_i[5]
+port 2607 nsew
+flabel metal2 s 33570 -960 33682 480 0 FreeSans 560 90 0 0 wbs_adr_i[6]
+port 2608 nsew
+flabel metal2 s 37158 -960 37270 480 0 FreeSans 560 90 0 0 wbs_adr_i[7]
+port 2609 nsew
+flabel metal2 s 40654 -960 40766 480 0 FreeSans 560 90 0 0 wbs_adr_i[8]
+port 2610 nsew
+flabel metal2 s 44242 -960 44354 480 0 FreeSans 560 90 0 0 wbs_adr_i[9]
+port 2611 nsew
+flabel metal2 s 4038 -960 4150 480 0 FreeSans 560 90 0 0 wbs_cyc_i
+port 2612 nsew
+flabel metal2 s 8730 -960 8842 480 0 FreeSans 560 90 0 0 wbs_dat_i[0]
+port 2613 nsew
+flabel metal2 s 48934 -960 49046 480 0 FreeSans 560 90 0 0 wbs_dat_i[10]
+port 2614 nsew
+flabel metal2 s 52522 -960 52634 480 0 FreeSans 560 90 0 0 wbs_dat_i[11]
+port 2615 nsew
+flabel metal2 s 56018 -960 56130 480 0 FreeSans 560 90 0 0 wbs_dat_i[12]
+port 2616 nsew
+flabel metal2 s 59606 -960 59718 480 0 FreeSans 560 90 0 0 wbs_dat_i[13]
+port 2617 nsew
+flabel metal2 s 63194 -960 63306 480 0 FreeSans 560 90 0 0 wbs_dat_i[14]
+port 2618 nsew
+flabel metal2 s 66690 -960 66802 480 0 FreeSans 560 90 0 0 wbs_dat_i[15]
+port 2619 nsew
+flabel metal2 s 70278 -960 70390 480 0 FreeSans 560 90 0 0 wbs_dat_i[16]
+port 2620 nsew
+flabel metal2 s 73774 -960 73886 480 0 FreeSans 560 90 0 0 wbs_dat_i[17]
+port 2621 nsew
+flabel metal2 s 77362 -960 77474 480 0 FreeSans 560 90 0 0 wbs_dat_i[18]
+port 2622 nsew
+flabel metal2 s 80858 -960 80970 480 0 FreeSans 560 90 0 0 wbs_dat_i[19]
+port 2623 nsew
+flabel metal2 s 13514 -960 13626 480 0 FreeSans 560 90 0 0 wbs_dat_i[1]
+port 2624 nsew
+flabel metal2 s 84446 -960 84558 480 0 FreeSans 560 90 0 0 wbs_dat_i[20]
+port 2625 nsew
+flabel metal2 s 87942 -960 88054 480 0 FreeSans 560 90 0 0 wbs_dat_i[21]
+port 2626 nsew
+flabel metal2 s 91530 -960 91642 480 0 FreeSans 560 90 0 0 wbs_dat_i[22]
+port 2627 nsew
+flabel metal2 s 95118 -960 95230 480 0 FreeSans 560 90 0 0 wbs_dat_i[23]
+port 2628 nsew
+flabel metal2 s 98614 -960 98726 480 0 FreeSans 560 90 0 0 wbs_dat_i[24]
+port 2629 nsew
+flabel metal2 s 102202 -960 102314 480 0 FreeSans 560 90 0 0 wbs_dat_i[25]
+port 2630 nsew
+flabel metal2 s 105698 -960 105810 480 0 FreeSans 560 90 0 0 wbs_dat_i[26]
+port 2631 nsew
+flabel metal2 s 109286 -960 109398 480 0 FreeSans 560 90 0 0 wbs_dat_i[27]
+port 2632 nsew
+flabel metal2 s 112782 -960 112894 480 0 FreeSans 560 90 0 0 wbs_dat_i[28]
+port 2633 nsew
+flabel metal2 s 116370 -960 116482 480 0 FreeSans 560 90 0 0 wbs_dat_i[29]
+port 2634 nsew
+flabel metal2 s 18206 -960 18318 480 0 FreeSans 560 90 0 0 wbs_dat_i[2]
+port 2635 nsew
+flabel metal2 s 119866 -960 119978 480 0 FreeSans 560 90 0 0 wbs_dat_i[30]
+port 2636 nsew
+flabel metal2 s 123454 -960 123566 480 0 FreeSans 560 90 0 0 wbs_dat_i[31]
+port 2637 nsew
+flabel metal2 s 22990 -960 23102 480 0 FreeSans 560 90 0 0 wbs_dat_i[3]
+port 2638 nsew
+flabel metal2 s 27682 -960 27794 480 0 FreeSans 560 90 0 0 wbs_dat_i[4]
+port 2639 nsew
+flabel metal2 s 31270 -960 31382 480 0 FreeSans 560 90 0 0 wbs_dat_i[5]
+port 2640 nsew
+flabel metal2 s 34766 -960 34878 480 0 FreeSans 560 90 0 0 wbs_dat_i[6]
+port 2641 nsew
+flabel metal2 s 38354 -960 38466 480 0 FreeSans 560 90 0 0 wbs_dat_i[7]
+port 2642 nsew
+flabel metal2 s 41850 -960 41962 480 0 FreeSans 560 90 0 0 wbs_dat_i[8]
+port 2643 nsew
+flabel metal2 s 45438 -960 45550 480 0 FreeSans 560 90 0 0 wbs_dat_i[9]
+port 2644 nsew
+flabel metal2 s 9926 -960 10038 480 0 FreeSans 560 90 0 0 wbs_dat_o[0]
+port 2645 nsew
+flabel metal2 s 50130 -960 50242 480 0 FreeSans 560 90 0 0 wbs_dat_o[10]
+port 2646 nsew
+flabel metal2 s 53718 -960 53830 480 0 FreeSans 560 90 0 0 wbs_dat_o[11]
+port 2647 nsew
+flabel metal2 s 57214 -960 57326 480 0 FreeSans 560 90 0 0 wbs_dat_o[12]
+port 2648 nsew
+flabel metal2 s 60802 -960 60914 480 0 FreeSans 560 90 0 0 wbs_dat_o[13]
+port 2649 nsew
+flabel metal2 s 64298 -960 64410 480 0 FreeSans 560 90 0 0 wbs_dat_o[14]
+port 2650 nsew
+flabel metal2 s 67886 -960 67998 480 0 FreeSans 560 90 0 0 wbs_dat_o[15]
+port 2651 nsew
+flabel metal2 s 71474 -960 71586 480 0 FreeSans 560 90 0 0 wbs_dat_o[16]
+port 2652 nsew
+flabel metal2 s 74970 -960 75082 480 0 FreeSans 560 90 0 0 wbs_dat_o[17]
+port 2653 nsew
+flabel metal2 s 78558 -960 78670 480 0 FreeSans 560 90 0 0 wbs_dat_o[18]
+port 2654 nsew
+flabel metal2 s 82054 -960 82166 480 0 FreeSans 560 90 0 0 wbs_dat_o[19]
+port 2655 nsew
+flabel metal2 s 14710 -960 14822 480 0 FreeSans 560 90 0 0 wbs_dat_o[1]
+port 2656 nsew
+flabel metal2 s 85642 -960 85754 480 0 FreeSans 560 90 0 0 wbs_dat_o[20]
+port 2657 nsew
+flabel metal2 s 89138 -960 89250 480 0 FreeSans 560 90 0 0 wbs_dat_o[21]
+port 2658 nsew
+flabel metal2 s 92726 -960 92838 480 0 FreeSans 560 90 0 0 wbs_dat_o[22]
+port 2659 nsew
+flabel metal2 s 96222 -960 96334 480 0 FreeSans 560 90 0 0 wbs_dat_o[23]
+port 2660 nsew
+flabel metal2 s 99810 -960 99922 480 0 FreeSans 560 90 0 0 wbs_dat_o[24]
+port 2661 nsew
+flabel metal2 s 103306 -960 103418 480 0 FreeSans 560 90 0 0 wbs_dat_o[25]
+port 2662 nsew
+flabel metal2 s 106894 -960 107006 480 0 FreeSans 560 90 0 0 wbs_dat_o[26]
+port 2663 nsew
+flabel metal2 s 110482 -960 110594 480 0 FreeSans 560 90 0 0 wbs_dat_o[27]
+port 2664 nsew
+flabel metal2 s 113978 -960 114090 480 0 FreeSans 560 90 0 0 wbs_dat_o[28]
+port 2665 nsew
+flabel metal2 s 117566 -960 117678 480 0 FreeSans 560 90 0 0 wbs_dat_o[29]
+port 2666 nsew
+flabel metal2 s 19402 -960 19514 480 0 FreeSans 560 90 0 0 wbs_dat_o[2]
+port 2667 nsew
+flabel metal2 s 121062 -960 121174 480 0 FreeSans 560 90 0 0 wbs_dat_o[30]
+port 2668 nsew
+flabel metal2 s 124650 -960 124762 480 0 FreeSans 560 90 0 0 wbs_dat_o[31]
+port 2669 nsew
+flabel metal2 s 24186 -960 24298 480 0 FreeSans 560 90 0 0 wbs_dat_o[3]
+port 2670 nsew
+flabel metal2 s 28878 -960 28990 480 0 FreeSans 560 90 0 0 wbs_dat_o[4]
+port 2671 nsew
+flabel metal2 s 32374 -960 32486 480 0 FreeSans 560 90 0 0 wbs_dat_o[5]
+port 2672 nsew
+flabel metal2 s 35962 -960 36074 480 0 FreeSans 560 90 0 0 wbs_dat_o[6]
+port 2673 nsew
+flabel metal2 s 39550 -960 39662 480 0 FreeSans 560 90 0 0 wbs_dat_o[7]
+port 2674 nsew
+flabel metal2 s 43046 -960 43158 480 0 FreeSans 560 90 0 0 wbs_dat_o[8]
+port 2675 nsew
+flabel metal2 s 46634 -960 46746 480 0 FreeSans 560 90 0 0 wbs_dat_o[9]
+port 2676 nsew
+flabel metal2 s 11122 -960 11234 480 0 FreeSans 560 90 0 0 wbs_sel_i[0]
+port 2677 nsew
+flabel metal2 s 15906 -960 16018 480 0 FreeSans 560 90 0 0 wbs_sel_i[1]
+port 2678 nsew
+flabel metal2 s 20598 -960 20710 480 0 FreeSans 560 90 0 0 wbs_sel_i[2]
+port 2679 nsew
+flabel metal2 s 25290 -960 25402 480 0 FreeSans 560 90 0 0 wbs_sel_i[3]
+port 2680 nsew
+flabel metal2 s 5234 -960 5346 480 0 FreeSans 560 90 0 0 wbs_stb_i
+port 2681 nsew
+flabel metal2 s 6430 -960 6542 480 0 FreeSans 560 90 0 0 wbs_we_i
+port 2682 nsew
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/mpw_precheck/outputs/user_project_wrapper.xor.gds b/mpw_precheck/outputs/user_project_wrapper.xor.gds
new file mode 100644
index 0000000..0030629
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.xor.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..46893a6
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_erased.gds b/mpw_precheck/outputs/user_project_wrapper_erased.gds
new file mode 100644
index 0000000..8655d85
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_erased.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz b/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz
new file mode 100644
index 0000000..427bf46
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz
Binary files differ
diff --git a/signoff/.gitignore b/signoff/.gitignore
new file mode 100644
index 0000000..6407046
--- /dev/null
+++ b/signoff/.gitignore
@@ -0,0 +1 @@
+cdrcpost/*
diff --git a/signoff/assigned_slot b/signoff/assigned_slot
new file mode 100644
index 0000000..81c9fd4
--- /dev/null
+++ b/signoff/assigned_slot
@@ -0,0 +1 @@
+014
diff --git a/signoff/caravel_layout.png b/signoff/caravel_layout.png
new file mode 100644
index 0000000..3860a05
--- /dev/null
+++ b/signoff/caravel_layout.png
Binary files differ
diff --git a/tapeout/logs/compose.log b/tapeout/logs/compose.log
new file mode 100644
index 0000000..67ea2ca
--- /dev/null
+++ b/tapeout/logs/compose.log
@@ -0,0 +1,1757 @@
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/compose.tcl" from command line.
+caravel: 10000 rects
+caravel: 20000 rects
+caravel: 30000 rects
+caravel: 40000 rects
+caravel: 50000 rects
+caravel: 60000 rects
+caravel: 70000 rects
+caravel: 80000 rects
+caravel
+Scaled magic input cell advSeal_6um_gen geometry by factor of 2
+Writing final GDS. . . 
+Scaled magic input cell seal_ring_corner_abstract geometry by factor of 2
+Scaled magic input cell caravel_motto geometry by factor of 2
+Scaled magic input cell font_22 geometry by factor of 24
+Scaled magic input cell font_73 geometry by factor of 24
+Scaled magic input cell font_43 geometry by factor of 24
+Scaled magic input cell font_49 geometry by factor of 24
+Scaled magic input cell font_65 geometry by factor of 24
+Scaled magic input cell font_68 geometry by factor of 24
+Scaled magic input cell font_54 geometry by factor of 24
+Scaled magic input cell font_67 geometry by factor of 24
+Scaled magic input cell font_6E geometry by factor of 24
+Scaled magic input cell font_69 geometry by factor of 24
+Scaled magic input cell font_6C geometry by factor of 24
+Scaled magic input cell font_61 geometry by factor of 24
+Scaled magic input cell font_53 geometry by factor of 24
+Scaled magic input cell font_79 geometry by factor of 24
+Scaled magic input cell font_76 geometry by factor of 24
+Scaled magic input cell font_74 geometry by factor of 24
+Scaled magic input cell font_72 geometry by factor of 24
+Scaled magic input cell font_70 geometry by factor of 24
+Scaled magic input cell font_66 geometry by factor of 24
+Scaled magic input cell font_63 geometry by factor of 24
+Scaled magic input cell font_62 geometry by factor of 24
+Scaled magic input cell font_57 geometry by factor of 24
+Scaled magic input cell font_56 geometry by factor of 24
+Scaled magic input cell font_50 geometry by factor of 24
+Scaled magic input cell font_47 geometry by factor of 24
+Scaled magic input cell font_44 geometry by factor of 24
+Scaled magic input cell font_35 geometry by factor of 24
+Scaled magic input cell font_32 geometry by factor of 24
+Scaled magic input cell font_30 geometry by factor of 24
+Scaled magic input cell font_29 geometry by factor of 24
+Scaled magic input cell font_28 geometry by factor of 24
+Scaled magic input cell font_20 geometry by factor of 24
+Scaled magic input cell font_6F geometry by factor of 24
+Scaled magic input cell font_6B geometry by factor of 24
+Scaled magic input cell font_4F geometry by factor of 24
+Scaled magic input cell font_4B geometry by factor of 24
+Scaled magic input cell font_2D geometry by factor of 24
+Scaled magic input cell open_source geometry by factor of 2
+Scaled magic input cell user_id_textblock geometry by factor of 2
+Scaled magic input cell alpha_0 geometry by factor of 2
+Scaled magic input cell user_project_wrapper geometry by factor of 2
+user_project_wrapper: 10000 rects
+user_project_wrapper: 20000 rects
+user_project_wrapper: 30000 rects
+user_project_wrapper: 40000 rects
+user_project_wrapper: 50000 rects
+Processing timestamp mismatches: sky130_ef_sc_hd__decap_12, sky130_fd_sc_hd__buf_8, sky130_fd_sc_hd__tapvpwrvgnd_1, sky130_ef_io__com_bus_slice_10um, sky130_ef_io__com_bus_slice_20um, sky130_ef_io__com_bus_slice_1um, sky130_ef_io__com_bus_slice_5um, sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um, sky130_ef_io__disconnect_vdda_slice_5um, sky130_ef_io__vccd_lvc_clamped_pad, sky130_ef_io__vddio_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped_pad, sky130_ef_io__vssio_hvc_clamped_pad, sky130_ef_io__gpiov2_pad_wrapped, sky130_fd_io__top_xres4v2, sky130_ef_io__corner_pad, sky130_ef_io__vccd_lvc_clamped3_pad, sky130_ef_io__vdda_hvc_clamped_pad, sky130_ef_io__vssa_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped3_pad, gpio_control_power_routing, gpio_control_power_routing_right, gpio_control_power_routing_top, mgmt_protect, spare_logic_block, user_id_programming, simple_por, digital_pll, housekeeping, gpio_defaults_block, gpio_control_block, buff_flash_clkrst, caravel_clocking, xres_buf, seal_ring_corner_abstract.
+   Generating output for cell advSeal_6um_gen
+Reading "sealring_slots".
+Reading "seal_ring_slots_array".
+Reading "sr_polygon00011".
+Reading "sr_polygon00039".
+Reading "sr_polygon00035".
+Reading "sr_polygon00015".
+Reading "sr_polygon00007".
+Reading "sr_polygon00001".
+Reading "sr_polygon00002".
+Reading "sr_polygon00003".
+Reading "sr_polygon00004".
+Reading "sr_polygon00005".
+Reading "sr_polygon00006".
+Reading "nikon_sealring_shape".
+Reading "sr_polygon00019".
+Reading "sr_polygon00023".
+Reading "sr_polygon00027".
+Reading "sr_polygon00031".
+Reading "sr_polygon00036".
+Reading "sr_polygon00032".
+Reading "sr_polygon00016".
+Reading "sr_polygon00020".
+Reading "sr_polygon00024".
+Reading "sr_polygon00028".
+Reading "seal_ring_corner".
+Reading "advSeal_6um_gen".
+   Generating output for cell caravel_0008754b_fill_pattern
+Reading "caravel_0008754b_fill_pattern_0_0".
+Reading "caravel_0008754b_fill_pattern_1_0".
+Reading "caravel_0008754b_fill_pattern_0_1".
+Reading "caravel_0008754b_fill_pattern_1_1".
+Reading "caravel_0008754b_fill_pattern_2_0".
+Reading "caravel_0008754b_fill_pattern_2_1".
+Reading "caravel_0008754b_fill_pattern_3_0".
+Reading "caravel_0008754b_fill_pattern_3_1".
+Reading "caravel_0008754b_fill_pattern_4_0".
+Reading "caravel_0008754b_fill_pattern_4_1".
+Reading "caravel_0008754b_fill_pattern_5_0".
+Reading "caravel_0008754b_fill_pattern_5_1".
+Reading "caravel_0008754b_fill_pattern_0_2".
+Reading "caravel_0008754b_fill_pattern_1_2".
+Reading "caravel_0008754b_fill_pattern_2_2".
+Reading "caravel_0008754b_fill_pattern_3_2".
+Reading "caravel_0008754b_fill_pattern_4_2".
+Reading "caravel_0008754b_fill_pattern_5_2".
+Reading "caravel_0008754b_fill_pattern_0_3".
+Reading "caravel_0008754b_fill_pattern_1_3".
+Reading "caravel_0008754b_fill_pattern_2_3".
+Reading "caravel_0008754b_fill_pattern_3_3".
+Reading "caravel_0008754b_fill_pattern_4_3".
+Reading "caravel_0008754b_fill_pattern_5_3".
+Reading "caravel_0008754b_fill_pattern_0_4".
+Reading "caravel_0008754b_fill_pattern_1_4".
+Reading "caravel_0008754b_fill_pattern_2_4".
+Reading "caravel_0008754b_fill_pattern_3_4".
+Reading "caravel_0008754b_fill_pattern_4_4".
+Reading "caravel_0008754b_fill_pattern_5_4".
+Reading "caravel_0008754b_fill_pattern_0_5".
+Reading "caravel_0008754b_fill_pattern_1_5".
+Reading "caravel_0008754b_fill_pattern_2_5".
+Reading "caravel_0008754b_fill_pattern_3_5".
+Reading "caravel_0008754b_fill_pattern_4_5".
+Reading "caravel_0008754b_fill_pattern_5_5".
+Reading "caravel_0008754b_fill_pattern_0_6".
+Reading "caravel_0008754b_fill_pattern_1_6".
+Reading "caravel_0008754b_fill_pattern_2_6".
+Reading "caravel_0008754b_fill_pattern_3_6".
+Reading "caravel_0008754b_fill_pattern_4_6".
+Reading "caravel_0008754b_fill_pattern_5_6".
+Reading "caravel_0008754b_fill_pattern_0_7".
+Reading "caravel_0008754b_fill_pattern_1_7".
+Reading "caravel_0008754b_fill_pattern_2_7".
+Reading "caravel_0008754b_fill_pattern_3_7".
+Reading "caravel_0008754b_fill_pattern_4_7".
+Reading "caravel_0008754b_fill_pattern_5_7".
+Reading "caravel_0008754b_fill_pattern".
+   Generating output for cell caravel
+Reading "caravel_logo".
+Reading "font_22".
+Reading "font_73".
+Reading "font_43".
+Reading "font_49".
+Reading "font_65".
+Reading "font_68".
+Reading "font_54".
+Reading "font_67".
+Reading "font_6E".
+Reading "font_69".
+Reading "font_6C".
+Reading "font_61".
+Reading "font_53".
+Reading "caravel_motto".
+Reading "font_79".
+Reading "font_76".
+Reading "font_74".
+Reading "font_72".
+Reading "font_70".
+Reading "font_66".
+Reading "font_63".
+Reading "font_62".
+Reading "font_57".
+Reading "font_56".
+Reading "font_50".
+Reading "font_47".
+Reading "font_44".
+Reading "font_35".
+Reading "font_32".
+Reading "font_30".
+Reading "font_29".
+Reading "font_28".
+Reading "font_20".
+Reading "font_6F".
+Reading "font_6B".
+Reading "font_4F".
+Reading "font_4B".
+Reading "font_2D".
+Reading "copyright_block".
+Reading "open_source".
+Reading "sky130_fd_sc_hvl__decap_8".
+Reading "sky130_fd_sc_hvl__decap_4".
+Reading "sky130_fd_sc_hvl__diode_2".
+Reading "sky130_fd_sc_hvl__fill_1".
+Reading "sky130_fd_sc_hvl__fill_2".
+Reading "sky130_fd_sc_hvl__lsbufhv2lv_1".
+Reading "xres_buf".
+Reading "alpha_8".
+Reading "alpha_7".
+Reading "alpha_5".
+Reading "alpha_4".
+Reading "alpha_B".
+Reading "alpha_0".
+Reading "user_id_textblock".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "gpio_defaults_block_1803".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__nand4bb_1".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a41oi_1".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "caravel_clocking".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "buff_flash_clkrst".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__macro_sparecell".
+Reading "sky130_fd_sc_hd__dfbbn_2".
+Reading "sky130_fd_sc_hd__or2_0".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__and2_0".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__buf_16".
+Reading "gpio_logic_high".
+Reading "gpio_control_block".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "housekeeping".
+Reading "sky130_fd_sc_hd__einvp_1".
+Reading "sky130_fd_sc_hd__clkinv_1".
+Reading "sky130_fd_sc_hd__einvn_4".
+Reading "sky130_fd_sc_hd__einvn_8".
+Reading "sky130_fd_sc_hd__einvp_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__nand4b_2".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "digital_pll".
+Reading "user_id_programming".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "HN_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "HN_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "HN_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "HN_sky130_fd_sc_hvl__schmittbuf_1".
+Reading "HN_sky130_fd_sc_hvl__buf_8".
+Reading "HN_sky130_fd_sc_hvl__inv_8".
+Reading "HN_sky130_fd_sc_hvl__fill_4".
+Reading "HN_sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "HN_sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "HN_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+Reading "RQ_sky130_fd_sc_hd__decap_3".
+Reading "RQ_sky130_ef_sc_hd__decap_12".
+Reading "RQ_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "RQ_sky130_fd_sc_hd__fill_1".
+Reading "RQ_sky130_fd_sc_hd__decap_4".
+Reading "RQ_sky130_fd_sc_hd__decap_6".
+Reading "RQ_sky130_fd_sc_hd__fill_2".
+Reading "RQ_sky130_fd_sc_hd__decap_8".
+Reading "RQ_sky130_fd_sc_hd__diode_2".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_16".
+Reading "RQ_sky130_fd_sc_hd__o211a_1".
+Reading "RQ_sky130_fd_sc_hd__dfxtp_2".
+Reading "RQ_sky130_fd_sc_hd__o21a_1".
+Reading "RQ_sky130_fd_sc_hd__mux2_1".
+Reading "RQ_sky130_fd_sc_hd__or2_1".
+Reading "RQ_sky130_fd_sc_hd__dfxtp_1".
+Reading "RQ_sky130_fd_sc_hd__a22o_1".
+Reading "RQ_sky130_fd_sc_hd__a21o_2".
+Reading "RQ_sky130_fd_sc_hd__a21o_1".
+Reading "RQ_sky130_fd_sc_hd__a22o_4".
+Reading "RQ_sky130_fd_sc_hd__buf_8".
+Reading "RQ_sky130_fd_sc_hd__o21a_2".
+Reading "RQ_sky130_fd_sc_hd__mux2_2".
+Reading "RQ_sky130_fd_sc_hd__buf_4".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_8".
+Reading "RQ_sky130_fd_sc_hd__buf_6".
+Reading "RQ_sky130_fd_sc_hd__dfxtp_4".
+Reading "RQ_sky130_fd_sc_hd__buf_2".
+Reading "RQ_sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "RQ_sky130_fd_sc_hd__o21ai_1".
+Reading "RQ_sky130_fd_sc_hd__mux4_1".
+Reading "RQ_sky130_fd_sc_hd__buf_12".
+Reading "RQ_sky130_fd_sc_hd__mux4_2".
+Reading "RQ_sky130_fd_sc_hd__inv_2".
+Reading "RQ_sky130_fd_sc_hd__and3_2".
+Reading "RQ_sky130_fd_sc_hd__nand2_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2o_1".
+Reading "RQ_sky130_fd_sc_hd__or3b_1".
+Reading "RQ_sky130_fd_sc_hd__o32a_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2o_2".
+Reading "RQ_sky130_fd_sc_hd__o311a_1".
+Reading "RQ_sky130_fd_sc_hd__o221a_1".
+Reading "RQ_sky130_fd_sc_hd__o31a_1".
+Reading "RQ_sky130_fd_sc_hd__o211a_2".
+Reading "RQ_sky130_fd_sc_hd__and3_1".
+Reading "RQ_sky130_fd_sc_hd__a211oi_1".
+Reading "RQ_sky130_fd_sc_hd__and4_4".
+Reading "RQ_sky130_fd_sc_hd__and4_1".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_4".
+Reading "RQ_sky130_fd_sc_hd__and3b_1".
+Reading "RQ_sky130_fd_sc_hd__a211o_4".
+Reading "RQ_sky130_fd_sc_hd__a211o_1".
+Reading "RQ_sky130_fd_sc_hd__o21ba_1".
+Reading "RQ_sky130_fd_sc_hd__a21oi_1".
+Reading "RQ_sky130_fd_sc_hd__nor2_1".
+Reading "RQ_sky130_fd_sc_hd__nand2_8".
+Reading "RQ_sky130_fd_sc_hd__a311o_1".
+Reading "RQ_sky130_fd_sc_hd__nor2_2".
+Reading "RQ_sky130_fd_sc_hd__a41o_1".
+Reading "RQ_sky130_fd_sc_hd__nor3_2".
+Reading "RQ_sky130_fd_sc_hd__or4bb_4".
+Reading "RQ_sky130_fd_sc_hd__nor3_1".
+Reading "RQ_sky130_fd_sc_hd__or4b_4".
+Reading "RQ_sky130_fd_sc_hd__or3b_4".
+Reading "RQ_sky130_fd_sc_hd__a31o_1".
+Reading "RQ_sky130_fd_sc_hd__a211o_2".
+Reading "RQ_sky130_fd_sc_hd__or2_2".
+Reading "RQ_sky130_fd_sc_hd__a31o_2".
+Reading "RQ_sky130_fd_sc_hd__a221o_1".
+Reading "RQ_sky130_fd_sc_hd__and4b_4".
+Reading "RQ_sky130_fd_sc_hd__and3_4".
+Reading "RQ_sky130_fd_sc_hd__mux2_8".
+Reading "RQ_sky130_fd_sc_hd__o21ai_2".
+Reading "RQ_sky130_fd_sc_hd__and4b_1".
+Reading "RQ_sky130_fd_sc_hd__or4b_1".
+Reading "RQ_sky130_fd_sc_hd__o211a_4".
+Reading "RQ_sky130_fd_sc_hd__a32o_1".
+Reading "RQ_sky130_fd_sc_hd__a21boi_1".
+Reading "RQ_sky130_fd_sc_hd__o41ai_4".
+Reading "RQ_sky130_fd_sc_hd__o31a_2".
+Reading "RQ_sky130_fd_sc_hd__nand2_4".
+Reading "RQ_sky130_fd_sc_hd__a31oi_4".
+Reading "RQ_sky130_fd_sc_hd__and4_2".
+Reading "RQ_sky130_fd_sc_hd__nand3_4".
+Reading "RQ_sky130_fd_sc_hd__and4b_2".
+Reading "RQ_sky130_fd_sc_hd__o41a_4".
+Reading "RQ_sky130_fd_sc_hd__and4bb_2".
+Reading "RQ_sky130_fd_sc_hd__clkinv_2".
+Reading "RQ_sky130_fd_sc_hd__and2b_2".
+Reading "RQ_sky130_fd_sc_hd__or4bb_1".
+Reading "RQ_sky130_fd_sc_hd__a21oi_2".
+Reading "RQ_sky130_fd_sc_hd__a221oi_1".
+Reading "RQ_sky130_fd_sc_hd__a31oi_1".
+Reading "RQ_sky130_fd_sc_hd__xor2_4".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_1".
+Reading "RQ_sky130_fd_sc_hd__nand3b_4".
+Reading "RQ_sky130_fd_sc_hd__nand2_2".
+Reading "RQ_sky130_fd_sc_hd__xnor2_1".
+Reading "RQ_sky130_fd_sc_hd__and2_1".
+Reading "RQ_sky130_fd_sc_hd__nor2_4".
+Reading "RQ_sky130_fd_sc_hd__nand4_4".
+Reading "RQ_sky130_fd_sc_hd__a32o_2".
+Reading "RQ_sky130_fd_sc_hd__nor4_1".
+Reading "RQ_sky130_fd_sc_hd__nand4_1".
+Reading "RQ_sky130_fd_sc_hd__xor2_1".
+Reading "RQ_sky130_fd_sc_hd__and4bb_4".
+Reading "RQ_sky130_fd_sc_hd__a41o_2".
+Reading "RQ_sky130_fd_sc_hd__o2bb2a_1".
+Reading "RQ_sky130_fd_sc_hd__xnor2_2".
+Reading "RQ_sky130_fd_sc_hd__xor2_2".
+Reading "RQ_sky130_fd_sc_hd__or2_4".
+Reading "RQ_sky130_fd_sc_hd__a2111oi_2".
+Reading "RQ_sky130_fd_sc_hd__nor4_4".
+Reading "RQ_sky130_fd_sc_hd__mux2_4".
+Reading "RQ_sky130_fd_sc_hd__and2b_1".
+Reading "RQ_sky130_fd_sc_hd__and2_2".
+Reading "RQ_sky130_fd_sc_hd__nor4b_1".
+Reading "RQ_sky130_fd_sc_hd__o2111ai_4".
+Reading "RQ_sky130_fd_sc_hd__nor4_2".
+Reading "RQ_sky130_fd_sc_hd__nand3b_2".
+Reading "RQ_sky130_fd_sc_hd__nand3_1".
+Reading "RQ_sky130_fd_sc_hd__nand2b_2".
+Reading "RQ_sky130_fd_sc_hd__o31ai_1".
+Reading "RQ_sky130_fd_sc_hd__o41a_1".
+Reading "RQ_sky130_fd_sc_hd__a21bo_1".
+Reading "RQ_sky130_fd_sc_hd__o41ai_1".
+Reading "RQ_sky130_fd_sc_hd__nand3b_1".
+Reading "RQ_sky130_fd_sc_hd__o2111a_1".
+Reading "RQ_sky130_fd_sc_hd__o21a_4".
+Reading "RQ_sky130_fd_sc_hd__o22a_1".
+Reading "RQ_sky130_fd_sc_hd__or3b_2".
+Reading "RQ_sky130_fd_sc_hd__nand2b_1".
+Reading "RQ_sky130_fd_sc_hd__nor4b_4".
+Reading "RQ_sky130_fd_sc_hd__o21bai_1".
+Reading "RQ_sky130_fd_sc_hd__nor3_4".
+Reading "RQ_sky130_fd_sc_hd__o41a_2".
+Reading "RQ_sky130_fd_sc_hd__or4b_2".
+Reading "RQ_sky130_fd_sc_hd__a221o_4".
+Reading "RQ_sky130_fd_sc_hd__a2111oi_1".
+Reading "RQ_sky130_fd_sc_hd__o31a_4".
+Reading "RQ_sky130_fd_sc_hd__nor2_8".
+Reading "RQ_sky130_fd_sc_hd__clkinv_4".
+Reading "RQ_sky130_fd_sc_hd__a221o_2".
+Reading "RQ_sky130_fd_sc_hd__o21ai_4".
+Reading "RQ_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_2".
+Reading "RQ_sky130_fd_sc_hd__a31o_4".
+Reading "RQ_sky130_fd_sc_hd__ebufn_4".
+Reading "RQ_sky130_fd_sc_hd__dlxtp_1".
+Reading "RQ_sky130_fd_sc_hd__dlclkp_1".
+Reading "RQ_sky130_fd_sc_hd__conb_1".
+Reading "RQ_sky130_fd_sc_hd__inv_1".
+Reading "RQ_sky130_fd_sc_hd__nor4b_2".
+Reading "RQ_sky130_fd_sc_hd__and3b_2".
+Reading "RQ_sky130_fd_sc_hd__nor3b_2".
+Reading "RQ_RAM256".
+Reading "RQ_sky130_fd_sc_hd__a21o_4".
+Reading "RQ_sky130_fd_sc_hd__o2111a_4".
+Reading "RQ_sky130_fd_sc_hd__a22o_2".
+Reading "RQ_sky130_fd_sc_hd__o211ai_4".
+Reading "RQ_sky130_fd_sc_hd__o22ai_4".
+Reading "RQ_sky130_fd_sc_hd__a221oi_4".
+Reading "RQ_sky130_fd_sc_hd__and2b_4".
+Reading "RQ_sky130_fd_sc_hd__and3b_4".
+Reading "RQ_sky130_fd_sc_hd__and4bb_1".
+Reading "RQ_sky130_fd_sc_hd__a21oi_4".
+Reading "RQ_sky130_fd_sc_hd__o22ai_1".
+Reading "RQ_sky130_fd_sc_hd__inv_4".
+Reading "RQ_sky130_fd_sc_hd__a311o_2".
+Reading "RQ_sky130_fd_sc_hd__a2111o_1".
+Reading "RQ_sky130_fd_sc_hd__o311a_4".
+Reading "RQ_sky130_fd_sc_hd__o2111ai_1".
+Reading "RQ_sky130_fd_sc_hd__clkinv_8".
+Reading "RQ_sky130_fd_sc_hd__nand3_2".
+Reading "RQ_sky130_fd_sc_hd__a22oi_1".
+Reading "RQ_sky130_fd_sc_hd__nand4b_4".
+Reading "RQ_sky130_fd_sc_hd__o221ai_4".
+Reading "RQ_sky130_fd_sc_hd__nand4_2".
+Reading "RQ_sky130_fd_sc_hd__inv_6".
+Reading "RQ_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "RQ_sky130_fd_sc_hd__a311oi_4".
+Reading "RQ_sky130_fd_sc_hd__o32ai_4".
+Reading "RQ_sky130_fd_sc_hd__o211ai_1".
+Reading "RQ_sky130_fd_sc_hd__nand4b_1".
+Reading "RQ_sky130_fd_sc_hd__o211ai_2".
+Reading "RQ_sky130_fd_sc_hd__a22oi_4".
+Reading "RQ_sky130_fd_sc_hd__and2_4".
+Reading "RQ_sky130_fd_sc_hd__a211oi_4".
+Reading "RQ_sky130_fd_sc_hd__nor3b_4".
+Reading "RQ_sky130_fd_sc_hd__o22a_2".
+Reading "RQ_sky130_fd_sc_hd__a2111oi_4".
+Reading "RQ_sky130_fd_sc_hd__nand2b_4".
+Reading "RQ_sky130_fd_sc_hd__a2bb2o_4".
+Reading "RQ_sky130_fd_sc_hd__o2bb2a_2".
+Reading "RQ_sky130_fd_sc_hd__o2111ai_2".
+Reading "RQ_sky130_fd_sc_hd__a22oi_2".
+Reading "RQ_sky130_fd_sc_hd__nor3b_1".
+Reading "RQ_sky130_fd_sc_hd__o2bb2a_4".
+Reading "RQ_sky130_fd_sc_hd__o21bai_4".
+Reading "RQ_sky130_fd_sc_hd__o311ai_1".
+Reading "RQ_sky130_fd_sc_hd__a32oi_2".
+Reading "RQ_sky130_fd_sc_hd__o2bb2ai_2".
+Reading "RQ_sky130_fd_sc_hd__o311ai_4".
+Reading "RQ_sky130_fd_sc_hd__o2bb2ai_4".
+Reading "RQ_sky130_fd_sc_hd__o31ai_4".
+Reading "RQ_sky130_fd_sc_hd__o221a_2".
+Reading "RQ_sky130_fd_sc_hd__o2111a_2".
+Reading "RQ_sky130_fd_sc_hd__a31oi_2".
+Reading "RQ_sky130_fd_sc_hd__o311a_2".
+Reading "RQ_sky130_fd_sc_hd__o22a_4".
+Reading "RQ_sky130_fd_sc_hd__a32oi_4".
+Reading "RQ_sky130_fd_sc_hd__a211oi_2".
+Reading "RQ_sky130_fd_sc_hd__o31ai_2".
+Reading "RQ_sky130_fd_sc_hd__o221ai_1".
+Reading "RQ_sky130_fd_sc_hd__clkinv_16".
+Reading "RQ_sky130_fd_sc_hd__or4bb_2".
+Reading "RQ_sky130_fd_sc_hd__a221oi_2".
+Reading "RQ_sky130_fd_sc_hd__inv_8".
+Reading "RQ_sky130_fd_sc_hd__a311oi_2".
+Reading "RQ_sky130_fd_sc_hd__a311oi_1".
+Reading "RQ_sky130_fd_sc_hd__o311ai_2".
+Reading "RQ_sky130_fd_sc_hd__a32oi_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2oi_2".
+Reading "RQ_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "RQ_sky130_fd_sc_hd__xnor2_4".
+Reading "RQ_sky130_fd_sc_hd__inv_12".
+Reading "RQ_sky130_fd_sc_hd__a2111o_4".
+Reading "RQ_sky130_fd_sc_hd__a32o_4".
+Reading "RQ_sky130_fd_sc_hd__o21ba_2".
+Reading "RQ_sky130_fd_sc_hd__a41oi_2".
+Reading "RQ_sky130_fd_sc_hd__o22ai_2".
+Reading "RQ_sky130_fd_sc_hd__o21bai_2".
+Reading "RQ_sky130_fd_sc_hd__a41oi_4".
+Reading "RQ_sky130_fd_sc_hd__a41o_4".
+Reading "RQ_sky130_fd_sc_hd__a311o_4".
+Reading "RQ_sky130_fd_sc_hd__o32ai_1".
+Reading "RQ_sky130_fd_sc_hd__a21boi_4".
+Reading "RQ_sky130_fd_sc_hd__o32ai_2".
+Reading "RQ_sky130_fd_sc_hd__a21bo_2".
+Reading "RQ_RAM128".
+Reading "mgmt_core_wrapper".
+Reading "gpio_defaults_block_0403".
+Reading "gpio_defaults_block_1801".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__dfbbp_1".
+Reading "spare_logic_block".
+Reading "sky130_fd_sc_hd__bufbuf_8".
+Reading "sky130_fd_sc_hvl__conb_1".
+Reading "mgmt_protect_hv".
+Reading "mprj_logic_high".
+Reading "mprj2_logic_high".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "mgmt_protect".
+Reading "gpio_defaults_block_0801".
+Reading "gpio_control_power_routing_top".
+Reading "gpio_control_power_routing_right".
+Reading "gpio_control_power_routing".
+Reading "caravel_power_routing".
+Reading "U9_sky130_fd_sc_hd__clkbuf_4".
+Reading "U9_sky130_fd_sc_hd__decap_3".
+Reading "U9_sky130_fd_sc_hd__decap_4".
+Reading "U9_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "U9_sky130_fd_sc_hd__fill_2".
+Reading "U9_sky130_fd_sc_hd__diode_2".
+Reading "U9_sky130_fd_sc_hd__clkbuf_1".
+Reading "U9_sky130_fd_sc_hd__fill_1".
+Reading "U9_sky130_fd_sc_hd__decap_8".
+Reading "U9_sky130_fd_sc_hd__decap_6".
+Reading "U9_sky130_fd_sc_hd__clkbuf_2".
+Reading "U9_sky130_fd_sc_hd__buf_2".
+Reading "U9_sky130_fd_sc_hd__buf_6".
+Reading "U9_sky130_fd_sc_hd__conb_1".
+Reading "U9_sky130_fd_sc_hd__dfrtp_4".
+Reading "U9_sky130_fd_sc_hd__dfrtp_1".
+Reading "U9_sky130_fd_sc_hd__dfstp_1".
+Reading "U9_sky130_fd_sc_hd__buf_8".
+Reading "U9_sky130_fd_sc_hd__mux2_1".
+Reading "U9_sky130_fd_sc_hd__clkbuf_8".
+Reading "U9_sky130_fd_sc_hd__nand2b_4".
+Reading "U9_sky130_ef_sc_hd__decap_12".
+Reading "U9_sky130_fd_sc_hd__xnor2_1".
+Reading "U9_sky130_fd_sc_hd__nor2_1".
+Reading "U9_sky130_fd_sc_hd__clkbuf_16".
+Reading "U9_sky130_fd_sc_hd__or2_1".
+Reading "U9_sky130_fd_sc_hd__a22o_1".
+Reading "U9_sky130_fd_sc_hd__inv_2".
+Reading "U9_sky130_fd_sc_hd__and2_1".
+Reading "U9_sky130_fd_sc_hd__dfrtp_2".
+Reading "U9_sky130_fd_sc_hd__a31o_1".
+Reading "U9_sky130_fd_sc_hd__dfxtp_1".
+Reading "U9_sky130_fd_sc_hd__nand4_4".
+Reading "U9_sky130_fd_sc_hd__xor2_1".
+Reading "U9_sky130_fd_sc_hd__bufbuf_16".
+Reading "U9_sky130_fd_sc_hd__a21oi_1".
+Reading "U9_sky130_fd_sc_hd__dfxtp_2".
+Reading "U9_sky130_fd_sc_hd__o22a_1".
+Reading "U9_sky130_fd_sc_hd__and2b_1".
+Reading "U9_sky130_fd_sc_hd__and3_1".
+Reading "U9_sky130_fd_sc_hd__and3_2".
+Reading "U9_sky130_fd_sc_hd__dfxtp_4".
+Reading "U9_sky130_fd_sc_hd__a21o_1".
+Reading "U9_sky130_fd_sc_hd__or4_1".
+Reading "U9_sky130_fd_sc_hd__o31a_1".
+Reading "U9_sky130_fd_sc_hd__or4b_1".
+Reading "U9_sky130_fd_sc_hd__o21ai_1".
+Reading "U9_sky130_fd_sc_hd__a2bb2o_1".
+Reading "U9_sky130_fd_sc_hd__and4_2".
+Reading "U9_sky130_fd_sc_hd__a31oi_1".
+Reading "U9_sky130_fd_sc_hd__nand4_1".
+Reading "U9_sky130_fd_sc_hd__nand2_1".
+Reading "U9_sky130_fd_sc_hd__and4b_1".
+Reading "U9_sky130_fd_sc_hd__a211oi_2".
+Reading "U9_sky130_fd_sc_hd__and2_2".
+Reading "U9_sky130_fd_sc_hd__o21a_1".
+Reading "U9_sky130_fd_sc_hd__o21ai_2".
+Reading "U9_sky130_fd_sc_hd__and3b_1".
+Reading "U9_sky130_fd_sc_hd__and4_1".
+Reading "U9_sky130_fd_sc_hd__o21bai_1".
+Reading "U9_sky130_fd_sc_hd__xor2_2".
+Reading "U9_sky130_fd_sc_hd__or2b_1".
+Reading "U9_sky130_fd_sc_hd__a211o_1".
+Reading "U9_sky130_fd_sc_hd__xnor2_2".
+Reading "U9_sky130_fd_sc_hd__nand3_1".
+Reading "U9_sky130_fd_sc_hd__o32a_1".
+Reading "U9_sky130_fd_sc_hd__o21ba_1".
+Reading "U9_sky130_fd_sc_hd__or4bb_1".
+Reading "U9_sky130_fd_sc_hd__a311o_1".
+Reading "U9_sky130_fd_sc_hd__or3_1".
+Reading "U9_sky130_fd_sc_hd__a221o_1".
+Reading "U9_sky130_fd_sc_hd__buf_4".
+Reading "U9_sky130_fd_sc_hd__nand3_2".
+Reading "U9_sky130_fd_sc_hd__buf_12".
+Reading "U9_sky130_fd_sc_hd__o2bb2a_1".
+Reading "U9_sky130_fd_sc_hd__nand2_8".
+Reading "U9_sky130_fd_sc_hd__nand2_2".
+Reading "U9_sky130_fd_sc_hd__buf_1".
+Reading "U9_sky130_fd_sc_hd__nor2_4".
+Reading "U9_sky130_fd_sc_hd__a32o_1".
+Reading "U9_sky130_fd_sc_hd__o31a_4".
+Reading "U9_sky130_fd_sc_hd__a21bo_1".
+Reading "U9_sky130_fd_sc_hd__o211a_1".
+Reading "U9_sky130_fd_sc_hd__or2_4".
+Reading "U9_sky130_fd_sc_hd__or2_2".
+Reading "U9_sky130_fd_sc_hd__nand2_4".
+Reading "U9_sky130_fd_sc_hd__a21boi_1".
+Reading "U9_sky130_fd_sc_hd__and4bb_1".
+Reading "U9_sky130_fd_sc_hd__and4b_2".
+Reading "U9_sky130_fd_sc_hd__o211ai_4".
+Reading "U9_sky130_fd_sc_hd__nor3_1".
+Reading "U9_sky130_fd_sc_hd__or3_4".
+Reading "U9_sky130_fd_sc_hd__o2111a_1".
+Reading "U9_sky130_fd_sc_hd__and2b_2".
+Reading "U9_sky130_fd_sc_hd__dfstp_4".
+Reading "U9_sky130_fd_sc_hd__nor3_4".
+Reading "U9_sky130_fd_sc_hd__a21oi_4".
+Reading "U9_sky130_fd_sc_hd__o221a_4".
+Reading "U9_sky130_fd_sc_hd__or3_2".
+Reading "U9_sky130_fd_sc_hd__a211o_4".
+Reading "U9_sky130_fd_sc_hd__nor2_2".
+Reading "U9_sky130_fd_sc_hd__a2111o_1".
+Reading "U9_sky130_fd_sc_hd__clkinv_4".
+Reading "U9_sky130_fd_sc_hd__or2b_4".
+Reading "U9_sky130_fd_sc_hd__o41a_2".
+Reading "U9_sky130_fd_sc_hd__and2_4".
+Reading "U9_sky130_fd_sc_hd__nand3b_4".
+Reading "U9_sky130_fd_sc_hd__and3_4".
+Reading "U9_sky130_fd_sc_hd__or4b_2".
+Reading "U9_sky130_fd_sc_hd__a221o_2".
+Reading "U9_sky130_fd_sc_hd__o221a_1".
+Reading "U9_sky130_fd_sc_hd__mux2_2".
+Reading "U9_sky130_fd_sc_hd__or3b_1".
+Reading "U9_sky130_fd_sc_hd__or4_2".
+Reading "U9_cawb".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_22".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_39".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_18".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_13".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_38".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_12".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_21".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_33".
+Reading "U9_sky130_fd_bd_sram__openram_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_row_addr_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_col_addr_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_wmask_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_cr_3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_15".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_29".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_28".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_10".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_11".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sli_dactive".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand2_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m12_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m12_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_17".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m4_w1_260_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m4_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_16".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_15".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_6".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_5".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_18".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_delay_chain".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_14".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_4".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dactive".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand3_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_13".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m23_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m23_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_12".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_11".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m40_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m40_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_10".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m13_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m13_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_9".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_8".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_7".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_rw".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_cr_5".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m39_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m39_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_19".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_6".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_r".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_cr_4".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_data_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinvbuf".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_decoder".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_14".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec_0".
+Reading "U9_sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_16".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_19".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec".
+Reading "U9_sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_and3_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_20".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode3x8".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode2x4".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_decoder".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_address_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_address".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_27".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_26".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_25".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_24".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w2_880_sli_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array_0".
+Reading "U9_sky130_fd_bd_sram__openram_sense_amp".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_sense_amp_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_23".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w0_550_sli_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_data_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_write_mask_and_array".
+Reading "U9_sky130_fd_bd_sram__openram_write_driver".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_write_driver_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_data".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_8".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_7".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array_0".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_dummy".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dummy_array".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_replica".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_replica_column_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_replica_column".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_bitcell_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_replica_bitcell_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_bank".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8".
+Reading "U9_rb".
+Reading "U9_sky130_fd_sc_hd__a31o_2".
+Reading "U9_sky130_fd_sc_hd__mux2_4".
+Reading "U9_sky130_fd_sc_hd__nand2b_1".
+Reading "U9_sky130_fd_sc_hd__o21ba_2".
+Reading "U9_sky130_fd_sc_hd__o21ai_4".
+Reading "U9_sky130_fd_sc_hd__or2b_2".
+Reading "U9_sky130_fd_sc_hd__nor2_8".
+Reading "U9_sky130_fd_sc_hd__or4b_4".
+Reading "U9_sky130_fd_sc_hd__or3b_2".
+Reading "U9_sky130_fd_sc_hd__a211oi_4".
+Reading "U9_sky130_fd_sc_hd__a21oi_2".
+Reading "U9_sky130_fd_sc_hd__o2bb2a_4".
+Reading "U9_sky130_fd_sc_hd__a32o_4".
+Reading "U9_sky130_fd_sc_hd__nor3b_1".
+Reading "U9_sky130_fd_sc_hd__a41o_1".
+Reading "U9_sky130_fd_sc_hd__and3b_2".
+Reading "U9_sky130_fd_sc_hd__nor4_4".
+Reading "U9_sky130_fd_sc_hd__o211a_4".
+Reading "U9_sky130_fd_sc_hd__a32o_2".
+Reading "U9_sky130_fd_sc_hd__nor4_2".
+Reading "U9_sky130_fd_sc_hd__o311a_1".
+Reading "U9_sky130_fd_sc_hd__a22oi_4".
+Reading "U9_sky130_fd_sc_hd__o22a_2".
+Reading "U9_sky130_fd_sc_hd__nor3b_4".
+Reading "U9_sky130_fd_sc_hd__a31o_4".
+Reading "U9_sky130_fd_sc_hd__a211o_2".
+Reading "U9_sky130_fd_sc_hd__a311o_4".
+Reading "U9_sky130_fd_sc_hd__a22oi_1".
+Reading "U9_sky130_fd_sc_hd__o21a_2".
+Reading "U9_sky130_fd_sc_hd__a221o_4".
+Reading "U9_sky130_fd_sc_hd__a22o_2".
+Reading "U9_sky130_fd_sc_hd__or3b_4".
+Reading "U9_sky130_fd_sc_hd__or4_4".
+Reading "U9_sky130_fd_sc_hd__a211oi_1".
+Reading "U9_sky130_fd_sc_hd__o21a_4".
+Reading "U9_sky130_fd_sc_hd__o211a_2".
+Reading "U9_sky130_fd_sc_hd__nor4b_1".
+Reading "U9_sky130_fd_sc_hd__a2111oi_4".
+Reading "U9_sky130_fd_sc_hd__o22ai_4".
+Reading "U9_sky130_fd_sc_hd__a22oi_2".
+Reading "U9_sky130_fd_sc_hd__a311oi_4".
+Reading "U9_sky130_fd_sc_hd__a311o_2".
+Reading "U9_sky130_fd_sc_hd__a31oi_2".
+Reading "U9_sky130_fd_sc_hd__o22ai_2".
+Reading "U9_sky130_fd_sc_hd__nand3b_1".
+Reading "U9_sky130_fd_sc_hd__xor2_4".
+Reading "U9_sky130_fd_sc_hd__a21bo_4".
+Reading "U9_sky130_fd_sc_hd__nand4_2".
+Reading "U9_sky130_fd_sc_hd__nor4_1".
+Reading "U9_sky130_fd_sc_hd__a31oi_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2o_2".
+Reading "U9_sky130_fd_sc_hd__o41a_1".
+Reading "U9_sky130_fd_sc_hd__o22a_4".
+Reading "U9_sky130_fd_sc_hd__mux2_8".
+Reading "U9_sky130_fd_sc_hd__a22o_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2o_4".
+Reading "U9_sky130_fd_sc_hd__a21o_4".
+Reading "U9_sky130_fd_sc_hd__o2bb2a_2".
+Reading "U9_sky130_fd_sc_hd__o221ai_4".
+Reading "U9_sky130_fd_sc_hd__o31ai_4".
+Reading "U9_sky130_fd_sc_hd__a221oi_4".
+Reading "U9_sky130_fd_sc_hd__a221oi_2".
+Reading "U9_sky130_fd_sc_hd__o32a_4".
+Reading "U9_sky130_fd_sc_hd__a221oi_1".
+Reading "U9_sky130_fd_sc_hd__o221a_2".
+Reading "U9_sky130_fd_sc_hd__o21ba_4".
+Reading "U9_sky130_fd_sc_hd__o2111ai_4".
+Reading "U9_sky130_fd_sc_hd__a21o_2".
+Reading "U9_sky130_fd_sc_hd__o211ai_1".
+Reading "U9_sky130_fd_sc_hd__and4b_4".
+Reading "U9_sky130_fd_sc_hd__o31ai_1".
+Reading "U9_sky130_fd_sc_hd__o311a_4".
+Reading "U9_sky130_fd_sc_hd__a311oi_2".
+Reading "U9_sky130_fd_sc_hd__a21boi_4".
+Reading "U9_sky130_fd_sc_hd__xnor2_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "U9_sky130_fd_sc_hd__nor3_2".
+Reading "U9_sky130_fd_sc_hd__o22ai_1".
+Reading "U9_sky130_fd_sc_hd__clkinv_2".
+Reading "U9_sky130_fd_sc_hd__and2b_4".
+Reading "U9_sky130_fd_sc_hd__nor2b_1".
+Reading "U9_sky130_fd_sc_hd__a21boi_2".
+Reading "U9_sky130_fd_sc_hd__or4bb_4".
+Reading "U9_sky130_fd_sc_hd__dfrtn_1".
+Reading "U9_sky130_fd_sc_hd__o311ai_4".
+Reading "U9_sky130_fd_sc_hd__nand4b_4".
+Reading "U9_sky130_fd_sc_hd__or4bb_2".
+Reading "U9_sky130_fd_sc_hd__dfstp_2".
+Reading "U9_sky130_fd_sc_hd__nand3b_2".
+Reading "U9_sky130_fd_sc_hd__o211ai_2".
+Reading "U9_sky130_fd_sc_hd__o311a_2".
+Reading "U9_sky130_fd_sc_hd__inv_1".
+Reading "U9_sky130_fd_sc_hd__a311oi_1".
+Reading "U9_sky130_fd_sc_hd__a32oi_4".
+Reading "U9_sky130_fd_sc_hd__o21bai_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "U9_sky130_fd_sc_hd__nor2b_4".
+Reading "U9_sky130_fd_sc_hd__and4_4".
+Reading "U9_sky130_fd_sc_hd__and4bb_4".
+Reading "U9_sky130_fd_sc_hd__a2111o_2".
+Reading "U9_sky130_fd_sc_hd__nor2b_2".
+Reading "U9_sky130_fd_sc_hd__nand2b_2".
+Reading "U9_sky130_fd_sc_hd__o31a_2".
+Reading "U9_sky130_fd_sc_hd__nor4b_4".
+Reading "U9_sky130_fd_sc_hd__nand3_4".
+Reading "U9_sky130_fd_sc_hd__nor3b_2".
+Reading "U9_sky130_fd_sc_hd__a21bo_2".
+Reading "U9_sky130_fd_sc_hd__o21bai_2".
+Reading "U9_sky130_fd_sc_hd__o2111a_2".
+Reading "U9_sky130_fd_sc_hd__o221ai_2".
+Reading "U9_sky130_fd_sc_hd__and4bb_2".
+Reading "U9_sky130_fd_sc_hd__and3b_4".
+Reading "U9_sky130_fd_sc_hd__o31ai_2".
+Reading "U9_sky130_fd_sc_hd__inv_4".
+Reading "U9_sky130_fd_sc_hd__a2111o_4".
+Reading "U9_sky130_fd_sc_hd__o2111a_4".
+Reading "U9_sky130_fd_sc_hd__o41a_4".
+Reading "U9_sky130_fd_sc_hd__a41o_2".
+Reading "U9_sky130_fd_sc_hd__mux4_1".
+Reading "U9_sky130_fd_sc_hd__a41o_4".
+Reading "U9_sky130_fd_sc_hd__a2111oi_2".
+Reading "U9_sky130_fd_sc_hd__a32oi_2".
+Reading "U9_sky130_fd_sc_hd__mux4_2".
+Reading "U9_minisoc".
+Reading "user_project_wrapper".
+Reading "sky130_ef_io__com_bus_slice_20um".
+Reading "sky130_fd_io__corner_bus_overlay".
+Reading "sky130_ef_io__corner_pad".
+Reading "sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um".
+Reading "sky130_ef_io__com_bus_slice_1um".
+Reading "sky130_ef_io__com_bus_slice_5um".
+Reading "sky130_ef_io__com_bus_slice_10um".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180851".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808664".
+Reading "sky130_fd_io__sio_clamp_pcap_4x5".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808680".
+Reading "sky130_fd_io__esd_rcclamp_nfetcap".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808336".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808666".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808665".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808678".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808679".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808677".
+Reading "sky130_fd_pr__via_pol1__example_5595914180839".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808667".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808671".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808672".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808673".
+Reading "sky130_fd_pr__dfl1__example_55959141808663".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808660".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808670".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808668".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808675".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808676".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808674".
+Reading "sky130_fd_pr__dfl1__example_55959141808662".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808661".
+Reading "sky130_fd_pr__via_l1m1__example_559591418084".
+Reading "sky130_fd_pr__genrivetdlring__example_559591418082".
+Reading "sky130_fd_pr__gendlring__example_559591418081".
+Reading "sky130_fd_pr__padplhp__example_559591418080".
+Reading "sky130_fd_io__pad_esd".
+Reading "sky130_fd_io__com_bus_slice".
+Reading "sky130_fd_io__com_bus_hookup".
+Reading "sky130_fd_io__com_busses_esd".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808669".
+Reading "sky130_fd_io__top_ground_hvc_wpad".
+Reading "sky130_fd_io__overlay_vssa_hvc".
+Reading "sky130_ef_io__hvc_vdda_overlay".
+Reading "sky130_ef_io__vssa_hvc_clamped_pad".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808719".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808767".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808765".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808764".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808720".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808718".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808717".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808716".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808243".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808723".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808722".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180890".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808721".
+Reading "sky130_fd_io__xres_inv_hysv2".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180838".
+Reading "sky130_fd_io__tk_tie_r_out_esd".
+Reading "sky130_fd_io__res250_sub_small".
+Reading "sky130_fd_io__res250only_small".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808264".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180858".
+Reading "sky130_fd_pr__via_pol1__example_5595914180833".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180864".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808715".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180863".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180862".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808288".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180859".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808289".
+Reading "sky130_fd_io__com_res_weak_v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808274".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808728".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808727".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808726".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808725".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808724".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808554".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808553".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808552".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808551".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808402".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808350".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808261".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808260".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808259".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808400".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808372".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808326".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808290".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808128".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808127".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180897".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180819".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808555".
+Reading "sky130_fd_pr__via_pol1__example_55959141808147".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808157".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808156".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808155".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808154".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808153".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808152".
+Reading "sky130_fd_pr__tpl1__example_55959141808151".
+Reading "sky130_fd_pr__tpl1__example_55959141808150".
+Reading "sky130_fd_pr__tpl1__example_55959141808149".
+Reading "sky130_fd_pr__tpl1__example_55959141808148".
+Reading "sky130_fd_pr__dfl1__example_55959141808158".
+Reading "sky130_fd_io__signal_5_sym_hv_local_5term".
+Reading "sky130_fd_io__gpio_buf_localesdv2".
+Reading "sky130_fd_pr__via_pol1__example_559591418083".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808137".
+Reading "sky130_fd_pr__dfl1sd__example_559591418086".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808371".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808370".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808369".
+Reading "sky130_fd_io__hvsbt_inv_x1".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808316".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808421".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808385".
+Reading "sky130_fd_pr__dfl1sd__example_559591418088".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808422".
+Reading "sky130_fd_io__hvsbt_inv_x2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808612".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808616".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808615".
+Reading "sky130_fd_io__hvsbt_inv_x4".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180848".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180849".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808766".
+Reading "sky130_fd_pr__via_m2m3__example_55959141808714".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418081".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808652".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808653".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180812".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180811".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418086".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418084".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808659".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808658".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808657".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808202".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pudrvr_strong_axres4v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808273".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808740".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808739".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808738".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808737".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808736".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808735".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808734".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808733".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808732".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808731".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808730".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808752".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808751".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808750".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808749".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808748".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808747".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808746".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808745".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808744".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808743".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808742".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808741".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808324".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808270".
+Reading "sky130_fd_pr__dfl1__example_55959141808187".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808755".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808754".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808338".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808337".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808763".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808700".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808559".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808762".
+Reading "sky130_fd_pr__dfl1__example_55959141808729".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759".
+Reading "sky130_fd_io__xres_p_em1c_cdns_55959141808753".
+Reading "sky130_fd_io__xres2v2_rcfilter_lpfv2".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180860".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180861".
+Reading "sky130_fd_io__com_res_weak_bentbigres".
+Reading "sky130_fd_io__com_res_weak".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180857".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808649".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808651".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808650".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808648".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808646".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808647".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808645".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808378".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_xres4v2".
+Reading "sky130_fd_io__top_gpio_pad".
+Reading "sky130_fd_io__com_busses".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808768".
+Reading "sky130_fd_pr__res_bent_nd__example_55959141808769".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808787".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808786".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808782".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808785".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808449".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808784".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808452".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808783".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808781".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808780".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808779".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808233".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180827".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808778".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180835".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808777".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808776".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808775".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808242".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808774".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180829".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808773".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808237".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808772".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808771".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808770".
+Reading "sky130_fd_io__tap_1".
+Reading "sky130_fd_io__inv_1".
+Reading "sky130_fd_pr__pfet_01v8__example_559591418085".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418089".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418087".
+Reading "sky130_fd_io__hvsbt_nand2".
+Reading "sky130_fd_io__xres4v2_in_buf".
+Reading "sky130_fd_io__top_xres4v2".
+Reading "sky130_fd_sc_hd__fill_4".
+Reading "sky130_fd_sc_hd__fill_8".
+Reading "constant_block".
+Reading "sky130_fd_io__res75only_small".
+Reading "sky130_fd_io__com_bus_slice_m4".
+Reading "sky130_fd_io__overlay_gpiov2_m4".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808420".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808419".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808418".
+Reading "sky130_fd_io__hvsbt_nor".
+Reading "sky130_fd_io__hvsbt_nand2v2".
+Reading "sky130_fd_io__gpiov2_ictl_logic".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808190".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808611".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180811".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808549".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808548".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808191".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808189".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808517".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808518".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808610".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808609".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180815".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180816".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808608".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808604".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808533".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808529".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180884".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808230".
+Reading "sky130_fd_io__gpiov2_in_buf".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808537".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808106".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808481".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808607".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808504".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808600".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808550".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808528".
+Reading "sky130_fd_io__gpiov2_ipath_hvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808595".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180825".
+Reading "sky130_fd_io__gpiov2_inbuf_lvinv_x1".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180812".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808599".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808598".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808597".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808596".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808547".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808546".
+Reading "sky130_fd_io__gpiov2_ipath_lvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808606".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180875".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808605".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808540".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808603".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808602".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808601".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808535".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808527".
+Reading "sky130_fd_io__gpiov2_vcchib_in_buf".
+Reading "sky130_fd_io__gpiov2_ibuf_se".
+Reading "sky130_fd_io__gpiov2_buf_localesd".
+Reading "sky130_fd_io__gpiov2_ipath".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808438".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808439".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180882".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180881".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180880".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180879".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808430".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180823".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180822".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180813".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808624".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808510".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808623".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808622".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808621".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808620".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808619".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808618".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808116".
+Reading "sky130_fd_io__com_ctl_lsv2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808394".
+Reading "sky130_fd_pr__via_pol1__example_55959141808298".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808440".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180878".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808434".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808435".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808433".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808432".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808102".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808431".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808115".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808429".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808428".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808100".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808140".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808427".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808426".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808280".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808425".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808424".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808423".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808306".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808383".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808382".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808380".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808379".
+Reading "sky130_fd_io__com_ctl_ls_v2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808617".
+Reading "sky130_fd_io__com_ctl_ls_en_1_v2".
+Reading "sky130_fd_io__com_ctl_ls_1v2".
+Reading "sky130_fd_io__gpiov2_ctl_lsbank".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808614".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808613".
+Reading "sky130_fd_io__hvsbt_inv_x8v2".
+Reading "sky130_fd_io__hvsbt_inv_x8".
+Reading "sky130_fd_io__com_ctl_ls".
+Reading "sky130_fd_io__com_ctl_hldv2".
+Reading "sky130_fd_io__gpiov2_ctl".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808178".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808591".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808594".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808593".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808488".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808592".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808586".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808122".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808123".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808477".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808476".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808475".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808589".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808570".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808569".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808588".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808587".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808590".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808460".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808468".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808467".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808466".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808465".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808464".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808463".
+Reading "sky130_fd_io__gpiov2_amux_ctl_ls".
+Reading "sky130_fd_io__gpiov2_amux_ctl_inv_1".
+Reading "sky130_fd_io__gpiov2_amux_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808573".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808572".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808579".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808578".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808577".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808576".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808566".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180868".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180869".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808565".
+Reading "sky130_fd_io__gpiov2_amx_pucsd_inv".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808441".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808571".
+Reading "sky130_fd_io__gpiov2_amx_inv4".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808567".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808568".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv2".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808581".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808580".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808278".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808462".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808583".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808582".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808498".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808497".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808496".
+Reading "sky130_fd_io__gpiov2_amux_drvr_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808574".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808575".
+Reading "sky130_fd_io__amx_inv1".
+Reading "sky130_fd_io__gpiov2_amux_drvr".
+Reading "sky130_fd_io__xor2_1".
+Reading "sky130_fd_io__nor2_1".
+Reading "sky130_fd_io__nand2_1".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808200".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808457".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808451".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808450".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180894".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808584".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808455".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808447".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808445".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808248".
+Reading "sky130_fd_io__gpiov2_amux_nand5".
+Reading "sky130_fd_pr__dfm1sd__example_55959141808258".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808585".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808446".
+Reading "sky130_fd_io__gpiov2_amux_nand4".
+Reading "sky130_fd_io__gpiov2_amux_decoder".
+Reading "sky130_fd_io__gpiov2_amux_ctl_logic".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808563".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808564".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808562".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808251".
+Reading "sky130_fd_pr__dfm1sd2__example_55959141808561".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808560".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808558".
+Reading "sky130_fd_io__amux_switch_1v2b".
+Reading "sky130_fd_io__gpiov2_amux".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808416".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808417".
+Reading "sky130_fd_io__hvsbt_xorv2".
+Reading "sky130_fd_io__hvsbt_xor".
+Reading "sky130_fd_io__com_ctl_ls_octl".
+Reading "sky130_fd_io__gpiov2_octl".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808267".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808266".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808642".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808184".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808141".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808643".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808183".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808139".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808636".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808635".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808634".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808633".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808632".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808630".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808638".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808637".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr3".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808629".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808628".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808627".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808626".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808354".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808631".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180888".
+Reading "sky130_fd_io__gpiov2_octl_mux".
+Reading "sky130_fd_pr__via_pol1__example_55959141808322".
+Reading "sky130_fd_pr__via_pol1__example_55959141808321".
+Reading "sky130_fd_pr__via_pol1__example_55959141808320".
+Reading "sky130_fd_pr__via_pol1__example_55959141808294".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808325".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808323".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808291".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808641".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808640".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808639".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808348".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808347".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808194".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808346".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808345".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808344".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808343".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808334".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808333".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808332".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808331".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808330".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808329".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808304".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808134".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808328".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808327".
+Reading "sky130_fd_io__com_pdpredrvr_pbiasv2".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong".
+Reading "sky130_fd_pr__via_pol1__example_55959141808272".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808271".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808143".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808142".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808101".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808144".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_5595914180899".
+Reading "sky130_fd_pr__via_pol1__example_55959141808275".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808276".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808286".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808285".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808284".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808283".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808644".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808287".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808282".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808281".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808297".
+Reading "sky130_fd_pr__via_pol1__example_55959141808296".
+Reading "sky130_fd_pr__via_pol1__example_55959141808295".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808293".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808292".
+Reading "sky130_fd_pr__tpl1__example_55959141808300".
+Reading "sky130_fd_pr__tpl1__example_55959141808299".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808319".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808318".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808317".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808315".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808314".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808313".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808312".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808311".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808310".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808309".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808308".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808307".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808305".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808303".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808301".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808302".
+Reading "sky130_fd_io__feascom_pupredrvr_nbiasv2".
+Reading "sky130_fd_io__gpio_pupredrvr_strongv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808361".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808360".
+Reading "sky130_fd_io__feas_com_pupredrvr_weak".
+Reading "sky130_fd_pr__via_pol1__example_5595914180854".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808363".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808362".
+Reading "sky130_fd_io__com_pupredrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808366".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808365".
+Reading "sky130_fd_io__com_pdpredrvr_weakv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808364".
+Reading "sky130_fd_io__com_pdpredrvr_strong_slowv2".
+Reading "sky130_fd_io__gpiov2_obpredrvr".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808368".
+Reading "sky130_fd_pr__tpl1__example_55959141808625".
+Reading "sky130_fd_pr__via_pol1__example_55959141808373".
+Reading "sky130_fd_pr__tpl1__example_55959141808374".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808393".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808392".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808391".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808390".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808389".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808388".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808387".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808386".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808384".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808381".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808377".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808376".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808375".
+Reading "sky130_fd_io__gpio_dat_lsv2".
+Reading "sky130_fd_io__gpio_dat_ls_1v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808398".
+Reading "sky130_fd_pr__via_pol1__example_55959141808397".
+Reading "sky130_fd_pr__via_pol1__example_55959141808396".
+Reading "sky130_fd_pr__via_pol1__example_55959141808395".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808401".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808399".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808269".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808410".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808409".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808408".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808407".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808406".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808405".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808404".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808403".
+Reading "sky130_fd_io__com_cclat".
+Reading "sky130_fd_io__com_opath_datoev2".
+Reading "sky130_fd_io__gpiov2_octl_dat".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418080".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180832".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180856".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180855".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180853".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180852".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418083".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418082".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpiov2_pddrvr_strong".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418085".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpio_pudrvr_strongv2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180850".
+Reading "sky130_fd_io__gpio_pddrvr_weakv2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808656".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808655".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808654".
+Reading "sky130_fd_io__com_pudrvr_weakv2".
+Reading "sky130_fd_io__com_pudrvr_strong_slowv2".
+Reading "sky130_fd_io__gpio_odrvr_subv2".
+Reading "sky130_fd_io__gpio_odrvrv2".
+Reading "sky130_fd_io__gpio_opathv2".
+Reading "sky130_fd_io__top_gpiov2".
+Reading "sky130_fd_io__overlay_gpiov2".
+Reading "sky130_ef_io__gpiov2_pad".
+Reading "sky130_ef_io__gpiov2_pad_wrapped".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808691".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808687".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808684".
+Reading "sky130_fd_pr__tpl1__example_55959141808686".
+Reading "sky130_fd_pr__tpl1__example_55959141808685".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808683".
+Reading "sky130_fd_io__gnd2gnd_strap".
+Reading "sky130_fd_io__gnd2gnd_tap".
+Reading "sky130_fd_io__gnd2gnd_diff".
+Reading "sky130_fd_io__gnd2gnd_sub_dnwl".
+Reading "sky130_fd_io__gnd2gnd_120x2_lv_isosub".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808690".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808702".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808705".
+Reading "sky130_fd_pr__dfl1__example_55959141808682".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808694".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808693".
+Reading "sky130_fd_pr__dfl1__example_55959141808681".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808688".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808699".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808698".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808697".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808696".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808695".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808704".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808703".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808701".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808689".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808692".
+Reading "sky130_fd_io__top_ground_lvc_wpad".
+Reading "sky130_fd_io__overlay_vssd_lvc".
+Reading "sky130_ef_io__lvc_vccdx_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped_pad".
+Reading "sky130_fd_io__overlay_vssio_hvc".
+Reading "sky130_ef_io__hvc_vssio_overlay".
+Reading "sky130_ef_io__vssio_hvc_clamped_pad".
+Reading "sky130_fd_io__hvc_clampv2".
+Reading "sky130_fd_io__top_power_hvc_wpadv2".
+Reading "sky130_fd_io__overlay_vdda_hvc".
+Reading "sky130_ef_io__vdda_hvc_clamped_pad".
+Reading "sky130_fd_io__top_power_lvc_wpad".
+Reading "sky130_fd_io__overlay_vccd_lvc".
+Reading "sky130_ef_io__vccd_lvc_clamped_pad".
+Reading "sky130_ef_io__disconnect_vdda_slice_5um".
+Reading "sky130_fd_io__overlay_vddio_hvc".
+Reading "sky130_ef_io__hvc_vddio_overlay".
+Reading "sky130_ef_io__vddio_hvc_clamped_pad".
+Reading "chip_io_gpio_connects".
+Reading "sky130_ef_io__lvc_vccdy_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped3_pad".
+Reading "sky130_ef_io__vccd_lvc_clamped3_pad".
+Reading "chip_io".
+Reading "gpio_signal_buffering".
+Reading "caravel".
+   Generating output for cell caravel_0008754b
+Ended: 12/10/2022 10:29:45
diff --git a/tapeout/logs/fill_final.log b/tapeout/logs/fill_final.log
new file mode 100644
index 0000000..bbca93c
--- /dev/null
+++ b/tapeout/logs/fill_final.log
@@ -0,0 +1,114 @@
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_final.tcl" from command line.
+CIF output style is now "wafflefill(tiled)"
+Writing final GDS
+   Generating output for cell caravel_0008754b_fill_pattern_0_0
+Reading "caravel_0008754b_fill_pattern_0_0".
+   Generating output for cell caravel_0008754b_fill_pattern_1_0
+Reading "caravel_0008754b_fill_pattern_1_0".
+   Generating output for cell caravel_0008754b_fill_pattern_0_1
+Reading "caravel_0008754b_fill_pattern_0_1".
+   Generating output for cell caravel_0008754b_fill_pattern_1_1
+Reading "caravel_0008754b_fill_pattern_1_1".
+   Generating output for cell caravel_0008754b_fill_pattern_2_0
+Reading "caravel_0008754b_fill_pattern_2_0".
+   Generating output for cell caravel_0008754b_fill_pattern_2_1
+Reading "caravel_0008754b_fill_pattern_2_1".
+   Generating output for cell caravel_0008754b_fill_pattern_3_0
+Reading "caravel_0008754b_fill_pattern_3_0".
+   Generating output for cell caravel_0008754b_fill_pattern_3_1
+Reading "caravel_0008754b_fill_pattern_3_1".
+   Generating output for cell caravel_0008754b_fill_pattern_4_0
+Reading "caravel_0008754b_fill_pattern_4_0".
+   Generating output for cell caravel_0008754b_fill_pattern_4_1
+Reading "caravel_0008754b_fill_pattern_4_1".
+   Generating output for cell caravel_0008754b_fill_pattern_5_0
+Reading "caravel_0008754b_fill_pattern_5_0".
+   Generating output for cell caravel_0008754b_fill_pattern_5_1
+Reading "caravel_0008754b_fill_pattern_5_1".
+   Generating output for cell caravel_0008754b_fill_pattern_0_2
+Reading "caravel_0008754b_fill_pattern_0_2".
+   Generating output for cell caravel_0008754b_fill_pattern_1_2
+Reading "caravel_0008754b_fill_pattern_1_2".
+   Generating output for cell caravel_0008754b_fill_pattern_2_2
+Reading "caravel_0008754b_fill_pattern_2_2".
+   Generating output for cell caravel_0008754b_fill_pattern_3_2
+Reading "caravel_0008754b_fill_pattern_3_2".
+   Generating output for cell caravel_0008754b_fill_pattern_4_2
+Reading "caravel_0008754b_fill_pattern_4_2".
+   Generating output for cell caravel_0008754b_fill_pattern_5_2
+Reading "caravel_0008754b_fill_pattern_5_2".
+   Generating output for cell caravel_0008754b_fill_pattern_0_3
+Reading "caravel_0008754b_fill_pattern_0_3".
+   Generating output for cell caravel_0008754b_fill_pattern_1_3
+Reading "caravel_0008754b_fill_pattern_1_3".
+   Generating output for cell caravel_0008754b_fill_pattern_2_3
+Reading "caravel_0008754b_fill_pattern_2_3".
+   Generating output for cell caravel_0008754b_fill_pattern_3_3
+Reading "caravel_0008754b_fill_pattern_3_3".
+   Generating output for cell caravel_0008754b_fill_pattern_4_3
+Reading "caravel_0008754b_fill_pattern_4_3".
+   Generating output for cell caravel_0008754b_fill_pattern_5_3
+Reading "caravel_0008754b_fill_pattern_5_3".
+   Generating output for cell caravel_0008754b_fill_pattern_0_4
+Reading "caravel_0008754b_fill_pattern_0_4".
+   Generating output for cell caravel_0008754b_fill_pattern_1_4
+Reading "caravel_0008754b_fill_pattern_1_4".
+   Generating output for cell caravel_0008754b_fill_pattern_2_4
+Reading "caravel_0008754b_fill_pattern_2_4".
+   Generating output for cell caravel_0008754b_fill_pattern_3_4
+Reading "caravel_0008754b_fill_pattern_3_4".
+   Generating output for cell caravel_0008754b_fill_pattern_4_4
+Reading "caravel_0008754b_fill_pattern_4_4".
+   Generating output for cell caravel_0008754b_fill_pattern_5_4
+Reading "caravel_0008754b_fill_pattern_5_4".
+   Generating output for cell caravel_0008754b_fill_pattern_0_5
+Reading "caravel_0008754b_fill_pattern_0_5".
+   Generating output for cell caravel_0008754b_fill_pattern_1_5
+Reading "caravel_0008754b_fill_pattern_1_5".
+   Generating output for cell caravel_0008754b_fill_pattern_2_5
+Reading "caravel_0008754b_fill_pattern_2_5".
+   Generating output for cell caravel_0008754b_fill_pattern_3_5
+Reading "caravel_0008754b_fill_pattern_3_5".
+   Generating output for cell caravel_0008754b_fill_pattern_4_5
+Reading "caravel_0008754b_fill_pattern_4_5".
+   Generating output for cell caravel_0008754b_fill_pattern_5_5
+Reading "caravel_0008754b_fill_pattern_5_5".
+   Generating output for cell caravel_0008754b_fill_pattern_0_6
+Reading "caravel_0008754b_fill_pattern_0_6".
+   Generating output for cell caravel_0008754b_fill_pattern_1_6
+Reading "caravel_0008754b_fill_pattern_1_6".
+   Generating output for cell caravel_0008754b_fill_pattern_2_6
+Reading "caravel_0008754b_fill_pattern_2_6".
+   Generating output for cell caravel_0008754b_fill_pattern_3_6
+Reading "caravel_0008754b_fill_pattern_3_6".
+   Generating output for cell caravel_0008754b_fill_pattern_4_6
+Reading "caravel_0008754b_fill_pattern_4_6".
+   Generating output for cell caravel_0008754b_fill_pattern_5_6
+Reading "caravel_0008754b_fill_pattern_5_6".
+   Generating output for cell caravel_0008754b_fill_pattern_0_7
+Reading "caravel_0008754b_fill_pattern_0_7".
+   Generating output for cell caravel_0008754b_fill_pattern_1_7
+Reading "caravel_0008754b_fill_pattern_1_7".
+   Generating output for cell caravel_0008754b_fill_pattern_2_7
+Reading "caravel_0008754b_fill_pattern_2_7".
+   Generating output for cell caravel_0008754b_fill_pattern_3_7
+Reading "caravel_0008754b_fill_pattern_3_7".
+   Generating output for cell caravel_0008754b_fill_pattern_4_7
+Reading "caravel_0008754b_fill_pattern_4_7".
+   Generating output for cell caravel_0008754b_fill_pattern_5_7
+Reading "caravel_0008754b_fill_pattern_5_7".
+   Generating output for cell caravel_0008754b_fill_pattern
+Ended: 12/10/2022 10:28:28
diff --git a/tapeout/logs/fill_initial.log b/tapeout/logs/fill_initial.log
new file mode 100644
index 0000000..0c645be
--- /dev/null
+++ b/tapeout/logs/fill_initial.log
@@ -0,0 +1,1855 @@
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill.tcl" from command line.
+Started: 12/10/2022 09:33:45
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: caravel
+Reading "caravel_logo".
+Reading "font_22".
+Reading "font_73".
+Reading "font_43".
+Reading "font_49".
+Reading "font_65".
+Reading "font_68".
+Reading "font_54".
+Reading "font_67".
+Reading "font_6E".
+Reading "font_69".
+Reading "font_6C".
+Reading "font_61".
+Reading "font_53".
+Reading "caravel_motto".
+Reading "font_79".
+Reading "font_76".
+Reading "font_74".
+Reading "font_72".
+Reading "font_70".
+Reading "font_66".
+Reading "font_63".
+Reading "font_62".
+Reading "font_57".
+Reading "font_56".
+Reading "font_50".
+Reading "font_47".
+Reading "font_44".
+Reading "font_35".
+Reading "font_32".
+Reading "font_30".
+Reading "font_29".
+Reading "font_28".
+Reading "font_20".
+Reading "font_6F".
+Reading "font_6B".
+Reading "font_4F".
+Reading "font_4B".
+Reading "font_2D".
+Reading "copyright_block".
+Reading "open_source".
+Reading "sky130_fd_sc_hvl__decap_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__decap_4".
+Reading "sky130_fd_sc_hvl__diode_2".
+Reading "sky130_fd_sc_hvl__fill_1".
+Reading "sky130_fd_sc_hvl__fill_2".
+Reading "sky130_fd_sc_hvl__lsbufhv2lv_1".
+Reading "xres_buf".
+Reading "alpha_8".
+Reading "alpha_7".
+Reading "alpha_5".
+Reading "alpha_4".
+Reading "alpha_B".
+Reading "alpha_0".
+Reading "user_id_textblock".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "gpio_defaults_block_1803".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__nand4bb_1".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a41oi_1".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "caravel_clocking".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "buff_flash_clkrst".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__macro_sparecell".
+Reading "sky130_fd_sc_hd__dfbbn_2".
+Reading "sky130_fd_sc_hd__or2_0".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__and2_0".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__buf_16".
+Reading "gpio_logic_high".
+Reading "gpio_control_block".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+CIF file read warning: Input off lambda grid by 2/5; snapped to grid.
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "housekeeping".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+Reading "sky130_fd_sc_hd__einvp_1".
+Reading "sky130_fd_sc_hd__clkinv_1".
+Reading "sky130_fd_sc_hd__einvn_4".
+Reading "sky130_fd_sc_hd__einvn_8".
+Reading "sky130_fd_sc_hd__einvp_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__nand4b_2".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "digital_pll".
+Reading "user_id_programming".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "HN_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "HN_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "HN_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "HN_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "HN_sky130_fd_sc_hvl__schmittbuf_1".
+Reading "HN_sky130_fd_sc_hvl__buf_8".
+Reading "HN_sky130_fd_sc_hvl__inv_8".
+Reading "HN_sky130_fd_sc_hvl__fill_4".
+Reading "HN_sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "HN_sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "HN_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+Reading "RQ_sky130_fd_sc_hd__decap_3".
+Reading "RQ_sky130_ef_sc_hd__decap_12".
+Reading "RQ_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "RQ_sky130_fd_sc_hd__fill_1".
+Reading "RQ_sky130_fd_sc_hd__decap_4".
+Reading "RQ_sky130_fd_sc_hd__decap_6".
+Reading "RQ_sky130_fd_sc_hd__fill_2".
+Reading "RQ_sky130_fd_sc_hd__decap_8".
+Reading "RQ_sky130_fd_sc_hd__diode_2".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_16".
+Reading "RQ_sky130_fd_sc_hd__o211a_1".
+Reading "RQ_sky130_fd_sc_hd__dfxtp_2".
+Reading "RQ_sky130_fd_sc_hd__o21a_1".
+Reading "RQ_sky130_fd_sc_hd__mux2_1".
+Reading "RQ_sky130_fd_sc_hd__or2_1".
+Reading "RQ_sky130_fd_sc_hd__dfxtp_1".
+Reading "RQ_sky130_fd_sc_hd__a22o_1".
+Reading "RQ_sky130_fd_sc_hd__a21o_2".
+Reading "RQ_sky130_fd_sc_hd__a21o_1".
+Reading "RQ_sky130_fd_sc_hd__a22o_4".
+Reading "RQ_sky130_fd_sc_hd__buf_8".
+Reading "RQ_sky130_fd_sc_hd__o21a_2".
+Reading "RQ_sky130_fd_sc_hd__mux2_2".
+Reading "RQ_sky130_fd_sc_hd__buf_4".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_8".
+Reading "RQ_sky130_fd_sc_hd__buf_6".
+Reading "RQ_sky130_fd_sc_hd__dfxtp_4".
+Reading "RQ_sky130_fd_sc_hd__buf_2".
+Reading "RQ_sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "RQ_sky130_fd_sc_hd__o21ai_1".
+Reading "RQ_sky130_fd_sc_hd__mux4_1".
+Reading "RQ_sky130_fd_sc_hd__buf_12".
+Reading "RQ_sky130_fd_sc_hd__mux4_2".
+Reading "RQ_sky130_fd_sc_hd__inv_2".
+Reading "RQ_sky130_fd_sc_hd__and3_2".
+Reading "RQ_sky130_fd_sc_hd__nand2_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2o_1".
+Reading "RQ_sky130_fd_sc_hd__or3b_1".
+Reading "RQ_sky130_fd_sc_hd__o32a_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2o_2".
+Reading "RQ_sky130_fd_sc_hd__o311a_1".
+Reading "RQ_sky130_fd_sc_hd__o221a_1".
+Reading "RQ_sky130_fd_sc_hd__o31a_1".
+Reading "RQ_sky130_fd_sc_hd__o211a_2".
+Reading "RQ_sky130_fd_sc_hd__and3_1".
+Reading "RQ_sky130_fd_sc_hd__a211oi_1".
+Reading "RQ_sky130_fd_sc_hd__and4_4".
+Reading "RQ_sky130_fd_sc_hd__and4_1".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_4".
+Reading "RQ_sky130_fd_sc_hd__and3b_1".
+Reading "RQ_sky130_fd_sc_hd__a211o_4".
+Reading "RQ_sky130_fd_sc_hd__a211o_1".
+Reading "RQ_sky130_fd_sc_hd__o21ba_1".
+Reading "RQ_sky130_fd_sc_hd__a21oi_1".
+Reading "RQ_sky130_fd_sc_hd__nor2_1".
+Reading "RQ_sky130_fd_sc_hd__nand2_8".
+Reading "RQ_sky130_fd_sc_hd__a311o_1".
+Reading "RQ_sky130_fd_sc_hd__nor2_2".
+Reading "RQ_sky130_fd_sc_hd__a41o_1".
+Reading "RQ_sky130_fd_sc_hd__nor3_2".
+Reading "RQ_sky130_fd_sc_hd__or4bb_4".
+Reading "RQ_sky130_fd_sc_hd__nor3_1".
+Reading "RQ_sky130_fd_sc_hd__or4b_4".
+Reading "RQ_sky130_fd_sc_hd__or3b_4".
+Reading "RQ_sky130_fd_sc_hd__a31o_1".
+Reading "RQ_sky130_fd_sc_hd__a211o_2".
+Reading "RQ_sky130_fd_sc_hd__or2_2".
+Reading "RQ_sky130_fd_sc_hd__a31o_2".
+Reading "RQ_sky130_fd_sc_hd__a221o_1".
+Reading "RQ_sky130_fd_sc_hd__and4b_4".
+Reading "RQ_sky130_fd_sc_hd__and3_4".
+Reading "RQ_sky130_fd_sc_hd__mux2_8".
+Reading "RQ_sky130_fd_sc_hd__o21ai_2".
+Reading "RQ_sky130_fd_sc_hd__and4b_1".
+Reading "RQ_sky130_fd_sc_hd__or4b_1".
+Reading "RQ_sky130_fd_sc_hd__o211a_4".
+Reading "RQ_sky130_fd_sc_hd__a32o_1".
+Reading "RQ_sky130_fd_sc_hd__a21boi_1".
+Reading "RQ_sky130_fd_sc_hd__o41ai_4".
+Reading "RQ_sky130_fd_sc_hd__o31a_2".
+Reading "RQ_sky130_fd_sc_hd__nand2_4".
+Reading "RQ_sky130_fd_sc_hd__a31oi_4".
+Reading "RQ_sky130_fd_sc_hd__and4_2".
+Reading "RQ_sky130_fd_sc_hd__nand3_4".
+Reading "RQ_sky130_fd_sc_hd__and4b_2".
+Reading "RQ_sky130_fd_sc_hd__o41a_4".
+Reading "RQ_sky130_fd_sc_hd__and4bb_2".
+Reading "RQ_sky130_fd_sc_hd__clkinv_2".
+Reading "RQ_sky130_fd_sc_hd__and2b_2".
+Reading "RQ_sky130_fd_sc_hd__or4bb_1".
+Reading "RQ_sky130_fd_sc_hd__a21oi_2".
+Reading "RQ_sky130_fd_sc_hd__a221oi_1".
+Reading "RQ_sky130_fd_sc_hd__a31oi_1".
+Reading "RQ_sky130_fd_sc_hd__xor2_4".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_1".
+Reading "RQ_sky130_fd_sc_hd__nand3b_4".
+Reading "RQ_sky130_fd_sc_hd__nand2_2".
+Reading "RQ_sky130_fd_sc_hd__xnor2_1".
+Reading "RQ_sky130_fd_sc_hd__and2_1".
+Reading "RQ_sky130_fd_sc_hd__nor2_4".
+Reading "RQ_sky130_fd_sc_hd__nand4_4".
+Reading "RQ_sky130_fd_sc_hd__a32o_2".
+Reading "RQ_sky130_fd_sc_hd__nor4_1".
+Reading "RQ_sky130_fd_sc_hd__nand4_1".
+Reading "RQ_sky130_fd_sc_hd__xor2_1".
+Reading "RQ_sky130_fd_sc_hd__and4bb_4".
+Reading "RQ_sky130_fd_sc_hd__a41o_2".
+Reading "RQ_sky130_fd_sc_hd__o2bb2a_1".
+Reading "RQ_sky130_fd_sc_hd__xnor2_2".
+Reading "RQ_sky130_fd_sc_hd__xor2_2".
+Reading "RQ_sky130_fd_sc_hd__or2_4".
+Reading "RQ_sky130_fd_sc_hd__a2111oi_2".
+Reading "RQ_sky130_fd_sc_hd__nor4_4".
+Reading "RQ_sky130_fd_sc_hd__mux2_4".
+Reading "RQ_sky130_fd_sc_hd__and2b_1".
+Reading "RQ_sky130_fd_sc_hd__and2_2".
+Reading "RQ_sky130_fd_sc_hd__nor4b_1".
+Reading "RQ_sky130_fd_sc_hd__o2111ai_4".
+Reading "RQ_sky130_fd_sc_hd__nor4_2".
+Reading "RQ_sky130_fd_sc_hd__nand3b_2".
+Reading "RQ_sky130_fd_sc_hd__nand3_1".
+Reading "RQ_sky130_fd_sc_hd__nand2b_2".
+Reading "RQ_sky130_fd_sc_hd__o31ai_1".
+Reading "RQ_sky130_fd_sc_hd__o41a_1".
+Reading "RQ_sky130_fd_sc_hd__a21bo_1".
+Reading "RQ_sky130_fd_sc_hd__o41ai_1".
+Reading "RQ_sky130_fd_sc_hd__nand3b_1".
+Reading "RQ_sky130_fd_sc_hd__o2111a_1".
+Reading "RQ_sky130_fd_sc_hd__o21a_4".
+Reading "RQ_sky130_fd_sc_hd__o22a_1".
+Reading "RQ_sky130_fd_sc_hd__or3b_2".
+Reading "RQ_sky130_fd_sc_hd__nand2b_1".
+Reading "RQ_sky130_fd_sc_hd__nor4b_4".
+Reading "RQ_sky130_fd_sc_hd__o21bai_1".
+Reading "RQ_sky130_fd_sc_hd__nor3_4".
+Reading "RQ_sky130_fd_sc_hd__o41a_2".
+Reading "RQ_sky130_fd_sc_hd__or4b_2".
+Reading "RQ_sky130_fd_sc_hd__a221o_4".
+Reading "RQ_sky130_fd_sc_hd__a2111oi_1".
+Reading "RQ_sky130_fd_sc_hd__o31a_4".
+Reading "RQ_sky130_fd_sc_hd__nor2_8".
+Reading "RQ_sky130_fd_sc_hd__clkinv_4".
+Reading "RQ_sky130_fd_sc_hd__a221o_2".
+Reading "RQ_sky130_fd_sc_hd__o21ai_4".
+Reading "RQ_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "RQ_sky130_fd_sc_hd__clkbuf_2".
+Reading "RQ_sky130_fd_sc_hd__a31o_4".
+Reading "RQ_sky130_fd_sc_hd__ebufn_4".
+Reading "RQ_sky130_fd_sc_hd__dlxtp_1".
+Reading "RQ_sky130_fd_sc_hd__dlclkp_1".
+Reading "RQ_sky130_fd_sc_hd__conb_1".
+Reading "RQ_sky130_fd_sc_hd__inv_1".
+Reading "RQ_sky130_fd_sc_hd__nor4b_2".
+Reading "RQ_sky130_fd_sc_hd__and3b_2".
+Reading "RQ_sky130_fd_sc_hd__nor3b_2".
+Reading "RQ_RAM256".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+Reading "RQ_sky130_fd_sc_hd__a21o_4".
+Reading "RQ_sky130_fd_sc_hd__o2111a_4".
+Reading "RQ_sky130_fd_sc_hd__a22o_2".
+Reading "RQ_sky130_fd_sc_hd__o211ai_4".
+Reading "RQ_sky130_fd_sc_hd__o22ai_4".
+Reading "RQ_sky130_fd_sc_hd__a221oi_4".
+Reading "RQ_sky130_fd_sc_hd__and2b_4".
+Reading "RQ_sky130_fd_sc_hd__and3b_4".
+Reading "RQ_sky130_fd_sc_hd__and4bb_1".
+Reading "RQ_sky130_fd_sc_hd__a21oi_4".
+Reading "RQ_sky130_fd_sc_hd__o22ai_1".
+Reading "RQ_sky130_fd_sc_hd__inv_4".
+Reading "RQ_sky130_fd_sc_hd__a311o_2".
+Reading "RQ_sky130_fd_sc_hd__a2111o_1".
+Reading "RQ_sky130_fd_sc_hd__o311a_4".
+Reading "RQ_sky130_fd_sc_hd__o2111ai_1".
+Reading "RQ_sky130_fd_sc_hd__clkinv_8".
+Reading "RQ_sky130_fd_sc_hd__nand3_2".
+Reading "RQ_sky130_fd_sc_hd__a22oi_1".
+Reading "RQ_sky130_fd_sc_hd__nand4b_4".
+Reading "RQ_sky130_fd_sc_hd__o221ai_4".
+Reading "RQ_sky130_fd_sc_hd__nand4_2".
+Reading "RQ_sky130_fd_sc_hd__inv_6".
+Reading "RQ_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "RQ_sky130_fd_sc_hd__a311oi_4".
+Reading "RQ_sky130_fd_sc_hd__o32ai_4".
+Reading "RQ_sky130_fd_sc_hd__o211ai_1".
+Reading "RQ_sky130_fd_sc_hd__nand4b_1".
+Reading "RQ_sky130_fd_sc_hd__o211ai_2".
+Reading "RQ_sky130_fd_sc_hd__a22oi_4".
+Reading "RQ_sky130_fd_sc_hd__and2_4".
+Reading "RQ_sky130_fd_sc_hd__a211oi_4".
+Reading "RQ_sky130_fd_sc_hd__nor3b_4".
+Reading "RQ_sky130_fd_sc_hd__o22a_2".
+Reading "RQ_sky130_fd_sc_hd__a2111oi_4".
+Reading "RQ_sky130_fd_sc_hd__nand2b_4".
+Reading "RQ_sky130_fd_sc_hd__a2bb2o_4".
+Reading "RQ_sky130_fd_sc_hd__o2bb2a_2".
+Reading "RQ_sky130_fd_sc_hd__o2111ai_2".
+Reading "RQ_sky130_fd_sc_hd__a22oi_2".
+Reading "RQ_sky130_fd_sc_hd__nor3b_1".
+Reading "RQ_sky130_fd_sc_hd__o2bb2a_4".
+Reading "RQ_sky130_fd_sc_hd__o21bai_4".
+Reading "RQ_sky130_fd_sc_hd__o311ai_1".
+Reading "RQ_sky130_fd_sc_hd__a32oi_2".
+Reading "RQ_sky130_fd_sc_hd__o2bb2ai_2".
+Reading "RQ_sky130_fd_sc_hd__o311ai_4".
+Reading "RQ_sky130_fd_sc_hd__o2bb2ai_4".
+Reading "RQ_sky130_fd_sc_hd__o31ai_4".
+Reading "RQ_sky130_fd_sc_hd__o221a_2".
+Reading "RQ_sky130_fd_sc_hd__o2111a_2".
+Reading "RQ_sky130_fd_sc_hd__a31oi_2".
+Reading "RQ_sky130_fd_sc_hd__o311a_2".
+Reading "RQ_sky130_fd_sc_hd__o22a_4".
+Reading "RQ_sky130_fd_sc_hd__a32oi_4".
+Reading "RQ_sky130_fd_sc_hd__a211oi_2".
+Reading "RQ_sky130_fd_sc_hd__o31ai_2".
+Reading "RQ_sky130_fd_sc_hd__o221ai_1".
+Reading "RQ_sky130_fd_sc_hd__clkinv_16".
+Reading "RQ_sky130_fd_sc_hd__or4bb_2".
+Reading "RQ_sky130_fd_sc_hd__a221oi_2".
+Reading "RQ_sky130_fd_sc_hd__inv_8".
+Reading "RQ_sky130_fd_sc_hd__a311oi_2".
+Reading "RQ_sky130_fd_sc_hd__a311oi_1".
+Reading "RQ_sky130_fd_sc_hd__o311ai_2".
+Reading "RQ_sky130_fd_sc_hd__a32oi_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2oi_2".
+Reading "RQ_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "RQ_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "RQ_sky130_fd_sc_hd__xnor2_4".
+Reading "RQ_sky130_fd_sc_hd__inv_12".
+Reading "RQ_sky130_fd_sc_hd__a2111o_4".
+Reading "RQ_sky130_fd_sc_hd__a32o_4".
+Reading "RQ_sky130_fd_sc_hd__o21ba_2".
+Reading "RQ_sky130_fd_sc_hd__a41oi_2".
+Reading "RQ_sky130_fd_sc_hd__o22ai_2".
+Reading "RQ_sky130_fd_sc_hd__o21bai_2".
+Reading "RQ_sky130_fd_sc_hd__a41oi_4".
+Reading "RQ_sky130_fd_sc_hd__a41o_4".
+Reading "RQ_sky130_fd_sc_hd__a311o_4".
+Reading "RQ_sky130_fd_sc_hd__o32ai_1".
+Reading "RQ_sky130_fd_sc_hd__a21boi_4".
+Reading "RQ_sky130_fd_sc_hd__o32ai_2".
+Reading "RQ_sky130_fd_sc_hd__a21bo_2".
+Reading "RQ_RAM128".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+Reading "mgmt_core_wrapper".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
+    130000 uses
+    135000 uses
+    140000 uses
+    145000 uses
+    150000 uses
+    155000 uses
+    160000 uses
+    165000 uses
+    170000 uses
+    175000 uses
+    180000 uses
+    185000 uses
+    190000 uses
+    195000 uses
+    200000 uses
+    205000 uses
+    210000 uses
+    215000 uses
+    220000 uses
+Reading "gpio_defaults_block_0403".
+Reading "gpio_defaults_block_1801".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__dfbbp_1".
+Reading "spare_logic_block".
+Reading "sky130_fd_sc_hd__bufbuf_8".
+Reading "sky130_fd_sc_hvl__conb_1".
+Reading "mgmt_protect_hv".
+Reading "mprj_logic_high".
+Reading "mprj2_logic_high".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "mgmt_protect".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+Reading "gpio_defaults_block_0801".
+Reading "gpio_control_power_routing_top".
+Reading "gpio_control_power_routing_right".
+Reading "gpio_control_power_routing".
+Reading "caravel_power_routing".
+Reading "U9_sky130_fd_sc_hd__clkbuf_4".
+Reading "U9_sky130_fd_sc_hd__decap_3".
+Reading "U9_sky130_fd_sc_hd__decap_4".
+Reading "U9_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "U9_sky130_fd_sc_hd__fill_2".
+Reading "U9_sky130_fd_sc_hd__diode_2".
+Reading "U9_sky130_fd_sc_hd__clkbuf_1".
+Reading "U9_sky130_fd_sc_hd__fill_1".
+Reading "U9_sky130_fd_sc_hd__decap_8".
+Reading "U9_sky130_fd_sc_hd__decap_6".
+Reading "U9_sky130_fd_sc_hd__clkbuf_2".
+Reading "U9_sky130_fd_sc_hd__buf_2".
+Reading "U9_sky130_fd_sc_hd__buf_6".
+Reading "U9_sky130_fd_sc_hd__conb_1".
+Reading "U9_sky130_fd_sc_hd__dfrtp_4".
+Reading "U9_sky130_fd_sc_hd__dfrtp_1".
+Reading "U9_sky130_fd_sc_hd__dfstp_1".
+Reading "U9_sky130_fd_sc_hd__buf_8".
+Reading "U9_sky130_fd_sc_hd__mux2_1".
+Reading "U9_sky130_fd_sc_hd__clkbuf_8".
+Reading "U9_sky130_fd_sc_hd__nand2b_4".
+Reading "U9_sky130_ef_sc_hd__decap_12".
+Reading "U9_sky130_fd_sc_hd__xnor2_1".
+Reading "U9_sky130_fd_sc_hd__nor2_1".
+Reading "U9_sky130_fd_sc_hd__clkbuf_16".
+Reading "U9_sky130_fd_sc_hd__or2_1".
+Reading "U9_sky130_fd_sc_hd__a22o_1".
+Reading "U9_sky130_fd_sc_hd__inv_2".
+Reading "U9_sky130_fd_sc_hd__and2_1".
+Reading "U9_sky130_fd_sc_hd__dfrtp_2".
+Reading "U9_sky130_fd_sc_hd__a31o_1".
+Reading "U9_sky130_fd_sc_hd__dfxtp_1".
+Reading "U9_sky130_fd_sc_hd__nand4_4".
+Reading "U9_sky130_fd_sc_hd__xor2_1".
+Reading "U9_sky130_fd_sc_hd__bufbuf_16".
+Reading "U9_sky130_fd_sc_hd__a21oi_1".
+Reading "U9_sky130_fd_sc_hd__dfxtp_2".
+Reading "U9_sky130_fd_sc_hd__o22a_1".
+Reading "U9_sky130_fd_sc_hd__and2b_1".
+Reading "U9_sky130_fd_sc_hd__and3_1".
+Reading "U9_sky130_fd_sc_hd__and3_2".
+Reading "U9_sky130_fd_sc_hd__dfxtp_4".
+Reading "U9_sky130_fd_sc_hd__a21o_1".
+Reading "U9_sky130_fd_sc_hd__or4_1".
+Reading "U9_sky130_fd_sc_hd__o31a_1".
+Reading "U9_sky130_fd_sc_hd__or4b_1".
+Reading "U9_sky130_fd_sc_hd__o21ai_1".
+Reading "U9_sky130_fd_sc_hd__a2bb2o_1".
+Reading "U9_sky130_fd_sc_hd__and4_2".
+Reading "U9_sky130_fd_sc_hd__a31oi_1".
+Reading "U9_sky130_fd_sc_hd__nand4_1".
+Reading "U9_sky130_fd_sc_hd__nand2_1".
+Reading "U9_sky130_fd_sc_hd__and4b_1".
+Reading "U9_sky130_fd_sc_hd__a211oi_2".
+Reading "U9_sky130_fd_sc_hd__and2_2".
+Reading "U9_sky130_fd_sc_hd__o21a_1".
+Reading "U9_sky130_fd_sc_hd__o21ai_2".
+Reading "U9_sky130_fd_sc_hd__and3b_1".
+Reading "U9_sky130_fd_sc_hd__and4_1".
+Reading "U9_sky130_fd_sc_hd__o21bai_1".
+Reading "U9_sky130_fd_sc_hd__xor2_2".
+Reading "U9_sky130_fd_sc_hd__or2b_1".
+Reading "U9_sky130_fd_sc_hd__a211o_1".
+Reading "U9_sky130_fd_sc_hd__xnor2_2".
+Reading "U9_sky130_fd_sc_hd__nand3_1".
+Reading "U9_sky130_fd_sc_hd__o32a_1".
+Reading "U9_sky130_fd_sc_hd__o21ba_1".
+Reading "U9_sky130_fd_sc_hd__or4bb_1".
+Reading "U9_sky130_fd_sc_hd__a311o_1".
+Reading "U9_sky130_fd_sc_hd__or3_1".
+Reading "U9_sky130_fd_sc_hd__a221o_1".
+Reading "U9_sky130_fd_sc_hd__buf_4".
+Reading "U9_sky130_fd_sc_hd__nand3_2".
+Reading "U9_sky130_fd_sc_hd__buf_12".
+Reading "U9_sky130_fd_sc_hd__o2bb2a_1".
+Reading "U9_sky130_fd_sc_hd__nand2_8".
+Reading "U9_sky130_fd_sc_hd__nand2_2".
+Reading "U9_sky130_fd_sc_hd__buf_1".
+Reading "U9_sky130_fd_sc_hd__nor2_4".
+Reading "U9_sky130_fd_sc_hd__a32o_1".
+Reading "U9_sky130_fd_sc_hd__o31a_4".
+Reading "U9_sky130_fd_sc_hd__a21bo_1".
+Reading "U9_sky130_fd_sc_hd__o211a_1".
+Reading "U9_sky130_fd_sc_hd__or2_4".
+Reading "U9_sky130_fd_sc_hd__or2_2".
+Reading "U9_sky130_fd_sc_hd__nand2_4".
+Reading "U9_sky130_fd_sc_hd__a21boi_1".
+Reading "U9_sky130_fd_sc_hd__and4bb_1".
+Reading "U9_sky130_fd_sc_hd__and4b_2".
+Reading "U9_sky130_fd_sc_hd__o211ai_4".
+Reading "U9_sky130_fd_sc_hd__nor3_1".
+Reading "U9_sky130_fd_sc_hd__or3_4".
+Reading "U9_sky130_fd_sc_hd__o2111a_1".
+Reading "U9_sky130_fd_sc_hd__and2b_2".
+Reading "U9_sky130_fd_sc_hd__dfstp_4".
+Reading "U9_sky130_fd_sc_hd__nor3_4".
+Reading "U9_sky130_fd_sc_hd__a21oi_4".
+Reading "U9_sky130_fd_sc_hd__o221a_4".
+Reading "U9_sky130_fd_sc_hd__or3_2".
+Reading "U9_sky130_fd_sc_hd__a211o_4".
+Reading "U9_sky130_fd_sc_hd__nor2_2".
+Reading "U9_sky130_fd_sc_hd__a2111o_1".
+Reading "U9_sky130_fd_sc_hd__clkinv_4".
+Reading "U9_sky130_fd_sc_hd__or2b_4".
+Reading "U9_sky130_fd_sc_hd__o41a_2".
+Reading "U9_sky130_fd_sc_hd__and2_4".
+Reading "U9_sky130_fd_sc_hd__nand3b_4".
+Reading "U9_sky130_fd_sc_hd__and3_4".
+Reading "U9_sky130_fd_sc_hd__or4b_2".
+Reading "U9_sky130_fd_sc_hd__a221o_2".
+Reading "U9_sky130_fd_sc_hd__o221a_1".
+Reading "U9_sky130_fd_sc_hd__mux2_2".
+Reading "U9_sky130_fd_sc_hd__or3b_1".
+Reading "U9_sky130_fd_sc_hd__or4_2".
+Reading "U9_cawb".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_22".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_39".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_18".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_13".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_38".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_12".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_21".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_33".
+Reading "U9_sky130_fd_bd_sram__openram_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_row_addr_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_col_addr_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_wmask_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_cr_3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_15".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_29".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_28".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_10".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_11".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sli_dactive".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand2_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m12_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m12_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_17".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m4_w1_260_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m4_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_16".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_15".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_6".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_5".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_18".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_delay_chain".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_14".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_4".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dactive".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand3_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_13".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand3".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m23_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m23_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_12".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_11".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m40_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m40_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_10".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m13_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m13_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_9".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_8".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_7".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_rw".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_cr_5".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m39_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m39_w2_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_19".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_6".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_r".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_cr_4".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_data_dff".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinvbuf".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_decoder".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_14".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec_0".
+Reading "U9_sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_16".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_19".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec".
+Reading "U9_sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_and3_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_20".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode3x8".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode2x4".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_decoder".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_address_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_address".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_27".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_26".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_25".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_24".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w2_880_sli_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array_0".
+Reading "U9_sky130_fd_bd_sram__openram_sense_amp".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_sense_amp_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_23".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w0_550_sli_dli".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_1".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_data_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pinv".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pdriver".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pnand2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_pand2".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_write_mask_and_array".
+Reading "U9_sky130_fd_bd_sram__openram_write_driver".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_write_driver_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_port_data".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_8".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_contact_7".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array_0".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_dummy".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_dummy_array".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell_replica".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_replica_column_0".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_replica_column".
+Reading "U9_sky130_fd_bd_sram__openram_dp_cell".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_bitcell_array".
+    5000 uses
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_replica_bitcell_array".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8_bank".
+Reading "U9_sky130_sram_1kbyte_1rw1r_32x256_8".
+Reading "U9_rb".
+Reading "U9_sky130_fd_sc_hd__a31o_2".
+Reading "U9_sky130_fd_sc_hd__mux2_4".
+Reading "U9_sky130_fd_sc_hd__nand2b_1".
+Reading "U9_sky130_fd_sc_hd__o21ba_2".
+Reading "U9_sky130_fd_sc_hd__o21ai_4".
+Reading "U9_sky130_fd_sc_hd__or2b_2".
+Reading "U9_sky130_fd_sc_hd__nor2_8".
+Reading "U9_sky130_fd_sc_hd__or4b_4".
+Reading "U9_sky130_fd_sc_hd__or3b_2".
+Reading "U9_sky130_fd_sc_hd__a211oi_4".
+Reading "U9_sky130_fd_sc_hd__a21oi_2".
+Reading "U9_sky130_fd_sc_hd__o2bb2a_4".
+Reading "U9_sky130_fd_sc_hd__a32o_4".
+Reading "U9_sky130_fd_sc_hd__nor3b_1".
+Reading "U9_sky130_fd_sc_hd__a41o_1".
+Reading "U9_sky130_fd_sc_hd__and3b_2".
+Reading "U9_sky130_fd_sc_hd__nor4_4".
+Reading "U9_sky130_fd_sc_hd__o211a_4".
+Reading "U9_sky130_fd_sc_hd__a32o_2".
+Reading "U9_sky130_fd_sc_hd__nor4_2".
+Reading "U9_sky130_fd_sc_hd__o311a_1".
+Reading "U9_sky130_fd_sc_hd__a22oi_4".
+Reading "U9_sky130_fd_sc_hd__o22a_2".
+Reading "U9_sky130_fd_sc_hd__nor3b_4".
+Reading "U9_sky130_fd_sc_hd__a31o_4".
+Reading "U9_sky130_fd_sc_hd__a211o_2".
+Reading "U9_sky130_fd_sc_hd__a311o_4".
+Reading "U9_sky130_fd_sc_hd__a22oi_1".
+Reading "U9_sky130_fd_sc_hd__o21a_2".
+Reading "U9_sky130_fd_sc_hd__a221o_4".
+Reading "U9_sky130_fd_sc_hd__a22o_2".
+Reading "U9_sky130_fd_sc_hd__or3b_4".
+Reading "U9_sky130_fd_sc_hd__or4_4".
+Reading "U9_sky130_fd_sc_hd__a211oi_1".
+Reading "U9_sky130_fd_sc_hd__o21a_4".
+Reading "U9_sky130_fd_sc_hd__o211a_2".
+Reading "U9_sky130_fd_sc_hd__nor4b_1".
+Reading "U9_sky130_fd_sc_hd__a2111oi_4".
+Reading "U9_sky130_fd_sc_hd__o22ai_4".
+Reading "U9_sky130_fd_sc_hd__a22oi_2".
+Reading "U9_sky130_fd_sc_hd__a311oi_4".
+Reading "U9_sky130_fd_sc_hd__a311o_2".
+Reading "U9_sky130_fd_sc_hd__a31oi_2".
+Reading "U9_sky130_fd_sc_hd__o22ai_2".
+Reading "U9_sky130_fd_sc_hd__nand3b_1".
+Reading "U9_sky130_fd_sc_hd__xor2_4".
+Reading "U9_sky130_fd_sc_hd__a21bo_4".
+Reading "U9_sky130_fd_sc_hd__nand4_2".
+Reading "U9_sky130_fd_sc_hd__nor4_1".
+Reading "U9_sky130_fd_sc_hd__a31oi_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2o_2".
+Reading "U9_sky130_fd_sc_hd__o41a_1".
+Reading "U9_sky130_fd_sc_hd__o22a_4".
+Reading "U9_sky130_fd_sc_hd__mux2_8".
+Reading "U9_sky130_fd_sc_hd__a22o_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2o_4".
+Reading "U9_sky130_fd_sc_hd__a21o_4".
+Reading "U9_sky130_fd_sc_hd__o2bb2a_2".
+Reading "U9_sky130_fd_sc_hd__o221ai_4".
+Reading "U9_sky130_fd_sc_hd__o31ai_4".
+Reading "U9_sky130_fd_sc_hd__a221oi_4".
+Reading "U9_sky130_fd_sc_hd__a221oi_2".
+Reading "U9_sky130_fd_sc_hd__o32a_4".
+Reading "U9_sky130_fd_sc_hd__a221oi_1".
+Reading "U9_sky130_fd_sc_hd__o221a_2".
+Reading "U9_sky130_fd_sc_hd__o21ba_4".
+Reading "U9_sky130_fd_sc_hd__o2111ai_4".
+Reading "U9_sky130_fd_sc_hd__a21o_2".
+Reading "U9_sky130_fd_sc_hd__o211ai_1".
+Reading "U9_sky130_fd_sc_hd__and4b_4".
+Reading "U9_sky130_fd_sc_hd__o31ai_1".
+Reading "U9_sky130_fd_sc_hd__o311a_4".
+Reading "U9_sky130_fd_sc_hd__a311oi_2".
+Reading "U9_sky130_fd_sc_hd__a21boi_4".
+Reading "U9_sky130_fd_sc_hd__xnor2_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "U9_sky130_fd_sc_hd__nor3_2".
+Reading "U9_sky130_fd_sc_hd__o22ai_1".
+Reading "U9_sky130_fd_sc_hd__clkinv_2".
+Reading "U9_sky130_fd_sc_hd__and2b_4".
+Reading "U9_sky130_fd_sc_hd__nor2b_1".
+Reading "U9_sky130_fd_sc_hd__a21boi_2".
+Reading "U9_sky130_fd_sc_hd__or4bb_4".
+Reading "U9_sky130_fd_sc_hd__dfrtn_1".
+Reading "U9_sky130_fd_sc_hd__o311ai_4".
+Reading "U9_sky130_fd_sc_hd__nand4b_4".
+Reading "U9_sky130_fd_sc_hd__or4bb_2".
+Reading "U9_sky130_fd_sc_hd__dfstp_2".
+Reading "U9_sky130_fd_sc_hd__nand3b_2".
+Reading "U9_sky130_fd_sc_hd__o211ai_2".
+Reading "U9_sky130_fd_sc_hd__o311a_2".
+Reading "U9_sky130_fd_sc_hd__inv_1".
+Reading "U9_sky130_fd_sc_hd__a311oi_1".
+Reading "U9_sky130_fd_sc_hd__a32oi_4".
+Reading "U9_sky130_fd_sc_hd__o21bai_4".
+Reading "U9_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "U9_sky130_fd_sc_hd__nor2b_4".
+Reading "U9_sky130_fd_sc_hd__and4_4".
+Reading "U9_sky130_fd_sc_hd__and4bb_4".
+Reading "U9_sky130_fd_sc_hd__a2111o_2".
+Reading "U9_sky130_fd_sc_hd__nor2b_2".
+Reading "U9_sky130_fd_sc_hd__nand2b_2".
+Reading "U9_sky130_fd_sc_hd__o31a_2".
+Reading "U9_sky130_fd_sc_hd__nor4b_4".
+Reading "U9_sky130_fd_sc_hd__nand3_4".
+Reading "U9_sky130_fd_sc_hd__nor3b_2".
+Reading "U9_sky130_fd_sc_hd__a21bo_2".
+Reading "U9_sky130_fd_sc_hd__o21bai_2".
+Reading "U9_sky130_fd_sc_hd__o2111a_2".
+Reading "U9_sky130_fd_sc_hd__o221ai_2".
+Reading "U9_sky130_fd_sc_hd__and4bb_2".
+Reading "U9_sky130_fd_sc_hd__and3b_4".
+Reading "U9_sky130_fd_sc_hd__o31ai_2".
+Reading "U9_sky130_fd_sc_hd__inv_4".
+Reading "U9_sky130_fd_sc_hd__a2111o_4".
+Reading "U9_sky130_fd_sc_hd__o2111a_4".
+Reading "U9_sky130_fd_sc_hd__o41a_4".
+Reading "U9_sky130_fd_sc_hd__a41o_2".
+Reading "U9_sky130_fd_sc_hd__mux4_1".
+Reading "U9_sky130_fd_sc_hd__a41o_4".
+Reading "U9_sky130_fd_sc_hd__a2111oi_2".
+Reading "U9_sky130_fd_sc_hd__a32oi_2".
+Reading "U9_sky130_fd_sc_hd__mux4_2".
+Reading "U9_minisoc".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
+    130000 uses
+    135000 uses
+    140000 uses
+    145000 uses
+    150000 uses
+    155000 uses
+    160000 uses
+    165000 uses
+    170000 uses
+    175000 uses
+    180000 uses
+    185000 uses
+    190000 uses
+    195000 uses
+    200000 uses
+    205000 uses
+    210000 uses
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+    460000 uses
+    465000 uses
+    470000 uses
+    475000 uses
+    480000 uses
+    485000 uses
+    490000 uses
+    495000 uses
+Reading "user_project_wrapper".
+Reading "sky130_ef_io__com_bus_slice_20um".
+Reading "sky130_fd_io__corner_bus_overlay".
+Reading "sky130_ef_io__corner_pad".
+Reading "sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um".
+Reading "sky130_ef_io__com_bus_slice_1um".
+Reading "sky130_ef_io__com_bus_slice_5um".
+Reading "sky130_ef_io__com_bus_slice_10um".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180851".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808664".
+Reading "sky130_fd_io__sio_clamp_pcap_4x5".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808680".
+Reading "sky130_fd_io__esd_rcclamp_nfetcap".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808336".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808666".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808665".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808678".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808679".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808677".
+Reading "sky130_fd_pr__via_pol1__example_5595914180839".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808667".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808671".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808672".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808673".
+Reading "sky130_fd_pr__dfl1__example_55959141808663".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808660".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808670".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808668".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808675".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808676".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808674".
+Reading "sky130_fd_pr__dfl1__example_55959141808662".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808661".
+Reading "sky130_fd_pr__via_l1m1__example_559591418084".
+Reading "sky130_fd_pr__genrivetdlring__example_559591418082".
+Reading "sky130_fd_pr__gendlring__example_559591418081".
+Reading "sky130_fd_pr__padplhp__example_559591418080".
+Reading "sky130_fd_io__pad_esd".
+Reading "sky130_fd_io__com_bus_slice".
+Reading "sky130_fd_io__com_bus_hookup".
+Reading "sky130_fd_io__com_busses_esd".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808669".
+Reading "sky130_fd_io__top_ground_hvc_wpad".
+Reading "sky130_fd_io__overlay_vssa_hvc".
+Reading "sky130_ef_io__hvc_vdda_overlay".
+Reading "sky130_ef_io__vssa_hvc_clamped_pad".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808719".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808767".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808765".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808764".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808720".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808718".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808717".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808716".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808243".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808723".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808722".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180890".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808721".
+Reading "sky130_fd_io__xres_inv_hysv2".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180838".
+Reading "sky130_fd_io__tk_tie_r_out_esd".
+Reading "sky130_fd_io__res250_sub_small".
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601755024): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601755056): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601757648): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601757680): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601757712): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601757744): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601757776): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 601757872): NODE elements not supported: skipping.
+Reading "sky130_fd_io__res250only_small".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808264".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180858".
+Reading "sky130_fd_pr__via_pol1__example_5595914180833".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180864".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808715".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180863".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180862".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808288".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180859".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808289".
+Reading "sky130_fd_io__com_res_weak_v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808274".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808728".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808727".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808726".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808725".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808724".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808554".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808553".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808552".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808551".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808402".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808350".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808261".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808260".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808259".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808400".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808372".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808326".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808290".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808128".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808127".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180897".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180819".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808555".
+Reading "sky130_fd_pr__via_pol1__example_55959141808147".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808157".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808156".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808155".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808154".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808153".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808152".
+Reading "sky130_fd_pr__tpl1__example_55959141808151".
+Reading "sky130_fd_pr__tpl1__example_55959141808150".
+Reading "sky130_fd_pr__tpl1__example_55959141808149".
+Reading "sky130_fd_pr__tpl1__example_55959141808148".
+Reading "sky130_fd_pr__dfl1__example_55959141808158".
+Reading "sky130_fd_io__signal_5_sym_hv_local_5term".
+Reading "sky130_fd_io__gpio_buf_localesdv2".
+Reading "sky130_fd_pr__via_pol1__example_559591418083".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808137".
+Reading "sky130_fd_pr__dfl1sd__example_559591418086".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808371".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808370".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808369".
+Reading "sky130_fd_io__hvsbt_inv_x1".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808316".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808421".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808385".
+Reading "sky130_fd_pr__dfl1sd__example_559591418088".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808422".
+Reading "sky130_fd_io__hvsbt_inv_x2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808612".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808616".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808615".
+Reading "sky130_fd_io__hvsbt_inv_x4".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180848".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180849".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808766".
+Reading "sky130_fd_pr__via_m2m3__example_55959141808714".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418081".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808652".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808653".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180812".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180811".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418086".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418084".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808659".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808658".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808657".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808202".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pudrvr_strong_axres4v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808273".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808740".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808739".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808738".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808737".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808736".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808735".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808734".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808733".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808732".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808731".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808730".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808752".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808751".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808750".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808749".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808748".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808747".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808746".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808745".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808744".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808743".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808742".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808741".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808324".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808270".
+Reading "sky130_fd_pr__dfl1__example_55959141808187".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808755".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808754".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808338".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808337".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808763".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808700".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808559".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808762".
+Reading "sky130_fd_pr__dfl1__example_55959141808729".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759".
+Reading "sky130_fd_io__xres_p_em1c_cdns_55959141808753".
+Reading "sky130_fd_io__xres2v2_rcfilter_lpfv2".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180860".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180861".
+Reading "sky130_fd_io__com_res_weak_bentbigres".
+Reading "sky130_fd_io__com_res_weak".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180857".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808649".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808651".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808650".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808648".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808646".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808647".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808645".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808378".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_xres4v2".
+Reading "sky130_fd_io__top_gpio_pad".
+Reading "sky130_fd_io__com_busses".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808768".
+Reading "sky130_fd_pr__res_bent_nd__example_55959141808769".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808787".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808786".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808782".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808785".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808449".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808784".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808452".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808783".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808781".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808780".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808779".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808233".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180827".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808778".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180835".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808777".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808776".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808775".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808242".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808774".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180829".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808773".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808237".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808772".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808771".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808770".
+Reading "sky130_fd_io__tap_1".
+Reading "sky130_fd_io__inv_1".
+Reading "sky130_fd_pr__pfet_01v8__example_559591418085".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418089".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418087".
+Reading "sky130_fd_io__hvsbt_nand2".
+Reading "sky130_fd_io__xres4v2_in_buf".
+Reading "sky130_fd_io__top_xres4v2".
+Reading "sky130_fd_sc_hd__fill_4".
+Reading "sky130_fd_sc_hd__fill_8".
+Reading "constant_block".
+Reading "sky130_fd_io__res75only_small".
+Reading "sky130_fd_io__com_bus_slice_m4".
+Reading "sky130_fd_io__overlay_gpiov2_m4".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808420".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808419".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808418".
+Reading "sky130_fd_io__hvsbt_nor".
+Reading "sky130_fd_io__hvsbt_nand2v2".
+Reading "sky130_fd_io__gpiov2_ictl_logic".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808190".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808611".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180811".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808549".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808548".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808191".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808189".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808517".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808518".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808610".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808609".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180815".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180816".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808608".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808604".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808533".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808529".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180884".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808230".
+Reading "sky130_fd_io__gpiov2_in_buf".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808537".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808106".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808481".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808607".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808504".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808600".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808550".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808528".
+Reading "sky130_fd_io__gpiov2_ipath_hvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808595".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180825".
+Reading "sky130_fd_io__gpiov2_inbuf_lvinv_x1".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180812".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808599".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808598".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808597".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808596".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808547".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808546".
+Reading "sky130_fd_io__gpiov2_ipath_lvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808606".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180875".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808605".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808540".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808603".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808602".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808601".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808535".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808527".
+Reading "sky130_fd_io__gpiov2_vcchib_in_buf".
+Reading "sky130_fd_io__gpiov2_ibuf_se".
+Reading "sky130_fd_io__gpiov2_buf_localesd".
+Reading "sky130_fd_io__gpiov2_ipath".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808438".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808439".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180882".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180881".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180880".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180879".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808430".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180823".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180822".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180813".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808624".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808510".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808623".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808622".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808621".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808620".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808619".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808618".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808116".
+Reading "sky130_fd_io__com_ctl_lsv2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808394".
+Reading "sky130_fd_pr__via_pol1__example_55959141808298".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808440".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180878".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808434".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808435".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808433".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808432".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808102".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808431".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808115".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808429".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808428".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808100".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808140".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808427".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808426".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808280".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808425".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808424".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808423".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808306".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808383".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808382".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808380".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808379".
+Reading "sky130_fd_io__com_ctl_ls_v2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808617".
+Reading "sky130_fd_io__com_ctl_ls_en_1_v2".
+Reading "sky130_fd_io__com_ctl_ls_1v2".
+Reading "sky130_fd_io__gpiov2_ctl_lsbank".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808614".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808613".
+Reading "sky130_fd_io__hvsbt_inv_x8v2".
+Reading "sky130_fd_io__hvsbt_inv_x8".
+Reading "sky130_fd_io__com_ctl_ls".
+Reading "sky130_fd_io__com_ctl_hldv2".
+Reading "sky130_fd_io__gpiov2_ctl".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808178".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808591".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808594".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808593".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808488".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808592".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808586".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808122".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808123".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808477".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808476".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808475".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808589".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808570".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808569".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808588".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808587".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808590".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808460".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808468".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808467".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808466".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808465".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808464".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808463".
+Reading "sky130_fd_io__gpiov2_amux_ctl_ls".
+Reading "sky130_fd_io__gpiov2_amux_ctl_inv_1".
+Reading "sky130_fd_io__gpiov2_amux_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808573".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808572".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808579".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808578".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808577".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808576".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808566".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180868".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180869".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808565".
+Reading "sky130_fd_io__gpiov2_amx_pucsd_inv".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808441".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808571".
+Reading "sky130_fd_io__gpiov2_amx_inv4".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808567".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808568".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv2".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808581".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808580".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808278".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808462".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808583".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808582".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808498".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808497".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808496".
+Reading "sky130_fd_io__gpiov2_amux_drvr_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808574".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808575".
+Reading "sky130_fd_io__amx_inv1".
+Reading "sky130_fd_io__gpiov2_amux_drvr".
+Reading "sky130_fd_io__xor2_1".
+Reading "sky130_fd_io__nor2_1".
+Reading "sky130_fd_io__nand2_1".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808200".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808457".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808451".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808450".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180894".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808584".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808455".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808447".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808445".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808248".
+Reading "sky130_fd_io__gpiov2_amux_nand5".
+Reading "sky130_fd_pr__dfm1sd__example_55959141808258".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808585".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808446".
+Reading "sky130_fd_io__gpiov2_amux_nand4".
+Reading "sky130_fd_io__gpiov2_amux_decoder".
+Reading "sky130_fd_io__gpiov2_amux_ctl_logic".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808563".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808564".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808562".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808251".
+Reading "sky130_fd_pr__dfm1sd2__example_55959141808561".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808560".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808558".
+Reading "sky130_fd_io__amux_switch_1v2b".
+Reading "sky130_fd_io__gpiov2_amux".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808416".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808417".
+Reading "sky130_fd_io__hvsbt_xorv2".
+Reading "sky130_fd_io__hvsbt_xor".
+Reading "sky130_fd_io__com_ctl_ls_octl".
+Reading "sky130_fd_io__gpiov2_octl".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808267".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808266".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808642".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808184".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808141".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808643".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808183".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808139".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808636".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808635".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808634".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808633".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808632".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808630".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808638".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808637".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr3".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808629".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808628".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808627".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808626".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808354".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808631".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180888".
+Reading "sky130_fd_io__gpiov2_octl_mux".
+Reading "sky130_fd_pr__via_pol1__example_55959141808322".
+Reading "sky130_fd_pr__via_pol1__example_55959141808321".
+Reading "sky130_fd_pr__via_pol1__example_55959141808320".
+Reading "sky130_fd_pr__via_pol1__example_55959141808294".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808325".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808323".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808291".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808641".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808640".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808639".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808348".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808347".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808194".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808346".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808345".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808344".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808343".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808334".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808333".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808332".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808331".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808330".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808329".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808304".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808134".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808328".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808327".
+Reading "sky130_fd_io__com_pdpredrvr_pbiasv2".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong".
+Reading "sky130_fd_pr__via_pol1__example_55959141808272".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808271".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808143".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808142".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808101".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808144".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_5595914180899".
+Reading "sky130_fd_pr__via_pol1__example_55959141808275".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808276".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808286".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808285".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808284".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808283".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808644".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808287".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808282".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808281".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808297".
+Reading "sky130_fd_pr__via_pol1__example_55959141808296".
+Reading "sky130_fd_pr__via_pol1__example_55959141808295".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808293".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808292".
+Reading "sky130_fd_pr__tpl1__example_55959141808300".
+Reading "sky130_fd_pr__tpl1__example_55959141808299".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808319".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808318".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808317".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808315".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808314".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808313".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808312".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808311".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808310".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808309".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808308".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808307".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808305".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808303".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808301".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808302".
+Reading "sky130_fd_io__feascom_pupredrvr_nbiasv2".
+Reading "sky130_fd_io__gpio_pupredrvr_strongv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808361".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808360".
+Reading "sky130_fd_io__feas_com_pupredrvr_weak".
+Reading "sky130_fd_pr__via_pol1__example_5595914180854".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808363".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808362".
+Reading "sky130_fd_io__com_pupredrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808366".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808365".
+Reading "sky130_fd_io__com_pdpredrvr_weakv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808364".
+Reading "sky130_fd_io__com_pdpredrvr_strong_slowv2".
+Reading "sky130_fd_io__gpiov2_obpredrvr".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808368".
+Reading "sky130_fd_pr__tpl1__example_55959141808625".
+Reading "sky130_fd_pr__via_pol1__example_55959141808373".
+Reading "sky130_fd_pr__tpl1__example_55959141808374".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808393".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808392".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808391".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808390".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808389".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808388".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808387".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808386".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808384".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808381".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808377".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808376".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808375".
+Reading "sky130_fd_io__gpio_dat_lsv2".
+Reading "sky130_fd_io__gpio_dat_ls_1v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808398".
+Reading "sky130_fd_pr__via_pol1__example_55959141808397".
+Reading "sky130_fd_pr__via_pol1__example_55959141808396".
+Reading "sky130_fd_pr__via_pol1__example_55959141808395".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808401".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808399".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808269".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808410".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808409".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808408".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808407".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808406".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808405".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808404".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808403".
+Reading "sky130_fd_io__com_cclat".
+Reading "sky130_fd_io__com_opath_datoev2".
+Reading "sky130_fd_io__gpiov2_octl_dat".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418080".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180832".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180856".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180855".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180853".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180852".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418083".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418082".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpiov2_pddrvr_strong".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418085".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpio_pudrvr_strongv2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180850".
+Reading "sky130_fd_io__gpio_pddrvr_weakv2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808656".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808655".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808654".
+Reading "sky130_fd_io__com_pudrvr_weakv2".
+Reading "sky130_fd_io__com_pudrvr_strong_slowv2".
+Reading "sky130_fd_io__gpio_odrvr_subv2".
+Reading "sky130_fd_io__gpio_odrvrv2".
+Reading "sky130_fd_io__gpio_opathv2".
+Reading "sky130_fd_io__top_gpiov2".
+Reading "sky130_fd_io__overlay_gpiov2".
+Reading "sky130_ef_io__gpiov2_pad".
+Reading "sky130_ef_io__gpiov2_pad_wrapped".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808691".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808687".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808684".
+Reading "sky130_fd_pr__tpl1__example_55959141808686".
+Reading "sky130_fd_pr__tpl1__example_55959141808685".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808683".
+Reading "sky130_fd_io__gnd2gnd_strap".
+Reading "sky130_fd_io__gnd2gnd_tap".
+Reading "sky130_fd_io__gnd2gnd_diff".
+Reading "sky130_fd_io__gnd2gnd_sub_dnwl".
+Reading "sky130_fd_io__gnd2gnd_120x2_lv_isosub".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808690".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808702".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808705".
+Reading "sky130_fd_pr__dfl1__example_55959141808682".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808694".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808693".
+Reading "sky130_fd_pr__dfl1__example_55959141808681".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808688".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808699".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808698".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808697".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808696".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808695".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808704".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808703".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808701".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808689".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808692".
+Reading "sky130_fd_io__top_ground_lvc_wpad".
+Reading "sky130_fd_io__overlay_vssd_lvc".
+Reading "sky130_ef_io__lvc_vccdx_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped_pad".
+Reading "sky130_fd_io__overlay_vssio_hvc".
+Reading "sky130_ef_io__hvc_vssio_overlay".
+Reading "sky130_ef_io__vssio_hvc_clamped_pad".
+Reading "sky130_fd_io__hvc_clampv2".
+Reading "sky130_fd_io__top_power_hvc_wpadv2".
+Reading "sky130_fd_io__overlay_vdda_hvc".
+Reading "sky130_ef_io__vdda_hvc_clamped_pad".
+Reading "sky130_fd_io__top_power_lvc_wpad".
+Reading "sky130_fd_io__overlay_vccd_lvc".
+Reading "sky130_ef_io__vccd_lvc_clamped_pad".
+Reading "sky130_ef_io__disconnect_vdda_slice_5um".
+Reading "sky130_fd_io__overlay_vddio_hvc".
+Reading "sky130_ef_io__hvc_vddio_overlay".
+Reading "sky130_ef_io__vddio_hvc_clamped_pad".
+Reading "chip_io_gpio_connects".
+Reading "sky130_ef_io__lvc_vccdy_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped3_pad".
+Reading "sky130_ef_io__vccd_lvc_clamped3_pad".
+Reading "chip_io".
+Reading "gpio_signal_buffering".
+Reading "caravel".
+Flattening layout of tile x=0 y=0. . . 
+Flattening layout of tile x=1 y=0. . . 
+Flattening layout of tile x=2 y=0. . . 
+Flattening layout of tile x=3 y=0. . . 
+Flattening layout of tile x=4 y=0. . . 
+Flattening layout of tile x=5 y=0. . . 
+Flattening layout of tile x=0 y=1. . . 
+Flattening layout of tile x=1 y=1. . . 
+Flattening layout of tile x=2 y=1. . . 
+Flattening layout of tile x=3 y=1. . . 
+Flattening layout of tile x=4 y=1. . . 
+Flattening layout of tile x=5 y=1. . . 
+Flattening layout of tile x=0 y=2. . . 
+Flattening layout of tile x=1 y=2. . . 
+Flattening layout of tile x=2 y=2. . . 
+Flattening layout of tile x=3 y=2. . . 
+Flattening layout of tile x=4 y=2. . . 
+Flattening layout of tile x=5 y=2. . . 
+Flattening layout of tile x=0 y=3. . . 
+Flattening layout of tile x=1 y=3. . . 
+Flattening layout of tile x=2 y=3. . . 
+Flattening layout of tile x=3 y=3. . . 
+Flattening layout of tile x=4 y=3. . . 
+Flattening layout of tile x=5 y=3. . . 
+Flattening layout of tile x=0 y=4. . . 
+Flattening layout of tile x=1 y=4. . . 
+Flattening layout of tile x=2 y=4. . . 
+Flattening layout of tile x=3 y=4. . . 
+Flattening layout of tile x=4 y=4. . . 
+Flattening layout of tile x=5 y=4. . . 
+Flattening layout of tile x=0 y=5. . . 
+Flattening layout of tile x=1 y=5. . . 
+Flattening layout of tile x=2 y=5. . . 
+Flattening layout of tile x=3 y=5. . . 
+Flattening layout of tile x=4 y=5. . . 
+Flattening layout of tile x=5 y=5. . . 
+Flattening layout of tile x=0 y=6. . . 
+Flattening layout of tile x=1 y=6. . . 
+Flattening layout of tile x=2 y=6. . . 
+Flattening layout of tile x=3 y=6. . . 
+Flattening layout of tile x=4 y=6. . . 
+Flattening layout of tile x=5 y=6. . . 
+Flattening layout of tile x=0 y=7. . . 
+Flattening layout of tile x=1 y=7. . . 
+Flattening layout of tile x=2 y=7. . . 
+Flattening layout of tile x=3 y=7. . . 
+Flattening layout of tile x=4 y=7. . . 
+Flattening layout of tile x=5 y=7. . . 
+Ended: 12/10/2022 09:58:47
diff --git a/tapeout/logs/fill_intermediate.log b/tapeout/logs/fill_intermediate.log
new file mode 100644
index 0000000..6df9a5d
--- /dev/null
+++ b/tapeout/logs/fill_intermediate.log
@@ -0,0 +1,17981 @@
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_0_5: 10000 rects
+caravel_0008754b_fill_pattern_2_7: 10000 rects
+caravel_0008754b_fill_pattern_4_1: 10000 rects
+caravel_0008754b_fill_pattern_1_0: 10000 rects
+caravel_0008754b_fill_pattern_0_5: 20000 rects
+caravel_0008754b_fill_pattern_2_3: 10000 rects
+caravel_0008754b_fill_pattern_5_0: 10000 rects
+caravel_0008754b_fill_pattern_4_5: 10000 rects
+caravel_0008754b_fill_pattern_2_7: 20000 rects
+caravel_0008754b_fill_pattern_1_4: 10000 rects
+caravel_0008754b_fill_pattern_4_3: 10000 rects
+caravel_0008754b_fill_pattern_1_0: 20000 rects
+caravel_0008754b_fill_pattern_4_1: 20000 rects
+caravel_0008754b_fill_pattern_3_4: 10000 rects
+caravel_0008754b_fill_pattern_5_4: 10000 rects
+caravel_0008754b_fill_pattern_0_7: 10000 rects
+caravel_0008754b_fill_pattern_0_5: 30000 rects
+caravel_0008754b_fill_pattern_3_2: 10000 rects
+caravel_0008754b_fill_pattern_2_3: 20000 rects
+caravel_0008754b_fill_pattern_5_0: 20000 rects
+caravel_0008754b_fill_pattern_3_6: 10000 rects
+caravel_0008754b_fill_pattern_1_4: 20000 rects
+caravel_0008754b_fill_pattern_0_1: 10000 rects
+caravel_0008754b_fill_pattern_2_7: 30000 rects
+caravel_0008754b_fill_pattern_1_0: 30000 rects
+caravel_0008754b_fill_pattern_2_5: 10000 rects
+caravel_0008754b_fill_pattern_4_1: 30000 rects
+caravel_0008754b_fill_pattern_3_4: 20000 rects
+caravel_0008754b_fill_pattern_0_7: 20000 rects
+caravel_0008754b_fill_pattern_4_5: 20000 rects
+caravel_0008754b_fill_pattern_4_3: 20000 rects
+caravel_0008754b_fill_pattern_0_5: 40000 rects
+caravel_0008754b_fill_pattern_2_3: 30000 rects
+caravel_0008754b_fill_pattern_5_0: 30000 rects
+caravel_0008754b_fill_pattern_5_4: 20000 rects
+caravel_0008754b_fill_pattern_3_2: 20000 rects
+caravel_0008754b_fill_pattern_0_1: 20000 rects
+caravel_0008754b_fill_pattern_2_7: 40000 rects
+caravel_0008754b_fill_pattern_1_0: 40000 rects
+caravel_0008754b_fill_pattern_4_1: 40000 rects
+caravel_0008754b_fill_pattern_3_4: 30000 rects
+caravel_0008754b_fill_pattern_2_5: 20000 rects
+caravel_0008754b_fill_pattern_3_6: 20000 rects
+caravel_0008754b_fill_pattern_1_4: 30000 rects
+caravel_0008754b_fill_pattern_5_4: 30000 rects
+caravel_0008754b_fill_pattern_0_5: 50000 rects
+caravel_0008754b_fill_pattern_2_3: 40000 rects
+caravel_0008754b_fill_pattern_4_5: 30000 rects
+caravel_0008754b_fill_pattern_4_3: 30000 rects
+caravel_0008754b_fill_pattern_5_0: 40000 rects
+caravel_0008754b_fill_pattern_0_1: 30000 rects
+caravel_0008754b_fill_pattern_1_0: 50000 rects
+caravel_0008754b_fill_pattern_3_2: 30000 rects
+caravel_0008754b_fill_pattern_2_7: 50000 rects
+caravel_0008754b_fill_pattern_3_4: 40000 rects
+caravel_0008754b_fill_pattern_4_1: 50000 rects
+caravel_0008754b_fill_pattern_2_5: 30000 rects
+caravel_0008754b_fill_pattern_0_5: 60000 rects
+caravel_0008754b_fill_pattern_5_4: 40000 rects
+caravel_0008754b_fill_pattern_2_3: 50000 rects
+caravel_0008754b_fill_pattern_4_5: 40000 rects
+caravel_0008754b_fill_pattern_4_3: 40000 rects
+caravel_0008754b_fill_pattern_3_6: 30000 rects
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0008754b_fill_pattern_5_0
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+caravel_0008754b_fill_pattern_3_2: 1380000 rects
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+caravel_0008754b_fill_pattern_2_5: 1270000 rects
+caravel_0008754b_fill_pattern_0_1: 1350000 rects
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+caravel_0008754b_fill_pattern_0_5: 1100000 rects
+caravel_0008754b_fill_pattern_5_4: 980000 rects
+caravel_0008754b_fill_pattern_1_0: 1400000 rects
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+caravel_0008754b_fill_pattern_2_3: 1280000 rects
+caravel_0008754b_fill_pattern_2_7: 1040000 rects
+caravel_0008754b_fill_pattern_4_3: 1410000 rects
+caravel_0008754b_fill_pattern_4_5: 1420000 rects
+caravel_0008754b_fill_pattern_1_4: 1530000 rects
+caravel_0008754b_fill_pattern_2_5: 1280000 rects
+caravel_0008754b_fill_pattern_1_0: 1410000 rects
+caravel_0008754b_fill_pattern_5_4: 990000 rects
+caravel_0008754b_fill_pattern_3_2: 1400000 rects
+caravel_0008754b_fill_pattern_2_7: 1050000 rects
+caravel_0008754b_fill_pattern_3_4: 1580000 rects
+caravel_0008754b_fill_pattern_2_3: 1290000 rects
+caravel_0008754b_fill_pattern_4_1: 1350000 rects
+caravel_0008754b_fill_pattern_0_1: 1360000 rects
+caravel_0008754b_fill_pattern_3_6: 1440000 rects
+caravel_0008754b_fill_pattern_2_5: 1290000 rects
+caravel_0008754b_fill_pattern_0_5: 1110000 rects
+caravel_0008754b_fill_pattern_1_0: 1420000 rects
+caravel_0008754b_fill_pattern_0_7: 950000 rects
+caravel_0008754b_fill_pattern_2_7: 1060000 rects
+caravel_0008754b_fill_pattern_4_5: 1430000 rects
+caravel_0008754b_fill_pattern_1_4: 1540000 rects
+caravel_0008754b_fill_pattern_3_4: 1590000 rects
+caravel_0008754b_fill_pattern_2_3: 1300000 rects
+caravel_0008754b_fill_pattern_3_6: 1450000 rects
+caravel_0008754b_fill_pattern_2_5: 1300000 rects
+caravel_0008754b_fill_pattern_0_1: 1370000 rects
+caravel_0008754b_fill_pattern_2_7: 1070000 rects
+caravel_0008754b_fill_pattern_1_0: 1430000 rects
+caravel_0008754b_fill_pattern_4_1: 1360000 rects
+caravel_0008754b_fill_pattern_4_3: 1420000 rects
+caravel_0008754b_fill_pattern_3_2: 1410000 rects
+caravel_0008754b_fill_pattern_5_4: 1000000 rects
+caravel_0008754b_fill_pattern_1_4: 1550000 rects
+caravel_0008754b_fill_pattern_3_4: 1600000 rects
+caravel_0008754b_fill_pattern_4_5: 1440000 rects
+caravel_0008754b_fill_pattern_2_3: 1310000 rects
+caravel_0008754b_fill_pattern_2_5: 1310000 rects
+caravel_0008754b_fill_pattern_0_5: 1120000 rects
+caravel_0008754b_fill_pattern_2_7: 1080000 rects
+caravel_0008754b_fill_pattern_1_0: 1440000 rects
+caravel_0008754b_fill_pattern_3_6: 1460000 rects
+caravel_0008754b_fill_pattern_0_1: 1380000 rects
+caravel_0008754b_fill_pattern_4_1: 1370000 rects
+caravel_0008754b_fill_pattern_1_4: 1560000 rects
+caravel_0008754b_fill_pattern_3_4: 1610000 rects
+caravel_0008754b_fill_pattern_2_7: 1090000 rects
+caravel_0008754b_fill_pattern_5_4: 1010000 rects
+caravel_0008754b_fill_pattern_2_5: 1320000 rects
+caravel_0008754b_fill_pattern_1_0: 1450000 rects
+caravel_0008754b_fill_pattern_2_3: 1320000 rects
+caravel_0008754b_fill_pattern_0_7: 960000 rects
+caravel_0008754b_fill_pattern_4_3: 1430000 rects
+caravel_0008754b_fill_pattern_3_6: 1470000 rects
+caravel_0008754b_fill_pattern_0_1: 1390000 rects
+caravel_0008754b_fill_pattern_2_7: 1100000 rects
+caravel_0008754b_fill_pattern_5_4: 1020000 rects
+caravel_0008754b_fill_pattern_4_1: 1380000 rects
+caravel_0008754b_fill_pattern_0_5: 1130000 rects
+caravel_0008754b_fill_pattern_1_4: 1570000 rects
+caravel_0008754b_fill_pattern_3_2: 1420000 rects
+caravel_0008754b_fill_pattern_1_0: 1460000 rects
+caravel_0008754b_fill_pattern_2_5: 1330000 rects
+caravel_0008754b_fill_pattern_3_4: 1620000 rects
+caravel_0008754b_fill_pattern_2_3: 1330000 rects
+caravel_0008754b_fill_pattern_4_5: 1450000 rects
+caravel_0008754b_fill_pattern_2_7: 1110000 rects
+caravel_0008754b_fill_pattern_5_4: 1030000 rects
+caravel_0008754b_fill_pattern_3_6: 1480000 rects
+caravel_0008754b_fill_pattern_0_1: 1400000 rects
+caravel_0008754b_fill_pattern_1_4: 1580000 rects
+caravel_0008754b_fill_pattern_1_0: 1470000 rects
+caravel_0008754b_fill_pattern_2_5: 1340000 rects
+caravel_0008754b_fill_pattern_2_7: 1120000 rects
+caravel_0008754b_fill_pattern_4_1: 1390000 rects
+caravel_0008754b_fill_pattern_2_3: 1340000 rects
+caravel_0008754b_fill_pattern_4_3: 1440000 rects
+caravel_0008754b_fill_pattern_0_5: 1140000 rects
+caravel_0008754b_fill_pattern_3_4: 1630000 rects
+caravel_0008754b_fill_pattern_0_1: 1410000 rects
+caravel_0008754b_fill_pattern_3_6: 1490000 rects
+caravel_0008754b_fill_pattern_1_0: 1480000 rects
+caravel_0008754b_fill_pattern_1_4: 1590000 rects
+caravel_0008754b_fill_pattern_2_5: 1350000 rects
+caravel_0008754b_fill_pattern_0_7: 970000 rects
+caravel_0008754b_fill_pattern_3_2: 1430000 rects
+caravel_0008754b_fill_pattern_4_5: 1460000 rects
+caravel_0008754b_fill_pattern_4_1: 1400000 rects
+caravel_0008754b_fill_pattern_2_3: 1350000 rects
+caravel_0008754b_fill_pattern_1_0: 1490000 rects
+caravel_0008754b_fill_pattern_0_1: 1420000 rects
+caravel_0008754b_fill_pattern_0_7: 980000 rects
+caravel_0008754b_fill_pattern_2_5: 1360000 rects
+caravel_0008754b_fill_pattern_3_6: 1500000 rects
+caravel_0008754b_fill_pattern_1_4: 1600000 rects
+caravel_0008754b_fill_pattern_2_7: 1130000 rects
+caravel_0008754b_fill_pattern_3_4: 1640000 rects
+caravel_0008754b_fill_pattern_4_3: 1450000 rects
+caravel_0008754b_fill_pattern_2_3: 1360000 rects
+caravel_0008754b_fill_pattern_0_5: 1150000 rects
+caravel_0008754b_fill_pattern_1_0: 1500000 rects
+caravel_0008754b_fill_pattern_4_1: 1410000 rects
+caravel_0008754b_fill_pattern_0_7: 990000 rects
+caravel_0008754b_fill_pattern_2_5: 1370000 rects
+caravel_0008754b_fill_pattern_0_1: 1430000 rects
+caravel_0008754b_fill_pattern_4_5: 1470000 rects
+caravel_0008754b_fill_pattern_3_6: 1510000 rects
+caravel_0008754b_fill_pattern_1_4: 1610000 rects
+caravel_0008754b_fill_pattern_2_3: 1370000 rects
+caravel_0008754b_fill_pattern_3_2: 1440000 rects
+caravel_0008754b_fill_pattern_0_7: 1000000 rects
+caravel_0008754b_fill_pattern_1_0: 1510000 rects
+caravel_0008754b_fill_pattern_2_7: 1140000 rects
+caravel_0008754b_fill_pattern_3_4: 1650000 rects
+caravel_0008754b_fill_pattern_2_5: 1380000 rects
+caravel_0008754b_fill_pattern_4_1: 1420000 rects
+caravel_0008754b_fill_pattern_0_1: 1440000 rects
+caravel_0008754b_fill_pattern_4_3: 1460000 rects
+caravel_0008754b_fill_pattern_1_4: 1620000 rects
+caravel_0008754b_fill_pattern_2_3: 1380000 rects
+caravel_0008754b_fill_pattern_1_0: 1520000 rects
+caravel_0008754b_fill_pattern_0_5: 1160000 rects
+caravel_0008754b_fill_pattern_2_5: 1390000 rects
+caravel_0008754b_fill_pattern_4_5: 1480000 rects
+caravel_0008754b_fill_pattern_0_1: 1450000 rects
+caravel_0008754b_fill_pattern_1_0: 1530000 rects
+caravel_0008754b_fill_pattern_4_1: 1430000 rects
+caravel_0008754b_fill_pattern_3_2: 1450000 rects
+caravel_0008754b_fill_pattern_2_3: 1390000 rects
+caravel_0008754b_fill_pattern_1_4: 1630000 rects
+caravel_0008754b_fill_pattern_2_7: 1150000 rects
+caravel_0008754b_fill_pattern_3_6: 1520000 rects
+caravel_0008754b_fill_pattern_3_4: 1660000 rects
+caravel_0008754b_fill_pattern_2_5: 1400000 rects
+caravel_0008754b_fill_pattern_1_0: 1540000 rects
+caravel_0008754b_fill_pattern_4_3: 1470000 rects
+caravel_0008754b_fill_pattern_0_5: 1170000 rects
+caravel_0008754b_fill_pattern_2_3: 1400000 rects
+caravel_0008754b_fill_pattern_0_1: 1460000 rects
+caravel_0008754b_fill_pattern_0_7: 1010000 rects
+caravel_0008754b_fill_pattern_4_1: 1440000 rects
+caravel_0008754b_fill_pattern_1_4: 1640000 rects
+caravel_0008754b_fill_pattern_2_5: 1410000 rects
+caravel_0008754b_fill_pattern_1_0: 1550000 rects
+caravel_0008754b_fill_pattern_3_4: 1670000 rects
+caravel_0008754b_fill_pattern_4_5: 1490000 rects
+caravel_0008754b_fill_pattern_0_5: 1180000 rects
+caravel_0008754b_fill_pattern_2_3: 1410000 rects
+caravel_0008754b_fill_pattern_3_2: 1460000 rects
+caravel_0008754b_fill_pattern_4_1: 1450000 rects
+caravel_0008754b_fill_pattern_0_1: 1470000 rects
+caravel_0008754b_fill_pattern_1_0: 1560000 rects
+caravel_0008754b_fill_pattern_1_4: 1650000 rects
+caravel_0008754b_fill_pattern_3_6: 1530000 rects
+caravel_0008754b_fill_pattern_2_5: 1420000 rects
+caravel_0008754b_fill_pattern_0_5: 1190000 rects
+caravel_0008754b_fill_pattern_3_4: 1680000 rects
+caravel_0008754b_fill_pattern_2_7: 1160000 rects
+caravel_0008754b_fill_pattern_1_0: 1570000 rects
+caravel_0008754b_fill_pattern_2_3: 1420000 rects
+caravel_0008754b_fill_pattern_4_1: 1460000 rects
+caravel_0008754b_fill_pattern_4_3: 1480000 rects
+caravel_0008754b_fill_pattern_0_1: 1480000 rects
+caravel_0008754b_fill_pattern_1_4: 1660000 rects
+caravel_0008754b_fill_pattern_2_5: 1430000 rects
+caravel_0008754b_fill_pattern_0_5: 1200000 rects
+caravel_0008754b_fill_pattern_4_5: 1500000 rects
+caravel_0008754b_fill_pattern_2_3: 1430000 rects
+caravel_0008754b_fill_pattern_3_4: 1690000 rects
+caravel_0008754b_fill_pattern_3_2: 1470000 rects
+caravel_0008754b_fill_pattern_1_0: 1580000 rects
+caravel_0008754b_fill_pattern_4_1: 1470000 rects
+caravel_0008754b_fill_pattern_2_7: 1170000 rects
+caravel_0008754b_fill_pattern_1_4: 1670000 rects
+caravel_0008754b_fill_pattern_2_5: 1440000 rects
+caravel_0008754b_fill_pattern_3_6: 1540000 rects
+caravel_0008754b_fill_pattern_0_1: 1490000 rects
+caravel_0008754b_fill_pattern_0_5: 1210000 rects
+caravel_0008754b_fill_pattern_2_3: 1440000 rects
+caravel_0008754b_fill_pattern_4_1: 1480000 rects
+caravel_0008754b_fill_pattern_3_4: 1700000 rects
+caravel_0008754b_fill_pattern_3_2: 1480000 rects
+caravel_0008754b_fill_pattern_1_4: 1680000 rects
+caravel_0008754b_fill_pattern_1_0: 1590000 rects
+caravel_0008754b_fill_pattern_2_5: 1450000 rects
+caravel_0008754b_fill_pattern_0_5: 1220000 rects
+caravel_0008754b_fill_pattern_4_3: 1490000 rects
+caravel_0008754b_fill_pattern_0_1: 1500000 rects
+caravel_0008754b_fill_pattern_2_3: 1450000 rects
+caravel_0008754b_fill_pattern_4_1: 1490000 rects
+caravel_0008754b_fill_pattern_2_7: 1180000 rects
+caravel_0008754b_fill_pattern_3_4: 1710000 rects
+caravel_0008754b_fill_pattern_3_2: 1490000 rects
+caravel_0008754b_fill_pattern_4_5: 1510000 rects
+caravel_0008754b_fill_pattern_2_5: 1460000 rects
+caravel_0008754b_fill_pattern_1_4: 1690000 rects
+caravel_0008754b_fill_pattern_0_5: 1230000 rects
+caravel_0008754b_fill_pattern_3_6: 1550000 rects
+caravel_0008754b_fill_pattern_1_0: 1600000 rects
+caravel_0008754b_fill_pattern_0_1: 1510000 rects
+caravel_0008754b_fill_pattern_2_3: 1460000 rects
+caravel_0008754b_fill_pattern_4_1: 1500000 rects
+caravel_0008754b_fill_pattern_3_2: 1500000 rects
+caravel_0008754b_fill_pattern_3_4: 1720000 rects
+caravel_0008754b_fill_pattern_2_5: 1470000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_0_5: 1240000 rects
+caravel_0008754b_fill_pattern_1_4: 1700000 rects
+caravel_0008754b_fill_pattern_4_3: 1500000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_5_4
+caravel_0008754b_fill_pattern_0_1: 1520000 rects
+caravel_0008754b_fill_pattern_2_3: 1470000 rects
+caravel_0008754b_fill_pattern_1_0: 1610000 rects
+caravel_0008754b_fill_pattern_3_2: 1510000 rects
+caravel_0008754b_fill_pattern_0_5: 1250000 rects
+caravel_0008754b_fill_pattern_2_5: 1480000 rects
+caravel_0008754b_fill_pattern_3_4: 1730000 rects
+caravel_0008754b_fill_pattern_1_4: 1710000 rects
+caravel_0008754b_fill_pattern_2_7: 1190000 rects
+caravel_0008754b_fill_pattern_4_5: 1520000 rects
+caravel_0008754b_fill_pattern_4_1: 1510000 rects
+caravel_0008754b_fill_pattern_2_3: 1480000 rects
+caravel_0008754b_fill_pattern_0_5: 1260000 rects
+caravel_0008754b_fill_pattern_2_5: 1490000 rects
+caravel_0008754b_fill_pattern_1_0: 1620000 rects
+caravel_0008754b_fill_pattern_3_2: 1520000 rects
+caravel_0008754b_fill_pattern_3_6: 1560000 rects
+caravel_0008754b_fill_pattern_0_1: 1530000 rects
+caravel_0008754b_fill_pattern_1_4: 1720000 rects
+caravel_0008754b_fill_pattern_3_4: 1740000 rects
+caravel_0008754b_fill_pattern_2_7: 1200000 rects
+caravel_0008754b_fill_pattern_4_3: 1510000 rects
+caravel_0008754b_fill_pattern_2_3: 1490000 rects
+caravel_0008754b_fill_pattern_0_5: 1270000 rects
+caravel_0008754b_fill_pattern_2_5: 1500000 rects
+caravel_0008754b_fill_pattern_3_2: 1530000 rects
+caravel_0008754b_fill_pattern_4_1: 1520000 rects
+caravel_0008754b_fill_pattern_1_4: 1730000 rects
+caravel_0008754b_fill_pattern_4_5: 1530000 rects
+caravel_0008754b_fill_pattern_1_0: 1630000 rects
+caravel_0008754b_fill_pattern_3_4: 1750000 rects
+caravel_0008754b_fill_pattern_2_3: 1500000 rects
+caravel_0008754b_fill_pattern_0_5: 1280000 rects
+caravel_0008754b_fill_pattern_0_1: 1540000 rects
+caravel_0008754b_fill_pattern_2_5: 1510000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_3_2: 1540000 rects
+caravel_0008754b_fill_pattern_1_4: 1740000 rects
+caravel_0008754b_fill_pattern_2_7: 1210000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_0_7
+caravel_0008754b_fill_pattern_3_6: 1570000 rects
+caravel_0008754b_fill_pattern_2_3: 1510000 rects
+caravel_0008754b_fill_pattern_3_4: 1760000 rects
+caravel_0008754b_fill_pattern_4_3: 1520000 rects
+caravel_0008754b_fill_pattern_1_0: 1640000 rects
+caravel_0008754b_fill_pattern_2_5: 1520000 rects
+caravel_0008754b_fill_pattern_0_5: 1290000 rects
+caravel_0008754b_fill_pattern_4_1: 1530000 rects
+caravel_0008754b_fill_pattern_3_2: 1550000 rects
+caravel_0008754b_fill_pattern_1_4: 1750000 rects
+caravel_0008754b_fill_pattern_4_5: 1540000 rects
+caravel_0008754b_fill_pattern_2_7: 1220000 rects
+caravel_0008754b_fill_pattern_0_1: 1550000 rects
+caravel_0008754b_fill_pattern_2_3: 1520000 rects
+caravel_0008754b_fill_pattern_3_4: 1770000 rects
+caravel_0008754b_fill_pattern_0_5: 1300000 rects
+caravel_0008754b_fill_pattern_2_5: 1530000 rects
+caravel_0008754b_fill_pattern_1_4: 1760000 rects
+caravel_0008754b_fill_pattern_1_0: 1650000 rects
+caravel_0008754b_fill_pattern_3_2: 1560000 rects
+caravel_0008754b_fill_pattern_2_7: 1230000 rects
+caravel_0008754b_fill_pattern_2_3: 1530000 rects
+caravel_0008754b_fill_pattern_3_6: 1580000 rects
+caravel_0008754b_fill_pattern_4_3: 1530000 rects
+caravel_0008754b_fill_pattern_0_5: 1310000 rects
+caravel_0008754b_fill_pattern_4_1: 1540000 rects
+caravel_0008754b_fill_pattern_2_5: 1540000 rects
+caravel_0008754b_fill_pattern_3_4: 1780000 rects
+caravel_0008754b_fill_pattern_2_7: 1240000 rects
+caravel_0008754b_fill_pattern_1_4: 1770000 rects
+caravel_0008754b_fill_pattern_0_1: 1560000 rects
+caravel_0008754b_fill_pattern_3_2: 1570000 rects
+caravel_0008754b_fill_pattern_1_0: 1660000 rects
+caravel_0008754b_fill_pattern_4_5: 1550000 rects
+caravel_0008754b_fill_pattern_2_3: 1540000 rects
+caravel_0008754b_fill_pattern_2_7: 1250000 rects
+caravel_0008754b_fill_pattern_0_5: 1320000 rects
+caravel_0008754b_fill_pattern_2_5: 1550000 rects
+caravel_0008754b_fill_pattern_1_4: 1780000 rects
+caravel_0008754b_fill_pattern_3_4: 1790000 rects
+caravel_0008754b_fill_pattern_3_2: 1580000 rects
+caravel_0008754b_fill_pattern_2_7: 1260000 rects
+caravel_0008754b_fill_pattern_2_3: 1550000 rects
+caravel_0008754b_fill_pattern_4_1: 1550000 rects
+caravel_0008754b_fill_pattern_0_1: 1570000 rects
+caravel_0008754b_fill_pattern_1_0: 1670000 rects
+caravel_0008754b_fill_pattern_4_3: 1540000 rects
+caravel_0008754b_fill_pattern_0_5: 1330000 rects
+caravel_0008754b_fill_pattern_2_5: 1560000 rects
+caravel_0008754b_fill_pattern_3_6: 1590000 rects
+caravel_0008754b_fill_pattern_1_4: 1790000 rects
+caravel_0008754b_fill_pattern_3_2: 1590000 rects
+caravel_0008754b_fill_pattern_3_4: 1800000 rects
+caravel_0008754b_fill_pattern_4_5: 1560000 rects
+caravel_0008754b_fill_pattern_2_7: 1270000 rects
+caravel_0008754b_fill_pattern_2_3: 1560000 rects
+caravel_0008754b_fill_pattern_0_5: 1340000 rects
+caravel_0008754b_fill_pattern_2_5: 1570000 rects
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+caravel_0008754b_fill_pattern_3_4: 2000000 rects
+caravel_0008754b_fill_pattern_3_2: 1800000 rects
+Ended: 12/10/2022 09:58:56
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+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+caravel_0008754b_fill_pattern_2_3: 1790000 rects
+Using NULL graphics device.
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+caravel_0008754b_fill_pattern_2_3: 1800000 rects
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+Processing system .magicrc file
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+caravel_0008754b_fill_pattern_3_2: 1830000 rects
+caravel_0008754b_fill_pattern_1_4: 2050000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
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+caravel_0008754b_fill_pattern_2_3: 1820000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+caravel_0008754b_fill_pattern_1_4: 2140000 rects
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+caravel_0008754b_fill_pattern_0_5: 1620000 rects
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+caravel_0008754b_fill_pattern_2_5: 1910000 rects
+caravel_0008754b_fill_pattern_4_5: 1790000 rects
+caravel_0008754b_fill_pattern_3_2: 1920000 rects
+caravel_0008754b_fill_pattern_0_1: 1800000 rects
+caravel_0008754b_fill_pattern_2_3: 1900000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_3_6: 1850000 rects
+caravel_0008754b_fill_pattern_1_0: 1950000 rects
+caravel_0008754b_fill_pattern_1_4: 2150000 rects
+caravel_0008754b_fill_pattern_4_1: 1670000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+caravel_0008754b_fill_pattern_3_4: 2120000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_4_3: 1810000 rects
+caravel_0008754b_fill_pattern_2_5: 1920000 rects
+caravel_0008754b_fill_pattern_4_5: 1800000 rects
+caravel_0008754b_fill_pattern_0_1: 1810000 rects
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+caravel_0008754b_fill_pattern_3_2: 1930000 rects
+caravel_0008754b_fill_pattern_2_3: 1910000 rects
+caravel_0008754b_fill_pattern_3_6: 1860000 rects
+caravel_0008754b_fill_pattern_1_4: 2160000 rects
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0008754b_fill_pattern_2_7
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0008754b_fill_pattern_5_2
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+   Generating output for cell caravel_0008754b_fill_pattern_0_5
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+Ended: 12/10/2022 09:59:06
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+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+Processing system .magicrc file
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+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
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+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+    ubm 
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+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
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+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+   Generating output for cell caravel_0008754b_fill_pattern_3_2
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+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_1_6: 1330000 rects
+caravel_0008754b_fill_pattern_1_0: 3680000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_4_3
+caravel_0008754b_fill_pattern_1_4: 4220000 rects
+caravel_0008754b_fill_pattern_4_1: 3100000 rects
+caravel_0008754b_fill_pattern_3_4: 3600000 rects
+caravel_0008754b_fill_pattern_1_6: 1340000 rects
+caravel_0008754b_fill_pattern_2_3: 4750000 rects
+caravel_0008754b_fill_pattern_1_6: 1350000 rects
+caravel_0008754b_fill_pattern_2_3: 4760000 rects
+caravel_0008754b_fill_pattern_4_1: 3110000 rects
+caravel_0008754b_fill_pattern_1_6: 1360000 rects
+caravel_0008754b_fill_pattern_0_1: 3040000 rects
+caravel_0008754b_fill_pattern_2_5: 4490000 rects
+caravel_0008754b_fill_pattern_4_5: 3420000 rects
+caravel_0008754b_fill_pattern_1_6: 1370000 rects
+caravel_0008754b_fill_pattern_3_4: 3610000 rects
+caravel_0008754b_fill_pattern_1_0: 3690000 rects
+caravel_0008754b_fill_pattern_2_3: 4770000 rects
+caravel_0008754b_fill_pattern_3_6: 3210000 rects
+caravel_0008754b_fill_pattern_4_1: 3120000 rects
+caravel_0008754b_fill_pattern_1_6: 1380000 rects
+caravel_0008754b_fill_pattern_1_6: 1390000 rects
+caravel_0008754b_fill_pattern_2_3: 4780000 rects
+caravel_0008754b_fill_pattern_4_5: 3430000 rects
+caravel_0008754b_fill_pattern_4_5: 3440000 rects
+caravel_0008754b_fill_pattern_1_6: 1400000 rects
+caravel_0008754b_fill_pattern_4_1: 3130000 rects
+caravel_0008754b_fill_pattern_1_0: 3700000 rects
+caravel_0008754b_fill_pattern_0_1: 3050000 rects
+caravel_0008754b_fill_pattern_3_4: 3620000 rects
+caravel_0008754b_fill_pattern_3_6: 3220000 rects
+caravel_0008754b_fill_pattern_2_3: 4790000 rects
+caravel_0008754b_fill_pattern_1_6: 1410000 rects
+caravel_0008754b_fill_pattern_1_4: 4230000 rects
+caravel_0008754b_fill_pattern_4_1: 3140000 rects
+caravel_0008754b_fill_pattern_1_6: 1420000 rects
+caravel_0008754b_fill_pattern_2_3: 4800000 rects
+caravel_0008754b_fill_pattern_3_4: 3630000 rects
+caravel_0008754b_fill_pattern_2_5: 4500000 rects
+caravel_0008754b_fill_pattern_1_6: 1430000 rects
+caravel_0008754b_fill_pattern_4_1: 3150000 rects
+caravel_0008754b_fill_pattern_2_3: 4810000 rects
+caravel_0008754b_fill_pattern_3_6: 3230000 rects
+caravel_0008754b_fill_pattern_1_0: 3710000 rects
+caravel_0008754b_fill_pattern_4_1: 3160000 rects
+caravel_0008754b_fill_pattern_1_6: 1440000 rects
+caravel_0008754b_fill_pattern_4_1: 3170000 rects
+caravel_0008754b_fill_pattern_2_3: 4820000 rects
+caravel_0008754b_fill_pattern_0_1: 3060000 rects
+caravel_0008754b_fill_pattern_1_6: 1450000 rects
+caravel_0008754b_fill_pattern_3_4: 3640000 rects
+caravel_0008754b_fill_pattern_4_1: 3180000 rects
+caravel_0008754b_fill_pattern_4_5: 3450000 rects
+caravel_0008754b_fill_pattern_3_6: 3240000 rects
+caravel_0008754b_fill_pattern_2_3: 4830000 rects
+caravel_0008754b_fill_pattern_4_1: 3190000 rects
+caravel_0008754b_fill_pattern_1_6: 1460000 rects
+caravel_0008754b_fill_pattern_3_6: 3250000 rects
+caravel_0008754b_fill_pattern_4_1: 3200000 rects
+caravel_0008754b_fill_pattern_1_0: 3720000 rects
+caravel_0008754b_fill_pattern_3_6: 3260000 rects
+caravel_0008754b_fill_pattern_2_3: 4840000 rects
+caravel_0008754b_fill_pattern_1_6: 1470000 rects
+caravel_0008754b_fill_pattern_4_1: 3210000 rects
+caravel_0008754b_fill_pattern_1_4: 4240000 rects
+caravel_0008754b_fill_pattern_2_5: 4510000 rects
+caravel_0008754b_fill_pattern_3_4: 3650000 rects
+caravel_0008754b_fill_pattern_4_1: 3220000 rects
+caravel_0008754b_fill_pattern_0_1: 3070000 rects
+caravel_0008754b_fill_pattern_1_6: 1480000 rects
+caravel_0008754b_fill_pattern_2_3: 4850000 rects
+caravel_0008754b_fill_pattern_3_6: 3270000 rects
+caravel_0008754b_fill_pattern_4_1: 3230000 rects
+caravel_0008754b_fill_pattern_1_6: 1490000 rects
+caravel_0008754b_fill_pattern_4_1: 3240000 rects
+caravel_0008754b_fill_pattern_2_3: 4860000 rects
+caravel_0008754b_fill_pattern_3_6: 3280000 rects
+caravel_0008754b_fill_pattern_1_0: 3730000 rects
+caravel_0008754b_fill_pattern_4_1: 3250000 rects
+caravel_0008754b_fill_pattern_1_6: 1500000 rects
+caravel_0008754b_fill_pattern_3_4: 3660000 rects
+caravel_0008754b_fill_pattern_3_6: 3290000 rects
+caravel_0008754b_fill_pattern_2_3: 4870000 rects
+caravel_0008754b_fill_pattern_0_1: 3080000 rects
+caravel_0008754b_fill_pattern_4_1: 3260000 rects
+caravel_0008754b_fill_pattern_1_6: 1510000 rects
+caravel_0008754b_fill_pattern_3_6: 3300000 rects
+caravel_0008754b_fill_pattern_0_1: 3090000 rects
+caravel_0008754b_fill_pattern_2_3: 4880000 rects
+caravel_0008754b_fill_pattern_2_5: 4520000 rects
+caravel_0008754b_fill_pattern_0_1: 3100000 rects
+caravel_0008754b_fill_pattern_3_4: 3670000 rects
+caravel_0008754b_fill_pattern_1_4: 4250000 rects
+caravel_0008754b_fill_pattern_1_0: 3740000 rects
+caravel_0008754b_fill_pattern_2_3: 4890000 rects
+caravel_0008754b_fill_pattern_0_1: 3110000 rects
+caravel_0008754b_fill_pattern_1_6: 1520000 rects
+caravel_0008754b_fill_pattern_0_1: 3120000 rects
+caravel_0008754b_fill_pattern_2_3: 4900000 rects
+caravel_0008754b_fill_pattern_0_1: 3130000 rects
+Ended: 12/10/2022 09:59:12
+caravel_0008754b_fill_pattern_3_6: 3310000 rects
+caravel_0008754b_fill_pattern_1_6: 1530000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_2_3: 4910000 rects
+caravel_0008754b_fill_pattern_3_4: 3680000 rects
+caravel_0008754b_fill_pattern_2_5: 4530000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_4_5
+caravel_0008754b_fill_pattern_0_1: 3140000 rects
+caravel_0008754b_fill_pattern_1_0: 3750000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_2_3: 4920000 rects
+caravel_0008754b_fill_pattern_0_1: 3150000 rects
+caravel_0008754b_fill_pattern_1_6: 1540000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_0_1: 3160000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_2_3: 4930000 rects
+caravel_0008754b_fill_pattern_3_4: 3690000 rects
+caravel_0008754b_fill_pattern_0_1: 3170000 rects
+caravel_0008754b_fill_pattern_1_4: 4260000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_2_3: 4940000 rects
+caravel_0008754b_fill_pattern_1_0: 3760000 rects
+caravel_0008754b_fill_pattern_1_6: 1550000 rects
+caravel_0008754b_fill_pattern_0_1: 3180000 rects
+caravel_0008754b_fill_pattern_2_5: 4540000 rects
+caravel_0008754b_fill_pattern_4_1: 3270000 rects
+caravel_0008754b_fill_pattern_2_3: 4950000 rects
+caravel_0008754b_fill_pattern_0_1: 3190000 rects
+caravel_0008754b_fill_pattern_3_4: 3700000 rects
+caravel_0008754b_fill_pattern_0_1: 3200000 rects
+caravel_0008754b_fill_pattern_1_6: 1560000 rects
+caravel_0008754b_fill_pattern_2_3: 4960000 rects
+caravel_0008754b_fill_pattern_1_0: 3770000 rects
+caravel_0008754b_fill_pattern_0_1: 3210000 rects
+caravel_0008754b_fill_pattern_2_3: 4970000 rects
+caravel_0008754b_fill_pattern_1_6: 1570000 rects
+caravel_0008754b_fill_pattern_3_4: 3710000 rects
+caravel_0008754b_fill_pattern_2_3: 4980000 rects
+caravel_0008754b_fill_pattern_0_1: 3220000 rects
+caravel_0008754b_fill_pattern_1_4: 4270000 rects
+caravel_0008754b_fill_pattern_2_3: 4990000 rects
+caravel_0008754b_fill_pattern_2_5: 4550000 rects
+caravel_0008754b_fill_pattern_1_0: 3780000 rects
+caravel_0008754b_fill_pattern_2_3: 5000000 rects
+caravel_0008754b_fill_pattern_0_1: 3230000 rects
+caravel_0008754b_fill_pattern_1_6: 1580000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_2_3: 5010000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+caravel_0008754b_fill_pattern_3_4: 3720000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_2_3: 5020000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_0_1: 3240000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_3_6
+caravel_0008754b_fill_pattern_1_6: 1590000 rects
+caravel_0008754b_fill_pattern_4_7: 10000 rects
+caravel_0008754b_fill_pattern_2_3: 5030000 rects
+caravel_0008754b_fill_pattern_0_1: 3250000 rects
+caravel_0008754b_fill_pattern_1_0: 3790000 rects
+caravel_0008754b_fill_pattern_4_7: 20000 rects
+caravel_0008754b_fill_pattern_2_3: 5040000 rects
+caravel_0008754b_fill_pattern_0_1: 3260000 rects
+caravel_0008754b_fill_pattern_4_1: 3280000 rects
+caravel_0008754b_fill_pattern_3_4: 3730000 rects
+caravel_0008754b_fill_pattern_2_5: 4560000 rects
+caravel_0008754b_fill_pattern_4_7: 30000 rects
+caravel_0008754b_fill_pattern_2_3: 5050000 rects
+caravel_0008754b_fill_pattern_1_6: 1600000 rects
+caravel_0008754b_fill_pattern_1_4: 4280000 rects
+caravel_0008754b_fill_pattern_4_7: 40000 rects
+caravel_0008754b_fill_pattern_2_3: 5060000 rects
+caravel_0008754b_fill_pattern_0_1: 3270000 rects
+caravel_0008754b_fill_pattern_4_7: 50000 rects
+caravel_0008754b_fill_pattern_2_3: 5070000 rects
+caravel_0008754b_fill_pattern_0_1: 3280000 rects
+caravel_0008754b_fill_pattern_4_7: 60000 rects
+caravel_0008754b_fill_pattern_1_0: 3800000 rects
+caravel_0008754b_fill_pattern_2_3: 5080000 rects
+caravel_0008754b_fill_pattern_1_6: 1610000 rects
+caravel_0008754b_fill_pattern_4_7: 70000 rects
+caravel_0008754b_fill_pattern_3_4: 3740000 rects
+caravel_0008754b_fill_pattern_0_1: 3290000 rects
+caravel_0008754b_fill_pattern_2_3: 5090000 rects
+caravel_0008754b_fill_pattern_4_7: 80000 rects
+caravel_0008754b_fill_pattern_2_3: 5100000 rects
+caravel_0008754b_fill_pattern_4_7: 90000 rects
+caravel_0008754b_fill_pattern_1_6: 1620000 rects
+caravel_0008754b_fill_pattern_0_1: 3300000 rects
+caravel_0008754b_fill_pattern_2_3: 5110000 rects
+caravel_0008754b_fill_pattern_4_7: 100000 rects
+caravel_0008754b_fill_pattern_2_5: 4570000 rects
+caravel_0008754b_fill_pattern_2_3: 5120000 rects
+caravel_0008754b_fill_pattern_4_7: 110000 rects
+caravel_0008754b_fill_pattern_1_0: 3810000 rects
+caravel_0008754b_fill_pattern_0_1: 3310000 rects
+caravel_0008754b_fill_pattern_3_4: 3750000 rects
+caravel_0008754b_fill_pattern_1_6: 1630000 rects
+caravel_0008754b_fill_pattern_2_3: 5130000 rects
+caravel_0008754b_fill_pattern_1_4: 4290000 rects
+caravel_0008754b_fill_pattern_4_7: 120000 rects
+caravel_0008754b_fill_pattern_4_1: 3290000 rects
+caravel_0008754b_fill_pattern_2_3: 5140000 rects
+caravel_0008754b_fill_pattern_0_1: 3320000 rects
+caravel_0008754b_fill_pattern_4_7: 130000 rects
+caravel_0008754b_fill_pattern_2_3: 5150000 rects
+caravel_0008754b_fill_pattern_1_6: 1640000 rects
+caravel_0008754b_fill_pattern_4_7: 140000 rects
+caravel_0008754b_fill_pattern_0_1: 3330000 rects
+caravel_0008754b_fill_pattern_2_3: 5160000 rects
+caravel_0008754b_fill_pattern_1_0: 3820000 rects
+caravel_0008754b_fill_pattern_3_4: 3760000 rects
+caravel_0008754b_fill_pattern_4_7: 150000 rects
+caravel_0008754b_fill_pattern_2_3: 5170000 rects
+caravel_0008754b_fill_pattern_1_6: 1650000 rects
+caravel_0008754b_fill_pattern_2_5: 4580000 rects
+caravel_0008754b_fill_pattern_4_7: 160000 rects
+caravel_0008754b_fill_pattern_0_1: 3340000 rects
+caravel_0008754b_fill_pattern_2_3: 5180000 rects
+caravel_0008754b_fill_pattern_2_3: 5190000 rects
+caravel_0008754b_fill_pattern_4_7: 170000 rects
+caravel_0008754b_fill_pattern_0_1: 3350000 rects
+caravel_0008754b_fill_pattern_3_4: 3770000 rects
+caravel_0008754b_fill_pattern_1_0: 3830000 rects
+caravel_0008754b_fill_pattern_1_6: 1660000 rects
+caravel_0008754b_fill_pattern_2_3: 5200000 rects
+caravel_0008754b_fill_pattern_1_4: 4300000 rects
+caravel_0008754b_fill_pattern_4_1: 3300000 rects
+caravel_0008754b_fill_pattern_4_7: 180000 rects
+caravel_0008754b_fill_pattern_1_6: 1670000 rects
+caravel_0008754b_fill_pattern_0_1: 3360000 rects
+caravel_0008754b_fill_pattern_2_3: 5210000 rects
+caravel_0008754b_fill_pattern_2_5: 4590000 rects
+caravel_0008754b_fill_pattern_4_7: 190000 rects
+caravel_0008754b_fill_pattern_1_6: 1680000 rects
+caravel_0008754b_fill_pattern_0_1: 3370000 rects
+caravel_0008754b_fill_pattern_2_3: 5220000 rects
+caravel_0008754b_fill_pattern_4_7: 200000 rects
+caravel_0008754b_fill_pattern_1_6: 1690000 rects
+caravel_0008754b_fill_pattern_3_4: 3780000 rects
+caravel_0008754b_fill_pattern_1_0: 3840000 rects
+caravel_0008754b_fill_pattern_4_7: 210000 rects
+caravel_0008754b_fill_pattern_2_3: 5230000 rects
+caravel_0008754b_fill_pattern_1_6: 1700000 rects
+caravel_0008754b_fill_pattern_0_1: 3380000 rects
+caravel_0008754b_fill_pattern_1_6: 1710000 rects
+caravel_0008754b_fill_pattern_4_7: 220000 rects
+caravel_0008754b_fill_pattern_0_1: 3390000 rects
+caravel_0008754b_fill_pattern_1_6: 1720000 rects
+caravel_0008754b_fill_pattern_3_4: 3790000 rects
+caravel_0008754b_fill_pattern_1_0: 3850000 rects
+caravel_0008754b_fill_pattern_1_4: 4310000 rects
+caravel_0008754b_fill_pattern_2_5: 4600000 rects
+caravel_0008754b_fill_pattern_1_6: 1730000 rects
+caravel_0008754b_fill_pattern_0_1: 3400000 rects
+caravel_0008754b_fill_pattern_4_7: 230000 rects
+caravel_0008754b_fill_pattern_1_6: 1740000 rects
+caravel_0008754b_fill_pattern_0_1: 3410000 rects
+caravel_0008754b_fill_pattern_2_3: 5240000 rects
+caravel_0008754b_fill_pattern_1_6: 1750000 rects
+caravel_0008754b_fill_pattern_3_4: 3800000 rects
+caravel_0008754b_fill_pattern_1_0: 3860000 rects
+caravel_0008754b_fill_pattern_4_7: 240000 rects
+caravel_0008754b_fill_pattern_4_1: 3310000 rects
+caravel_0008754b_fill_pattern_1_6: 1760000 rects
+caravel_0008754b_fill_pattern_0_1: 3420000 rects
+caravel_0008754b_fill_pattern_1_6: 1770000 rects
+caravel_0008754b_fill_pattern_2_5: 4610000 rects
+caravel_0008754b_fill_pattern_4_7: 250000 rects
+caravel_0008754b_fill_pattern_0_1: 3430000 rects
+caravel_0008754b_fill_pattern_1_6: 1780000 rects
+caravel_0008754b_fill_pattern_3_4: 3810000 rects
+caravel_0008754b_fill_pattern_2_3: 5250000 rects
+caravel_0008754b_fill_pattern_1_4: 4320000 rects
+caravel_0008754b_fill_pattern_1_6: 1790000 rects
+caravel_0008754b_fill_pattern_0_1: 3440000 rects
+caravel_0008754b_fill_pattern_4_7: 260000 rects
+caravel_0008754b_fill_pattern_1_0: 3870000 rects
+caravel_0008754b_fill_pattern_1_6: 1800000 rects
+caravel_0008754b_fill_pattern_0_1: 3450000 rects
+caravel_0008754b_fill_pattern_1_6: 1810000 rects
+caravel_0008754b_fill_pattern_3_4: 3820000 rects
+caravel_0008754b_fill_pattern_4_7: 270000 rects
+caravel_0008754b_fill_pattern_1_6: 1820000 rects
+caravel_0008754b_fill_pattern_0_1: 3460000 rects
+caravel_0008754b_fill_pattern_2_5: 4620000 rects
+caravel_0008754b_fill_pattern_1_6: 1830000 rects
+caravel_0008754b_fill_pattern_1_0: 3880000 rects
+caravel_0008754b_fill_pattern_2_3: 5260000 rects
+caravel_0008754b_fill_pattern_4_7: 280000 rects
+caravel_0008754b_fill_pattern_0_1: 3470000 rects
+caravel_0008754b_fill_pattern_1_4: 4330000 rects
+caravel_0008754b_fill_pattern_1_6: 1840000 rects
+caravel_0008754b_fill_pattern_3_4: 3830000 rects
+caravel_0008754b_fill_pattern_1_6: 1850000 rects
+caravel_0008754b_fill_pattern_4_7: 290000 rects
+caravel_0008754b_fill_pattern_0_1: 3480000 rects
+caravel_0008754b_fill_pattern_1_6: 1860000 rects
+caravel_0008754b_fill_pattern_1_0: 3890000 rects
+caravel_0008754b_fill_pattern_1_6: 1870000 rects
+caravel_0008754b_fill_pattern_4_7: 300000 rects
+caravel_0008754b_fill_pattern_4_1: 3320000 rects
+caravel_0008754b_fill_pattern_0_1: 3490000 rects
+caravel_0008754b_fill_pattern_3_4: 3840000 rects
+caravel_0008754b_fill_pattern_2_5: 4630000 rects
+caravel_0008754b_fill_pattern_1_6: 1880000 rects
+caravel_0008754b_fill_pattern_2_3: 5270000 rects
+caravel_0008754b_fill_pattern_1_4: 4340000 rects
+caravel_0008754b_fill_pattern_4_7: 310000 rects
+caravel_0008754b_fill_pattern_1_6: 1890000 rects
+caravel_0008754b_fill_pattern_0_1: 3500000 rects
+caravel_0008754b_fill_pattern_1_0: 3900000 rects
+caravel_0008754b_fill_pattern_1_6: 1900000 rects
+caravel_0008754b_fill_pattern_4_7: 320000 rects
+caravel_0008754b_fill_pattern_0_1: 3510000 rects
+caravel_0008754b_fill_pattern_3_4: 3850000 rects
+caravel_0008754b_fill_pattern_1_6: 1910000 rects
+caravel_0008754b_fill_pattern_1_6: 1920000 rects
+caravel_0008754b_fill_pattern_4_7: 330000 rects
+caravel_0008754b_fill_pattern_0_1: 3520000 rects
+caravel_0008754b_fill_pattern_1_0: 3910000 rects
+caravel_0008754b_fill_pattern_2_5: 4640000 rects
+caravel_0008754b_fill_pattern_1_6: 1930000 rects
+caravel_0008754b_fill_pattern_4_7: 340000 rects
+caravel_0008754b_fill_pattern_2_3: 5280000 rects
+caravel_0008754b_fill_pattern_1_4: 4350000 rects
+caravel_0008754b_fill_pattern_1_6: 1940000 rects
+caravel_0008754b_fill_pattern_0_1: 3530000 rects
+caravel_0008754b_fill_pattern_4_7: 350000 rects
+caravel_0008754b_fill_pattern_3_4: 3860000 rects
+caravel_0008754b_fill_pattern_4_1: 3330000 rects
+caravel_0008754b_fill_pattern_1_6: 1950000 rects
+caravel_0008754b_fill_pattern_4_7: 360000 rects
+caravel_0008754b_fill_pattern_0_1: 3540000 rects
+caravel_0008754b_fill_pattern_1_6: 1960000 rects
+caravel_0008754b_fill_pattern_4_7: 370000 rects
+caravel_0008754b_fill_pattern_1_0: 3920000 rects
+caravel_0008754b_fill_pattern_2_5: 4650000 rects
+caravel_0008754b_fill_pattern_4_7: 380000 rects
+caravel_0008754b_fill_pattern_1_6: 1970000 rects
+caravel_0008754b_fill_pattern_0_1: 3550000 rects
+caravel_0008754b_fill_pattern_3_4: 3870000 rects
+caravel_0008754b_fill_pattern_1_6: 1980000 rects
+caravel_0008754b_fill_pattern_4_7: 390000 rects
+caravel_0008754b_fill_pattern_1_4: 4360000 rects
+caravel_0008754b_fill_pattern_2_3: 5290000 rects
+caravel_0008754b_fill_pattern_4_7: 400000 rects
+caravel_0008754b_fill_pattern_0_1: 3560000 rects
+caravel_0008754b_fill_pattern_1_6: 1990000 rects
+caravel_0008754b_fill_pattern_1_0: 3930000 rects
+caravel_0008754b_fill_pattern_4_7: 410000 rects
+caravel_0008754b_fill_pattern_1_6: 2000000 rects
+caravel_0008754b_fill_pattern_0_1: 3570000 rects
+caravel_0008754b_fill_pattern_4_7: 420000 rects
+caravel_0008754b_fill_pattern_3_4: 3880000 rects
+caravel_0008754b_fill_pattern_1_6: 2010000 rects
+caravel_0008754b_fill_pattern_2_5: 4660000 rects
+caravel_0008754b_fill_pattern_4_7: 430000 rects
+caravel_0008754b_fill_pattern_1_6: 2020000 rects
+caravel_0008754b_fill_pattern_2_3: 5300000 rects
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+caravel_0008754b_fill_pattern_1_6: 2030000 rects
+caravel_0008754b_fill_pattern_4_7: 440000 rects
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0008754b_fill_pattern_4_7
+caravel_0008754b_fill_pattern_1_4: 4590000 rects
+caravel_0008754b_fill_pattern_3_4: 4330000 rects
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+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_1_6: 2540000 rects
+caravel_0008754b_fill_pattern_3_4: 4430000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_4_1
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+caravel_0008754b_fill_pattern_0_1: 3860000 rects
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+caravel_0008754b_fill_pattern_0_1: 4680000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_1_6: 2810000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_1_4
+caravel_0008754b_fill_pattern_2_5: 5120000 rects
+caravel_0008754b_fill_pattern_1_6: 2820000 rects
+caravel_0008754b_fill_pattern_2_3: 5760000 rects
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+caravel_0008754b_fill_pattern_1_6: 2890000 rects
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+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_1_6: 2900000 rects
+caravel_0008754b_fill_pattern_1_0: 4630000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_0_1
+caravel_0008754b_fill_pattern_1_6: 2910000 rects
+caravel_0008754b_fill_pattern_1_6: 2920000 rects
+caravel_0008754b_fill_pattern_1_6: 2930000 rects
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+caravel_0008754b_fill_pattern_1_0: 4990000 rects
+caravel_0008754b_fill_pattern_1_0: 5000000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_1_0: 5010000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_3_4
+caravel_0008754b_fill_pattern_2_3: 5970000 rects
+caravel_0008754b_fill_pattern_1_6: 3210000 rects
+caravel_0008754b_fill_pattern_2_5: 5340000 rects
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+caravel_0008754b_fill_pattern_1_0: 5230000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_1_6
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+caravel_0008754b_fill_pattern_1_0: 6290000 rects
+caravel_0008754b_fill_pattern_2_5: 5820000 rects
+Ended: 12/10/2022 09:59:38
+caravel_0008754b_fill_pattern_1_0: 6300000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+caravel_0008754b_fill_pattern_1_0: 6310000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_1_0: 6320000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_1_0: 6330000 rects
+caravel_0008754b_fill_pattern_1_0: 6340000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+caravel_0008754b_fill_pattern_1_0: 6430000 rects
+caravel_0008754b_fill_pattern_2_5: 5840000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
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+caravel_0008754b_fill_pattern_2_3: 6470000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_5_6: 590000 rects
+caravel_0008754b_fill_pattern_5_6: 600000 rects
+caravel_0008754b_fill_pattern_5_6: 610000 rects
+caravel_0008754b_fill_pattern_2_5: 5990000 rects
+caravel_0008754b_fill_pattern_5_6: 620000 rects
+caravel_0008754b_fill_pattern_1_0: 6640000 rects
+caravel_0008754b_fill_pattern_5_6: 630000 rects
+caravel_0008754b_fill_pattern_2_3: 6620000 rects
+caravel_0008754b_fill_pattern_5_6: 640000 rects
+caravel_0008754b_fill_pattern_5_6: 650000 rects
+caravel_0008754b_fill_pattern_2_5: 6000000 rects
+caravel_0008754b_fill_pattern_5_6: 660000 rects
+caravel_0008754b_fill_pattern_5_6: 670000 rects
+caravel_0008754b_fill_pattern_2_3: 6630000 rects
+caravel_0008754b_fill_pattern_2_5: 6010000 rects
+caravel_0008754b_fill_pattern_1_0: 6650000 rects
+caravel_0008754b_fill_pattern_2_3: 6640000 rects
+caravel_0008754b_fill_pattern_2_5: 6020000 rects
+caravel_0008754b_fill_pattern_2_3: 6650000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_5_6
+caravel_0008754b_fill_pattern_1_0: 6660000 rects
+caravel_0008754b_fill_pattern_2_5: 6030000 rects
+caravel_0008754b_fill_pattern_2_3: 6660000 rects
+caravel_0008754b_fill_pattern_1_0: 6670000 rects
+caravel_0008754b_fill_pattern_2_5: 6040000 rects
+caravel_0008754b_fill_pattern_2_3: 6670000 rects
+caravel_0008754b_fill_pattern_1_0: 6680000 rects
+caravel_0008754b_fill_pattern_2_5: 6050000 rects
+caravel_0008754b_fill_pattern_1_0: 6690000 rects
+caravel_0008754b_fill_pattern_2_3: 6680000 rects
+caravel_0008754b_fill_pattern_1_0: 6700000 rects
+caravel_0008754b_fill_pattern_2_5: 6060000 rects
+caravel_0008754b_fill_pattern_1_0: 6710000 rects
+caravel_0008754b_fill_pattern_2_3: 6690000 rects
+caravel_0008754b_fill_pattern_1_0: 6720000 rects
+caravel_0008754b_fill_pattern_2_5: 6070000 rects
+caravel_0008754b_fill_pattern_1_0: 6730000 rects
+caravel_0008754b_fill_pattern_2_3: 6700000 rects
+caravel_0008754b_fill_pattern_1_0: 6740000 rects
+caravel_0008754b_fill_pattern_1_0: 6750000 rects
+caravel_0008754b_fill_pattern_2_5: 6080000 rects
+caravel_0008754b_fill_pattern_1_0: 6760000 rects
+caravel_0008754b_fill_pattern_1_0: 6770000 rects
+caravel_0008754b_fill_pattern_1_0: 6780000 rects
+caravel_0008754b_fill_pattern_2_3: 6710000 rects
+caravel_0008754b_fill_pattern_1_0: 6790000 rects
+caravel_0008754b_fill_pattern_1_0: 6800000 rects
+caravel_0008754b_fill_pattern_1_0: 6810000 rects
+caravel_0008754b_fill_pattern_1_0: 6820000 rects
+caravel_0008754b_fill_pattern_2_5: 6090000 rects
+caravel_0008754b_fill_pattern_1_0: 6830000 rects
+caravel_0008754b_fill_pattern_2_3: 6720000 rects
+caravel_0008754b_fill_pattern_1_0: 6840000 rects
+caravel_0008754b_fill_pattern_2_5: 6100000 rects
+caravel_0008754b_fill_pattern_1_0: 6850000 rects
+caravel_0008754b_fill_pattern_2_3: 6730000 rects
+caravel_0008754b_fill_pattern_2_5: 6110000 rects
+caravel_0008754b_fill_pattern_1_0: 6860000 rects
+caravel_0008754b_fill_pattern_1_0: 6870000 rects
+caravel_0008754b_fill_pattern_2_3: 6740000 rects
+caravel_0008754b_fill_pattern_1_0: 6880000 rects
+caravel_0008754b_fill_pattern_2_5: 6120000 rects
+caravel_0008754b_fill_pattern_1_0: 6890000 rects
+caravel_0008754b_fill_pattern_1_0: 6900000 rects
+caravel_0008754b_fill_pattern_2_3: 6750000 rects
+caravel_0008754b_fill_pattern_1_0: 6910000 rects
+caravel_0008754b_fill_pattern_1_0: 6920000 rects
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+caravel_0008754b_fill_pattern_1_0: 6930000 rects
+caravel_0008754b_fill_pattern_1_0: 6940000 rects
+caravel_0008754b_fill_pattern_1_0: 6950000 rects
+caravel_0008754b_fill_pattern_2_3: 6760000 rects
+caravel_0008754b_fill_pattern_1_0: 6960000 rects
+caravel_0008754b_fill_pattern_2_5: 6140000 rects
+caravel_0008754b_fill_pattern_2_3: 6770000 rects
+caravel_0008754b_fill_pattern_1_0: 6970000 rects
+caravel_0008754b_fill_pattern_2_5: 6150000 rects
+caravel_0008754b_fill_pattern_1_0: 6980000 rects
+caravel_0008754b_fill_pattern_2_3: 6780000 rects
+caravel_0008754b_fill_pattern_1_0: 6990000 rects
+caravel_0008754b_fill_pattern_1_0: 7000000 rects
+caravel_0008754b_fill_pattern_2_5: 6160000 rects
+caravel_0008754b_fill_pattern_1_0: 7010000 rects
+caravel_0008754b_fill_pattern_1_0: 7020000 rects
+caravel_0008754b_fill_pattern_2_3: 6790000 rects
+caravel_0008754b_fill_pattern_2_5: 6170000 rects
+caravel_0008754b_fill_pattern_1_0: 7030000 rects
+caravel_0008754b_fill_pattern_2_3: 6800000 rects
+caravel_0008754b_fill_pattern_2_5: 6180000 rects
+caravel_0008754b_fill_pattern_2_3: 6810000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_1_0
+caravel_0008754b_fill_pattern_2_5: 6190000 rects
+caravel_0008754b_fill_pattern_2_3: 6820000 rects
+caravel_0008754b_fill_pattern_2_5: 6200000 rects
+caravel_0008754b_fill_pattern_2_3: 6830000 rects
+caravel_0008754b_fill_pattern_2_5: 6210000 rects
+caravel_0008754b_fill_pattern_2_3: 6840000 rects
+caravel_0008754b_fill_pattern_2_5: 6220000 rects
+caravel_0008754b_fill_pattern_2_3: 6850000 rects
+caravel_0008754b_fill_pattern_2_5: 6230000 rects
+caravel_0008754b_fill_pattern_2_3: 6860000 rects
+caravel_0008754b_fill_pattern_2_5: 6240000 rects
+caravel_0008754b_fill_pattern_2_3: 6870000 rects
+caravel_0008754b_fill_pattern_2_5: 6250000 rects
+caravel_0008754b_fill_pattern_2_3: 6880000 rects
+caravel_0008754b_fill_pattern_2_5: 6260000 rects
+caravel_0008754b_fill_pattern_2_3: 6890000 rects
+caravel_0008754b_fill_pattern_2_5: 6270000 rects
+caravel_0008754b_fill_pattern_2_3: 6900000 rects
+caravel_0008754b_fill_pattern_2_5: 6280000 rects
+caravel_0008754b_fill_pattern_2_3: 6910000 rects
+caravel_0008754b_fill_pattern_2_5: 6290000 rects
+caravel_0008754b_fill_pattern_2_3: 6920000 rects
+caravel_0008754b_fill_pattern_2_5: 6300000 rects
+caravel_0008754b_fill_pattern_2_3: 6930000 rects
+caravel_0008754b_fill_pattern_2_5: 6310000 rects
+caravel_0008754b_fill_pattern_2_3: 6940000 rects
+caravel_0008754b_fill_pattern_2_5: 6320000 rects
+caravel_0008754b_fill_pattern_2_3: 6950000 rects
+caravel_0008754b_fill_pattern_2_5: 6330000 rects
+caravel_0008754b_fill_pattern_2_3: 6960000 rects
+caravel_0008754b_fill_pattern_2_5: 6340000 rects
+caravel_0008754b_fill_pattern_2_3: 6970000 rects
+caravel_0008754b_fill_pattern_2_5: 6350000 rects
+caravel_0008754b_fill_pattern_2_3: 6980000 rects
+caravel_0008754b_fill_pattern_2_5: 6360000 rects
+caravel_0008754b_fill_pattern_2_3: 6990000 rects
+caravel_0008754b_fill_pattern_2_5: 6370000 rects
+caravel_0008754b_fill_pattern_2_3: 7000000 rects
+caravel_0008754b_fill_pattern_2_5: 6380000 rects
+caravel_0008754b_fill_pattern_2_3: 7010000 rects
+caravel_0008754b_fill_pattern_2_5: 6390000 rects
+caravel_0008754b_fill_pattern_2_3: 7020000 rects
+caravel_0008754b_fill_pattern_2_5: 6400000 rects
+caravel_0008754b_fill_pattern_2_3: 7030000 rects
+caravel_0008754b_fill_pattern_2_3: 7040000 rects
+caravel_0008754b_fill_pattern_2_5: 6410000 rects
+caravel_0008754b_fill_pattern_2_5: 6420000 rects
+Ended: 12/10/2022 09:59:51
+caravel_0008754b_fill_pattern_2_3: 7050000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_2_5: 6430000 rects
+caravel_0008754b_fill_pattern_2_3: 7060000 rects
+caravel_0008754b_fill_pattern_2_3: 7070000 rects
+caravel_0008754b_fill_pattern_2_5: 6440000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_2_1: 10000 rects
+caravel_0008754b_fill_pattern_2_1: 20000 rects
+caravel_0008754b_fill_pattern_2_1: 30000 rects
+caravel_0008754b_fill_pattern_2_1: 40000 rects
+caravel_0008754b_fill_pattern_2_3: 7080000 rects
+caravel_0008754b_fill_pattern_2_5: 6450000 rects
+caravel_0008754b_fill_pattern_2_1: 50000 rects
+caravel_0008754b_fill_pattern_2_1: 60000 rects
+caravel_0008754b_fill_pattern_2_1: 70000 rects
+caravel_0008754b_fill_pattern_2_1: 80000 rects
+caravel_0008754b_fill_pattern_2_1: 90000 rects
+caravel_0008754b_fill_pattern_2_1: 100000 rects
+caravel_0008754b_fill_pattern_2_1: 110000 rects
+caravel_0008754b_fill_pattern_2_3: 7090000 rects
+caravel_0008754b_fill_pattern_2_5: 6460000 rects
+caravel_0008754b_fill_pattern_2_1: 120000 rects
+caravel_0008754b_fill_pattern_2_1: 130000 rects
+caravel_0008754b_fill_pattern_2_1: 140000 rects
+caravel_0008754b_fill_pattern_2_1: 150000 rects
+caravel_0008754b_fill_pattern_2_1: 160000 rects
+caravel_0008754b_fill_pattern_2_5: 6470000 rects
+caravel_0008754b_fill_pattern_2_1: 170000 rects
+caravel_0008754b_fill_pattern_2_3: 7100000 rects
+caravel_0008754b_fill_pattern_2_1: 180000 rects
+caravel_0008754b_fill_pattern_2_1: 190000 rects
+caravel_0008754b_fill_pattern_2_1: 200000 rects
+caravel_0008754b_fill_pattern_2_5: 6480000 rects
+caravel_0008754b_fill_pattern_2_1: 210000 rects
+caravel_0008754b_fill_pattern_2_3: 7110000 rects
+caravel_0008754b_fill_pattern_2_1: 220000 rects
+caravel_0008754b_fill_pattern_2_1: 230000 rects
+caravel_0008754b_fill_pattern_2_1: 240000 rects
+caravel_0008754b_fill_pattern_2_1: 250000 rects
+caravel_0008754b_fill_pattern_2_3: 7120000 rects
+caravel_0008754b_fill_pattern_2_1: 260000 rects
+caravel_0008754b_fill_pattern_2_5: 6490000 rects
+caravel_0008754b_fill_pattern_2_1: 270000 rects
+caravel_0008754b_fill_pattern_2_1: 280000 rects
+caravel_0008754b_fill_pattern_2_1: 290000 rects
+caravel_0008754b_fill_pattern_2_1: 300000 rects
+caravel_0008754b_fill_pattern_2_3: 7130000 rects
+caravel_0008754b_fill_pattern_2_1: 310000 rects
+caravel_0008754b_fill_pattern_2_1: 320000 rects
+caravel_0008754b_fill_pattern_2_5: 6500000 rects
+caravel_0008754b_fill_pattern_2_1: 330000 rects
+caravel_0008754b_fill_pattern_2_1: 340000 rects
+caravel_0008754b_fill_pattern_2_3: 7140000 rects
+caravel_0008754b_fill_pattern_2_1: 350000 rects
+caravel_0008754b_fill_pattern_2_5: 6510000 rects
+caravel_0008754b_fill_pattern_2_1: 360000 rects
+caravel_0008754b_fill_pattern_2_1: 370000 rects
+caravel_0008754b_fill_pattern_2_1: 380000 rects
+caravel_0008754b_fill_pattern_2_3: 7150000 rects
+caravel_0008754b_fill_pattern_2_1: 390000 rects
+caravel_0008754b_fill_pattern_2_1: 400000 rects
+caravel_0008754b_fill_pattern_2_5: 6520000 rects
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+caravel_0008754b_fill_pattern_2_1: 440000 rects
+caravel_0008754b_fill_pattern_2_3: 7160000 rects
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+caravel_0008754b_fill_pattern_2_1: 480000 rects
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+caravel_0008754b_fill_pattern_2_1: 550000 rects
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+caravel_0008754b_fill_pattern_2_1: 570000 rects
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+caravel_0008754b_fill_pattern_2_1: 1650000 rects
+Ended: 12/10/2022 09:59:58
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_2_3: 7410000 rects
+caravel_0008754b_fill_pattern_2_1: 1660000 rects
+Processing system .magicrc file
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+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_2_5: 6780000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_2_3: 7430000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_0_3: 810000 rects
+caravel_0008754b_fill_pattern_2_1: 2450000 rects
+Ended: 12/10/2022 10:00:03
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+caravel_0008754b_fill_pattern_0_3: 820000 rects
+caravel_0008754b_fill_pattern_2_3: 7630000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_0_3: 830000 rects
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+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
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+caravel_0008754b_fill_pattern_2_3: 7650000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+   Generating output for cell caravel_0008754b_fill_pattern_0_3
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+caravel_0008754b_fill_pattern_3_0: 4780000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_2_3
+caravel_0008754b_fill_pattern_2_1: 5350000 rects
+caravel_0008754b_fill_pattern_3_0: 4790000 rects
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+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_3_0: 5430000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_2_1
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+caravel_0008754b_fill_pattern_3_0: 5850000 rects
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+caravel_0008754b_fill_pattern_3_0: 5870000 rects
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+caravel_0008754b_fill_pattern_3_0: 5950000 rects
+caravel_0008754b_fill_pattern_3_0: 5960000 rects
+Ended: 12/10/2022 10:00:55
+caravel_0008754b_fill_pattern_3_0: 5970000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_3_0: 5980000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_3_0: 5990000 rects
+caravel_0008754b_fill_pattern_3_0: 6000000 rects
+caravel_0008754b_fill_pattern_3_0: 6010000 rects
+caravel_0008754b_fill_pattern_3_0: 6020000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_3_0: 6170000 rects
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+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_1_2
+Ended: 12/10/2022 10:01:47
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+Ended: 12/10/2022 10:02:00
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Ended: 12/10/2022 10:02:01
+caravel_0008754b_fill_pattern_4_2: 2630000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_4_2: 2640000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_0_6: 10000 rects
+caravel_0008754b_fill_pattern_0_6: 20000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_0_6: 30000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_4_2
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+caravel_0008754b_fill_pattern_2_4: 4830000 rects
+caravel_0008754b_fill_pattern_2_4: 4840000 rects
+Ended: 12/10/2022 10:02:25
+caravel_0008754b_fill_pattern_2_4: 4850000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_2_4: 4860000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_2_4: 4870000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_2_4: 4880000 rects
+caravel_0008754b_fill_pattern_2_4: 4890000 rects
+caravel_0008754b_fill_pattern_2_4: 4900000 rects
+caravel_0008754b_fill_pattern_2_4: 4910000 rects
+caravel_0008754b_fill_pattern_2_4: 4920000 rects
+caravel_0008754b_fill_pattern_2_4: 4930000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_2_4: 4940000 rects
+caravel_0008754b_fill_pattern_5_1: 10000 rects
+caravel_0008754b_fill_pattern_5_1: 20000 rects
+caravel_0008754b_fill_pattern_2_4: 4950000 rects
+caravel_0008754b_fill_pattern_5_1: 30000 rects
+caravel_0008754b_fill_pattern_5_1: 40000 rects
+caravel_0008754b_fill_pattern_5_1: 50000 rects
+caravel_0008754b_fill_pattern_2_4: 4960000 rects
+caravel_0008754b_fill_pattern_5_1: 60000 rects
+caravel_0008754b_fill_pattern_5_1: 70000 rects
+caravel_0008754b_fill_pattern_2_4: 4970000 rects
+caravel_0008754b_fill_pattern_5_1: 80000 rects
+caravel_0008754b_fill_pattern_5_1: 90000 rects
+caravel_0008754b_fill_pattern_2_4: 4980000 rects
+caravel_0008754b_fill_pattern_5_1: 100000 rects
+caravel_0008754b_fill_pattern_5_1: 110000 rects
+caravel_0008754b_fill_pattern_5_1: 120000 rects
+caravel_0008754b_fill_pattern_2_4: 4990000 rects
+caravel_0008754b_fill_pattern_5_1: 130000 rects
+caravel_0008754b_fill_pattern_2_4: 5000000 rects
+caravel_0008754b_fill_pattern_5_1: 140000 rects
+caravel_0008754b_fill_pattern_5_1: 150000 rects
+caravel_0008754b_fill_pattern_2_4: 5010000 rects
+caravel_0008754b_fill_pattern_5_1: 160000 rects
+caravel_0008754b_fill_pattern_2_4: 5020000 rects
+caravel_0008754b_fill_pattern_5_1: 170000 rects
+caravel_0008754b_fill_pattern_5_1: 180000 rects
+caravel_0008754b_fill_pattern_2_4: 5030000 rects
+caravel_0008754b_fill_pattern_5_1: 190000 rects
+caravel_0008754b_fill_pattern_2_4: 5040000 rects
+caravel_0008754b_fill_pattern_2_4: 5050000 rects
+caravel_0008754b_fill_pattern_5_1: 200000 rects
+caravel_0008754b_fill_pattern_2_4: 5060000 rects
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+caravel_0008754b_fill_pattern_2_4: 5070000 rects
+caravel_0008754b_fill_pattern_5_1: 220000 rects
+caravel_0008754b_fill_pattern_2_4: 5080000 rects
+caravel_0008754b_fill_pattern_5_1: 230000 rects
+caravel_0008754b_fill_pattern_2_4: 5090000 rects
+caravel_0008754b_fill_pattern_5_1: 240000 rects
+caravel_0008754b_fill_pattern_2_4: 5100000 rects
+caravel_0008754b_fill_pattern_5_1: 250000 rects
+caravel_0008754b_fill_pattern_2_4: 5110000 rects
+caravel_0008754b_fill_pattern_2_4: 5120000 rects
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+caravel_0008754b_fill_pattern_2_4: 5130000 rects
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+caravel_0008754b_fill_pattern_2_4: 5180000 rects
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+caravel_0008754b_fill_pattern_2_4: 5200000 rects
+caravel_0008754b_fill_pattern_2_4: 5210000 rects
+caravel_0008754b_fill_pattern_5_1: 310000 rects
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+caravel_0008754b_fill_pattern_5_1: 400000 rects
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+caravel_0008754b_fill_pattern_5_1: 460000 rects
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+caravel_0008754b_fill_pattern_5_1: 490000 rects
+caravel_0008754b_fill_pattern_5_1: 500000 rects
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+caravel_0008754b_fill_pattern_5_1: 530000 rects
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+caravel_0008754b_fill_pattern_5_1: 680000 rects
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+caravel_0008754b_fill_pattern_5_1: 700000 rects
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+caravel_0008754b_fill_pattern_5_1: 720000 rects
+caravel_0008754b_fill_pattern_5_1: 730000 rects
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+caravel_0008754b_fill_pattern_5_1: 770000 rects
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+caravel_0008754b_fill_pattern_5_1: 790000 rects
+caravel_0008754b_fill_pattern_5_1: 800000 rects
+caravel_0008754b_fill_pattern_5_1: 810000 rects
+caravel_0008754b_fill_pattern_2_4: 5420000 rects
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+caravel_0008754b_fill_pattern_5_1: 830000 rects
+caravel_0008754b_fill_pattern_5_1: 840000 rects
+caravel_0008754b_fill_pattern_5_1: 850000 rects
+caravel_0008754b_fill_pattern_5_1: 860000 rects
+caravel_0008754b_fill_pattern_5_1: 870000 rects
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+caravel_0008754b_fill_pattern_5_1: 890000 rects
+caravel_0008754b_fill_pattern_5_1: 900000 rects
+caravel_0008754b_fill_pattern_5_1: 910000 rects
+caravel_0008754b_fill_pattern_5_1: 920000 rects
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+caravel_0008754b_fill_pattern_5_1: 950000 rects
+caravel_0008754b_fill_pattern_5_1: 960000 rects
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+caravel_0008754b_fill_pattern_2_4: 5460000 rects
+caravel_0008754b_fill_pattern_2_4: 5470000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_5_1
+caravel_0008754b_fill_pattern_2_4: 5480000 rects
+caravel_0008754b_fill_pattern_2_4: 5490000 rects
+caravel_0008754b_fill_pattern_2_4: 5500000 rects
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+caravel_0008754b_fill_pattern_2_4: 5590000 rects
+caravel_0008754b_fill_pattern_2_4: 5600000 rects
+caravel_0008754b_fill_pattern_2_4: 5610000 rects
+caravel_0008754b_fill_pattern_2_4: 5620000 rects
+caravel_0008754b_fill_pattern_2_4: 5630000 rects
+caravel_0008754b_fill_pattern_2_4: 5640000 rects
+caravel_0008754b_fill_pattern_2_4: 5650000 rects
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+caravel_0008754b_fill_pattern_2_4: 5680000 rects
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+caravel_0008754b_fill_pattern_2_4: 5700000 rects
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+caravel_0008754b_fill_pattern_2_4: 5720000 rects
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+caravel_0008754b_fill_pattern_2_4: 5750000 rects
+caravel_0008754b_fill_pattern_2_4: 5760000 rects
+caravel_0008754b_fill_pattern_2_4: 5770000 rects
+caravel_0008754b_fill_pattern_2_4: 5780000 rects
+caravel_0008754b_fill_pattern_2_4: 5790000 rects
+caravel_0008754b_fill_pattern_2_4: 5800000 rects
+caravel_0008754b_fill_pattern_2_4: 5810000 rects
+caravel_0008754b_fill_pattern_2_4: 5820000 rects
+caravel_0008754b_fill_pattern_2_4: 5830000 rects
+caravel_0008754b_fill_pattern_2_4: 5840000 rects
+caravel_0008754b_fill_pattern_2_4: 5850000 rects
+caravel_0008754b_fill_pattern_2_4: 5860000 rects
+caravel_0008754b_fill_pattern_2_4: 5870000 rects
+caravel_0008754b_fill_pattern_2_4: 5880000 rects
+caravel_0008754b_fill_pattern_2_4: 5890000 rects
+caravel_0008754b_fill_pattern_2_4: 5900000 rects
+caravel_0008754b_fill_pattern_2_4: 5910000 rects
+caravel_0008754b_fill_pattern_2_4: 5920000 rects
+caravel_0008754b_fill_pattern_2_4: 5930000 rects
+caravel_0008754b_fill_pattern_2_4: 5940000 rects
+caravel_0008754b_fill_pattern_2_4: 5950000 rects
+caravel_0008754b_fill_pattern_2_4: 5960000 rects
+Ended: 12/10/2022 10:02:41
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_2_4: 5970000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_2_4: 5980000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_1_5: 10000 rects
+caravel_0008754b_fill_pattern_1_5: 20000 rects
+caravel_0008754b_fill_pattern_2_4: 5990000 rects
+caravel_0008754b_fill_pattern_1_5: 30000 rects
+caravel_0008754b_fill_pattern_1_5: 40000 rects
+caravel_0008754b_fill_pattern_1_5: 50000 rects
+caravel_0008754b_fill_pattern_1_5: 60000 rects
+caravel_0008754b_fill_pattern_1_5: 70000 rects
+caravel_0008754b_fill_pattern_1_5: 80000 rects
+caravel_0008754b_fill_pattern_2_4: 6000000 rects
+caravel_0008754b_fill_pattern_1_5: 90000 rects
+caravel_0008754b_fill_pattern_1_5: 100000 rects
+caravel_0008754b_fill_pattern_1_5: 110000 rects
+caravel_0008754b_fill_pattern_1_5: 120000 rects
+caravel_0008754b_fill_pattern_1_5: 130000 rects
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+caravel_0008754b_fill_pattern_1_5: 160000 rects
+caravel_0008754b_fill_pattern_1_5: 170000 rects
+caravel_0008754b_fill_pattern_1_5: 180000 rects
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+caravel_0008754b_fill_pattern_2_4: 6020000 rects
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+caravel_0008754b_fill_pattern_1_5: 230000 rects
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+Ended: 12/10/2022 10:02:59
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+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
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+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+Ended: 12/10/2022 10:03:06
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+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
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+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
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+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_4_6: 470000 rects
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+caravel_0008754b_fill_pattern_3_3: 2530000 rects
+caravel_0008754b_fill_pattern_4_6: 490000 rects
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+caravel_0008754b_fill_pattern_4_6: 570000 rects
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+caravel_0008754b_fill_pattern_4_6: 620000 rects
+caravel_0008754b_fill_pattern_3_3: 2600000 rects
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+caravel_0008754b_fill_pattern_4_6: 640000 rects
+caravel_0008754b_fill_pattern_4_6: 650000 rects
+caravel_0008754b_fill_pattern_3_3: 2610000 rects
+caravel_0008754b_fill_pattern_4_6: 660000 rects
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+caravel_0008754b_fill_pattern_4_6: 670000 rects
+caravel_0008754b_fill_pattern_1_5: 4450000 rects
+caravel_0008754b_fill_pattern_4_6: 680000 rects
+caravel_0008754b_fill_pattern_4_6: 690000 rects
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+caravel_0008754b_fill_pattern_4_6: 710000 rects
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+caravel_0008754b_fill_pattern_4_6: 750000 rects
+caravel_0008754b_fill_pattern_4_6: 760000 rects
+caravel_0008754b_fill_pattern_2_4: 7320000 rects
+caravel_0008754b_fill_pattern_4_6: 770000 rects
+caravel_0008754b_fill_pattern_1_5: 4460000 rects
+caravel_0008754b_fill_pattern_3_3: 2650000 rects
+caravel_0008754b_fill_pattern_4_6: 780000 rects
+caravel_0008754b_fill_pattern_4_6: 790000 rects
+caravel_0008754b_fill_pattern_4_6: 800000 rects
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+caravel_0008754b_fill_pattern_4_6: 840000 rects
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+caravel_0008754b_fill_pattern_4_6: 850000 rects
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+caravel_0008754b_fill_pattern_4_6: 860000 rects
+caravel_0008754b_fill_pattern_4_6: 870000 rects
+caravel_0008754b_fill_pattern_4_6: 880000 rects
+caravel_0008754b_fill_pattern_3_3: 2690000 rects
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+caravel_0008754b_fill_pattern_4_6: 890000 rects
+caravel_0008754b_fill_pattern_4_6: 900000 rects
+caravel_0008754b_fill_pattern_3_3: 2700000 rects
+caravel_0008754b_fill_pattern_4_6: 910000 rects
+caravel_0008754b_fill_pattern_4_6: 920000 rects
+caravel_0008754b_fill_pattern_4_6: 930000 rects
+caravel_0008754b_fill_pattern_3_3: 2710000 rects
+caravel_0008754b_fill_pattern_2_4: 7360000 rects
+caravel_0008754b_fill_pattern_4_6: 940000 rects
+caravel_0008754b_fill_pattern_4_6: 950000 rects
+caravel_0008754b_fill_pattern_4_6: 960000 rects
+caravel_0008754b_fill_pattern_3_3: 2720000 rects
+caravel_0008754b_fill_pattern_4_6: 970000 rects
+caravel_0008754b_fill_pattern_4_6: 980000 rects
+caravel_0008754b_fill_pattern_4_6: 990000 rects
+caravel_0008754b_fill_pattern_2_4: 7370000 rects
+caravel_0008754b_fill_pattern_3_3: 2730000 rects
+caravel_0008754b_fill_pattern_4_6: 1000000 rects
+caravel_0008754b_fill_pattern_4_6: 1010000 rects
+Ended: 12/10/2022 10:03:11
+caravel_0008754b_fill_pattern_4_6: 1020000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_4_6: 1030000 rects
+caravel_0008754b_fill_pattern_3_3: 2740000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_4_6: 1040000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_4_6: 1050000 rects
+caravel_0008754b_fill_pattern_2_4: 7380000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_4_6: 1060000 rects
+caravel_0008754b_fill_pattern_3_3: 2750000 rects
+caravel_0008754b_fill_pattern_4_6: 1070000 rects
+caravel_0008754b_fill_pattern_4_6: 1080000 rects
+caravel_0008754b_fill_pattern_4_6: 1090000 rects
+caravel_0008754b_fill_pattern_2_4: 7390000 rects
+caravel_0008754b_fill_pattern_3_3: 2760000 rects
+caravel_0008754b_fill_pattern_4_6: 1100000 rects
+caravel_0008754b_fill_pattern_4_6: 1110000 rects
+caravel_0008754b_fill_pattern_4_6: 1120000 rects
+caravel_0008754b_fill_pattern_4_6: 1130000 rects
+caravel_0008754b_fill_pattern_3_3: 2770000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_4_6: 1140000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_4_6: 1150000 rects
+caravel_0008754b_fill_pattern_2_4: 7400000 rects
+caravel_0008754b_fill_pattern_5_5: 10000 rects
+caravel_0008754b_fill_pattern_4_6: 1160000 rects
+caravel_0008754b_fill_pattern_5_5: 20000 rects
+caravel_0008754b_fill_pattern_3_3: 2780000 rects
+caravel_0008754b_fill_pattern_5_5: 30000 rects
+caravel_0008754b_fill_pattern_4_6: 1170000 rects
+caravel_0008754b_fill_pattern_5_5: 40000 rects
+caravel_0008754b_fill_pattern_4_6: 1180000 rects
+caravel_0008754b_fill_pattern_5_5: 50000 rects
+caravel_0008754b_fill_pattern_4_6: 1190000 rects
+caravel_0008754b_fill_pattern_5_5: 60000 rects
+caravel_0008754b_fill_pattern_5_5: 70000 rects
+caravel_0008754b_fill_pattern_4_6: 1200000 rects
+caravel_0008754b_fill_pattern_3_3: 2790000 rects
+caravel_0008754b_fill_pattern_5_5: 80000 rects
+caravel_0008754b_fill_pattern_4_6: 1210000 rects
+caravel_0008754b_fill_pattern_2_4: 7410000 rects
+caravel_0008754b_fill_pattern_5_5: 90000 rects
+caravel_0008754b_fill_pattern_4_6: 1220000 rects
+caravel_0008754b_fill_pattern_5_5: 100000 rects
+caravel_0008754b_fill_pattern_4_6: 1230000 rects
+caravel_0008754b_fill_pattern_3_3: 2800000 rects
+caravel_0008754b_fill_pattern_5_5: 110000 rects
+caravel_0008754b_fill_pattern_4_6: 1240000 rects
+caravel_0008754b_fill_pattern_5_5: 120000 rects
+caravel_0008754b_fill_pattern_4_6: 1250000 rects
+caravel_0008754b_fill_pattern_5_5: 130000 rects
+caravel_0008754b_fill_pattern_4_6: 1260000 rects
+caravel_0008754b_fill_pattern_5_5: 140000 rects
+caravel_0008754b_fill_pattern_4_6: 1270000 rects
+caravel_0008754b_fill_pattern_2_4: 7420000 rects
+caravel_0008754b_fill_pattern_3_3: 2810000 rects
+caravel_0008754b_fill_pattern_4_6: 1280000 rects
+caravel_0008754b_fill_pattern_5_5: 150000 rects
+caravel_0008754b_fill_pattern_4_6: 1290000 rects
+caravel_0008754b_fill_pattern_5_5: 160000 rects
+caravel_0008754b_fill_pattern_4_6: 1300000 rects
+caravel_0008754b_fill_pattern_3_3: 2820000 rects
+caravel_0008754b_fill_pattern_5_5: 170000 rects
+caravel_0008754b_fill_pattern_4_6: 1310000 rects
+caravel_0008754b_fill_pattern_5_5: 180000 rects
+caravel_0008754b_fill_pattern_4_6: 1320000 rects
+caravel_0008754b_fill_pattern_5_5: 190000 rects
+caravel_0008754b_fill_pattern_2_4: 7430000 rects
+caravel_0008754b_fill_pattern_4_6: 1330000 rects
+caravel_0008754b_fill_pattern_5_5: 200000 rects
+caravel_0008754b_fill_pattern_3_3: 2830000 rects
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+caravel_0008754b_fill_pattern_1_5: 4470000 rects
+caravel_0008754b_fill_pattern_4_6: 1350000 rects
+caravel_0008754b_fill_pattern_5_5: 210000 rects
+caravel_0008754b_fill_pattern_4_6: 1360000 rects
+caravel_0008754b_fill_pattern_4_6: 1370000 rects
+caravel_0008754b_fill_pattern_3_3: 2840000 rects
+caravel_0008754b_fill_pattern_5_5: 220000 rects
+caravel_0008754b_fill_pattern_2_4: 7440000 rects
+caravel_0008754b_fill_pattern_4_6: 1380000 rects
+caravel_0008754b_fill_pattern_1_5: 4480000 rects
+caravel_0008754b_fill_pattern_5_5: 230000 rects
+caravel_0008754b_fill_pattern_4_6: 1390000 rects
+caravel_0008754b_fill_pattern_3_3: 2850000 rects
+caravel_0008754b_fill_pattern_4_6: 1400000 rects
+caravel_0008754b_fill_pattern_5_5: 240000 rects
+caravel_0008754b_fill_pattern_2_4: 7450000 rects
+caravel_0008754b_fill_pattern_4_6: 1410000 rects
+caravel_0008754b_fill_pattern_5_5: 250000 rects
+caravel_0008754b_fill_pattern_1_5: 4490000 rects
+caravel_0008754b_fill_pattern_4_6: 1420000 rects
+caravel_0008754b_fill_pattern_3_3: 2860000 rects
+caravel_0008754b_fill_pattern_4_6: 1430000 rects
+caravel_0008754b_fill_pattern_5_5: 260000 rects
+caravel_0008754b_fill_pattern_1_5: 4500000 rects
+caravel_0008754b_fill_pattern_1_5: 4510000 rects
+caravel_0008754b_fill_pattern_4_6: 1440000 rects
+caravel_0008754b_fill_pattern_5_5: 270000 rects
+caravel_0008754b_fill_pattern_3_3: 2870000 rects
+caravel_0008754b_fill_pattern_1_5: 4520000 rects
+caravel_0008754b_fill_pattern_2_4: 7460000 rects
+caravel_0008754b_fill_pattern_4_6: 1450000 rects
+caravel_0008754b_fill_pattern_5_5: 280000 rects
+caravel_0008754b_fill_pattern_1_5: 4530000 rects
+caravel_0008754b_fill_pattern_1_5: 4540000 rects
+caravel_0008754b_fill_pattern_3_3: 2880000 rects
+caravel_0008754b_fill_pattern_5_5: 290000 rects
+caravel_0008754b_fill_pattern_4_6: 1460000 rects
+caravel_0008754b_fill_pattern_1_5: 4550000 rects
+caravel_0008754b_fill_pattern_5_5: 300000 rects
+caravel_0008754b_fill_pattern_2_4: 7470000 rects
+caravel_0008754b_fill_pattern_4_6: 1470000 rects
+caravel_0008754b_fill_pattern_3_3: 2890000 rects
+caravel_0008754b_fill_pattern_5_5: 310000 rects
+caravel_0008754b_fill_pattern_4_6: 1480000 rects
+caravel_0008754b_fill_pattern_3_3: 2900000 rects
+caravel_0008754b_fill_pattern_5_5: 320000 rects
+caravel_0008754b_fill_pattern_4_6: 1490000 rects
+caravel_0008754b_fill_pattern_5_5: 330000 rects
+caravel_0008754b_fill_pattern_2_4: 7480000 rects
+caravel_0008754b_fill_pattern_4_6: 1500000 rects
+caravel_0008754b_fill_pattern_3_3: 2910000 rects
+caravel_0008754b_fill_pattern_5_5: 340000 rects
+caravel_0008754b_fill_pattern_4_6: 1510000 rects
+caravel_0008754b_fill_pattern_5_5: 350000 rects
+caravel_0008754b_fill_pattern_3_3: 2920000 rects
+caravel_0008754b_fill_pattern_5_5: 360000 rects
+caravel_0008754b_fill_pattern_2_4: 7490000 rects
+caravel_0008754b_fill_pattern_4_6: 1520000 rects
+caravel_0008754b_fill_pattern_5_5: 370000 rects
+caravel_0008754b_fill_pattern_5_5: 380000 rects
+caravel_0008754b_fill_pattern_3_3: 2930000 rects
+caravel_0008754b_fill_pattern_5_5: 390000 rects
+caravel_0008754b_fill_pattern_4_6: 1530000 rects
+caravel_0008754b_fill_pattern_5_5: 400000 rects
+caravel_0008754b_fill_pattern_2_4: 7500000 rects
+caravel_0008754b_fill_pattern_5_5: 410000 rects
+caravel_0008754b_fill_pattern_4_6: 1540000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_5_5: 420000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_1_5
+caravel_0008754b_fill_pattern_3_3: 2940000 rects
+caravel_0008754b_fill_pattern_5_5: 430000 rects
+caravel_0008754b_fill_pattern_4_6: 1550000 rects
+caravel_0008754b_fill_pattern_5_5: 440000 rects
+caravel_0008754b_fill_pattern_5_5: 450000 rects
+caravel_0008754b_fill_pattern_3_3: 2950000 rects
+caravel_0008754b_fill_pattern_4_6: 1560000 rects
+caravel_0008754b_fill_pattern_5_5: 460000 rects
+caravel_0008754b_fill_pattern_2_4: 7510000 rects
+caravel_0008754b_fill_pattern_5_5: 470000 rects
+caravel_0008754b_fill_pattern_4_6: 1570000 rects
+caravel_0008754b_fill_pattern_3_3: 2960000 rects
+caravel_0008754b_fill_pattern_5_5: 480000 rects
+caravel_0008754b_fill_pattern_4_6: 1580000 rects
+caravel_0008754b_fill_pattern_5_5: 490000 rects
+caravel_0008754b_fill_pattern_5_5: 500000 rects
+caravel_0008754b_fill_pattern_2_4: 7520000 rects
+caravel_0008754b_fill_pattern_3_3: 2970000 rects
+caravel_0008754b_fill_pattern_4_6: 1590000 rects
+caravel_0008754b_fill_pattern_5_5: 510000 rects
+caravel_0008754b_fill_pattern_4_6: 1600000 rects
+caravel_0008754b_fill_pattern_5_5: 520000 rects
+caravel_0008754b_fill_pattern_5_5: 530000 rects
+caravel_0008754b_fill_pattern_3_3: 2980000 rects
+caravel_0008754b_fill_pattern_4_6: 1610000 rects
+caravel_0008754b_fill_pattern_5_5: 540000 rects
+caravel_0008754b_fill_pattern_5_5: 550000 rects
+caravel_0008754b_fill_pattern_2_4: 7530000 rects
+caravel_0008754b_fill_pattern_5_5: 560000 rects
+caravel_0008754b_fill_pattern_4_6: 1620000 rects
+caravel_0008754b_fill_pattern_5_5: 570000 rects
+caravel_0008754b_fill_pattern_3_3: 2990000 rects
+caravel_0008754b_fill_pattern_5_5: 580000 rects
+caravel_0008754b_fill_pattern_4_6: 1630000 rects
+caravel_0008754b_fill_pattern_5_5: 590000 rects
+caravel_0008754b_fill_pattern_5_5: 600000 rects
+caravel_0008754b_fill_pattern_3_3: 3000000 rects
+caravel_0008754b_fill_pattern_4_6: 1640000 rects
+caravel_0008754b_fill_pattern_2_4: 7540000 rects
+caravel_0008754b_fill_pattern_5_5: 610000 rects
+caravel_0008754b_fill_pattern_4_6: 1650000 rects
+caravel_0008754b_fill_pattern_5_5: 620000 rects
+caravel_0008754b_fill_pattern_3_3: 3010000 rects
+caravel_0008754b_fill_pattern_4_6: 1660000 rects
+caravel_0008754b_fill_pattern_5_5: 630000 rects
+caravel_0008754b_fill_pattern_5_5: 640000 rects
+caravel_0008754b_fill_pattern_5_5: 650000 rects
+caravel_0008754b_fill_pattern_4_6: 1670000 rects
+caravel_0008754b_fill_pattern_5_5: 660000 rects
+caravel_0008754b_fill_pattern_2_4: 7550000 rects
+caravel_0008754b_fill_pattern_3_3: 3020000 rects
+caravel_0008754b_fill_pattern_4_6: 1680000 rects
+caravel_0008754b_fill_pattern_5_5: 670000 rects
+caravel_0008754b_fill_pattern_4_6: 1690000 rects
+caravel_0008754b_fill_pattern_5_5: 680000 rects
+caravel_0008754b_fill_pattern_4_6: 1700000 rects
+caravel_0008754b_fill_pattern_4_6: 1710000 rects
+caravel_0008754b_fill_pattern_2_4: 7560000 rects
+caravel_0008754b_fill_pattern_5_5: 690000 rects
+caravel_0008754b_fill_pattern_3_3: 3030000 rects
+caravel_0008754b_fill_pattern_4_6: 1720000 rects
+caravel_0008754b_fill_pattern_5_5: 700000 rects
+caravel_0008754b_fill_pattern_5_5: 710000 rects
+caravel_0008754b_fill_pattern_4_6: 1730000 rects
+caravel_0008754b_fill_pattern_4_6: 1740000 rects
+caravel_0008754b_fill_pattern_3_3: 3040000 rects
+caravel_0008754b_fill_pattern_5_5: 720000 rects
+caravel_0008754b_fill_pattern_4_6: 1750000 rects
+caravel_0008754b_fill_pattern_4_6: 1760000 rects
+caravel_0008754b_fill_pattern_5_5: 730000 rects
+caravel_0008754b_fill_pattern_2_4: 7570000 rects
+caravel_0008754b_fill_pattern_5_5: 740000 rects
+caravel_0008754b_fill_pattern_4_6: 1770000 rects
+caravel_0008754b_fill_pattern_3_3: 3050000 rects
+caravel_0008754b_fill_pattern_4_6: 1780000 rects
+caravel_0008754b_fill_pattern_5_5: 750000 rects
+caravel_0008754b_fill_pattern_4_6: 1790000 rects
+caravel_0008754b_fill_pattern_4_6: 1800000 rects
+caravel_0008754b_fill_pattern_3_3: 3060000 rects
+caravel_0008754b_fill_pattern_4_6: 1810000 rects
+caravel_0008754b_fill_pattern_2_4: 7580000 rects
+caravel_0008754b_fill_pattern_4_6: 1820000 rects
+caravel_0008754b_fill_pattern_4_6: 1830000 rects
+caravel_0008754b_fill_pattern_4_6: 1840000 rects
+caravel_0008754b_fill_pattern_3_3: 3070000 rects
+caravel_0008754b_fill_pattern_4_6: 1850000 rects
+caravel_0008754b_fill_pattern_4_6: 1860000 rects
+caravel_0008754b_fill_pattern_2_4: 7590000 rects
+caravel_0008754b_fill_pattern_4_6: 1870000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_3_3: 3080000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_5_5
+caravel_0008754b_fill_pattern_4_6: 1880000 rects
+caravel_0008754b_fill_pattern_4_6: 1890000 rects
+caravel_0008754b_fill_pattern_4_6: 1900000 rects
+caravel_0008754b_fill_pattern_3_3: 3090000 rects
+caravel_0008754b_fill_pattern_4_6: 1910000 rects
+caravel_0008754b_fill_pattern_2_4: 7600000 rects
+caravel_0008754b_fill_pattern_4_6: 1920000 rects
+caravel_0008754b_fill_pattern_4_6: 1930000 rects
+caravel_0008754b_fill_pattern_3_3: 3100000 rects
+caravel_0008754b_fill_pattern_4_6: 1940000 rects
+caravel_0008754b_fill_pattern_4_6: 1950000 rects
+caravel_0008754b_fill_pattern_2_4: 7610000 rects
+caravel_0008754b_fill_pattern_4_6: 1960000 rects
+caravel_0008754b_fill_pattern_4_6: 1970000 rects
+caravel_0008754b_fill_pattern_3_3: 3110000 rects
+caravel_0008754b_fill_pattern_4_6: 1980000 rects
+caravel_0008754b_fill_pattern_4_6: 1990000 rects
+caravel_0008754b_fill_pattern_4_6: 2000000 rects
+caravel_0008754b_fill_pattern_3_3: 3120000 rects
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+caravel_0008754b_fill_pattern_4_6: 2010000 rects
+caravel_0008754b_fill_pattern_4_6: 2020000 rects
+caravel_0008754b_fill_pattern_4_6: 2030000 rects
+caravel_0008754b_fill_pattern_3_3: 3130000 rects
+caravel_0008754b_fill_pattern_4_6: 2040000 rects
+caravel_0008754b_fill_pattern_4_6: 2050000 rects
+caravel_0008754b_fill_pattern_2_4: 7630000 rects
+caravel_0008754b_fill_pattern_4_6: 2060000 rects
+caravel_0008754b_fill_pattern_3_3: 3140000 rects
+caravel_0008754b_fill_pattern_4_6: 2070000 rects
+caravel_0008754b_fill_pattern_4_6: 2080000 rects
+caravel_0008754b_fill_pattern_4_6: 2090000 rects
+caravel_0008754b_fill_pattern_3_3: 3150000 rects
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+caravel_0008754b_fill_pattern_3_3: 3200000 rects
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+caravel_0008754b_fill_pattern_4_6: 2260000 rects
+caravel_0008754b_fill_pattern_4_6: 2270000 rects
+caravel_0008754b_fill_pattern_4_6: 2280000 rects
+caravel_0008754b_fill_pattern_3_3: 3210000 rects
+caravel_0008754b_fill_pattern_4_6: 2290000 rects
+caravel_0008754b_fill_pattern_2_4: 7680000 rects
+caravel_0008754b_fill_pattern_4_6: 2300000 rects
+caravel_0008754b_fill_pattern_4_6: 2310000 rects
+caravel_0008754b_fill_pattern_3_3: 3220000 rects
+Ended: 12/10/2022 10:03:18
+caravel_0008754b_fill_pattern_4_6: 2320000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_4_6: 2330000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_3_3: 3230000 rects
+Sourcing design .magicrc for technology sky130A ...
+caravel_0008754b_fill_pattern_4_6: 2340000 rects
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_2_4: 7690000 rects
+caravel_0008754b_fill_pattern_4_6: 2350000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_4_6: 2360000 rects
+caravel_0008754b_fill_pattern_3_3: 3240000 rects
+caravel_0008754b_fill_pattern_4_6: 2370000 rects
+caravel_0008754b_fill_pattern_4_6: 2380000 rects
+caravel_0008754b_fill_pattern_4_6: 2390000 rects
+caravel_0008754b_fill_pattern_2_4: 7700000 rects
+caravel_0008754b_fill_pattern_3_3: 3250000 rects
+caravel_0008754b_fill_pattern_4_6: 2400000 rects
+caravel_0008754b_fill_pattern_4_6: 2410000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_4_6: 2420000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_4_6: 2430000 rects
+caravel_0008754b_fill_pattern_3_3: 3260000 rects
+caravel_0008754b_fill_pattern_3_7: 10000 rects
+caravel_0008754b_fill_pattern_3_7: 20000 rects
+caravel_0008754b_fill_pattern_2_4: 7710000 rects
+caravel_0008754b_fill_pattern_4_6: 2440000 rects
+caravel_0008754b_fill_pattern_3_7: 30000 rects
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+caravel_0008754b_fill_pattern_3_3: 3270000 rects
+caravel_0008754b_fill_pattern_3_7: 50000 rects
+caravel_0008754b_fill_pattern_4_6: 2450000 rects
+caravel_0008754b_fill_pattern_3_7: 60000 rects
+caravel_0008754b_fill_pattern_3_7: 70000 rects
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+caravel_0008754b_fill_pattern_3_7: 80000 rects
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+caravel_0008754b_fill_pattern_3_7: 90000 rects
+caravel_0008754b_fill_pattern_3_3: 3280000 rects
+caravel_0008754b_fill_pattern_3_7: 100000 rects
+caravel_0008754b_fill_pattern_3_7: 110000 rects
+caravel_0008754b_fill_pattern_3_7: 120000 rects
+caravel_0008754b_fill_pattern_3_7: 130000 rects
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+caravel_0008754b_fill_pattern_2_4: 7750000 rects
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+caravel_0008754b_fill_pattern_3_3: 3330000 rects
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+caravel_0008754b_fill_pattern_2_4: 7780000 rects
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+caravel_0008754b_fill_pattern_3_7: 750000 rects
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+caravel_0008754b_fill_pattern_3_7: 830000 rects
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+caravel_0008754b_fill_pattern_3_7: 850000 rects
+caravel_0008754b_fill_pattern_2_4: 7920000 rects
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+caravel_0008754b_fill_pattern_3_7: 860000 rects
+caravel_0008754b_fill_pattern_3_7: 870000 rects
+caravel_0008754b_fill_pattern_4_6: 2640000 rects
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+caravel_0008754b_fill_pattern_2_4: 7930000 rects
+caravel_0008754b_fill_pattern_3_7: 890000 rects
+caravel_0008754b_fill_pattern_3_3: 3630000 rects
+caravel_0008754b_fill_pattern_3_7: 900000 rects
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+caravel_0008754b_fill_pattern_3_7: 910000 rects
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+caravel_0008754b_fill_pattern_4_6: 2650000 rects
+caravel_0008754b_fill_pattern_3_7: 920000 rects
+Ended: 12/10/2022 10:03:23
+caravel_0008754b_fill_pattern_3_3: 3650000 rects
+caravel_0008754b_fill_pattern_3_7: 930000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_3_7: 940000 rects
+caravel_0008754b_fill_pattern_3_7: 950000 rects
+caravel_0008754b_fill_pattern_2_4: 7950000 rects
+caravel_0008754b_fill_pattern_4_6: 2660000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_3_3: 3660000 rects
+caravel_0008754b_fill_pattern_3_7: 960000 rects
+caravel_0008754b_fill_pattern_3_7: 970000 rects
+caravel_0008754b_fill_pattern_3_7: 980000 rects
+caravel_0008754b_fill_pattern_3_7: 990000 rects
+caravel_0008754b_fill_pattern_3_3: 3670000 rects
+caravel_0008754b_fill_pattern_3_7: 1000000 rects
+caravel_0008754b_fill_pattern_3_7: 1010000 rects
+caravel_0008754b_fill_pattern_4_6: 2670000 rects
+caravel_0008754b_fill_pattern_3_7: 1020000 rects
+caravel_0008754b_fill_pattern_2_4: 7960000 rects
+caravel_0008754b_fill_pattern_3_3: 3680000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_3_7: 1030000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_3_7: 1040000 rects
+caravel_0008754b_fill_pattern_4_6: 2680000 rects
+caravel_0008754b_fill_pattern_3_3: 3690000 rects
+caravel_0008754b_fill_pattern_0_2: 10000 rects
+caravel_0008754b_fill_pattern_0_2: 20000 rects
+caravel_0008754b_fill_pattern_0_2: 30000 rects
+caravel_0008754b_fill_pattern_2_4: 7970000 rects
+caravel_0008754b_fill_pattern_3_7: 1050000 rects
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+caravel_0008754b_fill_pattern_0_2: 60000 rects
+caravel_0008754b_fill_pattern_0_2: 70000 rects
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+caravel_0008754b_fill_pattern_0_2: 90000 rects
+caravel_0008754b_fill_pattern_0_2: 100000 rects
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+caravel_0008754b_fill_pattern_0_2: 120000 rects
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+caravel_0008754b_fill_pattern_0_2: 140000 rects
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+caravel_0008754b_fill_pattern_0_2: 150000 rects
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+caravel_0008754b_fill_pattern_2_4: 7990000 rects
+caravel_0008754b_fill_pattern_3_7: 1100000 rects
+caravel_0008754b_fill_pattern_0_2: 170000 rects
+caravel_0008754b_fill_pattern_3_7: 1110000 rects
+caravel_0008754b_fill_pattern_0_2: 180000 rects
+Ended: 12/10/2022 10:03:24
+caravel_0008754b_fill_pattern_0_2: 190000 rects
+caravel_0008754b_fill_pattern_3_7: 1120000 rects
+caravel_0008754b_fill_pattern_3_3: 3730000 rects
+caravel_0008754b_fill_pattern_4_6: 2710000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_0_2: 200000 rects
+caravel_0008754b_fill_pattern_3_7: 1130000 rects
+caravel_0008754b_fill_pattern_0_2: 210000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_0_2: 220000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_0_2: 230000 rects
+caravel_0008754b_fill_pattern_3_7: 1140000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_0_2: 240000 rects
+caravel_0008754b_fill_pattern_3_3: 3740000 rects
+caravel_0008754b_fill_pattern_2_4: 8000000 rects
+caravel_0008754b_fill_pattern_0_2: 250000 rects
+caravel_0008754b_fill_pattern_4_6: 2720000 rects
+caravel_0008754b_fill_pattern_0_2: 260000 rects
+caravel_0008754b_fill_pattern_3_7: 1150000 rects
+caravel_0008754b_fill_pattern_0_2: 270000 rects
+caravel_0008754b_fill_pattern_0_2: 280000 rects
+caravel_0008754b_fill_pattern_3_3: 3750000 rects
+caravel_0008754b_fill_pattern_0_2: 290000 rects
+caravel_0008754b_fill_pattern_0_2: 300000 rects
+caravel_0008754b_fill_pattern_3_7: 1160000 rects
+caravel_0008754b_fill_pattern_0_2: 310000 rects
+caravel_0008754b_fill_pattern_4_6: 2730000 rects
+caravel_0008754b_fill_pattern_0_2: 320000 rects
+caravel_0008754b_fill_pattern_3_7: 1170000 rects
+caravel_0008754b_fill_pattern_2_4: 8010000 rects
+caravel_0008754b_fill_pattern_3_3: 3760000 rects
+caravel_0008754b_fill_pattern_0_2: 330000 rects
+caravel_0008754b_fill_pattern_0_2: 340000 rects
+caravel_0008754b_fill_pattern_3_7: 1180000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_0_2: 350000 rects
+caravel_0008754b_fill_pattern_3_7: 1190000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_0_2: 360000 rects
+caravel_0008754b_fill_pattern_4_6: 2740000 rects
+caravel_0008754b_fill_pattern_3_7: 1200000 rects
+caravel_0008754b_fill_pattern_3_3: 3770000 rects
+caravel_0008754b_fill_pattern_0_2: 370000 rects
+caravel_0008754b_fill_pattern_2_0: 10000 rects
+caravel_0008754b_fill_pattern_3_7: 1210000 rects
+caravel_0008754b_fill_pattern_2_0: 20000 rects
+caravel_0008754b_fill_pattern_0_2: 380000 rects
+caravel_0008754b_fill_pattern_4_6: 2750000 rects
+caravel_0008754b_fill_pattern_2_0: 30000 rects
+caravel_0008754b_fill_pattern_0_2: 390000 rects
+caravel_0008754b_fill_pattern_2_4: 8020000 rects
+caravel_0008754b_fill_pattern_2_0: 40000 rects
+caravel_0008754b_fill_pattern_3_3: 3780000 rects
+caravel_0008754b_fill_pattern_2_0: 50000 rects
+caravel_0008754b_fill_pattern_3_7: 1220000 rects
+caravel_0008754b_fill_pattern_0_2: 400000 rects
+caravel_0008754b_fill_pattern_2_0: 60000 rects
+caravel_0008754b_fill_pattern_0_2: 410000 rects
+caravel_0008754b_fill_pattern_2_0: 70000 rects
+caravel_0008754b_fill_pattern_2_0: 80000 rects
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+caravel_0008754b_fill_pattern_0_2: 1330000 rects
+caravel_0008754b_fill_pattern_2_0: 1500000 rects
+Ended: 12/10/2022 10:03:30
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+caravel_0008754b_fill_pattern_2_0: 1510000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+Processing system .magicrc file
+caravel_0008754b_fill_pattern_3_3: 4470000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
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+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0008754b_fill_pattern_4_6
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
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+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+   Generating output for cell caravel_0008754b_fill_pattern_0_2
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+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_3_3
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+caravel_0008754b_fill_pattern_2_4: 9810000 rects
+Ended: 12/10/2022 10:03:47
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+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
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+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_1_1: 4000000 rects
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+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_4_4: 2820000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_2_4
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+caravel_0008754b_fill_pattern_2_0: 4840000 rects
+caravel_0008754b_fill_pattern_4_4: 2980000 rects
+Ended: 12/10/2022 10:04:07
+caravel_0008754b_fill_pattern_1_1: 4180000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_4_4: 2990000 rects
+caravel_0008754b_fill_pattern_2_0: 4850000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_4_4: 3000000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_1_1: 4190000 rects
+caravel_0008754b_fill_pattern_4_4: 3010000 rects
+caravel_0008754b_fill_pattern_2_0: 4860000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
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+caravel_0008754b_fill_pattern_4_4: 3110000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
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+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_2_6: 1410000 rects
+caravel_0008754b_fill_pattern_2_6: 1420000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_4_4
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+caravel_0008754b_fill_pattern_1_1: 4650000 rects
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+caravel_0008754b_fill_pattern_1_1: 4840000 rects
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+caravel_0008754b_fill_pattern_1_1: 4860000 rects
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+caravel_0008754b_fill_pattern_2_6: 1650000 rects
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+caravel_0008754b_fill_pattern_2_6: 1660000 rects
+caravel_0008754b_fill_pattern_2_6: 1670000 rects
+caravel_0008754b_fill_pattern_1_1: 4880000 rects
+caravel_0008754b_fill_pattern_2_6: 1680000 rects
+Ended: 12/10/2022 10:04:15
+caravel_0008754b_fill_pattern_2_6: 1690000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_2_6: 1700000 rects
+caravel_0008754b_fill_pattern_2_0: 5680000 rects
+caravel_0008754b_fill_pattern_1_1: 4890000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_2_6: 1710000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_2_6: 1720000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_2_6: 1730000 rects
+caravel_0008754b_fill_pattern_1_1: 4900000 rects
+caravel_0008754b_fill_pattern_2_6: 1740000 rects
+caravel_0008754b_fill_pattern_2_6: 1750000 rects
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+caravel_0008754b_fill_pattern_2_6: 1760000 rects
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+caravel_0008754b_fill_pattern_2_6: 1780000 rects
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+caravel_0008754b_fill_pattern_1_1: 4920000 rects
+caravel_0008754b_fill_pattern_2_6: 1800000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+caravel_0008754b_fill_pattern_2_0: 5700000 rects
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_1_1: 5340000 rects
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+caravel_0008754b_fill_pattern_1_7: 790000 rects
+caravel_0008754b_fill_pattern_1_7: 800000 rects
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+caravel_0008754b_fill_pattern_1_1: 5350000 rects
+caravel_0008754b_fill_pattern_1_7: 810000 rects
+caravel_0008754b_fill_pattern_2_0: 6230000 rects
+caravel_0008754b_fill_pattern_1_7: 820000 rects
+caravel_0008754b_fill_pattern_2_0: 6240000 rects
+caravel_0008754b_fill_pattern_2_0: 6250000 rects
+caravel_0008754b_fill_pattern_1_1: 5360000 rects
+caravel_0008754b_fill_pattern_1_7: 830000 rects
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+caravel_0008754b_fill_pattern_1_7: 840000 rects
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+caravel_0008754b_fill_pattern_1_7: 850000 rects
+caravel_0008754b_fill_pattern_1_1: 5370000 rects
+caravel_0008754b_fill_pattern_2_6: 2550000 rects
+caravel_0008754b_fill_pattern_1_7: 860000 rects
+caravel_0008754b_fill_pattern_1_1: 5380000 rects
+caravel_0008754b_fill_pattern_1_7: 870000 rects
+caravel_0008754b_fill_pattern_1_7: 880000 rects
+caravel_0008754b_fill_pattern_1_1: 5390000 rects
+caravel_0008754b_fill_pattern_2_0: 6280000 rects
+caravel_0008754b_fill_pattern_1_7: 890000 rects
+caravel_0008754b_fill_pattern_1_1: 5400000 rects
+caravel_0008754b_fill_pattern_1_7: 900000 rects
+caravel_0008754b_fill_pattern_2_6: 2560000 rects
+caravel_0008754b_fill_pattern_1_1: 5410000 rects
+caravel_0008754b_fill_pattern_1_7: 910000 rects
+caravel_0008754b_fill_pattern_1_7: 920000 rects
+caravel_0008754b_fill_pattern_1_1: 5420000 rects
+caravel_0008754b_fill_pattern_1_7: 930000 rects
+caravel_0008754b_fill_pattern_1_1: 5430000 rects
+caravel_0008754b_fill_pattern_1_7: 940000 rects
+caravel_0008754b_fill_pattern_2_6: 2570000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_1_1: 5440000 rects
+caravel_0008754b_fill_pattern_1_7: 950000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_2_0
+caravel_0008754b_fill_pattern_1_7: 960000 rects
+caravel_0008754b_fill_pattern_1_1: 5450000 rects
+caravel_0008754b_fill_pattern_1_7: 970000 rects
+caravel_0008754b_fill_pattern_1_1: 5460000 rects
+caravel_0008754b_fill_pattern_1_7: 980000 rects
+caravel_0008754b_fill_pattern_1_7: 990000 rects
+caravel_0008754b_fill_pattern_1_1: 5470000 rects
+caravel_0008754b_fill_pattern_2_6: 2580000 rects
+caravel_0008754b_fill_pattern_1_7: 1000000 rects
+caravel_0008754b_fill_pattern_1_1: 5480000 rects
+caravel_0008754b_fill_pattern_1_7: 1010000 rects
+caravel_0008754b_fill_pattern_1_7: 1020000 rects
+caravel_0008754b_fill_pattern_1_1: 5490000 rects
+caravel_0008754b_fill_pattern_1_7: 1030000 rects
+caravel_0008754b_fill_pattern_1_1: 5500000 rects
+caravel_0008754b_fill_pattern_1_7: 1040000 rects
+caravel_0008754b_fill_pattern_2_6: 2590000 rects
+caravel_0008754b_fill_pattern_1_1: 5510000 rects
+caravel_0008754b_fill_pattern_1_7: 1050000 rects
+caravel_0008754b_fill_pattern_1_7: 1060000 rects
+caravel_0008754b_fill_pattern_1_7: 1070000 rects
+caravel_0008754b_fill_pattern_1_7: 1080000 rects
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+caravel_0008754b_fill_pattern_1_7: 1090000 rects
+caravel_0008754b_fill_pattern_1_7: 1100000 rects
+caravel_0008754b_fill_pattern_1_7: 1110000 rects
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+caravel_0008754b_fill_pattern_1_7: 1120000 rects
+caravel_0008754b_fill_pattern_1_7: 1130000 rects
+caravel_0008754b_fill_pattern_2_6: 2600000 rects
+caravel_0008754b_fill_pattern_1_1: 5540000 rects
+caravel_0008754b_fill_pattern_1_7: 1140000 rects
+caravel_0008754b_fill_pattern_1_1: 5550000 rects
+caravel_0008754b_fill_pattern_1_7: 1150000 rects
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+caravel_0008754b_fill_pattern_2_6: 2610000 rects
+caravel_0008754b_fill_pattern_1_7: 1160000 rects
+caravel_0008754b_fill_pattern_1_1: 5570000 rects
+caravel_0008754b_fill_pattern_1_7: 1170000 rects
+caravel_0008754b_fill_pattern_1_1: 5580000 rects
+caravel_0008754b_fill_pattern_1_7: 1180000 rects
+caravel_0008754b_fill_pattern_1_1: 5590000 rects
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+caravel_0008754b_fill_pattern_1_7: 1220000 rects
+caravel_0008754b_fill_pattern_1_7: 1230000 rects
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+caravel_0008754b_fill_pattern_1_1: 5620000 rects
+caravel_0008754b_fill_pattern_1_7: 1240000 rects
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+caravel_0008754b_fill_pattern_1_1: 5650000 rects
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+caravel_0008754b_fill_pattern_1_7: 1260000 rects
+caravel_0008754b_fill_pattern_1_1: 5670000 rects
+caravel_0008754b_fill_pattern_2_6: 2640000 rects
+caravel_0008754b_fill_pattern_1_7: 1270000 rects
+caravel_0008754b_fill_pattern_1_1: 5680000 rects
+caravel_0008754b_fill_pattern_1_1: 5690000 rects
+caravel_0008754b_fill_pattern_1_1: 5700000 rects
+caravel_0008754b_fill_pattern_1_1: 5710000 rects
+caravel_0008754b_fill_pattern_1_7: 1280000 rects
+caravel_0008754b_fill_pattern_1_1: 5720000 rects
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+caravel_0008754b_fill_pattern_1_7: 1290000 rects
+caravel_0008754b_fill_pattern_1_1: 5740000 rects
+caravel_0008754b_fill_pattern_2_6: 2650000 rects
+caravel_0008754b_fill_pattern_1_1: 5750000 rects
+caravel_0008754b_fill_pattern_1_7: 1300000 rects
+caravel_0008754b_fill_pattern_1_1: 5760000 rects
+caravel_0008754b_fill_pattern_1_7: 1310000 rects
+caravel_0008754b_fill_pattern_1_7: 1320000 rects
+caravel_0008754b_fill_pattern_1_7: 1330000 rects
+caravel_0008754b_fill_pattern_1_7: 1340000 rects
+caravel_0008754b_fill_pattern_2_6: 2660000 rects
+caravel_0008754b_fill_pattern_1_1: 5770000 rects
+caravel_0008754b_fill_pattern_1_7: 1350000 rects
+caravel_0008754b_fill_pattern_1_1: 5780000 rects
+caravel_0008754b_fill_pattern_1_7: 1360000 rects
+caravel_0008754b_fill_pattern_2_6: 2670000 rects
+caravel_0008754b_fill_pattern_1_7: 1370000 rects
+caravel_0008754b_fill_pattern_1_7: 1380000 rects
+caravel_0008754b_fill_pattern_1_7: 1390000 rects
+caravel_0008754b_fill_pattern_1_7: 1400000 rects
+caravel_0008754b_fill_pattern_1_1: 5790000 rects
+caravel_0008754b_fill_pattern_2_6: 2680000 rects
+caravel_0008754b_fill_pattern_1_1: 5800000 rects
+caravel_0008754b_fill_pattern_2_6: 2690000 rects
+caravel_0008754b_fill_pattern_1_1: 5810000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_1_7
+caravel_0008754b_fill_pattern_1_1: 5820000 rects
+caravel_0008754b_fill_pattern_2_6: 2700000 rects
+caravel_0008754b_fill_pattern_1_1: 5830000 rects
+caravel_0008754b_fill_pattern_2_6: 2710000 rects
+caravel_0008754b_fill_pattern_1_1: 5840000 rects
+caravel_0008754b_fill_pattern_2_6: 2720000 rects
+caravel_0008754b_fill_pattern_1_1: 5850000 rects
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+caravel_0008754b_fill_pattern_1_1: 5860000 rects
+caravel_0008754b_fill_pattern_2_6: 2740000 rects
+caravel_0008754b_fill_pattern_1_1: 5870000 rects
+caravel_0008754b_fill_pattern_2_6: 2750000 rects
+caravel_0008754b_fill_pattern_1_1: 5880000 rects
+caravel_0008754b_fill_pattern_2_6: 2760000 rects
+caravel_0008754b_fill_pattern_1_1: 5890000 rects
+caravel_0008754b_fill_pattern_2_6: 2770000 rects
+caravel_0008754b_fill_pattern_1_1: 5900000 rects
+caravel_0008754b_fill_pattern_2_6: 2780000 rects
+caravel_0008754b_fill_pattern_1_1: 5910000 rects
+caravel_0008754b_fill_pattern_2_6: 2790000 rects
+caravel_0008754b_fill_pattern_2_6: 2800000 rects
+caravel_0008754b_fill_pattern_2_6: 2810000 rects
+caravel_0008754b_fill_pattern_1_1: 5920000 rects
+caravel_0008754b_fill_pattern_2_6: 2820000 rects
+caravel_0008754b_fill_pattern_2_6: 2830000 rects
+caravel_0008754b_fill_pattern_1_1: 5930000 rects
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+caravel_0008754b_fill_pattern_2_6: 2850000 rects
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+caravel_0008754b_fill_pattern_2_6: 3070000 rects
+caravel_0008754b_fill_pattern_1_1: 5970000 rects
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+caravel_0008754b_fill_pattern_1_1: 6020000 rects
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+caravel_0008754b_fill_pattern_1_1: 6030000 rects
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+caravel_0008754b_fill_pattern_1_1: 6060000 rects
+caravel_0008754b_fill_pattern_2_6: 3130000 rects
+caravel_0008754b_fill_pattern_1_1: 6070000 rects
+caravel_0008754b_fill_pattern_1_1: 6080000 rects
+caravel_0008754b_fill_pattern_2_6: 3140000 rects
+caravel_0008754b_fill_pattern_1_1: 6090000 rects
+caravel_0008754b_fill_pattern_1_1: 6100000 rects
+caravel_0008754b_fill_pattern_2_6: 3150000 rects
+caravel_0008754b_fill_pattern_1_1: 6110000 rects
+caravel_0008754b_fill_pattern_1_1: 6120000 rects
+caravel_0008754b_fill_pattern_2_6: 3160000 rects
+caravel_0008754b_fill_pattern_1_1: 6130000 rects
+caravel_0008754b_fill_pattern_1_1: 6140000 rects
+caravel_0008754b_fill_pattern_2_6: 3170000 rects
+caravel_0008754b_fill_pattern_1_1: 6150000 rects
+caravel_0008754b_fill_pattern_2_6: 3180000 rects
+caravel_0008754b_fill_pattern_1_1: 6160000 rects
+caravel_0008754b_fill_pattern_1_1: 6170000 rects
+caravel_0008754b_fill_pattern_1_1: 6180000 rects
+caravel_0008754b_fill_pattern_1_1: 6190000 rects
+caravel_0008754b_fill_pattern_1_1: 6200000 rects
+caravel_0008754b_fill_pattern_2_6: 3190000 rects
+caravel_0008754b_fill_pattern_1_1: 6210000 rects
+caravel_0008754b_fill_pattern_2_6: 3200000 rects
+caravel_0008754b_fill_pattern_1_1: 6220000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_1_1
+caravel_0008754b_fill_pattern_2_6: 3210000 rects
+caravel_0008754b_fill_pattern_2_6: 3220000 rects
+caravel_0008754b_fill_pattern_2_6: 3230000 rects
+caravel_0008754b_fill_pattern_2_6: 3240000 rects
+caravel_0008754b_fill_pattern_2_6: 3250000 rects
+caravel_0008754b_fill_pattern_2_6: 3260000 rects
+caravel_0008754b_fill_pattern_2_6: 3270000 rects
+caravel_0008754b_fill_pattern_2_6: 3280000 rects
+caravel_0008754b_fill_pattern_2_6: 3290000 rects
+caravel_0008754b_fill_pattern_2_6: 3300000 rects
+caravel_0008754b_fill_pattern_2_6: 3310000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_2_6
+Ended: 12/10/2022 10:04:43
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_5_3: 10000 rects
+caravel_0008754b_fill_pattern_5_3: 20000 rects
+caravel_0008754b_fill_pattern_5_3: 30000 rects
+caravel_0008754b_fill_pattern_5_3: 40000 rects
+caravel_0008754b_fill_pattern_5_3: 50000 rects
+caravel_0008754b_fill_pattern_5_3: 60000 rects
+caravel_0008754b_fill_pattern_5_3: 70000 rects
+caravel_0008754b_fill_pattern_5_3: 80000 rects
+caravel_0008754b_fill_pattern_5_3: 90000 rects
+caravel_0008754b_fill_pattern_5_3: 100000 rects
+caravel_0008754b_fill_pattern_5_3: 110000 rects
+caravel_0008754b_fill_pattern_5_3: 120000 rects
+caravel_0008754b_fill_pattern_5_3: 130000 rects
+caravel_0008754b_fill_pattern_5_3: 140000 rects
+caravel_0008754b_fill_pattern_5_3: 150000 rects
+caravel_0008754b_fill_pattern_5_3: 160000 rects
+caravel_0008754b_fill_pattern_5_3: 170000 rects
+caravel_0008754b_fill_pattern_5_3: 180000 rects
+caravel_0008754b_fill_pattern_5_3: 190000 rects
+caravel_0008754b_fill_pattern_5_3: 200000 rects
+caravel_0008754b_fill_pattern_5_3: 210000 rects
+caravel_0008754b_fill_pattern_5_3: 220000 rects
+caravel_0008754b_fill_pattern_5_3: 230000 rects
+caravel_0008754b_fill_pattern_5_3: 240000 rects
+caravel_0008754b_fill_pattern_5_3: 250000 rects
+caravel_0008754b_fill_pattern_5_3: 260000 rects
+caravel_0008754b_fill_pattern_5_3: 270000 rects
+caravel_0008754b_fill_pattern_5_3: 280000 rects
+caravel_0008754b_fill_pattern_5_3: 290000 rects
+caravel_0008754b_fill_pattern_5_3: 300000 rects
+caravel_0008754b_fill_pattern_5_3: 310000 rects
+caravel_0008754b_fill_pattern_5_3: 320000 rects
+caravel_0008754b_fill_pattern_5_3: 330000 rects
+caravel_0008754b_fill_pattern_5_3: 340000 rects
+caravel_0008754b_fill_pattern_5_3: 350000 rects
+caravel_0008754b_fill_pattern_5_3: 360000 rects
+caravel_0008754b_fill_pattern_5_3: 370000 rects
+caravel_0008754b_fill_pattern_5_3: 380000 rects
+caravel_0008754b_fill_pattern_5_3: 390000 rects
+caravel_0008754b_fill_pattern_5_3: 400000 rects
+caravel_0008754b_fill_pattern_5_3: 410000 rects
+caravel_0008754b_fill_pattern_5_3: 420000 rects
+caravel_0008754b_fill_pattern_5_3: 430000 rects
+caravel_0008754b_fill_pattern_5_3: 440000 rects
+caravel_0008754b_fill_pattern_5_3: 450000 rects
+caravel_0008754b_fill_pattern_5_3: 460000 rects
+caravel_0008754b_fill_pattern_5_3: 470000 rects
+caravel_0008754b_fill_pattern_5_3: 480000 rects
+caravel_0008754b_fill_pattern_5_3: 490000 rects
+caravel_0008754b_fill_pattern_5_3: 500000 rects
+caravel_0008754b_fill_pattern_5_3: 510000 rects
+caravel_0008754b_fill_pattern_5_3: 520000 rects
+caravel_0008754b_fill_pattern_5_3: 530000 rects
+caravel_0008754b_fill_pattern_5_3: 540000 rects
+caravel_0008754b_fill_pattern_5_3: 550000 rects
+caravel_0008754b_fill_pattern_5_3: 560000 rects
+caravel_0008754b_fill_pattern_5_3: 570000 rects
+caravel_0008754b_fill_pattern_5_3: 580000 rects
+caravel_0008754b_fill_pattern_5_3: 590000 rects
+caravel_0008754b_fill_pattern_5_3: 600000 rects
+caravel_0008754b_fill_pattern_5_3: 610000 rects
+caravel_0008754b_fill_pattern_5_3: 620000 rects
+caravel_0008754b_fill_pattern_5_3: 630000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_5_3
+Ended: 12/10/2022 10:04:55
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_3_5: 10000 rects
+caravel_0008754b_fill_pattern_3_5: 20000 rects
+caravel_0008754b_fill_pattern_3_5: 30000 rects
+caravel_0008754b_fill_pattern_3_5: 40000 rects
+caravel_0008754b_fill_pattern_3_5: 50000 rects
+caravel_0008754b_fill_pattern_3_5: 60000 rects
+caravel_0008754b_fill_pattern_3_5: 70000 rects
+caravel_0008754b_fill_pattern_3_5: 80000 rects
+caravel_0008754b_fill_pattern_3_5: 90000 rects
+caravel_0008754b_fill_pattern_3_5: 100000 rects
+caravel_0008754b_fill_pattern_3_5: 110000 rects
+caravel_0008754b_fill_pattern_3_5: 120000 rects
+caravel_0008754b_fill_pattern_3_5: 130000 rects
+caravel_0008754b_fill_pattern_3_5: 140000 rects
+caravel_0008754b_fill_pattern_3_5: 150000 rects
+caravel_0008754b_fill_pattern_3_5: 160000 rects
+caravel_0008754b_fill_pattern_3_5: 170000 rects
+caravel_0008754b_fill_pattern_3_5: 180000 rects
+caravel_0008754b_fill_pattern_3_5: 190000 rects
+caravel_0008754b_fill_pattern_3_5: 200000 rects
+caravel_0008754b_fill_pattern_3_5: 210000 rects
+caravel_0008754b_fill_pattern_3_5: 220000 rects
+caravel_0008754b_fill_pattern_3_5: 230000 rects
+caravel_0008754b_fill_pattern_3_5: 240000 rects
+caravel_0008754b_fill_pattern_3_5: 250000 rects
+caravel_0008754b_fill_pattern_3_5: 260000 rects
+caravel_0008754b_fill_pattern_3_5: 270000 rects
+caravel_0008754b_fill_pattern_3_5: 280000 rects
+caravel_0008754b_fill_pattern_3_5: 290000 rects
+caravel_0008754b_fill_pattern_3_5: 300000 rects
+caravel_0008754b_fill_pattern_3_5: 310000 rects
+caravel_0008754b_fill_pattern_3_5: 320000 rects
+caravel_0008754b_fill_pattern_3_5: 330000 rects
+caravel_0008754b_fill_pattern_3_5: 340000 rects
+caravel_0008754b_fill_pattern_3_5: 350000 rects
+caravel_0008754b_fill_pattern_3_5: 360000 rects
+caravel_0008754b_fill_pattern_3_5: 370000 rects
+caravel_0008754b_fill_pattern_3_5: 380000 rects
+caravel_0008754b_fill_pattern_3_5: 390000 rects
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+caravel_0008754b_fill_pattern_3_5: 2370000 rects
+Ended: 12/10/2022 10:05:08
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+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
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+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_0_0: 2310000 rects
+caravel_0008754b_fill_pattern_3_5: 3620000 rects
+Ended: 12/10/2022 10:05:20
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+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_3_5: 3640000 rects
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_3_5: 3650000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_0_0: 2330000 rects
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+caravel_0008754b_fill_pattern_0_0: 2340000 rects
+caravel_0008754b_fill_pattern_3_5: 3670000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_0_0: 2350000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_3_5: 3720000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_5_7
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+caravel_0008754b_fill_pattern_0_0: 2460000 rects
+Ended: 12/10/2022 10:05:23
+caravel_0008754b_fill_pattern_0_0: 2470000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_3_5: 3920000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_0_0: 2480000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_0_0: 2490000 rects
+caravel_0008754b_fill_pattern_0_0: 2500000 rects
+caravel_0008754b_fill_pattern_3_5: 3930000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_0_0: 2510000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_0_4: 10000 rects
+caravel_0008754b_fill_pattern_0_4: 20000 rects
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+caravel_0008754b_fill_pattern_0_4: 830000 rects
+caravel_0008754b_fill_pattern_3_5: 3990000 rects
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+caravel_0008754b_fill_pattern_0_4: 840000 rects
+caravel_0008754b_fill_pattern_0_4: 850000 rects
+caravel_0008754b_fill_pattern_3_5: 4000000 rects
+caravel_0008754b_fill_pattern_0_0: 2730000 rects
+caravel_0008754b_fill_pattern_0_4: 860000 rects
+caravel_0008754b_fill_pattern_3_5: 4010000 rects
+caravel_0008754b_fill_pattern_3_5: 4020000 rects
+caravel_0008754b_fill_pattern_0_4: 870000 rects
+caravel_0008754b_fill_pattern_3_5: 4030000 rects
+caravel_0008754b_fill_pattern_0_4: 880000 rects
+caravel_0008754b_fill_pattern_0_0: 2740000 rects
+caravel_0008754b_fill_pattern_3_5: 4040000 rects
+caravel_0008754b_fill_pattern_0_4: 890000 rects
+caravel_0008754b_fill_pattern_3_5: 4050000 rects
+caravel_0008754b_fill_pattern_3_5: 4060000 rects
+caravel_0008754b_fill_pattern_0_4: 900000 rects
+caravel_0008754b_fill_pattern_0_0: 2750000 rects
+caravel_0008754b_fill_pattern_0_4: 910000 rects
+caravel_0008754b_fill_pattern_0_4: 920000 rects
+caravel_0008754b_fill_pattern_0_0: 2760000 rects
+caravel_0008754b_fill_pattern_0_4: 930000 rects
+caravel_0008754b_fill_pattern_0_4: 940000 rects
+caravel_0008754b_fill_pattern_0_0: 2770000 rects
+caravel_0008754b_fill_pattern_0_4: 950000 rects
+caravel_0008754b_fill_pattern_3_5: 4070000 rects
+caravel_0008754b_fill_pattern_0_4: 960000 rects
+caravel_0008754b_fill_pattern_0_0: 2780000 rects
+caravel_0008754b_fill_pattern_0_4: 970000 rects
+caravel_0008754b_fill_pattern_0_4: 980000 rects
+caravel_0008754b_fill_pattern_0_0: 2790000 rects
+caravel_0008754b_fill_pattern_0_4: 990000 rects
+caravel_0008754b_fill_pattern_0_4: 1000000 rects
+caravel_0008754b_fill_pattern_0_0: 2800000 rects
+caravel_0008754b_fill_pattern_0_4: 1010000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_3_5
+caravel_0008754b_fill_pattern_0_4: 1020000 rects
+caravel_0008754b_fill_pattern_0_4: 1030000 rects
+caravel_0008754b_fill_pattern_0_0: 2810000 rects
+caravel_0008754b_fill_pattern_0_4: 1040000 rects
+caravel_0008754b_fill_pattern_0_4: 1050000 rects
+caravel_0008754b_fill_pattern_0_0: 2820000 rects
+caravel_0008754b_fill_pattern_0_4: 1060000 rects
+caravel_0008754b_fill_pattern_0_4: 1070000 rects
+caravel_0008754b_fill_pattern_0_0: 2830000 rects
+caravel_0008754b_fill_pattern_0_4: 1080000 rects
+caravel_0008754b_fill_pattern_0_4: 1090000 rects
+caravel_0008754b_fill_pattern_0_0: 2840000 rects
+caravel_0008754b_fill_pattern_0_4: 1100000 rects
+caravel_0008754b_fill_pattern_0_4: 1110000 rects
+caravel_0008754b_fill_pattern_0_0: 2850000 rects
+caravel_0008754b_fill_pattern_0_4: 1120000 rects
+caravel_0008754b_fill_pattern_0_4: 1130000 rects
+caravel_0008754b_fill_pattern_0_0: 2860000 rects
+caravel_0008754b_fill_pattern_0_4: 1140000 rects
+caravel_0008754b_fill_pattern_0_4: 1150000 rects
+caravel_0008754b_fill_pattern_0_0: 2870000 rects
+caravel_0008754b_fill_pattern_0_4: 1160000 rects
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+caravel_0008754b_fill_pattern_0_4: 1180000 rects
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+caravel_0008754b_fill_pattern_0_4: 1210000 rects
+caravel_0008754b_fill_pattern_0_4: 1220000 rects
+caravel_0008754b_fill_pattern_0_4: 1230000 rects
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+caravel_0008754b_fill_pattern_0_0: 2900000 rects
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+caravel_0008754b_fill_pattern_0_4: 1290000 rects
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+caravel_0008754b_fill_pattern_0_4: 1320000 rects
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+caravel_0008754b_fill_pattern_0_4: 1330000 rects
+caravel_0008754b_fill_pattern_0_4: 1340000 rects
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+caravel_0008754b_fill_pattern_0_4: 1500000 rects
+caravel_0008754b_fill_pattern_0_4: 1510000 rects
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+caravel_0008754b_fill_pattern_0_0: 3000000 rects
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+caravel_0008754b_fill_pattern_0_4: 1670000 rects
+caravel_0008754b_fill_pattern_0_4: 1680000 rects
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+caravel_0008754b_fill_pattern_0_4: 2200000 rects
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+caravel_0008754b_fill_pattern_0_4: 2240000 rects
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+caravel_0008754b_fill_pattern_0_4: 2260000 rects
+caravel_0008754b_fill_pattern_0_0: 3290000 rects
+caravel_0008754b_fill_pattern_0_4: 2270000 rects
+caravel_0008754b_fill_pattern_0_4: 2280000 rects
+Ended: 12/10/2022 10:05:35
+caravel_0008754b_fill_pattern_0_0: 3300000 rects
+caravel_0008754b_fill_pattern_0_4: 2290000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+caravel_0008754b_fill_pattern_0_4: 2300000 rects
+caravel_0008754b_fill_pattern_0_4: 2310000 rects
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_0_4: 2320000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_0_4: 2330000 rects
+caravel_0008754b_fill_pattern_0_0: 3310000 rects
+Ended: 12/10/2022 10:05:36
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_0_4: 2340000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_0_4: 2350000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_0_0: 3320000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_0_4: 2360000 rects
+caravel_0008754b_fill_pattern_0_0: 3330000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_0_4: 2370000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_4_0: 10000 rects
+caravel_0008754b_fill_pattern_0_0: 3340000 rects
+caravel_0008754b_fill_pattern_4_0: 20000 rects
+caravel_0008754b_fill_pattern_4_0: 30000 rects
+caravel_0008754b_fill_pattern_0_4: 2380000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_4_0: 40000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_4_0: 50000 rects
+caravel_0008754b_fill_pattern_0_4: 2390000 rects
+caravel_0008754b_fill_pattern_4_0: 60000 rects
+caravel_0008754b_fill_pattern_0_4: 2400000 rects
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+caravel_0008754b_fill_pattern_2_2: 10000 rects
+caravel_0008754b_fill_pattern_4_0: 70000 rects
+caravel_0008754b_fill_pattern_0_4: 2410000 rects
+caravel_0008754b_fill_pattern_2_2: 20000 rects
+caravel_0008754b_fill_pattern_0_4: 2420000 rects
+caravel_0008754b_fill_pattern_4_0: 80000 rects
+caravel_0008754b_fill_pattern_2_2: 30000 rects
+caravel_0008754b_fill_pattern_0_4: 2430000 rects
+caravel_0008754b_fill_pattern_4_0: 90000 rects
+caravel_0008754b_fill_pattern_2_2: 40000 rects
+caravel_0008754b_fill_pattern_4_0: 100000 rects
+caravel_0008754b_fill_pattern_0_0: 3360000 rects
+caravel_0008754b_fill_pattern_2_2: 50000 rects
+caravel_0008754b_fill_pattern_4_0: 110000 rects
+caravel_0008754b_fill_pattern_2_2: 60000 rects
+caravel_0008754b_fill_pattern_4_0: 120000 rects
+caravel_0008754b_fill_pattern_2_2: 70000 rects
+caravel_0008754b_fill_pattern_4_0: 130000 rects
+caravel_0008754b_fill_pattern_2_2: 80000 rects
+caravel_0008754b_fill_pattern_4_0: 140000 rects
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+caravel_0008754b_fill_pattern_0_0: 3370000 rects
+caravel_0008754b_fill_pattern_4_0: 150000 rects
+caravel_0008754b_fill_pattern_2_2: 90000 rects
+caravel_0008754b_fill_pattern_4_0: 160000 rects
+caravel_0008754b_fill_pattern_2_2: 100000 rects
+caravel_0008754b_fill_pattern_4_0: 170000 rects
+caravel_0008754b_fill_pattern_2_2: 110000 rects
+caravel_0008754b_fill_pattern_4_0: 180000 rects
+caravel_0008754b_fill_pattern_2_2: 120000 rects
+caravel_0008754b_fill_pattern_4_0: 190000 rects
+caravel_0008754b_fill_pattern_2_2: 130000 rects
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+caravel_0008754b_fill_pattern_4_0: 200000 rects
+caravel_0008754b_fill_pattern_2_2: 140000 rects
+caravel_0008754b_fill_pattern_4_0: 210000 rects
+caravel_0008754b_fill_pattern_2_2: 150000 rects
+caravel_0008754b_fill_pattern_4_0: 220000 rects
+caravel_0008754b_fill_pattern_2_2: 160000 rects
+caravel_0008754b_fill_pattern_4_0: 230000 rects
+caravel_0008754b_fill_pattern_2_2: 170000 rects
+caravel_0008754b_fill_pattern_4_0: 240000 rects
+caravel_0008754b_fill_pattern_0_0: 3390000 rects
+caravel_0008754b_fill_pattern_2_2: 180000 rects
+caravel_0008754b_fill_pattern_4_0: 250000 rects
+caravel_0008754b_fill_pattern_2_2: 190000 rects
+caravel_0008754b_fill_pattern_4_0: 260000 rects
+caravel_0008754b_fill_pattern_2_2: 200000 rects
+caravel_0008754b_fill_pattern_4_0: 270000 rects
+caravel_0008754b_fill_pattern_2_2: 210000 rects
+caravel_0008754b_fill_pattern_4_0: 280000 rects
+caravel_0008754b_fill_pattern_2_2: 220000 rects
+caravel_0008754b_fill_pattern_4_0: 290000 rects
+caravel_0008754b_fill_pattern_0_0: 3400000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_0_4
+caravel_0008754b_fill_pattern_2_2: 230000 rects
+caravel_0008754b_fill_pattern_4_0: 300000 rects
+caravel_0008754b_fill_pattern_2_2: 240000 rects
+caravel_0008754b_fill_pattern_4_0: 310000 rects
+caravel_0008754b_fill_pattern_2_2: 250000 rects
+caravel_0008754b_fill_pattern_4_0: 320000 rects
+caravel_0008754b_fill_pattern_2_2: 260000 rects
+caravel_0008754b_fill_pattern_4_0: 330000 rects
+caravel_0008754b_fill_pattern_0_0: 3410000 rects
+caravel_0008754b_fill_pattern_2_2: 270000 rects
+caravel_0008754b_fill_pattern_4_0: 340000 rects
+caravel_0008754b_fill_pattern_2_2: 280000 rects
+caravel_0008754b_fill_pattern_4_0: 350000 rects
+caravel_0008754b_fill_pattern_2_2: 290000 rects
+caravel_0008754b_fill_pattern_4_0: 360000 rects
+caravel_0008754b_fill_pattern_2_2: 300000 rects
+caravel_0008754b_fill_pattern_4_0: 370000 rects
+caravel_0008754b_fill_pattern_2_2: 310000 rects
+caravel_0008754b_fill_pattern_4_0: 380000 rects
+caravel_0008754b_fill_pattern_0_0: 3420000 rects
+caravel_0008754b_fill_pattern_2_2: 320000 rects
+caravel_0008754b_fill_pattern_4_0: 390000 rects
+caravel_0008754b_fill_pattern_2_2: 330000 rects
+caravel_0008754b_fill_pattern_4_0: 400000 rects
+caravel_0008754b_fill_pattern_2_2: 340000 rects
+caravel_0008754b_fill_pattern_4_0: 410000 rects
+caravel_0008754b_fill_pattern_2_2: 350000 rects
+caravel_0008754b_fill_pattern_4_0: 420000 rects
+caravel_0008754b_fill_pattern_0_0: 3430000 rects
+caravel_0008754b_fill_pattern_2_2: 360000 rects
+caravel_0008754b_fill_pattern_4_0: 430000 rects
+caravel_0008754b_fill_pattern_2_2: 370000 rects
+caravel_0008754b_fill_pattern_4_0: 440000 rects
+caravel_0008754b_fill_pattern_2_2: 380000 rects
+caravel_0008754b_fill_pattern_4_0: 450000 rects
+caravel_0008754b_fill_pattern_2_2: 390000 rects
+caravel_0008754b_fill_pattern_4_0: 460000 rects
+caravel_0008754b_fill_pattern_2_2: 400000 rects
+caravel_0008754b_fill_pattern_0_0: 3440000 rects
+caravel_0008754b_fill_pattern_4_0: 470000 rects
+caravel_0008754b_fill_pattern_2_2: 410000 rects
+caravel_0008754b_fill_pattern_4_0: 480000 rects
+caravel_0008754b_fill_pattern_2_2: 420000 rects
+caravel_0008754b_fill_pattern_4_0: 490000 rects
+caravel_0008754b_fill_pattern_2_2: 430000 rects
+caravel_0008754b_fill_pattern_4_0: 500000 rects
+caravel_0008754b_fill_pattern_0_0: 3450000 rects
+caravel_0008754b_fill_pattern_2_2: 440000 rects
+caravel_0008754b_fill_pattern_4_0: 510000 rects
+caravel_0008754b_fill_pattern_2_2: 450000 rects
+caravel_0008754b_fill_pattern_4_0: 520000 rects
+caravel_0008754b_fill_pattern_2_2: 460000 rects
+caravel_0008754b_fill_pattern_4_0: 530000 rects
+caravel_0008754b_fill_pattern_4_0: 540000 rects
+caravel_0008754b_fill_pattern_0_0: 3460000 rects
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+caravel_0008754b_fill_pattern_0_0: 4880000 rects
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+caravel_0008754b_fill_pattern_0_0: 4900000 rects
+caravel_0008754b_fill_pattern_0_0: 4910000 rects
+caravel_0008754b_fill_pattern_4_0: 2010000 rects
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+caravel_0008754b_fill_pattern_0_0: 4920000 rects
+caravel_0008754b_fill_pattern_0_0: 4930000 rects
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+caravel_0008754b_fill_pattern_0_0: 4940000 rects
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+caravel_0008754b_fill_pattern_0_0: 4950000 rects
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+caravel_0008754b_fill_pattern_0_0: 4960000 rects
+caravel_0008754b_fill_pattern_2_2: 1950000 rects
+caravel_0008754b_fill_pattern_4_0: 2050000 rects
+Ended: 12/10/2022 10:05:49
+caravel_0008754b_fill_pattern_0_0: 4970000 rects
+caravel_0008754b_fill_pattern_2_2: 1960000 rects
+caravel_0008754b_fill_pattern_4_0: 2060000 rects
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+caravel_0008754b_fill_pattern_2_2: 1970000 rects
+caravel_0008754b_fill_pattern_0_0: 4980000 rects
+caravel_0008754b_fill_pattern_4_0: 2070000 rects
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+caravel_0008754b_fill_pattern_0_0: 4990000 rects
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+caravel_0008754b_fill_pattern_4_0: 2080000 rects
+caravel_0008754b_fill_pattern_2_2: 1980000 rects
+caravel_0008754b_fill_pattern_0_0: 5000000 rects
+caravel_0008754b_fill_pattern_4_0: 2090000 rects
+caravel_0008754b_fill_pattern_0_0: 5010000 rects
+caravel_0008754b_fill_pattern_0_0: 5020000 rects
+caravel_0008754b_fill_pattern_2_2: 1990000 rects
+caravel_0008754b_fill_pattern_0_0: 5030000 rects
+caravel_0008754b_fill_pattern_4_0: 2100000 rects
+caravel_0008754b_fill_pattern_0_0: 5040000 rects
+caravel_0008754b_fill_pattern_4_0: 2110000 rects
+caravel_0008754b_fill_pattern_0_0: 5050000 rects
+caravel_0008754b_fill_pattern_2_2: 2000000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0008754b_fill_pattern_4_0: 2120000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0008754b_fill_pattern_0_0: 5060000 rects
+caravel_0008754b_fill_pattern_1_3: 10000 rects
+caravel_0008754b_fill_pattern_4_0: 2130000 rects
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+caravel_0008754b_fill_pattern_1_3: 20000 rects
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+caravel_0008754b_fill_pattern_0_0: 5070000 rects
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+caravel_0008754b_fill_pattern_1_3: 100000 rects
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+caravel_0008754b_fill_pattern_1_3: 110000 rects
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+caravel_0008754b_fill_pattern_1_3: 140000 rects
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+caravel_0008754b_fill_pattern_1_3: 150000 rects
+caravel_0008754b_fill_pattern_0_0: 5130000 rects
+caravel_0008754b_fill_pattern_1_3: 160000 rects
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+caravel_0008754b_fill_pattern_1_3: 180000 rects
+caravel_0008754b_fill_pattern_1_3: 190000 rects
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+caravel_0008754b_fill_pattern_1_3: 200000 rects
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+caravel_0008754b_fill_pattern_0_0: 5140000 rects
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+caravel_0008754b_fill_pattern_1_3: 240000 rects
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+caravel_0008754b_fill_pattern_1_3: 250000 rects
+caravel_0008754b_fill_pattern_2_2: 2120000 rects
+caravel_0008754b_fill_pattern_1_3: 260000 rects
+caravel_0008754b_fill_pattern_4_0: 2220000 rects
+caravel_0008754b_fill_pattern_2_2: 2130000 rects
+caravel_0008754b_fill_pattern_1_3: 270000 rects
+caravel_0008754b_fill_pattern_2_2: 2140000 rects
+caravel_0008754b_fill_pattern_1_3: 280000 rects
+caravel_0008754b_fill_pattern_4_0: 2230000 rects
+caravel_0008754b_fill_pattern_1_3: 290000 rects
+caravel_0008754b_fill_pattern_1_3: 300000 rects
+caravel_0008754b_fill_pattern_4_0: 2240000 rects
+caravel_0008754b_fill_pattern_1_3: 310000 rects
+caravel_0008754b_fill_pattern_1_3: 320000 rects
+caravel_0008754b_fill_pattern_4_0: 2250000 rects
+caravel_0008754b_fill_pattern_1_3: 330000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_0_0
+caravel_0008754b_fill_pattern_1_3: 340000 rects
+caravel_0008754b_fill_pattern_4_0: 2260000 rects
+caravel_0008754b_fill_pattern_1_3: 350000 rects
+caravel_0008754b_fill_pattern_1_3: 360000 rects
+caravel_0008754b_fill_pattern_1_3: 370000 rects
+caravel_0008754b_fill_pattern_4_0: 2270000 rects
+caravel_0008754b_fill_pattern_1_3: 380000 rects
+caravel_0008754b_fill_pattern_4_0: 2280000 rects
+caravel_0008754b_fill_pattern_1_3: 390000 rects
+caravel_0008754b_fill_pattern_1_3: 400000 rects
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+caravel_0008754b_fill_pattern_1_3: 410000 rects
+caravel_0008754b_fill_pattern_4_0: 2300000 rects
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+caravel_0008754b_fill_pattern_1_3: 440000 rects
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+caravel_0008754b_fill_pattern_1_3: 450000 rects
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+caravel_0008754b_fill_pattern_1_3: 520000 rects
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+caravel_0008754b_fill_pattern_1_3: 1010000 rects
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+caravel_0008754b_fill_pattern_1_3: 1570000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0008754b_fill_pattern_1_3: 1580000 rects
+   Generating output for cell caravel_0008754b_fill_pattern_2_2
+caravel_0008754b_fill_pattern_4_0: 2780000 rects
+caravel_0008754b_fill_pattern_1_3: 1590000 rects
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0008754b_fill_pattern_4_0
+caravel_0008754b_fill_pattern_1_3: 1700000 rects
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+caravel_0008754b_fill_pattern_1_3: 4890000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_1_3
+Ended: 12/10/2022 10:06:26
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
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+caravel_0008754b_fill_pattern_3_1: 3940000 rects
+caravel_0008754b_fill_pattern_3_1: 3950000 rects
+caravel_0008754b_fill_pattern_3_1: 3960000 rects
+caravel_0008754b_fill_pattern_3_1: 3970000 rects
+caravel_0008754b_fill_pattern_3_1: 3980000 rects
+caravel_0008754b_fill_pattern_3_1: 3990000 rects
+caravel_0008754b_fill_pattern_3_1: 4000000 rects
+caravel_0008754b_fill_pattern_3_1: 4010000 rects
+caravel_0008754b_fill_pattern_3_1: 4020000 rects
+caravel_0008754b_fill_pattern_3_1: 4030000 rects
+caravel_0008754b_fill_pattern_3_1: 4040000 rects
+caravel_0008754b_fill_pattern_3_1: 4050000 rects
+caravel_0008754b_fill_pattern_3_1: 4060000 rects
+caravel_0008754b_fill_pattern_3_1: 4070000 rects
+caravel_0008754b_fill_pattern_3_1: 4080000 rects
+caravel_0008754b_fill_pattern_3_1: 4090000 rects
+caravel_0008754b_fill_pattern_3_1: 4100000 rects
+caravel_0008754b_fill_pattern_3_1: 4110000 rects
+caravel_0008754b_fill_pattern_3_1: 4120000 rects
+caravel_0008754b_fill_pattern_3_1: 4130000 rects
+caravel_0008754b_fill_pattern_3_1: 4140000 rects
+caravel_0008754b_fill_pattern_3_1: 4150000 rects
+caravel_0008754b_fill_pattern_3_1: 4160000 rects
+caravel_0008754b_fill_pattern_3_1: 4170000 rects
+caravel_0008754b_fill_pattern_3_1: 4180000 rects
+caravel_0008754b_fill_pattern_3_1: 4190000 rects
+caravel_0008754b_fill_pattern_3_1: 4200000 rects
+caravel_0008754b_fill_pattern_3_1: 4210000 rects
+caravel_0008754b_fill_pattern_3_1: 4220000 rects
+caravel_0008754b_fill_pattern_3_1: 4230000 rects
+caravel_0008754b_fill_pattern_3_1: 4240000 rects
+caravel_0008754b_fill_pattern_3_1: 4250000 rects
+caravel_0008754b_fill_pattern_3_1: 4260000 rects
+caravel_0008754b_fill_pattern_3_1: 4270000 rects
+caravel_0008754b_fill_pattern_3_1: 4280000 rects
+caravel_0008754b_fill_pattern_3_1: 4290000 rects
+caravel_0008754b_fill_pattern_3_1: 4300000 rects
+caravel_0008754b_fill_pattern_3_1: 4310000 rects
+caravel_0008754b_fill_pattern_3_1: 4320000 rects
+caravel_0008754b_fill_pattern_3_1: 4330000 rects
+caravel_0008754b_fill_pattern_3_1: 4340000 rects
+caravel_0008754b_fill_pattern_3_1: 4350000 rects
+caravel_0008754b_fill_pattern_3_1: 4360000 rects
+caravel_0008754b_fill_pattern_3_1: 4370000 rects
+caravel_0008754b_fill_pattern_3_1: 4380000 rects
+caravel_0008754b_fill_pattern_3_1: 4390000 rects
+caravel_0008754b_fill_pattern_3_1: 4400000 rects
+caravel_0008754b_fill_pattern_3_1: 4410000 rects
+caravel_0008754b_fill_pattern_3_1: 4420000 rects
+caravel_0008754b_fill_pattern_3_1: 4430000 rects
+caravel_0008754b_fill_pattern_3_1: 4440000 rects
+caravel_0008754b_fill_pattern_3_1: 4450000 rects
+caravel_0008754b_fill_pattern_3_1: 4460000 rects
+caravel_0008754b_fill_pattern_3_1: 4470000 rects
+caravel_0008754b_fill_pattern_3_1: 4480000 rects
+caravel_0008754b_fill_pattern_3_1: 4490000 rects
+caravel_0008754b_fill_pattern_3_1: 4500000 rects
+caravel_0008754b_fill_pattern_3_1: 4510000 rects
+caravel_0008754b_fill_pattern_3_1: 4520000 rects
+caravel_0008754b_fill_pattern_3_1: 4530000 rects
+caravel_0008754b_fill_pattern_3_1: 4540000 rects
+caravel_0008754b_fill_pattern_3_1: 4550000 rects
+caravel_0008754b_fill_pattern_3_1: 4560000 rects
+caravel_0008754b_fill_pattern_3_1: 4570000 rects
+caravel_0008754b_fill_pattern_3_1: 4580000 rects
+caravel_0008754b_fill_pattern_3_1: 4590000 rects
+caravel_0008754b_fill_pattern_3_1: 4600000 rects
+caravel_0008754b_fill_pattern_3_1: 4610000 rects
+caravel_0008754b_fill_pattern_3_1: 4620000 rects
+caravel_0008754b_fill_pattern_3_1: 4630000 rects
+caravel_0008754b_fill_pattern_3_1: 4640000 rects
+caravel_0008754b_fill_pattern_3_1: 4650000 rects
+caravel_0008754b_fill_pattern_3_1: 4660000 rects
+caravel_0008754b_fill_pattern_3_1: 4670000 rects
+caravel_0008754b_fill_pattern_3_1: 4680000 rects
+caravel_0008754b_fill_pattern_3_1: 4690000 rects
+caravel_0008754b_fill_pattern_3_1: 4700000 rects
+caravel_0008754b_fill_pattern_3_1: 4710000 rects
+caravel_0008754b_fill_pattern_3_1: 4720000 rects
+caravel_0008754b_fill_pattern_3_1: 4730000 rects
+caravel_0008754b_fill_pattern_3_1: 4740000 rects
+caravel_0008754b_fill_pattern_3_1: 4750000 rects
+caravel_0008754b_fill_pattern_3_1: 4760000 rects
+caravel_0008754b_fill_pattern_3_1: 4770000 rects
+caravel_0008754b_fill_pattern_3_1: 4780000 rects
+caravel_0008754b_fill_pattern_3_1: 4790000 rects
+caravel_0008754b_fill_pattern_3_1: 4800000 rects
+caravel_0008754b_fill_pattern_3_1: 4810000 rects
+caravel_0008754b_fill_pattern_3_1: 4820000 rects
+caravel_0008754b_fill_pattern_3_1: 4830000 rects
+caravel_0008754b_fill_pattern_3_1: 4840000 rects
+caravel_0008754b_fill_pattern_3_1: 4850000 rects
+caravel_0008754b_fill_pattern_3_1: 4860000 rects
+caravel_0008754b_fill_pattern_3_1: 4870000 rects
+caravel_0008754b_fill_pattern_3_1: 4880000 rects
+caravel_0008754b_fill_pattern_3_1: 4890000 rects
+caravel_0008754b_fill_pattern_3_1: 4900000 rects
+caravel_0008754b_fill_pattern_3_1: 4910000 rects
+caravel_0008754b_fill_pattern_3_1: 4920000 rects
+caravel_0008754b_fill_pattern_3_1: 4930000 rects
+caravel_0008754b_fill_pattern_3_1: 4940000 rects
+caravel_0008754b_fill_pattern_3_1: 4950000 rects
+caravel_0008754b_fill_pattern_3_1: 4960000 rects
+caravel_0008754b_fill_pattern_3_1: 4970000 rects
+caravel_0008754b_fill_pattern_3_1: 4980000 rects
+caravel_0008754b_fill_pattern_3_1: 4990000 rects
+caravel_0008754b_fill_pattern_3_1: 5000000 rects
+caravel_0008754b_fill_pattern_3_1: 5010000 rects
+caravel_0008754b_fill_pattern_3_1: 5020000 rects
+caravel_0008754b_fill_pattern_3_1: 5030000 rects
+caravel_0008754b_fill_pattern_3_1: 5040000 rects
+caravel_0008754b_fill_pattern_3_1: 5050000 rects
+caravel_0008754b_fill_pattern_3_1: 5060000 rects
+caravel_0008754b_fill_pattern_3_1: 5070000 rects
+caravel_0008754b_fill_pattern_3_1: 5080000 rects
+caravel_0008754b_fill_pattern_3_1: 5090000 rects
+caravel_0008754b_fill_pattern_3_1: 5100000 rects
+caravel_0008754b_fill_pattern_3_1: 5110000 rects
+caravel_0008754b_fill_pattern_3_1: 5120000 rects
+caravel_0008754b_fill_pattern_3_1: 5130000 rects
+caravel_0008754b_fill_pattern_3_1: 5140000 rects
+caravel_0008754b_fill_pattern_3_1: 5150000 rects
+caravel_0008754b_fill_pattern_3_1: 5160000 rects
+caravel_0008754b_fill_pattern_3_1: 5170000 rects
+caravel_0008754b_fill_pattern_3_1: 5180000 rects
+caravel_0008754b_fill_pattern_3_1: 5190000 rects
+caravel_0008754b_fill_pattern_3_1: 5200000 rects
+caravel_0008754b_fill_pattern_3_1: 5210000 rects
+caravel_0008754b_fill_pattern_3_1: 5220000 rects
+caravel_0008754b_fill_pattern_3_1: 5230000 rects
+caravel_0008754b_fill_pattern_3_1: 5240000 rects
+caravel_0008754b_fill_pattern_3_1: 5250000 rects
+caravel_0008754b_fill_pattern_3_1: 5260000 rects
+caravel_0008754b_fill_pattern_3_1: 5270000 rects
+caravel_0008754b_fill_pattern_3_1: 5280000 rects
+caravel_0008754b_fill_pattern_3_1: 5290000 rects
+caravel_0008754b_fill_pattern_3_1: 5300000 rects
+caravel_0008754b_fill_pattern_3_1: 5310000 rects
+caravel_0008754b_fill_pattern_3_1: 5320000 rects
+caravel_0008754b_fill_pattern_3_1: 5330000 rects
+caravel_0008754b_fill_pattern_3_1: 5340000 rects
+caravel_0008754b_fill_pattern_3_1: 5350000 rects
+caravel_0008754b_fill_pattern_3_1: 5360000 rects
+caravel_0008754b_fill_pattern_3_1: 5370000 rects
+caravel_0008754b_fill_pattern_3_1: 5380000 rects
+caravel_0008754b_fill_pattern_3_1: 5390000 rects
+caravel_0008754b_fill_pattern_3_1: 5400000 rects
+caravel_0008754b_fill_pattern_3_1: 5410000 rects
+caravel_0008754b_fill_pattern_3_1: 5420000 rects
+caravel_0008754b_fill_pattern_3_1: 5430000 rects
+caravel_0008754b_fill_pattern_3_1: 5440000 rects
+caravel_0008754b_fill_pattern_3_1: 5450000 rects
+caravel_0008754b_fill_pattern_3_1: 5460000 rects
+caravel_0008754b_fill_pattern_3_1: 5470000 rects
+caravel_0008754b_fill_pattern_3_1: 5480000 rects
+caravel_0008754b_fill_pattern_3_1: 5490000 rects
+caravel_0008754b_fill_pattern_3_1: 5500000 rects
+caravel_0008754b_fill_pattern_3_1: 5510000 rects
+caravel_0008754b_fill_pattern_3_1: 5520000 rects
+caravel_0008754b_fill_pattern_3_1: 5530000 rects
+caravel_0008754b_fill_pattern_3_1: 5540000 rects
+caravel_0008754b_fill_pattern_3_1: 5550000 rects
+caravel_0008754b_fill_pattern_3_1: 5560000 rects
+caravel_0008754b_fill_pattern_3_1: 5570000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0008754b_fill_pattern_3_1
+Ended: 12/10/2022 10:07:27
+Ended: 12/10/2022 10:07:31
+Ended: 12/10/2022 10:07:52
+Ended: 12/10/2022 10:07:57
+Ended: 12/10/2022 10:07:59
+Ended: 12/10/2022 10:08:10
+Ended: 12/10/2022 10:08:19
+Ended: 12/10/2022 10:08:27
+Ended: 12/10/2022 10:08:28
+Ended: 12/10/2022 10:08:29
+Ended: 12/10/2022 10:08:39
+Ended: 12/10/2022 10:09:48
+Ended: 12/10/2022 10:10:22
+Ended: 12/10/2022 10:10:50
diff --git a/tapeout/logs/gds.info b/tapeout/logs/gds.info
new file mode 100644
index 0000000..b2ba9ed
--- /dev/null
+++ b/tapeout/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: c22c3b78f6a7ba753aa87559fc6e0348a5df1922
\ No newline at end of file
diff --git a/tapeout/logs/gen_gpio_defaults.log b/tapeout/logs/gen_gpio_defaults.log
new file mode 100644
index 0000000..4fd9866
--- /dev/null
+++ b/tapeout/logs/gen_gpio_defaults.log
@@ -0,0 +1,79 @@
+Step 1:  Create new cells for new GPIO default vectors.
+Creating new layout file /root/project/mag/gpio_defaults_block_1803.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1803.v
+Layout file /root/project/mag/gpio_defaults_block_1803.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1803.v already exists and does not need to be generated.
+Creating new layout file /root/project/mag/gpio_defaults_block_0403.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v
+Creating new layout file /root/project/mag/gpio_defaults_block_0801.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0801.v
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Creating new layout file /root/project/mag/gpio_defaults_block_1801.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_1801.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1801.v already exists and does not need to be generated.
+Step 2:  Modify top-level layouts to use the specified defaults.
+Done.
diff --git a/tapeout/logs/git_clone.log b/tapeout/logs/git_clone.log
new file mode 100644
index 0000000..f375819
--- /dev/null
+++ b/tapeout/logs/git_clone.log
@@ -0,0 +1,2 @@
+https://github.com/cloudxcc/ShapingTheWaves_8.git
+Cloning into '/root/project'...
diff --git a/tapeout/logs/klayout_beol.log b/tapeout/logs/klayout_beol.log
new file mode 100644
index 0000000..c0c21e3
--- /dev/null
+++ b/tapeout/logs/klayout_beol.log
@@ -0,0 +1,1005 @@
+/opt/scripts/tech/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/scripts/tech/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/scripts/tech/sky130A_mr.drc:54: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/scripts/tech/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/scripts/tech/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/scripts/tech/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/scripts/tech/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/scripts/tech/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/scripts/tech/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/scripts/tech/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:124
+    Polygons (raw): 2804772 (flat)  4644 (hierarchical)
+    Elapsed: 0.420s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:125
+    Polygons (raw): 583017 (flat)  1031 (hierarchical)
+    Elapsed: 0.320s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:126
+    Polygons (raw): 1264312 (flat)  1448 (hierarchical)
+    Elapsed: 0.260s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:127
+    Polygons (raw): 866 (flat)  37 (hierarchical)
+    Elapsed: 0.010s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:128
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:129
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:130
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:131
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:132
+    Polygons (raw): 1073244 (flat)  691 (hierarchical)
+    Elapsed: 0.260s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:133
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:134
+    Polygons (raw): 54311 (flat)  575 (hierarchical)
+    Elapsed: 0.030s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:135
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2774.00M
+"polygons" in: sky130A_mr.drc:136
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+END: 76/20 (pad)
+Writing report database: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/tapeout/8a0e1332-0fab-4be1-9438-7b25b82297af/outputs/klayout_beol_report.xml ..
+Total elapsed: 7420.810s  Memory: 15300.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07
diff --git a/tapeout/logs/klayout_feol.log b/tapeout/logs/klayout_feol.log
new file mode 100644
index 0000000..97d2b58
--- /dev/null
+++ b/tapeout/logs/klayout_feol.log
@@ -0,0 +1,817 @@
+/opt/scripts/tech/sky130A_mr.drc:48: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/scripts/tech/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/scripts/tech/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/scripts/tech/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/scripts/tech/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/scripts/tech/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/scripts/tech/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/scripts/tech/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/scripts/tech/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/scripts/tech/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
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+DRC section
+FEOL section
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+"and" in: sky130A_mr.drc:384
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.070s  Memory: 6689.00M
+"enclosing" in: sky130A_mr.drc:384
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.430s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:384
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 6689.00M
+"enclosing" in: sky130A_mr.drc:385
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.260s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:385
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 6689.00M
+"enclosing" in: sky130A_mr.drc:386
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.040s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:386
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 6689.00M
+"separation" in: sky130A_mr.drc:387
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.030s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:387
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 6689.00M
+"not_interacting" in: sky130A_mr.drc:388
+    Polygons (raw): 14866 (flat)  9273 (hierarchical)
+    Elapsed: 0.550s  Memory: 6689.00M
+"separation" in: sky130A_mr.drc:388
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 2.940s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:388
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 6689.00M
+END: 97/44 (cap2m)
+FEOL section
+START: 75/20 (hvi)
+"not" in: sky130A_mr.drc:688
+    Polygons (raw): 54311 (flat)  575 (hierarchical)
+    Elapsed: 0.190s  Memory: 6689.00M
+"width" in: sky130A_mr.drc:689
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.420s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:689
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 6689.00M
+"space" in: sky130A_mr.drc:690
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.040s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:690
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 6689.00M
+END: 75/20 (hvi)
+START: 125/20 (hvntm)
+"not" in: sky130A_mr.drc:695
+    Polygons (raw): 33 (flat)  16 (hierarchical)
+    Elapsed: 0.100s  Memory: 6689.00M
+"width" in: sky130A_mr.drc:696
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.370s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:696
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 6689.00M
+"space" in: sky130A_mr.drc:697
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.040s  Memory: 6689.00M
+"output" in: sky130A_mr.drc:697
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 6689.00M
+END: 125/20 (hvntm)
+Writing report database: /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/tapeout/8a0e1332-0fab-4be1-9438-7b25b82297af/outputs/klayout_feol_report.xml ..
+Total elapsed: 1976.970s  Memory: 6593.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07
diff --git a/tapeout/logs/klayout_fom_density.log b/tapeout/logs/klayout_fom_density.log
new file mode 100644
index 0000000..0d79d35
--- /dev/null
+++ b/tapeout/logs/klayout_fom_density.log
@@ -0,0 +1,58 @@
+fom_density.drc:: sourcing design file=/mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/tapeout/8a0e1332-0fab-4be1-9438-7b25b82297af/outputs/caravel_0008754b.oas topcell=caravel_0008754b ...
+done.
+flattening chip boundary...
+done.
+step size = 70.0
+llx=5.964999999999999 lly=5.999999999999999 urx=3594.0349999999994 ury=5193.999999999999
+x_cnt = 51
+y_cnt = 74
+dbu = 0.0009999999999999998
+bbox_area = 18614907.159999993
+calculating subtile areas (= 3774)...
+tiles per step = 10
+calculating window step densities (= 2730)...
+{{ CHECK }} 0/2730
+{{ CHECK }} 65/2730
+{{ CHECK }} 130/2730
+{{ CHECK }} 195/2730
+{{ CHECK }} 260/2730
+{{ CHECK }} 325/2730
+{{ CHECK }} 390/2730
+{{ CHECK }} 455/2730
+{{ CHECK }} 520/2730
+{{ CHECK }} 585/2730
+{{ CHECK }} 650/2730
+{{ CHECK }} 715/2730
+{{ CHECK }} 780/2730
+{{ CHECK }} 845/2730
+{{ CHECK }} 910/2730
+{{ CHECK }} 975/2730
+{{ CHECK }} 1040/2730
+{{ CHECK }} 1105/2730
+{{ CHECK }} 1170/2730
+{{ CHECK }} 1235/2730
+{{ CHECK }} 1300/2730
+{{ CHECK }} 1365/2730
+{{ CHECK }} 1430/2730
+{{ CHECK }} 1495/2730
+{{ CHECK }} 1560/2730
+{{ CHECK }} 1625/2730
+{{ CHECK }} 1690/2730
+{{ CHECK }} 1755/2730
+{{ CHECK }} 1820/2730
+{{ CHECK }} 1885/2730
+{{ CHECK }} 1950/2730
+{{ CHECK }} 2015/2730
+{{ CHECK }} 2080/2730
+{{ CHECK }} 2145/2730
+{{ CHECK }} 2210/2730
+{{ CHECK }} 2275/2730
+{{ CHECK }} 2340/2730
+{{ CHECK }} 2405/2730
+{{ CHECK }} 2470/2730
+{{ CHECK }} 2535/2730
+{{ CHECK }} 2600/2730
+{{ CHECK }} 2665/2730
+minimum fom density  = 0.3913
+maximum fom density  = 0.4982
+finish received: success = true
diff --git a/tapeout/logs/klayout_gds2oas.log b/tapeout/logs/klayout_gds2oas.log
new file mode 100644
index 0000000..c039943
--- /dev/null
+++ b/tapeout/logs/klayout_gds2oas.log
@@ -0,0 +1 @@
+[INFO] Changing from /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/tapeout/8a0e1332-0fab-4be1-9438-7b25b82297af/outputs/caravel_0008754b.gds to /mnt/uffs/user/u8380_tobias/design/shapingthewaves_8/jobs/tapeout/8a0e1332-0fab-4be1-9438-7b25b82297af/outputs/caravel_0008754b.oas
diff --git a/tapeout/logs/klayout_met_density.log b/tapeout/logs/klayout_met_density.log
new file mode 100644
index 0000000..05eefae
--- /dev/null
+++ b/tapeout/logs/klayout_met_density.log
@@ -0,0 +1,6 @@
+li1_ca_density is 0.4608603577000008
+m1_ca_density is 0.5471287941318613
+m2_ca_density is 0.5752792038688562
+m3_ca_density is 0.5358453517119526
+m4_ca_density is 0.49074771096850156
+m5_ca_density is 0.5495396803143606
diff --git a/tapeout/logs/klayout_missing_cells.log b/tapeout/logs/klayout_missing_cells.log
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/tapeout/logs/klayout_missing_cells.log
diff --git a/tapeout/logs/klayout_zero_area.log b/tapeout/logs/klayout_zero_area.log
new file mode 100644
index 0000000..cc0ce1f
--- /dev/null
+++ b/tapeout/logs/klayout_zero_area.log
@@ -0,0 +1,4 @@
+0 zero-length paths,  0 zero-length paths deleted.
+0 total zero-area objects,  0 total objects deleted.
+VmPeak:	 3807956 kB
+VmHWM:	 3257592 kB
diff --git a/tapeout/logs/missing_cells.info b/tapeout/logs/missing_cells.info
new file mode 100644
index 0000000..bc59c12
--- /dev/null
+++ b/tapeout/logs/missing_cells.info
@@ -0,0 +1 @@
+False
diff --git a/tapeout/logs/oasis.info b/tapeout/logs/oasis.info
new file mode 100644
index 0000000..b8ea008
--- /dev/null
+++ b/tapeout/logs/oasis.info
@@ -0,0 +1 @@
+caravel_0008754b.oas: 3c713e2224f168864bfd262a6e3ea3755fbfc40e
\ No newline at end of file
diff --git a/tapeout/logs/pdks.info b/tapeout/logs/pdks.info
new file mode 100644
index 0000000..3bb11c6
--- /dev/null
+++ b/tapeout/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs: 0059588eebfc704681dc2368bd1d33d96281d10f
+Skywater PDK: f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file
diff --git a/tapeout/logs/rram.info b/tapeout/logs/rram.info
new file mode 100644
index 0000000..bc59c12
--- /dev/null
+++ b/tapeout/logs/rram.info
@@ -0,0 +1 @@
+False
diff --git a/tapeout/logs/set_user_id.log b/tapeout/logs/set_user_id.log
new file mode 100644
index 0000000..c556fbf
--- /dev/null
+++ b/tapeout/logs/set_user_id.log
@@ -0,0 +1,10 @@
+Project Chip ID is: 554315
+Setting Project Chip ID to: 0008754b
+Step 1: Modify Layout of the user_id_programming subcell
+Done!
+Step 2: Add user project ID parameter to source verilog.
+Done!
+Step 3: Add user project ID parameter to gate-level verilog.
+Done!
+Step 4: Add user project ID text to top level layout.
+Done!
diff --git a/tapeout/logs/ship_truck.log b/tapeout/logs/ship_truck.log
new file mode 100644
index 0000000..259cac4
--- /dev/null
+++ b/tapeout/logs/ship_truck.log
@@ -0,0 +1,2182 @@
+
+Magic 8.3 revision 346 - Compiled on Wed Nov 23 17:18:53 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/mag2gds.tcl" from command line.
+Scaled magic input cell user_project_wrapper geometry by factor of 2
+user_project_wrapper: 10000 rects
+user_project_wrapper: 20000 rects
+user_project_wrapper: 30000 rects
+user_project_wrapper: 40000 rects
+user_project_wrapper: 50000 rects
+Scaled magic input cell user_id_textblock geometry by factor of 2
+caravel: 10000 rects
+caravel: 20000 rects
+caravel: 30000 rects
+caravel: 40000 rects
+caravel: 50000 rects
+caravel: 60000 rects
+caravel: 70000 rects
+caravel: 80000 rects
+Processing timestamp mismatches: simple_por.
+Scaled magic input cell caravel_motto geometry by factor of 2
+Scaled magic input cell font_22 geometry by factor of 24
+Scaled magic input cell font_73 geometry by factor of 24
+Scaled magic input cell font_43 geometry by factor of 24
+Scaled magic input cell font_49 geometry by factor of 24
+Scaled magic input cell font_65 geometry by factor of 24
+Scaled magic input cell font_68 geometry by factor of 24
+Scaled magic input cell font_54 geometry by factor of 24
+Scaled magic input cell font_67 geometry by factor of 24
+Scaled magic input cell font_6E geometry by factor of 24
+Scaled magic input cell font_69 geometry by factor of 24
+Scaled magic input cell font_6C geometry by factor of 24
+Scaled magic input cell font_61 geometry by factor of 24
+Scaled magic input cell font_53 geometry by factor of 24
+Scaled magic input cell font_79 geometry by factor of 24
+Scaled magic input cell font_76 geometry by factor of 24
+Scaled magic input cell font_74 geometry by factor of 24
+Scaled magic input cell font_72 geometry by factor of 24
+Scaled magic input cell font_70 geometry by factor of 24
+Scaled magic input cell font_66 geometry by factor of 24
+Scaled magic input cell font_63 geometry by factor of 24
+Scaled magic input cell font_62 geometry by factor of 24
+Scaled magic input cell font_57 geometry by factor of 24
+Scaled magic input cell font_56 geometry by factor of 24
+Scaled magic input cell font_50 geometry by factor of 24
+Scaled magic input cell font_47 geometry by factor of 24
+Scaled magic input cell font_44 geometry by factor of 24
+Scaled magic input cell font_35 geometry by factor of 24
+Scaled magic input cell font_32 geometry by factor of 24
+Scaled magic input cell font_30 geometry by factor of 24
+Scaled magic input cell font_29 geometry by factor of 24
+Scaled magic input cell font_28 geometry by factor of 24
+Scaled magic input cell font_20 geometry by factor of 24
+Scaled magic input cell font_6F geometry by factor of 24
+Scaled magic input cell font_6B geometry by factor of 24
+Scaled magic input cell font_4F geometry by factor of 24
+Scaled magic input cell font_4B geometry by factor of 24
+Scaled magic input cell font_2D geometry by factor of 24
+Scaled magic input cell open_source geometry by factor of 2
+Scaled magic input cell alpha_0 geometry by factor of 2
+Scaled magic input cell alpha_8 geometry by factor of 72
+Scaled magic input cell alpha_7 geometry by factor of 72
+Scaled magic input cell alpha_5 geometry by factor of 72
+Scaled magic input cell alpha_4 geometry by factor of 72
+Scaled magic input cell alpha_B geometry by factor of 72
+caravel_clocking: 10000 rects
+caravel_clocking: 20000 rects
+caravel_clocking: 30000 rects
+housekeeping: 10000 rects
+housekeeping: 20000 rects
+housekeeping: 30000 rects
+housekeeping: 40000 rects
+housekeeping: 50000 rects
+housekeeping: 60000 rects
+housekeeping: 70000 rects
+housekeeping: 80000 rects
+housekeeping: 90000 rects
+housekeeping: 100000 rects
+housekeeping: 110000 rects
+housekeeping: 120000 rects
+housekeeping: 130000 rects
+housekeeping: 140000 rects
+housekeeping: 150000 rects
+housekeeping: 160000 rects
+housekeeping: 170000 rects
+housekeeping: 180000 rects
+housekeeping: 190000 rects
+housekeeping: 200000 rects
+housekeeping: 210000 rects
+housekeeping: 220000 rects
+housekeeping: 230000 rects
+housekeeping: 240000 rects
+housekeeping: 250000 rects
+housekeeping: 260000 rects
+housekeeping: 270000 rects
+housekeeping: 280000 rects
+housekeeping: 290000 rects
+housekeeping: 300000 rects
+housekeeping: 310000 rects
+housekeeping: 320000 rects
+housekeeping: 330000 rects
+housekeeping: 340000 rects
+housekeeping: 350000 rects
+housekeeping: 360000 rects
+housekeeping: 370000 rects
+housekeeping: 380000 rects
+housekeeping: 390000 rects
+housekeeping: 400000 rects
+housekeeping: 410000 rects
+housekeeping: 420000 rects
+housekeeping: 430000 rects
+housekeeping: 440000 rects
+housekeeping: 450000 rects
+housekeeping: 460000 rects
+housekeeping: 470000 rects
+housekeeping: 480000 rects
+housekeeping: 490000 rects
+housekeeping: 500000 rects
+housekeeping: 510000 rects
+housekeeping: 520000 rects
+digital_pll: 10000 rects
+digital_pll: 20000 rects
+mgmt_protect: 10000 rects
+mgmt_protect: 20000 rects
+mgmt_protect: 30000 rects
+mgmt_protect: 40000 rects
+mgmt_protect: 50000 rects
+mgmt_protect: 60000 rects
+mgmt_protect: 70000 rects
+mgmt_protect: 80000 rects
+mgmt_protect: 90000 rects
+mgmt_protect: 100000 rects
+mgmt_protect: 110000 rects
+mgmt_protect: 120000 rects
+mgmt_protect: 130000 rects
+mgmt_protect: 140000 rects
+mgmt_protect: 150000 rects
+mgmt_protect: 160000 rects
+mgmt_protect: 170000 rects
+mgmt_protect: 180000 rects
+mgmt_protect: 190000 rects
+mgmt_protect: 200000 rects
+mgmt_protect: 210000 rects
+mgmt_protect: 220000 rects
+mgmt_protect: 230000 rects
+mgmt_protect: 240000 rects
+mgmt_protect: 250000 rects
+mgmt_protect: 260000 rects
+mgmt_protect: 270000 rects
+mgmt_protect: 280000 rects
+mgmt_protect: 290000 rects
+mgmt_protect: 300000 rects
+mgmt_protect: 310000 rects
+mgmt_protect: 320000 rects
+mgmt_protect: 330000 rects
+mgmt_protect: 340000 rects
+mgmt_protect: 350000 rects
+mgmt_protect: 360000 rects
+mgmt_protect: 370000 rects
+mgmt_protect: 380000 rects
+mgmt_protect: 390000 rects
+mgmt_protect: 400000 rects
+sky130_fd_io__corner_bus_overlay: 10000 rects
+sky130_fd_io__top_ground_hvc_wpad: 10000 rects
+sky130_fd_io__top_ground_hvc_wpad: 20000 rects
+sky130_fd_io__top_ground_hvc_wpad: 30000 rects
+sky130_fd_io__top_ground_hvc_wpad: 40000 rects
+sky130_fd_io__top_ground_hvc_wpad: 50000 rects
+sky130_fd_io__top_ground_hvc_wpad: 60000 rects
+sky130_fd_io__top_ground_hvc_wpad: 70000 rects
+sky130_fd_io__top_ground_hvc_wpad: 80000 rects
+sky130_fd_io__top_ground_hvc_wpad: 90000 rects
+sky130_fd_io__top_ground_hvc_wpad: 100000 rects
+sky130_fd_io__top_ground_hvc_wpad: 110000 rects
+sky130_fd_io__top_ground_hvc_wpad: 120000 rects
+sky130_fd_io__top_ground_hvc_wpad: 130000 rects
+sky130_fd_io__top_ground_hvc_wpad: 140000 rects
+sky130_fd_io__top_ground_hvc_wpad: 150000 rects
+sky130_fd_io__top_ground_hvc_wpad: 160000 rects
+sky130_fd_io__top_ground_hvc_wpad: 170000 rects
+sky130_fd_io__top_ground_hvc_wpad: 180000 rects
+sky130_fd_io__top_ground_hvc_wpad: 190000 rects
+sky130_fd_io__top_ground_hvc_wpad: 200000 rects
+sky130_fd_io__top_ground_hvc_wpad: 210000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_5595914180851 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808336 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808666 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808678 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808679 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180839 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808671 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s2__example_55959141808672 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808663 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808660 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808675 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s2__example_55959141808676 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808662 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808661 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_559591418084 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__genrivetdlring__example_559591418082 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__gendlring__example_559591418081 geometry by factor of 2
+sky130_fd_io__top_xres4v2: 10000 rects
+sky130_fd_io__top_xres4v2: 20000 rects
+sky130_fd_io__top_xres4v2: 30000 rects
+sky130_fd_io__top_xres4v2: 40000 rects
+sky130_fd_io__top_xres4v2: 50000 rects
+sky130_fd_io__top_xres4v2: 60000 rects
+sky130_fd_io__top_xres4v2: 70000 rects
+sky130_fd_io__top_xres4v2: 80000 rects
+sky130_fd_io__top_xres4v2: 90000 rects
+sky130_fd_io__top_xres4v2: 100000 rects
+sky130_fd_io__top_xres4v2: 110000 rects
+sky130_fd_io__top_xres4v2: 120000 rects
+sky130_fd_io__top_xres4v2: 130000 rects
+sky130_fd_io__top_xres4v2: 140000 rects
+sky130_fd_io__top_xres4v2: 150000 rects
+sky130_fd_io__top_xres4v2: 160000 rects
+sky130_fd_io__top_xres4v2: 170000 rects
+sky130_fd_io__top_xres4v2: 180000 rects
+sky130_fd_io__top_xres4v2: 190000 rects
+sky130_fd_io__top_xres4v2: 200000 rects
+sky130_fd_io__top_xres4v2: 210000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808719 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808765 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808717 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808243 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180890 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808264 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180858 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180833 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_55959141808288 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180859 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808289 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808274 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808728 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808727 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808726 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808725 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808724 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808554 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808553 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808552 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808551 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808402 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808350 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808261 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808260 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808259 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808400 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808372 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808326 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808290 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808128 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808127 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180897 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180819 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808147 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808157 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808156 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808155 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808154 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808153 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808152 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808151 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808150 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808149 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808148 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808158 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_559591418083 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808137 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_559591418086 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808370 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808316 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808385 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_559591418088 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808612 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_5595914180848 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180849 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m2m3__example_55959141808714 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1_centered__example_559591418081 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2s_cdns_55959141808652 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2o_cdns_55959141808653 geometry by factor of 2
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 10000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 20000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 30000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_5595914180812 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_5595914180811 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418086 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418084 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpm1s2__example_55959141808659 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__pfet_01v8__example_55959141808657 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808202 geometry by factor of 2
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 10000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 20000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 30000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808273 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808740 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808739 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808738 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808737 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808736 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808735 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808734 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808733 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808732 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808731 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808730 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808752 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808751 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808750 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808749 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808748 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808747 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808746 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808745 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808744 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808743 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808742 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808741 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808324 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808270 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808187 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808338 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808337 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808700 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808559 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808729 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_p_em1c_cdns_55959141808753 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180860 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180857 geometry by factor of 2
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 10000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 20000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 30000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 40000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 50000 rects
+Scaled magic input cell sky130_fd_pr__hvdftpm1s2__example_55959141808649 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808646 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808378 geometry by factor of 2
+sky130_fd_io__xres4v2_in_buf: 10000 rects
+sky130_fd_io__xres4v2_in_buf: 20000 rects
+sky130_fd_io__xres4v2_in_buf: 30000 rects
+sky130_fd_io__xres4v2_in_buf: 40000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808782 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808449 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808452 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808233 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180827 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_5595914180835 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808242 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180829 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808237 geometry by factor of 2
+sky130_fd_io__top_gpiov2: 10000 rects
+sky130_fd_io__top_gpiov2: 20000 rects
+sky130_fd_io__top_gpiov2: 30000 rects
+sky130_fd_io__top_gpiov2: 40000 rects
+sky130_fd_io__top_gpiov2: 50000 rects
+sky130_fd_io__top_gpiov2: 60000 rects
+sky130_fd_io__top_gpiov2: 70000 rects
+sky130_fd_io__top_gpiov2: 80000 rects
+sky130_fd_io__top_gpiov2: 90000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808418 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808190 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180811 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808191 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808517 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808518 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180815 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180816 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180884 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808106 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808504 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180812 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180875 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2s_cdns_55959141808438 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2o_cdns_55959141808439 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180882 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180881 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180880 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180879 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180823 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808510 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808394 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808298 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808440 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180878 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808434 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808102 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808115 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808100 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808140 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808280 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808425 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808306 geometry by factor of 2
+sky130_fd_io__gpiov2_amux: 10000 rects
+sky130_fd_io__gpiov2_amux: 20000 rects
+sky130_fd_io__gpiov2_amux: 30000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808178 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808488 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808122 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808123 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808476 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180868 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180869 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808581 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808278 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808462 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808200 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_5595914180894 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfm1sd__example_55959141808258 geometry by factor of 2
+sky130_fd_io__amux_switch_1v2b: 10000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808563 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808251 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfm1sd2__example_55959141808561 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808267 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808266 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808633 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808322 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808321 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808320 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808294 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808325 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808323 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808291 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__pfet_01v8__example_55959141808640 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808194 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808328 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808327 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808272 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808271 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808143 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808275 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808276 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808297 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808296 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808295 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808293 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808292 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808300 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808299 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__nfet_01v8__example_55959141808308 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_55959141808301 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808302 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180854 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808368 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808625 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808373 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808374 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808398 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808397 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808396 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808395 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808401 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808399 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808269 geometry by factor of 2
+sky130_fd_io__gpio_odrvr_subv2: 10000 rects
+sky130_fd_io__gpio_odrvr_subv2: 20000 rects
+sky130_fd_io__gpio_odrvr_subv2: 30000 rects
+Scaled magic input cell sky130_fd_pr__via_pol1_centered__example_559591418080 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180832 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180852 geometry by factor of 2
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 10000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 20000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 30000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418083 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418082 geometry by factor of 2
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 10000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 20000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 30000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418085 geometry by factor of 2
+sky130_fd_io__gpio_pddrvr_strong_slowv2: 10000 rects
+sky130_fd_io__gpio_pddrvr_strong_slowv2: 20000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808655 geometry by factor of 2
+sky130_fd_io__top_ground_lvc_wpad: 10000 rects
+sky130_fd_io__top_ground_lvc_wpad: 20000 rects
+sky130_fd_io__top_ground_lvc_wpad: 30000 rects
+sky130_fd_io__top_ground_lvc_wpad: 40000 rects
+sky130_fd_io__top_ground_lvc_wpad: 50000 rects
+sky130_fd_io__top_ground_lvc_wpad: 60000 rects
+sky130_fd_io__top_ground_lvc_wpad: 70000 rects
+sky130_fd_io__top_ground_lvc_wpad: 80000 rects
+sky130_fd_io__top_ground_lvc_wpad: 90000 rects
+sky130_fd_io__top_ground_lvc_wpad: 100000 rects
+sky130_fd_io__top_ground_lvc_wpad: 110000 rects
+sky130_fd_io__top_ground_lvc_wpad: 120000 rects
+sky130_fd_io__top_ground_lvc_wpad: 130000 rects
+sky130_fd_io__top_ground_lvc_wpad: 140000 rects
+sky130_fd_io__top_ground_lvc_wpad: 150000 rects
+sky130_fd_io__top_ground_lvc_wpad: 160000 rects
+sky130_fd_io__top_ground_lvc_wpad: 170000 rects
+sky130_fd_io__top_ground_lvc_wpad: 180000 rects
+sky130_fd_io__top_ground_lvc_wpad: 190000 rects
+sky130_fd_io__top_ground_lvc_wpad: 200000 rects
+sky130_fd_io__top_ground_lvc_wpad: 210000 rects
+sky130_fd_io__top_ground_lvc_wpad: 220000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808684 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808686 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808685 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__gnd2gnd_tap geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808683 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dftpl1s2__example_55959141808702 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808682 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dftpl1s2__example_55959141808694 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808681 geometry by factor of 2
+sky130_fd_io__overlay_vssio_hvc: 10000 rects
+sky130_fd_io__hvc_clampv2: 10000 rects
+sky130_fd_io__hvc_clampv2: 20000 rects
+sky130_fd_io__hvc_clampv2: 30000 rects
+sky130_fd_io__hvc_clampv2: 40000 rects
+sky130_fd_io__hvc_clampv2: 50000 rects
+sky130_fd_io__hvc_clampv2: 60000 rects
+sky130_fd_io__hvc_clampv2: 70000 rects
+sky130_fd_io__hvc_clampv2: 80000 rects
+sky130_fd_io__hvc_clampv2: 90000 rects
+sky130_fd_io__hvc_clampv2: 100000 rects
+sky130_fd_io__hvc_clampv2: 110000 rects
+sky130_fd_io__hvc_clampv2: 120000 rects
+sky130_fd_io__hvc_clampv2: 130000 rects
+sky130_fd_io__hvc_clampv2: 140000 rects
+sky130_fd_io__hvc_clampv2: 150000 rects
+sky130_fd_io__hvc_clampv2: 160000 rects
+sky130_fd_io__hvc_clampv2: 170000 rects
+sky130_fd_io__hvc_clampv2: 180000 rects
+sky130_fd_io__hvc_clampv2: 190000 rects
+sky130_fd_io__hvc_clampv2: 200000 rects
+sky130_fd_io__hvc_clampv2: 210000 rects
+sky130_fd_io__hvc_clampv2: 220000 rects
+sky130_fd_io__hvc_clampv2: 230000 rects
+sky130_fd_io__hvc_clampv2: 240000 rects
+sky130_fd_io__hvc_clampv2: 250000 rects
+sky130_fd_io__hvc_clampv2: 260000 rects
+sky130_fd_io__hvc_clampv2: 270000 rects
+sky130_fd_io__hvc_clampv2: 280000 rects
+sky130_fd_io__top_power_lvc_wpad: 10000 rects
+sky130_fd_io__top_power_lvc_wpad: 20000 rects
+sky130_fd_io__top_power_lvc_wpad: 30000 rects
+sky130_fd_io__top_power_lvc_wpad: 40000 rects
+sky130_fd_io__top_power_lvc_wpad: 50000 rects
+sky130_fd_io__top_power_lvc_wpad: 60000 rects
+sky130_fd_io__top_power_lvc_wpad: 70000 rects
+sky130_fd_io__top_power_lvc_wpad: 80000 rects
+sky130_fd_io__top_power_lvc_wpad: 90000 rects
+sky130_fd_io__top_power_lvc_wpad: 100000 rects
+sky130_fd_io__top_power_lvc_wpad: 110000 rects
+sky130_fd_io__top_power_lvc_wpad: 120000 rects
+sky130_fd_io__top_power_lvc_wpad: 130000 rects
+sky130_fd_io__top_power_lvc_wpad: 140000 rects
+sky130_fd_io__top_power_lvc_wpad: 150000 rects
+sky130_fd_io__top_power_lvc_wpad: 160000 rects
+sky130_fd_io__top_power_lvc_wpad: 170000 rects
+sky130_fd_io__top_power_lvc_wpad: 180000 rects
+sky130_fd_io__top_power_lvc_wpad: 190000 rects
+sky130_fd_io__top_power_lvc_wpad: 200000 rects
+sky130_fd_io__top_power_lvc_wpad: 210000 rects
+sky130_fd_io__top_power_lvc_wpad: 220000 rects
+sky130_fd_io__top_power_lvc_wpad: 230000 rects
+sky130_fd_io__overlay_vddio_hvc: 10000 rects
+Processing timestamp mismatches: sky130_fd_sc_hd__tapvpwrvgnd_1, sky130_fd_sc_hd__buf_8, sky130_ef_sc_hd__decap_12, sky130_ef_io__vccd_lvc_clamped3_pad, sky130_ef_io__vssd_lvc_clamped3_pad, sky130_ef_io__vddio_hvc_clamped_pad, sky130_ef_io__disconnect_vdda_slice_5um, sky130_ef_io__vccd_lvc_clamped_pad, sky130_ef_io__vdda_hvc_clamped_pad, sky130_ef_io__vssio_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped_pad, sky130_ef_io__gpiov2_pad_wrapped, sky130_fd_sc_hd__fill_8, sky130_fd_sc_hd__fill_4, constant_block, sky130_fd_sc_hd__buf_16, sky130_fd_sc_hd__conb_1, sky130_fd_sc_hd__fill_1, sky130_fd_sc_hd__fill_2, sky130_fd_io__top_xres4v2, sky130_ef_io__vssa_hvc_clamped_pad, sky130_ef_io__com_bus_slice_10um, sky130_ef_io__com_bus_slice_5um, sky130_ef_io__com_bus_slice_1um, sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um, sky130_ef_io__corner_pad, sky130_ef_io__com_bus_slice_20um, gpio_control_power_routing, gpio_control_power_routing_right, gpio_control_power_routing_top, gpio_defaults_block_0801, sky130_fd_sc_hd__decap_3, sky130_fd_sc_hd__decap_4, sky130_fd_sc_hd__decap_12, sky130_fd_sc_hd__decap_6, sky130_fd_sc_hd__inv_12, mprj2_logic_high, mprj_logic_high, sky130_fd_sc_hd__decap_8, sky130_fd_sc_hvl__conb_1, mgmt_protect_hv, sky130_fd_sc_hvl__lsbufhv2lv_1, sky130_fd_sc_hvl__fill_2, sky130_fd_sc_hvl__fill_1, sky130_fd_sc_hd__bufbuf_8, sky130_fd_sc_hd__buf_6, sky130_fd_sc_hd__buf_4, sky130_fd_sc_hd__nand2_8, sky130_fd_sc_hd__nand2_4, sky130_fd_sc_hd__nand2_2, sky130_fd_sc_hd__nand2_1, sky130_fd_sc_hd__clkbuf_4, sky130_fd_sc_hd__clkbuf_8, sky130_fd_sc_hd__and2_1, sky130_fd_sc_hd__and2_2, sky130_fd_sc_hd__and2_4, sky130_fd_sc_hd__and3b_4, sky130_fd_sc_hd__and3b_2, sky130_fd_sc_hd__and3b_1, sky130_fd_sc_hd__and2b_4, sky130_fd_sc_hd__clkinv_2, sky130_fd_sc_hd__inv_2, sky130_fd_sc_hd__clkinv_8, sky130_fd_sc_hd__clkinv_4, sky130_fd_sc_hd__inv_4, sky130_fd_sc_hd__diode_2, sky130_fd_sc_hd__dfbbp_1, sky130_fd_sc_hd__inv_8, sky130_fd_sc_hd__nor2_2, sky130_fd_sc_hd__mux2_2, gpio_defaults_block_1801, gpio_defaults_block_0403, sky130_fd_sc_hd__o32a_2, sky130_fd_sc_hd__o21ba_2, sky130_fd_sc_hd__nand4b_2, sky130_fd_sc_hd__o2bb2a_2, sky130_fd_sc_hd__xor2_2, sky130_fd_sc_hd__a21boi_2, sky130_fd_sc_hd__nand3b_2, sky130_fd_sc_hd__o221a_2, sky130_fd_sc_hd__o22a_2, sky130_fd_sc_hd__o2111a_2, sky130_fd_sc_hd__a32o_2, sky130_fd_sc_hd__or2_2, sky130_fd_sc_hd__einvp_2, sky130_fd_sc_hd__einvn_8, sky130_fd_sc_hd__einvn_4, sky130_fd_sc_hd__clkinv_1, sky130_fd_sc_hd__einvp_1, sky130_fd_sc_hd__clkbuf_1, sky130_fd_sc_hd__clkbuf_2, sky130_fd_sc_hd__clkbuf_16, sky130_fd_sc_hd__dfrtp_2, sky130_fd_sc_hd__buf_2, sky130_fd_sc_hd__a22o_2, sky130_fd_sc_hd__a21o_2, sky130_fd_sc_hd__nand3_2, sky130_fd_sc_hd__o31a_2, sky130_fd_sc_hd__o21ai_2, sky130_fd_sc_hd__o211a_2, sky130_fd_sc_hd__and3_2, sky130_fd_sc_hd__nand2b_2, sky130_fd_sc_hd__a211o_2, sky130_fd_sc_hd__o21a_2, sky130_fd_sc_hd__a21oi_2, sky130_fd_sc_hd__and2b_2, sky130_fd_sc_hd__xnor2_2, sky130_fd_sc_hd__and4b_2, sky130_fd_sc_hd__nand4_2, sky130_fd_sc_hd__a31o_2, sky130_fd_sc_hd__inv_6, sky130_fd_sc_hd__a21o_4, sky130_fd_sc_hd__a21oi_4, sky130_fd_sc_hd__a221o_4, sky130_fd_sc_hd__a221oi_1, sky130_fd_sc_hd__and4_2, sky130_fd_sc_hd__o31a_4, sky130_fd_sc_hd__mux2_8, sky130_fd_sc_hd__o221a_4, sky130_fd_sc_hd__nor3_4, sky130_fd_sc_hd__xor2_1, sky130_fd_sc_hd__o21a_4, sky130_fd_sc_hd__nand3b_4, sky130_fd_sc_hd__and4b_4, sky130_fd_sc_hd__a31oi_4, sky130_fd_sc_hd__nand4b_4, sky130_fd_sc_hd__a2111oi_1, sky130_fd_sc_hd__nor3b_1, sky130_fd_sc_hd__o41a_1, sky130_fd_sc_hd__a311oi_2, sky130_fd_sc_hd__and2b_1, sky130_fd_sc_hd__a41o_1, sky130_fd_sc_hd__and4_1, sky130_fd_sc_hd__a31oi_1, sky130_fd_sc_hd__nand4b_1, sky130_fd_sc_hd__o2111a_1, sky130_fd_sc_hd__o211a_1, sky130_fd_sc_hd__o311a_1, sky130_fd_sc_hd__nand4_1, sky130_fd_sc_hd__a21boi_1, sky130_fd_sc_hd__o32a_1, sky130_fd_sc_hd__and3_1, sky130_fd_sc_hd__nand2b_4, sky130_fd_sc_hd__a2111o_2, sky130_fd_sc_hd__nor4_4, sky130_fd_sc_hd__a2111o_4, sky130_fd_sc_hd__nor4_2, sky130_fd_sc_hd__a2111o_1, sky130_fd_sc_hd__o221a_1, sky130_fd_sc_hd__nor2_8, sky130_fd_sc_hd__nor2_4, sky130_fd_sc_hd__a311o_1, sky130_fd_sc_hd__nand3_4, sky130_fd_sc_hd__and3_4, sky130_fd_sc_hd__and4bb_2, sky130_fd_sc_hd__and4bb_1, sky130_fd_sc_hd__and4b_1, sky130_fd_sc_hd__o21ba_1, sky130_fd_sc_hd__a211o_1, sky130_fd_sc_hd__a221o_2, sky130_fd_sc_hd__o2bb2a_1, sky130_fd_sc_hd__a21bo_1, sky130_fd_sc_hd__a211o_4, sky130_fd_sc_hd__a221o_1, sky130_fd_sc_hd__a22o_1, sky130_fd_sc_hd__a32o_1, sky130_fd_sc_hd__dfstp_4, sky130_fd_sc_hd__buf_12, sky130_fd_sc_hd__dlymetal6s2s_1, sky130_fd_sc_hd__dlygate4sd3_1, sky130_fd_sc_hd__dfrtp_1, sky130_fd_sc_hd__dfstp_2, sky130_fd_sc_hd__dfrtn_1, sky130_fd_sc_hd__dfrtp_4, sky130_fd_sc_hd__dfstp_1, sky130_fd_sc_hd__dfxtp_1, sky130_fd_sc_hd__mux2_1, sky130_fd_sc_hd__o31a_1, sky130_fd_sc_hd__a21o_1, sky130_fd_sc_hd__o31ai_1, sky130_fd_sc_hd__nor4_1, sky130_fd_sc_hd__nor3_1, sky130_fd_sc_hd__nor3_2, sky130_fd_sc_hd__a21oi_1, sky130_fd_sc_hd__nor2_1, sky130_fd_sc_hd__a2bb2o_1, sky130_fd_sc_hd__o21ai_1, sky130_fd_sc_hd__o22a_1, sky130_fd_sc_hd__nand2b_1, sky130_fd_sc_hd__o21a_1, sky130_fd_sc_hd__a31o_1, sky130_fd_sc_hd__nand3_1, sky130_fd_sc_hd__o2111ai_1, sky130_fd_sc_hd__xnor2_1, sky130_fd_sc_hd__mux2_4, gpio_defaults_block_1803, sky130_fd_sc_hd__and2_0, sky130_fd_sc_hd__o21ai_4, sky130_fd_sc_hd__or2_0, sky130_fd_sc_hd__dfbbn_2, sky130_fd_sc_hd__macro_sparecell, sky130_fd_sc_hd__nor3b_2, sky130_fd_sc_hd__o211ai_4, sky130_fd_sc_hd__a41oi_1, sky130_fd_sc_hd__o2bb2ai_1, sky130_fd_sc_hd__o31ai_2, sky130_fd_sc_hd__o2111ai_2, sky130_fd_sc_hd__nand4bb_1, sky130_fd_sc_hd__nand3b_1, sky130_fd_sc_hd__o21bai_1, alpha_B, alpha_4, alpha_5, alpha_7, alpha_8, sky130_fd_sc_hvl__diode_2, sky130_fd_sc_hvl__decap_4, sky130_fd_sc_hvl__decap_8.
+   Generating output for cell caravel_logo
+   Generating output for cell font_22
+   Generating output for cell font_73
+   Generating output for cell font_43
+   Generating output for cell font_49
+   Generating output for cell font_65
+   Generating output for cell font_68
+   Generating output for cell font_54
+   Generating output for cell font_67
+   Generating output for cell font_6E
+   Generating output for cell font_69
+   Generating output for cell font_6C
+   Generating output for cell font_61
+   Generating output for cell font_53
+   Generating output for cell caravel_motto
+   Generating output for cell font_79
+   Generating output for cell font_76
+   Generating output for cell font_74
+   Generating output for cell font_72
+   Generating output for cell font_70
+   Generating output for cell font_66
+   Generating output for cell font_63
+   Generating output for cell font_62
+   Generating output for cell font_57
+   Generating output for cell font_56
+   Generating output for cell font_50
+   Generating output for cell font_47
+   Generating output for cell font_44
+   Generating output for cell font_35
+   Generating output for cell font_32
+   Generating output for cell font_30
+   Generating output for cell font_29
+   Generating output for cell font_28
+   Generating output for cell font_20
+   Generating output for cell font_6F
+   Generating output for cell font_6B
+   Generating output for cell font_4F
+   Generating output for cell font_4B
+   Generating output for cell font_2D
+   Generating output for cell copyright_block
+   Generating output for cell open_source
+   Generating output for cell sky130_fd_sc_hvl__decap_8
+   Generating output for cell sky130_fd_sc_hvl__decap_4
+   Generating output for cell sky130_fd_sc_hvl__diode_2
+   Generating output for cell sky130_fd_sc_hvl__fill_1
+   Generating output for cell sky130_fd_sc_hvl__fill_2
+   Generating output for cell sky130_fd_sc_hvl__lsbufhv2lv_1
+   Generating output for cell xres_buf
+   Generating output for cell alpha_8
+   Generating output for cell alpha_7
+   Generating output for cell alpha_5
+   Generating output for cell alpha_4
+   Generating output for cell alpha_B
+   Generating output for cell alpha_0
+   Generating output for cell user_id_textblock
+   Generating output for cell sky130_fd_sc_hd__decap_6
+   Generating output for cell sky130_fd_sc_hd__decap_12
+   Generating output for cell sky130_fd_sc_hd__decap_4
+   Generating output for cell sky130_fd_sc_hd__decap_3
+   Generating output for cell sky130_fd_sc_hd__fill_2
+   Generating output for cell sky130_fd_sc_hd__fill_1
+   Generating output for cell sky130_fd_sc_hd__conb_1
+   Generating output for cell sky130_fd_sc_hd__tapvpwrvgnd_1
+   Generating output for cell gpio_defaults_block_1803
+   Generating output for cell sky130_fd_sc_hd__o21bai_1
+   Generating output for cell sky130_fd_sc_hd__nand3b_1
+   Generating output for cell sky130_fd_sc_hd__nand4bb_1
+   Generating output for cell sky130_fd_sc_hd__o2111ai_2
+   Generating output for cell sky130_fd_sc_hd__o31ai_2
+   Generating output for cell sky130_fd_sc_hd__o2bb2ai_1
+   Generating output for cell sky130_fd_sc_hd__a41oi_1
+   Generating output for cell sky130_fd_sc_hd__o211ai_4
+   Generating output for cell sky130_fd_sc_hd__nor3b_2
+   Generating output for cell sky130_fd_sc_hd__xnor2_1
+   Generating output for cell sky130_fd_sc_hd__o2111ai_1
+   Generating output for cell sky130_fd_sc_hd__nand3_1
+   Generating output for cell sky130_fd_sc_hd__a31o_1
+   Generating output for cell sky130_fd_sc_hd__o21a_1
+   Generating output for cell sky130_fd_sc_hd__nand2b_1
+   Generating output for cell sky130_fd_sc_hd__o22a_1
+   Generating output for cell sky130_fd_sc_hd__o21ai_1
+   Generating output for cell sky130_fd_sc_hd__a2bb2o_1
+   Generating output for cell sky130_fd_sc_hd__nor2_1
+   Generating output for cell sky130_fd_sc_hd__a21oi_1
+   Generating output for cell sky130_fd_sc_hd__nor3_2
+   Generating output for cell sky130_fd_sc_hd__nor3_1
+   Generating output for cell sky130_fd_sc_hd__nor4_1
+   Generating output for cell sky130_fd_sc_hd__o31ai_1
+   Generating output for cell sky130_fd_sc_hd__a21o_1
+   Generating output for cell sky130_fd_sc_hd__o31a_1
+   Generating output for cell sky130_fd_sc_hd__mux2_1
+   Generating output for cell sky130_fd_sc_hd__dfxtp_1
+   Generating output for cell sky130_fd_sc_hd__dfstp_1
+   Generating output for cell sky130_fd_sc_hd__dfrtp_4
+   Generating output for cell sky130_fd_sc_hd__dfrtn_1
+   Generating output for cell sky130_fd_sc_hd__dfstp_2
+   Generating output for cell sky130_fd_sc_hd__dfrtp_1
+   Generating output for cell sky130_fd_sc_hd__dlymetal6s2s_1
+   Generating output for cell sky130_fd_sc_hd__buf_12
+   Generating output for cell sky130_fd_sc_hd__o21a_2
+   Generating output for cell sky130_fd_sc_hd__nand2b_2
+   Generating output for cell sky130_fd_sc_hd__o21ai_2
+   Generating output for cell sky130_fd_sc_hd__buf_2
+   Generating output for cell sky130_fd_sc_hd__dfrtp_2
+   Generating output for cell sky130_fd_sc_hd__clkbuf_16
+   Generating output for cell sky130_fd_sc_hd__clkbuf_2
+   Generating output for cell sky130_fd_sc_hd__clkbuf_1
+   Generating output for cell sky130_fd_sc_hd__nor2_2
+   Generating output for cell sky130_fd_sc_hd__diode_2
+   Generating output for cell sky130_fd_sc_hd__inv_4
+   Generating output for cell sky130_fd_sc_hd__clkinv_4
+   Generating output for cell sky130_fd_sc_hd__inv_2
+   Generating output for cell sky130_fd_sc_hd__clkinv_2
+   Generating output for cell sky130_fd_sc_hd__and2_1
+   Generating output for cell sky130_fd_sc_hd__clkbuf_4
+   Generating output for cell sky130_fd_sc_hd__nand2_1
+   Generating output for cell sky130_fd_sc_hd__buf_4
+   Generating output for cell sky130_fd_sc_hd__decap_8
+   Generating output for cell sky130_ef_sc_hd__decap_12
+   Generating output for cell caravel_clocking
+   Generating output for cell sky130_fd_sc_hd__clkbuf_8
+   Generating output for cell buff_flash_clkrst
+   Generating output for cell sky130_fd_sc_hd__nand2_2
+   Generating output for cell sky130_fd_sc_hd__macro_sparecell
+   Generating output for cell sky130_fd_sc_hd__dfbbn_2
+   Generating output for cell sky130_fd_sc_hd__or2_0
+   Generating output for cell sky130_fd_sc_hd__o21ai_4
+   Generating output for cell sky130_fd_sc_hd__and2_0
+   Generating output for cell sky130_fd_sc_hd__mux2_4
+   Generating output for cell sky130_fd_sc_hd__dlygate4sd3_1
+   Generating output for cell sky130_fd_sc_hd__and2b_2
+   Generating output for cell sky130_fd_sc_hd__and3b_2
+   Generating output for cell sky130_fd_sc_hd__and2_2
+   Generating output for cell sky130_fd_sc_hd__buf_16
+   Generating output for cell gpio_logic_high
+   Generating output for cell gpio_control_block
+   Generating output for cell sky130_fd_sc_hd__dfstp_4
+   Generating output for cell sky130_fd_sc_hd__a32o_1
+   Generating output for cell sky130_fd_sc_hd__a22o_1
+   Generating output for cell sky130_fd_sc_hd__a221o_1
+   Generating output for cell sky130_fd_sc_hd__a211o_4
+   Generating output for cell sky130_fd_sc_hd__a21bo_1
+   Generating output for cell sky130_fd_sc_hd__o2bb2a_1
+   Generating output for cell sky130_fd_sc_hd__a221o_2
+   Generating output for cell sky130_fd_sc_hd__a211o_1
+   Generating output for cell sky130_fd_sc_hd__o21ba_1
+   Generating output for cell sky130_fd_sc_hd__and4b_1
+   Generating output for cell sky130_fd_sc_hd__and4bb_1
+   Generating output for cell sky130_fd_sc_hd__and4bb_2
+   Generating output for cell sky130_fd_sc_hd__and3_4
+   Generating output for cell sky130_fd_sc_hd__nand3_4
+   Generating output for cell sky130_fd_sc_hd__a311o_1
+   Generating output for cell sky130_fd_sc_hd__nor2_4
+   Generating output for cell sky130_fd_sc_hd__nor2_8
+   Generating output for cell sky130_fd_sc_hd__o221a_1
+   Generating output for cell sky130_fd_sc_hd__a2111o_1
+   Generating output for cell sky130_fd_sc_hd__nor4_2
+   Generating output for cell sky130_fd_sc_hd__a2111o_4
+   Generating output for cell sky130_fd_sc_hd__nor4_4
+   Generating output for cell sky130_fd_sc_hd__a2111o_2
+   Generating output for cell sky130_fd_sc_hd__nand2b_4
+   Generating output for cell sky130_fd_sc_hd__and3_1
+   Generating output for cell sky130_fd_sc_hd__o32a_1
+   Generating output for cell sky130_fd_sc_hd__a21boi_1
+   Generating output for cell sky130_fd_sc_hd__nand4_1
+   Generating output for cell sky130_fd_sc_hd__o311a_1
+   Generating output for cell sky130_fd_sc_hd__o211a_1
+   Generating output for cell sky130_fd_sc_hd__o2111a_1
+   Generating output for cell sky130_fd_sc_hd__nand4b_1
+   Generating output for cell sky130_fd_sc_hd__a31oi_1
+   Generating output for cell sky130_fd_sc_hd__and4_1
+   Generating output for cell sky130_fd_sc_hd__a41o_1
+   Generating output for cell sky130_fd_sc_hd__and2b_1
+   Generating output for cell sky130_fd_sc_hd__a311oi_2
+   Generating output for cell sky130_fd_sc_hd__o41a_1
+   Generating output for cell sky130_fd_sc_hd__nor3b_1
+   Generating output for cell sky130_fd_sc_hd__a2111oi_1
+   Generating output for cell sky130_fd_sc_hd__nand4b_4
+   Generating output for cell sky130_fd_sc_hd__a31oi_4
+   Generating output for cell sky130_fd_sc_hd__and4b_4
+   Generating output for cell sky130_fd_sc_hd__nand3b_4
+   Generating output for cell sky130_fd_sc_hd__o21a_4
+   Generating output for cell sky130_fd_sc_hd__xor2_1
+   Generating output for cell sky130_fd_sc_hd__nor3_4
+   Generating output for cell sky130_fd_sc_hd__o221a_4
+   Generating output for cell sky130_fd_sc_hd__mux2_8
+   Generating output for cell sky130_fd_sc_hd__o31a_4
+   Generating output for cell sky130_fd_sc_hd__and4_2
+   Generating output for cell sky130_fd_sc_hd__a221oi_1
+   Generating output for cell sky130_fd_sc_hd__a221o_4
+   Generating output for cell sky130_fd_sc_hd__a21oi_4
+   Generating output for cell sky130_fd_sc_hd__a21o_4
+   Generating output for cell sky130_fd_sc_hd__inv_6
+   Generating output for cell sky130_fd_sc_hd__a31o_2
+   Generating output for cell sky130_fd_sc_hd__nand4_2
+   Generating output for cell sky130_fd_sc_hd__and4b_2
+   Generating output for cell sky130_fd_sc_hd__xnor2_2
+   Generating output for cell sky130_fd_sc_hd__a21oi_2
+   Generating output for cell sky130_fd_sc_hd__a211o_2
+   Generating output for cell sky130_fd_sc_hd__and3_2
+   Generating output for cell sky130_fd_sc_hd__o211a_2
+   Generating output for cell sky130_fd_sc_hd__o31a_2
+   Generating output for cell sky130_fd_sc_hd__nand3_2
+   Generating output for cell sky130_fd_sc_hd__a21o_2
+   Generating output for cell sky130_fd_sc_hd__a22o_2
+   Generating output for cell sky130_fd_sc_hd__mux2_2
+   Generating output for cell sky130_fd_sc_hd__and2b_4
+   Generating output for cell sky130_fd_sc_hd__and3b_1
+   Generating output for cell sky130_fd_sc_hd__and3b_4
+   Generating output for cell sky130_fd_sc_hd__and2_4
+   Generating output for cell sky130_fd_sc_hd__nand2_4
+   Generating output for cell sky130_fd_sc_hd__nand2_8
+   Generating output for cell sky130_fd_sc_hd__buf_6
+   Generating output for cell sky130_fd_sc_hd__buf_8
+   Generating output for cell housekeeping
+   Generating output for cell sky130_fd_sc_hd__einvp_1
+   Generating output for cell sky130_fd_sc_hd__clkinv_1
+   Generating output for cell sky130_fd_sc_hd__einvn_4
+   Generating output for cell sky130_fd_sc_hd__einvn_8
+   Generating output for cell sky130_fd_sc_hd__einvp_2
+   Generating output for cell sky130_fd_sc_hd__or2_2
+   Generating output for cell sky130_fd_sc_hd__a32o_2
+   Generating output for cell sky130_fd_sc_hd__o2111a_2
+   Generating output for cell sky130_fd_sc_hd__o22a_2
+   Generating output for cell sky130_fd_sc_hd__o221a_2
+   Generating output for cell sky130_fd_sc_hd__nand3b_2
+   Generating output for cell sky130_fd_sc_hd__a21boi_2
+   Generating output for cell sky130_fd_sc_hd__xor2_2
+   Generating output for cell sky130_fd_sc_hd__o2bb2a_2
+   Generating output for cell sky130_fd_sc_hd__nand4b_2
+   Generating output for cell sky130_fd_sc_hd__o21ba_2
+   Generating output for cell sky130_fd_sc_hd__o32a_2
+   Generating output for cell sky130_fd_sc_hd__clkinv_8
+   Generating output for cell digital_pll
+   Generating output for cell user_id_programming
+   Generating output for cell simple_por
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__buf_8".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+   Generating output for cell mgmt_core_wrapper
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__and4_4".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__or4bb_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__o211a_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__o41ai_4".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nand4_4".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__and4bb_4".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__nor4b_1".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o41ai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__nor4b_4".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__ebufn_4".
+Reading "sky130_fd_sc_hd__dlxtp_1".
+Reading "sky130_fd_sc_hd__dlclkp_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__inv_1".
+Reading "sky130_fd_sc_hd__nor4b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "RAM256".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__o2111a_4".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__a311o_2".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a311oi_4".
+Reading "sky130_fd_sc_hd__o32ai_4".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__a22oi_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__a211oi_4".
+Reading "sky130_fd_sc_hd__nor3b_4".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__o2bb2a_4".
+Reading "sky130_fd_sc_hd__o21bai_4".
+Reading "sky130_fd_sc_hd__o311ai_1".
+Reading "sky130_fd_sc_hd__a32oi_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_2".
+Reading "sky130_fd_sc_hd__o311ai_4".
+Reading "sky130_fd_sc_hd__o2bb2ai_4".
+Reading "sky130_fd_sc_hd__o31ai_4".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__a32oi_4".
+Reading "sky130_fd_sc_hd__a211oi_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o221ai_1".
+Reading "sky130_fd_sc_hd__clkinv_16".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a311oi_1".
+Reading "sky130_fd_sc_hd__o311ai_2".
+Reading "sky130_fd_sc_hd__a32oi_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_2".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_4".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__a41oi_2".
+Reading "sky130_fd_sc_hd__o22ai_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__a41oi_4".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a311o_4".
+Reading "sky130_fd_sc_hd__o32ai_1".
+Reading "sky130_fd_sc_hd__a21boi_4".
+Reading "sky130_fd_sc_hd__o32ai_2".
+Reading "sky130_fd_sc_hd__a21bo_2".
+Reading "RAM128".
+Reading "mgmt_core_wrapper".
+   Generating output for cell gpio_defaults_block_0403
+   Generating output for cell gpio_defaults_block_1801
+   Generating output for cell sky130_fd_sc_hd__inv_8
+   Generating output for cell sky130_fd_sc_hd__dfbbp_1
+   Generating output for cell spare_logic_block
+   Generating output for cell sky130_fd_sc_hd__bufbuf_8
+   Generating output for cell sky130_fd_sc_hvl__conb_1
+   Generating output for cell mgmt_protect_hv
+   Generating output for cell mprj_logic_high
+   Generating output for cell mprj2_logic_high
+   Generating output for cell sky130_fd_sc_hd__inv_12
+   Generating output for cell mgmt_protect
+   Generating output for cell gpio_defaults_block_0801
+   Generating output for cell gpio_control_power_routing_top
+   Generating output for cell gpio_control_power_routing_right
+   Generating output for cell gpio_control_power_routing
+   Generating output for cell caravel_power_routing
+   Generating output for cell user_project_wrapper
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__nand4_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__bufbuf_16".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__a211oi_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__or2b_1".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__or3_4".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__or3_2".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__or2b_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__or4_2".
+Reading "cawb".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_22".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_39".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_18".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_13".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_38".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_12".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_21".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_33".
+Reading "sky130_fd_bd_sram__openram_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_addr_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_addr_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wmask_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_15".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_29".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_28".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_10".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_11".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sli_dactive".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand2_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m12_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m12_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_17".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m4_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m4_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_16".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_15".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_6".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_5".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_18".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_delay_chain".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_14".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w0_740_sactive_dactive".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand3_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_13".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand3".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m23_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m23_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_12".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_11".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m40_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m40_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_10".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m13_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m13_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_9".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_7".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_rw".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_5".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dff_buf_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m39_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m39_w2_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_19".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver_6".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_control_logic_r".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_cr_4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_data_dff".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinvbuf".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_decoder".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_14".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec_0".
+Reading "sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_wordline_driver_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_16".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_19".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv_dec".
+Reading "sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and3_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_20".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode3x8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_and2_dec".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_predecode2x4".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_hierarchical_decoder".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_address_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_address".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_27".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_26".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_25".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_24".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_nmos_m1_w2_880_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array_0".
+Reading "sky130_fd_bd_sram__openram_sense_amp".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_sense_amp_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_23".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pmos_m1_w0_550_sli_dli".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_1".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_data_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_column_mux_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pinv".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pdriver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pnand2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_pand2".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_write_mask_and_array".
+Reading "sky130_fd_bd_sram__openram_write_driver".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_write_driver_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_precharge_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_port_data".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_8".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_contact_7".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_row_cap_array".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_col_cap_array_0".
+Reading "sky130_fd_bd_sram__openram_dp_cell_dummy".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_dummy_array".
+Reading "sky130_fd_bd_sram__openram_dp_cell_replica".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_column_0".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_column".
+Reading "sky130_fd_bd_sram__openram_dp_cell".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_bitcell_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_replica_bitcell_array".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8_bank".
+Reading "sky130_sram_1kbyte_1rw1r_32x256_8".
+Reading "rb".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__or2b_2".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__a211oi_4".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__o2bb2a_4".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__o211a_4".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__a22oi_4".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__nor3b_4".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__a311o_4".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__or4_4".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__nor4b_1".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__a311oi_4".
+Reading "sky130_fd_sc_hd__a311o_2".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__o22ai_2".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__a21bo_4".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__o31ai_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__o32a_4".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__o21ba_4".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a21boi_4".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__a2bb2oi_4".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__nor2b_1".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__or4bb_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__o311ai_4".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__inv_1".
+Reading "sky130_fd_sc_hd__a311oi_1".
+Reading "sky130_fd_sc_hd__a32oi_4".
+Reading "sky130_fd_sc_hd__o21bai_4".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__nor2b_4".
+Reading "sky130_fd_sc_hd__and4_4".
+Reading "sky130_fd_sc_hd__and4bb_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nor2b_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nor4b_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__a21bo_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o221ai_2".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__o2111a_4".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__a32oi_2".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "minisoc".
+Reading "user_project_wrapper".
+   Generating output for cell sky130_ef_io__com_bus_slice_20um
+   Generating output for cell sky130_fd_io__corner_bus_overlay
+   Generating output for cell sky130_ef_io__corner_pad
+   Generating output for cell sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um
+   Generating output for cell sky130_ef_io__com_bus_slice_1um
+   Generating output for cell sky130_ef_io__com_bus_slice_5um
+   Generating output for cell sky130_ef_io__com_bus_slice_10um
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_5595914180851
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808664
+   Generating output for cell sky130_fd_io__sio_clamp_pcap_4x5
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808680
+   Generating output for cell sky130_fd_io__esd_rcclamp_nfetcap
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808336
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808666
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808665
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808678
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808679
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808677
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180839
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808667
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808671
+   Generating output for cell sky130_fd_pr__hvdftpl1s2__example_55959141808672
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808673
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808663
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808660
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808670
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808668
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808675
+   Generating output for cell sky130_fd_pr__hvdftpl1s2__example_55959141808676
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808674
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808662
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808661
+   Generating output for cell sky130_fd_pr__via_l1m1__example_559591418084
+   Generating output for cell sky130_fd_pr__genrivetdlring__example_559591418082
+   Generating output for cell sky130_fd_pr__gendlring__example_559591418081
+   Generating output for cell sky130_fd_pr__padplhp__example_559591418080
+   Generating output for cell sky130_fd_io__pad_esd
+   Generating output for cell sky130_fd_io__com_bus_slice
+   Generating output for cell sky130_fd_io__com_bus_hookup
+   Generating output for cell sky130_fd_io__com_busses_esd
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808669
+   Generating output for cell sky130_fd_io__top_ground_hvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vssa_hvc
+   Generating output for cell sky130_ef_io__hvc_vdda_overlay
+   Generating output for cell sky130_ef_io__vssa_hvc_clamped_pad
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808719
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808767
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808765
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808764
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808720
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808718
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808717
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808716
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808243
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808723
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808722
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180890
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808721
+   Generating output for cell sky130_fd_io__xres_inv_hysv2
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180838
+   Generating output for cell sky130_fd_io__tk_tie_r_out_esd
+   Generating output for cell sky130_fd_io__res250_sub_small
+   Generating output for cell sky130_fd_io__res250only_small
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808264
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180858
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180833
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180864
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808715
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180863
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180862
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_55959141808288
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180859
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808289
+   Generating output for cell sky130_fd_io__com_res_weak_v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808274
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808728
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808727
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808726
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808725
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808724
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808554
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808553
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808552
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808551
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808402
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808350
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808261
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808260
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808259
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808400
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808372
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808326
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808290
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808128
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808127
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180897
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180819
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808555
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808147
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808157
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808156
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808155
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808154
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808153
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808152
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808151
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808150
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808149
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808148
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808158
+   Generating output for cell sky130_fd_io__signal_5_sym_hv_local_5term
+   Generating output for cell sky130_fd_io__gpio_buf_localesdv2
+   Generating output for cell sky130_fd_pr__via_pol1__example_559591418083
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808137
+   Generating output for cell sky130_fd_pr__dfl1sd__example_559591418086
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808371
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808370
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808369
+   Generating output for cell sky130_fd_io__hvsbt_inv_x1
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808316
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808421
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808385
+   Generating output for cell sky130_fd_pr__dfl1sd__example_559591418088
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808422
+   Generating output for cell sky130_fd_io__hvsbt_inv_x2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808612
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808616
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808615
+   Generating output for cell sky130_fd_io__hvsbt_inv_x4
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_5595914180848
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180849
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808766
+   Generating output for cell sky130_fd_pr__via_m2m3__example_55959141808714
+   Generating output for cell sky130_fd_pr__via_pol1_centered__example_559591418081
+   Generating output for cell sky130_fd_io__tk_em2s_cdns_55959141808652
+   Generating output for cell sky130_fd_io__tk_em2o_cdns_55959141808653
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_5595914180812
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_5595914180811
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418086
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418084
+   Generating output for cell sky130_fd_pr__hvdftpm1s2__example_55959141808659
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808658
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808657
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808202
+   Generating output for cell sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2
+   Generating output for cell sky130_fd_io__gpio_pudrvr_strong_axres4v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808273
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808740
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808739
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808738
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808737
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808736
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808735
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808734
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808733
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808732
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808731
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808730
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808752
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808751
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808750
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808749
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808748
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808747
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808746
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808745
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808744
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808743
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808742
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808741
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808324
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808270
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808187
+   Generating output for cell sky130_fd_pr__res_generic_nd__example_55959141808755
+   Generating output for cell sky130_fd_pr__res_generic_nd__example_55959141808754
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808338
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808337
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808763
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808700
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808559
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808762
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808729
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759
+   Generating output for cell sky130_fd_io__xres_p_em1c_cdns_55959141808753
+   Generating output for cell sky130_fd_io__xres2v2_rcfilter_lpfv2
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180860
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180861
+   Generating output for cell sky130_fd_io__com_res_weak_bentbigres
+   Generating output for cell sky130_fd_io__com_res_weak
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180857
+   Generating output for cell sky130_fd_pr__hvdftpm1s2__example_55959141808649
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808651
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808650
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808648
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808646
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808647
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808645
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808378
+   Generating output for cell sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2
+   Generating output for cell sky130_fd_io__gpio_pddrvr_strong_xres4v2
+   Generating output for cell sky130_fd_io__top_gpio_pad
+   Generating output for cell sky130_fd_io__com_busses
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808768
+   Generating output for cell sky130_fd_pr__res_bent_nd__example_55959141808769
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808787
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808786
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808782
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808785
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808449
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808784
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808452
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808783
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808781
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808780
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808779
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808233
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180827
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808778
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_5595914180835
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808777
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808776
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808775
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808242
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808774
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180829
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808773
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808237
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808772
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808771
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808770
+   Generating output for cell sky130_fd_io__tap_1
+   Generating output for cell sky130_fd_io__inv_1
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_559591418085
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_559591418089
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_559591418087
+   Generating output for cell sky130_fd_io__hvsbt_nand2
+   Generating output for cell sky130_fd_io__xres4v2_in_buf
+   Generating output for cell sky130_fd_io__top_xres4v2
+   Generating output for cell sky130_fd_sc_hd__fill_4
+   Generating output for cell sky130_fd_sc_hd__fill_8
+   Generating output for cell constant_block
+   Generating output for cell sky130_fd_io__res75only_small
+   Generating output for cell sky130_fd_io__com_bus_slice_m4
+   Generating output for cell sky130_fd_io__overlay_gpiov2_m4
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808420
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808419
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808418
+   Generating output for cell sky130_fd_io__hvsbt_nor
+   Generating output for cell sky130_fd_io__hvsbt_nand2v2
+   Generating output for cell sky130_fd_io__gpiov2_ictl_logic
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808190
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808611
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180811
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808549
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808548
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808191
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808189
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808517
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808518
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808610
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808609
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180815
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180816
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808608
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808604
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808533
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808529
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180884
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808230
+   Generating output for cell sky130_fd_io__gpiov2_in_buf
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808537
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808106
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808481
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808607
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808504
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808600
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808550
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808528
+   Generating output for cell sky130_fd_io__gpiov2_ipath_hvls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808595
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180825
+   Generating output for cell sky130_fd_io__gpiov2_inbuf_lvinv_x1
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180812
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808599
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808598
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808597
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808596
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808547
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808546
+   Generating output for cell sky130_fd_io__gpiov2_ipath_lvls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808606
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180875
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808605
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808540
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808603
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808602
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808601
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808535
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808527
+   Generating output for cell sky130_fd_io__gpiov2_vcchib_in_buf
+   Generating output for cell sky130_fd_io__gpiov2_ibuf_se
+   Generating output for cell sky130_fd_io__gpiov2_buf_localesd
+   Generating output for cell sky130_fd_io__gpiov2_ipath
+   Generating output for cell sky130_fd_io__tk_em2s_cdns_55959141808438
+   Generating output for cell sky130_fd_io__tk_em2o_cdns_55959141808439
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180882
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180881
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180880
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180879
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808430
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180823
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_5595914180822
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_5595914180813
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808624
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808510
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808623
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808622
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808621
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808620
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808619
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808618
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808116
+   Generating output for cell sky130_fd_io__com_ctl_lsv2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808394
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808298
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808440
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180878
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808434
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808435
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808433
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808432
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808102
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808431
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808115
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808429
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808428
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808100
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808140
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808427
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808426
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808280
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808425
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808424
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808423
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808306
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808383
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808382
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808380
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808379
+   Generating output for cell sky130_fd_io__com_ctl_ls_v2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808617
+   Generating output for cell sky130_fd_io__com_ctl_ls_en_1_v2
+   Generating output for cell sky130_fd_io__com_ctl_ls_1v2
+   Generating output for cell sky130_fd_io__gpiov2_ctl_lsbank
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808614
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808613
+   Generating output for cell sky130_fd_io__hvsbt_inv_x8v2
+   Generating output for cell sky130_fd_io__hvsbt_inv_x8
+   Generating output for cell sky130_fd_io__com_ctl_ls
+   Generating output for cell sky130_fd_io__com_ctl_hldv2
+   Generating output for cell sky130_fd_io__gpiov2_ctl
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808178
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808591
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808594
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808593
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808488
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808592
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808586
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808122
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808123
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808477
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808476
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808475
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808589
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808570
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808569
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_lshv2hv
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808588
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808587
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_lshv2hv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808590
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808460
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808468
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808467
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808466
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808465
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808464
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808463
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_ls
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_inv_1
+   Generating output for cell sky130_fd_io__gpiov2_amux_ls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808573
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808572
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808579
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808578
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808577
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808576
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808566
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180868
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180869
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808565
+   Generating output for cell sky130_fd_io__gpiov2_amx_pucsd_inv
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808441
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808571
+   Generating output for cell sky130_fd_io__gpiov2_amx_inv4
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808567
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808568
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_lshv2hv
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_lshv2hv2
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808581
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808580
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808278
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808462
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808583
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808582
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808498
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808497
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808496
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_ls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808574
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808575
+   Generating output for cell sky130_fd_io__amx_inv1
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr
+   Generating output for cell sky130_fd_io__xor2_1
+   Generating output for cell sky130_fd_io__nor2_1
+   Generating output for cell sky130_fd_io__nand2_1
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808200
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808457
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808451
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808450
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_5595914180894
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808584
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808455
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808447
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808445
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808248
+   Generating output for cell sky130_fd_io__gpiov2_amux_nand5
+   Generating output for cell sky130_fd_pr__dfm1sd__example_55959141808258
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808585
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808446
+   Generating output for cell sky130_fd_io__gpiov2_amux_nand4
+   Generating output for cell sky130_fd_io__gpiov2_amux_decoder
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_logic
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808563
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808564
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808562
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808251
+   Generating output for cell sky130_fd_pr__dfm1sd2__example_55959141808561
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808560
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808558
+   Generating output for cell sky130_fd_io__amux_switch_1v2b
+   Generating output for cell sky130_fd_io__gpiov2_amux
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808416
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808417
+   Generating output for cell sky130_fd_io__hvsbt_xorv2
+   Generating output for cell sky130_fd_io__hvsbt_xor
+   Generating output for cell sky130_fd_io__com_ctl_ls_octl
+   Generating output for cell sky130_fd_io__gpiov2_octl
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808267
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808266
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808642
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808184
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808141
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808643
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808183
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808139
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808636
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808635
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808634
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808633
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808632
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808630
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808638
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808637
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong_nr3
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808629
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808628
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808627
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808626
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808354
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808631
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong_nr2
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180888
+   Generating output for cell sky130_fd_io__gpiov2_octl_mux
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808322
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808321
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808320
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808294
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808325
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808323
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808291
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808641
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808640
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808639
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808348
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808347
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808194
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808346
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808345
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808344
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808343
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808334
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808333
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808332
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808331
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808330
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808329
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808304
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808134
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808328
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808327
+   Generating output for cell sky130_fd_io__com_pdpredrvr_pbiasv2
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808272
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808271
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808143
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808142
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808101
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808144
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_5595914180899
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808275
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808276
+   Generating output for cell sky130_fd_pr__res_generic_po__example_55959141808286
+   Generating output for cell sky130_fd_pr__res_generic_po__example_55959141808285
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808284
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808283
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808644
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808287
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808282
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808281
+   Generating output for cell sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a
+   Generating output for cell sky130_fd_io__gpiov2_pupredrvr_strong_nd2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808297
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808296
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808295
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808293
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808292
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808300
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808299
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808319
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808318
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808317
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808315
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808314
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808313
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808312
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808311
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808310
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808309
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808308
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808307
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808305
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808303
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_55959141808301
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808302
+   Generating output for cell sky130_fd_io__feascom_pupredrvr_nbiasv2
+   Generating output for cell sky130_fd_io__gpio_pupredrvr_strongv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808361
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808360
+   Generating output for cell sky130_fd_io__feas_com_pupredrvr_weak
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180854
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808363
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808362
+   Generating output for cell sky130_fd_io__com_pupredrvr_strong_slowv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808366
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808365
+   Generating output for cell sky130_fd_io__com_pdpredrvr_weakv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808364
+   Generating output for cell sky130_fd_io__com_pdpredrvr_strong_slowv2
+   Generating output for cell sky130_fd_io__gpiov2_obpredrvr
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808368
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808625
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808373
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808374
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808393
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808392
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808391
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808390
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808389
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808388
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808387
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808386
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808384
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808381
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808377
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808376
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808375
+   Generating output for cell sky130_fd_io__gpio_dat_lsv2
+   Generating output for cell sky130_fd_io__gpio_dat_ls_1v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808398
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808397
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808396
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808395
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808401
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808399
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808269
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808410
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808409
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808408
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808407
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808406
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808405
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808404
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808403
+   Generating output for cell sky130_fd_io__com_cclat
+   Generating output for cell sky130_fd_io__com_opath_datoev2
+   Generating output for cell sky130_fd_io__gpiov2_octl_dat
+   Generating output for cell sky130_fd_pr__via_pol1_centered__example_559591418080
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180832
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180856
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180855
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180853
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180852
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418083
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418082
+   Generating output for cell sky130_fd_io__nfet_con_diff_wo_abt_270v2
+   Generating output for cell sky130_fd_io__gpiov2_pddrvr_strong
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418085
+   Generating output for cell sky130_fd_io__pfet_con_diff_wo_abt_270v2
+   Generating output for cell sky130_fd_io__gpio_pudrvr_strongv2
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180850
+   Generating output for cell sky130_fd_io__gpio_pddrvr_weakv2
+   Generating output for cell sky130_fd_io__gpio_pddrvr_strong_slowv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808656
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808655
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808654
+   Generating output for cell sky130_fd_io__com_pudrvr_weakv2
+   Generating output for cell sky130_fd_io__com_pudrvr_strong_slowv2
+   Generating output for cell sky130_fd_io__gpio_odrvr_subv2
+   Generating output for cell sky130_fd_io__gpio_odrvrv2
+   Generating output for cell sky130_fd_io__gpio_opathv2
+   Generating output for cell sky130_fd_io__top_gpiov2
+   Generating output for cell sky130_fd_io__overlay_gpiov2
+   Generating output for cell sky130_ef_io__gpiov2_pad
+   Generating output for cell sky130_ef_io__gpiov2_pad_wrapped
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808691
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808687
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808684
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808686
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808685
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808683
+   Generating output for cell sky130_fd_io__gnd2gnd_strap
+   Generating output for cell sky130_fd_io__gnd2gnd_tap
+   Generating output for cell sky130_fd_io__gnd2gnd_diff
+   Generating output for cell sky130_fd_io__gnd2gnd_sub_dnwl
+   Generating output for cell sky130_fd_io__gnd2gnd_120x2_lv_isosub
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808690
+   Generating output for cell sky130_fd_pr__dftpl1s2__example_55959141808702
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808705
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808682
+   Generating output for cell sky130_fd_pr__dftpl1s2__example_55959141808694
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808693
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808681
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808688
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808699
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808698
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808697
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808696
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808695
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808704
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808703
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808701
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808689
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808692
+   Generating output for cell sky130_fd_io__top_ground_lvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vssd_lvc
+   Generating output for cell sky130_ef_io__lvc_vccdx_overlay
+   Generating output for cell sky130_ef_io__vssd_lvc_clamped_pad
+   Generating output for cell sky130_fd_io__overlay_vssio_hvc
+   Generating output for cell sky130_ef_io__hvc_vssio_overlay
+   Generating output for cell sky130_ef_io__vssio_hvc_clamped_pad
+   Generating output for cell sky130_fd_io__hvc_clampv2
+   Generating output for cell sky130_fd_io__top_power_hvc_wpadv2
+   Generating output for cell sky130_fd_io__overlay_vdda_hvc
+   Generating output for cell sky130_ef_io__vdda_hvc_clamped_pad
+   Generating output for cell sky130_fd_io__top_power_lvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vccd_lvc
+   Generating output for cell sky130_ef_io__vccd_lvc_clamped_pad
+   Generating output for cell sky130_ef_io__disconnect_vdda_slice_5um
+   Generating output for cell sky130_fd_io__overlay_vddio_hvc
+   Generating output for cell sky130_ef_io__hvc_vddio_overlay
+   Generating output for cell sky130_ef_io__vddio_hvc_clamped_pad
+   Generating output for cell chip_io_gpio_connects
+   Generating output for cell sky130_ef_io__lvc_vccdy_overlay
+   Generating output for cell sky130_ef_io__vssd_lvc_clamped3_pad
+   Generating output for cell sky130_ef_io__vccd_lvc_clamped3_pad
+   Generating output for cell chip_io
+   Generating output for cell gpio_signal_buffering
+   Generating output for cell caravel
diff --git a/tapeout/logs/tools.info b/tapeout/logs/tools.info
new file mode 100644
index 0000000..a1b78f5
--- /dev/null
+++ b/tapeout/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.12
+Magic: 8.3.346
\ No newline at end of file
diff --git a/tapeout/logs/uncompress.log b/tapeout/logs/uncompress.log
new file mode 100644
index 0000000..d21177f
--- /dev/null
+++ b/tapeout/logs/uncompress.log
@@ -0,0 +1,3 @@
+make: Nothing to be done for `check-env'.
+gds/user_project_wrapper.gds.gz -> gds/user_project_wrapper.gds
+All files are uncompressed!
diff --git a/tapeout/outputs/gds/caravel_0008754b.gds.gz.00.split b/tapeout/outputs/gds/caravel_0008754b.gds.gz.00.split
new file mode 100644
index 0000000..e4a1fec
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008754b.gds.gz.00.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0008754b.gds.gz.01.split b/tapeout/outputs/gds/caravel_0008754b.gds.gz.01.split
new file mode 100644
index 0000000..5ae4b7a
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008754b.gds.gz.01.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0008754b.gds.gz.02.split b/tapeout/outputs/gds/caravel_0008754b.gds.gz.02.split
new file mode 100644
index 0000000..6763398
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008754b.gds.gz.02.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0008754b.gds.gz.03.split b/tapeout/outputs/gds/caravel_0008754b.gds.gz.03.split
new file mode 100644
index 0000000..0fcf84a
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008754b.gds.gz.03.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0008754b.gds.gz.04.split b/tapeout/outputs/gds/caravel_0008754b.gds.gz.04.split
new file mode 100644
index 0000000..64c8f8f
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008754b.gds.gz.04.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0008754b.gds.gz.05.split b/tapeout/outputs/gds/caravel_0008754b.gds.gz.05.split
new file mode 100644
index 0000000..9ab8b24
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008754b.gds.gz.05.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0008754b.gds.gz.06.split b/tapeout/outputs/gds/caravel_0008754b.gds.gz.06.split
new file mode 100644
index 0000000..d29ea78
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0008754b.gds.gz.06.split
Binary files differ
diff --git a/tapeout/outputs/klayout_beol_report.xml b/tapeout/outputs/klayout_beol_report.xml
new file mode 100644
index 0000000..41d856a
--- /dev/null
+++ b/tapeout/outputs/klayout_beol_report.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/sky130A_mr.drc'</generator>
+ <top-cell>caravel_0008754b</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008754b</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_beol_report.xml.summary b/tapeout/outputs/klayout_beol_report.xml.summary
new file mode 100644
index 0000000..79b5c11
--- /dev/null
+++ b/tapeout/outputs/klayout_beol_report.xml.summary
@@ -0,0 +1,72 @@
+       0 791_m1.4 : min. m1 enclosure of mcon : 0.03um
+       0 ct.1: non-ring mcon should be rectangular
+       0 ct.1_a : minimum width of mcon : 0.17um
+       0 ct.1_b : maximum length of mcon : 0.17um
+       0 ct.2 : min. mcon spacing : 0.19um
+       0 ct.4 : mcon should covered by li
+       0 li.1 : min. li width : 0.17um
+       0 li.3 : min. li spacing : 0.17um
+       0 li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um
+       0 li.6 : min. li area : 0.0561um²
+       0 m1.1 : min. m1 width : 0.14um
+       0 m1.2 : min. m1 spacing : 0.14um
+       0 m1.3ab : min. 3um.m1 spacing m1 : 0.28um
+       0 m1.4 : mcon periphery must be enclosed by m1
+       0 m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um
+       0 m1.4a_a : mcon periph must be enclosed by met1 for specific cells
+       0 m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um
+       0 m1.6 : min. m1 area : 0.083um²
+       0 m1.7 : min. m1 with holes area : 0.14um²
+       0 m2.1 : min. m2 width : 0.14um
+       0 m2.2 : min. m2 spacing : 0.14um
+       0 m2.3ab : min. 3um.m2 spacing m2 : 0.28um
+       0 m2.4 : min. m2 enclosure of via : 0.055um
+       0 m2.4_a : via in periphery must be enclosed by met2
+       0 m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um
+       0 m2.6 : min. m2 area : 0.0676um²
+       0 m2.7 : min. m2 holes area : 0.14um²
+       0 m3.1 : min. m3 width : 0.3um
+       0 m3.2 : min. m3 spacing : 0.3um
+       0 m3.3cd : min. 3um.m3 spacing m3 : 0.4um
+       0 m3.4 : min. m3 enclosure of via2 : 0.065um
+       0 m3.4_a : via2 must be enclosed by met3
+       0 m4.1 : min. m4 width : 0.3um
+       0 m4.2 : min. m4 spacing : 0.3um
+       0 m4.3 : min. m4 enclosure of via3 : 0.065um
+       0 m4.3_a : via3 must be enclosed by met4
+       0 m4.4a : min. m4 area : 0.240um²
+       0 m4.5ab : min. 3um.m4 spacing m4 : 0.4um
+       0 m5.1 : min. m5 width : 1.6um
+       0 m5.2 : min. m5 spacing : 1.6um
+       0 m5.3 : min. m5 enclosure of via4 : 0.31um
+       0 m5.3_a : via must be enclosed by m5
+       0 m5.4 : min. m5 area : 4.0um²
+       0 pad.2 : min. pad spacing : 1.27um
+       0 via2.1a : via2 outside of moduleCut should be rectangular
+       0 via2.1a_a : min. width of via2 outside of moduleCut : 0.2um
+       0 via2.1a_b : maximum length of via2 : 0.2um
+       0 via2.2 : min. via2 spacing : 0.2um
+       0 via2.4 : min. m2 enclosure of via2 : 0.04um
+       0 via2.4_a : via must be enclosed by met2
+       0 via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um
+       0 via3.1 : via3 outside of moduleCut should be rectangular
+       0 via3.1_a : min. width of via3 outside of moduleCut : 0.2um
+       0 via3.1_b : maximum length of via3 : 0.2um
+       0 via3.2 : min. via3 spacing : 0.2um
+       0 via3.4 : min. m3 enclosure of via3 : 0.06um
+       0 via3.4_a : non-ring via3 must be enclosed by met3
+       0 via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um
+       0 via4.1 : via4 outside of moduleCut should be rectangular
+       0 via4.1_a : min. width of via4 outside of moduleCut : 0.8um
+       0 via4.1_b : maximum length of via4 : 0.8um
+       0 via4.2 : min. via4 spacing : 0.8um
+       0 via4.4 : min. m4 enclosure of via4 : 0.19um
+       0 via4.4_a : m4 must enclose all via4
+       0 via.1a : via outside of moduleCut should be rectangular
+       0 via.1a_a : min. width of via outside of moduleCut : 0.15um
+       0 via.1a_b : maximum length of via : 0.15um
+       0 via.2 : min. via spacing : 0.17um
+       0 via.4a : min. m1 enclosure of 0.15um via : 0.055um
+       0 via.4a_a : 0.15um via must be enclosed by met1
+       0 via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um
+       0 total error(s) among 71 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/klayout_feol_report.xml b/tapeout/outputs/klayout_feol_report.xml
new file mode 100644
index 0000000..b0e4791
--- /dev/null
+++ b/tapeout/outputs/klayout_feol_report.xml
@@ -0,0 +1,375 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/sky130A_mr.drc'</generator>
+ <top-cell>caravel_0008754b</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.11</name>
+   <description>capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.11</name>
+   <description>cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008754b</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_feol_report.xml.summary b/tapeout/outputs/klayout_feol_report.xml.summary
new file mode 100644
index 0000000..2a7a007
--- /dev/null
+++ b/tapeout/outputs/klayout_feol_report.xml.summary
@@ -0,0 +1,60 @@
+       0 cap2m.1 : min. cap2m width : 1.0um
+       0 cap2m.2a : min. cap2m spacing : 0.84um
+       0 cap2m.2b : min. cap2m spacing : 1.2um
+       0 cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um
+       0 cap2m.3 : min. m4 enclosure of cap2m : 0.14um
+       0 cap2m.3_a : min. m4 enclosure of cap2m : 0.14um
+       0 cap2m.4 : min. cap2m enclosure of via4 : 0.14um
+       0 cap2m.5 : min. cap2m spacing to via4 : 0.14um
+       0 cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um
+       0 capm.1 : min. capm width : 1.0um
+       0 capm.2a : min. capm spacing : 0.84um
+       0 capm.2b : min. capm spacing : 1.2um
+       0 capm.2b_a : min. spacing of m3_bot_plate : 1.2um
+       0 capm.3 : min. capm and m3 enclosure of m3 : 0.14um
+       0 capm.3_a : min. m3 enclosure of capm : 0.14um
+       0 capm.4 : min. capm enclosure of via3 : 0.14um
+       0 capm.5 : min. capm spacing to via3 : 0.14um
+       0 capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um
+       0 difftap.1 : min. diff width across areaid:ce : 0.15um
+       0 difftap.1_a : min. diff width in periphery : 0.15um
+       0 difftap.1_b : min. tap width across areaid:ce : 0.15um
+       0 difftap.1_c : min. tap width in periphery : 0.15um
+       0 difftap.3 : min. difftap spacing : 0.27um
+       0 dnwell.2 : min. dnwell width : 3.0um
+       0 hvi.1 : min. hvi width : 0.6um
+       0 hvi.2a : min. hvi spacing : 0.7um
+       0 hvntm.1 : min. hvntm width : 0.7um
+       0 hvntm.2 : min. hvntm spacing : 0.7um
+       0 hvtp.1 : min. hvtp width : 0.38um
+       0 hvtp.2 : min. hvtp spacing : 0.38um
+       0 hvtr.1 : min. hvtr width : 0.38um
+       0 hvtr.2 : min. hvtr spacing : 0.38um
+       0 hvtr.2_a : hvtr must not overlap hvtp
+       0 licon.1 : licon should be rectangle
+       0 licon.1_a/b : minimum/maximum width of licon : 0.17um
+       0 licon.13 : min. difftap licon spacing to npc : 0.09um
+       0 licon.13_a : licon of diffTap in periphery must not overlap npc
+       0 licon.17 : Licons may not overlap both poly and (diff or tap)
+       0 lvtn.1a : min. lvtn width : 0.38um
+       0 lvtn.2 : min. lvtn spacing : 0.38um
+       0 ncm.1 : min. ncm width : 0.38um
+       0 ncm.2a : min. ncm spacing : 0.38um
+       0 npc.1 : min. npc width : 0.27um
+       0 npc.2 : min. npc spacing, should be manually merged if less than : 0.27um
+       0 nsd.1 : min. nsdm width : 0.38um
+       0 nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um
+       0 nwell.1 : min. nwell width : 0.84um
+       0 nwell.2a : min. nwell spacing (merged if less) : 1.27um
+       0 nwell.6 : min enclosure of nwellHole by dnwell : 1.03um
+       0 poly.1a : min. poly width : 0.15um
+       0 poly.2 : min. poly spacing : 0.21um
+       0 psd.1 : min. psdm width : 0.38um
+       0 psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um
+       0 rpm.1a : min. rpm width : 1.27um
+       0 rpm.2 : min. rpm spacing : 0.84um
+       0 tunm.1 : min. tunm width : 0.41um
+       0 tunm.2 : min. tunm spacing : 0.5um
+       0 urpm.1a : min. rpm width : 1.27um
+       0 urpm.2 : min. rpm spacing : 0.84um
+       0 total error(s) among 59 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/klayout_fom_density_report.xml b/tapeout/outputs/klayout_fom_density_report.xml
new file mode 100644
index 0000000..0d92710
--- /dev/null
+++ b/tapeout/outputs/klayout_fom_density_report.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/fom_density.drc'</generator>
+ <top-cell>caravel_0008754b</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008754b</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_fom_density_report.xml.summary b/tapeout/outputs/klayout_fom_density_report.xml.summary
new file mode 100644
index 0000000..8d461a0
--- /dev/null
+++ b/tapeout/outputs/klayout_fom_density_report.xml.summary
@@ -0,0 +1 @@
+       0 total error(s) among 0 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/klayout_met_density_report.xml b/tapeout/outputs/klayout_met_density_report.xml
new file mode 100644
index 0000000..8536f27
--- /dev/null
+++ b/tapeout/outputs/klayout_met_density_report.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/met_density.lydrc'</generator>
+ <top-cell>caravel_0008754b</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0008754b</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_met_density_report.xml.summary b/tapeout/outputs/klayout_met_density_report.xml.summary
new file mode 100644
index 0000000..8d461a0
--- /dev/null
+++ b/tapeout/outputs/klayout_met_density_report.xml.summary
@@ -0,0 +1 @@
+       0 total error(s) among 0 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/mag/.magicrc b/tapeout/outputs/mag/.magicrc
new file mode 100755
index 0000000..7ec699d
--- /dev/null
+++ b/tapeout/outputs/mag/.magicrc
@@ -0,0 +1,109 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# Allow override of PDK path from environment variable PDKPATH.  Failing
+# that, fall back on definitions of PDK_ROOT and PDK.  If either of those
+# fails, substitute a default.  If PDKPATH has been specified, then get
+# PDK_VARIANT from the tail of PDKPATH.
+
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+    if {[catch {set PDK_ROOT $env(PDK_ROOT)}]} {
+	set PDK_ROOT /usr/share/pdk
+    }
+    if {[catch {set PDK_VARIANT $env(PDK)}]} {
+	set PDK_VARIANT sky130A
+    }
+    set PDKPATH ${PDK_ROOT}/${PDK_VARIANT}
+} else {
+    set PDK_VARIANT [file tail ${PDKPATH}]
+}
+
+puts stdout "Sourcing design .magicrc for technology $PDK_VARIANT ..."
+
+# Put grid on 0.005 pitch.  This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+    scalegrid 1 2
+}
+
+drc off
+drc euclidean on
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/${PDK_VARIANT}.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/${PDK_VARIANT}.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/${PDK_VARIANT}-BindKeys
+
+# set units to lambda grid 
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+   set MAGTYPE maglef
+}
+
+	path search [concat "../$MAGTYPE" [path search]]
+
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+    addpath ${PDKPATH}/libs.ref/mag/sky130_ml_xx_hd
+} else {
+    addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_ml_xx_hd/mag
+}
+
+addpath hexdigits
+addpath ../subcells/simple_por/mag
+
+# add path to GDS cells
+
+# add path to IP from catalog.  This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space.  Defined in the PDK script.
+catch {magic::query_my_projects}
diff --git a/tapeout/outputs/mag/caravel.mag b/tapeout/outputs/mag/caravel.mag
new file mode 100644
index 0000000..73990e8
--- /dev/null
+++ b/tapeout/outputs/mag/caravel.mag
@@ -0,0 +1,83878 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1667299471
+<< checkpaint >>
+rect -1260 -1260 718860 1038860
+<< metal1 >>
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+rect 366542 1027868 366548 1027880
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+<< via4 >>
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+<< metal5 >>
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+rect 362138 41702 403120 41938
+rect 361860 41660 403120 41702
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+rect 403444 41300 403764 41660
+rect 365356 41258 402476 41300
+rect 365356 41022 365398 41258
+rect 365634 41022 402198 41258
+rect 402434 41022 402476 41258
+rect 365356 40980 402476 41022
+rect 402800 40980 403764 41300
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+rect 412460 41660 421796 41980
+rect 422120 41938 423820 41980
+rect 422120 41702 422162 41938
+rect 422398 41702 423820 41938
+rect 422120 41660 423820 41702
+rect 424972 41938 441668 41980
+rect 424972 41702 425014 41938
+rect 425250 41702 441390 41938
+rect 441626 41702 441668 41938
+rect 424972 41660 441668 41702
+rect 442084 41660 450684 41980
+rect 412460 41300 412780 41660
+rect 411724 40980 412780 41300
+rect 421476 41300 421796 41660
+rect 423500 41300 423820 41660
+rect 442084 41300 442404 41660
+rect 421476 40980 422440 41300
+rect 423500 40980 442404 41300
+rect 450364 41300 450684 41660
+rect 451100 41938 463932 41980
+rect 451100 41702 463654 41938
+rect 463890 41702 463932 41938
+rect 451100 41660 463932 41702
+rect 451100 41300 451420 41660
+rect 450364 40980 451420 41300
+rect 422120 40620 422440 40980
+rect 422120 40578 425292 40620
+rect 422120 40342 425014 40578
+rect 425250 40342 425292 40578
+rect 422120 40300 425292 40342
+rect 80222 6811 92390 18976
+rect 136713 7143 144150 18309
+rect 187640 6598 200160 19088
+rect 243266 6167 254146 19620
+rect 296240 6598 308760 19088
+rect 351040 6598 363560 19088
+rect 405840 6598 418360 19088
+rect 460640 6598 473160 19088
+rect 515440 6598 527960 19088
+rect 570422 6811 582590 18976
+rect 624222 6811 636390 18976
+use caravel_logo  caravel_logo
+timestamp 1638586901
+transform 1 0 269370 0 1 5100
+box -2520 0 15000 15560
+use caravel_motto  caravel_motto
+timestamp 1637698310
+transform 1 0 -54372 0 1 -4446
+box 373080 14838 395618 19242
+use caravel_power_routing  caravel_power_routing
+timestamp 1666994345
+transform 1 0 0 0 1 0
+box 6022 30806 711814 1031696
+use caravel_clocking  clock_ctrl
+timestamp 1666097791
+transform 1 0 626764 0 1 55284
+box 136 496 20000 20000
+use copyright_block  copyright_block
+timestamp 1665519328
+transform 1 0 149582 0 1 16298
+box -262 -10348 35048 2764
+use buff_flash_clkrst  flash_clkrst_buffers
+timestamp 1665682149
+transform 1 0 458400 0 1 47600
+box 330 0 7699 5000
+use gpio_control_block  gpio_control_bidir_1\[0\]
+timestamp 1666126335
+transform -1 0 710203 0 1 121000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_1\[1\]
+timestamp 1666126335
+transform -1 0 710203 0 1 166200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_2\[0\]
+timestamp 1666126335
+transform 1 0 7631 0 1 289000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_2\[1\]
+timestamp 1666126335
+transform 1 0 7631 0 1 245800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_bidir_2\[2\]
+timestamp 1666126335
+transform 1 0 7631 0 1 202600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[0\]
+timestamp 1666126335
+transform -1 0 710203 0 1 523800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[1\]
+timestamp 1666126335
+transform -1 0 710203 0 1 568800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[2\]
+timestamp 1666126335
+transform -1 0 710203 0 1 614000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[3\]
+timestamp 1666126335
+transform -1 0 710203 0 1 659000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[4\]
+timestamp 1666126335
+transform -1 0 710203 0 1 704200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[5\]
+timestamp 1666126335
+transform -1 0 710203 0 1 749200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[6\]
+timestamp 1666126335
+transform -1 0 710203 0 1 927600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[7\]
+timestamp 1666126335
+transform 0 1 549200 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[8\]
+timestamp 1666126335
+transform 0 1 497800 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[9\]
+timestamp 1666126335
+transform 0 1 420800 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1\[10\]
+timestamp 1666126335
+transform 0 1 353400 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[0\]
+timestamp 1666126335
+transform -1 0 710203 0 1 211200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[1\]
+timestamp 1666126335
+transform -1 0 710203 0 1 256400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[2\]
+timestamp 1666126335
+transform -1 0 710203 0 1 301400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[3\]
+timestamp 1666126335
+transform -1 0 710203 0 1 346400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[4\]
+timestamp 1666126335
+transform -1 0 710203 0 1 391600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_1a\[5\]
+timestamp 1666126335
+transform -1 0 710203 0 1 479800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[0\]
+timestamp 1666126335
+transform 0 1 303000 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[1\]
+timestamp 1666126335
+transform 0 1 251400 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[2\]
+timestamp 1666126335
+transform 0 1 200000 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[3\]
+timestamp 1666126335
+transform 0 1 148600 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[4\]
+timestamp 1666126335
+transform 0 1 97200 -1 0 1030077
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[5\]
+timestamp 1666126335
+transform 1 0 7631 0 1 931200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[6\]
+timestamp 1666126335
+transform 1 0 7631 0 1 805400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[7\]
+timestamp 1666126335
+transform 1 0 7631 0 1 762200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[8\]
+timestamp 1666126335
+transform 1 0 7631 0 1 719000
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[9\]
+timestamp 1666126335
+transform 1 0 7631 0 1 675800
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[10\]
+timestamp 1666126335
+transform 1 0 7631 0 1 632600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[11\]
+timestamp 1666126335
+transform 1 0 7631 0 1 589400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[12\]
+timestamp 1666126335
+transform 1 0 7631 0 1 546200
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[13\]
+timestamp 1666126335
+transform 1 0 7631 0 1 418600
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[14\]
+timestamp 1666126335
+transform 1 0 7631 0 1 375400
+box 872 416 34000 13000
+use gpio_control_block  gpio_control_in_2\[15\]
+timestamp 1666126335
+transform 1 0 7631 0 1 332200
+box 872 416 34000 13000
+use gpio_defaults_block_1803 gpio_defaults_block_0 ~/caravel_top_level/mag
+timestamp 1666360185
+transform -1 0 709467 0 1 134000
+box -38 0 6018 2224
+use gpio_defaults_block_1803 gpio_defaults_block_1
+timestamp 1666360185
+transform -1 0 709467 0 1 179200
+box -38 0 6018 2224
+use gpio_defaults_block_0403 gpio_defaults_block_2
+timestamp 1666360185
+transform -1 0 709467 0 1 224200
+box -38 0 6018 2224
+use gpio_defaults_block_0801 gpio_defaults_block_3
+timestamp 1666360185
+transform -1 0 709467 0 1 269400
+box -38 0 6018 2224
+use gpio_defaults_block_0403 gpio_defaults_block_4
+timestamp 1666360185
+transform -1 0 709467 0 1 314400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_5
+timestamp 1666360185
+transform -1 0 709467 0 1 359400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_6
+timestamp 1666360185
+transform -1 0 709467 0 1 404600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_7
+timestamp 1666360185
+transform -1 0 709467 0 1 492800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_8
+timestamp 1666360185
+transform -1 0 709467 0 1 536800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_9
+timestamp 1666360185
+transform -1 0 709467 0 1 581800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_10
+timestamp 1666360185
+transform -1 0 709467 0 1 627000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_11
+timestamp 1666360185
+transform -1 0 709467 0 1 672000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_12
+timestamp 1666360185
+transform -1 0 709467 0 1 717200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_13
+timestamp 1666360185
+transform -1 0 709467 0 1 762200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_14
+timestamp 1666360185
+transform -1 0 709467 0 1 940600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_15
+timestamp 1666360185
+transform 0 1 562194 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_16
+timestamp 1666360185
+transform 0 1 510794 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_17
+timestamp 1666360185
+transform 0 1 433794 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_18
+timestamp 1666360185
+transform 0 1 366394 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_19
+timestamp 1666360185
+transform 0 1 315994 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_20
+timestamp 1666360185
+transform 0 1 264394 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_21
+timestamp 1666360185
+transform 0 1 212994 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_22
+timestamp 1666360185
+transform 0 1 161594 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_23
+timestamp 1666360185
+transform 0 1 110194 -1 0 1029341
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_24
+timestamp 1666360185
+transform 1 0 8367 0 1 944200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_25
+timestamp 1666360185
+transform 1 0 8367 0 1 818400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_26
+timestamp 1666360185
+transform 1 0 8367 0 1 775200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_27
+timestamp 1666360185
+transform 1 0 8367 0 1 732000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_28
+timestamp 1666360185
+transform 1 0 8367 0 1 688800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_29
+timestamp 1666360185
+transform 1 0 8367 0 1 645600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_30
+timestamp 1666360185
+transform 1 0 8367 0 1 602400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_31
+timestamp 1666360185
+transform 1 0 8367 0 1 559200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_32
+timestamp 1666360185
+transform 1 0 8367 0 1 431600
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_33
+timestamp 1666360185
+transform 1 0 8367 0 1 388400
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_34
+timestamp 1666360185
+transform 1 0 8367 0 1 345200
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_35
+timestamp 1666360185
+transform 1 0 8367 0 1 302000
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_36
+timestamp 1666360185
+transform 1 0 8367 0 1 258800
+box -38 0 6018 2224
+use gpio_defaults_block_1801 gpio_defaults_block_37
+timestamp 1666360185
+transform 1 0 8367 0 1 215600
+box -38 0 6018 2224
+use housekeeping  housekeeping
+timestamp 1666084955
+transform 1 0 592434 0 1 100002
+box 0 0 74046 110190
+use mgmt_protect  mgmt_buffers
+timestamp 1666987233
+transform 1 0 128180 0 1 232036
+box 1066 -400 424400 32400
+use user_project_wrapper  mprj
+timestamp 1637147503
+transform 1 0 65308 0 1 278718
+box -8726 -7654 592650 711590
+use open_source  open_source
+timestamp 1666123577
+transform 1 0 206098 0 1 2054
+box 752 5164 29030 16242
+use chip_io  padframe
+timestamp 1666101711
+transform 1 0 0 0 1 0
+box 0 0 717600 1037600
+use digital_pll  pll
+timestamp 1666101174
+transform 1 0 628146 0 1 80944
+box 0 0 20000 15000
+use simple_por  por
+timestamp 1650914729
+transform 1 0 650146 0 -1 55282
+box -52 -62 11344 8684
+use xres_buf  rstb_level
+timestamp 1649268499
+transform -1 0 145710 0 -1 50488
+box 374 -400 3540 3800
+use gpio_signal_buffering  sigbuf
+timestamp 1666028385
+transform 1 0 0 0 1 0
+box 39992 41960 677583 997915
+use mgmt_core_wrapper  soc
+timestamp 1668034664
+transform 1 0 52034 0 1 53002
+box -156 0 524096 164000
+use spare_logic_block  spare_logic\[0\]
+timestamp 1638030917
+transform 1 0 88632 0 1 232528
+box 0 0 9000 9000
+use spare_logic_block  spare_logic\[1\]
+timestamp 1638030917
+transform 1 0 108632 0 1 232528
+box 0 0 9000 9000
+use spare_logic_block  spare_logic\[2\]
+timestamp 1638030917
+transform 1 0 640874 0 1 220592
+box 0 0 9000 9000
+use spare_logic_block  spare_logic\[3\]
+timestamp 1638030917
+transform 1 0 578632 0 1 232528
+box 0 0 9000 9000
+use user_id_textblock  user_id_textblock
+timestamp 1608324878
+transform 1 0 96272 0 1 6890
+box -656 1508 33720 10344
+use user_id_programming  user_id_value
+timestamp 1650371074
+transform 1 0 656624 0 1 88126
+box 0 0 7109 7077
+<< labels >>
+flabel metal5 s 187640 6598 200160 19088 0 FreeSans 16000 0 0 0 clock
+port 1 nsew signal input
+flabel metal5 s 351040 6598 363560 19088 0 FreeSans 16000 0 0 0 flash_clk
+port 2 nsew signal output
+flabel metal5 s 296240 6598 308760 19088 0 FreeSans 16000 0 0 0 flash_csb
+port 3 nsew signal output
+flabel metal5 s 405840 6598 418360 19088 0 FreeSans 16000 0 0 0 flash_io0
+port 4 nsew signal output
+flabel metal5 s 460640 6598 473160 19088 0 FreeSans 16000 0 0 0 flash_io1
+port 5 nsew signal output
+flabel metal5 s 515440 6598 527960 19088 0 FreeSans 16000 0 0 0 gpio
+port 6 nsew signal bidirectional
+flabel metal5 s 698512 101240 711002 113760 0 FreeSans 16000 0 0 0 mprj_io[0]
+port 7 nsew signal bidirectional
+flabel metal5 s 698512 684440 711002 696960 0 FreeSans 16000 0 0 0 mprj_io[10]
+port 8 nsew signal bidirectional
+flabel metal5 s 698512 729440 711002 741960 0 FreeSans 16000 0 0 0 mprj_io[11]
+port 9 nsew signal bidirectional
+flabel metal5 s 698512 774440 711002 786960 0 FreeSans 16000 0 0 0 mprj_io[12]
+port 10 nsew signal bidirectional
+flabel metal5 s 698512 863640 711002 876160 0 FreeSans 16000 0 0 0 mprj_io[13]
+port 11 nsew signal bidirectional
+flabel metal5 s 698512 952840 711002 965360 0 FreeSans 16000 0 0 0 mprj_io[14]
+port 12 nsew signal bidirectional
+flabel metal5 s 628240 1018512 640760 1031002 0 FreeSans 16000 0 0 0 mprj_io[15]
+port 13 nsew signal bidirectional
+flabel metal5 s 526440 1018512 538960 1031002 0 FreeSans 16000 0 0 0 mprj_io[16]
+port 14 nsew signal bidirectional
+flabel metal5 s 475040 1018512 487560 1031002 0 FreeSans 16000 0 0 0 mprj_io[17]
+port 15 nsew signal bidirectional
+flabel metal5 s 386040 1018512 398560 1031002 0 FreeSans 16000 0 0 0 mprj_io[18]
+port 16 nsew signal bidirectional
+flabel metal5 s 284240 1018512 296760 1031002 0 FreeSans 16000 0 0 0 mprj_io[19]
+port 17 nsew signal bidirectional
+flabel metal5 s 698512 146440 711002 158960 0 FreeSans 16000 0 0 0 mprj_io[1]
+port 18 nsew signal bidirectional
+flabel metal5 s 232640 1018512 245160 1031002 0 FreeSans 16000 0 0 0 mprj_io[20]
+port 19 nsew signal bidirectional
+flabel metal5 s 181240 1018512 193760 1031002 0 FreeSans 16000 0 0 0 mprj_io[21]
+port 20 nsew signal bidirectional
+flabel metal5 s 129840 1018512 142360 1031002 0 FreeSans 16000 0 0 0 mprj_io[22]
+port 21 nsew signal bidirectional
+flabel metal5 s 78440 1018512 90960 1031002 0 FreeSans 16000 0 0 0 mprj_io[23]
+port 22 nsew signal bidirectional
+flabel metal5 s 6598 956440 19088 968960 0 FreeSans 16000 0 0 0 mprj_io[24]
+port 23 nsew signal bidirectional
+flabel metal5 s 6598 786640 19088 799160 0 FreeSans 16000 0 0 0 mprj_io[25]
+port 24 nsew signal bidirectional
+flabel metal5 s 6598 743440 19088 755960 0 FreeSans 16000 0 0 0 mprj_io[26]
+port 25 nsew signal bidirectional
+flabel metal5 s 6598 700240 19088 712760 0 FreeSans 16000 0 0 0 mprj_io[27]
+port 26 nsew signal bidirectional
+flabel metal5 s 6598 657040 19088 669560 0 FreeSans 16000 0 0 0 mprj_io[28]
+port 27 nsew signal bidirectional
+flabel metal5 s 6598 613840 19088 626360 0 FreeSans 16000 0 0 0 mprj_io[29]
+port 28 nsew signal bidirectional
+flabel metal5 s 698512 191440 711002 203960 0 FreeSans 16000 0 0 0 mprj_io[2]
+port 29 nsew signal bidirectional
+flabel metal5 s 6598 570640 19088 583160 0 FreeSans 16000 0 0 0 mprj_io[30]
+port 30 nsew signal bidirectional
+flabel metal5 s 6598 527440 19088 539960 0 FreeSans 16000 0 0 0 mprj_io[31]
+port 31 nsew signal bidirectional
+flabel metal5 s 6598 399840 19088 412360 0 FreeSans 16000 0 0 0 mprj_io[32]
+port 32 nsew signal bidirectional
+flabel metal5 s 6598 356640 19088 369160 0 FreeSans 16000 0 0 0 mprj_io[33]
+port 33 nsew signal bidirectional
+flabel metal5 s 6598 313440 19088 325960 0 FreeSans 16000 0 0 0 mprj_io[34]
+port 34 nsew signal bidirectional
+flabel metal5 s 6598 270240 19088 282760 0 FreeSans 16000 0 0 0 mprj_io[35]
+port 35 nsew signal bidirectional
+flabel metal5 s 6598 227040 19088 239560 0 FreeSans 16000 0 0 0 mprj_io[36]
+port 36 nsew signal bidirectional
+flabel metal5 s 6598 183840 19088 196360 0 FreeSans 16000 0 0 0 mprj_io[37]
+port 37 nsew signal bidirectional
+flabel metal5 s 698512 236640 711002 249160 0 FreeSans 16000 0 0 0 mprj_io[3]
+port 38 nsew signal bidirectional
+flabel metal5 s 698512 281640 711002 294160 0 FreeSans 16000 0 0 0 mprj_io[4]
+port 39 nsew signal bidirectional
+flabel metal5 s 698512 326640 711002 339160 0 FreeSans 16000 0 0 0 mprj_io[5]
+port 40 nsew signal bidirectional
+flabel metal5 s 698512 371840 711002 384360 0 FreeSans 16000 0 0 0 mprj_io[6]
+port 41 nsew signal bidirectional
+flabel metal5 s 698512 549040 711002 561560 0 FreeSans 16000 0 0 0 mprj_io[7]
+port 42 nsew signal bidirectional
+flabel metal5 s 698512 594240 711002 606760 0 FreeSans 16000 0 0 0 mprj_io[8]
+port 43 nsew signal bidirectional
+flabel metal5 s 698512 639240 711002 651760 0 FreeSans 16000 0 0 0 mprj_io[9]
+port 44 nsew signal bidirectional
+flabel metal5 s 136713 7143 144150 18309 0 FreeSans 16000 0 0 0 resetb
+port 45 nsew signal input
+flabel metal5 s 6167 70054 19620 80934 0 FreeSans 16000 0 0 0 vccd
+port 46 nsew power input
+flabel metal5 s 697980 909666 711433 920546 0 FreeSans 16000 0 0 0 vccd1
+port 47 nsew power input
+flabel metal5 s 6167 914054 19620 924934 0 FreeSans 16000 0 0 0 vccd2
+port 48 nsew power input
+flabel metal5 s 624222 6811 636390 18976 0 FreeSans 16000 0 0 0 vdda
+port 49 nsew power input
+flabel metal5 s 698624 819822 710789 831990 0 FreeSans 16000 0 0 0 vdda1
+port 50 nsew power input
+flabel metal5 s 698624 505222 710789 517390 0 FreeSans 16000 0 0 0 vdda1_2
+port 51 nsew power input
+flabel metal5 s 6811 484410 18976 496578 0 FreeSans 16000 0 0 0 vdda2
+port 52 nsew power input
+flabel metal5 s 6811 111610 18976 123778 0 FreeSans 16000 0 0 0 vddio
+port 53 nsew power input
+flabel metal5 s 6811 871210 18976 883378 0 FreeSans 16000 0 0 0 vddio_2
+port 54 nsew power input
+flabel metal5 s 80222 6811 92390 18976 0 FreeSans 16000 0 0 0 vssa
+port 55 nsew ground input
+flabel metal5 s 577010 1018624 589178 1030789 0 FreeSans 16000 0 0 0 vssa1
+port 56 nsew ground input
+flabel metal5 s 698624 417022 710789 429190 0 FreeSans 16000 0 0 0 vssa1_2
+port 57 nsew ground input
+flabel metal5 s 6811 829010 18976 841178 0 FreeSans 16000 0 0 0 vssa2
+port 58 nsew ground input
+flabel metal5 s 243266 6167 254146 19620 0 FreeSans 16000 0 0 0 vssd
+port 59 nsew ground input
+flabel metal5 s 697980 461866 711433 472746 0 FreeSans 16000 0 0 0 vssd1
+port 60 nsew ground input
+flabel metal5 s 6167 442854 19620 453734 0 FreeSans 16000 0 0 0 vssd2
+port 61 nsew ground input
+flabel metal5 s 570422 6811 582590 18976 0 FreeSans 16000 0 0 0 vssio
+port 62 nsew ground input
+flabel metal5 s 334810 1018624 346978 1030789 0 FreeSans 16000 0 0 0 vssio_2
+port 63 nsew ground input
+<< properties >>
+string FIXED_BBOX 0 0 717600 1037600
+string LEFclass BLOCK
+<< end >>
diff --git a/tapeout/outputs/mag/gpio_defaults_block_0403.mag b/tapeout/outputs/mag/gpio_defaults_block_0403.mag
new file mode 100644
index 0000000..e15b2ba
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_0403.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
+rect 949 833 983 867
+rect 1639 833 1673 867
+rect 4721 833 4755 867
+rect 1225 765 1259 799
+rect 1915 765 1949 799
+rect 2191 765 2225 799
+rect 2513 765 2547 799
+rect 2973 765 3007 799
+rect 3433 765 3467 799
+rect 3893 765 3927 799
+rect 4353 765 4387 799
+rect 4813 765 4847 799
+rect 5411 765 5445 799
+<< metal1 >>
+rect 0 2202 5980 2224
+rect 0 2150 78 2202
+rect 130 2150 142 2202
+rect 194 2150 206 2202
+rect 258 2150 270 2202
+rect 322 2150 1478 2202
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+rect 1038 768 1409 796
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+rect 4856 796 4862 808
+rect 4936 796 5000 808
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+rect 1636 728 1722 756
+rect 1636 716 1642 728
+rect 716 688 722 700
+rect 0 570 5980 592
+rect 0 518 778 570
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+rect 0 496 5980 518
+<< via1 >>
+rect 78 2150 130 2202
+rect 142 2150 194 2202
+rect 206 2150 258 2202
+rect 270 2150 322 2202
+rect 1478 2150 1530 2202
+rect 1542 2150 1594 2202
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+rect 78 1062 130 1114
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+rect 1584 716 1636 768
+rect 2044 756 2096 808
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+rect 4978 518 5030 570
+rect 5042 518 5094 570
+rect 5106 518 5158 570
+rect 5170 518 5222 570
+<< metal2 >>
+rect 78 2204 322 2224
+rect 78 2202 92 2204
+rect 148 2202 172 2204
+rect 228 2202 252 2204
+rect 308 2202 322 2204
+rect 78 2148 92 2150
+rect 148 2148 172 2150
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+rect 1632 1056 1648 1120
+rect 1712 1056 1740 1120
+rect 1460 1014 1740 1056
+rect 1460 778 1482 1014
+rect 1718 778 1740 1014
+rect 1460 496 1740 778
+rect 2160 1714 2440 2224
+rect 2160 1478 2182 1714
+rect 2418 1478 2440 1714
+rect 2160 576 2440 1478
+rect 2160 512 2188 576
+rect 2252 512 2268 576
+rect 2332 512 2348 576
+rect 2412 512 2440 576
+rect 2160 496 2440 512
+rect 2860 2208 3140 2224
+rect 2860 2144 2888 2208
+rect 2952 2144 2968 2208
+rect 3032 2144 3048 2208
+rect 3112 2144 3140 2208
+rect 2860 1120 3140 2144
+rect 2860 1056 2888 1120
+rect 2952 1056 2968 1120
+rect 3032 1056 3048 1120
+rect 3112 1056 3140 1120
+rect 2860 1014 3140 1056
+rect 2860 778 2882 1014
+rect 3118 778 3140 1014
+rect 2860 496 3140 778
+rect 3560 1714 3840 2224
+rect 3560 1478 3582 1714
+rect 3818 1478 3840 1714
+rect 3560 576 3840 1478
+rect 3560 512 3588 576
+rect 3652 512 3668 576
+rect 3732 512 3748 576
+rect 3812 512 3840 576
+rect 3560 496 3840 512
+rect 4260 2208 4540 2224
+rect 4260 2144 4288 2208
+rect 4352 2144 4368 2208
+rect 4432 2144 4448 2208
+rect 4512 2144 4540 2208
+rect 4260 1120 4540 2144
+rect 4260 1056 4288 1120
+rect 4352 1056 4368 1120
+rect 4432 1056 4448 1120
+rect 4512 1056 4540 1120
+rect 4260 1014 4540 1056
+rect 4260 778 4282 1014
+rect 4518 778 4540 1014
+rect 4260 496 4540 778
+rect 4960 1714 5240 2224
+rect 4960 1478 4982 1714
+rect 5218 1478 5240 1714
+rect 4960 576 5240 1478
+rect 4960 512 4988 576
+rect 5052 512 5068 576
+rect 5132 512 5148 576
+rect 5212 512 5240 576
+rect 4960 496 5240 512
+<< via4 >>
+rect 82 778 318 1014
+rect 782 1664 1018 1714
+rect 782 1600 788 1664
+rect 788 1600 852 1664
+rect 852 1600 868 1664
+rect 868 1600 932 1664
+rect 932 1600 948 1664
+rect 948 1600 1012 1664
+rect 1012 1600 1018 1664
+rect 782 1478 1018 1600
+rect 1482 778 1718 1014
+rect 2182 1664 2418 1714
+rect 2182 1600 2188 1664
+rect 2188 1600 2252 1664
+rect 2252 1600 2268 1664
+rect 2268 1600 2332 1664
+rect 2332 1600 2348 1664
+rect 2348 1600 2412 1664
+rect 2412 1600 2418 1664
+rect 2182 1478 2418 1600
+rect 2882 778 3118 1014
+rect 3582 1664 3818 1714
+rect 3582 1600 3588 1664
+rect 3588 1600 3652 1664
+rect 3652 1600 3668 1664
+rect 3668 1600 3732 1664
+rect 3732 1600 3748 1664
+rect 3748 1600 3812 1664
+rect 3812 1600 3818 1664
+rect 3582 1478 3818 1600
+rect 4282 778 4518 1014
+rect 4982 1664 5218 1714
+rect 4982 1600 4988 1664
+rect 4988 1600 5052 1664
+rect 5052 1600 5068 1664
+rect 5068 1600 5132 1664
+rect 5132 1600 5148 1664
+rect 5148 1600 5212 1664
+rect 5212 1600 5218 1664
+rect 4982 1478 5218 1600
+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>
diff --git a/tapeout/outputs/mag/gpio_defaults_block_0801.mag b/tapeout/outputs/mag/gpio_defaults_block_0801.mag
new file mode 100644
index 0000000..a5d837d
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_0801.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
+rect 949 833 983 867
+rect 1639 833 1673 867
+rect 4721 833 4755 867
+rect 1363 765 1397 799
+rect 1915 765 1949 799
+rect 2191 765 2225 799
+rect 2513 765 2547 799
+rect 2973 765 3007 799
+rect 3433 765 3467 799
+rect 3893 765 3927 799
+rect 4353 765 4387 799
+rect 4951 765 4985 799
+rect 5273 765 5307 799
+<< metal1 >>
+rect 0 2202 5980 2224
+rect 0 2150 78 2202
+rect 130 2150 142 2202
+rect 194 2150 206 2202
+rect 258 2150 270 2202
+rect 322 2150 1478 2202
+rect 1530 2150 1542 2202
+rect 1594 2150 1606 2202
+rect 1658 2150 1670 2202
+rect 1722 2150 2878 2202
+rect 2930 2150 2942 2202
+rect 2994 2150 3006 2202
+rect 3058 2150 3070 2202
+rect 3122 2150 4278 2202
+rect 4330 2150 4342 2202
+rect 4394 2150 4406 2202
+rect 4458 2150 4470 2202
+rect 4522 2150 5980 2202
+rect 0 2128 5980 2150
+rect 0 1658 5980 1680
+rect 0 1606 778 1658
+rect 830 1606 842 1658
+rect 894 1606 906 1658
+rect 958 1606 970 1658
+rect 1022 1606 2178 1658
+rect 2230 1606 2242 1658
+rect 2294 1606 2306 1658
+rect 2358 1606 2370 1658
+rect 2422 1606 3578 1658
+rect 3630 1606 3642 1658
+rect 3694 1606 3706 1658
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+rect 3822 1606 4978 1658
+rect 5030 1606 5042 1658
+rect 5094 1606 5106 1658
+rect 5158 1606 5170 1658
+rect 5222 1606 5980 1658
+rect 0 1584 5980 1606
+rect 0 1114 5980 1136
+rect 0 1062 78 1114
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+rect 322 1062 1478 1114
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+rect 0 1040 5980 1062
+rect 198 824 204 876
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+rect 1256 864 1262 916
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+rect 1627 827 1685 836
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+rect 1213 796 1271 805
+rect 1351 796 1409 805
+rect 1765 796 1823 805
+rect 1903 796 1961 805
+rect 2038 796 2044 808
+rect 1038 768 1409 796
+rect 1694 768 1961 796
+rect 2035 768 2044 796
+rect 658 688 664 740
+rect 716 728 722 740
+rect 1038 728 1066 768
+rect 1213 759 1271 768
+rect 1351 759 1409 768
+rect 716 700 1066 728
+rect 1578 716 1584 768
+rect 1636 756 1642 768
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+rect 2096 796 2102 808
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+rect 2498 796 2504 808
+rect 2096 768 2240 796
+rect 2358 768 2504 796
+rect 2096 756 2102 768
+rect 2176 756 2240 768
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+rect 2498 756 2504 768
+rect 2556 756 2562 808
+rect 2820 796 2884 808
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+rect 2809 768 2964 796
+rect 2820 756 2884 768
+rect 2958 756 2964 768
+rect 3016 756 3022 808
+rect 3280 796 3344 808
+rect 3418 796 3424 808
+rect 3267 768 3424 796
+rect 3280 756 3344 768
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+rect 3476 756 3482 808
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+rect 3878 796 3884 808
+rect 3701 768 3884 796
+rect 3740 756 3804 768
+rect 3878 756 3884 768
+rect 3936 756 3942 808
+rect 4200 796 4264 808
+rect 4338 796 4344 808
+rect 4161 768 4344 796
+rect 4200 756 4264 768
+rect 4338 756 4344 768
+rect 4396 756 4402 808
+rect 4798 796 4804 808
+rect 4759 768 4804 796
+rect 4798 756 4804 768
+rect 4856 796 4862 808
+rect 4936 796 5000 808
+rect 5258 796 5264 808
+rect 4856 768 5000 796
+rect 5219 768 5264 796
+rect 4856 756 4862 768
+rect 4936 756 5000 768
+rect 5258 756 5264 768
+rect 5316 796 5322 808
+rect 5396 796 5460 808
+rect 5316 768 5460 796
+rect 5316 756 5322 768
+rect 5396 756 5460 768
+rect 1636 728 1722 756
+rect 1636 716 1642 728
+rect 716 688 722 700
+rect 0 570 5980 592
+rect 0 518 778 570
+rect 830 518 842 570
+rect 894 518 906 570
+rect 958 518 970 570
+rect 1022 518 2178 570
+rect 2230 518 2242 570
+rect 2294 518 2306 570
+rect 2358 518 2370 570
+rect 2422 518 3578 570
+rect 3630 518 3642 570
+rect 3694 518 3706 570
+rect 3758 518 3770 570
+rect 3822 518 4978 570
+rect 5030 518 5042 570
+rect 5094 518 5106 570
+rect 5158 518 5170 570
+rect 5222 518 5980 570
+rect 0 496 5980 518
+<< via1 >>
+rect 78 2150 130 2202
+rect 142 2150 194 2202
+rect 206 2150 258 2202
+rect 270 2150 322 2202
+rect 1478 2150 1530 2202
+rect 1542 2150 1594 2202
+rect 1606 2150 1658 2202
+rect 1670 2150 1722 2202
+rect 2878 2150 2930 2202
+rect 2942 2150 2994 2202
+rect 3006 2150 3058 2202
+rect 3070 2150 3122 2202
+rect 4278 2150 4330 2202
+rect 4342 2150 4394 2202
+rect 4406 2150 4458 2202
+rect 4470 2150 4522 2202
+rect 778 1606 830 1658
+rect 842 1606 894 1658
+rect 906 1606 958 1658
+rect 970 1606 1022 1658
+rect 2178 1606 2230 1658
+rect 2242 1606 2294 1658
+rect 2306 1606 2358 1658
+rect 2370 1606 2422 1658
+rect 3578 1606 3630 1658
+rect 3642 1606 3694 1658
+rect 3706 1606 3758 1658
+rect 3770 1606 3822 1658
+rect 4978 1606 5030 1658
+rect 5042 1606 5094 1658
+rect 5106 1606 5158 1658
+rect 5170 1606 5222 1658
+rect 78 1062 130 1114
+rect 142 1062 194 1114
+rect 206 1062 258 1114
+rect 270 1062 322 1114
+rect 1478 1062 1530 1114
+rect 1542 1062 1594 1114
+rect 1606 1062 1658 1114
+rect 1670 1062 1722 1114
+rect 2878 1062 2930 1114
+rect 2942 1062 2994 1114
+rect 3006 1062 3058 1114
+rect 3070 1062 3122 1114
+rect 4278 1062 4330 1114
+rect 4342 1062 4394 1114
+rect 4406 1062 4458 1114
+rect 4470 1062 4522 1114
+rect 204 824 256 876
+rect 1262 864 1314 916
+rect 5724 824 5776 876
+rect 664 688 716 740
+rect 1584 716 1636 768
+rect 2044 756 2096 808
+rect 2504 756 2556 808
+rect 2964 756 3016 808
+rect 3424 756 3476 808
+rect 3884 756 3936 808
+rect 4344 756 4396 808
+rect 4804 756 4856 808
+rect 5264 756 5316 808
+rect 778 518 830 570
+rect 842 518 894 570
+rect 906 518 958 570
+rect 970 518 1022 570
+rect 2178 518 2230 570
+rect 2242 518 2294 570
+rect 2306 518 2358 570
+rect 2370 518 2422 570
+rect 3578 518 3630 570
+rect 3642 518 3694 570
+rect 3706 518 3758 570
+rect 3770 518 3822 570
+rect 4978 518 5030 570
+rect 5042 518 5094 570
+rect 5106 518 5158 570
+rect 5170 518 5222 570
+<< metal2 >>
+rect 78 2204 322 2224
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+<< metal3 >>
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+<< via3 >>
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+rect 4372 1060 4428 1116
+rect 4428 1060 4432 1116
+rect 4368 1056 4432 1060
+rect 4448 1116 4512 1120
+rect 4448 1060 4452 1116
+rect 4452 1060 4508 1116
+rect 4508 1060 4512 1116
+rect 4448 1056 4512 1060
+rect 788 572 852 576
+rect 788 516 792 572
+rect 792 516 848 572
+rect 848 516 852 572
+rect 788 512 852 516
+rect 868 572 932 576
+rect 868 516 872 572
+rect 872 516 928 572
+rect 928 516 932 572
+rect 868 512 932 516
+rect 948 572 1012 576
+rect 948 516 952 572
+rect 952 516 1008 572
+rect 1008 516 1012 572
+rect 948 512 1012 516
+rect 2188 572 2252 576
+rect 2188 516 2192 572
+rect 2192 516 2248 572
+rect 2248 516 2252 572
+rect 2188 512 2252 516
+rect 2268 572 2332 576
+rect 2268 516 2272 572
+rect 2272 516 2328 572
+rect 2328 516 2332 572
+rect 2268 512 2332 516
+rect 2348 572 2412 576
+rect 2348 516 2352 572
+rect 2352 516 2408 572
+rect 2408 516 2412 572
+rect 2348 512 2412 516
+rect 3588 572 3652 576
+rect 3588 516 3592 572
+rect 3592 516 3648 572
+rect 3648 516 3652 572
+rect 3588 512 3652 516
+rect 3668 572 3732 576
+rect 3668 516 3672 572
+rect 3672 516 3728 572
+rect 3728 516 3732 572
+rect 3668 512 3732 516
+rect 3748 572 3812 576
+rect 3748 516 3752 572
+rect 3752 516 3808 572
+rect 3808 516 3812 572
+rect 3748 512 3812 516
+rect 4988 572 5052 576
+rect 4988 516 4992 572
+rect 4992 516 5048 572
+rect 5048 516 5052 572
+rect 4988 512 5052 516
+rect 5068 572 5132 576
+rect 5068 516 5072 572
+rect 5072 516 5128 572
+rect 5128 516 5132 572
+rect 5068 512 5132 516
+rect 5148 572 5212 576
+rect 5148 516 5152 572
+rect 5152 516 5208 572
+rect 5208 516 5212 572
+rect 5148 512 5212 516
+<< metal4 >>
+rect 60 2208 340 2224
+rect 60 2144 88 2208
+rect 152 2144 168 2208
+rect 232 2144 248 2208
+rect 312 2144 340 2208
+rect 60 1120 340 2144
+rect 60 1056 88 1120
+rect 152 1056 168 1120
+rect 232 1056 248 1120
+rect 312 1056 340 1120
+rect 60 1014 340 1056
+rect 60 778 82 1014
+rect 318 778 340 1014
+rect 60 496 340 778
+rect 760 1714 1040 2224
+rect 760 1478 782 1714
+rect 1018 1478 1040 1714
+rect 760 576 1040 1478
+rect 760 512 788 576
+rect 852 512 868 576
+rect 932 512 948 576
+rect 1012 512 1040 576
+rect 760 496 1040 512
+rect 1460 2208 1740 2224
+rect 1460 2144 1488 2208
+rect 1552 2144 1568 2208
+rect 1632 2144 1648 2208
+rect 1712 2144 1740 2208
+rect 1460 1120 1740 2144
+rect 1460 1056 1488 1120
+rect 1552 1056 1568 1120
+rect 1632 1056 1648 1120
+rect 1712 1056 1740 1120
+rect 1460 1014 1740 1056
+rect 1460 778 1482 1014
+rect 1718 778 1740 1014
+rect 1460 496 1740 778
+rect 2160 1714 2440 2224
+rect 2160 1478 2182 1714
+rect 2418 1478 2440 1714
+rect 2160 576 2440 1478
+rect 2160 512 2188 576
+rect 2252 512 2268 576
+rect 2332 512 2348 576
+rect 2412 512 2440 576
+rect 2160 496 2440 512
+rect 2860 2208 3140 2224
+rect 2860 2144 2888 2208
+rect 2952 2144 2968 2208
+rect 3032 2144 3048 2208
+rect 3112 2144 3140 2208
+rect 2860 1120 3140 2144
+rect 2860 1056 2888 1120
+rect 2952 1056 2968 1120
+rect 3032 1056 3048 1120
+rect 3112 1056 3140 1120
+rect 2860 1014 3140 1056
+rect 2860 778 2882 1014
+rect 3118 778 3140 1014
+rect 2860 496 3140 778
+rect 3560 1714 3840 2224
+rect 3560 1478 3582 1714
+rect 3818 1478 3840 1714
+rect 3560 576 3840 1478
+rect 3560 512 3588 576
+rect 3652 512 3668 576
+rect 3732 512 3748 576
+rect 3812 512 3840 576
+rect 3560 496 3840 512
+rect 4260 2208 4540 2224
+rect 4260 2144 4288 2208
+rect 4352 2144 4368 2208
+rect 4432 2144 4448 2208
+rect 4512 2144 4540 2208
+rect 4260 1120 4540 2144
+rect 4260 1056 4288 1120
+rect 4352 1056 4368 1120
+rect 4432 1056 4448 1120
+rect 4512 1056 4540 1120
+rect 4260 1014 4540 1056
+rect 4260 778 4282 1014
+rect 4518 778 4540 1014
+rect 4260 496 4540 778
+rect 4960 1714 5240 2224
+rect 4960 1478 4982 1714
+rect 5218 1478 5240 1714
+rect 4960 576 5240 1478
+rect 4960 512 4988 576
+rect 5052 512 5068 576
+rect 5132 512 5148 576
+rect 5212 512 5240 576
+rect 4960 496 5240 512
+<< via4 >>
+rect 82 778 318 1014
+rect 782 1664 1018 1714
+rect 782 1600 788 1664
+rect 788 1600 852 1664
+rect 852 1600 868 1664
+rect 868 1600 932 1664
+rect 932 1600 948 1664
+rect 948 1600 1012 1664
+rect 1012 1600 1018 1664
+rect 782 1478 1018 1600
+rect 1482 778 1718 1014
+rect 2182 1664 2418 1714
+rect 2182 1600 2188 1664
+rect 2188 1600 2252 1664
+rect 2252 1600 2268 1664
+rect 2268 1600 2332 1664
+rect 2332 1600 2348 1664
+rect 2348 1600 2412 1664
+rect 2412 1600 2418 1664
+rect 2182 1478 2418 1600
+rect 2882 778 3118 1014
+rect 3582 1664 3818 1714
+rect 3582 1600 3588 1664
+rect 3588 1600 3652 1664
+rect 3652 1600 3668 1664
+rect 3668 1600 3732 1664
+rect 3732 1600 3748 1664
+rect 3748 1600 3812 1664
+rect 3812 1600 3818 1664
+rect 3582 1478 3818 1600
+rect 4282 778 4518 1014
+rect 4982 1664 5218 1714
+rect 4982 1600 4988 1664
+rect 4988 1600 5052 1664
+rect 5052 1600 5068 1664
+rect 5068 1600 5132 1664
+rect 5132 1600 5148 1664
+rect 5148 1600 5212 1664
+rect 5212 1600 5218 1664
+rect 4982 1478 5218 1600
+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>
diff --git a/tapeout/outputs/mag/gpio_defaults_block_1801.mag b/tapeout/outputs/mag/gpio_defaults_block_1801.mag
new file mode 100644
index 0000000..97978aa
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_1801.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
+rect 949 833 983 867
+rect 1639 833 1673 867
+rect 4583 833 4617 867
+rect 1363 765 1397 799
+rect 1915 765 1949 799
+rect 2191 765 2225 799
+rect 2513 765 2547 799
+rect 2973 765 3007 799
+rect 3433 765 3467 799
+rect 3893 765 3927 799
+rect 4353 765 4387 799
+rect 4951 765 4985 799
+rect 5273 765 5307 799
+<< metal1 >>
+rect 0 2202 5980 2224
+rect 0 2150 78 2202
+rect 130 2150 142 2202
+rect 194 2150 206 2202
+rect 258 2150 270 2202
+rect 322 2150 1478 2202
+rect 1530 2150 1542 2202
+rect 1594 2150 1606 2202
+rect 1658 2150 1670 2202
+rect 1722 2150 2878 2202
+rect 2930 2150 2942 2202
+rect 2994 2150 3006 2202
+rect 3058 2150 3070 2202
+rect 3122 2150 4278 2202
+rect 4330 2150 4342 2202
+rect 4394 2150 4406 2202
+rect 4458 2150 4470 2202
+rect 4522 2150 5980 2202
+rect 0 2128 5980 2150
+rect 0 1658 5980 1680
+rect 0 1606 778 1658
+rect 830 1606 842 1658
+rect 894 1606 906 1658
+rect 958 1606 970 1658
+rect 1022 1606 2178 1658
+rect 2230 1606 2242 1658
+rect 2294 1606 2306 1658
+rect 2358 1606 2370 1658
+rect 2422 1606 3578 1658
+rect 3630 1606 3642 1658
+rect 3694 1606 3706 1658
+rect 3758 1606 3770 1658
+rect 3822 1606 4978 1658
+rect 5030 1606 5042 1658
+rect 5094 1606 5106 1658
+rect 5158 1606 5170 1658
+rect 5222 1606 5980 1658
+rect 0 1584 5980 1606
+rect 0 1114 5980 1136
+rect 0 1062 78 1114
+rect 130 1062 142 1114
+rect 194 1062 206 1114
+rect 258 1062 270 1114
+rect 322 1062 1478 1114
+rect 1530 1062 1542 1114
+rect 1594 1062 1606 1114
+rect 1658 1062 1670 1114
+rect 1722 1062 2878 1114
+rect 2930 1062 2942 1114
+rect 2994 1062 3006 1114
+rect 3058 1062 3070 1114
+rect 3122 1062 4278 1114
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+rect 4458 1062 4470 1114
+rect 4522 1062 5980 1114
+rect 0 1040 5980 1062
+rect 198 824 204 876
+rect 256 864 262 876
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+rect 1256 864 1262 916
+rect 1314 904 1320 916
+rect 1314 876 1450 904
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+rect 256 824 262 836
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+rect 1627 827 1685 836
+rect 4571 864 4629 873
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+rect 1213 796 1271 805
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+rect 658 688 664 740
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+rect 4856 796 4862 808
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+rect 5316 796 5322 808
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+rect 5316 756 5322 768
+rect 5396 756 5460 768
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+rect 3048 1060 3052 1116
+rect 3052 1060 3108 1116
+rect 3108 1060 3112 1116
+rect 3048 1056 3112 1060
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+rect 4288 1060 4292 1116
+rect 4292 1060 4348 1116
+rect 4348 1060 4352 1116
+rect 4288 1056 4352 1060
+rect 4368 1116 4432 1120
+rect 4368 1060 4372 1116
+rect 4372 1060 4428 1116
+rect 4428 1060 4432 1116
+rect 4368 1056 4432 1060
+rect 4448 1116 4512 1120
+rect 4448 1060 4452 1116
+rect 4452 1060 4508 1116
+rect 4508 1060 4512 1116
+rect 4448 1056 4512 1060
+rect 788 572 852 576
+rect 788 516 792 572
+rect 792 516 848 572
+rect 848 516 852 572
+rect 788 512 852 516
+rect 868 572 932 576
+rect 868 516 872 572
+rect 872 516 928 572
+rect 928 516 932 572
+rect 868 512 932 516
+rect 948 572 1012 576
+rect 948 516 952 572
+rect 952 516 1008 572
+rect 1008 516 1012 572
+rect 948 512 1012 516
+rect 2188 572 2252 576
+rect 2188 516 2192 572
+rect 2192 516 2248 572
+rect 2248 516 2252 572
+rect 2188 512 2252 516
+rect 2268 572 2332 576
+rect 2268 516 2272 572
+rect 2272 516 2328 572
+rect 2328 516 2332 572
+rect 2268 512 2332 516
+rect 2348 572 2412 576
+rect 2348 516 2352 572
+rect 2352 516 2408 572
+rect 2408 516 2412 572
+rect 2348 512 2412 516
+rect 3588 572 3652 576
+rect 3588 516 3592 572
+rect 3592 516 3648 572
+rect 3648 516 3652 572
+rect 3588 512 3652 516
+rect 3668 572 3732 576
+rect 3668 516 3672 572
+rect 3672 516 3728 572
+rect 3728 516 3732 572
+rect 3668 512 3732 516
+rect 3748 572 3812 576
+rect 3748 516 3752 572
+rect 3752 516 3808 572
+rect 3808 516 3812 572
+rect 3748 512 3812 516
+rect 4988 572 5052 576
+rect 4988 516 4992 572
+rect 4992 516 5048 572
+rect 5048 516 5052 572
+rect 4988 512 5052 516
+rect 5068 572 5132 576
+rect 5068 516 5072 572
+rect 5072 516 5128 572
+rect 5128 516 5132 572
+rect 5068 512 5132 516
+rect 5148 572 5212 576
+rect 5148 516 5152 572
+rect 5152 516 5208 572
+rect 5208 516 5212 572
+rect 5148 512 5212 516
+<< metal4 >>
+rect 60 2208 340 2224
+rect 60 2144 88 2208
+rect 152 2144 168 2208
+rect 232 2144 248 2208
+rect 312 2144 340 2208
+rect 60 1120 340 2144
+rect 60 1056 88 1120
+rect 152 1056 168 1120
+rect 232 1056 248 1120
+rect 312 1056 340 1120
+rect 60 1014 340 1056
+rect 60 778 82 1014
+rect 318 778 340 1014
+rect 60 496 340 778
+rect 760 1714 1040 2224
+rect 760 1478 782 1714
+rect 1018 1478 1040 1714
+rect 760 576 1040 1478
+rect 760 512 788 576
+rect 852 512 868 576
+rect 932 512 948 576
+rect 1012 512 1040 576
+rect 760 496 1040 512
+rect 1460 2208 1740 2224
+rect 1460 2144 1488 2208
+rect 1552 2144 1568 2208
+rect 1632 2144 1648 2208
+rect 1712 2144 1740 2208
+rect 1460 1120 1740 2144
+rect 1460 1056 1488 1120
+rect 1552 1056 1568 1120
+rect 1632 1056 1648 1120
+rect 1712 1056 1740 1120
+rect 1460 1014 1740 1056
+rect 1460 778 1482 1014
+rect 1718 778 1740 1014
+rect 1460 496 1740 778
+rect 2160 1714 2440 2224
+rect 2160 1478 2182 1714
+rect 2418 1478 2440 1714
+rect 2160 576 2440 1478
+rect 2160 512 2188 576
+rect 2252 512 2268 576
+rect 2332 512 2348 576
+rect 2412 512 2440 576
+rect 2160 496 2440 512
+rect 2860 2208 3140 2224
+rect 2860 2144 2888 2208
+rect 2952 2144 2968 2208
+rect 3032 2144 3048 2208
+rect 3112 2144 3140 2208
+rect 2860 1120 3140 2144
+rect 2860 1056 2888 1120
+rect 2952 1056 2968 1120
+rect 3032 1056 3048 1120
+rect 3112 1056 3140 1120
+rect 2860 1014 3140 1056
+rect 2860 778 2882 1014
+rect 3118 778 3140 1014
+rect 2860 496 3140 778
+rect 3560 1714 3840 2224
+rect 3560 1478 3582 1714
+rect 3818 1478 3840 1714
+rect 3560 576 3840 1478
+rect 3560 512 3588 576
+rect 3652 512 3668 576
+rect 3732 512 3748 576
+rect 3812 512 3840 576
+rect 3560 496 3840 512
+rect 4260 2208 4540 2224
+rect 4260 2144 4288 2208
+rect 4352 2144 4368 2208
+rect 4432 2144 4448 2208
+rect 4512 2144 4540 2208
+rect 4260 1120 4540 2144
+rect 4260 1056 4288 1120
+rect 4352 1056 4368 1120
+rect 4432 1056 4448 1120
+rect 4512 1056 4540 1120
+rect 4260 1014 4540 1056
+rect 4260 778 4282 1014
+rect 4518 778 4540 1014
+rect 4260 496 4540 778
+rect 4960 1714 5240 2224
+rect 4960 1478 4982 1714
+rect 5218 1478 5240 1714
+rect 4960 576 5240 1478
+rect 4960 512 4988 576
+rect 5052 512 5068 576
+rect 5132 512 5148 576
+rect 5212 512 5240 576
+rect 4960 496 5240 512
+<< via4 >>
+rect 82 778 318 1014
+rect 782 1664 1018 1714
+rect 782 1600 788 1664
+rect 788 1600 852 1664
+rect 852 1600 868 1664
+rect 868 1600 932 1664
+rect 932 1600 948 1664
+rect 948 1600 1012 1664
+rect 1012 1600 1018 1664
+rect 782 1478 1018 1600
+rect 1482 778 1718 1014
+rect 2182 1664 2418 1714
+rect 2182 1600 2188 1664
+rect 2188 1600 2252 1664
+rect 2252 1600 2268 1664
+rect 2268 1600 2332 1664
+rect 2332 1600 2348 1664
+rect 2348 1600 2412 1664
+rect 2412 1600 2418 1664
+rect 2182 1478 2418 1600
+rect 2882 778 3118 1014
+rect 3582 1664 3818 1714
+rect 3582 1600 3588 1664
+rect 3588 1600 3652 1664
+rect 3652 1600 3668 1664
+rect 3668 1600 3732 1664
+rect 3732 1600 3748 1664
+rect 3748 1600 3812 1664
+rect 3812 1600 3818 1664
+rect 3582 1478 3818 1600
+rect 4282 778 4518 1014
+rect 4982 1664 5218 1714
+rect 4982 1600 4988 1664
+rect 4988 1600 5052 1664
+rect 5052 1600 5068 1664
+rect 5068 1600 5132 1664
+rect 5132 1600 5148 1664
+rect 5148 1600 5212 1664
+rect 5212 1600 5218 1664
+rect 4982 1478 5218 1600
+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>
diff --git a/tapeout/outputs/mag/gpio_defaults_block_1803.mag b/tapeout/outputs/mag/gpio_defaults_block_1803.mag
new file mode 100644
index 0000000..39a381a
--- /dev/null
+++ b/tapeout/outputs/mag/gpio_defaults_block_1803.mag
@@ -0,0 +1,1461 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1638587925
+<< viali >>
+rect 949 833 983 867
+rect 1639 833 1673 867
+rect 4583 833 4617 867
+rect 1225 765 1259 799
+rect 1915 765 1949 799
+rect 2191 765 2225 799
+rect 2513 765 2547 799
+rect 2973 765 3007 799
+rect 3433 765 3467 799
+rect 3893 765 3927 799
+rect 4353 765 4387 799
+rect 4951 765 4985 799
+rect 5273 765 5307 799
+<< metal1 >>
+rect 0 2202 5980 2224
+rect 0 2150 78 2202
+rect 130 2150 142 2202
+rect 194 2150 206 2202
+rect 258 2150 270 2202
+rect 322 2150 1478 2202
+rect 1530 2150 1542 2202
+rect 1594 2150 1606 2202
+rect 1658 2150 1670 2202
+rect 1722 2150 2878 2202
+rect 2930 2150 2942 2202
+rect 2994 2150 3006 2202
+rect 3058 2150 3070 2202
+rect 3122 2150 4278 2202
+rect 4330 2150 4342 2202
+rect 4394 2150 4406 2202
+rect 4458 2150 4470 2202
+rect 4522 2150 5980 2202
+rect 0 2128 5980 2150
+rect 0 1658 5980 1680
+rect 0 1606 778 1658
+rect 830 1606 842 1658
+rect 894 1606 906 1658
+rect 958 1606 970 1658
+rect 1022 1606 2178 1658
+rect 2230 1606 2242 1658
+rect 2294 1606 2306 1658
+rect 2358 1606 2370 1658
+rect 2422 1606 3578 1658
+rect 3630 1606 3642 1658
+rect 3694 1606 3706 1658
+rect 3758 1606 3770 1658
+rect 3822 1606 4978 1658
+rect 5030 1606 5042 1658
+rect 5094 1606 5106 1658
+rect 5158 1606 5170 1658
+rect 5222 1606 5980 1658
+rect 0 1584 5980 1606
+rect 0 1114 5980 1136
+rect 0 1062 78 1114
+rect 130 1062 142 1114
+rect 194 1062 206 1114
+rect 258 1062 270 1114
+rect 322 1062 1478 1114
+rect 1530 1062 1542 1114
+rect 1594 1062 1606 1114
+rect 1658 1062 1670 1114
+rect 1722 1062 2878 1114
+rect 2930 1062 2942 1114
+rect 2994 1062 3006 1114
+rect 3058 1062 3070 1114
+rect 3122 1062 4278 1114
+rect 4330 1062 4342 1114
+rect 4394 1062 4406 1114
+rect 4458 1062 4470 1114
+rect 4522 1062 5980 1114
+rect 0 1040 5980 1062
+rect 198 824 204 876
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+rect 1012 512 1040 576
+rect 760 511 1040 512
+rect 2160 576 2440 577
+rect 2160 512 2188 576
+rect 2252 512 2268 576
+rect 2332 512 2348 576
+rect 2412 512 2440 576
+rect 2160 511 2440 512
+rect 3560 576 3840 577
+rect 3560 512 3588 576
+rect 3652 512 3668 576
+rect 3732 512 3748 576
+rect 3812 512 3840 576
+rect 3560 511 3840 512
+rect 4960 576 5240 577
+rect 4960 512 4988 576
+rect 5052 512 5068 576
+rect 5132 512 5148 576
+rect 5212 512 5240 576
+rect 4960 511 5240 512
+<< via3 >>
+rect 88 2204 152 2208
+rect 88 2148 92 2204
+rect 92 2148 148 2204
+rect 148 2148 152 2204
+rect 88 2144 152 2148
+rect 168 2204 232 2208
+rect 168 2148 172 2204
+rect 172 2148 228 2204
+rect 228 2148 232 2204
+rect 168 2144 232 2148
+rect 248 2204 312 2208
+rect 248 2148 252 2204
+rect 252 2148 308 2204
+rect 308 2148 312 2204
+rect 248 2144 312 2148
+rect 1488 2204 1552 2208
+rect 1488 2148 1492 2204
+rect 1492 2148 1548 2204
+rect 1548 2148 1552 2204
+rect 1488 2144 1552 2148
+rect 1568 2204 1632 2208
+rect 1568 2148 1572 2204
+rect 1572 2148 1628 2204
+rect 1628 2148 1632 2204
+rect 1568 2144 1632 2148
+rect 1648 2204 1712 2208
+rect 1648 2148 1652 2204
+rect 1652 2148 1708 2204
+rect 1708 2148 1712 2204
+rect 1648 2144 1712 2148
+rect 2888 2204 2952 2208
+rect 2888 2148 2892 2204
+rect 2892 2148 2948 2204
+rect 2948 2148 2952 2204
+rect 2888 2144 2952 2148
+rect 2968 2204 3032 2208
+rect 2968 2148 2972 2204
+rect 2972 2148 3028 2204
+rect 3028 2148 3032 2204
+rect 2968 2144 3032 2148
+rect 3048 2204 3112 2208
+rect 3048 2148 3052 2204
+rect 3052 2148 3108 2204
+rect 3108 2148 3112 2204
+rect 3048 2144 3112 2148
+rect 4288 2204 4352 2208
+rect 4288 2148 4292 2204
+rect 4292 2148 4348 2204
+rect 4348 2148 4352 2204
+rect 4288 2144 4352 2148
+rect 4368 2204 4432 2208
+rect 4368 2148 4372 2204
+rect 4372 2148 4428 2204
+rect 4428 2148 4432 2204
+rect 4368 2144 4432 2148
+rect 4448 2204 4512 2208
+rect 4448 2148 4452 2204
+rect 4452 2148 4508 2204
+rect 4508 2148 4512 2204
+rect 4448 2144 4512 2148
+rect 788 1660 852 1664
+rect 788 1604 792 1660
+rect 792 1604 848 1660
+rect 848 1604 852 1660
+rect 788 1600 852 1604
+rect 868 1660 932 1664
+rect 868 1604 872 1660
+rect 872 1604 928 1660
+rect 928 1604 932 1660
+rect 868 1600 932 1604
+rect 948 1660 1012 1664
+rect 948 1604 952 1660
+rect 952 1604 1008 1660
+rect 1008 1604 1012 1660
+rect 948 1600 1012 1604
+rect 2188 1660 2252 1664
+rect 2188 1604 2192 1660
+rect 2192 1604 2248 1660
+rect 2248 1604 2252 1660
+rect 2188 1600 2252 1604
+rect 2268 1660 2332 1664
+rect 2268 1604 2272 1660
+rect 2272 1604 2328 1660
+rect 2328 1604 2332 1660
+rect 2268 1600 2332 1604
+rect 2348 1660 2412 1664
+rect 2348 1604 2352 1660
+rect 2352 1604 2408 1660
+rect 2408 1604 2412 1660
+rect 2348 1600 2412 1604
+rect 3588 1660 3652 1664
+rect 3588 1604 3592 1660
+rect 3592 1604 3648 1660
+rect 3648 1604 3652 1660
+rect 3588 1600 3652 1604
+rect 3668 1660 3732 1664
+rect 3668 1604 3672 1660
+rect 3672 1604 3728 1660
+rect 3728 1604 3732 1660
+rect 3668 1600 3732 1604
+rect 3748 1660 3812 1664
+rect 3748 1604 3752 1660
+rect 3752 1604 3808 1660
+rect 3808 1604 3812 1660
+rect 3748 1600 3812 1604
+rect 4988 1660 5052 1664
+rect 4988 1604 4992 1660
+rect 4992 1604 5048 1660
+rect 5048 1604 5052 1660
+rect 4988 1600 5052 1604
+rect 5068 1660 5132 1664
+rect 5068 1604 5072 1660
+rect 5072 1604 5128 1660
+rect 5128 1604 5132 1660
+rect 5068 1600 5132 1604
+rect 5148 1660 5212 1664
+rect 5148 1604 5152 1660
+rect 5152 1604 5208 1660
+rect 5208 1604 5212 1660
+rect 5148 1600 5212 1604
+rect 88 1116 152 1120
+rect 88 1060 92 1116
+rect 92 1060 148 1116
+rect 148 1060 152 1116
+rect 88 1056 152 1060
+rect 168 1116 232 1120
+rect 168 1060 172 1116
+rect 172 1060 228 1116
+rect 228 1060 232 1116
+rect 168 1056 232 1060
+rect 248 1116 312 1120
+rect 248 1060 252 1116
+rect 252 1060 308 1116
+rect 308 1060 312 1116
+rect 248 1056 312 1060
+rect 1488 1116 1552 1120
+rect 1488 1060 1492 1116
+rect 1492 1060 1548 1116
+rect 1548 1060 1552 1116
+rect 1488 1056 1552 1060
+rect 1568 1116 1632 1120
+rect 1568 1060 1572 1116
+rect 1572 1060 1628 1116
+rect 1628 1060 1632 1116
+rect 1568 1056 1632 1060
+rect 1648 1116 1712 1120
+rect 1648 1060 1652 1116
+rect 1652 1060 1708 1116
+rect 1708 1060 1712 1116
+rect 1648 1056 1712 1060
+rect 2888 1116 2952 1120
+rect 2888 1060 2892 1116
+rect 2892 1060 2948 1116
+rect 2948 1060 2952 1116
+rect 2888 1056 2952 1060
+rect 2968 1116 3032 1120
+rect 2968 1060 2972 1116
+rect 2972 1060 3028 1116
+rect 3028 1060 3032 1116
+rect 2968 1056 3032 1060
+rect 3048 1116 3112 1120
+rect 3048 1060 3052 1116
+rect 3052 1060 3108 1116
+rect 3108 1060 3112 1116
+rect 3048 1056 3112 1060
+rect 4288 1116 4352 1120
+rect 4288 1060 4292 1116
+rect 4292 1060 4348 1116
+rect 4348 1060 4352 1116
+rect 4288 1056 4352 1060
+rect 4368 1116 4432 1120
+rect 4368 1060 4372 1116
+rect 4372 1060 4428 1116
+rect 4428 1060 4432 1116
+rect 4368 1056 4432 1060
+rect 4448 1116 4512 1120
+rect 4448 1060 4452 1116
+rect 4452 1060 4508 1116
+rect 4508 1060 4512 1116
+rect 4448 1056 4512 1060
+rect 788 572 852 576
+rect 788 516 792 572
+rect 792 516 848 572
+rect 848 516 852 572
+rect 788 512 852 516
+rect 868 572 932 576
+rect 868 516 872 572
+rect 872 516 928 572
+rect 928 516 932 572
+rect 868 512 932 516
+rect 948 572 1012 576
+rect 948 516 952 572
+rect 952 516 1008 572
+rect 1008 516 1012 572
+rect 948 512 1012 516
+rect 2188 572 2252 576
+rect 2188 516 2192 572
+rect 2192 516 2248 572
+rect 2248 516 2252 572
+rect 2188 512 2252 516
+rect 2268 572 2332 576
+rect 2268 516 2272 572
+rect 2272 516 2328 572
+rect 2328 516 2332 572
+rect 2268 512 2332 516
+rect 2348 572 2412 576
+rect 2348 516 2352 572
+rect 2352 516 2408 572
+rect 2408 516 2412 572
+rect 2348 512 2412 516
+rect 3588 572 3652 576
+rect 3588 516 3592 572
+rect 3592 516 3648 572
+rect 3648 516 3652 572
+rect 3588 512 3652 516
+rect 3668 572 3732 576
+rect 3668 516 3672 572
+rect 3672 516 3728 572
+rect 3728 516 3732 572
+rect 3668 512 3732 516
+rect 3748 572 3812 576
+rect 3748 516 3752 572
+rect 3752 516 3808 572
+rect 3808 516 3812 572
+rect 3748 512 3812 516
+rect 4988 572 5052 576
+rect 4988 516 4992 572
+rect 4992 516 5048 572
+rect 5048 516 5052 572
+rect 4988 512 5052 516
+rect 5068 572 5132 576
+rect 5068 516 5072 572
+rect 5072 516 5128 572
+rect 5128 516 5132 572
+rect 5068 512 5132 516
+rect 5148 572 5212 576
+rect 5148 516 5152 572
+rect 5152 516 5208 572
+rect 5208 516 5212 572
+rect 5148 512 5212 516
+<< metal4 >>
+rect 60 2208 340 2224
+rect 60 2144 88 2208
+rect 152 2144 168 2208
+rect 232 2144 248 2208
+rect 312 2144 340 2208
+rect 60 1120 340 2144
+rect 60 1056 88 1120
+rect 152 1056 168 1120
+rect 232 1056 248 1120
+rect 312 1056 340 1120
+rect 60 1014 340 1056
+rect 60 778 82 1014
+rect 318 778 340 1014
+rect 60 496 340 778
+rect 760 1714 1040 2224
+rect 760 1478 782 1714
+rect 1018 1478 1040 1714
+rect 760 576 1040 1478
+rect 760 512 788 576
+rect 852 512 868 576
+rect 932 512 948 576
+rect 1012 512 1040 576
+rect 760 496 1040 512
+rect 1460 2208 1740 2224
+rect 1460 2144 1488 2208
+rect 1552 2144 1568 2208
+rect 1632 2144 1648 2208
+rect 1712 2144 1740 2208
+rect 1460 1120 1740 2144
+rect 1460 1056 1488 1120
+rect 1552 1056 1568 1120
+rect 1632 1056 1648 1120
+rect 1712 1056 1740 1120
+rect 1460 1014 1740 1056
+rect 1460 778 1482 1014
+rect 1718 778 1740 1014
+rect 1460 496 1740 778
+rect 2160 1714 2440 2224
+rect 2160 1478 2182 1714
+rect 2418 1478 2440 1714
+rect 2160 576 2440 1478
+rect 2160 512 2188 576
+rect 2252 512 2268 576
+rect 2332 512 2348 576
+rect 2412 512 2440 576
+rect 2160 496 2440 512
+rect 2860 2208 3140 2224
+rect 2860 2144 2888 2208
+rect 2952 2144 2968 2208
+rect 3032 2144 3048 2208
+rect 3112 2144 3140 2208
+rect 2860 1120 3140 2144
+rect 2860 1056 2888 1120
+rect 2952 1056 2968 1120
+rect 3032 1056 3048 1120
+rect 3112 1056 3140 1120
+rect 2860 1014 3140 1056
+rect 2860 778 2882 1014
+rect 3118 778 3140 1014
+rect 2860 496 3140 778
+rect 3560 1714 3840 2224
+rect 3560 1478 3582 1714
+rect 3818 1478 3840 1714
+rect 3560 576 3840 1478
+rect 3560 512 3588 576
+rect 3652 512 3668 576
+rect 3732 512 3748 576
+rect 3812 512 3840 576
+rect 3560 496 3840 512
+rect 4260 2208 4540 2224
+rect 4260 2144 4288 2208
+rect 4352 2144 4368 2208
+rect 4432 2144 4448 2208
+rect 4512 2144 4540 2208
+rect 4260 1120 4540 2144
+rect 4260 1056 4288 1120
+rect 4352 1056 4368 1120
+rect 4432 1056 4448 1120
+rect 4512 1056 4540 1120
+rect 4260 1014 4540 1056
+rect 4260 778 4282 1014
+rect 4518 778 4540 1014
+rect 4260 496 4540 778
+rect 4960 1714 5240 2224
+rect 4960 1478 4982 1714
+rect 5218 1478 5240 1714
+rect 4960 576 5240 1478
+rect 4960 512 4988 576
+rect 5052 512 5068 576
+rect 5132 512 5148 576
+rect 5212 512 5240 576
+rect 4960 496 5240 512
+<< via4 >>
+rect 82 778 318 1014
+rect 782 1664 1018 1714
+rect 782 1600 788 1664
+rect 788 1600 852 1664
+rect 852 1600 868 1664
+rect 868 1600 932 1664
+rect 932 1600 948 1664
+rect 948 1600 1012 1664
+rect 1012 1600 1018 1664
+rect 782 1478 1018 1600
+rect 1482 778 1718 1014
+rect 2182 1664 2418 1714
+rect 2182 1600 2188 1664
+rect 2188 1600 2252 1664
+rect 2252 1600 2268 1664
+rect 2268 1600 2332 1664
+rect 2332 1600 2348 1664
+rect 2348 1600 2412 1664
+rect 2412 1600 2418 1664
+rect 2182 1478 2418 1600
+rect 2882 778 3118 1014
+rect 3582 1664 3818 1714
+rect 3582 1600 3588 1664
+rect 3588 1600 3652 1664
+rect 3652 1600 3668 1664
+rect 3668 1600 3732 1664
+rect 3732 1600 3748 1664
+rect 3748 1600 3812 1664
+rect 3812 1600 3818 1664
+rect 3582 1478 3818 1600
+rect 4282 778 4518 1014
+rect 4982 1664 5218 1714
+rect 4982 1600 4988 1664
+rect 4988 1600 5052 1664
+rect 5052 1600 5068 1664
+rect 5068 1600 5132 1664
+rect 5132 1600 5148 1664
+rect 5148 1600 5212 1664
+rect 5212 1600 5218 1664
+rect 4982 1478 5218 1600
+<< metal5 >>
+rect 0 1714 5980 1756
+rect 0 1478 782 1714
+rect 1018 1478 2182 1714
+rect 2418 1478 3582 1714
+rect 3818 1478 4982 1714
+rect 5218 1478 5980 1714
+rect 0 1436 5980 1478
+rect 0 1014 5980 1056
+rect 0 778 82 1014
+rect 318 778 1482 1014
+rect 1718 778 2882 1014
+rect 3118 778 4282 1014
+rect 4518 778 5980 1014
+rect 0 736 5980 778
+use sky130_fd_sc_hd__fill_1  FILLER_0_9 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 828 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_2 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 0 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638322937
+transform 1 0 0 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 276 0 1 544
+box -38 -48 590 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 920 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_15
+timestamp 1638322937
+transform 1 0 1380 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[5\]
+timestamp 1638322937
+transform 1 0 2300 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[1\]
+timestamp 1638322937
+transform 1 0 1196 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[4\]
+timestamp 1638322937
+transform 1 0 2024 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[3\]
+timestamp 1638322937
+transform 1 0 1748 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[2\]
+timestamp 1638322937
+transform 1 0 1472 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_6 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 2576 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_38 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 3496 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_33
+timestamp 1638322937
+transform 1 0 3036 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_29
+timestamp 1638322937
+transform 1 0 2668 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_27
+timestamp 1638322937
+transform 1 0 2484 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[7\]
+timestamp 1638322937
+transform 1 0 3220 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[6\]
+timestamp 1638322937
+transform 1 0 2760 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_43
+timestamp 1638322937
+transform 1 0 3956 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_51 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638322937
+transform 1 0 4692 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_48
+timestamp 1638322937
+transform 1 0 4416 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_39
+timestamp 1638322937
+transform 1 0 3588 0 -1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[9\]
+timestamp 1638322937
+transform 1 0 4140 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[8\]
+timestamp 1638322937
+transform 1 0 3680 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[12\]
+timestamp 1638322937
+transform 1 0 4508 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_8
+timestamp 1638322937
+transform 1 0 5152 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_7
+timestamp 1638322937
+transform 1 0 5152 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_55
+timestamp 1638322937
+transform 1 0 5060 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_0_55
+timestamp 1638322937
+transform 1 0 5060 0 1 544
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[10\]
+timestamp 1638322937
+transform 1 0 4784 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_60
+timestamp 1638322937
+transform 1 0 5520 0 1 544
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_1_57
+timestamp 1638322937
+transform 1 0 5244 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_61
+timestamp 1638322937
+transform 1 0 5612 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  gpio_default_value\[11\]
+timestamp 1638322937
+transform 1 0 5244 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638322937
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638322937
+transform -1 0 5980 0 1 544
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638322937
+transform 1 0 0 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638322937
+transform 1 0 276 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638322937
+transform 1 0 1380 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_9
+timestamp 1638322937
+transform 1 0 2576 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_27
+timestamp 1638322937
+transform 1 0 2484 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_29
+timestamp 1638322937
+transform 1 0 2668 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_41
+timestamp 1638322937
+transform 1 0 3772 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  TAP_10
+timestamp 1638322937
+transform 1 0 5152 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_57
+timestamp 1638322937
+transform 1 0 5244 0 1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_2_61
+timestamp 1638322937
+transform 1 0 5612 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638322937
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_2_53
+timestamp 1638322937
+transform 1 0 4876 0 1 1632
+box -38 -48 314 592
+<< labels >>
+rlabel metal5 s 0 1436 5980 1756 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 760 496 1040 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 2160 496 2440 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 3560 496 3840 2224 6 VGND
+port 0 nsew ground input
+rlabel metal4 s 4960 496 5240 2224 6 VGND
+port 0 nsew ground input
+rlabel metal5 s 0 736 5980 1056 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 60 496 340 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 1460 496 1740 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 2860 496 3140 2224 6 VPWR
+port 1 nsew power input
+rlabel metal4 s 4260 496 4540 2224 6 VPWR
+port 1 nsew power input
+rlabel metal2 s 202 0 258 400 6 gpio_defaults[0]
+port 2 nsew signal tristate
+rlabel metal2 s 4802 0 4858 400 6 gpio_defaults[10]
+port 3 nsew signal tristate
+rlabel metal2 s 5262 0 5318 400 6 gpio_defaults[11]
+port 4 nsew signal tristate
+rlabel metal2 s 5722 0 5778 400 6 gpio_defaults[12]
+port 5 nsew signal tristate
+rlabel metal2 s 662 0 718 400 6 gpio_defaults[1]
+port 6 nsew signal tristate
+rlabel metal2 s 1122 0 1178 400 6 gpio_defaults[2]
+port 7 nsew signal tristate
+rlabel metal2 s 1582 0 1638 400 6 gpio_defaults[3]
+port 8 nsew signal tristate
+rlabel metal2 s 2042 0 2098 400 6 gpio_defaults[4]
+port 9 nsew signal tristate
+rlabel metal2 s 2502 0 2558 400 6 gpio_defaults[5]
+port 10 nsew signal tristate
+rlabel metal2 s 2962 0 3018 400 6 gpio_defaults[6]
+port 11 nsew signal tristate
+rlabel metal2 s 3422 0 3478 400 6 gpio_defaults[7]
+port 12 nsew signal tristate
+rlabel metal2 s 3882 0 3938 400 6 gpio_defaults[8]
+port 13 nsew signal tristate
+rlabel metal2 s 4342 0 4398 400 6 gpio_defaults[9]
+port 14 nsew signal tristate
+<< properties >>
+string FIXED_BBOX 0 0 6000 2200
+<< end >>
diff --git a/tapeout/outputs/mag/user_id_prog_zero.mag b/tapeout/outputs/mag/user_id_prog_zero.mag
new file mode 100644
index 0000000..6ad139c
--- /dev/null
+++ b/tapeout/outputs/mag/user_id_prog_zero.mag
@@ -0,0 +1,3074 @@
+magic
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+rect 1764 1056 1828 1060
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+rect 5015 1060 5019 1116
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+rect 5155 1060 5159 1116
+rect 5095 1056 5159 1060
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+rect 5175 1060 5179 1116
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+rect 5235 1060 5239 1116
+rect 5175 1056 5239 1060
+rect 5255 1116 5319 1120
+rect 5255 1060 5259 1116
+rect 5259 1060 5315 1116
+rect 5315 1060 5319 1116
+rect 5255 1056 5319 1060
+<< metal4 >>
+rect 1756 5472 2076 6032
+rect 1756 5408 1764 5472
+rect 1828 5408 1844 5472
+rect 1908 5408 1924 5472
+rect 1988 5408 2004 5472
+rect 2068 5408 2076 5472
+rect 1756 5238 2076 5408
+rect 1756 5002 1798 5238
+rect 2034 5002 2076 5238
+rect 1756 4384 2076 5002
+rect 1756 4320 1764 4384
+rect 1828 4320 1844 4384
+rect 1908 4320 1924 4384
+rect 1988 4320 2004 4384
+rect 2068 4320 2076 4384
+rect 1756 3606 2076 4320
+rect 1756 3370 1798 3606
+rect 2034 3370 2076 3606
+rect 1756 3296 2076 3370
+rect 1756 3232 1764 3296
+rect 1828 3232 1844 3296
+rect 1908 3232 1924 3296
+rect 1988 3232 2004 3296
+rect 2068 3232 2076 3296
+rect 1756 2208 2076 3232
+rect 1756 2144 1764 2208
+rect 1828 2144 1844 2208
+rect 1908 2144 1924 2208
+rect 1988 2144 2004 2208
+rect 2068 2144 2076 2208
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+rect 1756 1738 1798 1974
+rect 2034 1738 2076 1974
+rect 1756 1120 2076 1738
+rect 1756 1056 1764 1120
+rect 1828 1056 1844 1120
+rect 1908 1056 1924 1120
+rect 1988 1056 2004 1120
+rect 2068 1056 2076 1120
+rect 1756 1040 2076 1056
+rect 2569 6016 2889 6032
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+rect 2569 1040 2889 1600
+rect 3382 5472 3702 6032
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+rect 5159 1056 5175 1120
+rect 5239 1056 5255 1120
+rect 5319 1056 5327 1120
+rect 5007 1040 5327 1056
+<< via4 >>
+rect 1798 5002 2034 5238
+rect 1798 3370 2034 3606
+rect 1798 1738 2034 1974
+rect 2611 4186 2847 4422
+rect 2611 2752 2847 2790
+rect 2611 2688 2641 2752
+rect 2641 2688 2657 2752
+rect 2657 2688 2721 2752
+rect 2721 2688 2737 2752
+rect 2737 2688 2801 2752
+rect 2801 2688 2817 2752
+rect 2817 2688 2847 2752
+rect 2611 2554 2847 2688
+rect 3424 5002 3660 5238
+rect 3424 3370 3660 3606
+rect 3424 1738 3660 1974
+rect 4236 4186 4472 4422
+rect 4236 2752 4472 2790
+rect 4236 2688 4266 2752
+rect 4266 2688 4282 2752
+rect 4282 2688 4346 2752
+rect 4346 2688 4362 2752
+rect 4362 2688 4426 2752
+rect 4426 2688 4442 2752
+rect 4442 2688 4472 2752
+rect 4236 2554 4472 2688
+rect 5049 5002 5285 5238
+rect 5049 3370 5285 3606
+rect 5049 1738 5285 1974
+<< metal5 >>
+rect 1104 5238 5980 5280
+rect 1104 5002 1798 5238
+rect 2034 5002 3424 5238
+rect 3660 5002 5049 5238
+rect 5285 5002 5980 5238
+rect 1104 4960 5980 5002
+rect 1104 4422 5980 4464
+rect 1104 4186 2611 4422
+rect 2847 4186 4236 4422
+rect 4472 4186 5980 4422
+rect 1104 4144 5980 4186
+rect 1104 3606 5980 3648
+rect 1104 3370 1798 3606
+rect 2034 3370 3424 3606
+rect 3660 3370 5049 3606
+rect 5285 3370 5980 3606
+rect 1104 3328 5980 3370
+rect 1104 2790 5980 2832
+rect 1104 2554 2611 2790
+rect 2847 2554 4236 2790
+rect 4472 2554 5980 2790
+rect 1104 2512 5980 2554
+rect 1104 1974 5980 2016
+rect 1104 1738 1798 1974
+rect 2034 1738 3424 1974
+rect 3660 1738 5049 1974
+rect 5285 1738 5980 1974
+rect 1104 1696 5980 1738
+use sky130_fd_sc_hd__fill_1  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 1380 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 1748 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_15 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 2484 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_21
+timestamp 1648946573
+transform 1 0 3036 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_29 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3772 0 -1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_0_32 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4048 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_39
+timestamp 1648946573
+transform 1 0 4692 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_47
+timestamp 1638025753
+transform 1 0 5428 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_1_6
+timestamp 1638025753
+transform 1 0 1656 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_12
+timestamp 1638025753
+transform 1 0 2208 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_20
+timestamp 1638025753
+transform 1 0 2944 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_1_24 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3312 0 1 1632
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_33 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4140 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_45
+timestamp 1638025753
+transform 1 0 5244 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 2720
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_6
+timestamp 1638025753
+transform 1 0 1656 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_18
+timestamp 1638025753
+transform 1 0 2760 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_30
+timestamp 1638025753
+transform 1 0 3864 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_3_42
+timestamp 1648946573
+transform 1 0 4968 0 1 2720
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_10
+timestamp 1638025753
+transform 1 0 2024 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_14
+timestamp 1638025753
+transform 1 0 2392 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_18
+timestamp 1638025753
+transform 1 0 2760 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_26
+timestamp 1638025753
+transform 1 0 3496 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_30
+timestamp 1638025753
+transform 1 0 3864 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_4_35
+timestamp 1638025753
+transform 1 0 4324 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_41
+timestamp 1638025753
+transform 1 0 4876 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_46
+timestamp 1638025753
+transform 1 0 5336 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_2  FILLER_5_6
+timestamp 1638025753
+transform 1 0 1656 0 1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_5_11
+timestamp 1638025753
+transform 1 0 2116 0 1 3808
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_5_23
+timestamp 1648946573
+transform 1 0 3220 0 1 3808
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_5_31
+timestamp 1638025753
+transform 1 0 3956 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_6  FILLER_5_40
+timestamp 1638025753
+transform 1 0 4784 0 1 3808
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_5_49
+timestamp 1638025753
+transform 1 0 5612 0 1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_6_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_12
+timestamp 1648946573
+transform 1 0 2208 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_20
+timestamp 1638025753
+transform 1 0 2944 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_24
+timestamp 1638025753
+transform 1 0 3312 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_6_28
+timestamp 1638025753
+transform 1 0 3680 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_4  FILLER_6_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_36
+timestamp 1638025753
+transform 1 0 4416 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_40
+timestamp 1648946573
+transform 1 0 4784 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_6_48
+timestamp 1638025753
+transform 1 0 5520 0 -1 4896
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_3
+timestamp 1638025753
+transform 1 0 1380 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_15
+timestamp 1638025753
+transform 1 0 2484 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_27
+timestamp 1638025753
+transform 1 0 3588 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_36
+timestamp 1638025753
+transform 1 0 4416 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_7_42
+timestamp 1638025753
+transform 1 0 4968 0 1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_7_46
+timestamp 1638025753
+transform 1 0 5336 0 1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_8_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 5984
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_8_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 5984
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638025753
+transform 1 0 1104 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638025753
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_2
+timestamp 1638025753
+transform 1 0 1104 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638025753
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638025753
+transform 1 0 1104 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638025753
+transform -1 0 5980 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_6
+timestamp 1638025753
+transform 1 0 1104 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_7
+timestamp 1638025753
+transform -1 0 5980 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_8
+timestamp 1638025753
+transform 1 0 1104 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_9
+timestamp 1638025753
+transform -1 0 5980 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_10
+timestamp 1638025753
+transform 1 0 1104 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_11
+timestamp 1638025753
+transform -1 0 5980 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_12
+timestamp 1638025753
+transform 1 0 1104 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_13
+timestamp 1638025753
+transform -1 0 5980 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_14
+timestamp 1638025753
+transform 1 0 1104 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_15
+timestamp 1638025753
+transform -1 0 5980 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_16
+timestamp 1638025753
+transform 1 0 1104 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_17
+timestamp 1638025753
+transform -1 0 5980 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3956 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_19
+timestamp 1638025753
+transform 1 0 3956 0 -1 2720
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_20
+timestamp 1638025753
+transform 1 0 3956 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_21
+timestamp 1638025753
+transform 1 0 3956 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_22
+timestamp 1638025753
+transform 1 0 3956 0 -1 5984
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 2392 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[1\]
+timestamp 1648946573
+transform 1 0 3036 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[2\]
+timestamp 1648946573
+transform 1 0 1840 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[3\]
+timestamp 1648946573
+transform 1 0 1380 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[4\]
+timestamp 1648946573
+transform 1 0 5428 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[5\]
+timestamp 1648946573
+transform 1 0 4140 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[6\]
+timestamp 1648946573
+transform 1 0 1380 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[7\]
+timestamp 1648946573
+transform 1 0 3864 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[8\]
+timestamp 1648946573
+transform 1 0 3220 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[9\]
+timestamp 1648946573
+transform 1 0 4876 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[10\]
+timestamp 1648946573
+transform 1 0 4232 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[11\]
+timestamp 1648946573
+transform 1 0 2668 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[12\]
+timestamp 1648946573
+transform 1 0 4508 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[13\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[14\]
+timestamp 1648946573
+transform 1 0 2484 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[15\]
+timestamp 1648946573
+transform 1 0 4416 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[16\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[17\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[18\]
+timestamp 1648946573
+transform 1 0 4508 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[19\]
+timestamp 1648946573
+transform 1 0 1932 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[20\]
+timestamp 1648946573
+transform 1 0 2760 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[21\]
+timestamp 1648946573
+transform 1 0 3404 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[22\]
+timestamp 1648946573
+transform 1 0 4048 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[23\]
+timestamp 1648946573
+transform 1 0 5060 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[24\]
+timestamp 1648946573
+transform 1 0 1748 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[25\]
+timestamp 1648946573
+transform 1 0 2944 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[26\]
+timestamp 1648946573
+transform 1 0 5060 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[27\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[28\]
+timestamp 1648946573
+transform 1 0 1932 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[29\]
+timestamp 1648946573
+transform 1 0 5336 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[30\]
+timestamp 1648946573
+transform 1 0 3036 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[31\]
+timestamp 1648946573
+transform 1 0 1380 0 1 2720
+box -38 -48 314 592
+<< labels >>
+rlabel metal2 s 4066 6277 4122 7077 4 mask_rev[0]
+port 1 nsew
+rlabel metal2 s 4066 0 4122 800 4 mask_rev[10]
+port 2 nsew
+rlabel metal2 s 1122 0 1178 800 4 mask_rev[11]
+port 3 nsew
+rlabel metal2 s 570 0 626 800 4 mask_rev[12]
+port 4 nsew
+rlabel metal2 s 5354 6277 5410 7077 4 mask_rev[13]
+port 5 nsew
+rlabel metal2 s 5906 0 5962 800 4 mask_rev[14]
+port 6 nsew
+rlabel metal3 s 6309 1640 7109 1760 4 mask_rev[15]
+port 7 nsew
+rlabel metal2 s 2226 0 2282 800 4 mask_rev[16]
+port 8 nsew
+rlabel metal2 s 1674 6277 1730 7077 4 mask_rev[17]
+port 9 nsew
+rlabel metal3 s 0 5176 800 5296 4 mask_rev[18]
+port 10 nsew
+rlabel metal2 s 2962 6277 3018 7077 4 mask_rev[19]
+port 11 nsew
+rlabel metal3 s 0 3272 800 3392 4 mask_rev[1]
+port 12 nsew
+rlabel metal3 s 6309 2456 7109 2576 4 mask_rev[20]
+port 13 nsew
+rlabel metal3 s 6309 824 7109 944 4 mask_rev[21]
+port 14 nsew
+rlabel metal3 s 0 5992 800 6112 4 mask_rev[22]
+port 15 nsew
+rlabel metal2 s 1674 0 1730 800 4 mask_rev[23]
+port 16 nsew
+rlabel metal2 s 5906 6277 5962 7077 4 mask_rev[24]
+port 17 nsew
+rlabel metal3 s 0 1640 800 1760 4 mask_rev[25]
+port 18 nsew
+rlabel metal2 s 4802 6277 4858 7077 4 mask_rev[26]
+port 19 nsew
+rlabel metal2 s 1122 6277 1178 7077 4 mask_rev[27]
+port 20 nsew
+rlabel metal2 s 6458 6277 6514 7077 4 mask_rev[28]
+port 21 nsew
+rlabel metal2 s 5354 0 5410 800 4 mask_rev[29]
+port 22 nsew
+rlabel metal3 s 0 2456 800 2576 4 mask_rev[2]
+port 23 nsew
+rlabel metal3 s 6309 5176 7109 5296 4 mask_rev[30]
+port 24 nsew
+rlabel metal2 s 2962 0 3018 800 4 mask_rev[31]
+port 25 nsew
+rlabel metal2 s 3514 0 3570 800 4 mask_rev[3]
+port 26 nsew
+rlabel metal3 s 6309 3544 7109 3664 4 mask_rev[4]
+port 27 nsew
+rlabel metal3 s 6309 4360 7109 4480 4 mask_rev[5]
+port 28 nsew
+rlabel metal3 s 0 4360 800 4480 4 mask_rev[6]
+port 29 nsew
+rlabel metal2 s 3514 6277 3570 7077 4 mask_rev[7]
+port 30 nsew
+rlabel metal2 s 4802 0 4858 800 4 mask_rev[8]
+port 31 nsew
+rlabel metal2 s 2226 6277 2282 7077 4 mask_rev[9]
+port 32 nsew
+rlabel metal5 s 1104 1696 5980 2016 4 VPWR
+port 33 nsew
+rlabel metal5 s 1104 2512 5980 2832 4 VGND
+port 34 nsew
+<< properties >>
+string FIXED_BBOX 0 0 7109 7077
+<< end >>
diff --git a/tapeout/outputs/mag/user_id_programming.mag b/tapeout/outputs/mag/user_id_programming.mag
new file mode 100644
index 0000000..8561377
--- /dev/null
+++ b/tapeout/outputs/mag/user_id_programming.mag
@@ -0,0 +1,3074 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1650371074
+<< nwell >>
+rect 2304 2369 2397 2389
+<< viali >>
+rect 4353 5117 4387 5151
+rect 5089 5117 5123 5151
+rect 1961 4641 1995 4675
+rect 3065 4641 3099 4675
+rect 3433 4641 3467 4675
+rect 4537 4641 4571 4675
+rect 1593 4029 1627 4063
+rect 2053 4029 2087 4063
+rect 4445 4029 4479 4063
+rect 4537 4029 4571 4063
+rect 5549 4029 5583 4063
+rect 1501 3553 1535 3587
+rect 1961 3553 1995 3587
+rect 2697 3553 2731 3587
+rect 2973 3553 3007 3587
+rect 3433 3553 3467 3587
+rect 4261 3553 4295 3587
+rect 4813 3553 4847 3587
+rect 5273 3553 5307 3587
+rect 1409 2941 1443 2975
+rect 4813 2397 4847 2431
+rect 5089 2397 5123 2431
+rect 1593 1853 1627 1887
+rect 1961 1853 1995 1887
+rect 2605 1853 2639 1887
+rect 2881 1853 2915 1887
+rect 3249 1853 3283 1887
+rect 4077 1853 4111 1887
+rect 5641 1853 5675 1887
+rect 1685 1377 1719 1411
+rect 2973 1377 3007 1411
+rect 4629 1377 4663 1411
+<< locali >>
+rect 4353 5117 4387 5151
+rect 5089 5117 5123 5151
+rect 1961 4641 1995 4675
+rect 3065 4641 3099 4675
+rect 3433 4641 3467 4675
+rect 4537 4641 4571 4675
+rect 1593 4029 1627 4063
+rect 2053 4029 2087 4063
+rect 4445 4029 4479 4063
+rect 4537 4029 4571 4063
+rect 5549 4029 5583 4063
+rect 1501 3553 1535 3587
+rect 1961 3553 1995 3587
+rect 2697 3553 2731 3587
+rect 2973 3553 3007 3587
+rect 3433 3553 3467 3587
+rect 4261 3553 4295 3587
+rect 4813 3553 4847 3587
+rect 5273 3553 5307 3587
+rect 1409 2941 1443 2975
+rect 4813 2397 4847 2431
+rect 5089 2397 5123 2431
+rect 1593 1853 1627 1887
+rect 1961 1853 1995 1887
+rect 2605 1853 2639 1887
+rect 2881 1853 2915 1887
+rect 3249 1853 3283 1887
+rect 4077 1853 4111 1887
+rect 5641 1853 5675 1887
+rect 1685 1377 1719 1411
+rect 2973 1377 3007 1411
+rect 4629 1377 4663 1411
+<< metal1 >>
+rect 1104 6010 5980 6032
+rect 1104 5958 2607 6010
+rect 2659 5958 2671 6010
+rect 2723 5958 2735 6010
+rect 2787 5958 2799 6010
+rect 2851 5958 4232 6010
+rect 4284 5958 4296 6010
+rect 4348 5958 4360 6010
+rect 4412 5958 4424 6010
+rect 4476 5958 5980 6010
+rect 1104 5936 5980 5958
+rect 1104 5466 5980 5488
+rect 1104 5414 1794 5466
+rect 1846 5414 1858 5466
+rect 1910 5414 1922 5466
+rect 1974 5414 1986 5466
+rect 2038 5414 3420 5466
+rect 3472 5414 3484 5466
+rect 3536 5414 3548 5466
+rect 3600 5414 3612 5466
+rect 3664 5414 5045 5466
+rect 5097 5414 5109 5466
+rect 5161 5414 5173 5466
+rect 5225 5414 5237 5466
+rect 5289 5414 5980 5466
+rect 1104 5392 5980 5414
+rect 4062 5108 4068 5160
+rect 4120 5148 4126 5160
+rect 4157 5148 4215 5157
+rect 4341 5148 4399 5157
+rect 4120 5120 4399 5148
+rect 4120 5108 4126 5120
+rect 4157 5111 4215 5120
+rect 4341 5111 4399 5120
+rect 4614 5108 4620 5160
+rect 4672 5148 4678 5160
+rect 5077 5148 5135 5157
+rect 5261 5148 5319 5157
+rect 4672 5120 5319 5148
+rect 4672 5108 4678 5120
+rect 5077 5111 5135 5120
+rect 5261 5111 5319 5120
+rect 1104 4922 5980 4944
+rect 1104 4870 2607 4922
+rect 2659 4870 2671 4922
+rect 2723 4870 2735 4922
+rect 2787 4870 2799 4922
+rect 2851 4870 4232 4922
+rect 4284 4870 4296 4922
+rect 4348 4870 4360 4922
+rect 4412 4870 4424 4922
+rect 4476 4870 5980 4922
+rect 1104 4848 5980 4870
+rect 1949 4672 2007 4681
+rect 2133 4672 2191 4681
+rect 2958 4672 2964 4684
+rect 1949 4644 2964 4672
+rect 1949 4635 2007 4644
+rect 2133 4635 2191 4644
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+rect 3050 4644 3240 4672
+rect 3050 4632 3114 4644
+rect 3234 4632 3240 4644
+rect 3292 4632 3298 4684
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+rect 3602 4672 3666 4684
+rect 3418 4644 3666 4672
+rect 3418 4632 3482 4644
+rect 3602 4632 3666 4644
+rect 4522 4674 4586 4684
+rect 4706 4674 4770 4684
+rect 4522 4644 4770 4674
+rect 4522 4632 4586 4644
+rect 4706 4632 4770 4644
+rect 3620 4468 3648 4632
+rect 4720 4539 4755 4632
+rect 4720 4505 4754 4539
+rect 4720 4480 4755 4505
+rect 3878 4468 3884 4480
+rect 3620 4440 3884 4468
+rect 3878 4428 3884 4440
+rect 3936 4428 3942 4480
+rect 4706 4428 4712 4480
+rect 4764 4428 4770 4480
+rect 1104 4378 5980 4400
+rect 1104 4326 1794 4378
+rect 1846 4326 1858 4378
+rect 1910 4326 1922 4378
+rect 1974 4326 1986 4378
+rect 2038 4326 3420 4378
+rect 3472 4326 3484 4378
+rect 3536 4326 3548 4378
+rect 3600 4326 3612 4378
+rect 3664 4326 5045 4378
+rect 5097 4326 5109 4378
+rect 5161 4326 5173 4378
+rect 5225 4326 5237 4378
+rect 5289 4326 5980 4378
+rect 1104 4304 5980 4326
+rect 3050 4224 3056 4276
+rect 3108 4264 3114 4276
+rect 3108 4236 4568 4264
+rect 3108 4224 3114 4236
+rect 1394 4156 1400 4208
+rect 1452 4196 1458 4208
+rect 1452 4168 1902 4196
+rect 1452 4156 1458 4168
+rect 1394 4060 1458 4072
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+rect 1394 4032 1584 4060
+rect 1394 4020 1458 4032
+rect 1578 4020 1584 4032
+rect 1636 4020 1642 4072
+rect 1870 4069 1902 4168
+rect 2222 4088 2228 4140
+rect 2280 4128 2286 4140
+rect 2280 4100 3924 4128
+rect 2280 4088 2286 4100
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+rect 1765 3556 2007 3584
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+rect 2881 5952 2889 6016
+rect 2569 4928 2889 5952
+rect 2569 4864 2577 4928
+rect 2641 4864 2657 4928
+rect 2721 4864 2737 4928
+rect 2801 4864 2817 4928
+rect 2881 4864 2889 4928
+rect 2569 4422 2889 4864
+rect 2569 4186 2611 4422
+rect 2847 4186 2889 4422
+rect 2569 3840 2889 4186
+rect 2569 3776 2577 3840
+rect 2641 3776 2657 3840
+rect 2721 3776 2737 3840
+rect 2801 3776 2817 3840
+rect 2881 3776 2889 3840
+rect 2569 2790 2889 3776
+rect 2569 2752 2611 2790
+rect 2847 2752 2889 2790
+rect 2569 2688 2577 2752
+rect 2881 2688 2889 2752
+rect 2569 2554 2611 2688
+rect 2847 2554 2889 2688
+rect 2569 1664 2889 2554
+rect 2569 1600 2577 1664
+rect 2641 1600 2657 1664
+rect 2721 1600 2737 1664
+rect 2801 1600 2817 1664
+rect 2881 1600 2889 1664
+rect 2569 1040 2889 1600
+rect 3382 5472 3702 6032
+rect 3382 5408 3390 5472
+rect 3454 5408 3470 5472
+rect 3534 5408 3550 5472
+rect 3614 5408 3630 5472
+rect 3694 5408 3702 5472
+rect 3382 5238 3702 5408
+rect 3382 5002 3424 5238
+rect 3660 5002 3702 5238
+rect 3382 4384 3702 5002
+rect 3382 4320 3390 4384
+rect 3454 4320 3470 4384
+rect 3534 4320 3550 4384
+rect 3614 4320 3630 4384
+rect 3694 4320 3702 4384
+rect 3382 3606 3702 4320
+rect 3382 3370 3424 3606
+rect 3660 3370 3702 3606
+rect 3382 3296 3702 3370
+rect 3382 3232 3390 3296
+rect 3454 3232 3470 3296
+rect 3534 3232 3550 3296
+rect 3614 3232 3630 3296
+rect 3694 3232 3702 3296
+rect 3382 2208 3702 3232
+rect 3382 2144 3390 2208
+rect 3454 2144 3470 2208
+rect 3534 2144 3550 2208
+rect 3614 2144 3630 2208
+rect 3694 2144 3702 2208
+rect 3382 1974 3702 2144
+rect 3382 1738 3424 1974
+rect 3660 1738 3702 1974
+rect 3382 1120 3702 1738
+rect 3382 1056 3390 1120
+rect 3454 1056 3470 1120
+rect 3534 1056 3550 1120
+rect 3614 1056 3630 1120
+rect 3694 1056 3702 1120
+rect 3382 1040 3702 1056
+rect 4194 6016 4514 6032
+rect 4194 5952 4202 6016
+rect 4266 5952 4282 6016
+rect 4346 5952 4362 6016
+rect 4426 5952 4442 6016
+rect 4506 5952 4514 6016
+rect 4194 4928 4514 5952
+rect 4194 4864 4202 4928
+rect 4266 4864 4282 4928
+rect 4346 4864 4362 4928
+rect 4426 4864 4442 4928
+rect 4506 4864 4514 4928
+rect 4194 4422 4514 4864
+rect 4194 4186 4236 4422
+rect 4472 4186 4514 4422
+rect 4194 3840 4514 4186
+rect 4194 3776 4202 3840
+rect 4266 3776 4282 3840
+rect 4346 3776 4362 3840
+rect 4426 3776 4442 3840
+rect 4506 3776 4514 3840
+rect 4194 2790 4514 3776
+rect 4194 2752 4236 2790
+rect 4472 2752 4514 2790
+rect 4194 2688 4202 2752
+rect 4506 2688 4514 2752
+rect 4194 2554 4236 2688
+rect 4472 2554 4514 2688
+rect 4194 1664 4514 2554
+rect 4194 1600 4202 1664
+rect 4266 1600 4282 1664
+rect 4346 1600 4362 1664
+rect 4426 1600 4442 1664
+rect 4506 1600 4514 1664
+rect 4194 1040 4514 1600
+rect 5007 5472 5327 6032
+rect 5007 5408 5015 5472
+rect 5079 5408 5095 5472
+rect 5159 5408 5175 5472
+rect 5239 5408 5255 5472
+rect 5319 5408 5327 5472
+rect 5007 5238 5327 5408
+rect 5007 5002 5049 5238
+rect 5285 5002 5327 5238
+rect 5007 4384 5327 5002
+rect 5007 4320 5015 4384
+rect 5079 4320 5095 4384
+rect 5159 4320 5175 4384
+rect 5239 4320 5255 4384
+rect 5319 4320 5327 4384
+rect 5007 3606 5327 4320
+rect 5007 3370 5049 3606
+rect 5285 3370 5327 3606
+rect 5007 3296 5327 3370
+rect 5007 3232 5015 3296
+rect 5079 3232 5095 3296
+rect 5159 3232 5175 3296
+rect 5239 3232 5255 3296
+rect 5319 3232 5327 3296
+rect 5007 2208 5327 3232
+rect 5007 2144 5015 2208
+rect 5079 2144 5095 2208
+rect 5159 2144 5175 2208
+rect 5239 2144 5255 2208
+rect 5319 2144 5327 2208
+rect 5007 1974 5327 2144
+rect 5007 1738 5049 1974
+rect 5285 1738 5327 1974
+rect 5007 1120 5327 1738
+rect 5007 1056 5015 1120
+rect 5079 1056 5095 1120
+rect 5159 1056 5175 1120
+rect 5239 1056 5255 1120
+rect 5319 1056 5327 1120
+rect 5007 1040 5327 1056
+<< via4 >>
+rect 1798 5002 2034 5238
+rect 1798 3370 2034 3606
+rect 1798 1738 2034 1974
+rect 2611 4186 2847 4422
+rect 2611 2752 2847 2790
+rect 2611 2688 2641 2752
+rect 2641 2688 2657 2752
+rect 2657 2688 2721 2752
+rect 2721 2688 2737 2752
+rect 2737 2688 2801 2752
+rect 2801 2688 2817 2752
+rect 2817 2688 2847 2752
+rect 2611 2554 2847 2688
+rect 3424 5002 3660 5238
+rect 3424 3370 3660 3606
+rect 3424 1738 3660 1974
+rect 4236 4186 4472 4422
+rect 4236 2752 4472 2790
+rect 4236 2688 4266 2752
+rect 4266 2688 4282 2752
+rect 4282 2688 4346 2752
+rect 4346 2688 4362 2752
+rect 4362 2688 4426 2752
+rect 4426 2688 4442 2752
+rect 4442 2688 4472 2752
+rect 4236 2554 4472 2688
+rect 5049 5002 5285 5238
+rect 5049 3370 5285 3606
+rect 5049 1738 5285 1974
+<< metal5 >>
+rect 1104 5238 5980 5280
+rect 1104 5002 1798 5238
+rect 2034 5002 3424 5238
+rect 3660 5002 5049 5238
+rect 5285 5002 5980 5238
+rect 1104 4960 5980 5002
+rect 1104 4422 5980 4464
+rect 1104 4186 2611 4422
+rect 2847 4186 4236 4422
+rect 4472 4186 5980 4422
+rect 1104 4144 5980 4186
+rect 1104 3606 5980 3648
+rect 1104 3370 1798 3606
+rect 2034 3370 3424 3606
+rect 3660 3370 5049 3606
+rect 5285 3370 5980 3606
+rect 1104 3328 5980 3370
+rect 1104 2790 5980 2832
+rect 1104 2554 2611 2790
+rect 2847 2554 4236 2790
+rect 4472 2554 5980 2790
+rect 1104 2512 5980 2554
+rect 1104 1974 5980 2016
+rect 1104 1738 1798 1974
+rect 2034 1738 3424 1974
+rect 3660 1738 5049 1974
+rect 5285 1738 5980 1974
+rect 1104 1696 5980 1738
+use sky130_fd_sc_hd__fill_1  FILLER_0_3 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 1380 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_7 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 1748 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_15 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 2484 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_21
+timestamp 1648946573
+transform 1 0 3036 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_0_29 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3772 0 -1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_0_32 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4048 0 -1 1632
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_8  FILLER_0_39
+timestamp 1648946573
+transform 1 0 4692 0 -1 1632
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_0_47
+timestamp 1638025753
+transform 1 0 5428 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  FILLER_1_6
+timestamp 1638025753
+transform 1 0 1656 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_12
+timestamp 1638025753
+transform 1 0 2208 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__fill_1  FILLER_1_20
+timestamp 1638025753
+transform 1 0 2944 0 1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_1_24 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3312 0 1 1632
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_1_33 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 4140 0 1 1632
+box -38 -48 1142 592
+use sky130_fd_sc_hd__fill_2  FILLER_1_45
+timestamp 1638025753
+transform 1 0 5244 0 1 1632
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_2_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_2_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 2720
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_2_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 2720
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_6
+timestamp 1638025753
+transform 1 0 1656 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_18
+timestamp 1638025753
+transform 1 0 2760 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_3_30
+timestamp 1638025753
+transform 1 0 3864 0 1 2720
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_3_42
+timestamp 1648946573
+transform 1 0 4968 0 1 2720
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_10
+timestamp 1638025753
+transform 1 0 2024 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_14
+timestamp 1638025753
+transform 1 0 2392 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_18
+timestamp 1638025753
+transform 1 0 2760 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_26
+timestamp 1638025753
+transform 1 0 3496 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_4_30
+timestamp 1638025753
+transform 1 0 3864 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_4_35
+timestamp 1638025753
+transform 1 0 4324 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__fill_2  FILLER_4_41
+timestamp 1638025753
+transform 1 0 4876 0 -1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_4  FILLER_4_46
+timestamp 1638025753
+transform 1 0 5336 0 -1 3808
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_2  FILLER_5_6
+timestamp 1638025753
+transform 1 0 1656 0 1 3808
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_5_11
+timestamp 1638025753
+transform 1 0 2116 0 1 3808
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_8  FILLER_5_23
+timestamp 1648946573
+transform 1 0 3220 0 1 3808
+box -38 -48 774 592
+use sky130_fd_sc_hd__decap_3  FILLER_5_31
+timestamp 1638025753
+transform 1 0 3956 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_6  FILLER_5_40
+timestamp 1638025753
+transform 1 0 4784 0 1 3808
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_5_49
+timestamp 1638025753
+transform 1 0 5612 0 1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_6  FILLER_6_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_12
+timestamp 1648946573
+transform 1 0 2208 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_20
+timestamp 1638025753
+transform 1 0 2944 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_24
+timestamp 1638025753
+transform 1 0 3312 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_3  FILLER_6_28
+timestamp 1638025753
+transform 1 0 3680 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_4  FILLER_6_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__fill_1  FILLER_6_36
+timestamp 1638025753
+transform 1 0 4416 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_8  FILLER_6_40
+timestamp 1648946573
+transform 1 0 4784 0 -1 4896
+box -38 -48 774 592
+use sky130_fd_sc_hd__fill_2  FILLER_6_48
+timestamp 1638025753
+transform 1 0 5520 0 -1 4896
+box -38 -48 222 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_3
+timestamp 1638025753
+transform 1 0 1380 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_7_15
+timestamp 1638025753
+transform 1 0 2484 0 1 4896
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_27
+timestamp 1638025753
+transform 1 0 3588 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_6  FILLER_7_36
+timestamp 1638025753
+transform 1 0 4416 0 1 4896
+box -38 -48 590 592
+use sky130_fd_sc_hd__fill_1  FILLER_7_42
+timestamp 1638025753
+transform 1 0 4968 0 1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__decap_4  FILLER_7_46
+timestamp 1638025753
+transform 1 0 5336 0 1 4896
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_3
+timestamp 1638025753
+transform 1 0 1380 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_15
+timestamp 1638025753
+transform 1 0 2484 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_4  FILLER_8_27
+timestamp 1638025753
+transform 1 0 3588 0 -1 5984
+box -38 -48 406 592
+use sky130_fd_sc_hd__decap_12  FILLER_8_32
+timestamp 1638025753
+transform 1 0 4048 0 -1 5984
+box -38 -48 1142 592
+use sky130_fd_sc_hd__decap_6  FILLER_8_44
+timestamp 1638025753
+transform 1 0 5152 0 -1 5984
+box -38 -48 590 592
+use sky130_fd_sc_hd__decap_3  PHY_0
+timestamp 1638025753
+transform 1 0 1104 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_1
+timestamp 1638025753
+transform -1 0 5980 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_2
+timestamp 1638025753
+transform 1 0 1104 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_3
+timestamp 1638025753
+transform -1 0 5980 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_4
+timestamp 1638025753
+transform 1 0 1104 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_5
+timestamp 1638025753
+transform -1 0 5980 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_6
+timestamp 1638025753
+transform 1 0 1104 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_7
+timestamp 1638025753
+transform -1 0 5980 0 1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_8
+timestamp 1638025753
+transform 1 0 1104 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_9
+timestamp 1638025753
+transform -1 0 5980 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_10
+timestamp 1638025753
+transform 1 0 1104 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_11
+timestamp 1638025753
+transform -1 0 5980 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_12
+timestamp 1638025753
+transform 1 0 1104 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_13
+timestamp 1638025753
+transform -1 0 5980 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_14
+timestamp 1638025753
+transform 1 0 1104 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_15
+timestamp 1638025753
+transform -1 0 5980 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_16
+timestamp 1638025753
+transform 1 0 1104 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__decap_3  PHY_17
+timestamp 1638025753
+transform -1 0 5980 0 -1 5984
+box -38 -48 314 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_18 $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1638025753
+transform 1 0 3956 0 -1 1632
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_19
+timestamp 1638025753
+transform 1 0 3956 0 -1 2720
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_20
+timestamp 1638025753
+transform 1 0 3956 0 -1 3808
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_21
+timestamp 1638025753
+transform 1 0 3956 0 -1 4896
+box -38 -48 130 592
+use sky130_fd_sc_hd__tapvpwrvgnd_1  PHY_22
+timestamp 1638025753
+transform 1 0 3956 0 -1 5984
+box -38 -48 130 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[0\] $PDKPATH/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1648946573
+transform 1 0 2392 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[1\]
+timestamp 1648946573
+transform 1 0 3036 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[2\]
+timestamp 1648946573
+transform 1 0 1840 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[3\]
+timestamp 1648946573
+transform 1 0 1380 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[4\]
+timestamp 1648946573
+transform 1 0 5428 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[5\]
+timestamp 1648946573
+transform 1 0 4140 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[6\]
+timestamp 1648946573
+transform 1 0 1380 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[7\]
+timestamp 1648946573
+transform 1 0 3864 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[8\]
+timestamp 1648946573
+transform 1 0 3220 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[9\]
+timestamp 1648946573
+transform 1 0 4876 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[10\]
+timestamp 1648946573
+transform 1 0 4232 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[11\]
+timestamp 1648946573
+transform 1 0 2668 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[12\]
+timestamp 1648946573
+transform 1 0 4508 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[13\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 2720
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[14\]
+timestamp 1648946573
+transform 1 0 2484 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[15\]
+timestamp 1648946573
+transform 1 0 4416 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[16\]
+timestamp 1648946573
+transform 1 0 4600 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[17\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[18\]
+timestamp 1648946573
+transform 1 0 4508 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[19\]
+timestamp 1648946573
+transform 1 0 1932 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[20\]
+timestamp 1648946573
+transform 1 0 2760 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[21\]
+timestamp 1648946573
+transform 1 0 3404 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[22\]
+timestamp 1648946573
+transform 1 0 4048 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[23\]
+timestamp 1648946573
+transform 1 0 5060 0 1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[24\]
+timestamp 1648946573
+transform 1 0 1748 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[25\]
+timestamp 1648946573
+transform 1 0 2944 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[26\]
+timestamp 1648946573
+transform 1 0 5060 0 -1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[27\]
+timestamp 1648946573
+transform 1 0 1472 0 -1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[28\]
+timestamp 1648946573
+transform 1 0 1932 0 1 1632
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[29\]
+timestamp 1648946573
+transform 1 0 5336 0 1 3808
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[30\]
+timestamp 1648946573
+transform 1 0 3036 0 -1 4896
+box -38 -48 314 592
+use sky130_fd_sc_hd__conb_1  mask_rev_value\[31\]
+timestamp 1648946573
+transform 1 0 1380 0 1 2720
+box -38 -48 314 592
+<< labels >>
+rlabel metal2 s 4066 6277 4122 7077 4 mask_rev[0]
+port 1 nsew
+rlabel metal2 s 4066 0 4122 800 4 mask_rev[10]
+port 2 nsew
+rlabel metal2 s 1122 0 1178 800 4 mask_rev[11]
+port 3 nsew
+rlabel metal2 s 570 0 626 800 4 mask_rev[12]
+port 4 nsew
+rlabel metal2 s 5354 6277 5410 7077 4 mask_rev[13]
+port 5 nsew
+rlabel metal2 s 5906 0 5962 800 4 mask_rev[14]
+port 6 nsew
+rlabel metal3 s 6309 1640 7109 1760 4 mask_rev[15]
+port 7 nsew
+rlabel metal2 s 2226 0 2282 800 4 mask_rev[16]
+port 8 nsew
+rlabel metal2 s 1674 6277 1730 7077 4 mask_rev[17]
+port 9 nsew
+rlabel metal3 s 0 5176 800 5296 4 mask_rev[18]
+port 10 nsew
+rlabel metal2 s 2962 6277 3018 7077 4 mask_rev[19]
+port 11 nsew
+rlabel metal3 s 0 3272 800 3392 4 mask_rev[1]
+port 12 nsew
+rlabel metal3 s 6309 2456 7109 2576 4 mask_rev[20]
+port 13 nsew
+rlabel metal3 s 6309 824 7109 944 4 mask_rev[21]
+port 14 nsew
+rlabel metal3 s 0 5992 800 6112 4 mask_rev[22]
+port 15 nsew
+rlabel metal2 s 1674 0 1730 800 4 mask_rev[23]
+port 16 nsew
+rlabel metal2 s 5906 6277 5962 7077 4 mask_rev[24]
+port 17 nsew
+rlabel metal3 s 0 1640 800 1760 4 mask_rev[25]
+port 18 nsew
+rlabel metal2 s 4802 6277 4858 7077 4 mask_rev[26]
+port 19 nsew
+rlabel metal2 s 1122 6277 1178 7077 4 mask_rev[27]
+port 20 nsew
+rlabel metal2 s 6458 6277 6514 7077 4 mask_rev[28]
+port 21 nsew
+rlabel metal2 s 5354 0 5410 800 4 mask_rev[29]
+port 22 nsew
+rlabel metal3 s 0 2456 800 2576 4 mask_rev[2]
+port 23 nsew
+rlabel metal3 s 6309 5176 7109 5296 4 mask_rev[30]
+port 24 nsew
+rlabel metal2 s 2962 0 3018 800 4 mask_rev[31]
+port 25 nsew
+rlabel metal2 s 3514 0 3570 800 4 mask_rev[3]
+port 26 nsew
+rlabel metal3 s 6309 3544 7109 3664 4 mask_rev[4]
+port 27 nsew
+rlabel metal3 s 6309 4360 7109 4480 4 mask_rev[5]
+port 28 nsew
+rlabel metal3 s 0 4360 800 4480 4 mask_rev[6]
+port 29 nsew
+rlabel metal2 s 3514 6277 3570 7077 4 mask_rev[7]
+port 30 nsew
+rlabel metal2 s 4802 0 4858 800 4 mask_rev[8]
+port 31 nsew
+rlabel metal2 s 2226 6277 2282 7077 4 mask_rev[9]
+port 32 nsew
+rlabel metal5 s 1104 1696 5980 2016 4 VPWR
+port 33 nsew
+rlabel metal5 s 1104 2512 5980 2832 4 VGND
+port 34 nsew
+<< properties >>
+string FIXED_BBOX 0 0 7109 7077
+<< end >>
diff --git a/tapeout/outputs/mag/user_id_textblock.mag b/tapeout/outputs/mag/user_id_textblock.mag
new file mode 100644
index 0000000..deac987
--- /dev/null
+++ b/tapeout/outputs/mag/user_id_textblock.mag
@@ -0,0 +1,43 @@
+magic
+tech sky130A
+timestamp 1608324878
+<< checkpaint >>
+rect 1495 5490 6500 6570
+rect -630 428 19262 5490
+rect -630 -630 6210 428
+rect 16092 356 18972 428
+<< fillblock >>
+rect -328 754 16860 5172
+use alpha_B  alphaX_0 hexdigits
+timestamp 1598786981
+transform 1 0 14887 0 1 1080
+box 0 0 1620 3780
+use alpha_4  alphaX_1 hexdigits
+timestamp 1598786981
+transform 1 0 12750 0 1 1080
+box 0 0 1620 3780
+use alpha_5  alphaX_2 hexdigits
+timestamp 1598786981
+transform 1 0 10625 0 1 1080
+box 0 0 1620 3780
+use alpha_7  alphaX_3 hexdigits
+timestamp 1598786981
+transform 1 0 8500 0 1 1080
+box 0 0 1620 3780
+use alpha_8  alphaX_4 hexdigits
+timestamp 1598786981
+transform 1 0 6375 0 1 1080
+box 0 0 1620 3780
+use alpha_0  alphaX_5 hexdigits
+timestamp 1598786981
+transform 1 0 4250 0 1 1080
+box 0 0 1620 3780
+use alpha_0  alphaX_6
+timestamp 1598786981
+transform 1 0 2125 0 1 1080
+box 0 0 1620 3780
+use alpha_0  alphaX_7
+timestamp 1598786981
+transform 1 0 0 0 1 1080
+box 0 0 1620 3780
+<< end >>
diff --git a/tapeout/outputs/oas/caravel_0008754b.oas b/tapeout/outputs/oas/caravel_0008754b.oas
new file mode 100644
index 0000000..8307f9e
--- /dev/null
+++ b/tapeout/outputs/oas/caravel_0008754b.oas
Binary files differ
diff --git a/tapeout/outputs/verilog/gl/caravel.v b/tapeout/outputs/verilog/gl/caravel.v
new file mode 100644
index 0000000..acf3675
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/caravel.v
@@ -0,0 +1,5435 @@
+/* Generated by Yosys 0.9+4052 (git sha1 d061b0e, gcc 8.3.1 -fPIC -Os) */
+
+module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vdda1_2, vdda2, vssa1, vssa1_2, vssa2, vccd1, vccd2, vssd1, vssd2, gpio, mprj_io, clock, resetb, flash_csb, flash_clk, flash_io0, flash_io1);
+  wire caravel_clk;
+  wire caravel_clk2;
+  wire caravel_clk_buf;
+  wire caravel_rstn;
+  wire caravel_rstn_buf;
+  wire clk_passthru;
+  input clock;
+  wire clock_core;
+  wire clock_core_buf;
+  wire debug_in;
+  wire debug_mode;
+  wire debug_oeb;
+  wire debug_out;
+  wire ext_clk_sel;
+  wire ext_reset;
+  output flash_clk;
+  wire flash_clk_core;
+  wire flash_clk_frame;
+  wire flash_clk_frame_buf;
+  wire flash_clk_ieb;
+  wire flash_clk_ieb_buf;
+  wire flash_clk_oeb;
+  wire flash_clk_oeb_buf;
+  wire flash_clk_oeb_core;
+  output flash_csb;
+  wire flash_csb_core;
+  wire flash_csb_frame;
+  wire flash_csb_frame_buf;
+  wire flash_csb_ieb;
+  wire flash_csb_ieb_buf;
+  wire flash_csb_oeb;
+  wire flash_csb_oeb_buf;
+  wire flash_csb_oeb_core;
+  output flash_io0;
+  wire flash_io0_di;
+  wire flash_io0_di_buf;
+  wire flash_io0_di_core;
+  wire flash_io0_do;
+  wire flash_io0_do_buf;
+  wire flash_io0_do_core;
+  wire flash_io0_ieb;
+  wire flash_io0_ieb_buf;
+  wire flash_io0_ieb_core;
+  wire flash_io0_oeb;
+  wire flash_io0_oeb_buf;
+  wire flash_io0_oeb_core;
+  output flash_io1;
+  wire flash_io1_di;
+  wire flash_io1_di_buf;
+  wire flash_io1_di_core;
+  wire flash_io1_do;
+  wire flash_io1_do_buf;
+  wire flash_io1_do_core;
+  wire flash_io1_ieb;
+  wire flash_io1_ieb_buf;
+  wire flash_io1_ieb_core;
+  wire flash_io1_oeb;
+  wire flash_io1_oeb_buf;
+  wire flash_io1_oeb_core;
+  wire flash_io2_di_core;
+  wire flash_io2_do_core;
+  wire flash_io2_ieb_core;
+  wire flash_io2_oeb_core;
+  wire flash_io3_di_core;
+  wire flash_io3_do_core;
+  wire flash_io3_ieb_core;
+  wire flash_io3_oeb_core;
+  inout gpio;
+  wire \gpio_clock_1[0] ;
+  wire \gpio_clock_1[10] ;
+  wire \gpio_clock_1[11] ;
+  wire \gpio_clock_1[12] ;
+  wire \gpio_clock_1[13] ;
+  wire \gpio_clock_1[14] ;
+  wire \gpio_clock_1[15] ;
+  wire \gpio_clock_1[16] ;
+  wire \gpio_clock_1[17] ;
+  wire \gpio_clock_1[18] ;
+  wire \gpio_clock_1[1] ;
+  wire \gpio_clock_1[2] ;
+  wire \gpio_clock_1[3] ;
+  wire \gpio_clock_1[4] ;
+  wire \gpio_clock_1[5] ;
+  wire \gpio_clock_1[6] ;
+  wire \gpio_clock_1[7] ;
+  wire \gpio_clock_1[8] ;
+  wire \gpio_clock_1[9] ;
+  wire \gpio_clock_1_shifted[0] ;
+  wire \gpio_clock_1_shifted[10] ;
+  wire \gpio_clock_1_shifted[11] ;
+  wire \gpio_clock_1_shifted[12] ;
+  wire \gpio_clock_1_shifted[13] ;
+  wire \gpio_clock_1_shifted[14] ;
+  wire \gpio_clock_1_shifted[15] ;
+  wire \gpio_clock_1_shifted[16] ;
+  wire \gpio_clock_1_shifted[17] ;
+  wire \gpio_clock_1_shifted[18] ;
+  wire \gpio_clock_1_shifted[1] ;
+  wire \gpio_clock_1_shifted[2] ;
+  wire \gpio_clock_1_shifted[3] ;
+  wire \gpio_clock_1_shifted[4] ;
+  wire \gpio_clock_1_shifted[5] ;
+  wire \gpio_clock_1_shifted[6] ;
+  wire \gpio_clock_1_shifted[7] ;
+  wire \gpio_clock_1_shifted[8] ;
+  wire \gpio_clock_1_shifted[9] ;
+  wire \gpio_clock_2[0] ;
+  wire \gpio_clock_2[10] ;
+  wire \gpio_clock_2[11] ;
+  wire \gpio_clock_2[12] ;
+  wire \gpio_clock_2[13] ;
+  wire \gpio_clock_2[14] ;
+  wire \gpio_clock_2[15] ;
+  wire \gpio_clock_2[16] ;
+  wire \gpio_clock_2[17] ;
+  wire \gpio_clock_2[18] ;
+  wire \gpio_clock_2[1] ;
+  wire \gpio_clock_2[2] ;
+  wire \gpio_clock_2[3] ;
+  wire \gpio_clock_2[4] ;
+  wire \gpio_clock_2[5] ;
+  wire \gpio_clock_2[6] ;
+  wire \gpio_clock_2[7] ;
+  wire \gpio_clock_2[8] ;
+  wire \gpio_clock_2[9] ;
+  wire \gpio_clock_2_shifted[0] ;
+  wire \gpio_clock_2_shifted[10] ;
+  wire \gpio_clock_2_shifted[11] ;
+  wire \gpio_clock_2_shifted[12] ;
+  wire \gpio_clock_2_shifted[13] ;
+  wire \gpio_clock_2_shifted[14] ;
+  wire \gpio_clock_2_shifted[15] ;
+  wire \gpio_clock_2_shifted[16] ;
+  wire \gpio_clock_2_shifted[17] ;
+  wire \gpio_clock_2_shifted[18] ;
+  wire \gpio_clock_2_shifted[1] ;
+  wire \gpio_clock_2_shifted[2] ;
+  wire \gpio_clock_2_shifted[3] ;
+  wire \gpio_clock_2_shifted[4] ;
+  wire \gpio_clock_2_shifted[5] ;
+  wire \gpio_clock_2_shifted[6] ;
+  wire \gpio_clock_2_shifted[7] ;
+  wire \gpio_clock_2_shifted[8] ;
+  wire \gpio_clock_2_shifted[9] ;
+  wire \gpio_defaults[0] ;
+  wire \gpio_defaults[100] ;
+  wire \gpio_defaults[101] ;
+  wire \gpio_defaults[102] ;
+  wire \gpio_defaults[103] ;
+  wire \gpio_defaults[104] ;
+  wire \gpio_defaults[105] ;
+  wire \gpio_defaults[106] ;
+  wire \gpio_defaults[107] ;
+  wire \gpio_defaults[108] ;
+  wire \gpio_defaults[109] ;
+  wire \gpio_defaults[10] ;
+  wire \gpio_defaults[110] ;
+  wire \gpio_defaults[111] ;
+  wire \gpio_defaults[112] ;
+  wire \gpio_defaults[113] ;
+  wire \gpio_defaults[114] ;
+  wire \gpio_defaults[115] ;
+  wire \gpio_defaults[116] ;
+  wire \gpio_defaults[117] ;
+  wire \gpio_defaults[118] ;
+  wire \gpio_defaults[119] ;
+  wire \gpio_defaults[11] ;
+  wire \gpio_defaults[120] ;
+  wire \gpio_defaults[121] ;
+  wire \gpio_defaults[122] ;
+  wire \gpio_defaults[123] ;
+  wire \gpio_defaults[124] ;
+  wire \gpio_defaults[125] ;
+  wire \gpio_defaults[126] ;
+  wire \gpio_defaults[127] ;
+  wire \gpio_defaults[128] ;
+  wire \gpio_defaults[129] ;
+  wire \gpio_defaults[12] ;
+  wire \gpio_defaults[130] ;
+  wire \gpio_defaults[131] ;
+  wire \gpio_defaults[132] ;
+  wire \gpio_defaults[133] ;
+  wire \gpio_defaults[134] ;
+  wire \gpio_defaults[135] ;
+  wire \gpio_defaults[136] ;
+  wire \gpio_defaults[137] ;
+  wire \gpio_defaults[138] ;
+  wire \gpio_defaults[139] ;
+  wire \gpio_defaults[13] ;
+  wire \gpio_defaults[140] ;
+  wire \gpio_defaults[141] ;
+  wire \gpio_defaults[142] ;
+  wire \gpio_defaults[143] ;
+  wire \gpio_defaults[144] ;
+  wire \gpio_defaults[145] ;
+  wire \gpio_defaults[146] ;
+  wire \gpio_defaults[147] ;
+  wire \gpio_defaults[148] ;
+  wire \gpio_defaults[149] ;
+  wire \gpio_defaults[14] ;
+  wire \gpio_defaults[150] ;
+  wire \gpio_defaults[151] ;
+  wire \gpio_defaults[152] ;
+  wire \gpio_defaults[153] ;
+  wire \gpio_defaults[154] ;
+  wire \gpio_defaults[155] ;
+  wire \gpio_defaults[156] ;
+  wire \gpio_defaults[157] ;
+  wire \gpio_defaults[158] ;
+  wire \gpio_defaults[159] ;
+  wire \gpio_defaults[15] ;
+  wire \gpio_defaults[160] ;
+  wire \gpio_defaults[161] ;
+  wire \gpio_defaults[162] ;
+  wire \gpio_defaults[163] ;
+  wire \gpio_defaults[164] ;
+  wire \gpio_defaults[165] ;
+  wire \gpio_defaults[166] ;
+  wire \gpio_defaults[167] ;
+  wire \gpio_defaults[168] ;
+  wire \gpio_defaults[169] ;
+  wire \gpio_defaults[16] ;
+  wire \gpio_defaults[170] ;
+  wire \gpio_defaults[171] ;
+  wire \gpio_defaults[172] ;
+  wire \gpio_defaults[173] ;
+  wire \gpio_defaults[174] ;
+  wire \gpio_defaults[175] ;
+  wire \gpio_defaults[176] ;
+  wire \gpio_defaults[177] ;
+  wire \gpio_defaults[178] ;
+  wire \gpio_defaults[179] ;
+  wire \gpio_defaults[17] ;
+  wire \gpio_defaults[180] ;
+  wire \gpio_defaults[181] ;
+  wire \gpio_defaults[182] ;
+  wire \gpio_defaults[183] ;
+  wire \gpio_defaults[184] ;
+  wire \gpio_defaults[185] ;
+  wire \gpio_defaults[186] ;
+  wire \gpio_defaults[187] ;
+  wire \gpio_defaults[188] ;
+  wire \gpio_defaults[189] ;
+  wire \gpio_defaults[18] ;
+  wire \gpio_defaults[190] ;
+  wire \gpio_defaults[191] ;
+  wire \gpio_defaults[192] ;
+  wire \gpio_defaults[193] ;
+  wire \gpio_defaults[194] ;
+  wire \gpio_defaults[195] ;
+  wire \gpio_defaults[196] ;
+  wire \gpio_defaults[197] ;
+  wire \gpio_defaults[198] ;
+  wire \gpio_defaults[199] ;
+  wire \gpio_defaults[19] ;
+  wire \gpio_defaults[1] ;
+  wire \gpio_defaults[200] ;
+  wire \gpio_defaults[201] ;
+  wire \gpio_defaults[202] ;
+  wire \gpio_defaults[203] ;
+  wire \gpio_defaults[204] ;
+  wire \gpio_defaults[205] ;
+  wire \gpio_defaults[206] ;
+  wire \gpio_defaults[207] ;
+  wire \gpio_defaults[208] ;
+  wire \gpio_defaults[209] ;
+  wire \gpio_defaults[20] ;
+  wire \gpio_defaults[210] ;
+  wire \gpio_defaults[211] ;
+  wire \gpio_defaults[212] ;
+  wire \gpio_defaults[213] ;
+  wire \gpio_defaults[214] ;
+  wire \gpio_defaults[215] ;
+  wire \gpio_defaults[216] ;
+  wire \gpio_defaults[217] ;
+  wire \gpio_defaults[218] ;
+  wire \gpio_defaults[219] ;
+  wire \gpio_defaults[21] ;
+  wire \gpio_defaults[220] ;
+  wire \gpio_defaults[221] ;
+  wire \gpio_defaults[222] ;
+  wire \gpio_defaults[223] ;
+  wire \gpio_defaults[224] ;
+  wire \gpio_defaults[225] ;
+  wire \gpio_defaults[226] ;
+  wire \gpio_defaults[227] ;
+  wire \gpio_defaults[228] ;
+  wire \gpio_defaults[229] ;
+  wire \gpio_defaults[22] ;
+  wire \gpio_defaults[230] ;
+  wire \gpio_defaults[231] ;
+  wire \gpio_defaults[232] ;
+  wire \gpio_defaults[233] ;
+  wire \gpio_defaults[234] ;
+  wire \gpio_defaults[235] ;
+  wire \gpio_defaults[236] ;
+  wire \gpio_defaults[237] ;
+  wire \gpio_defaults[238] ;
+  wire \gpio_defaults[239] ;
+  wire \gpio_defaults[23] ;
+  wire \gpio_defaults[240] ;
+  wire \gpio_defaults[241] ;
+  wire \gpio_defaults[242] ;
+  wire \gpio_defaults[243] ;
+  wire \gpio_defaults[244] ;
+  wire \gpio_defaults[245] ;
+  wire \gpio_defaults[246] ;
+  wire \gpio_defaults[247] ;
+  wire \gpio_defaults[248] ;
+  wire \gpio_defaults[249] ;
+  wire \gpio_defaults[24] ;
+  wire \gpio_defaults[250] ;
+  wire \gpio_defaults[251] ;
+  wire \gpio_defaults[252] ;
+  wire \gpio_defaults[253] ;
+  wire \gpio_defaults[254] ;
+  wire \gpio_defaults[255] ;
+  wire \gpio_defaults[256] ;
+  wire \gpio_defaults[257] ;
+  wire \gpio_defaults[258] ;
+  wire \gpio_defaults[259] ;
+  wire \gpio_defaults[25] ;
+  wire \gpio_defaults[260] ;
+  wire \gpio_defaults[261] ;
+  wire \gpio_defaults[262] ;
+  wire \gpio_defaults[263] ;
+  wire \gpio_defaults[264] ;
+  wire \gpio_defaults[265] ;
+  wire \gpio_defaults[266] ;
+  wire \gpio_defaults[267] ;
+  wire \gpio_defaults[268] ;
+  wire \gpio_defaults[269] ;
+  wire \gpio_defaults[26] ;
+  wire \gpio_defaults[270] ;
+  wire \gpio_defaults[271] ;
+  wire \gpio_defaults[272] ;
+  wire \gpio_defaults[273] ;
+  wire \gpio_defaults[274] ;
+  wire \gpio_defaults[275] ;
+  wire \gpio_defaults[276] ;
+  wire \gpio_defaults[277] ;
+  wire \gpio_defaults[278] ;
+  wire \gpio_defaults[279] ;
+  wire \gpio_defaults[27] ;
+  wire \gpio_defaults[280] ;
+  wire \gpio_defaults[281] ;
+  wire \gpio_defaults[282] ;
+  wire \gpio_defaults[283] ;
+  wire \gpio_defaults[284] ;
+  wire \gpio_defaults[285] ;
+  wire \gpio_defaults[286] ;
+  wire \gpio_defaults[287] ;
+  wire \gpio_defaults[288] ;
+  wire \gpio_defaults[289] ;
+  wire \gpio_defaults[28] ;
+  wire \gpio_defaults[290] ;
+  wire \gpio_defaults[291] ;
+  wire \gpio_defaults[292] ;
+  wire \gpio_defaults[293] ;
+  wire \gpio_defaults[294] ;
+  wire \gpio_defaults[295] ;
+  wire \gpio_defaults[296] ;
+  wire \gpio_defaults[297] ;
+  wire \gpio_defaults[298] ;
+  wire \gpio_defaults[299] ;
+  wire \gpio_defaults[29] ;
+  wire \gpio_defaults[2] ;
+  wire \gpio_defaults[300] ;
+  wire \gpio_defaults[301] ;
+  wire \gpio_defaults[302] ;
+  wire \gpio_defaults[303] ;
+  wire \gpio_defaults[304] ;
+  wire \gpio_defaults[305] ;
+  wire \gpio_defaults[306] ;
+  wire \gpio_defaults[307] ;
+  wire \gpio_defaults[308] ;
+  wire \gpio_defaults[309] ;
+  wire \gpio_defaults[30] ;
+  wire \gpio_defaults[310] ;
+  wire \gpio_defaults[311] ;
+  wire \gpio_defaults[312] ;
+  wire \gpio_defaults[313] ;
+  wire \gpio_defaults[314] ;
+  wire \gpio_defaults[315] ;
+  wire \gpio_defaults[316] ;
+  wire \gpio_defaults[317] ;
+  wire \gpio_defaults[318] ;
+  wire \gpio_defaults[319] ;
+  wire \gpio_defaults[31] ;
+  wire \gpio_defaults[320] ;
+  wire \gpio_defaults[321] ;
+  wire \gpio_defaults[322] ;
+  wire \gpio_defaults[323] ;
+  wire \gpio_defaults[324] ;
+  wire \gpio_defaults[325] ;
+  wire \gpio_defaults[326] ;
+  wire \gpio_defaults[327] ;
+  wire \gpio_defaults[328] ;
+  wire \gpio_defaults[329] ;
+  wire \gpio_defaults[32] ;
+  wire \gpio_defaults[330] ;
+  wire \gpio_defaults[331] ;
+  wire \gpio_defaults[332] ;
+  wire \gpio_defaults[333] ;
+  wire \gpio_defaults[334] ;
+  wire \gpio_defaults[335] ;
+  wire \gpio_defaults[336] ;
+  wire \gpio_defaults[337] ;
+  wire \gpio_defaults[338] ;
+  wire \gpio_defaults[339] ;
+  wire \gpio_defaults[33] ;
+  wire \gpio_defaults[340] ;
+  wire \gpio_defaults[341] ;
+  wire \gpio_defaults[342] ;
+  wire \gpio_defaults[343] ;
+  wire \gpio_defaults[344] ;
+  wire \gpio_defaults[345] ;
+  wire \gpio_defaults[346] ;
+  wire \gpio_defaults[347] ;
+  wire \gpio_defaults[348] ;
+  wire \gpio_defaults[349] ;
+  wire \gpio_defaults[34] ;
+  wire \gpio_defaults[350] ;
+  wire \gpio_defaults[351] ;
+  wire \gpio_defaults[352] ;
+  wire \gpio_defaults[353] ;
+  wire \gpio_defaults[354] ;
+  wire \gpio_defaults[355] ;
+  wire \gpio_defaults[356] ;
+  wire \gpio_defaults[357] ;
+  wire \gpio_defaults[358] ;
+  wire \gpio_defaults[359] ;
+  wire \gpio_defaults[35] ;
+  wire \gpio_defaults[360] ;
+  wire \gpio_defaults[361] ;
+  wire \gpio_defaults[362] ;
+  wire \gpio_defaults[363] ;
+  wire \gpio_defaults[364] ;
+  wire \gpio_defaults[365] ;
+  wire \gpio_defaults[366] ;
+  wire \gpio_defaults[367] ;
+  wire \gpio_defaults[368] ;
+  wire \gpio_defaults[369] ;
+  wire \gpio_defaults[36] ;
+  wire \gpio_defaults[370] ;
+  wire \gpio_defaults[371] ;
+  wire \gpio_defaults[372] ;
+  wire \gpio_defaults[373] ;
+  wire \gpio_defaults[374] ;
+  wire \gpio_defaults[375] ;
+  wire \gpio_defaults[376] ;
+  wire \gpio_defaults[377] ;
+  wire \gpio_defaults[378] ;
+  wire \gpio_defaults[379] ;
+  wire \gpio_defaults[37] ;
+  wire \gpio_defaults[380] ;
+  wire \gpio_defaults[381] ;
+  wire \gpio_defaults[382] ;
+  wire \gpio_defaults[383] ;
+  wire \gpio_defaults[384] ;
+  wire \gpio_defaults[385] ;
+  wire \gpio_defaults[386] ;
+  wire \gpio_defaults[387] ;
+  wire \gpio_defaults[388] ;
+  wire \gpio_defaults[389] ;
+  wire \gpio_defaults[38] ;
+  wire \gpio_defaults[390] ;
+  wire \gpio_defaults[391] ;
+  wire \gpio_defaults[392] ;
+  wire \gpio_defaults[393] ;
+  wire \gpio_defaults[394] ;
+  wire \gpio_defaults[395] ;
+  wire \gpio_defaults[396] ;
+  wire \gpio_defaults[397] ;
+  wire \gpio_defaults[398] ;
+  wire \gpio_defaults[399] ;
+  wire \gpio_defaults[39] ;
+  wire \gpio_defaults[3] ;
+  wire \gpio_defaults[400] ;
+  wire \gpio_defaults[401] ;
+  wire \gpio_defaults[402] ;
+  wire \gpio_defaults[403] ;
+  wire \gpio_defaults[404] ;
+  wire \gpio_defaults[405] ;
+  wire \gpio_defaults[406] ;
+  wire \gpio_defaults[407] ;
+  wire \gpio_defaults[408] ;
+  wire \gpio_defaults[409] ;
+  wire \gpio_defaults[40] ;
+  wire \gpio_defaults[410] ;
+  wire \gpio_defaults[411] ;
+  wire \gpio_defaults[412] ;
+  wire \gpio_defaults[413] ;
+  wire \gpio_defaults[414] ;
+  wire \gpio_defaults[415] ;
+  wire \gpio_defaults[416] ;
+  wire \gpio_defaults[417] ;
+  wire \gpio_defaults[418] ;
+  wire \gpio_defaults[419] ;
+  wire \gpio_defaults[41] ;
+  wire \gpio_defaults[420] ;
+  wire \gpio_defaults[421] ;
+  wire \gpio_defaults[422] ;
+  wire \gpio_defaults[423] ;
+  wire \gpio_defaults[424] ;
+  wire \gpio_defaults[425] ;
+  wire \gpio_defaults[426] ;
+  wire \gpio_defaults[427] ;
+  wire \gpio_defaults[428] ;
+  wire \gpio_defaults[429] ;
+  wire \gpio_defaults[42] ;
+  wire \gpio_defaults[430] ;
+  wire \gpio_defaults[431] ;
+  wire \gpio_defaults[432] ;
+  wire \gpio_defaults[433] ;
+  wire \gpio_defaults[434] ;
+  wire \gpio_defaults[435] ;
+  wire \gpio_defaults[436] ;
+  wire \gpio_defaults[437] ;
+  wire \gpio_defaults[438] ;
+  wire \gpio_defaults[439] ;
+  wire \gpio_defaults[43] ;
+  wire \gpio_defaults[440] ;
+  wire \gpio_defaults[441] ;
+  wire \gpio_defaults[442] ;
+  wire \gpio_defaults[443] ;
+  wire \gpio_defaults[444] ;
+  wire \gpio_defaults[445] ;
+  wire \gpio_defaults[446] ;
+  wire \gpio_defaults[447] ;
+  wire \gpio_defaults[448] ;
+  wire \gpio_defaults[449] ;
+  wire \gpio_defaults[44] ;
+  wire \gpio_defaults[450] ;
+  wire \gpio_defaults[451] ;
+  wire \gpio_defaults[452] ;
+  wire \gpio_defaults[453] ;
+  wire \gpio_defaults[454] ;
+  wire \gpio_defaults[455] ;
+  wire \gpio_defaults[456] ;
+  wire \gpio_defaults[457] ;
+  wire \gpio_defaults[458] ;
+  wire \gpio_defaults[459] ;
+  wire \gpio_defaults[45] ;
+  wire \gpio_defaults[460] ;
+  wire \gpio_defaults[461] ;
+  wire \gpio_defaults[462] ;
+  wire \gpio_defaults[463] ;
+  wire \gpio_defaults[464] ;
+  wire \gpio_defaults[465] ;
+  wire \gpio_defaults[466] ;
+  wire \gpio_defaults[467] ;
+  wire \gpio_defaults[468] ;
+  wire \gpio_defaults[469] ;
+  wire \gpio_defaults[46] ;
+  wire \gpio_defaults[470] ;
+  wire \gpio_defaults[471] ;
+  wire \gpio_defaults[472] ;
+  wire \gpio_defaults[473] ;
+  wire \gpio_defaults[474] ;
+  wire \gpio_defaults[475] ;
+  wire \gpio_defaults[476] ;
+  wire \gpio_defaults[477] ;
+  wire \gpio_defaults[478] ;
+  wire \gpio_defaults[479] ;
+  wire \gpio_defaults[47] ;
+  wire \gpio_defaults[480] ;
+  wire \gpio_defaults[481] ;
+  wire \gpio_defaults[482] ;
+  wire \gpio_defaults[483] ;
+  wire \gpio_defaults[484] ;
+  wire \gpio_defaults[485] ;
+  wire \gpio_defaults[486] ;
+  wire \gpio_defaults[487] ;
+  wire \gpio_defaults[488] ;
+  wire \gpio_defaults[489] ;
+  wire \gpio_defaults[48] ;
+  wire \gpio_defaults[490] ;
+  wire \gpio_defaults[491] ;
+  wire \gpio_defaults[492] ;
+  wire \gpio_defaults[493] ;
+  wire \gpio_defaults[49] ;
+  wire \gpio_defaults[4] ;
+  wire \gpio_defaults[50] ;
+  wire \gpio_defaults[51] ;
+  wire \gpio_defaults[52] ;
+  wire \gpio_defaults[53] ;
+  wire \gpio_defaults[54] ;
+  wire \gpio_defaults[55] ;
+  wire \gpio_defaults[56] ;
+  wire \gpio_defaults[57] ;
+  wire \gpio_defaults[58] ;
+  wire \gpio_defaults[59] ;
+  wire \gpio_defaults[5] ;
+  wire \gpio_defaults[60] ;
+  wire \gpio_defaults[61] ;
+  wire \gpio_defaults[62] ;
+  wire \gpio_defaults[63] ;
+  wire \gpio_defaults[64] ;
+  wire \gpio_defaults[65] ;
+  wire \gpio_defaults[66] ;
+  wire \gpio_defaults[67] ;
+  wire \gpio_defaults[68] ;
+  wire \gpio_defaults[69] ;
+  wire \gpio_defaults[6] ;
+  wire \gpio_defaults[70] ;
+  wire \gpio_defaults[71] ;
+  wire \gpio_defaults[72] ;
+  wire \gpio_defaults[73] ;
+  wire \gpio_defaults[74] ;
+  wire \gpio_defaults[75] ;
+  wire \gpio_defaults[76] ;
+  wire \gpio_defaults[77] ;
+  wire \gpio_defaults[78] ;
+  wire \gpio_defaults[79] ;
+  wire \gpio_defaults[7] ;
+  wire \gpio_defaults[80] ;
+  wire \gpio_defaults[81] ;
+  wire \gpio_defaults[82] ;
+  wire \gpio_defaults[83] ;
+  wire \gpio_defaults[84] ;
+  wire \gpio_defaults[85] ;
+  wire \gpio_defaults[86] ;
+  wire \gpio_defaults[87] ;
+  wire \gpio_defaults[88] ;
+  wire \gpio_defaults[89] ;
+  wire \gpio_defaults[8] ;
+  wire \gpio_defaults[90] ;
+  wire \gpio_defaults[91] ;
+  wire \gpio_defaults[92] ;
+  wire \gpio_defaults[93] ;
+  wire \gpio_defaults[94] ;
+  wire \gpio_defaults[95] ;
+  wire \gpio_defaults[96] ;
+  wire \gpio_defaults[97] ;
+  wire \gpio_defaults[98] ;
+  wire \gpio_defaults[99] ;
+  wire \gpio_defaults[9] ;
+  wire gpio_in_core;
+  wire gpio_inenb_core;
+  wire \gpio_load_1[0] ;
+  wire \gpio_load_1[10] ;
+  wire \gpio_load_1[11] ;
+  wire \gpio_load_1[12] ;
+  wire \gpio_load_1[13] ;
+  wire \gpio_load_1[14] ;
+  wire \gpio_load_1[15] ;
+  wire \gpio_load_1[16] ;
+  wire \gpio_load_1[17] ;
+  wire \gpio_load_1[18] ;
+  wire \gpio_load_1[1] ;
+  wire \gpio_load_1[2] ;
+  wire \gpio_load_1[3] ;
+  wire \gpio_load_1[4] ;
+  wire \gpio_load_1[5] ;
+  wire \gpio_load_1[6] ;
+  wire \gpio_load_1[7] ;
+  wire \gpio_load_1[8] ;
+  wire \gpio_load_1[9] ;
+  wire \gpio_load_1_shifted[0] ;
+  wire \gpio_load_1_shifted[10] ;
+  wire \gpio_load_1_shifted[11] ;
+  wire \gpio_load_1_shifted[12] ;
+  wire \gpio_load_1_shifted[13] ;
+  wire \gpio_load_1_shifted[14] ;
+  wire \gpio_load_1_shifted[15] ;
+  wire \gpio_load_1_shifted[16] ;
+  wire \gpio_load_1_shifted[17] ;
+  wire \gpio_load_1_shifted[18] ;
+  wire \gpio_load_1_shifted[1] ;
+  wire \gpio_load_1_shifted[2] ;
+  wire \gpio_load_1_shifted[3] ;
+  wire \gpio_load_1_shifted[4] ;
+  wire \gpio_load_1_shifted[5] ;
+  wire \gpio_load_1_shifted[6] ;
+  wire \gpio_load_1_shifted[7] ;
+  wire \gpio_load_1_shifted[8] ;
+  wire \gpio_load_1_shifted[9] ;
+  wire \gpio_load_2[0] ;
+  wire \gpio_load_2[10] ;
+  wire \gpio_load_2[11] ;
+  wire \gpio_load_2[12] ;
+  wire \gpio_load_2[13] ;
+  wire \gpio_load_2[14] ;
+  wire \gpio_load_2[15] ;
+  wire \gpio_load_2[16] ;
+  wire \gpio_load_2[17] ;
+  wire \gpio_load_2[18] ;
+  wire \gpio_load_2[1] ;
+  wire \gpio_load_2[2] ;
+  wire \gpio_load_2[3] ;
+  wire \gpio_load_2[4] ;
+  wire \gpio_load_2[5] ;
+  wire \gpio_load_2[6] ;
+  wire \gpio_load_2[7] ;
+  wire \gpio_load_2[8] ;
+  wire \gpio_load_2[9] ;
+  wire \gpio_load_2_shifted[0] ;
+  wire \gpio_load_2_shifted[10] ;
+  wire \gpio_load_2_shifted[11] ;
+  wire \gpio_load_2_shifted[12] ;
+  wire \gpio_load_2_shifted[13] ;
+  wire \gpio_load_2_shifted[14] ;
+  wire \gpio_load_2_shifted[15] ;
+  wire \gpio_load_2_shifted[16] ;
+  wire \gpio_load_2_shifted[17] ;
+  wire \gpio_load_2_shifted[18] ;
+  wire \gpio_load_2_shifted[1] ;
+  wire \gpio_load_2_shifted[2] ;
+  wire \gpio_load_2_shifted[3] ;
+  wire \gpio_load_2_shifted[4] ;
+  wire \gpio_load_2_shifted[5] ;
+  wire \gpio_load_2_shifted[6] ;
+  wire \gpio_load_2_shifted[7] ;
+  wire \gpio_load_2_shifted[8] ;
+  wire \gpio_load_2_shifted[9] ;
+  wire gpio_mode0_core;
+  wire gpio_mode1_core;
+  wire gpio_out_core;
+  wire gpio_outenb_core;
+  wire \gpio_resetn_1[0] ;
+  wire \gpio_resetn_1[10] ;
+  wire \gpio_resetn_1[11] ;
+  wire \gpio_resetn_1[12] ;
+  wire \gpio_resetn_1[13] ;
+  wire \gpio_resetn_1[14] ;
+  wire \gpio_resetn_1[15] ;
+  wire \gpio_resetn_1[16] ;
+  wire \gpio_resetn_1[17] ;
+  wire \gpio_resetn_1[18] ;
+  wire \gpio_resetn_1[1] ;
+  wire \gpio_resetn_1[2] ;
+  wire \gpio_resetn_1[3] ;
+  wire \gpio_resetn_1[4] ;
+  wire \gpio_resetn_1[5] ;
+  wire \gpio_resetn_1[6] ;
+  wire \gpio_resetn_1[7] ;
+  wire \gpio_resetn_1[8] ;
+  wire \gpio_resetn_1[9] ;
+  wire \gpio_resetn_1_shifted[0] ;
+  wire \gpio_resetn_1_shifted[10] ;
+  wire \gpio_resetn_1_shifted[11] ;
+  wire \gpio_resetn_1_shifted[12] ;
+  wire \gpio_resetn_1_shifted[13] ;
+  wire \gpio_resetn_1_shifted[14] ;
+  wire \gpio_resetn_1_shifted[15] ;
+  wire \gpio_resetn_1_shifted[16] ;
+  wire \gpio_resetn_1_shifted[17] ;
+  wire \gpio_resetn_1_shifted[18] ;
+  wire \gpio_resetn_1_shifted[1] ;
+  wire \gpio_resetn_1_shifted[2] ;
+  wire \gpio_resetn_1_shifted[3] ;
+  wire \gpio_resetn_1_shifted[4] ;
+  wire \gpio_resetn_1_shifted[5] ;
+  wire \gpio_resetn_1_shifted[6] ;
+  wire \gpio_resetn_1_shifted[7] ;
+  wire \gpio_resetn_1_shifted[8] ;
+  wire \gpio_resetn_1_shifted[9] ;
+  wire \gpio_resetn_2[0] ;
+  wire \gpio_resetn_2[10] ;
+  wire \gpio_resetn_2[11] ;
+  wire \gpio_resetn_2[12] ;
+  wire \gpio_resetn_2[13] ;
+  wire \gpio_resetn_2[14] ;
+  wire \gpio_resetn_2[15] ;
+  wire \gpio_resetn_2[16] ;
+  wire \gpio_resetn_2[17] ;
+  wire \gpio_resetn_2[18] ;
+  wire \gpio_resetn_2[1] ;
+  wire \gpio_resetn_2[2] ;
+  wire \gpio_resetn_2[3] ;
+  wire \gpio_resetn_2[4] ;
+  wire \gpio_resetn_2[5] ;
+  wire \gpio_resetn_2[6] ;
+  wire \gpio_resetn_2[7] ;
+  wire \gpio_resetn_2[8] ;
+  wire \gpio_resetn_2[9] ;
+  wire \gpio_resetn_2_shifted[0] ;
+  wire \gpio_resetn_2_shifted[10] ;
+  wire \gpio_resetn_2_shifted[11] ;
+  wire \gpio_resetn_2_shifted[12] ;
+  wire \gpio_resetn_2_shifted[13] ;
+  wire \gpio_resetn_2_shifted[14] ;
+  wire \gpio_resetn_2_shifted[15] ;
+  wire \gpio_resetn_2_shifted[16] ;
+  wire \gpio_resetn_2_shifted[17] ;
+  wire \gpio_resetn_2_shifted[18] ;
+  wire \gpio_resetn_2_shifted[1] ;
+  wire \gpio_resetn_2_shifted[2] ;
+  wire \gpio_resetn_2_shifted[3] ;
+  wire \gpio_resetn_2_shifted[4] ;
+  wire \gpio_resetn_2_shifted[5] ;
+  wire \gpio_resetn_2_shifted[6] ;
+  wire \gpio_resetn_2_shifted[7] ;
+  wire \gpio_resetn_2_shifted[8] ;
+  wire \gpio_resetn_2_shifted[9] ;
+  wire \gpio_serial_link_1[0] ;
+  wire \gpio_serial_link_1[10] ;
+  wire \gpio_serial_link_1[11] ;
+  wire \gpio_serial_link_1[12] ;
+  wire \gpio_serial_link_1[13] ;
+  wire \gpio_serial_link_1[14] ;
+  wire \gpio_serial_link_1[15] ;
+  wire \gpio_serial_link_1[16] ;
+  wire \gpio_serial_link_1[17] ;
+  wire \gpio_serial_link_1[18] ;
+  wire \gpio_serial_link_1[1] ;
+  wire \gpio_serial_link_1[2] ;
+  wire \gpio_serial_link_1[3] ;
+  wire \gpio_serial_link_1[4] ;
+  wire \gpio_serial_link_1[5] ;
+  wire \gpio_serial_link_1[6] ;
+  wire \gpio_serial_link_1[7] ;
+  wire \gpio_serial_link_1[8] ;
+  wire \gpio_serial_link_1[9] ;
+  wire \gpio_serial_link_1_shifted[0] ;
+  wire \gpio_serial_link_1_shifted[10] ;
+  wire \gpio_serial_link_1_shifted[11] ;
+  wire \gpio_serial_link_1_shifted[12] ;
+  wire \gpio_serial_link_1_shifted[13] ;
+  wire \gpio_serial_link_1_shifted[14] ;
+  wire \gpio_serial_link_1_shifted[15] ;
+  wire \gpio_serial_link_1_shifted[16] ;
+  wire \gpio_serial_link_1_shifted[17] ;
+  wire \gpio_serial_link_1_shifted[18] ;
+  wire \gpio_serial_link_1_shifted[1] ;
+  wire \gpio_serial_link_1_shifted[2] ;
+  wire \gpio_serial_link_1_shifted[3] ;
+  wire \gpio_serial_link_1_shifted[4] ;
+  wire \gpio_serial_link_1_shifted[5] ;
+  wire \gpio_serial_link_1_shifted[6] ;
+  wire \gpio_serial_link_1_shifted[7] ;
+  wire \gpio_serial_link_1_shifted[8] ;
+  wire \gpio_serial_link_1_shifted[9] ;
+  wire \gpio_serial_link_2[0] ;
+  wire \gpio_serial_link_2[10] ;
+  wire \gpio_serial_link_2[11] ;
+  wire \gpio_serial_link_2[12] ;
+  wire \gpio_serial_link_2[13] ;
+  wire \gpio_serial_link_2[14] ;
+  wire \gpio_serial_link_2[15] ;
+  wire \gpio_serial_link_2[16] ;
+  wire \gpio_serial_link_2[17] ;
+  wire \gpio_serial_link_2[18] ;
+  wire \gpio_serial_link_2[1] ;
+  wire \gpio_serial_link_2[2] ;
+  wire \gpio_serial_link_2[3] ;
+  wire \gpio_serial_link_2[4] ;
+  wire \gpio_serial_link_2[5] ;
+  wire \gpio_serial_link_2[6] ;
+  wire \gpio_serial_link_2[7] ;
+  wire \gpio_serial_link_2[8] ;
+  wire \gpio_serial_link_2[9] ;
+  wire \gpio_serial_link_2_shifted[0] ;
+  wire \gpio_serial_link_2_shifted[10] ;
+  wire \gpio_serial_link_2_shifted[11] ;
+  wire \gpio_serial_link_2_shifted[12] ;
+  wire \gpio_serial_link_2_shifted[13] ;
+  wire \gpio_serial_link_2_shifted[14] ;
+  wire \gpio_serial_link_2_shifted[15] ;
+  wire \gpio_serial_link_2_shifted[16] ;
+  wire \gpio_serial_link_2_shifted[17] ;
+  wire \gpio_serial_link_2_shifted[18] ;
+  wire \gpio_serial_link_2_shifted[1] ;
+  wire \gpio_serial_link_2_shifted[2] ;
+  wire \gpio_serial_link_2_shifted[3] ;
+  wire \gpio_serial_link_2_shifted[4] ;
+  wire \gpio_serial_link_2_shifted[5] ;
+  wire \gpio_serial_link_2_shifted[6] ;
+  wire \gpio_serial_link_2_shifted[7] ;
+  wire \gpio_serial_link_2_shifted[8] ;
+  wire \gpio_serial_link_2_shifted[9] ;
+  wire hk_ack_i;
+  wire hk_cyc_o;
+  wire \hk_dat_i[0] ;
+  wire \hk_dat_i[10] ;
+  wire \hk_dat_i[11] ;
+  wire \hk_dat_i[12] ;
+  wire \hk_dat_i[13] ;
+  wire \hk_dat_i[14] ;
+  wire \hk_dat_i[15] ;
+  wire \hk_dat_i[16] ;
+  wire \hk_dat_i[17] ;
+  wire \hk_dat_i[18] ;
+  wire \hk_dat_i[19] ;
+  wire \hk_dat_i[1] ;
+  wire \hk_dat_i[20] ;
+  wire \hk_dat_i[21] ;
+  wire \hk_dat_i[22] ;
+  wire \hk_dat_i[23] ;
+  wire \hk_dat_i[24] ;
+  wire \hk_dat_i[25] ;
+  wire \hk_dat_i[26] ;
+  wire \hk_dat_i[27] ;
+  wire \hk_dat_i[28] ;
+  wire \hk_dat_i[29] ;
+  wire \hk_dat_i[2] ;
+  wire \hk_dat_i[30] ;
+  wire \hk_dat_i[31] ;
+  wire \hk_dat_i[3] ;
+  wire \hk_dat_i[4] ;
+  wire \hk_dat_i[5] ;
+  wire \hk_dat_i[6] ;
+  wire \hk_dat_i[7] ;
+  wire \hk_dat_i[8] ;
+  wire \hk_dat_i[9] ;
+  wire hk_stb_o;
+  wire \irq_spi[0] ;
+  wire \irq_spi[1] ;
+  wire \irq_spi[2] ;
+  wire \la_data_in_mprj[0] ;
+  wire \la_data_in_mprj[100] ;
+  wire \la_data_in_mprj[101] ;
+  wire \la_data_in_mprj[102] ;
+  wire \la_data_in_mprj[103] ;
+  wire \la_data_in_mprj[104] ;
+  wire \la_data_in_mprj[105] ;
+  wire \la_data_in_mprj[106] ;
+  wire \la_data_in_mprj[107] ;
+  wire \la_data_in_mprj[108] ;
+  wire \la_data_in_mprj[109] ;
+  wire \la_data_in_mprj[10] ;
+  wire \la_data_in_mprj[110] ;
+  wire \la_data_in_mprj[111] ;
+  wire \la_data_in_mprj[112] ;
+  wire \la_data_in_mprj[113] ;
+  wire \la_data_in_mprj[114] ;
+  wire \la_data_in_mprj[115] ;
+  wire \la_data_in_mprj[116] ;
+  wire \la_data_in_mprj[117] ;
+  wire \la_data_in_mprj[118] ;
+  wire \la_data_in_mprj[119] ;
+  wire \la_data_in_mprj[11] ;
+  wire \la_data_in_mprj[120] ;
+  wire \la_data_in_mprj[121] ;
+  wire \la_data_in_mprj[122] ;
+  wire \la_data_in_mprj[123] ;
+  wire \la_data_in_mprj[124] ;
+  wire \la_data_in_mprj[125] ;
+  wire \la_data_in_mprj[126] ;
+  wire \la_data_in_mprj[127] ;
+  wire \la_data_in_mprj[12] ;
+  wire \la_data_in_mprj[13] ;
+  wire \la_data_in_mprj[14] ;
+  wire \la_data_in_mprj[15] ;
+  wire \la_data_in_mprj[16] ;
+  wire \la_data_in_mprj[17] ;
+  wire \la_data_in_mprj[18] ;
+  wire \la_data_in_mprj[19] ;
+  wire \la_data_in_mprj[1] ;
+  wire \la_data_in_mprj[20] ;
+  wire \la_data_in_mprj[21] ;
+  wire \la_data_in_mprj[22] ;
+  wire \la_data_in_mprj[23] ;
+  wire \la_data_in_mprj[24] ;
+  wire \la_data_in_mprj[25] ;
+  wire \la_data_in_mprj[26] ;
+  wire \la_data_in_mprj[27] ;
+  wire \la_data_in_mprj[28] ;
+  wire \la_data_in_mprj[29] ;
+  wire \la_data_in_mprj[2] ;
+  wire \la_data_in_mprj[30] ;
+  wire \la_data_in_mprj[31] ;
+  wire \la_data_in_mprj[32] ;
+  wire \la_data_in_mprj[33] ;
+  wire \la_data_in_mprj[34] ;
+  wire \la_data_in_mprj[35] ;
+  wire \la_data_in_mprj[36] ;
+  wire \la_data_in_mprj[37] ;
+  wire \la_data_in_mprj[38] ;
+  wire \la_data_in_mprj[39] ;
+  wire \la_data_in_mprj[3] ;
+  wire \la_data_in_mprj[40] ;
+  wire \la_data_in_mprj[41] ;
+  wire \la_data_in_mprj[42] ;
+  wire \la_data_in_mprj[43] ;
+  wire \la_data_in_mprj[44] ;
+  wire \la_data_in_mprj[45] ;
+  wire \la_data_in_mprj[46] ;
+  wire \la_data_in_mprj[47] ;
+  wire \la_data_in_mprj[48] ;
+  wire \la_data_in_mprj[49] ;
+  wire \la_data_in_mprj[4] ;
+  wire \la_data_in_mprj[50] ;
+  wire \la_data_in_mprj[51] ;
+  wire \la_data_in_mprj[52] ;
+  wire \la_data_in_mprj[53] ;
+  wire \la_data_in_mprj[54] ;
+  wire \la_data_in_mprj[55] ;
+  wire \la_data_in_mprj[56] ;
+  wire \la_data_in_mprj[57] ;
+  wire \la_data_in_mprj[58] ;
+  wire \la_data_in_mprj[59] ;
+  wire \la_data_in_mprj[5] ;
+  wire \la_data_in_mprj[60] ;
+  wire \la_data_in_mprj[61] ;
+  wire \la_data_in_mprj[62] ;
+  wire \la_data_in_mprj[63] ;
+  wire \la_data_in_mprj[64] ;
+  wire \la_data_in_mprj[65] ;
+  wire \la_data_in_mprj[66] ;
+  wire \la_data_in_mprj[67] ;
+  wire \la_data_in_mprj[68] ;
+  wire \la_data_in_mprj[69] ;
+  wire \la_data_in_mprj[6] ;
+  wire \la_data_in_mprj[70] ;
+  wire \la_data_in_mprj[71] ;
+  wire \la_data_in_mprj[72] ;
+  wire \la_data_in_mprj[73] ;
+  wire \la_data_in_mprj[74] ;
+  wire \la_data_in_mprj[75] ;
+  wire \la_data_in_mprj[76] ;
+  wire \la_data_in_mprj[77] ;
+  wire \la_data_in_mprj[78] ;
+  wire \la_data_in_mprj[79] ;
+  wire \la_data_in_mprj[7] ;
+  wire \la_data_in_mprj[80] ;
+  wire \la_data_in_mprj[81] ;
+  wire \la_data_in_mprj[82] ;
+  wire \la_data_in_mprj[83] ;
+  wire \la_data_in_mprj[84] ;
+  wire \la_data_in_mprj[85] ;
+  wire \la_data_in_mprj[86] ;
+  wire \la_data_in_mprj[87] ;
+  wire \la_data_in_mprj[88] ;
+  wire \la_data_in_mprj[89] ;
+  wire \la_data_in_mprj[8] ;
+  wire \la_data_in_mprj[90] ;
+  wire \la_data_in_mprj[91] ;
+  wire \la_data_in_mprj[92] ;
+  wire \la_data_in_mprj[93] ;
+  wire \la_data_in_mprj[94] ;
+  wire \la_data_in_mprj[95] ;
+  wire \la_data_in_mprj[96] ;
+  wire \la_data_in_mprj[97] ;
+  wire \la_data_in_mprj[98] ;
+  wire \la_data_in_mprj[99] ;
+  wire \la_data_in_mprj[9] ;
+  wire \la_data_in_user[0] ;
+  wire \la_data_in_user[100] ;
+  wire \la_data_in_user[101] ;
+  wire \la_data_in_user[102] ;
+  wire \la_data_in_user[103] ;
+  wire \la_data_in_user[104] ;
+  wire \la_data_in_user[105] ;
+  wire \la_data_in_user[106] ;
+  wire \la_data_in_user[107] ;
+  wire \la_data_in_user[108] ;
+  wire \la_data_in_user[109] ;
+  wire \la_data_in_user[10] ;
+  wire \la_data_in_user[110] ;
+  wire \la_data_in_user[111] ;
+  wire \la_data_in_user[112] ;
+  wire \la_data_in_user[113] ;
+  wire \la_data_in_user[114] ;
+  wire \la_data_in_user[115] ;
+  wire \la_data_in_user[116] ;
+  wire \la_data_in_user[117] ;
+  wire \la_data_in_user[118] ;
+  wire \la_data_in_user[119] ;
+  wire \la_data_in_user[11] ;
+  wire \la_data_in_user[120] ;
+  wire \la_data_in_user[121] ;
+  wire \la_data_in_user[122] ;
+  wire \la_data_in_user[123] ;
+  wire \la_data_in_user[124] ;
+  wire \la_data_in_user[125] ;
+  wire \la_data_in_user[126] ;
+  wire \la_data_in_user[127] ;
+  wire \la_data_in_user[12] ;
+  wire \la_data_in_user[13] ;
+  wire \la_data_in_user[14] ;
+  wire \la_data_in_user[15] ;
+  wire \la_data_in_user[16] ;
+  wire \la_data_in_user[17] ;
+  wire \la_data_in_user[18] ;
+  wire \la_data_in_user[19] ;
+  wire \la_data_in_user[1] ;
+  wire \la_data_in_user[20] ;
+  wire \la_data_in_user[21] ;
+  wire \la_data_in_user[22] ;
+  wire \la_data_in_user[23] ;
+  wire \la_data_in_user[24] ;
+  wire \la_data_in_user[25] ;
+  wire \la_data_in_user[26] ;
+  wire \la_data_in_user[27] ;
+  wire \la_data_in_user[28] ;
+  wire \la_data_in_user[29] ;
+  wire \la_data_in_user[2] ;
+  wire \la_data_in_user[30] ;
+  wire \la_data_in_user[31] ;
+  wire \la_data_in_user[32] ;
+  wire \la_data_in_user[33] ;
+  wire \la_data_in_user[34] ;
+  wire \la_data_in_user[35] ;
+  wire \la_data_in_user[36] ;
+  wire \la_data_in_user[37] ;
+  wire \la_data_in_user[38] ;
+  wire \la_data_in_user[39] ;
+  wire \la_data_in_user[3] ;
+  wire \la_data_in_user[40] ;
+  wire \la_data_in_user[41] ;
+  wire \la_data_in_user[42] ;
+  wire \la_data_in_user[43] ;
+  wire \la_data_in_user[44] ;
+  wire \la_data_in_user[45] ;
+  wire \la_data_in_user[46] ;
+  wire \la_data_in_user[47] ;
+  wire \la_data_in_user[48] ;
+  wire \la_data_in_user[49] ;
+  wire \la_data_in_user[4] ;
+  wire \la_data_in_user[50] ;
+  wire \la_data_in_user[51] ;
+  wire \la_data_in_user[52] ;
+  wire \la_data_in_user[53] ;
+  wire \la_data_in_user[54] ;
+  wire \la_data_in_user[55] ;
+  wire \la_data_in_user[56] ;
+  wire \la_data_in_user[57] ;
+  wire \la_data_in_user[58] ;
+  wire \la_data_in_user[59] ;
+  wire \la_data_in_user[5] ;
+  wire \la_data_in_user[60] ;
+  wire \la_data_in_user[61] ;
+  wire \la_data_in_user[62] ;
+  wire \la_data_in_user[63] ;
+  wire \la_data_in_user[64] ;
+  wire \la_data_in_user[65] ;
+  wire \la_data_in_user[66] ;
+  wire \la_data_in_user[67] ;
+  wire \la_data_in_user[68] ;
+  wire \la_data_in_user[69] ;
+  wire \la_data_in_user[6] ;
+  wire \la_data_in_user[70] ;
+  wire \la_data_in_user[71] ;
+  wire \la_data_in_user[72] ;
+  wire \la_data_in_user[73] ;
+  wire \la_data_in_user[74] ;
+  wire \la_data_in_user[75] ;
+  wire \la_data_in_user[76] ;
+  wire \la_data_in_user[77] ;
+  wire \la_data_in_user[78] ;
+  wire \la_data_in_user[79] ;
+  wire \la_data_in_user[7] ;
+  wire \la_data_in_user[80] ;
+  wire \la_data_in_user[81] ;
+  wire \la_data_in_user[82] ;
+  wire \la_data_in_user[83] ;
+  wire \la_data_in_user[84] ;
+  wire \la_data_in_user[85] ;
+  wire \la_data_in_user[86] ;
+  wire \la_data_in_user[87] ;
+  wire \la_data_in_user[88] ;
+  wire \la_data_in_user[89] ;
+  wire \la_data_in_user[8] ;
+  wire \la_data_in_user[90] ;
+  wire \la_data_in_user[91] ;
+  wire \la_data_in_user[92] ;
+  wire \la_data_in_user[93] ;
+  wire \la_data_in_user[94] ;
+  wire \la_data_in_user[95] ;
+  wire \la_data_in_user[96] ;
+  wire \la_data_in_user[97] ;
+  wire \la_data_in_user[98] ;
+  wire \la_data_in_user[99] ;
+  wire \la_data_in_user[9] ;
+  wire \la_data_out_mprj[0] ;
+  wire \la_data_out_mprj[100] ;
+  wire \la_data_out_mprj[101] ;
+  wire \la_data_out_mprj[102] ;
+  wire \la_data_out_mprj[103] ;
+  wire \la_data_out_mprj[104] ;
+  wire \la_data_out_mprj[105] ;
+  wire \la_data_out_mprj[106] ;
+  wire \la_data_out_mprj[107] ;
+  wire \la_data_out_mprj[108] ;
+  wire \la_data_out_mprj[109] ;
+  wire \la_data_out_mprj[10] ;
+  wire \la_data_out_mprj[110] ;
+  wire \la_data_out_mprj[111] ;
+  wire \la_data_out_mprj[112] ;
+  wire \la_data_out_mprj[113] ;
+  wire \la_data_out_mprj[114] ;
+  wire \la_data_out_mprj[115] ;
+  wire \la_data_out_mprj[116] ;
+  wire \la_data_out_mprj[117] ;
+  wire \la_data_out_mprj[118] ;
+  wire \la_data_out_mprj[119] ;
+  wire \la_data_out_mprj[11] ;
+  wire \la_data_out_mprj[120] ;
+  wire \la_data_out_mprj[121] ;
+  wire \la_data_out_mprj[122] ;
+  wire \la_data_out_mprj[123] ;
+  wire \la_data_out_mprj[124] ;
+  wire \la_data_out_mprj[125] ;
+  wire \la_data_out_mprj[126] ;
+  wire \la_data_out_mprj[127] ;
+  wire \la_data_out_mprj[12] ;
+  wire \la_data_out_mprj[13] ;
+  wire \la_data_out_mprj[14] ;
+  wire \la_data_out_mprj[15] ;
+  wire \la_data_out_mprj[16] ;
+  wire \la_data_out_mprj[17] ;
+  wire \la_data_out_mprj[18] ;
+  wire \la_data_out_mprj[19] ;
+  wire \la_data_out_mprj[1] ;
+  wire \la_data_out_mprj[20] ;
+  wire \la_data_out_mprj[21] ;
+  wire \la_data_out_mprj[22] ;
+  wire \la_data_out_mprj[23] ;
+  wire \la_data_out_mprj[24] ;
+  wire \la_data_out_mprj[25] ;
+  wire \la_data_out_mprj[26] ;
+  wire \la_data_out_mprj[27] ;
+  wire \la_data_out_mprj[28] ;
+  wire \la_data_out_mprj[29] ;
+  wire \la_data_out_mprj[2] ;
+  wire \la_data_out_mprj[30] ;
+  wire \la_data_out_mprj[31] ;
+  wire \la_data_out_mprj[32] ;
+  wire \la_data_out_mprj[33] ;
+  wire \la_data_out_mprj[34] ;
+  wire \la_data_out_mprj[35] ;
+  wire \la_data_out_mprj[36] ;
+  wire \la_data_out_mprj[37] ;
+  wire \la_data_out_mprj[38] ;
+  wire \la_data_out_mprj[39] ;
+  wire \la_data_out_mprj[3] ;
+  wire \la_data_out_mprj[40] ;
+  wire \la_data_out_mprj[41] ;
+  wire \la_data_out_mprj[42] ;
+  wire \la_data_out_mprj[43] ;
+  wire \la_data_out_mprj[44] ;
+  wire \la_data_out_mprj[45] ;
+  wire \la_data_out_mprj[46] ;
+  wire \la_data_out_mprj[47] ;
+  wire \la_data_out_mprj[48] ;
+  wire \la_data_out_mprj[49] ;
+  wire \la_data_out_mprj[4] ;
+  wire \la_data_out_mprj[50] ;
+  wire \la_data_out_mprj[51] ;
+  wire \la_data_out_mprj[52] ;
+  wire \la_data_out_mprj[53] ;
+  wire \la_data_out_mprj[54] ;
+  wire \la_data_out_mprj[55] ;
+  wire \la_data_out_mprj[56] ;
+  wire \la_data_out_mprj[57] ;
+  wire \la_data_out_mprj[58] ;
+  wire \la_data_out_mprj[59] ;
+  wire \la_data_out_mprj[5] ;
+  wire \la_data_out_mprj[60] ;
+  wire \la_data_out_mprj[61] ;
+  wire \la_data_out_mprj[62] ;
+  wire \la_data_out_mprj[63] ;
+  wire \la_data_out_mprj[64] ;
+  wire \la_data_out_mprj[65] ;
+  wire \la_data_out_mprj[66] ;
+  wire \la_data_out_mprj[67] ;
+  wire \la_data_out_mprj[68] ;
+  wire \la_data_out_mprj[69] ;
+  wire \la_data_out_mprj[6] ;
+  wire \la_data_out_mprj[70] ;
+  wire \la_data_out_mprj[71] ;
+  wire \la_data_out_mprj[72] ;
+  wire \la_data_out_mprj[73] ;
+  wire \la_data_out_mprj[74] ;
+  wire \la_data_out_mprj[75] ;
+  wire \la_data_out_mprj[76] ;
+  wire \la_data_out_mprj[77] ;
+  wire \la_data_out_mprj[78] ;
+  wire \la_data_out_mprj[79] ;
+  wire \la_data_out_mprj[7] ;
+  wire \la_data_out_mprj[80] ;
+  wire \la_data_out_mprj[81] ;
+  wire \la_data_out_mprj[82] ;
+  wire \la_data_out_mprj[83] ;
+  wire \la_data_out_mprj[84] ;
+  wire \la_data_out_mprj[85] ;
+  wire \la_data_out_mprj[86] ;
+  wire \la_data_out_mprj[87] ;
+  wire \la_data_out_mprj[88] ;
+  wire \la_data_out_mprj[89] ;
+  wire \la_data_out_mprj[8] ;
+  wire \la_data_out_mprj[90] ;
+  wire \la_data_out_mprj[91] ;
+  wire \la_data_out_mprj[92] ;
+  wire \la_data_out_mprj[93] ;
+  wire \la_data_out_mprj[94] ;
+  wire \la_data_out_mprj[95] ;
+  wire \la_data_out_mprj[96] ;
+  wire \la_data_out_mprj[97] ;
+  wire \la_data_out_mprj[98] ;
+  wire \la_data_out_mprj[99] ;
+  wire \la_data_out_mprj[9] ;
+  wire \la_data_out_user[0] ;
+  wire \la_data_out_user[100] ;
+  wire \la_data_out_user[101] ;
+  wire \la_data_out_user[102] ;
+  wire \la_data_out_user[103] ;
+  wire \la_data_out_user[104] ;
+  wire \la_data_out_user[105] ;
+  wire \la_data_out_user[106] ;
+  wire \la_data_out_user[107] ;
+  wire \la_data_out_user[108] ;
+  wire \la_data_out_user[109] ;
+  wire \la_data_out_user[10] ;
+  wire \la_data_out_user[110] ;
+  wire \la_data_out_user[111] ;
+  wire \la_data_out_user[112] ;
+  wire \la_data_out_user[113] ;
+  wire \la_data_out_user[114] ;
+  wire \la_data_out_user[115] ;
+  wire \la_data_out_user[116] ;
+  wire \la_data_out_user[117] ;
+  wire \la_data_out_user[118] ;
+  wire \la_data_out_user[119] ;
+  wire \la_data_out_user[11] ;
+  wire \la_data_out_user[120] ;
+  wire \la_data_out_user[121] ;
+  wire \la_data_out_user[122] ;
+  wire \la_data_out_user[123] ;
+  wire \la_data_out_user[124] ;
+  wire \la_data_out_user[125] ;
+  wire \la_data_out_user[126] ;
+  wire \la_data_out_user[127] ;
+  wire \la_data_out_user[12] ;
+  wire \la_data_out_user[13] ;
+  wire \la_data_out_user[14] ;
+  wire \la_data_out_user[15] ;
+  wire \la_data_out_user[16] ;
+  wire \la_data_out_user[17] ;
+  wire \la_data_out_user[18] ;
+  wire \la_data_out_user[19] ;
+  wire \la_data_out_user[1] ;
+  wire \la_data_out_user[20] ;
+  wire \la_data_out_user[21] ;
+  wire \la_data_out_user[22] ;
+  wire \la_data_out_user[23] ;
+  wire \la_data_out_user[24] ;
+  wire \la_data_out_user[25] ;
+  wire \la_data_out_user[26] ;
+  wire \la_data_out_user[27] ;
+  wire \la_data_out_user[28] ;
+  wire \la_data_out_user[29] ;
+  wire \la_data_out_user[2] ;
+  wire \la_data_out_user[30] ;
+  wire \la_data_out_user[31] ;
+  wire \la_data_out_user[32] ;
+  wire \la_data_out_user[33] ;
+  wire \la_data_out_user[34] ;
+  wire \la_data_out_user[35] ;
+  wire \la_data_out_user[36] ;
+  wire \la_data_out_user[37] ;
+  wire \la_data_out_user[38] ;
+  wire \la_data_out_user[39] ;
+  wire \la_data_out_user[3] ;
+  wire \la_data_out_user[40] ;
+  wire \la_data_out_user[41] ;
+  wire \la_data_out_user[42] ;
+  wire \la_data_out_user[43] ;
+  wire \la_data_out_user[44] ;
+  wire \la_data_out_user[45] ;
+  wire \la_data_out_user[46] ;
+  wire \la_data_out_user[47] ;
+  wire \la_data_out_user[48] ;
+  wire \la_data_out_user[49] ;
+  wire \la_data_out_user[4] ;
+  wire \la_data_out_user[50] ;
+  wire \la_data_out_user[51] ;
+  wire \la_data_out_user[52] ;
+  wire \la_data_out_user[53] ;
+  wire \la_data_out_user[54] ;
+  wire \la_data_out_user[55] ;
+  wire \la_data_out_user[56] ;
+  wire \la_data_out_user[57] ;
+  wire \la_data_out_user[58] ;
+  wire \la_data_out_user[59] ;
+  wire \la_data_out_user[5] ;
+  wire \la_data_out_user[60] ;
+  wire \la_data_out_user[61] ;
+  wire \la_data_out_user[62] ;
+  wire \la_data_out_user[63] ;
+  wire \la_data_out_user[64] ;
+  wire \la_data_out_user[65] ;
+  wire \la_data_out_user[66] ;
+  wire \la_data_out_user[67] ;
+  wire \la_data_out_user[68] ;
+  wire \la_data_out_user[69] ;
+  wire \la_data_out_user[6] ;
+  wire \la_data_out_user[70] ;
+  wire \la_data_out_user[71] ;
+  wire \la_data_out_user[72] ;
+  wire \la_data_out_user[73] ;
+  wire \la_data_out_user[74] ;
+  wire \la_data_out_user[75] ;
+  wire \la_data_out_user[76] ;
+  wire \la_data_out_user[77] ;
+  wire \la_data_out_user[78] ;
+  wire \la_data_out_user[79] ;
+  wire \la_data_out_user[7] ;
+  wire \la_data_out_user[80] ;
+  wire \la_data_out_user[81] ;
+  wire \la_data_out_user[82] ;
+  wire \la_data_out_user[83] ;
+  wire \la_data_out_user[84] ;
+  wire \la_data_out_user[85] ;
+  wire \la_data_out_user[86] ;
+  wire \la_data_out_user[87] ;
+  wire \la_data_out_user[88] ;
+  wire \la_data_out_user[89] ;
+  wire \la_data_out_user[8] ;
+  wire \la_data_out_user[90] ;
+  wire \la_data_out_user[91] ;
+  wire \la_data_out_user[92] ;
+  wire \la_data_out_user[93] ;
+  wire \la_data_out_user[94] ;
+  wire \la_data_out_user[95] ;
+  wire \la_data_out_user[96] ;
+  wire \la_data_out_user[97] ;
+  wire \la_data_out_user[98] ;
+  wire \la_data_out_user[99] ;
+  wire \la_data_out_user[9] ;
+  wire \la_iena_mprj[0] ;
+  wire \la_iena_mprj[100] ;
+  wire \la_iena_mprj[101] ;
+  wire \la_iena_mprj[102] ;
+  wire \la_iena_mprj[103] ;
+  wire \la_iena_mprj[104] ;
+  wire \la_iena_mprj[105] ;
+  wire \la_iena_mprj[106] ;
+  wire \la_iena_mprj[107] ;
+  wire \la_iena_mprj[108] ;
+  wire \la_iena_mprj[109] ;
+  wire \la_iena_mprj[10] ;
+  wire \la_iena_mprj[110] ;
+  wire \la_iena_mprj[111] ;
+  wire \la_iena_mprj[112] ;
+  wire \la_iena_mprj[113] ;
+  wire \la_iena_mprj[114] ;
+  wire \la_iena_mprj[115] ;
+  wire \la_iena_mprj[116] ;
+  wire \la_iena_mprj[117] ;
+  wire \la_iena_mprj[118] ;
+  wire \la_iena_mprj[119] ;
+  wire \la_iena_mprj[11] ;
+  wire \la_iena_mprj[120] ;
+  wire \la_iena_mprj[121] ;
+  wire \la_iena_mprj[122] ;
+  wire \la_iena_mprj[123] ;
+  wire \la_iena_mprj[124] ;
+  wire \la_iena_mprj[125] ;
+  wire \la_iena_mprj[126] ;
+  wire \la_iena_mprj[127] ;
+  wire \la_iena_mprj[12] ;
+  wire \la_iena_mprj[13] ;
+  wire \la_iena_mprj[14] ;
+  wire \la_iena_mprj[15] ;
+  wire \la_iena_mprj[16] ;
+  wire \la_iena_mprj[17] ;
+  wire \la_iena_mprj[18] ;
+  wire \la_iena_mprj[19] ;
+  wire \la_iena_mprj[1] ;
+  wire \la_iena_mprj[20] ;
+  wire \la_iena_mprj[21] ;
+  wire \la_iena_mprj[22] ;
+  wire \la_iena_mprj[23] ;
+  wire \la_iena_mprj[24] ;
+  wire \la_iena_mprj[25] ;
+  wire \la_iena_mprj[26] ;
+  wire \la_iena_mprj[27] ;
+  wire \la_iena_mprj[28] ;
+  wire \la_iena_mprj[29] ;
+  wire \la_iena_mprj[2] ;
+  wire \la_iena_mprj[30] ;
+  wire \la_iena_mprj[31] ;
+  wire \la_iena_mprj[32] ;
+  wire \la_iena_mprj[33] ;
+  wire \la_iena_mprj[34] ;
+  wire \la_iena_mprj[35] ;
+  wire \la_iena_mprj[36] ;
+  wire \la_iena_mprj[37] ;
+  wire \la_iena_mprj[38] ;
+  wire \la_iena_mprj[39] ;
+  wire \la_iena_mprj[3] ;
+  wire \la_iena_mprj[40] ;
+  wire \la_iena_mprj[41] ;
+  wire \la_iena_mprj[42] ;
+  wire \la_iena_mprj[43] ;
+  wire \la_iena_mprj[44] ;
+  wire \la_iena_mprj[45] ;
+  wire \la_iena_mprj[46] ;
+  wire \la_iena_mprj[47] ;
+  wire \la_iena_mprj[48] ;
+  wire \la_iena_mprj[49] ;
+  wire \la_iena_mprj[4] ;
+  wire \la_iena_mprj[50] ;
+  wire \la_iena_mprj[51] ;
+  wire \la_iena_mprj[52] ;
+  wire \la_iena_mprj[53] ;
+  wire \la_iena_mprj[54] ;
+  wire \la_iena_mprj[55] ;
+  wire \la_iena_mprj[56] ;
+  wire \la_iena_mprj[57] ;
+  wire \la_iena_mprj[58] ;
+  wire \la_iena_mprj[59] ;
+  wire \la_iena_mprj[5] ;
+  wire \la_iena_mprj[60] ;
+  wire \la_iena_mprj[61] ;
+  wire \la_iena_mprj[62] ;
+  wire \la_iena_mprj[63] ;
+  wire \la_iena_mprj[64] ;
+  wire \la_iena_mprj[65] ;
+  wire \la_iena_mprj[66] ;
+  wire \la_iena_mprj[67] ;
+  wire \la_iena_mprj[68] ;
+  wire \la_iena_mprj[69] ;
+  wire \la_iena_mprj[6] ;
+  wire \la_iena_mprj[70] ;
+  wire \la_iena_mprj[71] ;
+  wire \la_iena_mprj[72] ;
+  wire \la_iena_mprj[73] ;
+  wire \la_iena_mprj[74] ;
+  wire \la_iena_mprj[75] ;
+  wire \la_iena_mprj[76] ;
+  wire \la_iena_mprj[77] ;
+  wire \la_iena_mprj[78] ;
+  wire \la_iena_mprj[79] ;
+  wire \la_iena_mprj[7] ;
+  wire \la_iena_mprj[80] ;
+  wire \la_iena_mprj[81] ;
+  wire \la_iena_mprj[82] ;
+  wire \la_iena_mprj[83] ;
+  wire \la_iena_mprj[84] ;
+  wire \la_iena_mprj[85] ;
+  wire \la_iena_mprj[86] ;
+  wire \la_iena_mprj[87] ;
+  wire \la_iena_mprj[88] ;
+  wire \la_iena_mprj[89] ;
+  wire \la_iena_mprj[8] ;
+  wire \la_iena_mprj[90] ;
+  wire \la_iena_mprj[91] ;
+  wire \la_iena_mprj[92] ;
+  wire \la_iena_mprj[93] ;
+  wire \la_iena_mprj[94] ;
+  wire \la_iena_mprj[95] ;
+  wire \la_iena_mprj[96] ;
+  wire \la_iena_mprj[97] ;
+  wire \la_iena_mprj[98] ;
+  wire \la_iena_mprj[99] ;
+  wire \la_iena_mprj[9] ;
+  wire \la_oenb_mprj[0] ;
+  wire \la_oenb_mprj[100] ;
+  wire \la_oenb_mprj[101] ;
+  wire \la_oenb_mprj[102] ;
+  wire \la_oenb_mprj[103] ;
+  wire \la_oenb_mprj[104] ;
+  wire \la_oenb_mprj[105] ;
+  wire \la_oenb_mprj[106] ;
+  wire \la_oenb_mprj[107] ;
+  wire \la_oenb_mprj[108] ;
+  wire \la_oenb_mprj[109] ;
+  wire \la_oenb_mprj[10] ;
+  wire \la_oenb_mprj[110] ;
+  wire \la_oenb_mprj[111] ;
+  wire \la_oenb_mprj[112] ;
+  wire \la_oenb_mprj[113] ;
+  wire \la_oenb_mprj[114] ;
+  wire \la_oenb_mprj[115] ;
+  wire \la_oenb_mprj[116] ;
+  wire \la_oenb_mprj[117] ;
+  wire \la_oenb_mprj[118] ;
+  wire \la_oenb_mprj[119] ;
+  wire \la_oenb_mprj[11] ;
+  wire \la_oenb_mprj[120] ;
+  wire \la_oenb_mprj[121] ;
+  wire \la_oenb_mprj[122] ;
+  wire \la_oenb_mprj[123] ;
+  wire \la_oenb_mprj[124] ;
+  wire \la_oenb_mprj[125] ;
+  wire \la_oenb_mprj[126] ;
+  wire \la_oenb_mprj[127] ;
+  wire \la_oenb_mprj[12] ;
+  wire \la_oenb_mprj[13] ;
+  wire \la_oenb_mprj[14] ;
+  wire \la_oenb_mprj[15] ;
+  wire \la_oenb_mprj[16] ;
+  wire \la_oenb_mprj[17] ;
+  wire \la_oenb_mprj[18] ;
+  wire \la_oenb_mprj[19] ;
+  wire \la_oenb_mprj[1] ;
+  wire \la_oenb_mprj[20] ;
+  wire \la_oenb_mprj[21] ;
+  wire \la_oenb_mprj[22] ;
+  wire \la_oenb_mprj[23] ;
+  wire \la_oenb_mprj[24] ;
+  wire \la_oenb_mprj[25] ;
+  wire \la_oenb_mprj[26] ;
+  wire \la_oenb_mprj[27] ;
+  wire \la_oenb_mprj[28] ;
+  wire \la_oenb_mprj[29] ;
+  wire \la_oenb_mprj[2] ;
+  wire \la_oenb_mprj[30] ;
+  wire \la_oenb_mprj[31] ;
+  wire \la_oenb_mprj[32] ;
+  wire \la_oenb_mprj[33] ;
+  wire \la_oenb_mprj[34] ;
+  wire \la_oenb_mprj[35] ;
+  wire \la_oenb_mprj[36] ;
+  wire \la_oenb_mprj[37] ;
+  wire \la_oenb_mprj[38] ;
+  wire \la_oenb_mprj[39] ;
+  wire \la_oenb_mprj[3] ;
+  wire \la_oenb_mprj[40] ;
+  wire \la_oenb_mprj[41] ;
+  wire \la_oenb_mprj[42] ;
+  wire \la_oenb_mprj[43] ;
+  wire \la_oenb_mprj[44] ;
+  wire \la_oenb_mprj[45] ;
+  wire \la_oenb_mprj[46] ;
+  wire \la_oenb_mprj[47] ;
+  wire \la_oenb_mprj[48] ;
+  wire \la_oenb_mprj[49] ;
+  wire \la_oenb_mprj[4] ;
+  wire \la_oenb_mprj[50] ;
+  wire \la_oenb_mprj[51] ;
+  wire \la_oenb_mprj[52] ;
+  wire \la_oenb_mprj[53] ;
+  wire \la_oenb_mprj[54] ;
+  wire \la_oenb_mprj[55] ;
+  wire \la_oenb_mprj[56] ;
+  wire \la_oenb_mprj[57] ;
+  wire \la_oenb_mprj[58] ;
+  wire \la_oenb_mprj[59] ;
+  wire \la_oenb_mprj[5] ;
+  wire \la_oenb_mprj[60] ;
+  wire \la_oenb_mprj[61] ;
+  wire \la_oenb_mprj[62] ;
+  wire \la_oenb_mprj[63] ;
+  wire \la_oenb_mprj[64] ;
+  wire \la_oenb_mprj[65] ;
+  wire \la_oenb_mprj[66] ;
+  wire \la_oenb_mprj[67] ;
+  wire \la_oenb_mprj[68] ;
+  wire \la_oenb_mprj[69] ;
+  wire \la_oenb_mprj[6] ;
+  wire \la_oenb_mprj[70] ;
+  wire \la_oenb_mprj[71] ;
+  wire \la_oenb_mprj[72] ;
+  wire \la_oenb_mprj[73] ;
+  wire \la_oenb_mprj[74] ;
+  wire \la_oenb_mprj[75] ;
+  wire \la_oenb_mprj[76] ;
+  wire \la_oenb_mprj[77] ;
+  wire \la_oenb_mprj[78] ;
+  wire \la_oenb_mprj[79] ;
+  wire \la_oenb_mprj[7] ;
+  wire \la_oenb_mprj[80] ;
+  wire \la_oenb_mprj[81] ;
+  wire \la_oenb_mprj[82] ;
+  wire \la_oenb_mprj[83] ;
+  wire \la_oenb_mprj[84] ;
+  wire \la_oenb_mprj[85] ;
+  wire \la_oenb_mprj[86] ;
+  wire \la_oenb_mprj[87] ;
+  wire \la_oenb_mprj[88] ;
+  wire \la_oenb_mprj[89] ;
+  wire \la_oenb_mprj[8] ;
+  wire \la_oenb_mprj[90] ;
+  wire \la_oenb_mprj[91] ;
+  wire \la_oenb_mprj[92] ;
+  wire \la_oenb_mprj[93] ;
+  wire \la_oenb_mprj[94] ;
+  wire \la_oenb_mprj[95] ;
+  wire \la_oenb_mprj[96] ;
+  wire \la_oenb_mprj[97] ;
+  wire \la_oenb_mprj[98] ;
+  wire \la_oenb_mprj[99] ;
+  wire \la_oenb_mprj[9] ;
+  wire \la_oenb_user[0] ;
+  wire \la_oenb_user[100] ;
+  wire \la_oenb_user[101] ;
+  wire \la_oenb_user[102] ;
+  wire \la_oenb_user[103] ;
+  wire \la_oenb_user[104] ;
+  wire \la_oenb_user[105] ;
+  wire \la_oenb_user[106] ;
+  wire \la_oenb_user[107] ;
+  wire \la_oenb_user[108] ;
+  wire \la_oenb_user[109] ;
+  wire \la_oenb_user[10] ;
+  wire \la_oenb_user[110] ;
+  wire \la_oenb_user[111] ;
+  wire \la_oenb_user[112] ;
+  wire \la_oenb_user[113] ;
+  wire \la_oenb_user[114] ;
+  wire \la_oenb_user[115] ;
+  wire \la_oenb_user[116] ;
+  wire \la_oenb_user[117] ;
+  wire \la_oenb_user[118] ;
+  wire \la_oenb_user[119] ;
+  wire \la_oenb_user[11] ;
+  wire \la_oenb_user[120] ;
+  wire \la_oenb_user[121] ;
+  wire \la_oenb_user[122] ;
+  wire \la_oenb_user[123] ;
+  wire \la_oenb_user[124] ;
+  wire \la_oenb_user[125] ;
+  wire \la_oenb_user[126] ;
+  wire \la_oenb_user[127] ;
+  wire \la_oenb_user[12] ;
+  wire \la_oenb_user[13] ;
+  wire \la_oenb_user[14] ;
+  wire \la_oenb_user[15] ;
+  wire \la_oenb_user[16] ;
+  wire \la_oenb_user[17] ;
+  wire \la_oenb_user[18] ;
+  wire \la_oenb_user[19] ;
+  wire \la_oenb_user[1] ;
+  wire \la_oenb_user[20] ;
+  wire \la_oenb_user[21] ;
+  wire \la_oenb_user[22] ;
+  wire \la_oenb_user[23] ;
+  wire \la_oenb_user[24] ;
+  wire \la_oenb_user[25] ;
+  wire \la_oenb_user[26] ;
+  wire \la_oenb_user[27] ;
+  wire \la_oenb_user[28] ;
+  wire \la_oenb_user[29] ;
+  wire \la_oenb_user[2] ;
+  wire \la_oenb_user[30] ;
+  wire \la_oenb_user[31] ;
+  wire \la_oenb_user[32] ;
+  wire \la_oenb_user[33] ;
+  wire \la_oenb_user[34] ;
+  wire \la_oenb_user[35] ;
+  wire \la_oenb_user[36] ;
+  wire \la_oenb_user[37] ;
+  wire \la_oenb_user[38] ;
+  wire \la_oenb_user[39] ;
+  wire \la_oenb_user[3] ;
+  wire \la_oenb_user[40] ;
+  wire \la_oenb_user[41] ;
+  wire \la_oenb_user[42] ;
+  wire \la_oenb_user[43] ;
+  wire \la_oenb_user[44] ;
+  wire \la_oenb_user[45] ;
+  wire \la_oenb_user[46] ;
+  wire \la_oenb_user[47] ;
+  wire \la_oenb_user[48] ;
+  wire \la_oenb_user[49] ;
+  wire \la_oenb_user[4] ;
+  wire \la_oenb_user[50] ;
+  wire \la_oenb_user[51] ;
+  wire \la_oenb_user[52] ;
+  wire \la_oenb_user[53] ;
+  wire \la_oenb_user[54] ;
+  wire \la_oenb_user[55] ;
+  wire \la_oenb_user[56] ;
+  wire \la_oenb_user[57] ;
+  wire \la_oenb_user[58] ;
+  wire \la_oenb_user[59] ;
+  wire \la_oenb_user[5] ;
+  wire \la_oenb_user[60] ;
+  wire \la_oenb_user[61] ;
+  wire \la_oenb_user[62] ;
+  wire \la_oenb_user[63] ;
+  wire \la_oenb_user[64] ;
+  wire \la_oenb_user[65] ;
+  wire \la_oenb_user[66] ;
+  wire \la_oenb_user[67] ;
+  wire \la_oenb_user[68] ;
+  wire \la_oenb_user[69] ;
+  wire \la_oenb_user[6] ;
+  wire \la_oenb_user[70] ;
+  wire \la_oenb_user[71] ;
+  wire \la_oenb_user[72] ;
+  wire \la_oenb_user[73] ;
+  wire \la_oenb_user[74] ;
+  wire \la_oenb_user[75] ;
+  wire \la_oenb_user[76] ;
+  wire \la_oenb_user[77] ;
+  wire \la_oenb_user[78] ;
+  wire \la_oenb_user[79] ;
+  wire \la_oenb_user[7] ;
+  wire \la_oenb_user[80] ;
+  wire \la_oenb_user[81] ;
+  wire \la_oenb_user[82] ;
+  wire \la_oenb_user[83] ;
+  wire \la_oenb_user[84] ;
+  wire \la_oenb_user[85] ;
+  wire \la_oenb_user[86] ;
+  wire \la_oenb_user[87] ;
+  wire \la_oenb_user[88] ;
+  wire \la_oenb_user[89] ;
+  wire \la_oenb_user[8] ;
+  wire \la_oenb_user[90] ;
+  wire \la_oenb_user[91] ;
+  wire \la_oenb_user[92] ;
+  wire \la_oenb_user[93] ;
+  wire \la_oenb_user[94] ;
+  wire \la_oenb_user[95] ;
+  wire \la_oenb_user[96] ;
+  wire \la_oenb_user[97] ;
+  wire \la_oenb_user[98] ;
+  wire \la_oenb_user[99] ;
+  wire \la_oenb_user[9] ;
+  wire \mask_rev[0] ;
+  wire \mask_rev[10] ;
+  wire \mask_rev[11] ;
+  wire \mask_rev[12] ;
+  wire \mask_rev[13] ;
+  wire \mask_rev[14] ;
+  wire \mask_rev[15] ;
+  wire \mask_rev[16] ;
+  wire \mask_rev[17] ;
+  wire \mask_rev[18] ;
+  wire \mask_rev[19] ;
+  wire \mask_rev[1] ;
+  wire \mask_rev[20] ;
+  wire \mask_rev[21] ;
+  wire \mask_rev[22] ;
+  wire \mask_rev[23] ;
+  wire \mask_rev[24] ;
+  wire \mask_rev[25] ;
+  wire \mask_rev[26] ;
+  wire \mask_rev[27] ;
+  wire \mask_rev[28] ;
+  wire \mask_rev[29] ;
+  wire \mask_rev[2] ;
+  wire \mask_rev[30] ;
+  wire \mask_rev[31] ;
+  wire \mask_rev[3] ;
+  wire \mask_rev[4] ;
+  wire \mask_rev[5] ;
+  wire \mask_rev[6] ;
+  wire \mask_rev[7] ;
+  wire \mask_rev[8] ;
+  wire \mask_rev[9] ;
+  wire \mgmt_io_in[0] ;
+  wire \mgmt_io_in[10] ;
+  wire \mgmt_io_in[11] ;
+  wire \mgmt_io_in[12] ;
+  wire \mgmt_io_in[13] ;
+  wire \mgmt_io_in[14] ;
+  wire \mgmt_io_in[15] ;
+  wire \mgmt_io_in[16] ;
+  wire \mgmt_io_in[17] ;
+  wire \mgmt_io_in[18] ;
+  wire \mgmt_io_in[19] ;
+  wire \mgmt_io_in[1] ;
+  wire \mgmt_io_in[20] ;
+  wire \mgmt_io_in[21] ;
+  wire \mgmt_io_in[22] ;
+  wire \mgmt_io_in[23] ;
+  wire \mgmt_io_in[24] ;
+  wire \mgmt_io_in[25] ;
+  wire \mgmt_io_in[26] ;
+  wire \mgmt_io_in[27] ;
+  wire \mgmt_io_in[28] ;
+  wire \mgmt_io_in[29] ;
+  wire \mgmt_io_in[2] ;
+  wire \mgmt_io_in[30] ;
+  wire \mgmt_io_in[31] ;
+  wire \mgmt_io_in[32] ;
+  wire \mgmt_io_in[33] ;
+  wire \mgmt_io_in[34] ;
+  wire \mgmt_io_in[35] ;
+  wire \mgmt_io_in[36] ;
+  wire \mgmt_io_in[37] ;
+  wire \mgmt_io_in[3] ;
+  wire \mgmt_io_in[4] ;
+  wire \mgmt_io_in[5] ;
+  wire \mgmt_io_in[6] ;
+  wire \mgmt_io_in[7] ;
+  wire \mgmt_io_in[8] ;
+  wire \mgmt_io_in[9] ;
+  wire \mgmt_io_in_hk[0] ;
+  wire \mgmt_io_in_hk[10] ;
+  wire \mgmt_io_in_hk[11] ;
+  wire \mgmt_io_in_hk[12] ;
+  wire \mgmt_io_in_hk[13] ;
+  wire \mgmt_io_in_hk[14] ;
+  wire \mgmt_io_in_hk[15] ;
+  wire \mgmt_io_in_hk[16] ;
+  wire \mgmt_io_in_hk[17] ;
+  wire \mgmt_io_in_hk[18] ;
+  wire \mgmt_io_in_hk[19] ;
+  wire \mgmt_io_in_hk[1] ;
+  wire \mgmt_io_in_hk[20] ;
+  wire \mgmt_io_in_hk[21] ;
+  wire \mgmt_io_in_hk[22] ;
+  wire \mgmt_io_in_hk[23] ;
+  wire \mgmt_io_in_hk[24] ;
+  wire \mgmt_io_in_hk[25] ;
+  wire \mgmt_io_in_hk[26] ;
+  wire \mgmt_io_in_hk[27] ;
+  wire \mgmt_io_in_hk[28] ;
+  wire \mgmt_io_in_hk[29] ;
+  wire \mgmt_io_in_hk[2] ;
+  wire \mgmt_io_in_hk[30] ;
+  wire \mgmt_io_in_hk[31] ;
+  wire \mgmt_io_in_hk[32] ;
+  wire \mgmt_io_in_hk[33] ;
+  wire \mgmt_io_in_hk[34] ;
+  wire \mgmt_io_in_hk[35] ;
+  wire \mgmt_io_in_hk[36] ;
+  wire \mgmt_io_in_hk[37] ;
+  wire \mgmt_io_in_hk[3] ;
+  wire \mgmt_io_in_hk[4] ;
+  wire \mgmt_io_in_hk[5] ;
+  wire \mgmt_io_in_hk[6] ;
+  wire \mgmt_io_in_hk[7] ;
+  wire \mgmt_io_in_hk[8] ;
+  wire \mgmt_io_in_hk[9] ;
+  wire \mgmt_io_oeb[0] ;
+  wire \mgmt_io_oeb[10] ;
+  wire \mgmt_io_oeb[11] ;
+  wire \mgmt_io_oeb[12] ;
+  wire \mgmt_io_oeb[13] ;
+  wire \mgmt_io_oeb[14] ;
+  wire \mgmt_io_oeb[15] ;
+  wire \mgmt_io_oeb[16] ;
+  wire \mgmt_io_oeb[17] ;
+  wire \mgmt_io_oeb[18] ;
+  wire \mgmt_io_oeb[19] ;
+  wire \mgmt_io_oeb[1] ;
+  wire \mgmt_io_oeb[20] ;
+  wire \mgmt_io_oeb[21] ;
+  wire \mgmt_io_oeb[22] ;
+  wire \mgmt_io_oeb[23] ;
+  wire \mgmt_io_oeb[24] ;
+  wire \mgmt_io_oeb[25] ;
+  wire \mgmt_io_oeb[26] ;
+  wire \mgmt_io_oeb[27] ;
+  wire \mgmt_io_oeb[28] ;
+  wire \mgmt_io_oeb[29] ;
+  wire \mgmt_io_oeb[2] ;
+  wire \mgmt_io_oeb[30] ;
+  wire \mgmt_io_oeb[31] ;
+  wire \mgmt_io_oeb[32] ;
+  wire \mgmt_io_oeb[33] ;
+  wire \mgmt_io_oeb[34] ;
+  wire \mgmt_io_oeb[35] ;
+  wire \mgmt_io_oeb[36] ;
+  wire \mgmt_io_oeb[37] ;
+  wire \mgmt_io_oeb[3] ;
+  wire \mgmt_io_oeb[4] ;
+  wire \mgmt_io_oeb[5] ;
+  wire \mgmt_io_oeb[6] ;
+  wire \mgmt_io_oeb[7] ;
+  wire \mgmt_io_oeb[8] ;
+  wire \mgmt_io_oeb[9] ;
+  wire \mgmt_io_oeb_hk[0] ;
+  wire \mgmt_io_oeb_hk[10] ;
+  wire \mgmt_io_oeb_hk[11] ;
+  wire \mgmt_io_oeb_hk[12] ;
+  wire \mgmt_io_oeb_hk[13] ;
+  wire \mgmt_io_oeb_hk[14] ;
+  wire \mgmt_io_oeb_hk[15] ;
+  wire \mgmt_io_oeb_hk[16] ;
+  wire \mgmt_io_oeb_hk[17] ;
+  wire \mgmt_io_oeb_hk[18] ;
+  wire \mgmt_io_oeb_hk[19] ;
+  wire \mgmt_io_oeb_hk[1] ;
+  wire \mgmt_io_oeb_hk[20] ;
+  wire \mgmt_io_oeb_hk[21] ;
+  wire \mgmt_io_oeb_hk[22] ;
+  wire \mgmt_io_oeb_hk[23] ;
+  wire \mgmt_io_oeb_hk[24] ;
+  wire \mgmt_io_oeb_hk[25] ;
+  wire \mgmt_io_oeb_hk[26] ;
+  wire \mgmt_io_oeb_hk[27] ;
+  wire \mgmt_io_oeb_hk[28] ;
+  wire \mgmt_io_oeb_hk[29] ;
+  wire \mgmt_io_oeb_hk[2] ;
+  wire \mgmt_io_oeb_hk[30] ;
+  wire \mgmt_io_oeb_hk[31] ;
+  wire \mgmt_io_oeb_hk[32] ;
+  wire \mgmt_io_oeb_hk[33] ;
+  wire \mgmt_io_oeb_hk[34] ;
+  wire \mgmt_io_oeb_hk[35] ;
+  wire \mgmt_io_oeb_hk[36] ;
+  wire \mgmt_io_oeb_hk[37] ;
+  wire \mgmt_io_oeb_hk[3] ;
+  wire \mgmt_io_oeb_hk[4] ;
+  wire \mgmt_io_oeb_hk[5] ;
+  wire \mgmt_io_oeb_hk[6] ;
+  wire \mgmt_io_oeb_hk[7] ;
+  wire \mgmt_io_oeb_hk[8] ;
+  wire \mgmt_io_oeb_hk[9] ;
+  wire \mgmt_io_out[0] ;
+  wire \mgmt_io_out[10] ;
+  wire \mgmt_io_out[11] ;
+  wire \mgmt_io_out[12] ;
+  wire \mgmt_io_out[13] ;
+  wire \mgmt_io_out[14] ;
+  wire \mgmt_io_out[15] ;
+  wire \mgmt_io_out[16] ;
+  wire \mgmt_io_out[17] ;
+  wire \mgmt_io_out[18] ;
+  wire \mgmt_io_out[19] ;
+  wire \mgmt_io_out[1] ;
+  wire \mgmt_io_out[20] ;
+  wire \mgmt_io_out[21] ;
+  wire \mgmt_io_out[22] ;
+  wire \mgmt_io_out[23] ;
+  wire \mgmt_io_out[24] ;
+  wire \mgmt_io_out[25] ;
+  wire \mgmt_io_out[26] ;
+  wire \mgmt_io_out[27] ;
+  wire \mgmt_io_out[28] ;
+  wire \mgmt_io_out[29] ;
+  wire \mgmt_io_out[2] ;
+  wire \mgmt_io_out[30] ;
+  wire \mgmt_io_out[31] ;
+  wire \mgmt_io_out[32] ;
+  wire \mgmt_io_out[33] ;
+  wire \mgmt_io_out[34] ;
+  wire \mgmt_io_out[35] ;
+  wire \mgmt_io_out[36] ;
+  wire \mgmt_io_out[37] ;
+  wire \mgmt_io_out[3] ;
+  wire \mgmt_io_out[4] ;
+  wire \mgmt_io_out[5] ;
+  wire \mgmt_io_out[6] ;
+  wire \mgmt_io_out[7] ;
+  wire \mgmt_io_out[8] ;
+  wire \mgmt_io_out[9] ;
+  wire \mgmt_io_out_hk[0] ;
+  wire \mgmt_io_out_hk[10] ;
+  wire \mgmt_io_out_hk[11] ;
+  wire \mgmt_io_out_hk[12] ;
+  wire \mgmt_io_out_hk[13] ;
+  wire \mgmt_io_out_hk[14] ;
+  wire \mgmt_io_out_hk[15] ;
+  wire \mgmt_io_out_hk[16] ;
+  wire \mgmt_io_out_hk[17] ;
+  wire \mgmt_io_out_hk[18] ;
+  wire \mgmt_io_out_hk[19] ;
+  wire \mgmt_io_out_hk[1] ;
+  wire \mgmt_io_out_hk[20] ;
+  wire \mgmt_io_out_hk[21] ;
+  wire \mgmt_io_out_hk[22] ;
+  wire \mgmt_io_out_hk[23] ;
+  wire \mgmt_io_out_hk[24] ;
+  wire \mgmt_io_out_hk[25] ;
+  wire \mgmt_io_out_hk[26] ;
+  wire \mgmt_io_out_hk[27] ;
+  wire \mgmt_io_out_hk[28] ;
+  wire \mgmt_io_out_hk[29] ;
+  wire \mgmt_io_out_hk[2] ;
+  wire \mgmt_io_out_hk[30] ;
+  wire \mgmt_io_out_hk[31] ;
+  wire \mgmt_io_out_hk[32] ;
+  wire \mgmt_io_out_hk[33] ;
+  wire \mgmt_io_out_hk[34] ;
+  wire \mgmt_io_out_hk[35] ;
+  wire \mgmt_io_out_hk[36] ;
+  wire \mgmt_io_out_hk[37] ;
+  wire \mgmt_io_out_hk[3] ;
+  wire \mgmt_io_out_hk[4] ;
+  wire \mgmt_io_out_hk[5] ;
+  wire \mgmt_io_out_hk[6] ;
+  wire \mgmt_io_out_hk[7] ;
+  wire \mgmt_io_out_hk[8] ;
+  wire \mgmt_io_out_hk[9] ;
+  wire mprj2_vcc_pwrgood;
+  wire mprj2_vdd_pwrgood;
+  wire mprj_ack_i_core;
+  wire mprj_ack_i_user;
+  wire \mprj_adr_o_core[0] ;
+  wire \mprj_adr_o_core[10] ;
+  wire \mprj_adr_o_core[11] ;
+  wire \mprj_adr_o_core[12] ;
+  wire \mprj_adr_o_core[13] ;
+  wire \mprj_adr_o_core[14] ;
+  wire \mprj_adr_o_core[15] ;
+  wire \mprj_adr_o_core[16] ;
+  wire \mprj_adr_o_core[17] ;
+  wire \mprj_adr_o_core[18] ;
+  wire \mprj_adr_o_core[19] ;
+  wire \mprj_adr_o_core[1] ;
+  wire \mprj_adr_o_core[20] ;
+  wire \mprj_adr_o_core[21] ;
+  wire \mprj_adr_o_core[22] ;
+  wire \mprj_adr_o_core[23] ;
+  wire \mprj_adr_o_core[24] ;
+  wire \mprj_adr_o_core[25] ;
+  wire \mprj_adr_o_core[26] ;
+  wire \mprj_adr_o_core[27] ;
+  wire \mprj_adr_o_core[28] ;
+  wire \mprj_adr_o_core[29] ;
+  wire \mprj_adr_o_core[2] ;
+  wire \mprj_adr_o_core[30] ;
+  wire \mprj_adr_o_core[31] ;
+  wire \mprj_adr_o_core[3] ;
+  wire \mprj_adr_o_core[4] ;
+  wire \mprj_adr_o_core[5] ;
+  wire \mprj_adr_o_core[6] ;
+  wire \mprj_adr_o_core[7] ;
+  wire \mprj_adr_o_core[8] ;
+  wire \mprj_adr_o_core[9] ;
+  wire \mprj_adr_o_user[0] ;
+  wire \mprj_adr_o_user[10] ;
+  wire \mprj_adr_o_user[11] ;
+  wire \mprj_adr_o_user[12] ;
+  wire \mprj_adr_o_user[13] ;
+  wire \mprj_adr_o_user[14] ;
+  wire \mprj_adr_o_user[15] ;
+  wire \mprj_adr_o_user[16] ;
+  wire \mprj_adr_o_user[17] ;
+  wire \mprj_adr_o_user[18] ;
+  wire \mprj_adr_o_user[19] ;
+  wire \mprj_adr_o_user[1] ;
+  wire \mprj_adr_o_user[20] ;
+  wire \mprj_adr_o_user[21] ;
+  wire \mprj_adr_o_user[22] ;
+  wire \mprj_adr_o_user[23] ;
+  wire \mprj_adr_o_user[24] ;
+  wire \mprj_adr_o_user[25] ;
+  wire \mprj_adr_o_user[26] ;
+  wire \mprj_adr_o_user[27] ;
+  wire \mprj_adr_o_user[28] ;
+  wire \mprj_adr_o_user[29] ;
+  wire \mprj_adr_o_user[2] ;
+  wire \mprj_adr_o_user[30] ;
+  wire \mprj_adr_o_user[31] ;
+  wire \mprj_adr_o_user[3] ;
+  wire \mprj_adr_o_user[4] ;
+  wire \mprj_adr_o_user[5] ;
+  wire \mprj_adr_o_user[6] ;
+  wire \mprj_adr_o_user[7] ;
+  wire \mprj_adr_o_user[8] ;
+  wire \mprj_adr_o_user[9] ;
+  wire mprj_clock;
+  wire mprj_clock2;
+  wire mprj_cyc_o_core;
+  wire mprj_cyc_o_user;
+  wire \mprj_dat_i_core[0] ;
+  wire \mprj_dat_i_core[10] ;
+  wire \mprj_dat_i_core[11] ;
+  wire \mprj_dat_i_core[12] ;
+  wire \mprj_dat_i_core[13] ;
+  wire \mprj_dat_i_core[14] ;
+  wire \mprj_dat_i_core[15] ;
+  wire \mprj_dat_i_core[16] ;
+  wire \mprj_dat_i_core[17] ;
+  wire \mprj_dat_i_core[18] ;
+  wire \mprj_dat_i_core[19] ;
+  wire \mprj_dat_i_core[1] ;
+  wire \mprj_dat_i_core[20] ;
+  wire \mprj_dat_i_core[21] ;
+  wire \mprj_dat_i_core[22] ;
+  wire \mprj_dat_i_core[23] ;
+  wire \mprj_dat_i_core[24] ;
+  wire \mprj_dat_i_core[25] ;
+  wire \mprj_dat_i_core[26] ;
+  wire \mprj_dat_i_core[27] ;
+  wire \mprj_dat_i_core[28] ;
+  wire \mprj_dat_i_core[29] ;
+  wire \mprj_dat_i_core[2] ;
+  wire \mprj_dat_i_core[30] ;
+  wire \mprj_dat_i_core[31] ;
+  wire \mprj_dat_i_core[3] ;
+  wire \mprj_dat_i_core[4] ;
+  wire \mprj_dat_i_core[5] ;
+  wire \mprj_dat_i_core[6] ;
+  wire \mprj_dat_i_core[7] ;
+  wire \mprj_dat_i_core[8] ;
+  wire \mprj_dat_i_core[9] ;
+  wire \mprj_dat_i_user[0] ;
+  wire \mprj_dat_i_user[10] ;
+  wire \mprj_dat_i_user[11] ;
+  wire \mprj_dat_i_user[12] ;
+  wire \mprj_dat_i_user[13] ;
+  wire \mprj_dat_i_user[14] ;
+  wire \mprj_dat_i_user[15] ;
+  wire \mprj_dat_i_user[16] ;
+  wire \mprj_dat_i_user[17] ;
+  wire \mprj_dat_i_user[18] ;
+  wire \mprj_dat_i_user[19] ;
+  wire \mprj_dat_i_user[1] ;
+  wire \mprj_dat_i_user[20] ;
+  wire \mprj_dat_i_user[21] ;
+  wire \mprj_dat_i_user[22] ;
+  wire \mprj_dat_i_user[23] ;
+  wire \mprj_dat_i_user[24] ;
+  wire \mprj_dat_i_user[25] ;
+  wire \mprj_dat_i_user[26] ;
+  wire \mprj_dat_i_user[27] ;
+  wire \mprj_dat_i_user[28] ;
+  wire \mprj_dat_i_user[29] ;
+  wire \mprj_dat_i_user[2] ;
+  wire \mprj_dat_i_user[30] ;
+  wire \mprj_dat_i_user[31] ;
+  wire \mprj_dat_i_user[3] ;
+  wire \mprj_dat_i_user[4] ;
+  wire \mprj_dat_i_user[5] ;
+  wire \mprj_dat_i_user[6] ;
+  wire \mprj_dat_i_user[7] ;
+  wire \mprj_dat_i_user[8] ;
+  wire \mprj_dat_i_user[9] ;
+  wire \mprj_dat_o_core[0] ;
+  wire \mprj_dat_o_core[10] ;
+  wire \mprj_dat_o_core[11] ;
+  wire \mprj_dat_o_core[12] ;
+  wire \mprj_dat_o_core[13] ;
+  wire \mprj_dat_o_core[14] ;
+  wire \mprj_dat_o_core[15] ;
+  wire \mprj_dat_o_core[16] ;
+  wire \mprj_dat_o_core[17] ;
+  wire \mprj_dat_o_core[18] ;
+  wire \mprj_dat_o_core[19] ;
+  wire \mprj_dat_o_core[1] ;
+  wire \mprj_dat_o_core[20] ;
+  wire \mprj_dat_o_core[21] ;
+  wire \mprj_dat_o_core[22] ;
+  wire \mprj_dat_o_core[23] ;
+  wire \mprj_dat_o_core[24] ;
+  wire \mprj_dat_o_core[25] ;
+  wire \mprj_dat_o_core[26] ;
+  wire \mprj_dat_o_core[27] ;
+  wire \mprj_dat_o_core[28] ;
+  wire \mprj_dat_o_core[29] ;
+  wire \mprj_dat_o_core[2] ;
+  wire \mprj_dat_o_core[30] ;
+  wire \mprj_dat_o_core[31] ;
+  wire \mprj_dat_o_core[3] ;
+  wire \mprj_dat_o_core[4] ;
+  wire \mprj_dat_o_core[5] ;
+  wire \mprj_dat_o_core[6] ;
+  wire \mprj_dat_o_core[7] ;
+  wire \mprj_dat_o_core[8] ;
+  wire \mprj_dat_o_core[9] ;
+  wire \mprj_dat_o_user[0] ;
+  wire \mprj_dat_o_user[10] ;
+  wire \mprj_dat_o_user[11] ;
+  wire \mprj_dat_o_user[12] ;
+  wire \mprj_dat_o_user[13] ;
+  wire \mprj_dat_o_user[14] ;
+  wire \mprj_dat_o_user[15] ;
+  wire \mprj_dat_o_user[16] ;
+  wire \mprj_dat_o_user[17] ;
+  wire \mprj_dat_o_user[18] ;
+  wire \mprj_dat_o_user[19] ;
+  wire \mprj_dat_o_user[1] ;
+  wire \mprj_dat_o_user[20] ;
+  wire \mprj_dat_o_user[21] ;
+  wire \mprj_dat_o_user[22] ;
+  wire \mprj_dat_o_user[23] ;
+  wire \mprj_dat_o_user[24] ;
+  wire \mprj_dat_o_user[25] ;
+  wire \mprj_dat_o_user[26] ;
+  wire \mprj_dat_o_user[27] ;
+  wire \mprj_dat_o_user[28] ;
+  wire \mprj_dat_o_user[29] ;
+  wire \mprj_dat_o_user[2] ;
+  wire \mprj_dat_o_user[30] ;
+  wire \mprj_dat_o_user[31] ;
+  wire \mprj_dat_o_user[3] ;
+  wire \mprj_dat_o_user[4] ;
+  wire \mprj_dat_o_user[5] ;
+  wire \mprj_dat_o_user[6] ;
+  wire \mprj_dat_o_user[7] ;
+  wire \mprj_dat_o_user[8] ;
+  wire \mprj_dat_o_user[9] ;
+  wire mprj_iena_wb;
+  inout [37:0] mprj_io;
+  wire \mprj_io_analog_en[0] ;
+  wire \mprj_io_analog_en[10] ;
+  wire \mprj_io_analog_en[11] ;
+  wire \mprj_io_analog_en[12] ;
+  wire \mprj_io_analog_en[13] ;
+  wire \mprj_io_analog_en[14] ;
+  wire \mprj_io_analog_en[15] ;
+  wire \mprj_io_analog_en[16] ;
+  wire \mprj_io_analog_en[17] ;
+  wire \mprj_io_analog_en[18] ;
+  wire \mprj_io_analog_en[19] ;
+  wire \mprj_io_analog_en[1] ;
+  wire \mprj_io_analog_en[20] ;
+  wire \mprj_io_analog_en[21] ;
+  wire \mprj_io_analog_en[22] ;
+  wire \mprj_io_analog_en[23] ;
+  wire \mprj_io_analog_en[24] ;
+  wire \mprj_io_analog_en[25] ;
+  wire \mprj_io_analog_en[26] ;
+  wire \mprj_io_analog_en[27] ;
+  wire \mprj_io_analog_en[28] ;
+  wire \mprj_io_analog_en[29] ;
+  wire \mprj_io_analog_en[2] ;
+  wire \mprj_io_analog_en[30] ;
+  wire \mprj_io_analog_en[31] ;
+  wire \mprj_io_analog_en[32] ;
+  wire \mprj_io_analog_en[33] ;
+  wire \mprj_io_analog_en[34] ;
+  wire \mprj_io_analog_en[35] ;
+  wire \mprj_io_analog_en[36] ;
+  wire \mprj_io_analog_en[37] ;
+  wire \mprj_io_analog_en[3] ;
+  wire \mprj_io_analog_en[4] ;
+  wire \mprj_io_analog_en[5] ;
+  wire \mprj_io_analog_en[6] ;
+  wire \mprj_io_analog_en[7] ;
+  wire \mprj_io_analog_en[8] ;
+  wire \mprj_io_analog_en[9] ;
+  wire \mprj_io_analog_pol[0] ;
+  wire \mprj_io_analog_pol[10] ;
+  wire \mprj_io_analog_pol[11] ;
+  wire \mprj_io_analog_pol[12] ;
+  wire \mprj_io_analog_pol[13] ;
+  wire \mprj_io_analog_pol[14] ;
+  wire \mprj_io_analog_pol[15] ;
+  wire \mprj_io_analog_pol[16] ;
+  wire \mprj_io_analog_pol[17] ;
+  wire \mprj_io_analog_pol[18] ;
+  wire \mprj_io_analog_pol[19] ;
+  wire \mprj_io_analog_pol[1] ;
+  wire \mprj_io_analog_pol[20] ;
+  wire \mprj_io_analog_pol[21] ;
+  wire \mprj_io_analog_pol[22] ;
+  wire \mprj_io_analog_pol[23] ;
+  wire \mprj_io_analog_pol[24] ;
+  wire \mprj_io_analog_pol[25] ;
+  wire \mprj_io_analog_pol[26] ;
+  wire \mprj_io_analog_pol[27] ;
+  wire \mprj_io_analog_pol[28] ;
+  wire \mprj_io_analog_pol[29] ;
+  wire \mprj_io_analog_pol[2] ;
+  wire \mprj_io_analog_pol[30] ;
+  wire \mprj_io_analog_pol[31] ;
+  wire \mprj_io_analog_pol[32] ;
+  wire \mprj_io_analog_pol[33] ;
+  wire \mprj_io_analog_pol[34] ;
+  wire \mprj_io_analog_pol[35] ;
+  wire \mprj_io_analog_pol[36] ;
+  wire \mprj_io_analog_pol[37] ;
+  wire \mprj_io_analog_pol[3] ;
+  wire \mprj_io_analog_pol[4] ;
+  wire \mprj_io_analog_pol[5] ;
+  wire \mprj_io_analog_pol[6] ;
+  wire \mprj_io_analog_pol[7] ;
+  wire \mprj_io_analog_pol[8] ;
+  wire \mprj_io_analog_pol[9] ;
+  wire \mprj_io_analog_sel[0] ;
+  wire \mprj_io_analog_sel[10] ;
+  wire \mprj_io_analog_sel[11] ;
+  wire \mprj_io_analog_sel[12] ;
+  wire \mprj_io_analog_sel[13] ;
+  wire \mprj_io_analog_sel[14] ;
+  wire \mprj_io_analog_sel[15] ;
+  wire \mprj_io_analog_sel[16] ;
+  wire \mprj_io_analog_sel[17] ;
+  wire \mprj_io_analog_sel[18] ;
+  wire \mprj_io_analog_sel[19] ;
+  wire \mprj_io_analog_sel[1] ;
+  wire \mprj_io_analog_sel[20] ;
+  wire \mprj_io_analog_sel[21] ;
+  wire \mprj_io_analog_sel[22] ;
+  wire \mprj_io_analog_sel[23] ;
+  wire \mprj_io_analog_sel[24] ;
+  wire \mprj_io_analog_sel[25] ;
+  wire \mprj_io_analog_sel[26] ;
+  wire \mprj_io_analog_sel[27] ;
+  wire \mprj_io_analog_sel[28] ;
+  wire \mprj_io_analog_sel[29] ;
+  wire \mprj_io_analog_sel[2] ;
+  wire \mprj_io_analog_sel[30] ;
+  wire \mprj_io_analog_sel[31] ;
+  wire \mprj_io_analog_sel[32] ;
+  wire \mprj_io_analog_sel[33] ;
+  wire \mprj_io_analog_sel[34] ;
+  wire \mprj_io_analog_sel[35] ;
+  wire \mprj_io_analog_sel[36] ;
+  wire \mprj_io_analog_sel[37] ;
+  wire \mprj_io_analog_sel[3] ;
+  wire \mprj_io_analog_sel[4] ;
+  wire \mprj_io_analog_sel[5] ;
+  wire \mprj_io_analog_sel[6] ;
+  wire \mprj_io_analog_sel[7] ;
+  wire \mprj_io_analog_sel[8] ;
+  wire \mprj_io_analog_sel[9] ;
+  wire \mprj_io_dm[0] ;
+  wire \mprj_io_dm[100] ;
+  wire \mprj_io_dm[101] ;
+  wire \mprj_io_dm[102] ;
+  wire \mprj_io_dm[103] ;
+  wire \mprj_io_dm[104] ;
+  wire \mprj_io_dm[105] ;
+  wire \mprj_io_dm[106] ;
+  wire \mprj_io_dm[107] ;
+  wire \mprj_io_dm[108] ;
+  wire \mprj_io_dm[109] ;
+  wire \mprj_io_dm[10] ;
+  wire \mprj_io_dm[110] ;
+  wire \mprj_io_dm[111] ;
+  wire \mprj_io_dm[112] ;
+  wire \mprj_io_dm[113] ;
+  wire \mprj_io_dm[11] ;
+  wire \mprj_io_dm[12] ;
+  wire \mprj_io_dm[13] ;
+  wire \mprj_io_dm[14] ;
+  wire \mprj_io_dm[15] ;
+  wire \mprj_io_dm[16] ;
+  wire \mprj_io_dm[17] ;
+  wire \mprj_io_dm[18] ;
+  wire \mprj_io_dm[19] ;
+  wire \mprj_io_dm[1] ;
+  wire \mprj_io_dm[20] ;
+  wire \mprj_io_dm[21] ;
+  wire \mprj_io_dm[22] ;
+  wire \mprj_io_dm[23] ;
+  wire \mprj_io_dm[24] ;
+  wire \mprj_io_dm[25] ;
+  wire \mprj_io_dm[26] ;
+  wire \mprj_io_dm[27] ;
+  wire \mprj_io_dm[28] ;
+  wire \mprj_io_dm[29] ;
+  wire \mprj_io_dm[2] ;
+  wire \mprj_io_dm[30] ;
+  wire \mprj_io_dm[31] ;
+  wire \mprj_io_dm[32] ;
+  wire \mprj_io_dm[33] ;
+  wire \mprj_io_dm[34] ;
+  wire \mprj_io_dm[35] ;
+  wire \mprj_io_dm[36] ;
+  wire \mprj_io_dm[37] ;
+  wire \mprj_io_dm[38] ;
+  wire \mprj_io_dm[39] ;
+  wire \mprj_io_dm[3] ;
+  wire \mprj_io_dm[40] ;
+  wire \mprj_io_dm[41] ;
+  wire \mprj_io_dm[42] ;
+  wire \mprj_io_dm[43] ;
+  wire \mprj_io_dm[44] ;
+  wire \mprj_io_dm[45] ;
+  wire \mprj_io_dm[46] ;
+  wire \mprj_io_dm[47] ;
+  wire \mprj_io_dm[48] ;
+  wire \mprj_io_dm[49] ;
+  wire \mprj_io_dm[4] ;
+  wire \mprj_io_dm[50] ;
+  wire \mprj_io_dm[51] ;
+  wire \mprj_io_dm[52] ;
+  wire \mprj_io_dm[53] ;
+  wire \mprj_io_dm[54] ;
+  wire \mprj_io_dm[55] ;
+  wire \mprj_io_dm[56] ;
+  wire \mprj_io_dm[57] ;
+  wire \mprj_io_dm[58] ;
+  wire \mprj_io_dm[59] ;
+  wire \mprj_io_dm[5] ;
+  wire \mprj_io_dm[60] ;
+  wire \mprj_io_dm[61] ;
+  wire \mprj_io_dm[62] ;
+  wire \mprj_io_dm[63] ;
+  wire \mprj_io_dm[64] ;
+  wire \mprj_io_dm[65] ;
+  wire \mprj_io_dm[66] ;
+  wire \mprj_io_dm[67] ;
+  wire \mprj_io_dm[68] ;
+  wire \mprj_io_dm[69] ;
+  wire \mprj_io_dm[6] ;
+  wire \mprj_io_dm[70] ;
+  wire \mprj_io_dm[71] ;
+  wire \mprj_io_dm[72] ;
+  wire \mprj_io_dm[73] ;
+  wire \mprj_io_dm[74] ;
+  wire \mprj_io_dm[75] ;
+  wire \mprj_io_dm[76] ;
+  wire \mprj_io_dm[77] ;
+  wire \mprj_io_dm[78] ;
+  wire \mprj_io_dm[79] ;
+  wire \mprj_io_dm[7] ;
+  wire \mprj_io_dm[80] ;
+  wire \mprj_io_dm[81] ;
+  wire \mprj_io_dm[82] ;
+  wire \mprj_io_dm[83] ;
+  wire \mprj_io_dm[84] ;
+  wire \mprj_io_dm[85] ;
+  wire \mprj_io_dm[86] ;
+  wire \mprj_io_dm[87] ;
+  wire \mprj_io_dm[88] ;
+  wire \mprj_io_dm[89] ;
+  wire \mprj_io_dm[8] ;
+  wire \mprj_io_dm[90] ;
+  wire \mprj_io_dm[91] ;
+  wire \mprj_io_dm[92] ;
+  wire \mprj_io_dm[93] ;
+  wire \mprj_io_dm[94] ;
+  wire \mprj_io_dm[95] ;
+  wire \mprj_io_dm[96] ;
+  wire \mprj_io_dm[97] ;
+  wire \mprj_io_dm[98] ;
+  wire \mprj_io_dm[99] ;
+  wire \mprj_io_dm[9] ;
+  wire \mprj_io_holdover[0] ;
+  wire \mprj_io_holdover[10] ;
+  wire \mprj_io_holdover[11] ;
+  wire \mprj_io_holdover[12] ;
+  wire \mprj_io_holdover[13] ;
+  wire \mprj_io_holdover[14] ;
+  wire \mprj_io_holdover[15] ;
+  wire \mprj_io_holdover[16] ;
+  wire \mprj_io_holdover[17] ;
+  wire \mprj_io_holdover[18] ;
+  wire \mprj_io_holdover[19] ;
+  wire \mprj_io_holdover[1] ;
+  wire \mprj_io_holdover[20] ;
+  wire \mprj_io_holdover[21] ;
+  wire \mprj_io_holdover[22] ;
+  wire \mprj_io_holdover[23] ;
+  wire \mprj_io_holdover[24] ;
+  wire \mprj_io_holdover[25] ;
+  wire \mprj_io_holdover[26] ;
+  wire \mprj_io_holdover[27] ;
+  wire \mprj_io_holdover[28] ;
+  wire \mprj_io_holdover[29] ;
+  wire \mprj_io_holdover[2] ;
+  wire \mprj_io_holdover[30] ;
+  wire \mprj_io_holdover[31] ;
+  wire \mprj_io_holdover[32] ;
+  wire \mprj_io_holdover[33] ;
+  wire \mprj_io_holdover[34] ;
+  wire \mprj_io_holdover[35] ;
+  wire \mprj_io_holdover[36] ;
+  wire \mprj_io_holdover[37] ;
+  wire \mprj_io_holdover[3] ;
+  wire \mprj_io_holdover[4] ;
+  wire \mprj_io_holdover[5] ;
+  wire \mprj_io_holdover[6] ;
+  wire \mprj_io_holdover[7] ;
+  wire \mprj_io_holdover[8] ;
+  wire \mprj_io_holdover[9] ;
+  wire \mprj_io_ib_mode_sel[0] ;
+  wire \mprj_io_ib_mode_sel[10] ;
+  wire \mprj_io_ib_mode_sel[11] ;
+  wire \mprj_io_ib_mode_sel[12] ;
+  wire \mprj_io_ib_mode_sel[13] ;
+  wire \mprj_io_ib_mode_sel[14] ;
+  wire \mprj_io_ib_mode_sel[15] ;
+  wire \mprj_io_ib_mode_sel[16] ;
+  wire \mprj_io_ib_mode_sel[17] ;
+  wire \mprj_io_ib_mode_sel[18] ;
+  wire \mprj_io_ib_mode_sel[19] ;
+  wire \mprj_io_ib_mode_sel[1] ;
+  wire \mprj_io_ib_mode_sel[20] ;
+  wire \mprj_io_ib_mode_sel[21] ;
+  wire \mprj_io_ib_mode_sel[22] ;
+  wire \mprj_io_ib_mode_sel[23] ;
+  wire \mprj_io_ib_mode_sel[24] ;
+  wire \mprj_io_ib_mode_sel[25] ;
+  wire \mprj_io_ib_mode_sel[26] ;
+  wire \mprj_io_ib_mode_sel[27] ;
+  wire \mprj_io_ib_mode_sel[28] ;
+  wire \mprj_io_ib_mode_sel[29] ;
+  wire \mprj_io_ib_mode_sel[2] ;
+  wire \mprj_io_ib_mode_sel[30] ;
+  wire \mprj_io_ib_mode_sel[31] ;
+  wire \mprj_io_ib_mode_sel[32] ;
+  wire \mprj_io_ib_mode_sel[33] ;
+  wire \mprj_io_ib_mode_sel[34] ;
+  wire \mprj_io_ib_mode_sel[35] ;
+  wire \mprj_io_ib_mode_sel[36] ;
+  wire \mprj_io_ib_mode_sel[37] ;
+  wire \mprj_io_ib_mode_sel[3] ;
+  wire \mprj_io_ib_mode_sel[4] ;
+  wire \mprj_io_ib_mode_sel[5] ;
+  wire \mprj_io_ib_mode_sel[6] ;
+  wire \mprj_io_ib_mode_sel[7] ;
+  wire \mprj_io_ib_mode_sel[8] ;
+  wire \mprj_io_ib_mode_sel[9] ;
+  wire \mprj_io_in[0] ;
+  wire \mprj_io_in[10] ;
+  wire \mprj_io_in[11] ;
+  wire \mprj_io_in[12] ;
+  wire \mprj_io_in[13] ;
+  wire \mprj_io_in[14] ;
+  wire \mprj_io_in[15] ;
+  wire \mprj_io_in[16] ;
+  wire \mprj_io_in[17] ;
+  wire \mprj_io_in[18] ;
+  wire \mprj_io_in[19] ;
+  wire \mprj_io_in[1] ;
+  wire \mprj_io_in[20] ;
+  wire \mprj_io_in[21] ;
+  wire \mprj_io_in[22] ;
+  wire \mprj_io_in[23] ;
+  wire \mprj_io_in[24] ;
+  wire \mprj_io_in[25] ;
+  wire \mprj_io_in[26] ;
+  wire \mprj_io_in[27] ;
+  wire \mprj_io_in[28] ;
+  wire \mprj_io_in[29] ;
+  wire \mprj_io_in[2] ;
+  wire \mprj_io_in[30] ;
+  wire \mprj_io_in[31] ;
+  wire \mprj_io_in[32] ;
+  wire \mprj_io_in[33] ;
+  wire \mprj_io_in[34] ;
+  wire \mprj_io_in[35] ;
+  wire \mprj_io_in[36] ;
+  wire \mprj_io_in[37] ;
+  wire \mprj_io_in[3] ;
+  wire \mprj_io_in[4] ;
+  wire \mprj_io_in[5] ;
+  wire \mprj_io_in[6] ;
+  wire \mprj_io_in[7] ;
+  wire \mprj_io_in[8] ;
+  wire \mprj_io_in[9] ;
+  wire \mprj_io_inp_dis[0] ;
+  wire \mprj_io_inp_dis[10] ;
+  wire \mprj_io_inp_dis[11] ;
+  wire \mprj_io_inp_dis[12] ;
+  wire \mprj_io_inp_dis[13] ;
+  wire \mprj_io_inp_dis[14] ;
+  wire \mprj_io_inp_dis[15] ;
+  wire \mprj_io_inp_dis[16] ;
+  wire \mprj_io_inp_dis[17] ;
+  wire \mprj_io_inp_dis[18] ;
+  wire \mprj_io_inp_dis[19] ;
+  wire \mprj_io_inp_dis[1] ;
+  wire \mprj_io_inp_dis[20] ;
+  wire \mprj_io_inp_dis[21] ;
+  wire \mprj_io_inp_dis[22] ;
+  wire \mprj_io_inp_dis[23] ;
+  wire \mprj_io_inp_dis[24] ;
+  wire \mprj_io_inp_dis[25] ;
+  wire \mprj_io_inp_dis[26] ;
+  wire \mprj_io_inp_dis[27] ;
+  wire \mprj_io_inp_dis[28] ;
+  wire \mprj_io_inp_dis[29] ;
+  wire \mprj_io_inp_dis[2] ;
+  wire \mprj_io_inp_dis[30] ;
+  wire \mprj_io_inp_dis[31] ;
+  wire \mprj_io_inp_dis[32] ;
+  wire \mprj_io_inp_dis[33] ;
+  wire \mprj_io_inp_dis[34] ;
+  wire \mprj_io_inp_dis[35] ;
+  wire \mprj_io_inp_dis[36] ;
+  wire \mprj_io_inp_dis[37] ;
+  wire \mprj_io_inp_dis[3] ;
+  wire \mprj_io_inp_dis[4] ;
+  wire \mprj_io_inp_dis[5] ;
+  wire \mprj_io_inp_dis[6] ;
+  wire \mprj_io_inp_dis[7] ;
+  wire \mprj_io_inp_dis[8] ;
+  wire \mprj_io_inp_dis[9] ;
+  wire mprj_io_loader_clock;
+  wire mprj_io_loader_clock_buf;
+  wire mprj_io_loader_data_1;
+  wire mprj_io_loader_data_2;
+  wire mprj_io_loader_data_2_buf;
+  wire mprj_io_loader_resetn;
+  wire mprj_io_loader_resetn_buf;
+  wire mprj_io_loader_strobe;
+  wire mprj_io_loader_strobe_buf;
+  wire \mprj_io_oeb[0] ;
+  wire \mprj_io_oeb[10] ;
+  wire \mprj_io_oeb[11] ;
+  wire \mprj_io_oeb[12] ;
+  wire \mprj_io_oeb[13] ;
+  wire \mprj_io_oeb[14] ;
+  wire \mprj_io_oeb[15] ;
+  wire \mprj_io_oeb[16] ;
+  wire \mprj_io_oeb[17] ;
+  wire \mprj_io_oeb[18] ;
+  wire \mprj_io_oeb[19] ;
+  wire \mprj_io_oeb[1] ;
+  wire \mprj_io_oeb[20] ;
+  wire \mprj_io_oeb[21] ;
+  wire \mprj_io_oeb[22] ;
+  wire \mprj_io_oeb[23] ;
+  wire \mprj_io_oeb[24] ;
+  wire \mprj_io_oeb[25] ;
+  wire \mprj_io_oeb[26] ;
+  wire \mprj_io_oeb[27] ;
+  wire \mprj_io_oeb[28] ;
+  wire \mprj_io_oeb[29] ;
+  wire \mprj_io_oeb[2] ;
+  wire \mprj_io_oeb[30] ;
+  wire \mprj_io_oeb[31] ;
+  wire \mprj_io_oeb[32] ;
+  wire \mprj_io_oeb[33] ;
+  wire \mprj_io_oeb[34] ;
+  wire \mprj_io_oeb[35] ;
+  wire \mprj_io_oeb[36] ;
+  wire \mprj_io_oeb[37] ;
+  wire \mprj_io_oeb[3] ;
+  wire \mprj_io_oeb[4] ;
+  wire \mprj_io_oeb[5] ;
+  wire \mprj_io_oeb[6] ;
+  wire \mprj_io_oeb[7] ;
+  wire \mprj_io_oeb[8] ;
+  wire \mprj_io_oeb[9] ;
+  wire \mprj_io_one[0] ;
+  wire \mprj_io_one[10] ;
+  wire \mprj_io_one[11] ;
+  wire \mprj_io_one[12] ;
+  wire \mprj_io_one[13] ;
+  wire \mprj_io_one[14] ;
+  wire \mprj_io_one[15] ;
+  wire \mprj_io_one[16] ;
+  wire \mprj_io_one[17] ;
+  wire \mprj_io_one[18] ;
+  wire \mprj_io_one[19] ;
+  wire \mprj_io_one[1] ;
+  wire \mprj_io_one[20] ;
+  wire \mprj_io_one[21] ;
+  wire \mprj_io_one[22] ;
+  wire \mprj_io_one[23] ;
+  wire \mprj_io_one[24] ;
+  wire \mprj_io_one[25] ;
+  wire \mprj_io_one[26] ;
+  wire \mprj_io_one[27] ;
+  wire \mprj_io_one[28] ;
+  wire \mprj_io_one[29] ;
+  wire \mprj_io_one[2] ;
+  wire \mprj_io_one[30] ;
+  wire \mprj_io_one[31] ;
+  wire \mprj_io_one[32] ;
+  wire \mprj_io_one[33] ;
+  wire \mprj_io_one[34] ;
+  wire \mprj_io_one[35] ;
+  wire \mprj_io_one[36] ;
+  wire \mprj_io_one[37] ;
+  wire \mprj_io_one[3] ;
+  wire \mprj_io_one[4] ;
+  wire \mprj_io_one[5] ;
+  wire \mprj_io_one[6] ;
+  wire \mprj_io_one[7] ;
+  wire \mprj_io_one[8] ;
+  wire \mprj_io_one[9] ;
+  wire \mprj_io_out[0] ;
+  wire \mprj_io_out[10] ;
+  wire \mprj_io_out[11] ;
+  wire \mprj_io_out[12] ;
+  wire \mprj_io_out[13] ;
+  wire \mprj_io_out[14] ;
+  wire \mprj_io_out[15] ;
+  wire \mprj_io_out[16] ;
+  wire \mprj_io_out[17] ;
+  wire \mprj_io_out[18] ;
+  wire \mprj_io_out[19] ;
+  wire \mprj_io_out[1] ;
+  wire \mprj_io_out[20] ;
+  wire \mprj_io_out[21] ;
+  wire \mprj_io_out[22] ;
+  wire \mprj_io_out[23] ;
+  wire \mprj_io_out[24] ;
+  wire \mprj_io_out[25] ;
+  wire \mprj_io_out[26] ;
+  wire \mprj_io_out[27] ;
+  wire \mprj_io_out[28] ;
+  wire \mprj_io_out[29] ;
+  wire \mprj_io_out[2] ;
+  wire \mprj_io_out[30] ;
+  wire \mprj_io_out[31] ;
+  wire \mprj_io_out[32] ;
+  wire \mprj_io_out[33] ;
+  wire \mprj_io_out[34] ;
+  wire \mprj_io_out[35] ;
+  wire \mprj_io_out[36] ;
+  wire \mprj_io_out[37] ;
+  wire \mprj_io_out[3] ;
+  wire \mprj_io_out[4] ;
+  wire \mprj_io_out[5] ;
+  wire \mprj_io_out[6] ;
+  wire \mprj_io_out[7] ;
+  wire \mprj_io_out[8] ;
+  wire \mprj_io_out[9] ;
+  wire \mprj_io_slow_sel[0] ;
+  wire \mprj_io_slow_sel[10] ;
+  wire \mprj_io_slow_sel[11] ;
+  wire \mprj_io_slow_sel[12] ;
+  wire \mprj_io_slow_sel[13] ;
+  wire \mprj_io_slow_sel[14] ;
+  wire \mprj_io_slow_sel[15] ;
+  wire \mprj_io_slow_sel[16] ;
+  wire \mprj_io_slow_sel[17] ;
+  wire \mprj_io_slow_sel[18] ;
+  wire \mprj_io_slow_sel[19] ;
+  wire \mprj_io_slow_sel[1] ;
+  wire \mprj_io_slow_sel[20] ;
+  wire \mprj_io_slow_sel[21] ;
+  wire \mprj_io_slow_sel[22] ;
+  wire \mprj_io_slow_sel[23] ;
+  wire \mprj_io_slow_sel[24] ;
+  wire \mprj_io_slow_sel[25] ;
+  wire \mprj_io_slow_sel[26] ;
+  wire \mprj_io_slow_sel[27] ;
+  wire \mprj_io_slow_sel[28] ;
+  wire \mprj_io_slow_sel[29] ;
+  wire \mprj_io_slow_sel[2] ;
+  wire \mprj_io_slow_sel[30] ;
+  wire \mprj_io_slow_sel[31] ;
+  wire \mprj_io_slow_sel[32] ;
+  wire \mprj_io_slow_sel[33] ;
+  wire \mprj_io_slow_sel[34] ;
+  wire \mprj_io_slow_sel[35] ;
+  wire \mprj_io_slow_sel[36] ;
+  wire \mprj_io_slow_sel[37] ;
+  wire \mprj_io_slow_sel[3] ;
+  wire \mprj_io_slow_sel[4] ;
+  wire \mprj_io_slow_sel[5] ;
+  wire \mprj_io_slow_sel[6] ;
+  wire \mprj_io_slow_sel[7] ;
+  wire \mprj_io_slow_sel[8] ;
+  wire \mprj_io_slow_sel[9] ;
+  wire \mprj_io_vtrip_sel[0] ;
+  wire \mprj_io_vtrip_sel[10] ;
+  wire \mprj_io_vtrip_sel[11] ;
+  wire \mprj_io_vtrip_sel[12] ;
+  wire \mprj_io_vtrip_sel[13] ;
+  wire \mprj_io_vtrip_sel[14] ;
+  wire \mprj_io_vtrip_sel[15] ;
+  wire \mprj_io_vtrip_sel[16] ;
+  wire \mprj_io_vtrip_sel[17] ;
+  wire \mprj_io_vtrip_sel[18] ;
+  wire \mprj_io_vtrip_sel[19] ;
+  wire \mprj_io_vtrip_sel[1] ;
+  wire \mprj_io_vtrip_sel[20] ;
+  wire \mprj_io_vtrip_sel[21] ;
+  wire \mprj_io_vtrip_sel[22] ;
+  wire \mprj_io_vtrip_sel[23] ;
+  wire \mprj_io_vtrip_sel[24] ;
+  wire \mprj_io_vtrip_sel[25] ;
+  wire \mprj_io_vtrip_sel[26] ;
+  wire \mprj_io_vtrip_sel[27] ;
+  wire \mprj_io_vtrip_sel[28] ;
+  wire \mprj_io_vtrip_sel[29] ;
+  wire \mprj_io_vtrip_sel[2] ;
+  wire \mprj_io_vtrip_sel[30] ;
+  wire \mprj_io_vtrip_sel[31] ;
+  wire \mprj_io_vtrip_sel[32] ;
+  wire \mprj_io_vtrip_sel[33] ;
+  wire \mprj_io_vtrip_sel[34] ;
+  wire \mprj_io_vtrip_sel[35] ;
+  wire \mprj_io_vtrip_sel[36] ;
+  wire \mprj_io_vtrip_sel[37] ;
+  wire \mprj_io_vtrip_sel[3] ;
+  wire \mprj_io_vtrip_sel[4] ;
+  wire \mprj_io_vtrip_sel[5] ;
+  wire \mprj_io_vtrip_sel[6] ;
+  wire \mprj_io_vtrip_sel[7] ;
+  wire \mprj_io_vtrip_sel[8] ;
+  wire \mprj_io_vtrip_sel[9] ;
+  wire mprj_reset;
+  wire \mprj_sel_o_core[0] ;
+  wire \mprj_sel_o_core[1] ;
+  wire \mprj_sel_o_core[2] ;
+  wire \mprj_sel_o_core[3] ;
+  wire \mprj_sel_o_user[0] ;
+  wire \mprj_sel_o_user[1] ;
+  wire \mprj_sel_o_user[2] ;
+  wire \mprj_sel_o_user[3] ;
+  wire mprj_stb_o_core;
+  wire mprj_stb_o_user;
+  wire mprj_vcc_pwrgood;
+  wire mprj_vdd_pwrgood;
+  wire mprj_we_o_core;
+  wire mprj_we_o_user;
+  wire pll_clk;
+  wire pll_clk90;
+  wire por_l;
+  wire por_l_buf;
+  wire porb_h;
+  wire porb_h_buf;
+  wire porb_h_in_nc;
+  wire porb_h_out_nc;
+  wire porb_l;
+  wire \pwr_ctrl_nc[0] ;
+  wire \pwr_ctrl_nc[1] ;
+  wire \pwr_ctrl_nc[2] ;
+  wire \pwr_ctrl_nc[3] ;
+  wire qspi_enabled;
+  input resetb;
+  wire resetn_passthru;
+  wire rstb_h;
+  wire rstb_l;
+  wire rstb_l_buf;
+  wire ser_rx;
+  wire ser_tx;
+  wire \spare_xfq_nc[0] ;
+  wire \spare_xfq_nc[1] ;
+  wire \spare_xfq_nc[2] ;
+  wire \spare_xfq_nc[3] ;
+  wire \spare_xfq_nc[4] ;
+  wire \spare_xfq_nc[5] ;
+  wire \spare_xfq_nc[6] ;
+  wire \spare_xfq_nc[7] ;
+  wire \spare_xfqn_nc[0] ;
+  wire \spare_xfqn_nc[1] ;
+  wire \spare_xfqn_nc[2] ;
+  wire \spare_xfqn_nc[3] ;
+  wire \spare_xfqn_nc[4] ;
+  wire \spare_xfqn_nc[5] ;
+  wire \spare_xfqn_nc[6] ;
+  wire \spare_xfqn_nc[7] ;
+  wire \spare_xi_nc[0] ;
+  wire \spare_xi_nc[10] ;
+  wire \spare_xi_nc[11] ;
+  wire \spare_xi_nc[12] ;
+  wire \spare_xi_nc[13] ;
+  wire \spare_xi_nc[14] ;
+  wire \spare_xi_nc[15] ;
+  wire \spare_xi_nc[1] ;
+  wire \spare_xi_nc[2] ;
+  wire \spare_xi_nc[3] ;
+  wire \spare_xi_nc[4] ;
+  wire \spare_xi_nc[5] ;
+  wire \spare_xi_nc[6] ;
+  wire \spare_xi_nc[7] ;
+  wire \spare_xi_nc[8] ;
+  wire \spare_xi_nc[9] ;
+  wire \spare_xib_nc[0] ;
+  wire \spare_xib_nc[1] ;
+  wire \spare_xib_nc[2] ;
+  wire \spare_xib_nc[3] ;
+  wire \spare_xmx_nc[0] ;
+  wire \spare_xmx_nc[1] ;
+  wire \spare_xmx_nc[2] ;
+  wire \spare_xmx_nc[3] ;
+  wire \spare_xmx_nc[4] ;
+  wire \spare_xmx_nc[5] ;
+  wire \spare_xmx_nc[6] ;
+  wire \spare_xmx_nc[7] ;
+  wire \spare_xna_nc[0] ;
+  wire \spare_xna_nc[1] ;
+  wire \spare_xna_nc[2] ;
+  wire \spare_xna_nc[3] ;
+  wire \spare_xna_nc[4] ;
+  wire \spare_xna_nc[5] ;
+  wire \spare_xna_nc[6] ;
+  wire \spare_xna_nc[7] ;
+  wire \spare_xno_nc[0] ;
+  wire \spare_xno_nc[1] ;
+  wire \spare_xno_nc[2] ;
+  wire \spare_xno_nc[3] ;
+  wire \spare_xno_nc[4] ;
+  wire \spare_xno_nc[5] ;
+  wire \spare_xno_nc[6] ;
+  wire \spare_xno_nc[7] ;
+  wire \spare_xz_nc[0] ;
+  wire \spare_xz_nc[100] ;
+  wire \spare_xz_nc[101] ;
+  wire \spare_xz_nc[102] ;
+  wire \spare_xz_nc[103] ;
+  wire \spare_xz_nc[104] ;
+  wire \spare_xz_nc[105] ;
+  wire \spare_xz_nc[106] ;
+  wire \spare_xz_nc[107] ;
+  wire \spare_xz_nc[10] ;
+  wire \spare_xz_nc[11] ;
+  wire \spare_xz_nc[12] ;
+  wire \spare_xz_nc[13] ;
+  wire \spare_xz_nc[14] ;
+  wire \spare_xz_nc[15] ;
+  wire \spare_xz_nc[16] ;
+  wire \spare_xz_nc[17] ;
+  wire \spare_xz_nc[18] ;
+  wire \spare_xz_nc[19] ;
+  wire \spare_xz_nc[1] ;
+  wire \spare_xz_nc[20] ;
+  wire \spare_xz_nc[21] ;
+  wire \spare_xz_nc[22] ;
+  wire \spare_xz_nc[23] ;
+  wire \spare_xz_nc[24] ;
+  wire \spare_xz_nc[25] ;
+  wire \spare_xz_nc[26] ;
+  wire \spare_xz_nc[27] ;
+  wire \spare_xz_nc[28] ;
+  wire \spare_xz_nc[29] ;
+  wire \spare_xz_nc[2] ;
+  wire \spare_xz_nc[30] ;
+  wire \spare_xz_nc[31] ;
+  wire \spare_xz_nc[32] ;
+  wire \spare_xz_nc[33] ;
+  wire \spare_xz_nc[34] ;
+  wire \spare_xz_nc[35] ;
+  wire \spare_xz_nc[36] ;
+  wire \spare_xz_nc[37] ;
+  wire \spare_xz_nc[38] ;
+  wire \spare_xz_nc[39] ;
+  wire \spare_xz_nc[3] ;
+  wire \spare_xz_nc[40] ;
+  wire \spare_xz_nc[41] ;
+  wire \spare_xz_nc[42] ;
+  wire \spare_xz_nc[43] ;
+  wire \spare_xz_nc[44] ;
+  wire \spare_xz_nc[45] ;
+  wire \spare_xz_nc[46] ;
+  wire \spare_xz_nc[47] ;
+  wire \spare_xz_nc[48] ;
+  wire \spare_xz_nc[49] ;
+  wire \spare_xz_nc[4] ;
+  wire \spare_xz_nc[50] ;
+  wire \spare_xz_nc[51] ;
+  wire \spare_xz_nc[52] ;
+  wire \spare_xz_nc[53] ;
+  wire \spare_xz_nc[54] ;
+  wire \spare_xz_nc[55] ;
+  wire \spare_xz_nc[56] ;
+  wire \spare_xz_nc[57] ;
+  wire \spare_xz_nc[58] ;
+  wire \spare_xz_nc[59] ;
+  wire \spare_xz_nc[5] ;
+  wire \spare_xz_nc[60] ;
+  wire \spare_xz_nc[61] ;
+  wire \spare_xz_nc[62] ;
+  wire \spare_xz_nc[63] ;
+  wire \spare_xz_nc[64] ;
+  wire \spare_xz_nc[65] ;
+  wire \spare_xz_nc[66] ;
+  wire \spare_xz_nc[67] ;
+  wire \spare_xz_nc[68] ;
+  wire \spare_xz_nc[69] ;
+  wire \spare_xz_nc[6] ;
+  wire \spare_xz_nc[70] ;
+  wire \spare_xz_nc[71] ;
+  wire \spare_xz_nc[72] ;
+  wire \spare_xz_nc[73] ;
+  wire \spare_xz_nc[74] ;
+  wire \spare_xz_nc[75] ;
+  wire \spare_xz_nc[76] ;
+  wire \spare_xz_nc[77] ;
+  wire \spare_xz_nc[78] ;
+  wire \spare_xz_nc[79] ;
+  wire \spare_xz_nc[7] ;
+  wire \spare_xz_nc[80] ;
+  wire \spare_xz_nc[81] ;
+  wire \spare_xz_nc[82] ;
+  wire \spare_xz_nc[83] ;
+  wire \spare_xz_nc[84] ;
+  wire \spare_xz_nc[85] ;
+  wire \spare_xz_nc[86] ;
+  wire \spare_xz_nc[87] ;
+  wire \spare_xz_nc[88] ;
+  wire \spare_xz_nc[89] ;
+  wire \spare_xz_nc[8] ;
+  wire \spare_xz_nc[90] ;
+  wire \spare_xz_nc[91] ;
+  wire \spare_xz_nc[92] ;
+  wire \spare_xz_nc[93] ;
+  wire \spare_xz_nc[94] ;
+  wire \spare_xz_nc[95] ;
+  wire \spare_xz_nc[96] ;
+  wire \spare_xz_nc[97] ;
+  wire \spare_xz_nc[98] ;
+  wire \spare_xz_nc[99] ;
+  wire \spare_xz_nc[9] ;
+  wire spi_csb;
+  wire spi_enabled;
+  wire \spi_pll90_sel[0] ;
+  wire \spi_pll90_sel[1] ;
+  wire \spi_pll90_sel[2] ;
+  wire spi_pll_dco_ena;
+  wire \spi_pll_div[0] ;
+  wire \spi_pll_div[1] ;
+  wire \spi_pll_div[2] ;
+  wire \spi_pll_div[3] ;
+  wire \spi_pll_div[4] ;
+  wire spi_pll_ena;
+  wire \spi_pll_sel[0] ;
+  wire \spi_pll_sel[1] ;
+  wire \spi_pll_sel[2] ;
+  wire \spi_pll_trim[0] ;
+  wire \spi_pll_trim[10] ;
+  wire \spi_pll_trim[11] ;
+  wire \spi_pll_trim[12] ;
+  wire \spi_pll_trim[13] ;
+  wire \spi_pll_trim[14] ;
+  wire \spi_pll_trim[15] ;
+  wire \spi_pll_trim[16] ;
+  wire \spi_pll_trim[17] ;
+  wire \spi_pll_trim[18] ;
+  wire \spi_pll_trim[19] ;
+  wire \spi_pll_trim[1] ;
+  wire \spi_pll_trim[20] ;
+  wire \spi_pll_trim[21] ;
+  wire \spi_pll_trim[22] ;
+  wire \spi_pll_trim[23] ;
+  wire \spi_pll_trim[24] ;
+  wire \spi_pll_trim[25] ;
+  wire \spi_pll_trim[2] ;
+  wire \spi_pll_trim[3] ;
+  wire \spi_pll_trim[4] ;
+  wire \spi_pll_trim[5] ;
+  wire \spi_pll_trim[6] ;
+  wire \spi_pll_trim[7] ;
+  wire \spi_pll_trim[8] ;
+  wire \spi_pll_trim[9] ;
+  wire spi_sck;
+  wire spi_sdi;
+  wire spi_sdo;
+  wire spi_sdoenb;
+  wire trap;
+  wire uart_enabled;
+  wire \user_analog_io[0] ;
+  wire \user_analog_io[10] ;
+  wire \user_analog_io[11] ;
+  wire \user_analog_io[12] ;
+  wire \user_analog_io[13] ;
+  wire \user_analog_io[14] ;
+  wire \user_analog_io[15] ;
+  wire \user_analog_io[16] ;
+  wire \user_analog_io[17] ;
+  wire \user_analog_io[18] ;
+  wire \user_analog_io[19] ;
+  wire \user_analog_io[1] ;
+  wire \user_analog_io[20] ;
+  wire \user_analog_io[21] ;
+  wire \user_analog_io[22] ;
+  wire \user_analog_io[23] ;
+  wire \user_analog_io[24] ;
+  wire \user_analog_io[25] ;
+  wire \user_analog_io[26] ;
+  wire \user_analog_io[27] ;
+  wire \user_analog_io[28] ;
+  wire \user_analog_io[2] ;
+  wire \user_analog_io[3] ;
+  wire \user_analog_io[4] ;
+  wire \user_analog_io[5] ;
+  wire \user_analog_io[6] ;
+  wire \user_analog_io[7] ;
+  wire \user_analog_io[8] ;
+  wire \user_analog_io[9] ;
+  wire \user_io_in[0] ;
+  wire \user_io_in[10] ;
+  wire \user_io_in[11] ;
+  wire \user_io_in[12] ;
+  wire \user_io_in[13] ;
+  wire \user_io_in[14] ;
+  wire \user_io_in[15] ;
+  wire \user_io_in[16] ;
+  wire \user_io_in[17] ;
+  wire \user_io_in[18] ;
+  wire \user_io_in[19] ;
+  wire \user_io_in[1] ;
+  wire \user_io_in[20] ;
+  wire \user_io_in[21] ;
+  wire \user_io_in[22] ;
+  wire \user_io_in[23] ;
+  wire \user_io_in[24] ;
+  wire \user_io_in[25] ;
+  wire \user_io_in[26] ;
+  wire \user_io_in[27] ;
+  wire \user_io_in[28] ;
+  wire \user_io_in[29] ;
+  wire \user_io_in[2] ;
+  wire \user_io_in[30] ;
+  wire \user_io_in[31] ;
+  wire \user_io_in[32] ;
+  wire \user_io_in[33] ;
+  wire \user_io_in[34] ;
+  wire \user_io_in[35] ;
+  wire \user_io_in[36] ;
+  wire \user_io_in[37] ;
+  wire \user_io_in[3] ;
+  wire \user_io_in[4] ;
+  wire \user_io_in[5] ;
+  wire \user_io_in[6] ;
+  wire \user_io_in[7] ;
+  wire \user_io_in[8] ;
+  wire \user_io_in[9] ;
+  wire \user_io_oeb[0] ;
+  wire \user_io_oeb[10] ;
+  wire \user_io_oeb[11] ;
+  wire \user_io_oeb[12] ;
+  wire \user_io_oeb[13] ;
+  wire \user_io_oeb[14] ;
+  wire \user_io_oeb[15] ;
+  wire \user_io_oeb[16] ;
+  wire \user_io_oeb[17] ;
+  wire \user_io_oeb[18] ;
+  wire \user_io_oeb[19] ;
+  wire \user_io_oeb[1] ;
+  wire \user_io_oeb[20] ;
+  wire \user_io_oeb[21] ;
+  wire \user_io_oeb[22] ;
+  wire \user_io_oeb[23] ;
+  wire \user_io_oeb[24] ;
+  wire \user_io_oeb[25] ;
+  wire \user_io_oeb[26] ;
+  wire \user_io_oeb[27] ;
+  wire \user_io_oeb[28] ;
+  wire \user_io_oeb[29] ;
+  wire \user_io_oeb[2] ;
+  wire \user_io_oeb[30] ;
+  wire \user_io_oeb[31] ;
+  wire \user_io_oeb[32] ;
+  wire \user_io_oeb[33] ;
+  wire \user_io_oeb[34] ;
+  wire \user_io_oeb[35] ;
+  wire \user_io_oeb[36] ;
+  wire \user_io_oeb[37] ;
+  wire \user_io_oeb[3] ;
+  wire \user_io_oeb[4] ;
+  wire \user_io_oeb[5] ;
+  wire \user_io_oeb[6] ;
+  wire \user_io_oeb[7] ;
+  wire \user_io_oeb[8] ;
+  wire \user_io_oeb[9] ;
+  wire \user_io_out[0] ;
+  wire \user_io_out[10] ;
+  wire \user_io_out[11] ;
+  wire \user_io_out[12] ;
+  wire \user_io_out[13] ;
+  wire \user_io_out[14] ;
+  wire \user_io_out[15] ;
+  wire \user_io_out[16] ;
+  wire \user_io_out[17] ;
+  wire \user_io_out[18] ;
+  wire \user_io_out[19] ;
+  wire \user_io_out[1] ;
+  wire \user_io_out[20] ;
+  wire \user_io_out[21] ;
+  wire \user_io_out[22] ;
+  wire \user_io_out[23] ;
+  wire \user_io_out[24] ;
+  wire \user_io_out[25] ;
+  wire \user_io_out[26] ;
+  wire \user_io_out[27] ;
+  wire \user_io_out[28] ;
+  wire \user_io_out[29] ;
+  wire \user_io_out[2] ;
+  wire \user_io_out[30] ;
+  wire \user_io_out[31] ;
+  wire \user_io_out[32] ;
+  wire \user_io_out[33] ;
+  wire \user_io_out[34] ;
+  wire \user_io_out[35] ;
+  wire \user_io_out[36] ;
+  wire \user_io_out[37] ;
+  wire \user_io_out[3] ;
+  wire \user_io_out[4] ;
+  wire \user_io_out[5] ;
+  wire \user_io_out[6] ;
+  wire \user_io_out[7] ;
+  wire \user_io_out[8] ;
+  wire \user_io_out[9] ;
+  wire \user_irq[0] ;
+  wire \user_irq[1] ;
+  wire \user_irq[2] ;
+  wire \user_irq_core[0] ;
+  wire \user_irq_core[1] ;
+  wire \user_irq_core[2] ;
+  wire \user_irq_ena[0] ;
+  wire \user_irq_ena[1] ;
+  wire \user_irq_ena[2] ;
+  inout vccd;
+  inout vccd1;
+  wire vccd1_core;
+  inout vccd2;
+  wire vccd2_core;
+  wire vccd_core;
+  inout vdda;
+  inout vdda1;
+  inout vdda1_2;
+  wire vdda1_core;
+  inout vdda2;
+  wire vdda2_core;
+  wire vdda_core;
+  inout vddio;
+  inout vddio_2;
+  wire vddio_core;
+  inout vssa;
+  inout vssa1;
+  inout vssa1_2;
+  wire vssa1_core;
+  inout vssa2;
+  wire vssa2_core;
+  wire vssa_core;
+  inout vssd;
+  inout vssd1;
+  wire vssd1_core;
+  inout vssd2;
+  wire vssd2_core;
+  wire vssd_core;
+  inout vssio;
+  inout vssio_2;
+  wire vssio_core;
+  caravel_clocking clock_ctrl (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .core_clk(caravel_clk),
+    .ext_clk(clock_core_buf),
+    .ext_clk_sel(ext_clk_sel),
+    .ext_reset(ext_reset),
+    .pll_clk(pll_clk),
+    .pll_clk90(pll_clk90),
+    .resetb(rstb_l_buf),
+    .resetb_sync(caravel_rstn),
+    .sel({ \spi_pll_sel[2] , \spi_pll_sel[1] , \spi_pll_sel[0]  }),
+    .sel2({ \spi_pll90_sel[2] , \spi_pll90_sel[1] , \spi_pll90_sel[0]  }),
+    .user_clk(caravel_clk2)
+  );
+  buff_flash_clkrst flash_clkrst_buffers (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .in_n({ caravel_clk, caravel_rstn, flash_clk_frame, flash_csb_frame, flash_clk_oeb, flash_csb_oeb, flash_io0_oeb, flash_io1_oeb, flash_io0_ieb, flash_io1_ieb, flash_io0_do, flash_io1_do }),
+    .in_s({ clock_core, flash_io1_di, flash_io0_di }),
+    .out_n({ clock_core_buf, flash_io1_di_buf, flash_io0_di_buf }),
+    .out_s({ caravel_clk_buf, caravel_rstn_buf, flash_clk_frame_buf, flash_csb_frame_buf, flash_clk_oeb_buf, flash_csb_oeb_buf, flash_io0_oeb_buf, flash_io1_oeb_buf, flash_io0_ieb_buf, flash_io1_ieb_buf, flash_io0_do_buf, flash_io1_do_buf })
+  );
+  gpio_control_block \gpio_control_bidir_1[0]  (
+    .gpio_defaults({ \gpio_defaults[12] , \gpio_defaults[11] , \gpio_defaults[10] , \gpio_defaults[9] , \gpio_defaults[8] , \gpio_defaults[7] , \gpio_defaults[6] , \gpio_defaults[5] , \gpio_defaults[4] , \gpio_defaults[3] , \gpio_defaults[2] , \gpio_defaults[1] , \gpio_defaults[0]  }),
+    .mgmt_gpio_in(\mgmt_io_in[0] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[0] ),
+    .mgmt_gpio_out(\mgmt_io_out[0] ),
+    .one(\mprj_io_one[0] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[0] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[0] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[0] ),
+    .pad_gpio_dm({ \mprj_io_dm[2] , \mprj_io_dm[1] , \mprj_io_dm[0]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[0] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[0] ),
+    .pad_gpio_in(\mprj_io_in[0] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[0] ),
+    .pad_gpio_out(\mprj_io_out[0] ),
+    .pad_gpio_outenb(\mprj_io_oeb[0] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[0] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[0] ),
+    .resetn(\gpio_resetn_1_shifted[0] ),
+    .resetn_out(\gpio_resetn_1[0] ),
+    .serial_clock(\gpio_clock_1_shifted[0] ),
+    .serial_clock_out(\gpio_clock_1[0] ),
+    .serial_data_in(\gpio_serial_link_1_shifted[0] ),
+    .serial_data_out(\gpio_serial_link_1[0] ),
+    .serial_load(\gpio_load_1_shifted[0] ),
+    .serial_load_out(\gpio_load_1[0] ),
+    .user_gpio_in(\user_io_in[0] ),
+    .user_gpio_oeb(\user_io_oeb[0] ),
+    .user_gpio_out(\user_io_out[0] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_1[1]  (
+    .gpio_defaults({ \gpio_defaults[25] , \gpio_defaults[24] , \gpio_defaults[23] , \gpio_defaults[22] , \gpio_defaults[21] , \gpio_defaults[20] , \gpio_defaults[19] , \gpio_defaults[18] , \gpio_defaults[17] , \gpio_defaults[16] , \gpio_defaults[15] , \gpio_defaults[14] , \gpio_defaults[13]  }),
+    .mgmt_gpio_in(\mgmt_io_in[1] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[1] ),
+    .mgmt_gpio_out(\mgmt_io_out[1] ),
+    .one(\mprj_io_one[1] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[1] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[1] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[1] ),
+    .pad_gpio_dm({ \mprj_io_dm[5] , \mprj_io_dm[4] , \mprj_io_dm[3]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[1] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[1] ),
+    .pad_gpio_in(\mprj_io_in[1] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[1] ),
+    .pad_gpio_out(\mprj_io_out[1] ),
+    .pad_gpio_outenb(\mprj_io_oeb[1] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[1] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[1] ),
+    .resetn(\gpio_resetn_1[0] ),
+    .resetn_out(\gpio_resetn_1[1] ),
+    .serial_clock(\gpio_clock_1[0] ),
+    .serial_clock_out(\gpio_clock_1[1] ),
+    .serial_data_in(\gpio_serial_link_1[0] ),
+    .serial_data_out(\gpio_serial_link_1[1] ),
+    .serial_load(\gpio_load_1[0] ),
+    .serial_load_out(\gpio_load_1[1] ),
+    .user_gpio_in(\user_io_in[1] ),
+    .user_gpio_oeb(\user_io_oeb[1] ),
+    .user_gpio_out(\user_io_out[1] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[0]  (
+    .gpio_defaults({ \gpio_defaults[467] , \gpio_defaults[466] , \gpio_defaults[465] , \gpio_defaults[464] , \gpio_defaults[463] , \gpio_defaults[462] , \gpio_defaults[461] , \gpio_defaults[460] , \gpio_defaults[459] , \gpio_defaults[458] , \gpio_defaults[457] , \gpio_defaults[456] , \gpio_defaults[455]  }),
+    .mgmt_gpio_in(\mgmt_io_in[35] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[35] ),
+    .mgmt_gpio_out(\mgmt_io_out[35] ),
+    .one(\mprj_io_one[35] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[35] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[35] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[35] ),
+    .pad_gpio_dm({ \mprj_io_dm[107] , \mprj_io_dm[106] , \mprj_io_dm[105]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[35] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[35] ),
+    .pad_gpio_in(\mprj_io_in[35] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[35] ),
+    .pad_gpio_out(\mprj_io_out[35] ),
+    .pad_gpio_outenb(\mprj_io_oeb[35] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[35] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[35] ),
+    .resetn(\gpio_resetn_2[17] ),
+    .resetn_out(\gpio_resetn_2[16] ),
+    .serial_clock(\gpio_clock_2[17] ),
+    .serial_clock_out(\gpio_clock_2[16] ),
+    .serial_data_in(\gpio_serial_link_2[17] ),
+    .serial_data_out(\gpio_serial_link_2[16] ),
+    .serial_load(\gpio_load_2[17] ),
+    .serial_load_out(\gpio_load_2[16] ),
+    .user_gpio_in(\user_io_in[35] ),
+    .user_gpio_oeb(\user_io_oeb[35] ),
+    .user_gpio_out(\user_io_out[35] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[1]  (
+    .gpio_defaults({ \gpio_defaults[480] , \gpio_defaults[479] , \gpio_defaults[478] , \gpio_defaults[477] , \gpio_defaults[476] , \gpio_defaults[475] , \gpio_defaults[474] , \gpio_defaults[473] , \gpio_defaults[472] , \gpio_defaults[471] , \gpio_defaults[470] , \gpio_defaults[469] , \gpio_defaults[468]  }),
+    .mgmt_gpio_in(\mgmt_io_in[36] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[36] ),
+    .mgmt_gpio_out(\mgmt_io_out[36] ),
+    .one(\mprj_io_one[36] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[36] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[36] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[36] ),
+    .pad_gpio_dm({ \mprj_io_dm[110] , \mprj_io_dm[109] , \mprj_io_dm[108]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[36] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[36] ),
+    .pad_gpio_in(\mprj_io_in[36] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[36] ),
+    .pad_gpio_out(\mprj_io_out[36] ),
+    .pad_gpio_outenb(\mprj_io_oeb[36] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[36] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[36] ),
+    .resetn(\gpio_resetn_2[18] ),
+    .resetn_out(\gpio_resetn_2[17] ),
+    .serial_clock(\gpio_clock_2[18] ),
+    .serial_clock_out(\gpio_clock_2[17] ),
+    .serial_data_in(\gpio_serial_link_2[18] ),
+    .serial_data_out(\gpio_serial_link_2[17] ),
+    .serial_load(\gpio_load_2[18] ),
+    .serial_load_out(\gpio_load_2[17] ),
+    .user_gpio_in(\user_io_in[36] ),
+    .user_gpio_oeb(\user_io_oeb[36] ),
+    .user_gpio_out(\user_io_out[36] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[2]  (
+    .gpio_defaults({ \gpio_defaults[493] , \gpio_defaults[492] , \gpio_defaults[491] , \gpio_defaults[490] , \gpio_defaults[489] , \gpio_defaults[488] , \gpio_defaults[487] , \gpio_defaults[486] , \gpio_defaults[485] , \gpio_defaults[484] , \gpio_defaults[483] , \gpio_defaults[482] , \gpio_defaults[481]  }),
+    .mgmt_gpio_in(\mgmt_io_in[37] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[37] ),
+    .mgmt_gpio_out(\mgmt_io_out[37] ),
+    .one(\mprj_io_one[37] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[37] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[37] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[37] ),
+    .pad_gpio_dm({ \mprj_io_dm[113] , \mprj_io_dm[112] , \mprj_io_dm[111]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[37] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[37] ),
+    .pad_gpio_in(\mprj_io_in[37] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[37] ),
+    .pad_gpio_out(\mprj_io_out[37] ),
+    .pad_gpio_outenb(\mprj_io_oeb[37] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[37] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[37] ),
+    .resetn(\gpio_resetn_2_shifted[18] ),
+    .resetn_out(\gpio_resetn_2[18] ),
+    .serial_clock(\gpio_clock_2_shifted[18] ),
+    .serial_clock_out(\gpio_clock_2[18] ),
+    .serial_data_in(\gpio_serial_link_2_shifted[18] ),
+    .serial_data_out(\gpio_serial_link_2[18] ),
+    .serial_load(\gpio_load_2_shifted[18] ),
+    .serial_load_out(\gpio_load_2[18] ),
+    .user_gpio_in(\user_io_in[37] ),
+    .user_gpio_oeb(\user_io_oeb[37] ),
+    .user_gpio_out(\user_io_out[37] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[0]  (
+    .gpio_defaults({ \gpio_defaults[116] , \gpio_defaults[115] , \gpio_defaults[114] , \gpio_defaults[113] , \gpio_defaults[112] , \gpio_defaults[111] , \gpio_defaults[110] , \gpio_defaults[109] , \gpio_defaults[108] , \gpio_defaults[107] , \gpio_defaults[106] , \gpio_defaults[105] , \gpio_defaults[104]  }),
+    .mgmt_gpio_in(\mgmt_io_in[8] ),
+    .mgmt_gpio_oeb(\mprj_io_one[8] ),
+    .mgmt_gpio_out(\mgmt_io_out[8] ),
+    .one(\mprj_io_one[8] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[8] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[8] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[8] ),
+    .pad_gpio_dm({ \mprj_io_dm[26] , \mprj_io_dm[25] , \mprj_io_dm[24]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[8] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[8] ),
+    .pad_gpio_in(\mprj_io_in[8] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[8] ),
+    .pad_gpio_out(\mprj_io_out[8] ),
+    .pad_gpio_outenb(\mprj_io_oeb[8] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[8] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[8] ),
+    .resetn(\gpio_resetn_1[7] ),
+    .resetn_out(\gpio_resetn_1[8] ),
+    .serial_clock(\gpio_clock_1[7] ),
+    .serial_clock_out(\gpio_clock_1[8] ),
+    .serial_data_in(\gpio_serial_link_1[7] ),
+    .serial_data_out(\gpio_serial_link_1[8] ),
+    .serial_load(\gpio_load_1[7] ),
+    .serial_load_out(\gpio_load_1[8] ),
+    .user_gpio_in(\user_io_in[8] ),
+    .user_gpio_oeb(\user_io_oeb[8] ),
+    .user_gpio_out(\user_io_out[8] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[10]  (
+    .gpio_defaults({ \gpio_defaults[246] , \gpio_defaults[245] , \gpio_defaults[244] , \gpio_defaults[243] , \gpio_defaults[242] , \gpio_defaults[241] , \gpio_defaults[240] , \gpio_defaults[239] , \gpio_defaults[238] , \gpio_defaults[237] , \gpio_defaults[236] , \gpio_defaults[235] , \gpio_defaults[234]  }),
+    .mgmt_gpio_in(\mgmt_io_in[18] ),
+    .mgmt_gpio_oeb(\mprj_io_one[18] ),
+    .mgmt_gpio_out(\mgmt_io_out[18] ),
+    .one(\mprj_io_one[18] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[18] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[18] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[18] ),
+    .pad_gpio_dm({ \mprj_io_dm[56] , \mprj_io_dm[55] , \mprj_io_dm[54]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[18] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[18] ),
+    .pad_gpio_in(\mprj_io_in[18] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[18] ),
+    .pad_gpio_out(\mprj_io_out[18] ),
+    .pad_gpio_outenb(\mprj_io_oeb[18] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[18] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[18] ),
+    .resetn(\gpio_resetn_1[17] ),
+    .resetn_out(\gpio_resetn_1[18] ),
+    .serial_clock(\gpio_clock_1[17] ),
+    .serial_clock_out(\gpio_clock_1[18] ),
+    .serial_data_in(\gpio_serial_link_1[17] ),
+    .serial_data_out(\gpio_serial_link_1[18] ),
+    .serial_load(\gpio_load_1[17] ),
+    .serial_load_out(\gpio_load_1[18] ),
+    .user_gpio_in(\user_io_in[18] ),
+    .user_gpio_oeb(\user_io_oeb[18] ),
+    .user_gpio_out(\user_io_out[18] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[1]  (
+    .gpio_defaults({ \gpio_defaults[129] , \gpio_defaults[128] , \gpio_defaults[127] , \gpio_defaults[126] , \gpio_defaults[125] , \gpio_defaults[124] , \gpio_defaults[123] , \gpio_defaults[122] , \gpio_defaults[121] , \gpio_defaults[120] , \gpio_defaults[119] , \gpio_defaults[118] , \gpio_defaults[117]  }),
+    .mgmt_gpio_in(\mgmt_io_in[9] ),
+    .mgmt_gpio_oeb(\mprj_io_one[9] ),
+    .mgmt_gpio_out(\mgmt_io_out[9] ),
+    .one(\mprj_io_one[9] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[9] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[9] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[9] ),
+    .pad_gpio_dm({ \mprj_io_dm[29] , \mprj_io_dm[28] , \mprj_io_dm[27]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[9] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[9] ),
+    .pad_gpio_in(\mprj_io_in[9] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[9] ),
+    .pad_gpio_out(\mprj_io_out[9] ),
+    .pad_gpio_outenb(\mprj_io_oeb[9] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[9] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[9] ),
+    .resetn(\gpio_resetn_1[8] ),
+    .resetn_out(\gpio_resetn_1[9] ),
+    .serial_clock(\gpio_clock_1[8] ),
+    .serial_clock_out(\gpio_clock_1[9] ),
+    .serial_data_in(\gpio_serial_link_1[8] ),
+    .serial_data_out(\gpio_serial_link_1[9] ),
+    .serial_load(\gpio_load_1[8] ),
+    .serial_load_out(\gpio_load_1[9] ),
+    .user_gpio_in(\user_io_in[9] ),
+    .user_gpio_oeb(\user_io_oeb[9] ),
+    .user_gpio_out(\user_io_out[9] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[2]  (
+    .gpio_defaults({ \gpio_defaults[142] , \gpio_defaults[141] , \gpio_defaults[140] , \gpio_defaults[139] , \gpio_defaults[138] , \gpio_defaults[137] , \gpio_defaults[136] , \gpio_defaults[135] , \gpio_defaults[134] , \gpio_defaults[133] , \gpio_defaults[132] , \gpio_defaults[131] , \gpio_defaults[130]  }),
+    .mgmt_gpio_in(\mgmt_io_in[10] ),
+    .mgmt_gpio_oeb(\mprj_io_one[10] ),
+    .mgmt_gpio_out(\mgmt_io_out[10] ),
+    .one(\mprj_io_one[10] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[10] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[10] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[10] ),
+    .pad_gpio_dm({ \mprj_io_dm[32] , \mprj_io_dm[31] , \mprj_io_dm[30]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[10] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[10] ),
+    .pad_gpio_in(\mprj_io_in[10] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[10] ),
+    .pad_gpio_out(\mprj_io_out[10] ),
+    .pad_gpio_outenb(\mprj_io_oeb[10] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[10] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[10] ),
+    .resetn(\gpio_resetn_1[9] ),
+    .resetn_out(\gpio_resetn_1[10] ),
+    .serial_clock(\gpio_clock_1[9] ),
+    .serial_clock_out(\gpio_clock_1[10] ),
+    .serial_data_in(\gpio_serial_link_1[9] ),
+    .serial_data_out(\gpio_serial_link_1[10] ),
+    .serial_load(\gpio_load_1[9] ),
+    .serial_load_out(\gpio_load_1[10] ),
+    .user_gpio_in(\user_io_in[10] ),
+    .user_gpio_oeb(\user_io_oeb[10] ),
+    .user_gpio_out(\user_io_out[10] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[3]  (
+    .gpio_defaults({ \gpio_defaults[155] , \gpio_defaults[154] , \gpio_defaults[153] , \gpio_defaults[152] , \gpio_defaults[151] , \gpio_defaults[150] , \gpio_defaults[149] , \gpio_defaults[148] , \gpio_defaults[147] , \gpio_defaults[146] , \gpio_defaults[145] , \gpio_defaults[144] , \gpio_defaults[143]  }),
+    .mgmt_gpio_in(\mgmt_io_in[11] ),
+    .mgmt_gpio_oeb(\mprj_io_one[11] ),
+    .mgmt_gpio_out(\mgmt_io_out[11] ),
+    .one(\mprj_io_one[11] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[11] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[11] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[11] ),
+    .pad_gpio_dm({ \mprj_io_dm[35] , \mprj_io_dm[34] , \mprj_io_dm[33]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[11] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[11] ),
+    .pad_gpio_in(\mprj_io_in[11] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[11] ),
+    .pad_gpio_out(\mprj_io_out[11] ),
+    .pad_gpio_outenb(\mprj_io_oeb[11] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[11] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[11] ),
+    .resetn(\gpio_resetn_1[10] ),
+    .resetn_out(\gpio_resetn_1[11] ),
+    .serial_clock(\gpio_clock_1[10] ),
+    .serial_clock_out(\gpio_clock_1[11] ),
+    .serial_data_in(\gpio_serial_link_1[10] ),
+    .serial_data_out(\gpio_serial_link_1[11] ),
+    .serial_load(\gpio_load_1[10] ),
+    .serial_load_out(\gpio_load_1[11] ),
+    .user_gpio_in(\user_io_in[11] ),
+    .user_gpio_oeb(\user_io_oeb[11] ),
+    .user_gpio_out(\user_io_out[11] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[4]  (
+    .gpio_defaults({ \gpio_defaults[168] , \gpio_defaults[167] , \gpio_defaults[166] , \gpio_defaults[165] , \gpio_defaults[164] , \gpio_defaults[163] , \gpio_defaults[162] , \gpio_defaults[161] , \gpio_defaults[160] , \gpio_defaults[159] , \gpio_defaults[158] , \gpio_defaults[157] , \gpio_defaults[156]  }),
+    .mgmt_gpio_in(\mgmt_io_in[12] ),
+    .mgmt_gpio_oeb(\mprj_io_one[12] ),
+    .mgmt_gpio_out(\mgmt_io_out[12] ),
+    .one(\mprj_io_one[12] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[12] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[12] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[12] ),
+    .pad_gpio_dm({ \mprj_io_dm[38] , \mprj_io_dm[37] , \mprj_io_dm[36]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[12] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[12] ),
+    .pad_gpio_in(\mprj_io_in[12] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[12] ),
+    .pad_gpio_out(\mprj_io_out[12] ),
+    .pad_gpio_outenb(\mprj_io_oeb[12] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[12] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[12] ),
+    .resetn(\gpio_resetn_1[11] ),
+    .resetn_out(\gpio_resetn_1[12] ),
+    .serial_clock(\gpio_clock_1[11] ),
+    .serial_clock_out(\gpio_clock_1[12] ),
+    .serial_data_in(\gpio_serial_link_1[11] ),
+    .serial_data_out(\gpio_serial_link_1[12] ),
+    .serial_load(\gpio_load_1[11] ),
+    .serial_load_out(\gpio_load_1[12] ),
+    .user_gpio_in(\user_io_in[12] ),
+    .user_gpio_oeb(\user_io_oeb[12] ),
+    .user_gpio_out(\user_io_out[12] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[5]  (
+    .gpio_defaults({ \gpio_defaults[181] , \gpio_defaults[180] , \gpio_defaults[179] , \gpio_defaults[178] , \gpio_defaults[177] , \gpio_defaults[176] , \gpio_defaults[175] , \gpio_defaults[174] , \gpio_defaults[173] , \gpio_defaults[172] , \gpio_defaults[171] , \gpio_defaults[170] , \gpio_defaults[169]  }),
+    .mgmt_gpio_in(\mgmt_io_in[13] ),
+    .mgmt_gpio_oeb(\mprj_io_one[13] ),
+    .mgmt_gpio_out(\mgmt_io_out[13] ),
+    .one(\mprj_io_one[13] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[13] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[13] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[13] ),
+    .pad_gpio_dm({ \mprj_io_dm[41] , \mprj_io_dm[40] , \mprj_io_dm[39]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[13] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[13] ),
+    .pad_gpio_in(\mprj_io_in[13] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[13] ),
+    .pad_gpio_out(\mprj_io_out[13] ),
+    .pad_gpio_outenb(\mprj_io_oeb[13] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[13] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[13] ),
+    .resetn(\gpio_resetn_1[12] ),
+    .resetn_out(\gpio_resetn_1[13] ),
+    .serial_clock(\gpio_clock_1[12] ),
+    .serial_clock_out(\gpio_clock_1[13] ),
+    .serial_data_in(\gpio_serial_link_1[12] ),
+    .serial_data_out(\gpio_serial_link_1[13] ),
+    .serial_load(\gpio_load_1[12] ),
+    .serial_load_out(\gpio_load_1[13] ),
+    .user_gpio_in(\user_io_in[13] ),
+    .user_gpio_oeb(\user_io_oeb[13] ),
+    .user_gpio_out(\user_io_out[13] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[6]  (
+    .gpio_defaults({ \gpio_defaults[194] , \gpio_defaults[193] , \gpio_defaults[192] , \gpio_defaults[191] , \gpio_defaults[190] , \gpio_defaults[189] , \gpio_defaults[188] , \gpio_defaults[187] , \gpio_defaults[186] , \gpio_defaults[185] , \gpio_defaults[184] , \gpio_defaults[183] , \gpio_defaults[182]  }),
+    .mgmt_gpio_in(\mgmt_io_in[14] ),
+    .mgmt_gpio_oeb(\mprj_io_one[14] ),
+    .mgmt_gpio_out(\mgmt_io_out[14] ),
+    .one(\mprj_io_one[14] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[14] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[14] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[14] ),
+    .pad_gpio_dm({ \mprj_io_dm[44] , \mprj_io_dm[43] , \mprj_io_dm[42]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[14] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[14] ),
+    .pad_gpio_in(\mprj_io_in[14] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[14] ),
+    .pad_gpio_out(\mprj_io_out[14] ),
+    .pad_gpio_outenb(\mprj_io_oeb[14] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[14] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[14] ),
+    .resetn(\gpio_resetn_1[13] ),
+    .resetn_out(\gpio_resetn_1[14] ),
+    .serial_clock(\gpio_clock_1[13] ),
+    .serial_clock_out(\gpio_clock_1[14] ),
+    .serial_data_in(\gpio_serial_link_1[13] ),
+    .serial_data_out(\gpio_serial_link_1[14] ),
+    .serial_load(\gpio_load_1[13] ),
+    .serial_load_out(\gpio_load_1[14] ),
+    .user_gpio_in(\user_io_in[14] ),
+    .user_gpio_oeb(\user_io_oeb[14] ),
+    .user_gpio_out(\user_io_out[14] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[7]  (
+    .gpio_defaults({ \gpio_defaults[207] , \gpio_defaults[206] , \gpio_defaults[205] , \gpio_defaults[204] , \gpio_defaults[203] , \gpio_defaults[202] , \gpio_defaults[201] , \gpio_defaults[200] , \gpio_defaults[199] , \gpio_defaults[198] , \gpio_defaults[197] , \gpio_defaults[196] , \gpio_defaults[195]  }),
+    .mgmt_gpio_in(\mgmt_io_in[15] ),
+    .mgmt_gpio_oeb(\mprj_io_one[15] ),
+    .mgmt_gpio_out(\mgmt_io_out[15] ),
+    .one(\mprj_io_one[15] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[15] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[15] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[15] ),
+    .pad_gpio_dm({ \mprj_io_dm[47] , \mprj_io_dm[46] , \mprj_io_dm[45]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[15] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[15] ),
+    .pad_gpio_in(\mprj_io_in[15] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[15] ),
+    .pad_gpio_out(\mprj_io_out[15] ),
+    .pad_gpio_outenb(\mprj_io_oeb[15] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[15] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[15] ),
+    .resetn(\gpio_resetn_1[14] ),
+    .resetn_out(\gpio_resetn_1[15] ),
+    .serial_clock(\gpio_clock_1[14] ),
+    .serial_clock_out(\gpio_clock_1[15] ),
+    .serial_data_in(\gpio_serial_link_1[14] ),
+    .serial_data_out(\gpio_serial_link_1[15] ),
+    .serial_load(\gpio_load_1[14] ),
+    .serial_load_out(\gpio_load_1[15] ),
+    .user_gpio_in(\user_io_in[15] ),
+    .user_gpio_oeb(\user_io_oeb[15] ),
+    .user_gpio_out(\user_io_out[15] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[8]  (
+    .gpio_defaults({ \gpio_defaults[220] , \gpio_defaults[219] , \gpio_defaults[218] , \gpio_defaults[217] , \gpio_defaults[216] , \gpio_defaults[215] , \gpio_defaults[214] , \gpio_defaults[213] , \gpio_defaults[212] , \gpio_defaults[211] , \gpio_defaults[210] , \gpio_defaults[209] , \gpio_defaults[208]  }),
+    .mgmt_gpio_in(\mgmt_io_in[16] ),
+    .mgmt_gpio_oeb(\mprj_io_one[16] ),
+    .mgmt_gpio_out(\mgmt_io_out[16] ),
+    .one(\mprj_io_one[16] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[16] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[16] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[16] ),
+    .pad_gpio_dm({ \mprj_io_dm[50] , \mprj_io_dm[49] , \mprj_io_dm[48]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[16] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[16] ),
+    .pad_gpio_in(\mprj_io_in[16] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[16] ),
+    .pad_gpio_out(\mprj_io_out[16] ),
+    .pad_gpio_outenb(\mprj_io_oeb[16] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[16] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[16] ),
+    .resetn(\gpio_resetn_1[15] ),
+    .resetn_out(\gpio_resetn_1[16] ),
+    .serial_clock(\gpio_clock_1[15] ),
+    .serial_clock_out(\gpio_clock_1[16] ),
+    .serial_data_in(\gpio_serial_link_1[15] ),
+    .serial_data_out(\gpio_serial_link_1[16] ),
+    .serial_load(\gpio_load_1[15] ),
+    .serial_load_out(\gpio_load_1[16] ),
+    .user_gpio_in(\user_io_in[16] ),
+    .user_gpio_oeb(\user_io_oeb[16] ),
+    .user_gpio_out(\user_io_out[16] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[9]  (
+    .gpio_defaults({ \gpio_defaults[233] , \gpio_defaults[232] , \gpio_defaults[231] , \gpio_defaults[230] , \gpio_defaults[229] , \gpio_defaults[228] , \gpio_defaults[227] , \gpio_defaults[226] , \gpio_defaults[225] , \gpio_defaults[224] , \gpio_defaults[223] , \gpio_defaults[222] , \gpio_defaults[221]  }),
+    .mgmt_gpio_in(\mgmt_io_in[17] ),
+    .mgmt_gpio_oeb(\mprj_io_one[17] ),
+    .mgmt_gpio_out(\mgmt_io_out[17] ),
+    .one(\mprj_io_one[17] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[17] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[17] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[17] ),
+    .pad_gpio_dm({ \mprj_io_dm[53] , \mprj_io_dm[52] , \mprj_io_dm[51]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[17] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[17] ),
+    .pad_gpio_in(\mprj_io_in[17] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[17] ),
+    .pad_gpio_out(\mprj_io_out[17] ),
+    .pad_gpio_outenb(\mprj_io_oeb[17] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[17] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[17] ),
+    .resetn(\gpio_resetn_1[16] ),
+    .resetn_out(\gpio_resetn_1[17] ),
+    .serial_clock(\gpio_clock_1[16] ),
+    .serial_clock_out(\gpio_clock_1[17] ),
+    .serial_data_in(\gpio_serial_link_1[16] ),
+    .serial_data_out(\gpio_serial_link_1[17] ),
+    .serial_load(\gpio_load_1[16] ),
+    .serial_load_out(\gpio_load_1[17] ),
+    .user_gpio_in(\user_io_in[17] ),
+    .user_gpio_oeb(\user_io_oeb[17] ),
+    .user_gpio_out(\user_io_out[17] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[0]  (
+    .gpio_defaults({ \gpio_defaults[38] , \gpio_defaults[37] , \gpio_defaults[36] , \gpio_defaults[35] , \gpio_defaults[34] , \gpio_defaults[33] , \gpio_defaults[32] , \gpio_defaults[31] , \gpio_defaults[30] , \gpio_defaults[29] , \gpio_defaults[28] , \gpio_defaults[27] , \gpio_defaults[26]  }),
+    .mgmt_gpio_in(\mgmt_io_in[2] ),
+    .mgmt_gpio_oeb(\mprj_io_one[2] ),
+    .mgmt_gpio_out(\mgmt_io_out[2] ),
+    .one(\mprj_io_one[2] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[2] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[2] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[2] ),
+    .pad_gpio_dm({ \mprj_io_dm[8] , \mprj_io_dm[7] , \mprj_io_dm[6]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[2] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[2] ),
+    .pad_gpio_in(\mprj_io_in[2] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[2] ),
+    .pad_gpio_out(\mprj_io_out[2] ),
+    .pad_gpio_outenb(\mprj_io_oeb[2] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[2] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[2] ),
+    .resetn(\gpio_resetn_1[1] ),
+    .resetn_out(\gpio_resetn_1[2] ),
+    .serial_clock(\gpio_clock_1[1] ),
+    .serial_clock_out(\gpio_clock_1[2] ),
+    .serial_data_in(\gpio_serial_link_1[1] ),
+    .serial_data_out(\gpio_serial_link_1[2] ),
+    .serial_load(\gpio_load_1[1] ),
+    .serial_load_out(\gpio_load_1[2] ),
+    .user_gpio_in(\user_io_in[2] ),
+    .user_gpio_oeb(\user_io_oeb[2] ),
+    .user_gpio_out(\user_io_out[2] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[1]  (
+    .gpio_defaults({ \gpio_defaults[51] , \gpio_defaults[50] , \gpio_defaults[49] , \gpio_defaults[48] , \gpio_defaults[47] , \gpio_defaults[46] , \gpio_defaults[45] , \gpio_defaults[44] , \gpio_defaults[43] , \gpio_defaults[42] , \gpio_defaults[41] , \gpio_defaults[40] , \gpio_defaults[39]  }),
+    .mgmt_gpio_in(\mgmt_io_in[3] ),
+    .mgmt_gpio_oeb(\mprj_io_one[3] ),
+    .mgmt_gpio_out(\mgmt_io_out[3] ),
+    .one(\mprj_io_one[3] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[3] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[3] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[3] ),
+    .pad_gpio_dm({ \mprj_io_dm[11] , \mprj_io_dm[10] , \mprj_io_dm[9]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[3] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[3] ),
+    .pad_gpio_in(\mprj_io_in[3] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[3] ),
+    .pad_gpio_out(\mprj_io_out[3] ),
+    .pad_gpio_outenb(\mprj_io_oeb[3] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[3] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[3] ),
+    .resetn(\gpio_resetn_1[2] ),
+    .resetn_out(\gpio_resetn_1[3] ),
+    .serial_clock(\gpio_clock_1[2] ),
+    .serial_clock_out(\gpio_clock_1[3] ),
+    .serial_data_in(\gpio_serial_link_1[2] ),
+    .serial_data_out(\gpio_serial_link_1[3] ),
+    .serial_load(\gpio_load_1[2] ),
+    .serial_load_out(\gpio_load_1[3] ),
+    .user_gpio_in(\user_io_in[3] ),
+    .user_gpio_oeb(\user_io_oeb[3] ),
+    .user_gpio_out(\user_io_out[3] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[2]  (
+    .gpio_defaults({ \gpio_defaults[64] , \gpio_defaults[63] , \gpio_defaults[62] , \gpio_defaults[61] , \gpio_defaults[60] , \gpio_defaults[59] , \gpio_defaults[58] , \gpio_defaults[57] , \gpio_defaults[56] , \gpio_defaults[55] , \gpio_defaults[54] , \gpio_defaults[53] , \gpio_defaults[52]  }),
+    .mgmt_gpio_in(\mgmt_io_in[4] ),
+    .mgmt_gpio_oeb(\mprj_io_one[4] ),
+    .mgmt_gpio_out(\mgmt_io_out[4] ),
+    .one(\mprj_io_one[4] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[4] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[4] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[4] ),
+    .pad_gpio_dm({ \mprj_io_dm[14] , \mprj_io_dm[13] , \mprj_io_dm[12]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[4] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[4] ),
+    .pad_gpio_in(\mprj_io_in[4] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[4] ),
+    .pad_gpio_out(\mprj_io_out[4] ),
+    .pad_gpio_outenb(\mprj_io_oeb[4] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[4] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[4] ),
+    .resetn(\gpio_resetn_1[3] ),
+    .resetn_out(\gpio_resetn_1[4] ),
+    .serial_clock(\gpio_clock_1[3] ),
+    .serial_clock_out(\gpio_clock_1[4] ),
+    .serial_data_in(\gpio_serial_link_1[3] ),
+    .serial_data_out(\gpio_serial_link_1[4] ),
+    .serial_load(\gpio_load_1[3] ),
+    .serial_load_out(\gpio_load_1[4] ),
+    .user_gpio_in(\user_io_in[4] ),
+    .user_gpio_oeb(\user_io_oeb[4] ),
+    .user_gpio_out(\user_io_out[4] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[3]  (
+    .gpio_defaults({ \gpio_defaults[77] , \gpio_defaults[76] , \gpio_defaults[75] , \gpio_defaults[74] , \gpio_defaults[73] , \gpio_defaults[72] , \gpio_defaults[71] , \gpio_defaults[70] , \gpio_defaults[69] , \gpio_defaults[68] , \gpio_defaults[67] , \gpio_defaults[66] , \gpio_defaults[65]  }),
+    .mgmt_gpio_in(\mgmt_io_in[5] ),
+    .mgmt_gpio_oeb(\mprj_io_one[5] ),
+    .mgmt_gpio_out(\mgmt_io_out[5] ),
+    .one(\mprj_io_one[5] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[5] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[5] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[5] ),
+    .pad_gpio_dm({ \mprj_io_dm[17] , \mprj_io_dm[16] , \mprj_io_dm[15]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[5] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[5] ),
+    .pad_gpio_in(\mprj_io_in[5] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[5] ),
+    .pad_gpio_out(\mprj_io_out[5] ),
+    .pad_gpio_outenb(\mprj_io_oeb[5] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[5] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[5] ),
+    .resetn(\gpio_resetn_1[4] ),
+    .resetn_out(\gpio_resetn_1[5] ),
+    .serial_clock(\gpio_clock_1[4] ),
+    .serial_clock_out(\gpio_clock_1[5] ),
+    .serial_data_in(\gpio_serial_link_1[4] ),
+    .serial_data_out(\gpio_serial_link_1[5] ),
+    .serial_load(\gpio_load_1[4] ),
+    .serial_load_out(\gpio_load_1[5] ),
+    .user_gpio_in(\user_io_in[5] ),
+    .user_gpio_oeb(\user_io_oeb[5] ),
+    .user_gpio_out(\user_io_out[5] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[4]  (
+    .gpio_defaults({ \gpio_defaults[90] , \gpio_defaults[89] , \gpio_defaults[88] , \gpio_defaults[87] , \gpio_defaults[86] , \gpio_defaults[85] , \gpio_defaults[84] , \gpio_defaults[83] , \gpio_defaults[82] , \gpio_defaults[81] , \gpio_defaults[80] , \gpio_defaults[79] , \gpio_defaults[78]  }),
+    .mgmt_gpio_in(\mgmt_io_in[6] ),
+    .mgmt_gpio_oeb(\mprj_io_one[6] ),
+    .mgmt_gpio_out(\mgmt_io_out[6] ),
+    .one(\mprj_io_one[6] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[6] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[6] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[6] ),
+    .pad_gpio_dm({ \mprj_io_dm[20] , \mprj_io_dm[19] , \mprj_io_dm[18]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[6] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[6] ),
+    .pad_gpio_in(\mprj_io_in[6] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[6] ),
+    .pad_gpio_out(\mprj_io_out[6] ),
+    .pad_gpio_outenb(\mprj_io_oeb[6] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[6] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[6] ),
+    .resetn(\gpio_resetn_1[5] ),
+    .resetn_out(\gpio_resetn_1[6] ),
+    .serial_clock(\gpio_clock_1[5] ),
+    .serial_clock_out(\gpio_clock_1[6] ),
+    .serial_data_in(\gpio_serial_link_1[5] ),
+    .serial_data_out(\gpio_serial_link_1[6] ),
+    .serial_load(\gpio_load_1[5] ),
+    .serial_load_out(\gpio_load_1[6] ),
+    .user_gpio_in(\user_io_in[6] ),
+    .user_gpio_oeb(\user_io_oeb[6] ),
+    .user_gpio_out(\user_io_out[6] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[5]  (
+    .gpio_defaults({ \gpio_defaults[103] , \gpio_defaults[102] , \gpio_defaults[101] , \gpio_defaults[100] , \gpio_defaults[99] , \gpio_defaults[98] , \gpio_defaults[97] , \gpio_defaults[96] , \gpio_defaults[95] , \gpio_defaults[94] , \gpio_defaults[93] , \gpio_defaults[92] , \gpio_defaults[91]  }),
+    .mgmt_gpio_in(\mgmt_io_in[7] ),
+    .mgmt_gpio_oeb(\mprj_io_one[7] ),
+    .mgmt_gpio_out(\mgmt_io_out[7] ),
+    .one(\mprj_io_one[7] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[7] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[7] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[7] ),
+    .pad_gpio_dm({ \mprj_io_dm[23] , \mprj_io_dm[22] , \mprj_io_dm[21]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[7] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[7] ),
+    .pad_gpio_in(\mprj_io_in[7] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[7] ),
+    .pad_gpio_out(\mprj_io_out[7] ),
+    .pad_gpio_outenb(\mprj_io_oeb[7] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[7] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[7] ),
+    .resetn(\gpio_resetn_1[6] ),
+    .resetn_out(\gpio_resetn_1[7] ),
+    .serial_clock(\gpio_clock_1[6] ),
+    .serial_clock_out(\gpio_clock_1[7] ),
+    .serial_data_in(\gpio_serial_link_1[6] ),
+    .serial_data_out(\gpio_serial_link_1[7] ),
+    .serial_load(\gpio_load_1[6] ),
+    .serial_load_out(\gpio_load_1[7] ),
+    .user_gpio_in(\user_io_in[7] ),
+    .user_gpio_oeb(\user_io_oeb[7] ),
+    .user_gpio_out(\user_io_out[7] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[0]  (
+    .gpio_defaults({ \gpio_defaults[259] , \gpio_defaults[258] , \gpio_defaults[257] , \gpio_defaults[256] , \gpio_defaults[255] , \gpio_defaults[254] , \gpio_defaults[253] , \gpio_defaults[252] , \gpio_defaults[251] , \gpio_defaults[250] , \gpio_defaults[249] , \gpio_defaults[248] , \gpio_defaults[247]  }),
+    .mgmt_gpio_in(\mgmt_io_in[19] ),
+    .mgmt_gpio_oeb(\mprj_io_one[19] ),
+    .mgmt_gpio_out(\mgmt_io_out[19] ),
+    .one(\mprj_io_one[19] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[19] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[19] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[19] ),
+    .pad_gpio_dm({ \mprj_io_dm[59] , \mprj_io_dm[58] , \mprj_io_dm[57]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[19] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[19] ),
+    .pad_gpio_in(\mprj_io_in[19] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[19] ),
+    .pad_gpio_out(\mprj_io_out[19] ),
+    .pad_gpio_outenb(\mprj_io_oeb[19] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[19] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[19] ),
+    .resetn(\gpio_resetn_2[1] ),
+    .resetn_out(\gpio_resetn_2[0] ),
+    .serial_clock(\gpio_clock_2[1] ),
+    .serial_clock_out(\gpio_clock_2[0] ),
+    .serial_data_in(\gpio_serial_link_2[1] ),
+    .serial_data_out(\gpio_serial_link_2[0] ),
+    .serial_load(\gpio_load_2[1] ),
+    .serial_load_out(\gpio_load_2[0] ),
+    .user_gpio_in(\user_io_in[19] ),
+    .user_gpio_oeb(\user_io_oeb[19] ),
+    .user_gpio_out(\user_io_out[19] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[10]  (
+    .gpio_defaults({ \gpio_defaults[389] , \gpio_defaults[388] , \gpio_defaults[387] , \gpio_defaults[386] , \gpio_defaults[385] , \gpio_defaults[384] , \gpio_defaults[383] , \gpio_defaults[382] , \gpio_defaults[381] , \gpio_defaults[380] , \gpio_defaults[379] , \gpio_defaults[378] , \gpio_defaults[377]  }),
+    .mgmt_gpio_in(\mgmt_io_in[29] ),
+    .mgmt_gpio_oeb(\mprj_io_one[29] ),
+    .mgmt_gpio_out(\mgmt_io_out[29] ),
+    .one(\mprj_io_one[29] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[29] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[29] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[29] ),
+    .pad_gpio_dm({ \mprj_io_dm[89] , \mprj_io_dm[88] , \mprj_io_dm[87]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[29] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[29] ),
+    .pad_gpio_in(\mprj_io_in[29] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[29] ),
+    .pad_gpio_out(\mprj_io_out[29] ),
+    .pad_gpio_outenb(\mprj_io_oeb[29] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[29] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[29] ),
+    .resetn(\gpio_resetn_2[11] ),
+    .resetn_out(\gpio_resetn_2[10] ),
+    .serial_clock(\gpio_clock_2[11] ),
+    .serial_clock_out(\gpio_clock_2[10] ),
+    .serial_data_in(\gpio_serial_link_2[11] ),
+    .serial_data_out(\gpio_serial_link_2[10] ),
+    .serial_load(\gpio_load_2[11] ),
+    .serial_load_out(\gpio_load_2[10] ),
+    .user_gpio_in(\user_io_in[29] ),
+    .user_gpio_oeb(\user_io_oeb[29] ),
+    .user_gpio_out(\user_io_out[29] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[11]  (
+    .gpio_defaults({ \gpio_defaults[402] , \gpio_defaults[401] , \gpio_defaults[400] , \gpio_defaults[399] , \gpio_defaults[398] , \gpio_defaults[397] , \gpio_defaults[396] , \gpio_defaults[395] , \gpio_defaults[394] , \gpio_defaults[393] , \gpio_defaults[392] , \gpio_defaults[391] , \gpio_defaults[390]  }),
+    .mgmt_gpio_in(\mgmt_io_in[30] ),
+    .mgmt_gpio_oeb(\mprj_io_one[30] ),
+    .mgmt_gpio_out(\mgmt_io_out[30] ),
+    .one(\mprj_io_one[30] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[30] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[30] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[30] ),
+    .pad_gpio_dm({ \mprj_io_dm[92] , \mprj_io_dm[91] , \mprj_io_dm[90]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[30] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[30] ),
+    .pad_gpio_in(\mprj_io_in[30] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[30] ),
+    .pad_gpio_out(\mprj_io_out[30] ),
+    .pad_gpio_outenb(\mprj_io_oeb[30] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[30] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[30] ),
+    .resetn(\gpio_resetn_2[12] ),
+    .resetn_out(\gpio_resetn_2[11] ),
+    .serial_clock(\gpio_clock_2[12] ),
+    .serial_clock_out(\gpio_clock_2[11] ),
+    .serial_data_in(\gpio_serial_link_2[12] ),
+    .serial_data_out(\gpio_serial_link_2[11] ),
+    .serial_load(\gpio_load_2[12] ),
+    .serial_load_out(\gpio_load_2[11] ),
+    .user_gpio_in(\user_io_in[30] ),
+    .user_gpio_oeb(\user_io_oeb[30] ),
+    .user_gpio_out(\user_io_out[30] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[12]  (
+    .gpio_defaults({ \gpio_defaults[415] , \gpio_defaults[414] , \gpio_defaults[413] , \gpio_defaults[412] , \gpio_defaults[411] , \gpio_defaults[410] , \gpio_defaults[409] , \gpio_defaults[408] , \gpio_defaults[407] , \gpio_defaults[406] , \gpio_defaults[405] , \gpio_defaults[404] , \gpio_defaults[403]  }),
+    .mgmt_gpio_in(\mgmt_io_in[31] ),
+    .mgmt_gpio_oeb(\mprj_io_one[31] ),
+    .mgmt_gpio_out(\mgmt_io_out[31] ),
+    .one(\mprj_io_one[31] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[31] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[31] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[31] ),
+    .pad_gpio_dm({ \mprj_io_dm[95] , \mprj_io_dm[94] , \mprj_io_dm[93]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[31] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[31] ),
+    .pad_gpio_in(\mprj_io_in[31] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[31] ),
+    .pad_gpio_out(\mprj_io_out[31] ),
+    .pad_gpio_outenb(\mprj_io_oeb[31] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[31] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[31] ),
+    .resetn(\gpio_resetn_2[13] ),
+    .resetn_out(\gpio_resetn_2[12] ),
+    .serial_clock(\gpio_clock_2[13] ),
+    .serial_clock_out(\gpio_clock_2[12] ),
+    .serial_data_in(\gpio_serial_link_2[13] ),
+    .serial_data_out(\gpio_serial_link_2[12] ),
+    .serial_load(\gpio_load_2[13] ),
+    .serial_load_out(\gpio_load_2[12] ),
+    .user_gpio_in(\user_io_in[31] ),
+    .user_gpio_oeb(\user_io_oeb[31] ),
+    .user_gpio_out(\user_io_out[31] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[13]  (
+    .gpio_defaults({ \gpio_defaults[428] , \gpio_defaults[427] , \gpio_defaults[426] , \gpio_defaults[425] , \gpio_defaults[424] , \gpio_defaults[423] , \gpio_defaults[422] , \gpio_defaults[421] , \gpio_defaults[420] , \gpio_defaults[419] , \gpio_defaults[418] , \gpio_defaults[417] , \gpio_defaults[416]  }),
+    .mgmt_gpio_in(\mgmt_io_in[32] ),
+    .mgmt_gpio_oeb(\mprj_io_one[32] ),
+    .mgmt_gpio_out(\mgmt_io_out[32] ),
+    .one(\mprj_io_one[32] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[32] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[32] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[32] ),
+    .pad_gpio_dm({ \mprj_io_dm[98] , \mprj_io_dm[97] , \mprj_io_dm[96]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[32] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[32] ),
+    .pad_gpio_in(\mprj_io_in[32] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[32] ),
+    .pad_gpio_out(\mprj_io_out[32] ),
+    .pad_gpio_outenb(\mprj_io_oeb[32] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[32] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[32] ),
+    .resetn(\gpio_resetn_2[14] ),
+    .resetn_out(\gpio_resetn_2[13] ),
+    .serial_clock(\gpio_clock_2[14] ),
+    .serial_clock_out(\gpio_clock_2[13] ),
+    .serial_data_in(\gpio_serial_link_2[14] ),
+    .serial_data_out(\gpio_serial_link_2[13] ),
+    .serial_load(\gpio_load_2[14] ),
+    .serial_load_out(\gpio_load_2[13] ),
+    .user_gpio_in(\user_io_in[32] ),
+    .user_gpio_oeb(\user_io_oeb[32] ),
+    .user_gpio_out(\user_io_out[32] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[14]  (
+    .gpio_defaults({ \gpio_defaults[441] , \gpio_defaults[440] , \gpio_defaults[439] , \gpio_defaults[438] , \gpio_defaults[437] , \gpio_defaults[436] , \gpio_defaults[435] , \gpio_defaults[434] , \gpio_defaults[433] , \gpio_defaults[432] , \gpio_defaults[431] , \gpio_defaults[430] , \gpio_defaults[429]  }),
+    .mgmt_gpio_in(\mgmt_io_in[33] ),
+    .mgmt_gpio_oeb(\mprj_io_one[33] ),
+    .mgmt_gpio_out(\mgmt_io_out[33] ),
+    .one(\mprj_io_one[33] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[33] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[33] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[33] ),
+    .pad_gpio_dm({ \mprj_io_dm[101] , \mprj_io_dm[100] , \mprj_io_dm[99]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[33] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[33] ),
+    .pad_gpio_in(\mprj_io_in[33] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[33] ),
+    .pad_gpio_out(\mprj_io_out[33] ),
+    .pad_gpio_outenb(\mprj_io_oeb[33] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[33] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[33] ),
+    .resetn(\gpio_resetn_2[15] ),
+    .resetn_out(\gpio_resetn_2[14] ),
+    .serial_clock(\gpio_clock_2[15] ),
+    .serial_clock_out(\gpio_clock_2[14] ),
+    .serial_data_in(\gpio_serial_link_2[15] ),
+    .serial_data_out(\gpio_serial_link_2[14] ),
+    .serial_load(\gpio_load_2[15] ),
+    .serial_load_out(\gpio_load_2[14] ),
+    .user_gpio_in(\user_io_in[33] ),
+    .user_gpio_oeb(\user_io_oeb[33] ),
+    .user_gpio_out(\user_io_out[33] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[15]  (
+    .gpio_defaults({ \gpio_defaults[454] , \gpio_defaults[453] , \gpio_defaults[452] , \gpio_defaults[451] , \gpio_defaults[450] , \gpio_defaults[449] , \gpio_defaults[448] , \gpio_defaults[447] , \gpio_defaults[446] , \gpio_defaults[445] , \gpio_defaults[444] , \gpio_defaults[443] , \gpio_defaults[442]  }),
+    .mgmt_gpio_in(\mgmt_io_in[34] ),
+    .mgmt_gpio_oeb(\mprj_io_one[34] ),
+    .mgmt_gpio_out(\mgmt_io_out[34] ),
+    .one(\mprj_io_one[34] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[34] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[34] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[34] ),
+    .pad_gpio_dm({ \mprj_io_dm[104] , \mprj_io_dm[103] , \mprj_io_dm[102]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[34] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[34] ),
+    .pad_gpio_in(\mprj_io_in[34] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[34] ),
+    .pad_gpio_out(\mprj_io_out[34] ),
+    .pad_gpio_outenb(\mprj_io_oeb[34] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[34] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[34] ),
+    .resetn(\gpio_resetn_2[16] ),
+    .resetn_out(\gpio_resetn_2[15] ),
+    .serial_clock(\gpio_clock_2[16] ),
+    .serial_clock_out(\gpio_clock_2[15] ),
+    .serial_data_in(\gpio_serial_link_2[16] ),
+    .serial_data_out(\gpio_serial_link_2[15] ),
+    .serial_load(\gpio_load_2[16] ),
+    .serial_load_out(\gpio_load_2[15] ),
+    .user_gpio_in(\user_io_in[34] ),
+    .user_gpio_oeb(\user_io_oeb[34] ),
+    .user_gpio_out(\user_io_out[34] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[1]  (
+    .gpio_defaults({ \gpio_defaults[272] , \gpio_defaults[271] , \gpio_defaults[270] , \gpio_defaults[269] , \gpio_defaults[268] , \gpio_defaults[267] , \gpio_defaults[266] , \gpio_defaults[265] , \gpio_defaults[264] , \gpio_defaults[263] , \gpio_defaults[262] , \gpio_defaults[261] , \gpio_defaults[260]  }),
+    .mgmt_gpio_in(\mgmt_io_in[20] ),
+    .mgmt_gpio_oeb(\mprj_io_one[20] ),
+    .mgmt_gpio_out(\mgmt_io_out[20] ),
+    .one(\mprj_io_one[20] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[20] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[20] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[20] ),
+    .pad_gpio_dm({ \mprj_io_dm[62] , \mprj_io_dm[61] , \mprj_io_dm[60]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[20] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[20] ),
+    .pad_gpio_in(\mprj_io_in[20] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[20] ),
+    .pad_gpio_out(\mprj_io_out[20] ),
+    .pad_gpio_outenb(\mprj_io_oeb[20] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[20] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[20] ),
+    .resetn(\gpio_resetn_2[2] ),
+    .resetn_out(\gpio_resetn_2[1] ),
+    .serial_clock(\gpio_clock_2[2] ),
+    .serial_clock_out(\gpio_clock_2[1] ),
+    .serial_data_in(\gpio_serial_link_2[2] ),
+    .serial_data_out(\gpio_serial_link_2[1] ),
+    .serial_load(\gpio_load_2[2] ),
+    .serial_load_out(\gpio_load_2[1] ),
+    .user_gpio_in(\user_io_in[20] ),
+    .user_gpio_oeb(\user_io_oeb[20] ),
+    .user_gpio_out(\user_io_out[20] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[2]  (
+    .gpio_defaults({ \gpio_defaults[285] , \gpio_defaults[284] , \gpio_defaults[283] , \gpio_defaults[282] , \gpio_defaults[281] , \gpio_defaults[280] , \gpio_defaults[279] , \gpio_defaults[278] , \gpio_defaults[277] , \gpio_defaults[276] , \gpio_defaults[275] , \gpio_defaults[274] , \gpio_defaults[273]  }),
+    .mgmt_gpio_in(\mgmt_io_in[21] ),
+    .mgmt_gpio_oeb(\mprj_io_one[21] ),
+    .mgmt_gpio_out(\mgmt_io_out[21] ),
+    .one(\mprj_io_one[21] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[21] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[21] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[21] ),
+    .pad_gpio_dm({ \mprj_io_dm[65] , \mprj_io_dm[64] , \mprj_io_dm[63]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[21] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[21] ),
+    .pad_gpio_in(\mprj_io_in[21] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[21] ),
+    .pad_gpio_out(\mprj_io_out[21] ),
+    .pad_gpio_outenb(\mprj_io_oeb[21] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[21] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[21] ),
+    .resetn(\gpio_resetn_2[3] ),
+    .resetn_out(\gpio_resetn_2[2] ),
+    .serial_clock(\gpio_clock_2[3] ),
+    .serial_clock_out(\gpio_clock_2[2] ),
+    .serial_data_in(\gpio_serial_link_2[3] ),
+    .serial_data_out(\gpio_serial_link_2[2] ),
+    .serial_load(\gpio_load_2[3] ),
+    .serial_load_out(\gpio_load_2[2] ),
+    .user_gpio_in(\user_io_in[21] ),
+    .user_gpio_oeb(\user_io_oeb[21] ),
+    .user_gpio_out(\user_io_out[21] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[3]  (
+    .gpio_defaults({ \gpio_defaults[298] , \gpio_defaults[297] , \gpio_defaults[296] , \gpio_defaults[295] , \gpio_defaults[294] , \gpio_defaults[293] , \gpio_defaults[292] , \gpio_defaults[291] , \gpio_defaults[290] , \gpio_defaults[289] , \gpio_defaults[288] , \gpio_defaults[287] , \gpio_defaults[286]  }),
+    .mgmt_gpio_in(\mgmt_io_in[22] ),
+    .mgmt_gpio_oeb(\mprj_io_one[22] ),
+    .mgmt_gpio_out(\mgmt_io_out[22] ),
+    .one(\mprj_io_one[22] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[22] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[22] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[22] ),
+    .pad_gpio_dm({ \mprj_io_dm[68] , \mprj_io_dm[67] , \mprj_io_dm[66]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[22] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[22] ),
+    .pad_gpio_in(\mprj_io_in[22] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[22] ),
+    .pad_gpio_out(\mprj_io_out[22] ),
+    .pad_gpio_outenb(\mprj_io_oeb[22] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[22] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[22] ),
+    .resetn(\gpio_resetn_2[4] ),
+    .resetn_out(\gpio_resetn_2[3] ),
+    .serial_clock(\gpio_clock_2[4] ),
+    .serial_clock_out(\gpio_clock_2[3] ),
+    .serial_data_in(\gpio_serial_link_2[4] ),
+    .serial_data_out(\gpio_serial_link_2[3] ),
+    .serial_load(\gpio_load_2[4] ),
+    .serial_load_out(\gpio_load_2[3] ),
+    .user_gpio_in(\user_io_in[22] ),
+    .user_gpio_oeb(\user_io_oeb[22] ),
+    .user_gpio_out(\user_io_out[22] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[4]  (
+    .gpio_defaults({ \gpio_defaults[311] , \gpio_defaults[310] , \gpio_defaults[309] , \gpio_defaults[308] , \gpio_defaults[307] , \gpio_defaults[306] , \gpio_defaults[305] , \gpio_defaults[304] , \gpio_defaults[303] , \gpio_defaults[302] , \gpio_defaults[301] , \gpio_defaults[300] , \gpio_defaults[299]  }),
+    .mgmt_gpio_in(\mgmt_io_in[23] ),
+    .mgmt_gpio_oeb(\mprj_io_one[23] ),
+    .mgmt_gpio_out(\mgmt_io_out[23] ),
+    .one(\mprj_io_one[23] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[23] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[23] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[23] ),
+    .pad_gpio_dm({ \mprj_io_dm[71] , \mprj_io_dm[70] , \mprj_io_dm[69]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[23] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[23] ),
+    .pad_gpio_in(\mprj_io_in[23] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[23] ),
+    .pad_gpio_out(\mprj_io_out[23] ),
+    .pad_gpio_outenb(\mprj_io_oeb[23] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[23] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[23] ),
+    .resetn(\gpio_resetn_2[5] ),
+    .resetn_out(\gpio_resetn_2[4] ),
+    .serial_clock(\gpio_clock_2[5] ),
+    .serial_clock_out(\gpio_clock_2[4] ),
+    .serial_data_in(\gpio_serial_link_2[5] ),
+    .serial_data_out(\gpio_serial_link_2[4] ),
+    .serial_load(\gpio_load_2[5] ),
+    .serial_load_out(\gpio_load_2[4] ),
+    .user_gpio_in(\user_io_in[23] ),
+    .user_gpio_oeb(\user_io_oeb[23] ),
+    .user_gpio_out(\user_io_out[23] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[5]  (
+    .gpio_defaults({ \gpio_defaults[324] , \gpio_defaults[323] , \gpio_defaults[322] , \gpio_defaults[321] , \gpio_defaults[320] , \gpio_defaults[319] , \gpio_defaults[318] , \gpio_defaults[317] , \gpio_defaults[316] , \gpio_defaults[315] , \gpio_defaults[314] , \gpio_defaults[313] , \gpio_defaults[312]  }),
+    .mgmt_gpio_in(\mgmt_io_in[24] ),
+    .mgmt_gpio_oeb(\mprj_io_one[24] ),
+    .mgmt_gpio_out(\mgmt_io_out[24] ),
+    .one(\mprj_io_one[24] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[24] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[24] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[24] ),
+    .pad_gpio_dm({ \mprj_io_dm[74] , \mprj_io_dm[73] , \mprj_io_dm[72]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[24] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[24] ),
+    .pad_gpio_in(\mprj_io_in[24] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[24] ),
+    .pad_gpio_out(\mprj_io_out[24] ),
+    .pad_gpio_outenb(\mprj_io_oeb[24] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[24] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[24] ),
+    .resetn(\gpio_resetn_2[6] ),
+    .resetn_out(\gpio_resetn_2[5] ),
+    .serial_clock(\gpio_clock_2[6] ),
+    .serial_clock_out(\gpio_clock_2[5] ),
+    .serial_data_in(\gpio_serial_link_2[6] ),
+    .serial_data_out(\gpio_serial_link_2[5] ),
+    .serial_load(\gpio_load_2[6] ),
+    .serial_load_out(\gpio_load_2[5] ),
+    .user_gpio_in(\user_io_in[24] ),
+    .user_gpio_oeb(\user_io_oeb[24] ),
+    .user_gpio_out(\user_io_out[24] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[6]  (
+    .gpio_defaults({ \gpio_defaults[337] , \gpio_defaults[336] , \gpio_defaults[335] , \gpio_defaults[334] , \gpio_defaults[333] , \gpio_defaults[332] , \gpio_defaults[331] , \gpio_defaults[330] , \gpio_defaults[329] , \gpio_defaults[328] , \gpio_defaults[327] , \gpio_defaults[326] , \gpio_defaults[325]  }),
+    .mgmt_gpio_in(\mgmt_io_in[25] ),
+    .mgmt_gpio_oeb(\mprj_io_one[25] ),
+    .mgmt_gpio_out(\mgmt_io_out[25] ),
+    .one(\mprj_io_one[25] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[25] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[25] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[25] ),
+    .pad_gpio_dm({ \mprj_io_dm[77] , \mprj_io_dm[76] , \mprj_io_dm[75]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[25] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[25] ),
+    .pad_gpio_in(\mprj_io_in[25] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[25] ),
+    .pad_gpio_out(\mprj_io_out[25] ),
+    .pad_gpio_outenb(\mprj_io_oeb[25] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[25] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[25] ),
+    .resetn(\gpio_resetn_2[7] ),
+    .resetn_out(\gpio_resetn_2[6] ),
+    .serial_clock(\gpio_clock_2[7] ),
+    .serial_clock_out(\gpio_clock_2[6] ),
+    .serial_data_in(\gpio_serial_link_2[7] ),
+    .serial_data_out(\gpio_serial_link_2[6] ),
+    .serial_load(\gpio_load_2[7] ),
+    .serial_load_out(\gpio_load_2[6] ),
+    .user_gpio_in(\user_io_in[25] ),
+    .user_gpio_oeb(\user_io_oeb[25] ),
+    .user_gpio_out(\user_io_out[25] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[7]  (
+    .gpio_defaults({ \gpio_defaults[350] , \gpio_defaults[349] , \gpio_defaults[348] , \gpio_defaults[347] , \gpio_defaults[346] , \gpio_defaults[345] , \gpio_defaults[344] , \gpio_defaults[343] , \gpio_defaults[342] , \gpio_defaults[341] , \gpio_defaults[340] , \gpio_defaults[339] , \gpio_defaults[338]  }),
+    .mgmt_gpio_in(\mgmt_io_in[26] ),
+    .mgmt_gpio_oeb(\mprj_io_one[26] ),
+    .mgmt_gpio_out(\mgmt_io_out[26] ),
+    .one(\mprj_io_one[26] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[26] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[26] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[26] ),
+    .pad_gpio_dm({ \mprj_io_dm[80] , \mprj_io_dm[79] , \mprj_io_dm[78]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[26] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[26] ),
+    .pad_gpio_in(\mprj_io_in[26] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[26] ),
+    .pad_gpio_out(\mprj_io_out[26] ),
+    .pad_gpio_outenb(\mprj_io_oeb[26] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[26] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[26] ),
+    .resetn(\gpio_resetn_2[8] ),
+    .resetn_out(\gpio_resetn_2[7] ),
+    .serial_clock(\gpio_clock_2[8] ),
+    .serial_clock_out(\gpio_clock_2[7] ),
+    .serial_data_in(\gpio_serial_link_2[8] ),
+    .serial_data_out(\gpio_serial_link_2[7] ),
+    .serial_load(\gpio_load_2[8] ),
+    .serial_load_out(\gpio_load_2[7] ),
+    .user_gpio_in(\user_io_in[26] ),
+    .user_gpio_oeb(\user_io_oeb[26] ),
+    .user_gpio_out(\user_io_out[26] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[8]  (
+    .gpio_defaults({ \gpio_defaults[363] , \gpio_defaults[362] , \gpio_defaults[361] , \gpio_defaults[360] , \gpio_defaults[359] , \gpio_defaults[358] , \gpio_defaults[357] , \gpio_defaults[356] , \gpio_defaults[355] , \gpio_defaults[354] , \gpio_defaults[353] , \gpio_defaults[352] , \gpio_defaults[351]  }),
+    .mgmt_gpio_in(\mgmt_io_in[27] ),
+    .mgmt_gpio_oeb(\mprj_io_one[27] ),
+    .mgmt_gpio_out(\mgmt_io_out[27] ),
+    .one(\mprj_io_one[27] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[27] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[27] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[27] ),
+    .pad_gpio_dm({ \mprj_io_dm[83] , \mprj_io_dm[82] , \mprj_io_dm[81]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[27] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[27] ),
+    .pad_gpio_in(\mprj_io_in[27] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[27] ),
+    .pad_gpio_out(\mprj_io_out[27] ),
+    .pad_gpio_outenb(\mprj_io_oeb[27] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[27] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[27] ),
+    .resetn(\gpio_resetn_2[9] ),
+    .resetn_out(\gpio_resetn_2[8] ),
+    .serial_clock(\gpio_clock_2[9] ),
+    .serial_clock_out(\gpio_clock_2[8] ),
+    .serial_data_in(\gpio_serial_link_2[9] ),
+    .serial_data_out(\gpio_serial_link_2[8] ),
+    .serial_load(\gpio_load_2[9] ),
+    .serial_load_out(\gpio_load_2[8] ),
+    .user_gpio_in(\user_io_in[27] ),
+    .user_gpio_oeb(\user_io_oeb[27] ),
+    .user_gpio_out(\user_io_out[27] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[9]  (
+    .gpio_defaults({ \gpio_defaults[376] , \gpio_defaults[375] , \gpio_defaults[374] , \gpio_defaults[373] , \gpio_defaults[372] , \gpio_defaults[371] , \gpio_defaults[370] , \gpio_defaults[369] , \gpio_defaults[368] , \gpio_defaults[367] , \gpio_defaults[366] , \gpio_defaults[365] , \gpio_defaults[364]  }),
+    .mgmt_gpio_in(\mgmt_io_in[28] ),
+    .mgmt_gpio_oeb(\mprj_io_one[28] ),
+    .mgmt_gpio_out(\mgmt_io_out[28] ),
+    .one(\mprj_io_one[28] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[28] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[28] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[28] ),
+    .pad_gpio_dm({ \mprj_io_dm[86] , \mprj_io_dm[85] , \mprj_io_dm[84]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[28] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[28] ),
+    .pad_gpio_in(\mprj_io_in[28] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[28] ),
+    .pad_gpio_out(\mprj_io_out[28] ),
+    .pad_gpio_outenb(\mprj_io_oeb[28] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[28] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[28] ),
+    .resetn(\gpio_resetn_2[10] ),
+    .resetn_out(\gpio_resetn_2[9] ),
+    .serial_clock(\gpio_clock_2[10] ),
+    .serial_clock_out(\gpio_clock_2[9] ),
+    .serial_data_in(\gpio_serial_link_2[10] ),
+    .serial_data_out(\gpio_serial_link_2[9] ),
+    .serial_load(\gpio_load_2[10] ),
+    .serial_load_out(\gpio_load_2[9] ),
+    .user_gpio_in(\user_io_in[28] ),
+    .user_gpio_oeb(\user_io_oeb[28] ),
+    .user_gpio_out(\user_io_out[28] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_defaults_block_1803 gpio_defaults_block_0 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[12] , \gpio_defaults[11] , \gpio_defaults[10] , \gpio_defaults[9] , \gpio_defaults[8] , \gpio_defaults[7] , \gpio_defaults[6] , \gpio_defaults[5] , \gpio_defaults[4] , \gpio_defaults[3] , \gpio_defaults[2] , \gpio_defaults[1] , \gpio_defaults[0]  })
+  );
+  gpio_defaults_block_1803 gpio_defaults_block_1 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[25] , \gpio_defaults[24] , \gpio_defaults[23] , \gpio_defaults[22] , \gpio_defaults[21] , \gpio_defaults[20] , \gpio_defaults[19] , \gpio_defaults[18] , \gpio_defaults[17] , \gpio_defaults[16] , \gpio_defaults[15] , \gpio_defaults[14] , \gpio_defaults[13]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_10 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[142] , \gpio_defaults[141] , \gpio_defaults[140] , \gpio_defaults[139] , \gpio_defaults[138] , \gpio_defaults[137] , \gpio_defaults[136] , \gpio_defaults[135] , \gpio_defaults[134] , \gpio_defaults[133] , \gpio_defaults[132] , \gpio_defaults[131] , \gpio_defaults[130]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_11 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[155] , \gpio_defaults[154] , \gpio_defaults[153] , \gpio_defaults[152] , \gpio_defaults[151] , \gpio_defaults[150] , \gpio_defaults[149] , \gpio_defaults[148] , \gpio_defaults[147] , \gpio_defaults[146] , \gpio_defaults[145] , \gpio_defaults[144] , \gpio_defaults[143]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_12 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[168] , \gpio_defaults[167] , \gpio_defaults[166] , \gpio_defaults[165] , \gpio_defaults[164] , \gpio_defaults[163] , \gpio_defaults[162] , \gpio_defaults[161] , \gpio_defaults[160] , \gpio_defaults[159] , \gpio_defaults[158] , \gpio_defaults[157] , \gpio_defaults[156]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_13 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[181] , \gpio_defaults[180] , \gpio_defaults[179] , \gpio_defaults[178] , \gpio_defaults[177] , \gpio_defaults[176] , \gpio_defaults[175] , \gpio_defaults[174] , \gpio_defaults[173] , \gpio_defaults[172] , \gpio_defaults[171] , \gpio_defaults[170] , \gpio_defaults[169]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_14 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[194] , \gpio_defaults[193] , \gpio_defaults[192] , \gpio_defaults[191] , \gpio_defaults[190] , \gpio_defaults[189] , \gpio_defaults[188] , \gpio_defaults[187] , \gpio_defaults[186] , \gpio_defaults[185] , \gpio_defaults[184] , \gpio_defaults[183] , \gpio_defaults[182]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_15 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[207] , \gpio_defaults[206] , \gpio_defaults[205] , \gpio_defaults[204] , \gpio_defaults[203] , \gpio_defaults[202] , \gpio_defaults[201] , \gpio_defaults[200] , \gpio_defaults[199] , \gpio_defaults[198] , \gpio_defaults[197] , \gpio_defaults[196] , \gpio_defaults[195]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_16 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[220] , \gpio_defaults[219] , \gpio_defaults[218] , \gpio_defaults[217] , \gpio_defaults[216] , \gpio_defaults[215] , \gpio_defaults[214] , \gpio_defaults[213] , \gpio_defaults[212] , \gpio_defaults[211] , \gpio_defaults[210] , \gpio_defaults[209] , \gpio_defaults[208]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_17 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[233] , \gpio_defaults[232] , \gpio_defaults[231] , \gpio_defaults[230] , \gpio_defaults[229] , \gpio_defaults[228] , \gpio_defaults[227] , \gpio_defaults[226] , \gpio_defaults[225] , \gpio_defaults[224] , \gpio_defaults[223] , \gpio_defaults[222] , \gpio_defaults[221]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_18 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[246] , \gpio_defaults[245] , \gpio_defaults[244] , \gpio_defaults[243] , \gpio_defaults[242] , \gpio_defaults[241] , \gpio_defaults[240] , \gpio_defaults[239] , \gpio_defaults[238] , \gpio_defaults[237] , \gpio_defaults[236] , \gpio_defaults[235] , \gpio_defaults[234]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_19 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[259] , \gpio_defaults[258] , \gpio_defaults[257] , \gpio_defaults[256] , \gpio_defaults[255] , \gpio_defaults[254] , \gpio_defaults[253] , \gpio_defaults[252] , \gpio_defaults[251] , \gpio_defaults[250] , \gpio_defaults[249] , \gpio_defaults[248] , \gpio_defaults[247]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_2 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[38] , \gpio_defaults[37] , \gpio_defaults[36] , \gpio_defaults[35] , \gpio_defaults[34] , \gpio_defaults[33] , \gpio_defaults[32] , \gpio_defaults[31] , \gpio_defaults[30] , \gpio_defaults[29] , \gpio_defaults[28] , \gpio_defaults[27] , \gpio_defaults[26]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_20 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[272] , \gpio_defaults[271] , \gpio_defaults[270] , \gpio_defaults[269] , \gpio_defaults[268] , \gpio_defaults[267] , \gpio_defaults[266] , \gpio_defaults[265] , \gpio_defaults[264] , \gpio_defaults[263] , \gpio_defaults[262] , \gpio_defaults[261] , \gpio_defaults[260]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_21 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[285] , \gpio_defaults[284] , \gpio_defaults[283] , \gpio_defaults[282] , \gpio_defaults[281] , \gpio_defaults[280] , \gpio_defaults[279] , \gpio_defaults[278] , \gpio_defaults[277] , \gpio_defaults[276] , \gpio_defaults[275] , \gpio_defaults[274] , \gpio_defaults[273]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_22 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[298] , \gpio_defaults[297] , \gpio_defaults[296] , \gpio_defaults[295] , \gpio_defaults[294] , \gpio_defaults[293] , \gpio_defaults[292] , \gpio_defaults[291] , \gpio_defaults[290] , \gpio_defaults[289] , \gpio_defaults[288] , \gpio_defaults[287] , \gpio_defaults[286]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_23 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[311] , \gpio_defaults[310] , \gpio_defaults[309] , \gpio_defaults[308] , \gpio_defaults[307] , \gpio_defaults[306] , \gpio_defaults[305] , \gpio_defaults[304] , \gpio_defaults[303] , \gpio_defaults[302] , \gpio_defaults[301] , \gpio_defaults[300] , \gpio_defaults[299]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_24 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[324] , \gpio_defaults[323] , \gpio_defaults[322] , \gpio_defaults[321] , \gpio_defaults[320] , \gpio_defaults[319] , \gpio_defaults[318] , \gpio_defaults[317] , \gpio_defaults[316] , \gpio_defaults[315] , \gpio_defaults[314] , \gpio_defaults[313] , \gpio_defaults[312]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_25 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[337] , \gpio_defaults[336] , \gpio_defaults[335] , \gpio_defaults[334] , \gpio_defaults[333] , \gpio_defaults[332] , \gpio_defaults[331] , \gpio_defaults[330] , \gpio_defaults[329] , \gpio_defaults[328] , \gpio_defaults[327] , \gpio_defaults[326] , \gpio_defaults[325]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_26 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[350] , \gpio_defaults[349] , \gpio_defaults[348] , \gpio_defaults[347] , \gpio_defaults[346] , \gpio_defaults[345] , \gpio_defaults[344] , \gpio_defaults[343] , \gpio_defaults[342] , \gpio_defaults[341] , \gpio_defaults[340] , \gpio_defaults[339] , \gpio_defaults[338]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_27 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[363] , \gpio_defaults[362] , \gpio_defaults[361] , \gpio_defaults[360] , \gpio_defaults[359] , \gpio_defaults[358] , \gpio_defaults[357] , \gpio_defaults[356] , \gpio_defaults[355] , \gpio_defaults[354] , \gpio_defaults[353] , \gpio_defaults[352] , \gpio_defaults[351]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_28 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[376] , \gpio_defaults[375] , \gpio_defaults[374] , \gpio_defaults[373] , \gpio_defaults[372] , \gpio_defaults[371] , \gpio_defaults[370] , \gpio_defaults[369] , \gpio_defaults[368] , \gpio_defaults[367] , \gpio_defaults[366] , \gpio_defaults[365] , \gpio_defaults[364]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_29 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[389] , \gpio_defaults[388] , \gpio_defaults[387] , \gpio_defaults[386] , \gpio_defaults[385] , \gpio_defaults[384] , \gpio_defaults[383] , \gpio_defaults[382] , \gpio_defaults[381] , \gpio_defaults[380] , \gpio_defaults[379] , \gpio_defaults[378] , \gpio_defaults[377]  })
+  );
+  gpio_defaults_block_0801 gpio_defaults_block_3 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[51] , \gpio_defaults[50] , \gpio_defaults[49] , \gpio_defaults[48] , \gpio_defaults[47] , \gpio_defaults[46] , \gpio_defaults[45] , \gpio_defaults[44] , \gpio_defaults[43] , \gpio_defaults[42] , \gpio_defaults[41] , \gpio_defaults[40] , \gpio_defaults[39]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_30 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[402] , \gpio_defaults[401] , \gpio_defaults[400] , \gpio_defaults[399] , \gpio_defaults[398] , \gpio_defaults[397] , \gpio_defaults[396] , \gpio_defaults[395] , \gpio_defaults[394] , \gpio_defaults[393] , \gpio_defaults[392] , \gpio_defaults[391] , \gpio_defaults[390]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_31 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[415] , \gpio_defaults[414] , \gpio_defaults[413] , \gpio_defaults[412] , \gpio_defaults[411] , \gpio_defaults[410] , \gpio_defaults[409] , \gpio_defaults[408] , \gpio_defaults[407] , \gpio_defaults[406] , \gpio_defaults[405] , \gpio_defaults[404] , \gpio_defaults[403]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_32 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[428] , \gpio_defaults[427] , \gpio_defaults[426] , \gpio_defaults[425] , \gpio_defaults[424] , \gpio_defaults[423] , \gpio_defaults[422] , \gpio_defaults[421] , \gpio_defaults[420] , \gpio_defaults[419] , \gpio_defaults[418] , \gpio_defaults[417] , \gpio_defaults[416]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_33 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[441] , \gpio_defaults[440] , \gpio_defaults[439] , \gpio_defaults[438] , \gpio_defaults[437] , \gpio_defaults[436] , \gpio_defaults[435] , \gpio_defaults[434] , \gpio_defaults[433] , \gpio_defaults[432] , \gpio_defaults[431] , \gpio_defaults[430] , \gpio_defaults[429]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_34 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[454] , \gpio_defaults[453] , \gpio_defaults[452] , \gpio_defaults[451] , \gpio_defaults[450] , \gpio_defaults[449] , \gpio_defaults[448] , \gpio_defaults[447] , \gpio_defaults[446] , \gpio_defaults[445] , \gpio_defaults[444] , \gpio_defaults[443] , \gpio_defaults[442]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_35 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[467] , \gpio_defaults[466] , \gpio_defaults[465] , \gpio_defaults[464] , \gpio_defaults[463] , \gpio_defaults[462] , \gpio_defaults[461] , \gpio_defaults[460] , \gpio_defaults[459] , \gpio_defaults[458] , \gpio_defaults[457] , \gpio_defaults[456] , \gpio_defaults[455]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_36 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[480] , \gpio_defaults[479] , \gpio_defaults[478] , \gpio_defaults[477] , \gpio_defaults[476] , \gpio_defaults[475] , \gpio_defaults[474] , \gpio_defaults[473] , \gpio_defaults[472] , \gpio_defaults[471] , \gpio_defaults[470] , \gpio_defaults[469] , \gpio_defaults[468]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_37 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[493] , \gpio_defaults[492] , \gpio_defaults[491] , \gpio_defaults[490] , \gpio_defaults[489] , \gpio_defaults[488] , \gpio_defaults[487] , \gpio_defaults[486] , \gpio_defaults[485] , \gpio_defaults[484] , \gpio_defaults[483] , \gpio_defaults[482] , \gpio_defaults[481]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_4 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[64] , \gpio_defaults[63] , \gpio_defaults[62] , \gpio_defaults[61] , \gpio_defaults[60] , \gpio_defaults[59] , \gpio_defaults[58] , \gpio_defaults[57] , \gpio_defaults[56] , \gpio_defaults[55] , \gpio_defaults[54] , \gpio_defaults[53] , \gpio_defaults[52]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_5 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[77] , \gpio_defaults[76] , \gpio_defaults[75] , \gpio_defaults[74] , \gpio_defaults[73] , \gpio_defaults[72] , \gpio_defaults[71] , \gpio_defaults[70] , \gpio_defaults[69] , \gpio_defaults[68] , \gpio_defaults[67] , \gpio_defaults[66] , \gpio_defaults[65]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_6 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[90] , \gpio_defaults[89] , \gpio_defaults[88] , \gpio_defaults[87] , \gpio_defaults[86] , \gpio_defaults[85] , \gpio_defaults[84] , \gpio_defaults[83] , \gpio_defaults[82] , \gpio_defaults[81] , \gpio_defaults[80] , \gpio_defaults[79] , \gpio_defaults[78]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_7 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[103] , \gpio_defaults[102] , \gpio_defaults[101] , \gpio_defaults[100] , \gpio_defaults[99] , \gpio_defaults[98] , \gpio_defaults[97] , \gpio_defaults[96] , \gpio_defaults[95] , \gpio_defaults[94] , \gpio_defaults[93] , \gpio_defaults[92] , \gpio_defaults[91]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_8 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[116] , \gpio_defaults[115] , \gpio_defaults[114] , \gpio_defaults[113] , \gpio_defaults[112] , \gpio_defaults[111] , \gpio_defaults[110] , \gpio_defaults[109] , \gpio_defaults[108] , \gpio_defaults[107] , \gpio_defaults[106] , \gpio_defaults[105] , \gpio_defaults[104]  })
+  );
+  gpio_defaults_block_1801 gpio_defaults_block_9 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[129] , \gpio_defaults[128] , \gpio_defaults[127] , \gpio_defaults[126] , \gpio_defaults[125] , \gpio_defaults[124] , \gpio_defaults[123] , \gpio_defaults[122] , \gpio_defaults[121] , \gpio_defaults[120] , \gpio_defaults[119] , \gpio_defaults[118] , \gpio_defaults[117]  })
+  );
+  housekeeping housekeeping (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .debug_in(debug_in),
+    .debug_mode(debug_mode),
+    .debug_oeb(debug_oeb),
+    .debug_out(debug_out),
+    .irq({ \irq_spi[2] , \irq_spi[1] , \irq_spi[0]  }),
+    .mask_rev_in({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0]  }),
+    .mgmt_gpio_in({ \mgmt_io_in_hk[37] , \mgmt_io_in_hk[36] , \mgmt_io_in_hk[35] , \mgmt_io_in_hk[34] , \mgmt_io_in_hk[33] , \mgmt_io_in_hk[32] , \mgmt_io_in_hk[31] , \mgmt_io_in_hk[30] , \mgmt_io_in_hk[29] , \mgmt_io_in_hk[28] , \mgmt_io_in_hk[27] , \mgmt_io_in_hk[26] , \mgmt_io_in_hk[25] , \mgmt_io_in_hk[24] , \mgmt_io_in_hk[23] , \mgmt_io_in_hk[22] , \mgmt_io_in_hk[21] , \mgmt_io_in_hk[20] , \mgmt_io_in_hk[19] , \mgmt_io_in_hk[18] , \mgmt_io_in_hk[17] , \mgmt_io_in_hk[16] , \mgmt_io_in_hk[15] , \mgmt_io_in_hk[14] , \mgmt_io_in_hk[13] , \mgmt_io_in_hk[12] , \mgmt_io_in_hk[11] , \mgmt_io_in_hk[10] , \mgmt_io_in_hk[9] , \mgmt_io_in_hk[8] , \mgmt_io_in_hk[7] , \mgmt_io_in[6] , \mgmt_io_in[5] , \mgmt_io_in[4] , \mgmt_io_in[3] , \mgmt_io_in[2] , \mgmt_io_in[1] , \mgmt_io_in[0]  }),
+    .mgmt_gpio_oeb({ \mgmt_io_oeb_hk[37] , \mgmt_io_oeb_hk[36] , \mgmt_io_oeb_hk[35] , \mgmt_io_oeb[34] , \mgmt_io_oeb[33] , \mgmt_io_oeb[32] , \mgmt_io_oeb[31] , \mgmt_io_oeb[30] , \mgmt_io_oeb[29] , \mgmt_io_oeb[28] , \mgmt_io_oeb[27] , \mgmt_io_oeb[26] , \mgmt_io_oeb[25] , \mgmt_io_oeb[24] , \mgmt_io_oeb[23] , \mgmt_io_oeb[22] , \mgmt_io_oeb[21] , \mgmt_io_oeb[20] , \mgmt_io_oeb[19] , \mgmt_io_oeb[18] , \mgmt_io_oeb[17] , \mgmt_io_oeb[16] , \mgmt_io_oeb[15] , \mgmt_io_oeb[14] , \mgmt_io_oeb[13] , \mgmt_io_oeb[12] , \mgmt_io_oeb[11] , \mgmt_io_oeb[10] , \mgmt_io_oeb[9] , \mgmt_io_oeb[8] , \mgmt_io_oeb[7] , \mgmt_io_oeb[6] , \mgmt_io_oeb[5] , \mgmt_io_oeb[4] , \mgmt_io_oeb[3] , \mgmt_io_oeb[2] , \mgmt_io_oeb[1] , \mgmt_io_oeb[0]  }),
+    .mgmt_gpio_out({ \mgmt_io_out_hk[37] , \mgmt_io_out_hk[36] , \mgmt_io_out_hk[35] , \mgmt_io_out_hk[34] , \mgmt_io_out_hk[33] , \mgmt_io_out_hk[32] , \mgmt_io_out_hk[31] , \mgmt_io_out_hk[30] , \mgmt_io_out_hk[29] , \mgmt_io_out_hk[28] , \mgmt_io_out_hk[27] , \mgmt_io_out_hk[26] , \mgmt_io_out_hk[25] , \mgmt_io_out_hk[24] , \mgmt_io_out_hk[23] , \mgmt_io_out_hk[22] , \mgmt_io_out_hk[21] , \mgmt_io_out_hk[20] , \mgmt_io_out_hk[19] , \mgmt_io_out_hk[18] , \mgmt_io_out_hk[17] , \mgmt_io_out_hk[16] , \mgmt_io_out_hk[15] , \mgmt_io_out_hk[14] , \mgmt_io_out_hk[13] , \mgmt_io_out_hk[12] , \mgmt_io_out_hk[11] , \mgmt_io_out_hk[10] , \mgmt_io_out_hk[9] , \mgmt_io_out_hk[8] , \mgmt_io_out_hk[7] , \mgmt_io_out[6] , \mgmt_io_out[5] , \mgmt_io_out[4] , \mgmt_io_out[3] , \mgmt_io_out[2] , \mgmt_io_out[1] , \mgmt_io_out[0]  }),
+    .pad_flash_clk(flash_clk_frame),
+    .pad_flash_clk_oeb(flash_clk_oeb),
+    .pad_flash_csb(flash_csb_frame),
+    .pad_flash_csb_oeb(flash_csb_oeb),
+    .pad_flash_io0_di(flash_io0_di_buf),
+    .pad_flash_io0_do(flash_io0_do),
+    .pad_flash_io0_ieb(flash_io0_ieb),
+    .pad_flash_io0_oeb(flash_io0_oeb),
+    .pad_flash_io1_di(flash_io1_di_buf),
+    .pad_flash_io1_do(flash_io1_do),
+    .pad_flash_io1_ieb(flash_io1_ieb),
+    .pad_flash_io1_oeb(flash_io1_oeb),
+    .pll90_sel({ \spi_pll90_sel[2] , \spi_pll90_sel[1] , \spi_pll90_sel[0]  }),
+    .pll_bypass(ext_clk_sel),
+    .pll_dco_ena(spi_pll_dco_ena),
+    .pll_div({ \spi_pll_div[4] , \spi_pll_div[3] , \spi_pll_div[2] , \spi_pll_div[1] , \spi_pll_div[0]  }),
+    .pll_ena(spi_pll_ena),
+    .pll_sel({ \spi_pll_sel[2] , \spi_pll_sel[1] , \spi_pll_sel[0]  }),
+    .pll_trim({ \spi_pll_trim[25] , \spi_pll_trim[24] , \spi_pll_trim[23] , \spi_pll_trim[22] , \spi_pll_trim[21] , \spi_pll_trim[20] , \spi_pll_trim[19] , \spi_pll_trim[18] , \spi_pll_trim[17] , \spi_pll_trim[16] , \spi_pll_trim[15] , \spi_pll_trim[14] , \spi_pll_trim[13] , \spi_pll_trim[12] , \spi_pll_trim[11] , \spi_pll_trim[10] , \spi_pll_trim[9] , \spi_pll_trim[8] , \spi_pll_trim[7] , \spi_pll_trim[6] , \spi_pll_trim[5] , \spi_pll_trim[4] , \spi_pll_trim[3] , \spi_pll_trim[2] , \spi_pll_trim[1] , \spi_pll_trim[0]  }),
+    .porb(porb_l),
+    .pwr_ctrl_out({ \pwr_ctrl_nc[3] , \pwr_ctrl_nc[2] , \pwr_ctrl_nc[1] , \pwr_ctrl_nc[0]  }),
+    .qspi_enabled(qspi_enabled),
+    .reset(ext_reset),
+    .ser_rx(ser_rx),
+    .ser_tx(ser_tx),
+    .serial_clock(\gpio_clock_1_shifted[0] ),
+    .serial_data_1(\gpio_serial_link_1_shifted[0] ),
+    .serial_data_2(mprj_io_loader_data_2),
+    .serial_load(\gpio_load_1_shifted[0] ),
+    .serial_resetn(\gpio_resetn_1_shifted[0] ),
+    .spi_csb(spi_csb),
+    .spi_enabled(spi_enabled),
+    .spi_sck(spi_sck),
+    .spi_sdi(spi_sdi),
+    .spi_sdo(spi_sdo),
+    .spi_sdoenb(spi_sdoenb),
+    .spimemio_flash_clk(flash_clk_core),
+    .spimemio_flash_csb(flash_csb_core),
+    .spimemio_flash_io0_di(flash_io0_di_core),
+    .spimemio_flash_io0_do(flash_io0_do_core),
+    .spimemio_flash_io0_oeb(flash_io0_oeb_core),
+    .spimemio_flash_io1_di(flash_io1_di_core),
+    .spimemio_flash_io1_do(flash_io1_do_core),
+    .spimemio_flash_io1_oeb(flash_io1_oeb_core),
+    .spimemio_flash_io2_di(flash_io2_di_core),
+    .spimemio_flash_io2_do(flash_io2_do_core),
+    .spimemio_flash_io2_oeb(flash_io2_oeb_core),
+    .spimemio_flash_io3_di(flash_io3_di_core),
+    .spimemio_flash_io3_do(flash_io3_do_core),
+    .spimemio_flash_io3_oeb(flash_io3_oeb_core),
+    .trap(trap),
+    .uart_enabled(uart_enabled),
+    .user_clock(caravel_clk2),
+    .usr1_vcc_pwrgood(mprj_vcc_pwrgood),
+    .usr1_vdd_pwrgood(mprj_vdd_pwrgood),
+    .usr2_vcc_pwrgood(mprj2_vcc_pwrgood),
+    .usr2_vdd_pwrgood(mprj2_vdd_pwrgood),
+    .wb_ack_o(hk_ack_i),
+    .wb_adr_i({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .wb_clk_i(caravel_clk),
+    .wb_cyc_i(hk_cyc_o),
+    .wb_dat_i({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .wb_dat_o({ \hk_dat_i[31] , \hk_dat_i[30] , \hk_dat_i[29] , \hk_dat_i[28] , \hk_dat_i[27] , \hk_dat_i[26] , \hk_dat_i[25] , \hk_dat_i[24] , \hk_dat_i[23] , \hk_dat_i[22] , \hk_dat_i[21] , \hk_dat_i[20] , \hk_dat_i[19] , \hk_dat_i[18] , \hk_dat_i[17] , \hk_dat_i[16] , \hk_dat_i[15] , \hk_dat_i[14] , \hk_dat_i[13] , \hk_dat_i[12] , \hk_dat_i[11] , \hk_dat_i[10] , \hk_dat_i[9] , \hk_dat_i[8] , \hk_dat_i[7] , \hk_dat_i[6] , \hk_dat_i[5] , \hk_dat_i[4] , \hk_dat_i[3] , \hk_dat_i[2] , \hk_dat_i[1] , \hk_dat_i[0]  }),
+    .wb_rstn_i(caravel_rstn),
+    .wb_sel_i({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .wb_stb_i(hk_stb_o),
+    .wb_we_i(mprj_we_o_core)
+  );
+  mgmt_protect mgmt_buffers (
+    .caravel_clk(clk_passthru),
+    .caravel_clk2(caravel_clk2),
+    .caravel_rstn(resetn_passthru),
+    .la_data_in_core({ \la_data_in_user[127] , \la_data_in_user[126] , \la_data_in_user[125] , \la_data_in_user[124] , \la_data_in_user[123] , \la_data_in_user[122] , \la_data_in_user[121] , \la_data_in_user[120] , \la_data_in_user[119] , \la_data_in_user[118] , \la_data_in_user[117] , \la_data_in_user[116] , \la_data_in_user[115] , \la_data_in_user[114] , \la_data_in_user[113] , \la_data_in_user[112] , \la_data_in_user[111] , \la_data_in_user[110] , \la_data_in_user[109] , \la_data_in_user[108] , \la_data_in_user[107] , \la_data_in_user[106] , \la_data_in_user[105] , \la_data_in_user[104] , \la_data_in_user[103] , \la_data_in_user[102] , \la_data_in_user[101] , \la_data_in_user[100] , \la_data_in_user[99] , \la_data_in_user[98] , \la_data_in_user[97] , \la_data_in_user[96] , \la_data_in_user[95] , \la_data_in_user[94] , \la_data_in_user[93] , \la_data_in_user[92] , \la_data_in_user[91] , \la_data_in_user[90] , \la_data_in_user[89] , \la_data_in_user[88] , \la_data_in_user[87] , \la_data_in_user[86] , \la_data_in_user[85] , \la_data_in_user[84] , \la_data_in_user[83] , \la_data_in_user[82] , \la_data_in_user[81] , \la_data_in_user[80] , \la_data_in_user[79] , \la_data_in_user[78] , \la_data_in_user[77] , \la_data_in_user[76] , \la_data_in_user[75] , \la_data_in_user[74] , \la_data_in_user[73] , \la_data_in_user[72] , \la_data_in_user[71] , \la_data_in_user[70] , \la_data_in_user[69] , \la_data_in_user[68] , \la_data_in_user[67] , \la_data_in_user[66] , \la_data_in_user[65] , \la_data_in_user[64] , \la_data_in_user[63] , \la_data_in_user[62] , \la_data_in_user[61] , \la_data_in_user[60] , \la_data_in_user[59] , \la_data_in_user[58] , \la_data_in_user[57] , \la_data_in_user[56] , \la_data_in_user[55] , \la_data_in_user[54] , \la_data_in_user[53] , \la_data_in_user[52] , \la_data_in_user[51] , \la_data_in_user[50] , \la_data_in_user[49] , \la_data_in_user[48] , \la_data_in_user[47] , \la_data_in_user[46] , \la_data_in_user[45] , \la_data_in_user[44] , \la_data_in_user[43] , \la_data_in_user[42] , \la_data_in_user[41] , \la_data_in_user[40] , \la_data_in_user[39] , \la_data_in_user[38] , \la_data_in_user[37] , \la_data_in_user[36] , \la_data_in_user[35] , \la_data_in_user[34] , \la_data_in_user[33] , \la_data_in_user[32] , \la_data_in_user[31] , \la_data_in_user[30] , \la_data_in_user[29] , \la_data_in_user[28] , \la_data_in_user[27] , \la_data_in_user[26] , \la_data_in_user[25] , \la_data_in_user[24] , \la_data_in_user[23] , \la_data_in_user[22] , \la_data_in_user[21] , \la_data_in_user[20] , \la_data_in_user[19] , \la_data_in_user[18] , \la_data_in_user[17] , \la_data_in_user[16] , \la_data_in_user[15] , \la_data_in_user[14] , \la_data_in_user[13] , \la_data_in_user[12] , \la_data_in_user[11] , \la_data_in_user[10] , \la_data_in_user[9] , \la_data_in_user[8] , \la_data_in_user[7] , \la_data_in_user[6] , \la_data_in_user[5] , \la_data_in_user[4] , \la_data_in_user[3] , \la_data_in_user[2] , \la_data_in_user[1] , \la_data_in_user[0]  }),
+    .la_data_in_mprj({ \la_data_in_mprj[127] , \la_data_in_mprj[126] , \la_data_in_mprj[125] , \la_data_in_mprj[124] , \la_data_in_mprj[123] , \la_data_in_mprj[122] , \la_data_in_mprj[121] , \la_data_in_mprj[120] , \la_data_in_mprj[119] , \la_data_in_mprj[118] , \la_data_in_mprj[117] , \la_data_in_mprj[116] , \la_data_in_mprj[115] , \la_data_in_mprj[114] , \la_data_in_mprj[113] , \la_data_in_mprj[112] , \la_data_in_mprj[111] , \la_data_in_mprj[110] , \la_data_in_mprj[109] , \la_data_in_mprj[108] , \la_data_in_mprj[107] , \la_data_in_mprj[106] , \la_data_in_mprj[105] , \la_data_in_mprj[104] , \la_data_in_mprj[103] , \la_data_in_mprj[102] , \la_data_in_mprj[101] , \la_data_in_mprj[100] , \la_data_in_mprj[99] , \la_data_in_mprj[98] , \la_data_in_mprj[97] , \la_data_in_mprj[96] , \la_data_in_mprj[95] , \la_data_in_mprj[94] , \la_data_in_mprj[93] , \la_data_in_mprj[92] , \la_data_in_mprj[91] , \la_data_in_mprj[90] , \la_data_in_mprj[89] , \la_data_in_mprj[88] , \la_data_in_mprj[87] , \la_data_in_mprj[86] , \la_data_in_mprj[85] , \la_data_in_mprj[84] , \la_data_in_mprj[83] , \la_data_in_mprj[82] , \la_data_in_mprj[81] , \la_data_in_mprj[80] , \la_data_in_mprj[79] , \la_data_in_mprj[78] , \la_data_in_mprj[77] , \la_data_in_mprj[76] , \la_data_in_mprj[75] , \la_data_in_mprj[74] , \la_data_in_mprj[73] , \la_data_in_mprj[72] , \la_data_in_mprj[71] , \la_data_in_mprj[70] , \la_data_in_mprj[69] , \la_data_in_mprj[68] , \la_data_in_mprj[67] , \la_data_in_mprj[66] , \la_data_in_mprj[65] , \la_data_in_mprj[64] , \la_data_in_mprj[63] , \la_data_in_mprj[62] , \la_data_in_mprj[61] , \la_data_in_mprj[60] , \la_data_in_mprj[59] , \la_data_in_mprj[58] , \la_data_in_mprj[57] , \la_data_in_mprj[56] , \la_data_in_mprj[55] , \la_data_in_mprj[54] , \la_data_in_mprj[53] , \la_data_in_mprj[52] , \la_data_in_mprj[51] , \la_data_in_mprj[50] , \la_data_in_mprj[49] , \la_data_in_mprj[48] , \la_data_in_mprj[47] , \la_data_in_mprj[46] , \la_data_in_mprj[45] , \la_data_in_mprj[44] , \la_data_in_mprj[43] , \la_data_in_mprj[42] , \la_data_in_mprj[41] , \la_data_in_mprj[40] , \la_data_in_mprj[39] , \la_data_in_mprj[38] , \la_data_in_mprj[37] , \la_data_in_mprj[36] , \la_data_in_mprj[35] , \la_data_in_mprj[34] , \la_data_in_mprj[33] , \la_data_in_mprj[32] , \la_data_in_mprj[31] , \la_data_in_mprj[30] , \la_data_in_mprj[29] , \la_data_in_mprj[28] , \la_data_in_mprj[27] , \la_data_in_mprj[26] , \la_data_in_mprj[25] , \la_data_in_mprj[24] , \la_data_in_mprj[23] , \la_data_in_mprj[22] , \la_data_in_mprj[21] , \la_data_in_mprj[20] , \la_data_in_mprj[19] , \la_data_in_mprj[18] , \la_data_in_mprj[17] , \la_data_in_mprj[16] , \la_data_in_mprj[15] , \la_data_in_mprj[14] , \la_data_in_mprj[13] , \la_data_in_mprj[12] , \la_data_in_mprj[11] , \la_data_in_mprj[10] , \la_data_in_mprj[9] , \la_data_in_mprj[8] , \la_data_in_mprj[7] , \la_data_in_mprj[6] , \la_data_in_mprj[5] , \la_data_in_mprj[4] , \la_data_in_mprj[3] , \la_data_in_mprj[2] , \la_data_in_mprj[1] , \la_data_in_mprj[0]  }),
+    .la_data_out_core({ \la_data_out_user[127] , \la_data_out_user[126] , \la_data_out_user[125] , \la_data_out_user[124] , \la_data_out_user[123] , \la_data_out_user[122] , \la_data_out_user[121] , \la_data_out_user[120] , \la_data_out_user[119] , \la_data_out_user[118] , \la_data_out_user[117] , \la_data_out_user[116] , \la_data_out_user[115] , \la_data_out_user[114] , \la_data_out_user[113] , \la_data_out_user[112] , \la_data_out_user[111] , \la_data_out_user[110] , \la_data_out_user[109] , \la_data_out_user[108] , \la_data_out_user[107] , \la_data_out_user[106] , \la_data_out_user[105] , \la_data_out_user[104] , \la_data_out_user[103] , \la_data_out_user[102] , \la_data_out_user[101] , \la_data_out_user[100] , \la_data_out_user[99] , \la_data_out_user[98] , \la_data_out_user[97] , \la_data_out_user[96] , \la_data_out_user[95] , \la_data_out_user[94] , \la_data_out_user[93] , \la_data_out_user[92] , \la_data_out_user[91] , \la_data_out_user[90] , \la_data_out_user[89] , \la_data_out_user[88] , \la_data_out_user[87] , \la_data_out_user[86] , \la_data_out_user[85] , \la_data_out_user[84] , \la_data_out_user[83] , \la_data_out_user[82] , \la_data_out_user[81] , \la_data_out_user[80] , \la_data_out_user[79] , \la_data_out_user[78] , \la_data_out_user[77] , \la_data_out_user[76] , \la_data_out_user[75] , \la_data_out_user[74] , \la_data_out_user[73] , \la_data_out_user[72] , \la_data_out_user[71] , \la_data_out_user[70] , \la_data_out_user[69] , \la_data_out_user[68] , \la_data_out_user[67] , \la_data_out_user[66] , \la_data_out_user[65] , \la_data_out_user[64] , \la_data_out_user[63] , \la_data_out_user[62] , \la_data_out_user[61] , \la_data_out_user[60] , \la_data_out_user[59] , \la_data_out_user[58] , \la_data_out_user[57] , \la_data_out_user[56] , \la_data_out_user[55] , \la_data_out_user[54] , \la_data_out_user[53] , \la_data_out_user[52] , \la_data_out_user[51] , \la_data_out_user[50] , \la_data_out_user[49] , \la_data_out_user[48] , \la_data_out_user[47] , \la_data_out_user[46] , \la_data_out_user[45] , \la_data_out_user[44] , \la_data_out_user[43] , \la_data_out_user[42] , \la_data_out_user[41] , \la_data_out_user[40] , \la_data_out_user[39] , \la_data_out_user[38] , \la_data_out_user[37] , \la_data_out_user[36] , \la_data_out_user[35] , \la_data_out_user[34] , \la_data_out_user[33] , \la_data_out_user[32] , \la_data_out_user[31] , \la_data_out_user[30] , \la_data_out_user[29] , \la_data_out_user[28] , \la_data_out_user[27] , \la_data_out_user[26] , \la_data_out_user[25] , \la_data_out_user[24] , \la_data_out_user[23] , \la_data_out_user[22] , \la_data_out_user[21] , \la_data_out_user[20] , \la_data_out_user[19] , \la_data_out_user[18] , \la_data_out_user[17] , \la_data_out_user[16] , \la_data_out_user[15] , \la_data_out_user[14] , \la_data_out_user[13] , \la_data_out_user[12] , \la_data_out_user[11] , \la_data_out_user[10] , \la_data_out_user[9] , \la_data_out_user[8] , \la_data_out_user[7] , \la_data_out_user[6] , \la_data_out_user[5] , \la_data_out_user[4] , \la_data_out_user[3] , \la_data_out_user[2] , \la_data_out_user[1] , \la_data_out_user[0]  }),
+    .la_data_out_mprj({ \la_data_out_mprj[127] , \la_data_out_mprj[126] , \la_data_out_mprj[125] , \la_data_out_mprj[124] , \la_data_out_mprj[123] , \la_data_out_mprj[122] , \la_data_out_mprj[121] , \la_data_out_mprj[120] , \la_data_out_mprj[119] , \la_data_out_mprj[118] , \la_data_out_mprj[117] , \la_data_out_mprj[116] , \la_data_out_mprj[115] , \la_data_out_mprj[114] , \la_data_out_mprj[113] , \la_data_out_mprj[112] , \la_data_out_mprj[111] , \la_data_out_mprj[110] , \la_data_out_mprj[109] , \la_data_out_mprj[108] , \la_data_out_mprj[107] , \la_data_out_mprj[106] , \la_data_out_mprj[105] , \la_data_out_mprj[104] , \la_data_out_mprj[103] , \la_data_out_mprj[102] , \la_data_out_mprj[101] , \la_data_out_mprj[100] , \la_data_out_mprj[99] , \la_data_out_mprj[98] , \la_data_out_mprj[97] , \la_data_out_mprj[96] , \la_data_out_mprj[95] , \la_data_out_mprj[94] , \la_data_out_mprj[93] , \la_data_out_mprj[92] , \la_data_out_mprj[91] , \la_data_out_mprj[90] , \la_data_out_mprj[89] , \la_data_out_mprj[88] , \la_data_out_mprj[87] , \la_data_out_mprj[86] , \la_data_out_mprj[85] , \la_data_out_mprj[84] , \la_data_out_mprj[83] , \la_data_out_mprj[82] , \la_data_out_mprj[81] , \la_data_out_mprj[80] , \la_data_out_mprj[79] , \la_data_out_mprj[78] , \la_data_out_mprj[77] , \la_data_out_mprj[76] , \la_data_out_mprj[75] , \la_data_out_mprj[74] , \la_data_out_mprj[73] , \la_data_out_mprj[72] , \la_data_out_mprj[71] , \la_data_out_mprj[70] , \la_data_out_mprj[69] , \la_data_out_mprj[68] , \la_data_out_mprj[67] , \la_data_out_mprj[66] , \la_data_out_mprj[65] , \la_data_out_mprj[64] , \la_data_out_mprj[63] , \la_data_out_mprj[62] , \la_data_out_mprj[61] , \la_data_out_mprj[60] , \la_data_out_mprj[59] , \la_data_out_mprj[58] , \la_data_out_mprj[57] , \la_data_out_mprj[56] , \la_data_out_mprj[55] , \la_data_out_mprj[54] , \la_data_out_mprj[53] , \la_data_out_mprj[52] , \la_data_out_mprj[51] , \la_data_out_mprj[50] , \la_data_out_mprj[49] , \la_data_out_mprj[48] , \la_data_out_mprj[47] , \la_data_out_mprj[46] , \la_data_out_mprj[45] , \la_data_out_mprj[44] , \la_data_out_mprj[43] , \la_data_out_mprj[42] , \la_data_out_mprj[41] , \la_data_out_mprj[40] , \la_data_out_mprj[39] , \la_data_out_mprj[38] , \la_data_out_mprj[37] , \la_data_out_mprj[36] , \la_data_out_mprj[35] , \la_data_out_mprj[34] , \la_data_out_mprj[33] , \la_data_out_mprj[32] , \la_data_out_mprj[31] , \la_data_out_mprj[30] , \la_data_out_mprj[29] , \la_data_out_mprj[28] , \la_data_out_mprj[27] , \la_data_out_mprj[26] , \la_data_out_mprj[25] , \la_data_out_mprj[24] , \la_data_out_mprj[23] , \la_data_out_mprj[22] , \la_data_out_mprj[21] , \la_data_out_mprj[20] , \la_data_out_mprj[19] , \la_data_out_mprj[18] , \la_data_out_mprj[17] , \la_data_out_mprj[16] , \la_data_out_mprj[15] , \la_data_out_mprj[14] , \la_data_out_mprj[13] , \la_data_out_mprj[12] , \la_data_out_mprj[11] , \la_data_out_mprj[10] , \la_data_out_mprj[9] , \la_data_out_mprj[8] , \la_data_out_mprj[7] , \la_data_out_mprj[6] , \la_data_out_mprj[5] , \la_data_out_mprj[4] , \la_data_out_mprj[3] , \la_data_out_mprj[2] , \la_data_out_mprj[1] , \la_data_out_mprj[0]  }),
+    .la_iena_mprj({ \la_iena_mprj[127] , \la_iena_mprj[126] , \la_iena_mprj[125] , \la_iena_mprj[124] , \la_iena_mprj[123] , \la_iena_mprj[122] , \la_iena_mprj[121] , \la_iena_mprj[120] , \la_iena_mprj[119] , \la_iena_mprj[118] , \la_iena_mprj[117] , \la_iena_mprj[116] , \la_iena_mprj[115] , \la_iena_mprj[114] , \la_iena_mprj[113] , \la_iena_mprj[112] , \la_iena_mprj[111] , \la_iena_mprj[110] , \la_iena_mprj[109] , \la_iena_mprj[108] , \la_iena_mprj[107] , \la_iena_mprj[106] , \la_iena_mprj[105] , \la_iena_mprj[104] , \la_iena_mprj[103] , \la_iena_mprj[102] , \la_iena_mprj[101] , \la_iena_mprj[100] , \la_iena_mprj[99] , \la_iena_mprj[98] , \la_iena_mprj[97] , \la_iena_mprj[96] , \la_iena_mprj[95] , \la_iena_mprj[94] , \la_iena_mprj[93] , \la_iena_mprj[92] , \la_iena_mprj[91] , \la_iena_mprj[90] , \la_iena_mprj[89] , \la_iena_mprj[88] , \la_iena_mprj[87] , \la_iena_mprj[86] , \la_iena_mprj[85] , \la_iena_mprj[84] , \la_iena_mprj[83] , \la_iena_mprj[82] , \la_iena_mprj[81] , \la_iena_mprj[80] , \la_iena_mprj[79] , \la_iena_mprj[78] , \la_iena_mprj[77] , \la_iena_mprj[76] , \la_iena_mprj[75] , \la_iena_mprj[74] , \la_iena_mprj[73] , \la_iena_mprj[72] , \la_iena_mprj[71] , \la_iena_mprj[70] , \la_iena_mprj[69] , \la_iena_mprj[68] , \la_iena_mprj[67] , \la_iena_mprj[66] , \la_iena_mprj[65] , \la_iena_mprj[64] , \la_iena_mprj[63] , \la_iena_mprj[62] , \la_iena_mprj[61] , \la_iena_mprj[60] , \la_iena_mprj[59] , \la_iena_mprj[58] , \la_iena_mprj[57] , \la_iena_mprj[56] , \la_iena_mprj[55] , \la_iena_mprj[54] , \la_iena_mprj[53] , \la_iena_mprj[52] , \la_iena_mprj[51] , \la_iena_mprj[50] , \la_iena_mprj[49] , \la_iena_mprj[48] , \la_iena_mprj[47] , \la_iena_mprj[46] , \la_iena_mprj[45] , \la_iena_mprj[44] , \la_iena_mprj[43] , \la_iena_mprj[42] , \la_iena_mprj[41] , \la_iena_mprj[40] , \la_iena_mprj[39] , \la_iena_mprj[38] , \la_iena_mprj[37] , \la_iena_mprj[36] , \la_iena_mprj[35] , \la_iena_mprj[34] , \la_iena_mprj[33] , \la_iena_mprj[32] , \la_iena_mprj[31] , \la_iena_mprj[30] , \la_iena_mprj[29] , \la_iena_mprj[28] , \la_iena_mprj[27] , \la_iena_mprj[26] , \la_iena_mprj[25] , \la_iena_mprj[24] , \la_iena_mprj[23] , \la_iena_mprj[22] , \la_iena_mprj[21] , \la_iena_mprj[20] , \la_iena_mprj[19] , \la_iena_mprj[18] , \la_iena_mprj[17] , \la_iena_mprj[16] , \la_iena_mprj[15] , \la_iena_mprj[14] , \la_iena_mprj[13] , \la_iena_mprj[12] , \la_iena_mprj[11] , \la_iena_mprj[10] , \la_iena_mprj[9] , \la_iena_mprj[8] , \la_iena_mprj[7] , \la_iena_mprj[6] , \la_iena_mprj[5] , \la_iena_mprj[4] , \la_iena_mprj[3] , \la_iena_mprj[2] , \la_iena_mprj[1] , \la_iena_mprj[0]  }),
+    .la_oenb_core({ \la_oenb_user[127] , \la_oenb_user[126] , \la_oenb_user[125] , \la_oenb_user[124] , \la_oenb_user[123] , \la_oenb_user[122] , \la_oenb_user[121] , \la_oenb_user[120] , \la_oenb_user[119] , \la_oenb_user[118] , \la_oenb_user[117] , \la_oenb_user[116] , \la_oenb_user[115] , \la_oenb_user[114] , \la_oenb_user[113] , \la_oenb_user[112] , \la_oenb_user[111] , \la_oenb_user[110] , \la_oenb_user[109] , \la_oenb_user[108] , \la_oenb_user[107] , \la_oenb_user[106] , \la_oenb_user[105] , \la_oenb_user[104] , \la_oenb_user[103] , \la_oenb_user[102] , \la_oenb_user[101] , \la_oenb_user[100] , \la_oenb_user[99] , \la_oenb_user[98] , \la_oenb_user[97] , \la_oenb_user[96] , \la_oenb_user[95] , \la_oenb_user[94] , \la_oenb_user[93] , \la_oenb_user[92] , \la_oenb_user[91] , \la_oenb_user[90] , \la_oenb_user[89] , \la_oenb_user[88] , \la_oenb_user[87] , \la_oenb_user[86] , \la_oenb_user[85] , \la_oenb_user[84] , \la_oenb_user[83] , \la_oenb_user[82] , \la_oenb_user[81] , \la_oenb_user[80] , \la_oenb_user[79] , \la_oenb_user[78] , \la_oenb_user[77] , \la_oenb_user[76] , \la_oenb_user[75] , \la_oenb_user[74] , \la_oenb_user[73] , \la_oenb_user[72] , \la_oenb_user[71] , \la_oenb_user[70] , \la_oenb_user[69] , \la_oenb_user[68] , \la_oenb_user[67] , \la_oenb_user[66] , \la_oenb_user[65] , \la_oenb_user[64] , \la_oenb_user[63] , \la_oenb_user[62] , \la_oenb_user[61] , \la_oenb_user[60] , \la_oenb_user[59] , \la_oenb_user[58] , \la_oenb_user[57] , \la_oenb_user[56] , \la_oenb_user[55] , \la_oenb_user[54] , \la_oenb_user[53] , \la_oenb_user[52] , \la_oenb_user[51] , \la_oenb_user[50] , \la_oenb_user[49] , \la_oenb_user[48] , \la_oenb_user[47] , \la_oenb_user[46] , \la_oenb_user[45] , \la_oenb_user[44] , \la_oenb_user[43] , \la_oenb_user[42] , \la_oenb_user[41] , \la_oenb_user[40] , \la_oenb_user[39] , \la_oenb_user[38] , \la_oenb_user[37] , \la_oenb_user[36] , \la_oenb_user[35] , \la_oenb_user[34] , \la_oenb_user[33] , \la_oenb_user[32] , \la_oenb_user[31] , \la_oenb_user[30] , \la_oenb_user[29] , \la_oenb_user[28] , \la_oenb_user[27] , \la_oenb_user[26] , \la_oenb_user[25] , \la_oenb_user[24] , \la_oenb_user[23] , \la_oenb_user[22] , \la_oenb_user[21] , \la_oenb_user[20] , \la_oenb_user[19] , \la_oenb_user[18] , \la_oenb_user[17] , \la_oenb_user[16] , \la_oenb_user[15] , \la_oenb_user[14] , \la_oenb_user[13] , \la_oenb_user[12] , \la_oenb_user[11] , \la_oenb_user[10] , \la_oenb_user[9] , \la_oenb_user[8] , \la_oenb_user[7] , \la_oenb_user[6] , \la_oenb_user[5] , \la_oenb_user[4] , \la_oenb_user[3] , \la_oenb_user[2] , \la_oenb_user[1] , \la_oenb_user[0]  }),
+    .la_oenb_mprj({ \la_oenb_mprj[127] , \la_oenb_mprj[126] , \la_oenb_mprj[125] , \la_oenb_mprj[124] , \la_oenb_mprj[123] , \la_oenb_mprj[122] , \la_oenb_mprj[121] , \la_oenb_mprj[120] , \la_oenb_mprj[119] , \la_oenb_mprj[118] , \la_oenb_mprj[117] , \la_oenb_mprj[116] , \la_oenb_mprj[115] , \la_oenb_mprj[114] , \la_oenb_mprj[113] , \la_oenb_mprj[112] , \la_oenb_mprj[111] , \la_oenb_mprj[110] , \la_oenb_mprj[109] , \la_oenb_mprj[108] , \la_oenb_mprj[107] , \la_oenb_mprj[106] , \la_oenb_mprj[105] , \la_oenb_mprj[104] , \la_oenb_mprj[103] , \la_oenb_mprj[102] , \la_oenb_mprj[101] , \la_oenb_mprj[100] , \la_oenb_mprj[99] , \la_oenb_mprj[98] , \la_oenb_mprj[97] , \la_oenb_mprj[96] , \la_oenb_mprj[95] , \la_oenb_mprj[94] , \la_oenb_mprj[93] , \la_oenb_mprj[92] , \la_oenb_mprj[91] , \la_oenb_mprj[90] , \la_oenb_mprj[89] , \la_oenb_mprj[88] , \la_oenb_mprj[87] , \la_oenb_mprj[86] , \la_oenb_mprj[85] , \la_oenb_mprj[84] , \la_oenb_mprj[83] , \la_oenb_mprj[82] , \la_oenb_mprj[81] , \la_oenb_mprj[80] , \la_oenb_mprj[79] , \la_oenb_mprj[78] , \la_oenb_mprj[77] , \la_oenb_mprj[76] , \la_oenb_mprj[75] , \la_oenb_mprj[74] , \la_oenb_mprj[73] , \la_oenb_mprj[72] , \la_oenb_mprj[71] , \la_oenb_mprj[70] , \la_oenb_mprj[69] , \la_oenb_mprj[68] , \la_oenb_mprj[67] , \la_oenb_mprj[66] , \la_oenb_mprj[65] , \la_oenb_mprj[64] , \la_oenb_mprj[63] , \la_oenb_mprj[62] , \la_oenb_mprj[61] , \la_oenb_mprj[60] , \la_oenb_mprj[59] , \la_oenb_mprj[58] , \la_oenb_mprj[57] , \la_oenb_mprj[56] , \la_oenb_mprj[55] , \la_oenb_mprj[54] , \la_oenb_mprj[53] , \la_oenb_mprj[52] , \la_oenb_mprj[51] , \la_oenb_mprj[50] , \la_oenb_mprj[49] , \la_oenb_mprj[48] , \la_oenb_mprj[47] , \la_oenb_mprj[46] , \la_oenb_mprj[45] , \la_oenb_mprj[44] , \la_oenb_mprj[43] , \la_oenb_mprj[42] , \la_oenb_mprj[41] , \la_oenb_mprj[40] , \la_oenb_mprj[39] , \la_oenb_mprj[38] , \la_oenb_mprj[37] , \la_oenb_mprj[36] , \la_oenb_mprj[35] , \la_oenb_mprj[34] , \la_oenb_mprj[33] , \la_oenb_mprj[32] , \la_oenb_mprj[31] , \la_oenb_mprj[30] , \la_oenb_mprj[29] , \la_oenb_mprj[28] , \la_oenb_mprj[27] , \la_oenb_mprj[26] , \la_oenb_mprj[25] , \la_oenb_mprj[24] , \la_oenb_mprj[23] , \la_oenb_mprj[22] , \la_oenb_mprj[21] , \la_oenb_mprj[20] , \la_oenb_mprj[19] , \la_oenb_mprj[18] , \la_oenb_mprj[17] , \la_oenb_mprj[16] , \la_oenb_mprj[15] , \la_oenb_mprj[14] , \la_oenb_mprj[13] , \la_oenb_mprj[12] , \la_oenb_mprj[11] , \la_oenb_mprj[10] , \la_oenb_mprj[9] , \la_oenb_mprj[8] , \la_oenb_mprj[7] , \la_oenb_mprj[6] , \la_oenb_mprj[5] , \la_oenb_mprj[4] , \la_oenb_mprj[3] , \la_oenb_mprj[2] , \la_oenb_mprj[1] , \la_oenb_mprj[0]  }),
+    .mprj_ack_i_core(mprj_ack_i_core),
+    .mprj_ack_i_user(mprj_ack_i_user),
+    .mprj_adr_o_core({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .mprj_adr_o_user({ \mprj_adr_o_user[31] , \mprj_adr_o_user[30] , \mprj_adr_o_user[29] , \mprj_adr_o_user[28] , \mprj_adr_o_user[27] , \mprj_adr_o_user[26] , \mprj_adr_o_user[25] , \mprj_adr_o_user[24] , \mprj_adr_o_user[23] , \mprj_adr_o_user[22] , \mprj_adr_o_user[21] , \mprj_adr_o_user[20] , \mprj_adr_o_user[19] , \mprj_adr_o_user[18] , \mprj_adr_o_user[17] , \mprj_adr_o_user[16] , \mprj_adr_o_user[15] , \mprj_adr_o_user[14] , \mprj_adr_o_user[13] , \mprj_adr_o_user[12] , \mprj_adr_o_user[11] , \mprj_adr_o_user[10] , \mprj_adr_o_user[9] , \mprj_adr_o_user[8] , \mprj_adr_o_user[7] , \mprj_adr_o_user[6] , \mprj_adr_o_user[5] , \mprj_adr_o_user[4] , \mprj_adr_o_user[3] , \mprj_adr_o_user[2] , \mprj_adr_o_user[1] , \mprj_adr_o_user[0]  }),
+    .mprj_cyc_o_core(mprj_cyc_o_core),
+    .mprj_cyc_o_user(mprj_cyc_o_user),
+    .mprj_dat_i_core({ \mprj_dat_i_core[31] , \mprj_dat_i_core[30] , \mprj_dat_i_core[29] , \mprj_dat_i_core[28] , \mprj_dat_i_core[27] , \mprj_dat_i_core[26] , \mprj_dat_i_core[25] , \mprj_dat_i_core[24] , \mprj_dat_i_core[23] , \mprj_dat_i_core[22] , \mprj_dat_i_core[21] , \mprj_dat_i_core[20] , \mprj_dat_i_core[19] , \mprj_dat_i_core[18] , \mprj_dat_i_core[17] , \mprj_dat_i_core[16] , \mprj_dat_i_core[15] , \mprj_dat_i_core[14] , \mprj_dat_i_core[13] , \mprj_dat_i_core[12] , \mprj_dat_i_core[11] , \mprj_dat_i_core[10] , \mprj_dat_i_core[9] , \mprj_dat_i_core[8] , \mprj_dat_i_core[7] , \mprj_dat_i_core[6] , \mprj_dat_i_core[5] , \mprj_dat_i_core[4] , \mprj_dat_i_core[3] , \mprj_dat_i_core[2] , \mprj_dat_i_core[1] , \mprj_dat_i_core[0]  }),
+    .mprj_dat_i_user({ \mprj_dat_i_user[31] , \mprj_dat_i_user[30] , \mprj_dat_i_user[29] , \mprj_dat_i_user[28] , \mprj_dat_i_user[27] , \mprj_dat_i_user[26] , \mprj_dat_i_user[25] , \mprj_dat_i_user[24] , \mprj_dat_i_user[23] , \mprj_dat_i_user[22] , \mprj_dat_i_user[21] , \mprj_dat_i_user[20] , \mprj_dat_i_user[19] , \mprj_dat_i_user[18] , \mprj_dat_i_user[17] , \mprj_dat_i_user[16] , \mprj_dat_i_user[15] , \mprj_dat_i_user[14] , \mprj_dat_i_user[13] , \mprj_dat_i_user[12] , \mprj_dat_i_user[11] , \mprj_dat_i_user[10] , \mprj_dat_i_user[9] , \mprj_dat_i_user[8] , \mprj_dat_i_user[7] , \mprj_dat_i_user[6] , \mprj_dat_i_user[5] , \mprj_dat_i_user[4] , \mprj_dat_i_user[3] , \mprj_dat_i_user[2] , \mprj_dat_i_user[1] , \mprj_dat_i_user[0]  }),
+    .mprj_dat_o_core({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .mprj_dat_o_user({ \mprj_dat_o_user[31] , \mprj_dat_o_user[30] , \mprj_dat_o_user[29] , \mprj_dat_o_user[28] , \mprj_dat_o_user[27] , \mprj_dat_o_user[26] , \mprj_dat_o_user[25] , \mprj_dat_o_user[24] , \mprj_dat_o_user[23] , \mprj_dat_o_user[22] , \mprj_dat_o_user[21] , \mprj_dat_o_user[20] , \mprj_dat_o_user[19] , \mprj_dat_o_user[18] , \mprj_dat_o_user[17] , \mprj_dat_o_user[16] , \mprj_dat_o_user[15] , \mprj_dat_o_user[14] , \mprj_dat_o_user[13] , \mprj_dat_o_user[12] , \mprj_dat_o_user[11] , \mprj_dat_o_user[10] , \mprj_dat_o_user[9] , \mprj_dat_o_user[8] , \mprj_dat_o_user[7] , \mprj_dat_o_user[6] , \mprj_dat_o_user[5] , \mprj_dat_o_user[4] , \mprj_dat_o_user[3] , \mprj_dat_o_user[2] , \mprj_dat_o_user[1] , \mprj_dat_o_user[0]  }),
+    .mprj_iena_wb(mprj_iena_wb),
+    .mprj_sel_o_core({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .mprj_sel_o_user({ \mprj_sel_o_user[3] , \mprj_sel_o_user[2] , \mprj_sel_o_user[1] , \mprj_sel_o_user[0]  }),
+    .mprj_stb_o_core(mprj_stb_o_core),
+    .mprj_stb_o_user(mprj_stb_o_user),
+    .mprj_we_o_core(mprj_we_o_core),
+    .mprj_we_o_user(mprj_we_o_user),
+    .user1_vcc_powergood(mprj_vcc_pwrgood),
+    .user1_vdd_powergood(mprj_vdd_pwrgood),
+    .user2_vcc_powergood(mprj2_vcc_pwrgood),
+    .user2_vdd_powergood(mprj2_vdd_pwrgood),
+    .user_clock(mprj_clock),
+    .user_clock2(mprj_clock2),
+    .user_irq({ \user_irq[2] , \user_irq[1] , \user_irq[0]  }),
+    .user_irq_core({ \user_irq_core[2] , \user_irq_core[1] , \user_irq_core[0]  }),
+    .user_irq_ena({ \user_irq_ena[2] , \user_irq_ena[1] , \user_irq_ena[0]  }),
+    .user_reset(mprj_reset),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vccd2(vccd2_core),
+    .vdda1(vdda1_core),
+    .vdda2(vdda2_core),
+    .vssa1(vssa1_core),
+    .vssa2(vssa2_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .vssd2(vssd2_core)
+  );
+  user_project_wrapper mprj (
+    .analog_io({ \user_analog_io[28] , \user_analog_io[27] , \user_analog_io[26] , \user_analog_io[25] , \user_analog_io[24] , \user_analog_io[23] , \user_analog_io[22] , \user_analog_io[21] , \user_analog_io[20] , \user_analog_io[19] , \user_analog_io[18] , \user_analog_io[17] , \user_analog_io[16] , \user_analog_io[15] , \user_analog_io[14] , \user_analog_io[13] , \user_analog_io[12] , \user_analog_io[11] , \user_analog_io[10] , \user_analog_io[9] , \user_analog_io[8] , \user_analog_io[7] , \user_analog_io[6] , \user_analog_io[5] , \user_analog_io[4] , \user_analog_io[3] , \user_analog_io[2] , \user_analog_io[1] , \user_analog_io[0]  }),
+    .io_in({ \user_io_in[37] , \user_io_in[36] , \user_io_in[35] , \user_io_in[34] , \user_io_in[33] , \user_io_in[32] , \user_io_in[31] , \user_io_in[30] , \user_io_in[29] , \user_io_in[28] , \user_io_in[27] , \user_io_in[26] , \user_io_in[25] , \user_io_in[24] , \user_io_in[23] , \user_io_in[22] , \user_io_in[21] , \user_io_in[20] , \user_io_in[19] , \user_io_in[18] , \user_io_in[17] , \user_io_in[16] , \user_io_in[15] , \user_io_in[14] , \user_io_in[13] , \user_io_in[12] , \user_io_in[11] , \user_io_in[10] , \user_io_in[9] , \user_io_in[8] , \user_io_in[7] , \user_io_in[6] , \user_io_in[5] , \user_io_in[4] , \user_io_in[3] , \user_io_in[2] , \user_io_in[1] , \user_io_in[0]  }),
+    .io_oeb({ \user_io_oeb[37] , \user_io_oeb[36] , \user_io_oeb[35] , \user_io_oeb[34] , \user_io_oeb[33] , \user_io_oeb[32] , \user_io_oeb[31] , \user_io_oeb[30] , \user_io_oeb[29] , \user_io_oeb[28] , \user_io_oeb[27] , \user_io_oeb[26] , \user_io_oeb[25] , \user_io_oeb[24] , \user_io_oeb[23] , \user_io_oeb[22] , \user_io_oeb[21] , \user_io_oeb[20] , \user_io_oeb[19] , \user_io_oeb[18] , \user_io_oeb[17] , \user_io_oeb[16] , \user_io_oeb[15] , \user_io_oeb[14] , \user_io_oeb[13] , \user_io_oeb[12] , \user_io_oeb[11] , \user_io_oeb[10] , \user_io_oeb[9] , \user_io_oeb[8] , \user_io_oeb[7] , \user_io_oeb[6] , \user_io_oeb[5] , \user_io_oeb[4] , \user_io_oeb[3] , \user_io_oeb[2] , \user_io_oeb[1] , \user_io_oeb[0]  }),
+    .io_out({ \user_io_out[37] , \user_io_out[36] , \user_io_out[35] , \user_io_out[34] , \user_io_out[33] , \user_io_out[32] , \user_io_out[31] , \user_io_out[30] , \user_io_out[29] , \user_io_out[28] , \user_io_out[27] , \user_io_out[26] , \user_io_out[25] , \user_io_out[24] , \user_io_out[23] , \user_io_out[22] , \user_io_out[21] , \user_io_out[20] , \user_io_out[19] , \user_io_out[18] , \user_io_out[17] , \user_io_out[16] , \user_io_out[15] , \user_io_out[14] , \user_io_out[13] , \user_io_out[12] , \user_io_out[11] , \user_io_out[10] , \user_io_out[9] , \user_io_out[8] , \user_io_out[7] , \user_io_out[6] , \user_io_out[5] , \user_io_out[4] , \user_io_out[3] , \user_io_out[2] , \user_io_out[1] , \user_io_out[0]  }),
+    .la_data_in({ \la_data_in_user[127] , \la_data_in_user[126] , \la_data_in_user[125] , \la_data_in_user[124] , \la_data_in_user[123] , \la_data_in_user[122] , \la_data_in_user[121] , \la_data_in_user[120] , \la_data_in_user[119] , \la_data_in_user[118] , \la_data_in_user[117] , \la_data_in_user[116] , \la_data_in_user[115] , \la_data_in_user[114] , \la_data_in_user[113] , \la_data_in_user[112] , \la_data_in_user[111] , \la_data_in_user[110] , \la_data_in_user[109] , \la_data_in_user[108] , \la_data_in_user[107] , \la_data_in_user[106] , \la_data_in_user[105] , \la_data_in_user[104] , \la_data_in_user[103] , \la_data_in_user[102] , \la_data_in_user[101] , \la_data_in_user[100] , \la_data_in_user[99] , \la_data_in_user[98] , \la_data_in_user[97] , \la_data_in_user[96] , \la_data_in_user[95] , \la_data_in_user[94] , \la_data_in_user[93] , \la_data_in_user[92] , \la_data_in_user[91] , \la_data_in_user[90] , \la_data_in_user[89] , \la_data_in_user[88] , \la_data_in_user[87] , \la_data_in_user[86] , \la_data_in_user[85] , \la_data_in_user[84] , \la_data_in_user[83] , \la_data_in_user[82] , \la_data_in_user[81] , \la_data_in_user[80] , \la_data_in_user[79] , \la_data_in_user[78] , \la_data_in_user[77] , \la_data_in_user[76] , \la_data_in_user[75] , \la_data_in_user[74] , \la_data_in_user[73] , \la_data_in_user[72] , \la_data_in_user[71] , \la_data_in_user[70] , \la_data_in_user[69] , \la_data_in_user[68] , \la_data_in_user[67] , \la_data_in_user[66] , \la_data_in_user[65] , \la_data_in_user[64] , \la_data_in_user[63] , \la_data_in_user[62] , \la_data_in_user[61] , \la_data_in_user[60] , \la_data_in_user[59] , \la_data_in_user[58] , \la_data_in_user[57] , \la_data_in_user[56] , \la_data_in_user[55] , \la_data_in_user[54] , \la_data_in_user[53] , \la_data_in_user[52] , \la_data_in_user[51] , \la_data_in_user[50] , \la_data_in_user[49] , \la_data_in_user[48] , \la_data_in_user[47] , \la_data_in_user[46] , \la_data_in_user[45] , \la_data_in_user[44] , \la_data_in_user[43] , \la_data_in_user[42] , \la_data_in_user[41] , \la_data_in_user[40] , \la_data_in_user[39] , \la_data_in_user[38] , \la_data_in_user[37] , \la_data_in_user[36] , \la_data_in_user[35] , \la_data_in_user[34] , \la_data_in_user[33] , \la_data_in_user[32] , \la_data_in_user[31] , \la_data_in_user[30] , \la_data_in_user[29] , \la_data_in_user[28] , \la_data_in_user[27] , \la_data_in_user[26] , \la_data_in_user[25] , \la_data_in_user[24] , \la_data_in_user[23] , \la_data_in_user[22] , \la_data_in_user[21] , \la_data_in_user[20] , \la_data_in_user[19] , \la_data_in_user[18] , \la_data_in_user[17] , \la_data_in_user[16] , \la_data_in_user[15] , \la_data_in_user[14] , \la_data_in_user[13] , \la_data_in_user[12] , \la_data_in_user[11] , \la_data_in_user[10] , \la_data_in_user[9] , \la_data_in_user[8] , \la_data_in_user[7] , \la_data_in_user[6] , \la_data_in_user[5] , \la_data_in_user[4] , \la_data_in_user[3] , \la_data_in_user[2] , \la_data_in_user[1] , \la_data_in_user[0]  }),
+    .la_data_out({ \la_data_out_user[127] , \la_data_out_user[126] , \la_data_out_user[125] , \la_data_out_user[124] , \la_data_out_user[123] , \la_data_out_user[122] , \la_data_out_user[121] , \la_data_out_user[120] , \la_data_out_user[119] , \la_data_out_user[118] , \la_data_out_user[117] , \la_data_out_user[116] , \la_data_out_user[115] , \la_data_out_user[114] , \la_data_out_user[113] , \la_data_out_user[112] , \la_data_out_user[111] , \la_data_out_user[110] , \la_data_out_user[109] , \la_data_out_user[108] , \la_data_out_user[107] , \la_data_out_user[106] , \la_data_out_user[105] , \la_data_out_user[104] , \la_data_out_user[103] , \la_data_out_user[102] , \la_data_out_user[101] , \la_data_out_user[100] , \la_data_out_user[99] , \la_data_out_user[98] , \la_data_out_user[97] , \la_data_out_user[96] , \la_data_out_user[95] , \la_data_out_user[94] , \la_data_out_user[93] , \la_data_out_user[92] , \la_data_out_user[91] , \la_data_out_user[90] , \la_data_out_user[89] , \la_data_out_user[88] , \la_data_out_user[87] , \la_data_out_user[86] , \la_data_out_user[85] , \la_data_out_user[84] , \la_data_out_user[83] , \la_data_out_user[82] , \la_data_out_user[81] , \la_data_out_user[80] , \la_data_out_user[79] , \la_data_out_user[78] , \la_data_out_user[77] , \la_data_out_user[76] , \la_data_out_user[75] , \la_data_out_user[74] , \la_data_out_user[73] , \la_data_out_user[72] , \la_data_out_user[71] , \la_data_out_user[70] , \la_data_out_user[69] , \la_data_out_user[68] , \la_data_out_user[67] , \la_data_out_user[66] , \la_data_out_user[65] , \la_data_out_user[64] , \la_data_out_user[63] , \la_data_out_user[62] , \la_data_out_user[61] , \la_data_out_user[60] , \la_data_out_user[59] , \la_data_out_user[58] , \la_data_out_user[57] , \la_data_out_user[56] , \la_data_out_user[55] , \la_data_out_user[54] , \la_data_out_user[53] , \la_data_out_user[52] , \la_data_out_user[51] , \la_data_out_user[50] , \la_data_out_user[49] , \la_data_out_user[48] , \la_data_out_user[47] , \la_data_out_user[46] , \la_data_out_user[45] , \la_data_out_user[44] , \la_data_out_user[43] , \la_data_out_user[42] , \la_data_out_user[41] , \la_data_out_user[40] , \la_data_out_user[39] , \la_data_out_user[38] , \la_data_out_user[37] , \la_data_out_user[36] , \la_data_out_user[35] , \la_data_out_user[34] , \la_data_out_user[33] , \la_data_out_user[32] , \la_data_out_user[31] , \la_data_out_user[30] , \la_data_out_user[29] , \la_data_out_user[28] , \la_data_out_user[27] , \la_data_out_user[26] , \la_data_out_user[25] , \la_data_out_user[24] , \la_data_out_user[23] , \la_data_out_user[22] , \la_data_out_user[21] , \la_data_out_user[20] , \la_data_out_user[19] , \la_data_out_user[18] , \la_data_out_user[17] , \la_data_out_user[16] , \la_data_out_user[15] , \la_data_out_user[14] , \la_data_out_user[13] , \la_data_out_user[12] , \la_data_out_user[11] , \la_data_out_user[10] , \la_data_out_user[9] , \la_data_out_user[8] , \la_data_out_user[7] , \la_data_out_user[6] , \la_data_out_user[5] , \la_data_out_user[4] , \la_data_out_user[3] , \la_data_out_user[2] , \la_data_out_user[1] , \la_data_out_user[0]  }),
+    .la_oenb({ \la_oenb_user[127] , \la_oenb_user[126] , \la_oenb_user[125] , \la_oenb_user[124] , \la_oenb_user[123] , \la_oenb_user[122] , \la_oenb_user[121] , \la_oenb_user[120] , \la_oenb_user[119] , \la_oenb_user[118] , \la_oenb_user[117] , \la_oenb_user[116] , \la_oenb_user[115] , \la_oenb_user[114] , \la_oenb_user[113] , \la_oenb_user[112] , \la_oenb_user[111] , \la_oenb_user[110] , \la_oenb_user[109] , \la_oenb_user[108] , \la_oenb_user[107] , \la_oenb_user[106] , \la_oenb_user[105] , \la_oenb_user[104] , \la_oenb_user[103] , \la_oenb_user[102] , \la_oenb_user[101] , \la_oenb_user[100] , \la_oenb_user[99] , \la_oenb_user[98] , \la_oenb_user[97] , \la_oenb_user[96] , \la_oenb_user[95] , \la_oenb_user[94] , \la_oenb_user[93] , \la_oenb_user[92] , \la_oenb_user[91] , \la_oenb_user[90] , \la_oenb_user[89] , \la_oenb_user[88] , \la_oenb_user[87] , \la_oenb_user[86] , \la_oenb_user[85] , \la_oenb_user[84] , \la_oenb_user[83] , \la_oenb_user[82] , \la_oenb_user[81] , \la_oenb_user[80] , \la_oenb_user[79] , \la_oenb_user[78] , \la_oenb_user[77] , \la_oenb_user[76] , \la_oenb_user[75] , \la_oenb_user[74] , \la_oenb_user[73] , \la_oenb_user[72] , \la_oenb_user[71] , \la_oenb_user[70] , \la_oenb_user[69] , \la_oenb_user[68] , \la_oenb_user[67] , \la_oenb_user[66] , \la_oenb_user[65] , \la_oenb_user[64] , \la_oenb_user[63] , \la_oenb_user[62] , \la_oenb_user[61] , \la_oenb_user[60] , \la_oenb_user[59] , \la_oenb_user[58] , \la_oenb_user[57] , \la_oenb_user[56] , \la_oenb_user[55] , \la_oenb_user[54] , \la_oenb_user[53] , \la_oenb_user[52] , \la_oenb_user[51] , \la_oenb_user[50] , \la_oenb_user[49] , \la_oenb_user[48] , \la_oenb_user[47] , \la_oenb_user[46] , \la_oenb_user[45] , \la_oenb_user[44] , \la_oenb_user[43] , \la_oenb_user[42] , \la_oenb_user[41] , \la_oenb_user[40] , \la_oenb_user[39] , \la_oenb_user[38] , \la_oenb_user[37] , \la_oenb_user[36] , \la_oenb_user[35] , \la_oenb_user[34] , \la_oenb_user[33] , \la_oenb_user[32] , \la_oenb_user[31] , \la_oenb_user[30] , \la_oenb_user[29] , \la_oenb_user[28] , \la_oenb_user[27] , \la_oenb_user[26] , \la_oenb_user[25] , \la_oenb_user[24] , \la_oenb_user[23] , \la_oenb_user[22] , \la_oenb_user[21] , \la_oenb_user[20] , \la_oenb_user[19] , \la_oenb_user[18] , \la_oenb_user[17] , \la_oenb_user[16] , \la_oenb_user[15] , \la_oenb_user[14] , \la_oenb_user[13] , \la_oenb_user[12] , \la_oenb_user[11] , \la_oenb_user[10] , \la_oenb_user[9] , \la_oenb_user[8] , \la_oenb_user[7] , \la_oenb_user[6] , \la_oenb_user[5] , \la_oenb_user[4] , \la_oenb_user[3] , \la_oenb_user[2] , \la_oenb_user[1] , \la_oenb_user[0]  }),
+    .user_clock2(mprj_clock2),
+    .user_irq({ \user_irq_core[2] , \user_irq_core[1] , \user_irq_core[0]  }),
+    .vccd1(vccd1_core),
+    .vccd2(vccd2_core),
+    .vdda1(vdda1_core),
+    .vdda2(vdda2_core),
+    .vssa1(vssa1_core),
+    .vssa2(vssa2_core),
+    .vssd1(vssd1_core),
+    .vssd2(vssd2_core),
+    .wb_clk_i(mprj_clock),
+    .wb_rst_i(mprj_reset),
+    .wbs_ack_o(mprj_ack_i_user),
+    .wbs_adr_i({ \mprj_adr_o_user[31] , \mprj_adr_o_user[30] , \mprj_adr_o_user[29] , \mprj_adr_o_user[28] , \mprj_adr_o_user[27] , \mprj_adr_o_user[26] , \mprj_adr_o_user[25] , \mprj_adr_o_user[24] , \mprj_adr_o_user[23] , \mprj_adr_o_user[22] , \mprj_adr_o_user[21] , \mprj_adr_o_user[20] , \mprj_adr_o_user[19] , \mprj_adr_o_user[18] , \mprj_adr_o_user[17] , \mprj_adr_o_user[16] , \mprj_adr_o_user[15] , \mprj_adr_o_user[14] , \mprj_adr_o_user[13] , \mprj_adr_o_user[12] , \mprj_adr_o_user[11] , \mprj_adr_o_user[10] , \mprj_adr_o_user[9] , \mprj_adr_o_user[8] , \mprj_adr_o_user[7] , \mprj_adr_o_user[6] , \mprj_adr_o_user[5] , \mprj_adr_o_user[4] , \mprj_adr_o_user[3] , \mprj_adr_o_user[2] , \mprj_adr_o_user[1] , \mprj_adr_o_user[0]  }),
+    .wbs_cyc_i(mprj_cyc_o_user),
+    .wbs_dat_i({ \mprj_dat_o_user[31] , \mprj_dat_o_user[30] , \mprj_dat_o_user[29] , \mprj_dat_o_user[28] , \mprj_dat_o_user[27] , \mprj_dat_o_user[26] , \mprj_dat_o_user[25] , \mprj_dat_o_user[24] , \mprj_dat_o_user[23] , \mprj_dat_o_user[22] , \mprj_dat_o_user[21] , \mprj_dat_o_user[20] , \mprj_dat_o_user[19] , \mprj_dat_o_user[18] , \mprj_dat_o_user[17] , \mprj_dat_o_user[16] , \mprj_dat_o_user[15] , \mprj_dat_o_user[14] , \mprj_dat_o_user[13] , \mprj_dat_o_user[12] , \mprj_dat_o_user[11] , \mprj_dat_o_user[10] , \mprj_dat_o_user[9] , \mprj_dat_o_user[8] , \mprj_dat_o_user[7] , \mprj_dat_o_user[6] , \mprj_dat_o_user[5] , \mprj_dat_o_user[4] , \mprj_dat_o_user[3] , \mprj_dat_o_user[2] , \mprj_dat_o_user[1] , \mprj_dat_o_user[0]  }),
+    .wbs_dat_o({ \mprj_dat_i_user[31] , \mprj_dat_i_user[30] , \mprj_dat_i_user[29] , \mprj_dat_i_user[28] , \mprj_dat_i_user[27] , \mprj_dat_i_user[26] , \mprj_dat_i_user[25] , \mprj_dat_i_user[24] , \mprj_dat_i_user[23] , \mprj_dat_i_user[22] , \mprj_dat_i_user[21] , \mprj_dat_i_user[20] , \mprj_dat_i_user[19] , \mprj_dat_i_user[18] , \mprj_dat_i_user[17] , \mprj_dat_i_user[16] , \mprj_dat_i_user[15] , \mprj_dat_i_user[14] , \mprj_dat_i_user[13] , \mprj_dat_i_user[12] , \mprj_dat_i_user[11] , \mprj_dat_i_user[10] , \mprj_dat_i_user[9] , \mprj_dat_i_user[8] , \mprj_dat_i_user[7] , \mprj_dat_i_user[6] , \mprj_dat_i_user[5] , \mprj_dat_i_user[4] , \mprj_dat_i_user[3] , \mprj_dat_i_user[2] , \mprj_dat_i_user[1] , \mprj_dat_i_user[0]  }),
+    .wbs_sel_i({ \mprj_sel_o_user[3] , \mprj_sel_o_user[2] , \mprj_sel_o_user[1] , \mprj_sel_o_user[0]  }),
+    .wbs_stb_i(mprj_stb_o_user),
+    .wbs_we_i(mprj_we_o_user)
+  );
+  chip_io padframe (
+    .clock(clock),
+    .clock_core(clock_core),
+    .flash_clk(flash_clk),
+    .flash_clk_core(flash_clk_frame_buf),
+    .flash_clk_oeb_core(flash_clk_oeb_buf),
+    .flash_csb(flash_csb),
+    .flash_csb_core(flash_csb_frame_buf),
+    .flash_csb_oeb_core(flash_csb_oeb_buf),
+    .flash_io0(flash_io0),
+    .flash_io0_di_core(flash_io0_di),
+    .flash_io0_do_core(flash_io0_do_buf),
+    .flash_io0_ieb_core(flash_io0_ieb_buf),
+    .flash_io0_oeb_core(flash_io0_oeb_buf),
+    .flash_io1(flash_io1),
+    .flash_io1_di_core(flash_io1_di),
+    .flash_io1_do_core(flash_io1_do_buf),
+    .flash_io1_ieb_core(flash_io1_ieb_buf),
+    .flash_io1_oeb_core(flash_io1_oeb_buf),
+    .gpio(gpio),
+    .gpio_in_core(gpio_in_core),
+    .gpio_inenb_core(gpio_inenb_core),
+    .gpio_mode0_core(gpio_mode0_core),
+    .gpio_mode1_core(gpio_mode1_core),
+    .gpio_out_core(gpio_out_core),
+    .gpio_outenb_core(gpio_outenb_core),
+    .mprj_analog_io({ \user_analog_io[28] , \user_analog_io[27] , \user_analog_io[26] , \user_analog_io[25] , \user_analog_io[24] , \user_analog_io[23] , \user_analog_io[22] , \user_analog_io[21] , \user_analog_io[20] , \user_analog_io[19] , \user_analog_io[18] , \user_analog_io[17] , \user_analog_io[16] , \user_analog_io[15] , \user_analog_io[14] , \user_analog_io[13] , \user_analog_io[12] , \user_analog_io[11] , \user_analog_io[10] , \user_analog_io[9] , \user_analog_io[8] , \user_analog_io[7] , \user_analog_io[6] , \user_analog_io[5] , \user_analog_io[4] , \user_analog_io[3] , \user_analog_io[2] , \user_analog_io[1] , \user_analog_io[0]  }),
+    .mprj_io(mprj_io),
+    .mprj_io_analog_en({ \mprj_io_analog_en[37] , \mprj_io_analog_en[36] , \mprj_io_analog_en[35] , \mprj_io_analog_en[34] , \mprj_io_analog_en[33] , \mprj_io_analog_en[32] , \mprj_io_analog_en[31] , \mprj_io_analog_en[30] , \mprj_io_analog_en[29] , \mprj_io_analog_en[28] , \mprj_io_analog_en[27] , \mprj_io_analog_en[26] , \mprj_io_analog_en[25] , \mprj_io_analog_en[24] , \mprj_io_analog_en[23] , \mprj_io_analog_en[22] , \mprj_io_analog_en[21] , \mprj_io_analog_en[20] , \mprj_io_analog_en[19] , \mprj_io_analog_en[18] , \mprj_io_analog_en[17] , \mprj_io_analog_en[16] , \mprj_io_analog_en[15] , \mprj_io_analog_en[14] , \mprj_io_analog_en[13] , \mprj_io_analog_en[12] , \mprj_io_analog_en[11] , \mprj_io_analog_en[10] , \mprj_io_analog_en[9] , \mprj_io_analog_en[8] , \mprj_io_analog_en[7] , \mprj_io_analog_en[6] , \mprj_io_analog_en[5] , \mprj_io_analog_en[4] , \mprj_io_analog_en[3] , \mprj_io_analog_en[2] , \mprj_io_analog_en[1] , \mprj_io_analog_en[0]  }),
+    .mprj_io_analog_pol({ \mprj_io_analog_pol[37] , \mprj_io_analog_pol[36] , \mprj_io_analog_pol[35] , \mprj_io_analog_pol[34] , \mprj_io_analog_pol[33] , \mprj_io_analog_pol[32] , \mprj_io_analog_pol[31] , \mprj_io_analog_pol[30] , \mprj_io_analog_pol[29] , \mprj_io_analog_pol[28] , \mprj_io_analog_pol[27] , \mprj_io_analog_pol[26] , \mprj_io_analog_pol[25] , \mprj_io_analog_pol[24] , \mprj_io_analog_pol[23] , \mprj_io_analog_pol[22] , \mprj_io_analog_pol[21] , \mprj_io_analog_pol[20] , \mprj_io_analog_pol[19] , \mprj_io_analog_pol[18] , \mprj_io_analog_pol[17] , \mprj_io_analog_pol[16] , \mprj_io_analog_pol[15] , \mprj_io_analog_pol[14] , \mprj_io_analog_pol[13] , \mprj_io_analog_pol[12] , \mprj_io_analog_pol[11] , \mprj_io_analog_pol[10] , \mprj_io_analog_pol[9] , \mprj_io_analog_pol[8] , \mprj_io_analog_pol[7] , \mprj_io_analog_pol[6] , \mprj_io_analog_pol[5] , \mprj_io_analog_pol[4] , \mprj_io_analog_pol[3] , \mprj_io_analog_pol[2] , \mprj_io_analog_pol[1] , \mprj_io_analog_pol[0]  }),
+    .mprj_io_analog_sel({ \mprj_io_analog_sel[37] , \mprj_io_analog_sel[36] , \mprj_io_analog_sel[35] , \mprj_io_analog_sel[34] , \mprj_io_analog_sel[33] , \mprj_io_analog_sel[32] , \mprj_io_analog_sel[31] , \mprj_io_analog_sel[30] , \mprj_io_analog_sel[29] , \mprj_io_analog_sel[28] , \mprj_io_analog_sel[27] , \mprj_io_analog_sel[26] , \mprj_io_analog_sel[25] , \mprj_io_analog_sel[24] , \mprj_io_analog_sel[23] , \mprj_io_analog_sel[22] , \mprj_io_analog_sel[21] , \mprj_io_analog_sel[20] , \mprj_io_analog_sel[19] , \mprj_io_analog_sel[18] , \mprj_io_analog_sel[17] , \mprj_io_analog_sel[16] , \mprj_io_analog_sel[15] , \mprj_io_analog_sel[14] , \mprj_io_analog_sel[13] , \mprj_io_analog_sel[12] , \mprj_io_analog_sel[11] , \mprj_io_analog_sel[10] , \mprj_io_analog_sel[9] , \mprj_io_analog_sel[8] , \mprj_io_analog_sel[7] , \mprj_io_analog_sel[6] , \mprj_io_analog_sel[5] , \mprj_io_analog_sel[4] , \mprj_io_analog_sel[3] , \mprj_io_analog_sel[2] , \mprj_io_analog_sel[1] , \mprj_io_analog_sel[0]  }),
+    .mprj_io_dm({ \mprj_io_dm[113] , \mprj_io_dm[112] , \mprj_io_dm[111] , \mprj_io_dm[110] , \mprj_io_dm[109] , \mprj_io_dm[108] , \mprj_io_dm[107] , \mprj_io_dm[106] , \mprj_io_dm[105] , \mprj_io_dm[104] , \mprj_io_dm[103] , \mprj_io_dm[102] , \mprj_io_dm[101] , \mprj_io_dm[100] , \mprj_io_dm[99] , \mprj_io_dm[98] , \mprj_io_dm[97] , \mprj_io_dm[96] , \mprj_io_dm[95] , \mprj_io_dm[94] , \mprj_io_dm[93] , \mprj_io_dm[92] , \mprj_io_dm[91] , \mprj_io_dm[90] , \mprj_io_dm[89] , \mprj_io_dm[88] , \mprj_io_dm[87] , \mprj_io_dm[86] , \mprj_io_dm[85] , \mprj_io_dm[84] , \mprj_io_dm[83] , \mprj_io_dm[82] , \mprj_io_dm[81] , \mprj_io_dm[80] , \mprj_io_dm[79] , \mprj_io_dm[78] , \mprj_io_dm[77] , \mprj_io_dm[76] , \mprj_io_dm[75] , \mprj_io_dm[74] , \mprj_io_dm[73] , \mprj_io_dm[72] , \mprj_io_dm[71] , \mprj_io_dm[70] , \mprj_io_dm[69] , \mprj_io_dm[68] , \mprj_io_dm[67] , \mprj_io_dm[66] , \mprj_io_dm[65] , \mprj_io_dm[64] , \mprj_io_dm[63] , \mprj_io_dm[62] , \mprj_io_dm[61] , \mprj_io_dm[60] , \mprj_io_dm[59] , \mprj_io_dm[58] , \mprj_io_dm[57] , \mprj_io_dm[56] , \mprj_io_dm[55] , \mprj_io_dm[54] , \mprj_io_dm[53] , \mprj_io_dm[52] , \mprj_io_dm[51] , \mprj_io_dm[50] , \mprj_io_dm[49] , \mprj_io_dm[48] , \mprj_io_dm[47] , \mprj_io_dm[46] , \mprj_io_dm[45] , \mprj_io_dm[44] , \mprj_io_dm[43] , \mprj_io_dm[42] , \mprj_io_dm[41] , \mprj_io_dm[40] , \mprj_io_dm[39] , \mprj_io_dm[38] , \mprj_io_dm[37] , \mprj_io_dm[36] , \mprj_io_dm[35] , \mprj_io_dm[34] , \mprj_io_dm[33] , \mprj_io_dm[32] , \mprj_io_dm[31] , \mprj_io_dm[30] , \mprj_io_dm[29] , \mprj_io_dm[28] , \mprj_io_dm[27] , \mprj_io_dm[26] , \mprj_io_dm[25] , \mprj_io_dm[24] , \mprj_io_dm[23] , \mprj_io_dm[22] , \mprj_io_dm[21] , \mprj_io_dm[20] , \mprj_io_dm[19] , \mprj_io_dm[18] , \mprj_io_dm[17] , \mprj_io_dm[16] , \mprj_io_dm[15] , \mprj_io_dm[14] , \mprj_io_dm[13] , \mprj_io_dm[12] , \mprj_io_dm[11] , \mprj_io_dm[10] , \mprj_io_dm[9] , \mprj_io_dm[8] , \mprj_io_dm[7] , \mprj_io_dm[6] , \mprj_io_dm[5] , \mprj_io_dm[4] , \mprj_io_dm[3] , \mprj_io_dm[2] , \mprj_io_dm[1] , \mprj_io_dm[0]  }),
+    .mprj_io_holdover({ \mprj_io_holdover[37] , \mprj_io_holdover[36] , \mprj_io_holdover[35] , \mprj_io_holdover[34] , \mprj_io_holdover[33] , \mprj_io_holdover[32] , \mprj_io_holdover[31] , \mprj_io_holdover[30] , \mprj_io_holdover[29] , \mprj_io_holdover[28] , \mprj_io_holdover[27] , \mprj_io_holdover[26] , \mprj_io_holdover[25] , \mprj_io_holdover[24] , \mprj_io_holdover[23] , \mprj_io_holdover[22] , \mprj_io_holdover[21] , \mprj_io_holdover[20] , \mprj_io_holdover[19] , \mprj_io_holdover[18] , \mprj_io_holdover[17] , \mprj_io_holdover[16] , \mprj_io_holdover[15] , \mprj_io_holdover[14] , \mprj_io_holdover[13] , \mprj_io_holdover[12] , \mprj_io_holdover[11] , \mprj_io_holdover[10] , \mprj_io_holdover[9] , \mprj_io_holdover[8] , \mprj_io_holdover[7] , \mprj_io_holdover[6] , \mprj_io_holdover[5] , \mprj_io_holdover[4] , \mprj_io_holdover[3] , \mprj_io_holdover[2] , \mprj_io_holdover[1] , \mprj_io_holdover[0]  }),
+    .mprj_io_ib_mode_sel({ \mprj_io_ib_mode_sel[37] , \mprj_io_ib_mode_sel[36] , \mprj_io_ib_mode_sel[35] , \mprj_io_ib_mode_sel[34] , \mprj_io_ib_mode_sel[33] , \mprj_io_ib_mode_sel[32] , \mprj_io_ib_mode_sel[31] , \mprj_io_ib_mode_sel[30] , \mprj_io_ib_mode_sel[29] , \mprj_io_ib_mode_sel[28] , \mprj_io_ib_mode_sel[27] , \mprj_io_ib_mode_sel[26] , \mprj_io_ib_mode_sel[25] , \mprj_io_ib_mode_sel[24] , \mprj_io_ib_mode_sel[23] , \mprj_io_ib_mode_sel[22] , \mprj_io_ib_mode_sel[21] , \mprj_io_ib_mode_sel[20] , \mprj_io_ib_mode_sel[19] , \mprj_io_ib_mode_sel[18] , \mprj_io_ib_mode_sel[17] , \mprj_io_ib_mode_sel[16] , \mprj_io_ib_mode_sel[15] , \mprj_io_ib_mode_sel[14] , \mprj_io_ib_mode_sel[13] , \mprj_io_ib_mode_sel[12] , \mprj_io_ib_mode_sel[11] , \mprj_io_ib_mode_sel[10] , \mprj_io_ib_mode_sel[9] , \mprj_io_ib_mode_sel[8] , \mprj_io_ib_mode_sel[7] , \mprj_io_ib_mode_sel[6] , \mprj_io_ib_mode_sel[5] , \mprj_io_ib_mode_sel[4] , \mprj_io_ib_mode_sel[3] , \mprj_io_ib_mode_sel[2] , \mprj_io_ib_mode_sel[1] , \mprj_io_ib_mode_sel[0]  }),
+    .mprj_io_in({ \mprj_io_in[37] , \mprj_io_in[36] , \mprj_io_in[35] , \mprj_io_in[34] , \mprj_io_in[33] , \mprj_io_in[32] , \mprj_io_in[31] , \mprj_io_in[30] , \mprj_io_in[29] , \mprj_io_in[28] , \mprj_io_in[27] , \mprj_io_in[26] , \mprj_io_in[25] , \mprj_io_in[24] , \mprj_io_in[23] , \mprj_io_in[22] , \mprj_io_in[21] , \mprj_io_in[20] , \mprj_io_in[19] , \mprj_io_in[18] , \mprj_io_in[17] , \mprj_io_in[16] , \mprj_io_in[15] , \mprj_io_in[14] , \mprj_io_in[13] , \mprj_io_in[12] , \mprj_io_in[11] , \mprj_io_in[10] , \mprj_io_in[9] , \mprj_io_in[8] , \mprj_io_in[7] , \mprj_io_in[6] , \mprj_io_in[5] , \mprj_io_in[4] , \mprj_io_in[3] , \mprj_io_in[2] , \mprj_io_in[1] , \mprj_io_in[0]  }),
+    .mprj_io_inp_dis({ \mprj_io_inp_dis[37] , \mprj_io_inp_dis[36] , \mprj_io_inp_dis[35] , \mprj_io_inp_dis[34] , \mprj_io_inp_dis[33] , \mprj_io_inp_dis[32] , \mprj_io_inp_dis[31] , \mprj_io_inp_dis[30] , \mprj_io_inp_dis[29] , \mprj_io_inp_dis[28] , \mprj_io_inp_dis[27] , \mprj_io_inp_dis[26] , \mprj_io_inp_dis[25] , \mprj_io_inp_dis[24] , \mprj_io_inp_dis[23] , \mprj_io_inp_dis[22] , \mprj_io_inp_dis[21] , \mprj_io_inp_dis[20] , \mprj_io_inp_dis[19] , \mprj_io_inp_dis[18] , \mprj_io_inp_dis[17] , \mprj_io_inp_dis[16] , \mprj_io_inp_dis[15] , \mprj_io_inp_dis[14] , \mprj_io_inp_dis[13] , \mprj_io_inp_dis[12] , \mprj_io_inp_dis[11] , \mprj_io_inp_dis[10] , \mprj_io_inp_dis[9] , \mprj_io_inp_dis[8] , \mprj_io_inp_dis[7] , \mprj_io_inp_dis[6] , \mprj_io_inp_dis[5] , \mprj_io_inp_dis[4] , \mprj_io_inp_dis[3] , \mprj_io_inp_dis[2] , \mprj_io_inp_dis[1] , \mprj_io_inp_dis[0]  }),
+    .mprj_io_oeb({ \mprj_io_oeb[37] , \mprj_io_oeb[36] , \mprj_io_oeb[35] , \mprj_io_oeb[34] , \mprj_io_oeb[33] , \mprj_io_oeb[32] , \mprj_io_oeb[31] , \mprj_io_oeb[30] , \mprj_io_oeb[29] , \mprj_io_oeb[28] , \mprj_io_oeb[27] , \mprj_io_oeb[26] , \mprj_io_oeb[25] , \mprj_io_oeb[24] , \mprj_io_oeb[23] , \mprj_io_oeb[22] , \mprj_io_oeb[21] , \mprj_io_oeb[20] , \mprj_io_oeb[19] , \mprj_io_oeb[18] , \mprj_io_oeb[17] , \mprj_io_oeb[16] , \mprj_io_oeb[15] , \mprj_io_oeb[14] , \mprj_io_oeb[13] , \mprj_io_oeb[12] , \mprj_io_oeb[11] , \mprj_io_oeb[10] , \mprj_io_oeb[9] , \mprj_io_oeb[8] , \mprj_io_oeb[7] , \mprj_io_oeb[6] , \mprj_io_oeb[5] , \mprj_io_oeb[4] , \mprj_io_oeb[3] , \mprj_io_oeb[2] , \mprj_io_oeb[1] , \mprj_io_oeb[0]  }),
+    .mprj_io_one({ \mprj_io_one[37] , \mprj_io_one[36] , \mprj_io_one[35] , \mprj_io_one[34] , \mprj_io_one[33] , \mprj_io_one[32] , \mprj_io_one[31] , \mprj_io_one[30] , \mprj_io_one[29] , \mprj_io_one[28] , \mprj_io_one[27] , \mprj_io_one[26] , \mprj_io_one[25] , \mprj_io_one[24] , \mprj_io_one[23] , \mprj_io_one[22] , \mprj_io_one[21] , \mprj_io_one[20] , \mprj_io_one[19] , \mprj_io_one[18] , \mprj_io_one[17] , \mprj_io_one[16] , \mprj_io_one[15] , \mprj_io_one[14] , \mprj_io_one[13] , \mprj_io_one[12] , \mprj_io_one[11] , \mprj_io_one[10] , \mprj_io_one[9] , \mprj_io_one[8] , \mprj_io_one[7] , \mprj_io_one[6] , \mprj_io_one[5] , \mprj_io_one[4] , \mprj_io_one[3] , \mprj_io_one[2] , \mprj_io_one[1] , \mprj_io_one[0]  }),
+    .mprj_io_out({ \mprj_io_out[37] , \mprj_io_out[36] , \mprj_io_out[35] , \mprj_io_out[34] , \mprj_io_out[33] , \mprj_io_out[32] , \mprj_io_out[31] , \mprj_io_out[30] , \mprj_io_out[29] , \mprj_io_out[28] , \mprj_io_out[27] , \mprj_io_out[26] , \mprj_io_out[25] , \mprj_io_out[24] , \mprj_io_out[23] , \mprj_io_out[22] , \mprj_io_out[21] , \mprj_io_out[20] , \mprj_io_out[19] , \mprj_io_out[18] , \mprj_io_out[17] , \mprj_io_out[16] , \mprj_io_out[15] , \mprj_io_out[14] , \mprj_io_out[13] , \mprj_io_out[12] , \mprj_io_out[11] , \mprj_io_out[10] , \mprj_io_out[9] , \mprj_io_out[8] , \mprj_io_out[7] , \mprj_io_out[6] , \mprj_io_out[5] , \mprj_io_out[4] , \mprj_io_out[3] , \mprj_io_out[2] , \mprj_io_out[1] , \mprj_io_out[0]  }),
+    .mprj_io_slow_sel({ \mprj_io_slow_sel[37] , \mprj_io_slow_sel[36] , \mprj_io_slow_sel[35] , \mprj_io_slow_sel[34] , \mprj_io_slow_sel[33] , \mprj_io_slow_sel[32] , \mprj_io_slow_sel[31] , \mprj_io_slow_sel[30] , \mprj_io_slow_sel[29] , \mprj_io_slow_sel[28] , \mprj_io_slow_sel[27] , \mprj_io_slow_sel[26] , \mprj_io_slow_sel[25] , \mprj_io_slow_sel[24] , \mprj_io_slow_sel[23] , \mprj_io_slow_sel[22] , \mprj_io_slow_sel[21] , \mprj_io_slow_sel[20] , \mprj_io_slow_sel[19] , \mprj_io_slow_sel[18] , \mprj_io_slow_sel[17] , \mprj_io_slow_sel[16] , \mprj_io_slow_sel[15] , \mprj_io_slow_sel[14] , \mprj_io_slow_sel[13] , \mprj_io_slow_sel[12] , \mprj_io_slow_sel[11] , \mprj_io_slow_sel[10] , \mprj_io_slow_sel[9] , \mprj_io_slow_sel[8] , \mprj_io_slow_sel[7] , \mprj_io_slow_sel[6] , \mprj_io_slow_sel[5] , \mprj_io_slow_sel[4] , \mprj_io_slow_sel[3] , \mprj_io_slow_sel[2] , \mprj_io_slow_sel[1] , \mprj_io_slow_sel[0]  }),
+    .mprj_io_vtrip_sel({ \mprj_io_vtrip_sel[37] , \mprj_io_vtrip_sel[36] , \mprj_io_vtrip_sel[35] , \mprj_io_vtrip_sel[34] , \mprj_io_vtrip_sel[33] , \mprj_io_vtrip_sel[32] , \mprj_io_vtrip_sel[31] , \mprj_io_vtrip_sel[30] , \mprj_io_vtrip_sel[29] , \mprj_io_vtrip_sel[28] , \mprj_io_vtrip_sel[27] , \mprj_io_vtrip_sel[26] , \mprj_io_vtrip_sel[25] , \mprj_io_vtrip_sel[24] , \mprj_io_vtrip_sel[23] , \mprj_io_vtrip_sel[22] , \mprj_io_vtrip_sel[21] , \mprj_io_vtrip_sel[20] , \mprj_io_vtrip_sel[19] , \mprj_io_vtrip_sel[18] , \mprj_io_vtrip_sel[17] , \mprj_io_vtrip_sel[16] , \mprj_io_vtrip_sel[15] , \mprj_io_vtrip_sel[14] , \mprj_io_vtrip_sel[13] , \mprj_io_vtrip_sel[12] , \mprj_io_vtrip_sel[11] , \mprj_io_vtrip_sel[10] , \mprj_io_vtrip_sel[9] , \mprj_io_vtrip_sel[8] , \mprj_io_vtrip_sel[7] , \mprj_io_vtrip_sel[6] , \mprj_io_vtrip_sel[5] , \mprj_io_vtrip_sel[4] , \mprj_io_vtrip_sel[3] , \mprj_io_vtrip_sel[2] , \mprj_io_vtrip_sel[1] , \mprj_io_vtrip_sel[0]  }),
+    .por(por_l_buf),
+    .porb_h(porb_h),
+    .resetb(resetb),
+    .resetb_core_h(rstb_h),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vccd1_pad(vccd1),
+    .vccd2(vccd2_core),
+    .vccd2_pad(vccd2),
+    .vccd_pad(vccd),
+    .vdda(vdda_core),
+    .vdda1(vdda1_core),
+    .vdda1_pad(vdda1),
+    .vdda1_pad2(vdda1_2),
+    .vdda2(vdda2_core),
+    .vdda2_pad(vdda2),
+    .vdda_pad(vdda),
+    .vddio(vddio_core),
+    .vddio_pad(vddio),
+    .vddio_pad2(vddio_2),
+    .vssa(vssa_core),
+    .vssa1(vssa1_core),
+    .vssa1_pad(vssa1),
+    .vssa1_pad2(vssa1_2),
+    .vssa2(vssa2_core),
+    .vssa2_pad(vssa2),
+    .vssa_pad(vssa),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .vssd1_pad(vssd1),
+    .vssd2(vssd2_core),
+    .vssd2_pad(vssd2),
+    .vssd_pad(vssd),
+    .vssio(vssio_core),
+    .vssio_pad(vssio),
+    .vssio_pad2(vssio_2)
+  );
+  digital_pll pll (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .clockp({ pll_clk, pll_clk90 }),
+    .dco(spi_pll_dco_ena),
+    .div({ \spi_pll_div[4] , \spi_pll_div[3] , \spi_pll_div[2] , \spi_pll_div[1] , \spi_pll_div[0]  }),
+    .enable(spi_pll_ena),
+    .ext_trim({ \spi_pll_trim[25] , \spi_pll_trim[24] , \spi_pll_trim[23] , \spi_pll_trim[22] , \spi_pll_trim[21] , \spi_pll_trim[20] , \spi_pll_trim[19] , \spi_pll_trim[18] , \spi_pll_trim[17] , \spi_pll_trim[16] , \spi_pll_trim[15] , \spi_pll_trim[14] , \spi_pll_trim[13] , \spi_pll_trim[12] , \spi_pll_trim[11] , \spi_pll_trim[10] , \spi_pll_trim[9] , \spi_pll_trim[8] , \spi_pll_trim[7] , \spi_pll_trim[6] , \spi_pll_trim[5] , \spi_pll_trim[4] , \spi_pll_trim[3] , \spi_pll_trim[2] , \spi_pll_trim[1] , \spi_pll_trim[0]  }),
+    .osc(clock_core_buf),
+    .resetb(rstb_l_buf)
+  );
+  simple_por por (
+    .por_l(por_l),
+    .porb_h(porb_h),
+    .porb_l(porb_l),
+    .vdd1v8(vccd_core),
+    .vdd3v3(vddio_core),
+    .vss1v8(vssd_core),
+    .vss3v3(vssio_core)
+  );
+  xres_buf rstb_level (
+    .A(rstb_h),
+    .LVGND(vssd_core),
+    .LVPWR(vccd_core),
+    .VGND(vssio_core),
+    .VPWR(vddio_core),
+    .X(rstb_l)
+  );
+  gpio_signal_buffering sigbuf (
+    .mgmt_io_in_buf({ \mgmt_io_in_hk[37] , \mgmt_io_in_hk[36] , \mgmt_io_in_hk[35] , \mgmt_io_in_hk[34] , \mgmt_io_in_hk[33] , \mgmt_io_in_hk[32] , \mgmt_io_in_hk[31] , \mgmt_io_in_hk[30] , \mgmt_io_in_hk[29] , \mgmt_io_in_hk[28] , \mgmt_io_in_hk[27] , \mgmt_io_in_hk[26] , \mgmt_io_in_hk[25] , \mgmt_io_in_hk[24] , \mgmt_io_in_hk[23] , \mgmt_io_in_hk[22] , \mgmt_io_in_hk[21] , \mgmt_io_in_hk[20] , \mgmt_io_in_hk[19] , \mgmt_io_in_hk[18] , \mgmt_io_in_hk[17] , \mgmt_io_in_hk[16] , \mgmt_io_in_hk[15] , \mgmt_io_in_hk[14] , \mgmt_io_in_hk[13] , \mgmt_io_in_hk[12] , \mgmt_io_in_hk[11] , \mgmt_io_in_hk[10] , \mgmt_io_in_hk[9] , \mgmt_io_in_hk[8] , \mgmt_io_in_hk[7]  }),
+    .mgmt_io_in_unbuf({ \mgmt_io_in[37] , \mgmt_io_in[36] , \mgmt_io_in[35] , \mgmt_io_in[34] , \mgmt_io_in[33] , \mgmt_io_in[32] , \mgmt_io_in[31] , \mgmt_io_in[30] , \mgmt_io_in[29] , \mgmt_io_in[28] , \mgmt_io_in[27] , \mgmt_io_in[26] , \mgmt_io_in[25] , \mgmt_io_in[24] , \mgmt_io_in[23] , \mgmt_io_in[22] , \mgmt_io_in[21] , \mgmt_io_in[20] , \mgmt_io_in[19] , \mgmt_io_in[18] , \mgmt_io_in[17] , \mgmt_io_in[16] , \mgmt_io_in[15] , \mgmt_io_in[14] , \mgmt_io_in[13] , \mgmt_io_in[12] , \mgmt_io_in[11] , \mgmt_io_in[10] , \mgmt_io_in[9] , \mgmt_io_in[8] , \mgmt_io_in[7]  }),
+    .mgmt_io_oeb_buf({ \mgmt_io_oeb[37] , \mgmt_io_oeb[36] , \mgmt_io_oeb[35]  }),
+    .mgmt_io_oeb_unbuf({ \mgmt_io_oeb_hk[37] , \mgmt_io_oeb_hk[36] , \mgmt_io_oeb_hk[35]  }),
+    .mgmt_io_out_buf({ \mgmt_io_out[37] , \mgmt_io_out[36] , \mgmt_io_out[35] , \mgmt_io_out[34] , \mgmt_io_out[33] , \mgmt_io_out[32] , \mgmt_io_out[31] , \mgmt_io_out[30] , \mgmt_io_out[29] , \mgmt_io_out[28] , \mgmt_io_out[27] , \mgmt_io_out[26] , \mgmt_io_out[25] , \mgmt_io_out[24] , \mgmt_io_out[23] , \mgmt_io_out[22] , \mgmt_io_out[21] , \mgmt_io_out[20] , \mgmt_io_out[19] , \mgmt_io_out[18] , \mgmt_io_out[17] , \mgmt_io_out[16] , \mgmt_io_out[15] , \mgmt_io_out[14] , \mgmt_io_out[13] , \mgmt_io_out[12] , \mgmt_io_out[11] , \mgmt_io_out[10] , \mgmt_io_out[9] , \mgmt_io_out[8] , \mgmt_io_out[7]  }),
+    .mgmt_io_out_unbuf({ \mgmt_io_out_hk[37] , \mgmt_io_out_hk[36] , \mgmt_io_out_hk[35] , \mgmt_io_out_hk[34] , \mgmt_io_out_hk[33] , \mgmt_io_out_hk[32] , \mgmt_io_out_hk[31] , \mgmt_io_out_hk[30] , \mgmt_io_out_hk[29] , \mgmt_io_out_hk[28] , \mgmt_io_out_hk[27] , \mgmt_io_out_hk[26] , \mgmt_io_out_hk[25] , \mgmt_io_out_hk[24] , \mgmt_io_out_hk[23] , \mgmt_io_out_hk[22] , \mgmt_io_out_hk[21] , \mgmt_io_out_hk[20] , \mgmt_io_out_hk[19] , \mgmt_io_out_hk[18] , \mgmt_io_out_hk[17] , \mgmt_io_out_hk[16] , \mgmt_io_out_hk[15] , \mgmt_io_out_hk[14] , \mgmt_io_out_hk[13] , \mgmt_io_out_hk[12] , \mgmt_io_out_hk[11] , \mgmt_io_out_hk[10] , \mgmt_io_out_hk[9] , \mgmt_io_out_hk[8] , \mgmt_io_out_hk[7]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  mgmt_core_wrapper soc (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .clk_in(caravel_clk_buf),
+    .clk_out(clk_passthru),
+    .core_clk(caravel_clk_buf),
+    .core_rstn(caravel_rstn_buf),
+    .debug_in(debug_in),
+    .debug_mode(debug_mode),
+    .debug_oeb(debug_oeb),
+    .debug_out(debug_out),
+    .flash_clk(flash_clk_core),
+    .flash_csb(flash_csb_core),
+    .flash_io0_di(flash_io0_di_core),
+    .flash_io0_do(flash_io0_do_core),
+    .flash_io0_oeb(flash_io0_oeb_core),
+    .flash_io1_di(flash_io1_di_core),
+    .flash_io1_do(flash_io1_do_core),
+    .flash_io1_oeb(flash_io1_oeb_core),
+    .flash_io2_di(flash_io2_di_core),
+    .flash_io2_do(flash_io2_do_core),
+    .flash_io2_oeb(flash_io2_oeb_core),
+    .flash_io3_di(flash_io3_di_core),
+    .flash_io3_do(flash_io3_do_core),
+    .flash_io3_oeb(flash_io3_oeb_core),
+    .gpio_in_pad(gpio_in_core),
+    .gpio_inenb_pad(gpio_inenb_core),
+    .gpio_mode0_pad(gpio_mode0_core),
+    .gpio_mode1_pad(gpio_mode1_core),
+    .gpio_out_pad(gpio_out_core),
+    .gpio_outenb_pad(gpio_outenb_core),
+    .hk_ack_i(hk_ack_i),
+    .hk_cyc_o(hk_cyc_o),
+    .hk_dat_i({ \hk_dat_i[31] , \hk_dat_i[30] , \hk_dat_i[29] , \hk_dat_i[28] , \hk_dat_i[27] , \hk_dat_i[26] , \hk_dat_i[25] , \hk_dat_i[24] , \hk_dat_i[23] , \hk_dat_i[22] , \hk_dat_i[21] , \hk_dat_i[20] , \hk_dat_i[19] , \hk_dat_i[18] , \hk_dat_i[17] , \hk_dat_i[16] , \hk_dat_i[15] , \hk_dat_i[14] , \hk_dat_i[13] , \hk_dat_i[12] , \hk_dat_i[11] , \hk_dat_i[10] , \hk_dat_i[9] , \hk_dat_i[8] , \hk_dat_i[7] , \hk_dat_i[6] , \hk_dat_i[5] , \hk_dat_i[4] , \hk_dat_i[3] , \hk_dat_i[2] , \hk_dat_i[1] , \hk_dat_i[0]  }),
+    .hk_stb_o(hk_stb_o),
+    .irq({ \irq_spi[2] , \irq_spi[1] , \irq_spi[0] , \user_irq[2] , \user_irq[1] , \user_irq[0]  }),
+    .la_iena({ \la_iena_mprj[127] , \la_iena_mprj[126] , \la_iena_mprj[125] , \la_iena_mprj[124] , \la_iena_mprj[123] , \la_iena_mprj[122] , \la_iena_mprj[121] , \la_iena_mprj[120] , \la_iena_mprj[119] , \la_iena_mprj[118] , \la_iena_mprj[117] , \la_iena_mprj[116] , \la_iena_mprj[115] , \la_iena_mprj[114] , \la_iena_mprj[113] , \la_iena_mprj[112] , \la_iena_mprj[111] , \la_iena_mprj[110] , \la_iena_mprj[109] , \la_iena_mprj[108] , \la_iena_mprj[107] , \la_iena_mprj[106] , \la_iena_mprj[105] , \la_iena_mprj[104] , \la_iena_mprj[103] , \la_iena_mprj[102] , \la_iena_mprj[101] , \la_iena_mprj[100] , \la_iena_mprj[99] , \la_iena_mprj[98] , \la_iena_mprj[97] , \la_iena_mprj[96] , \la_iena_mprj[95] , \la_iena_mprj[94] , \la_iena_mprj[93] , \la_iena_mprj[92] , \la_iena_mprj[91] , \la_iena_mprj[90] , \la_iena_mprj[89] , \la_iena_mprj[88] , \la_iena_mprj[87] , \la_iena_mprj[86] , \la_iena_mprj[85] , \la_iena_mprj[84] , \la_iena_mprj[83] , \la_iena_mprj[82] , \la_iena_mprj[81] , \la_iena_mprj[80] , \la_iena_mprj[79] , \la_iena_mprj[78] , \la_iena_mprj[77] , \la_iena_mprj[76] , \la_iena_mprj[75] , \la_iena_mprj[74] , \la_iena_mprj[73] , \la_iena_mprj[72] , \la_iena_mprj[71] , \la_iena_mprj[70] , \la_iena_mprj[69] , \la_iena_mprj[68] , \la_iena_mprj[67] , \la_iena_mprj[66] , \la_iena_mprj[65] , \la_iena_mprj[64] , \la_iena_mprj[63] , \la_iena_mprj[62] , \la_iena_mprj[61] , \la_iena_mprj[60] , \la_iena_mprj[59] , \la_iena_mprj[58] , \la_iena_mprj[57] , \la_iena_mprj[56] , \la_iena_mprj[55] , \la_iena_mprj[54] , \la_iena_mprj[53] , \la_iena_mprj[52] , \la_iena_mprj[51] , \la_iena_mprj[50] , \la_iena_mprj[49] , \la_iena_mprj[48] , \la_iena_mprj[47] , \la_iena_mprj[46] , \la_iena_mprj[45] , \la_iena_mprj[44] , \la_iena_mprj[43] , \la_iena_mprj[42] , \la_iena_mprj[41] , \la_iena_mprj[40] , \la_iena_mprj[39] , \la_iena_mprj[38] , \la_iena_mprj[37] , \la_iena_mprj[36] , \la_iena_mprj[35] , \la_iena_mprj[34] , \la_iena_mprj[33] , \la_iena_mprj[32] , \la_iena_mprj[31] , \la_iena_mprj[30] , \la_iena_mprj[29] , \la_iena_mprj[28] , \la_iena_mprj[27] , \la_iena_mprj[26] , \la_iena_mprj[25] , \la_iena_mprj[24] , \la_iena_mprj[23] , \la_iena_mprj[22] , \la_iena_mprj[21] , \la_iena_mprj[20] , \la_iena_mprj[19] , \la_iena_mprj[18] , \la_iena_mprj[17] , \la_iena_mprj[16] , \la_iena_mprj[15] , \la_iena_mprj[14] , \la_iena_mprj[13] , \la_iena_mprj[12] , \la_iena_mprj[11] , \la_iena_mprj[10] , \la_iena_mprj[9] , \la_iena_mprj[8] , \la_iena_mprj[7] , \la_iena_mprj[6] , \la_iena_mprj[5] , \la_iena_mprj[4] , \la_iena_mprj[3] , \la_iena_mprj[2] , \la_iena_mprj[1] , \la_iena_mprj[0]  }),
+    .la_input({ \la_data_in_mprj[127] , \la_data_in_mprj[126] , \la_data_in_mprj[125] , \la_data_in_mprj[124] , \la_data_in_mprj[123] , \la_data_in_mprj[122] , \la_data_in_mprj[121] , \la_data_in_mprj[120] , \la_data_in_mprj[119] , \la_data_in_mprj[118] , \la_data_in_mprj[117] , \la_data_in_mprj[116] , \la_data_in_mprj[115] , \la_data_in_mprj[114] , \la_data_in_mprj[113] , \la_data_in_mprj[112] , \la_data_in_mprj[111] , \la_data_in_mprj[110] , \la_data_in_mprj[109] , \la_data_in_mprj[108] , \la_data_in_mprj[107] , \la_data_in_mprj[106] , \la_data_in_mprj[105] , \la_data_in_mprj[104] , \la_data_in_mprj[103] , \la_data_in_mprj[102] , \la_data_in_mprj[101] , \la_data_in_mprj[100] , \la_data_in_mprj[99] , \la_data_in_mprj[98] , \la_data_in_mprj[97] , \la_data_in_mprj[96] , \la_data_in_mprj[95] , \la_data_in_mprj[94] , \la_data_in_mprj[93] , \la_data_in_mprj[92] , \la_data_in_mprj[91] , \la_data_in_mprj[90] , \la_data_in_mprj[89] , \la_data_in_mprj[88] , \la_data_in_mprj[87] , \la_data_in_mprj[86] , \la_data_in_mprj[85] , \la_data_in_mprj[84] , \la_data_in_mprj[83] , \la_data_in_mprj[82] , \la_data_in_mprj[81] , \la_data_in_mprj[80] , \la_data_in_mprj[79] , \la_data_in_mprj[78] , \la_data_in_mprj[77] , \la_data_in_mprj[76] , \la_data_in_mprj[75] , \la_data_in_mprj[74] , \la_data_in_mprj[73] , \la_data_in_mprj[72] , \la_data_in_mprj[71] , \la_data_in_mprj[70] , \la_data_in_mprj[69] , \la_data_in_mprj[68] , \la_data_in_mprj[67] , \la_data_in_mprj[66] , \la_data_in_mprj[65] , \la_data_in_mprj[64] , \la_data_in_mprj[63] , \la_data_in_mprj[62] , \la_data_in_mprj[61] , \la_data_in_mprj[60] , \la_data_in_mprj[59] , \la_data_in_mprj[58] , \la_data_in_mprj[57] , \la_data_in_mprj[56] , \la_data_in_mprj[55] , \la_data_in_mprj[54] , \la_data_in_mprj[53] , \la_data_in_mprj[52] , \la_data_in_mprj[51] , \la_data_in_mprj[50] , \la_data_in_mprj[49] , \la_data_in_mprj[48] , \la_data_in_mprj[47] , \la_data_in_mprj[46] , \la_data_in_mprj[45] , \la_data_in_mprj[44] , \la_data_in_mprj[43] , \la_data_in_mprj[42] , \la_data_in_mprj[41] , \la_data_in_mprj[40] , \la_data_in_mprj[39] , \la_data_in_mprj[38] , \la_data_in_mprj[37] , \la_data_in_mprj[36] , \la_data_in_mprj[35] , \la_data_in_mprj[34] , \la_data_in_mprj[33] , \la_data_in_mprj[32] , \la_data_in_mprj[31] , \la_data_in_mprj[30] , \la_data_in_mprj[29] , \la_data_in_mprj[28] , \la_data_in_mprj[27] , \la_data_in_mprj[26] , \la_data_in_mprj[25] , \la_data_in_mprj[24] , \la_data_in_mprj[23] , \la_data_in_mprj[22] , \la_data_in_mprj[21] , \la_data_in_mprj[20] , \la_data_in_mprj[19] , \la_data_in_mprj[18] , \la_data_in_mprj[17] , \la_data_in_mprj[16] , \la_data_in_mprj[15] , \la_data_in_mprj[14] , \la_data_in_mprj[13] , \la_data_in_mprj[12] , \la_data_in_mprj[11] , \la_data_in_mprj[10] , \la_data_in_mprj[9] , \la_data_in_mprj[8] , \la_data_in_mprj[7] , \la_data_in_mprj[6] , \la_data_in_mprj[5] , \la_data_in_mprj[4] , \la_data_in_mprj[3] , \la_data_in_mprj[2] , \la_data_in_mprj[1] , \la_data_in_mprj[0]  }),
+    .la_oenb({ \la_oenb_mprj[127] , \la_oenb_mprj[126] , \la_oenb_mprj[125] , \la_oenb_mprj[124] , \la_oenb_mprj[123] , \la_oenb_mprj[122] , \la_oenb_mprj[121] , \la_oenb_mprj[120] , \la_oenb_mprj[119] , \la_oenb_mprj[118] , \la_oenb_mprj[117] , \la_oenb_mprj[116] , \la_oenb_mprj[115] , \la_oenb_mprj[114] , \la_oenb_mprj[113] , \la_oenb_mprj[112] , \la_oenb_mprj[111] , \la_oenb_mprj[110] , \la_oenb_mprj[109] , \la_oenb_mprj[108] , \la_oenb_mprj[107] , \la_oenb_mprj[106] , \la_oenb_mprj[105] , \la_oenb_mprj[104] , \la_oenb_mprj[103] , \la_oenb_mprj[102] , \la_oenb_mprj[101] , \la_oenb_mprj[100] , \la_oenb_mprj[99] , \la_oenb_mprj[98] , \la_oenb_mprj[97] , \la_oenb_mprj[96] , \la_oenb_mprj[95] , \la_oenb_mprj[94] , \la_oenb_mprj[93] , \la_oenb_mprj[92] , \la_oenb_mprj[91] , \la_oenb_mprj[90] , \la_oenb_mprj[89] , \la_oenb_mprj[88] , \la_oenb_mprj[87] , \la_oenb_mprj[86] , \la_oenb_mprj[85] , \la_oenb_mprj[84] , \la_oenb_mprj[83] , \la_oenb_mprj[82] , \la_oenb_mprj[81] , \la_oenb_mprj[80] , \la_oenb_mprj[79] , \la_oenb_mprj[78] , \la_oenb_mprj[77] , \la_oenb_mprj[76] , \la_oenb_mprj[75] , \la_oenb_mprj[74] , \la_oenb_mprj[73] , \la_oenb_mprj[72] , \la_oenb_mprj[71] , \la_oenb_mprj[70] , \la_oenb_mprj[69] , \la_oenb_mprj[68] , \la_oenb_mprj[67] , \la_oenb_mprj[66] , \la_oenb_mprj[65] , \la_oenb_mprj[64] , \la_oenb_mprj[63] , \la_oenb_mprj[62] , \la_oenb_mprj[61] , \la_oenb_mprj[60] , \la_oenb_mprj[59] , \la_oenb_mprj[58] , \la_oenb_mprj[57] , \la_oenb_mprj[56] , \la_oenb_mprj[55] , \la_oenb_mprj[54] , \la_oenb_mprj[53] , \la_oenb_mprj[52] , \la_oenb_mprj[51] , \la_oenb_mprj[50] , \la_oenb_mprj[49] , \la_oenb_mprj[48] , \la_oenb_mprj[47] , \la_oenb_mprj[46] , \la_oenb_mprj[45] , \la_oenb_mprj[44] , \la_oenb_mprj[43] , \la_oenb_mprj[42] , \la_oenb_mprj[41] , \la_oenb_mprj[40] , \la_oenb_mprj[39] , \la_oenb_mprj[38] , \la_oenb_mprj[37] , \la_oenb_mprj[36] , \la_oenb_mprj[35] , \la_oenb_mprj[34] , \la_oenb_mprj[33] , \la_oenb_mprj[32] , \la_oenb_mprj[31] , \la_oenb_mprj[30] , \la_oenb_mprj[29] , \la_oenb_mprj[28] , \la_oenb_mprj[27] , \la_oenb_mprj[26] , \la_oenb_mprj[25] , \la_oenb_mprj[24] , \la_oenb_mprj[23] , \la_oenb_mprj[22] , \la_oenb_mprj[21] , \la_oenb_mprj[20] , \la_oenb_mprj[19] , \la_oenb_mprj[18] , \la_oenb_mprj[17] , \la_oenb_mprj[16] , \la_oenb_mprj[15] , \la_oenb_mprj[14] , \la_oenb_mprj[13] , \la_oenb_mprj[12] , \la_oenb_mprj[11] , \la_oenb_mprj[10] , \la_oenb_mprj[9] , \la_oenb_mprj[8] , \la_oenb_mprj[7] , \la_oenb_mprj[6] , \la_oenb_mprj[5] , \la_oenb_mprj[4] , \la_oenb_mprj[3] , \la_oenb_mprj[2] , \la_oenb_mprj[1] , \la_oenb_mprj[0]  }),
+    .la_output({ \la_data_out_mprj[127] , \la_data_out_mprj[126] , \la_data_out_mprj[125] , \la_data_out_mprj[124] , \la_data_out_mprj[123] , \la_data_out_mprj[122] , \la_data_out_mprj[121] , \la_data_out_mprj[120] , \la_data_out_mprj[119] , \la_data_out_mprj[118] , \la_data_out_mprj[117] , \la_data_out_mprj[116] , \la_data_out_mprj[115] , \la_data_out_mprj[114] , \la_data_out_mprj[113] , \la_data_out_mprj[112] , \la_data_out_mprj[111] , \la_data_out_mprj[110] , \la_data_out_mprj[109] , \la_data_out_mprj[108] , \la_data_out_mprj[107] , \la_data_out_mprj[106] , \la_data_out_mprj[105] , \la_data_out_mprj[104] , \la_data_out_mprj[103] , \la_data_out_mprj[102] , \la_data_out_mprj[101] , \la_data_out_mprj[100] , \la_data_out_mprj[99] , \la_data_out_mprj[98] , \la_data_out_mprj[97] , \la_data_out_mprj[96] , \la_data_out_mprj[95] , \la_data_out_mprj[94] , \la_data_out_mprj[93] , \la_data_out_mprj[92] , \la_data_out_mprj[91] , \la_data_out_mprj[90] , \la_data_out_mprj[89] , \la_data_out_mprj[88] , \la_data_out_mprj[87] , \la_data_out_mprj[86] , \la_data_out_mprj[85] , \la_data_out_mprj[84] , \la_data_out_mprj[83] , \la_data_out_mprj[82] , \la_data_out_mprj[81] , \la_data_out_mprj[80] , \la_data_out_mprj[79] , \la_data_out_mprj[78] , \la_data_out_mprj[77] , \la_data_out_mprj[76] , \la_data_out_mprj[75] , \la_data_out_mprj[74] , \la_data_out_mprj[73] , \la_data_out_mprj[72] , \la_data_out_mprj[71] , \la_data_out_mprj[70] , \la_data_out_mprj[69] , \la_data_out_mprj[68] , \la_data_out_mprj[67] , \la_data_out_mprj[66] , \la_data_out_mprj[65] , \la_data_out_mprj[64] , \la_data_out_mprj[63] , \la_data_out_mprj[62] , \la_data_out_mprj[61] , \la_data_out_mprj[60] , \la_data_out_mprj[59] , \la_data_out_mprj[58] , \la_data_out_mprj[57] , \la_data_out_mprj[56] , \la_data_out_mprj[55] , \la_data_out_mprj[54] , \la_data_out_mprj[53] , \la_data_out_mprj[52] , \la_data_out_mprj[51] , \la_data_out_mprj[50] , \la_data_out_mprj[49] , \la_data_out_mprj[48] , \la_data_out_mprj[47] , \la_data_out_mprj[46] , \la_data_out_mprj[45] , \la_data_out_mprj[44] , \la_data_out_mprj[43] , \la_data_out_mprj[42] , \la_data_out_mprj[41] , \la_data_out_mprj[40] , \la_data_out_mprj[39] , \la_data_out_mprj[38] , \la_data_out_mprj[37] , \la_data_out_mprj[36] , \la_data_out_mprj[35] , \la_data_out_mprj[34] , \la_data_out_mprj[33] , \la_data_out_mprj[32] , \la_data_out_mprj[31] , \la_data_out_mprj[30] , \la_data_out_mprj[29] , \la_data_out_mprj[28] , \la_data_out_mprj[27] , \la_data_out_mprj[26] , \la_data_out_mprj[25] , \la_data_out_mprj[24] , \la_data_out_mprj[23] , \la_data_out_mprj[22] , \la_data_out_mprj[21] , \la_data_out_mprj[20] , \la_data_out_mprj[19] , \la_data_out_mprj[18] , \la_data_out_mprj[17] , \la_data_out_mprj[16] , \la_data_out_mprj[15] , \la_data_out_mprj[14] , \la_data_out_mprj[13] , \la_data_out_mprj[12] , \la_data_out_mprj[11] , \la_data_out_mprj[10] , \la_data_out_mprj[9] , \la_data_out_mprj[8] , \la_data_out_mprj[7] , \la_data_out_mprj[6] , \la_data_out_mprj[5] , \la_data_out_mprj[4] , \la_data_out_mprj[3] , \la_data_out_mprj[2] , \la_data_out_mprj[1] , \la_data_out_mprj[0]  }),
+    .mprj_ack_i(mprj_ack_i_core),
+    .mprj_adr_o({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .mprj_cyc_o(mprj_cyc_o_core),
+    .mprj_dat_i({ \mprj_dat_i_core[31] , \mprj_dat_i_core[30] , \mprj_dat_i_core[29] , \mprj_dat_i_core[28] , \mprj_dat_i_core[27] , \mprj_dat_i_core[26] , \mprj_dat_i_core[25] , \mprj_dat_i_core[24] , \mprj_dat_i_core[23] , \mprj_dat_i_core[22] , \mprj_dat_i_core[21] , \mprj_dat_i_core[20] , \mprj_dat_i_core[19] , \mprj_dat_i_core[18] , \mprj_dat_i_core[17] , \mprj_dat_i_core[16] , \mprj_dat_i_core[15] , \mprj_dat_i_core[14] , \mprj_dat_i_core[13] , \mprj_dat_i_core[12] , \mprj_dat_i_core[11] , \mprj_dat_i_core[10] , \mprj_dat_i_core[9] , \mprj_dat_i_core[8] , \mprj_dat_i_core[7] , \mprj_dat_i_core[6] , \mprj_dat_i_core[5] , \mprj_dat_i_core[4] , \mprj_dat_i_core[3] , \mprj_dat_i_core[2] , \mprj_dat_i_core[1] , \mprj_dat_i_core[0]  }),
+    .mprj_dat_o({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .mprj_sel_o({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .mprj_stb_o(mprj_stb_o_core),
+    .mprj_wb_iena(mprj_iena_wb),
+    .mprj_we_o(mprj_we_o_core),
+    .por_l_in(por_l),
+    .por_l_out(por_l_buf),
+    .porb_h_in(por_l),
+    .porb_h_out(porb_h_out_nc),
+    .qspi_enabled(qspi_enabled),
+    .resetn_in(caravel_rstn_buf),
+    .resetn_out(resetn_passthru),
+    .rstb_l_in(rstb_l),
+    .rstb_l_out(rstb_l_buf),
+    .ser_rx(ser_rx),
+    .ser_tx(ser_tx),
+    .serial_clock_in(\gpio_clock_1_shifted[0] ),
+    .serial_clock_out(\gpio_clock_2_shifted[18] ),
+    .serial_data_2_in(mprj_io_loader_data_2),
+    .serial_data_2_out(\gpio_serial_link_2_shifted[18] ),
+    .serial_load_in(\gpio_load_1_shifted[0] ),
+    .serial_load_out(\gpio_load_2_shifted[18] ),
+    .serial_resetn_in(\gpio_resetn_1_shifted[0] ),
+    .serial_resetn_out(\gpio_resetn_2_shifted[18] ),
+    .spi_csb(spi_csb),
+    .spi_enabled(spi_enabled),
+    .spi_sck(spi_sck),
+    .spi_sdi(spi_sdi),
+    .spi_sdo(spi_sdo),
+    .spi_sdoenb(spi_sdoenb),
+    .trap(trap),
+    .uart_enabled(uart_enabled),
+    .user_irq_ena({ \user_irq_ena[2] , \user_irq_ena[1] , \user_irq_ena[0]  })
+  );
+  spare_logic_block \spare_logic[0]  (
+    .spare_xfq({ \spare_xfq_nc[1] , \spare_xfq_nc[0]  }),
+    .spare_xfqn({ \spare_xfqn_nc[1] , \spare_xfqn_nc[0]  }),
+    .spare_xi({ \spare_xi_nc[3] , \spare_xi_nc[2] , \spare_xi_nc[1] , \spare_xi_nc[0]  }),
+    .spare_xib(\spare_xib_nc[0] ),
+    .spare_xmx({ \spare_xmx_nc[1] , \spare_xmx_nc[0]  }),
+    .spare_xna({ \spare_xna_nc[1] , \spare_xna_nc[0]  }),
+    .spare_xno({ \spare_xno_nc[1] , \spare_xno_nc[0]  }),
+    .spare_xz({ \spare_xz_nc[26] , \spare_xz_nc[25] , \spare_xz_nc[24] , \spare_xz_nc[23] , \spare_xz_nc[22] , \spare_xz_nc[21] , \spare_xz_nc[20] , \spare_xz_nc[19] , \spare_xz_nc[18] , \spare_xz_nc[17] , \spare_xz_nc[16] , \spare_xz_nc[15] , \spare_xz_nc[14] , \spare_xz_nc[13] , \spare_xz_nc[12] , \spare_xz_nc[11] , \spare_xz_nc[10] , \spare_xz_nc[9] , \spare_xz_nc[8] , \spare_xz_nc[7] , \spare_xz_nc[6] , \spare_xz_nc[5] , \spare_xz_nc[4] , \spare_xz_nc[3] , \spare_xz_nc[2] , \spare_xz_nc[1] , \spare_xz_nc[0]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[1]  (
+    .spare_xfq({ \spare_xfq_nc[3] , \spare_xfq_nc[2]  }),
+    .spare_xfqn({ \spare_xfqn_nc[3] , \spare_xfqn_nc[2]  }),
+    .spare_xi({ \spare_xi_nc[7] , \spare_xi_nc[6] , \spare_xi_nc[5] , \spare_xi_nc[4]  }),
+    .spare_xib(\spare_xib_nc[1] ),
+    .spare_xmx({ \spare_xmx_nc[3] , \spare_xmx_nc[2]  }),
+    .spare_xna({ \spare_xna_nc[3] , \spare_xna_nc[2]  }),
+    .spare_xno({ \spare_xno_nc[3] , \spare_xno_nc[2]  }),
+    .spare_xz({ \spare_xz_nc[53] , \spare_xz_nc[52] , \spare_xz_nc[51] , \spare_xz_nc[50] , \spare_xz_nc[49] , \spare_xz_nc[48] , \spare_xz_nc[47] , \spare_xz_nc[46] , \spare_xz_nc[45] , \spare_xz_nc[44] , \spare_xz_nc[43] , \spare_xz_nc[42] , \spare_xz_nc[41] , \spare_xz_nc[40] , \spare_xz_nc[39] , \spare_xz_nc[38] , \spare_xz_nc[37] , \spare_xz_nc[36] , \spare_xz_nc[35] , \spare_xz_nc[34] , \spare_xz_nc[33] , \spare_xz_nc[32] , \spare_xz_nc[31] , \spare_xz_nc[30] , \spare_xz_nc[29] , \spare_xz_nc[28] , \spare_xz_nc[27]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[2]  (
+    .spare_xfq({ \spare_xfq_nc[5] , \spare_xfq_nc[4]  }),
+    .spare_xfqn({ \spare_xfqn_nc[5] , \spare_xfqn_nc[4]  }),
+    .spare_xi({ \spare_xi_nc[11] , \spare_xi_nc[10] , \spare_xi_nc[9] , \spare_xi_nc[8]  }),
+    .spare_xib(\spare_xib_nc[2] ),
+    .spare_xmx({ \spare_xmx_nc[5] , \spare_xmx_nc[4]  }),
+    .spare_xna({ \spare_xna_nc[5] , \spare_xna_nc[4]  }),
+    .spare_xno({ \spare_xno_nc[5] , \spare_xno_nc[4]  }),
+    .spare_xz({ \spare_xz_nc[80] , \spare_xz_nc[79] , \spare_xz_nc[78] , \spare_xz_nc[77] , \spare_xz_nc[76] , \spare_xz_nc[75] , \spare_xz_nc[74] , \spare_xz_nc[73] , \spare_xz_nc[72] , \spare_xz_nc[71] , \spare_xz_nc[70] , \spare_xz_nc[69] , \spare_xz_nc[68] , \spare_xz_nc[67] , \spare_xz_nc[66] , \spare_xz_nc[65] , \spare_xz_nc[64] , \spare_xz_nc[63] , \spare_xz_nc[62] , \spare_xz_nc[61] , \spare_xz_nc[60] , \spare_xz_nc[59] , \spare_xz_nc[58] , \spare_xz_nc[57] , \spare_xz_nc[56] , \spare_xz_nc[55] , \spare_xz_nc[54]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[3]  (
+    .spare_xfq({ \spare_xfq_nc[7] , \spare_xfq_nc[6]  }),
+    .spare_xfqn({ \spare_xfqn_nc[7] , \spare_xfqn_nc[6]  }),
+    .spare_xi({ \spare_xi_nc[15] , \spare_xi_nc[14] , \spare_xi_nc[13] , \spare_xi_nc[12]  }),
+    .spare_xib(\spare_xib_nc[3] ),
+    .spare_xmx({ \spare_xmx_nc[7] , \spare_xmx_nc[6]  }),
+    .spare_xna({ \spare_xna_nc[7] , \spare_xna_nc[6]  }),
+    .spare_xno({ \spare_xno_nc[7] , \spare_xno_nc[6]  }),
+    .spare_xz({ \spare_xz_nc[107] , \spare_xz_nc[106] , \spare_xz_nc[105] , \spare_xz_nc[104] , \spare_xz_nc[103] , \spare_xz_nc[102] , \spare_xz_nc[101] , \spare_xz_nc[100] , \spare_xz_nc[99] , \spare_xz_nc[98] , \spare_xz_nc[97] , \spare_xz_nc[96] , \spare_xz_nc[95] , \spare_xz_nc[94] , \spare_xz_nc[93] , \spare_xz_nc[92] , \spare_xz_nc[91] , \spare_xz_nc[90] , \spare_xz_nc[89] , \spare_xz_nc[88] , \spare_xz_nc[87] , \spare_xz_nc[86] , \spare_xz_nc[85] , \spare_xz_nc[84] , \spare_xz_nc[83] , \spare_xz_nc[82] , \spare_xz_nc[81]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  user_id_programming user_id_value (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0]  })
+  );
+  assign \gpio_serial_link_1_shifted[18]  = \gpio_serial_link_1[17] ;
+  assign \gpio_serial_link_1_shifted[17]  = \gpio_serial_link_1[16] ;
+  assign \gpio_serial_link_1_shifted[16]  = \gpio_serial_link_1[15] ;
+  assign \gpio_serial_link_1_shifted[15]  = \gpio_serial_link_1[14] ;
+  assign \gpio_serial_link_1_shifted[14]  = \gpio_serial_link_1[13] ;
+  assign \gpio_serial_link_1_shifted[13]  = \gpio_serial_link_1[12] ;
+  assign \gpio_serial_link_1_shifted[12]  = \gpio_serial_link_1[11] ;
+  assign \gpio_serial_link_1_shifted[11]  = \gpio_serial_link_1[10] ;
+  assign \gpio_serial_link_1_shifted[10]  = \gpio_serial_link_1[9] ;
+  assign \gpio_serial_link_1_shifted[9]  = \gpio_serial_link_1[8] ;
+  assign \gpio_serial_link_1_shifted[8]  = \gpio_serial_link_1[7] ;
+  assign \gpio_serial_link_1_shifted[7]  = \gpio_serial_link_1[6] ;
+  assign \gpio_serial_link_1_shifted[6]  = \gpio_serial_link_1[5] ;
+  assign \gpio_serial_link_1_shifted[5]  = \gpio_serial_link_1[4] ;
+  assign \gpio_serial_link_1_shifted[4]  = \gpio_serial_link_1[3] ;
+  assign \gpio_serial_link_1_shifted[3]  = \gpio_serial_link_1[2] ;
+  assign \gpio_serial_link_1_shifted[2]  = \gpio_serial_link_1[1] ;
+  assign \gpio_serial_link_1_shifted[1]  = \gpio_serial_link_1[0] ;
+  assign \gpio_load_2_shifted[17]  = \gpio_load_2[18] ;
+  assign \gpio_load_2_shifted[16]  = \gpio_load_2[17] ;
+  assign \gpio_load_2_shifted[15]  = \gpio_load_2[16] ;
+  assign \gpio_load_2_shifted[14]  = \gpio_load_2[15] ;
+  assign \gpio_load_2_shifted[13]  = \gpio_load_2[14] ;
+  assign \gpio_load_2_shifted[12]  = \gpio_load_2[13] ;
+  assign \gpio_load_2_shifted[11]  = \gpio_load_2[12] ;
+  assign \gpio_load_2_shifted[10]  = \gpio_load_2[11] ;
+  assign \gpio_load_2_shifted[9]  = \gpio_load_2[10] ;
+  assign \gpio_load_2_shifted[8]  = \gpio_load_2[9] ;
+  assign \gpio_load_2_shifted[7]  = \gpio_load_2[8] ;
+  assign \gpio_load_2_shifted[6]  = \gpio_load_2[7] ;
+  assign \gpio_load_2_shifted[5]  = \gpio_load_2[6] ;
+  assign \gpio_load_2_shifted[4]  = \gpio_load_2[5] ;
+  assign \gpio_load_2_shifted[3]  = \gpio_load_2[4] ;
+  assign \gpio_load_2_shifted[2]  = \gpio_load_2[3] ;
+  assign \gpio_load_2_shifted[1]  = \gpio_load_2[2] ;
+  assign \gpio_load_2_shifted[0]  = \gpio_load_2[1] ;
+  assign \gpio_clock_1_shifted[18]  = \gpio_clock_1[17] ;
+  assign \gpio_clock_1_shifted[17]  = \gpio_clock_1[16] ;
+  assign \gpio_clock_1_shifted[16]  = \gpio_clock_1[15] ;
+  assign \gpio_clock_1_shifted[15]  = \gpio_clock_1[14] ;
+  assign \gpio_clock_1_shifted[14]  = \gpio_clock_1[13] ;
+  assign \gpio_clock_1_shifted[13]  = \gpio_clock_1[12] ;
+  assign \gpio_clock_1_shifted[12]  = \gpio_clock_1[11] ;
+  assign \gpio_clock_1_shifted[11]  = \gpio_clock_1[10] ;
+  assign \gpio_clock_1_shifted[10]  = \gpio_clock_1[9] ;
+  assign \gpio_clock_1_shifted[9]  = \gpio_clock_1[8] ;
+  assign \gpio_clock_1_shifted[8]  = \gpio_clock_1[7] ;
+  assign \gpio_clock_1_shifted[7]  = \gpio_clock_1[6] ;
+  assign \gpio_clock_1_shifted[6]  = \gpio_clock_1[5] ;
+  assign \gpio_clock_1_shifted[5]  = \gpio_clock_1[4] ;
+  assign \gpio_clock_1_shifted[4]  = \gpio_clock_1[3] ;
+  assign \gpio_clock_1_shifted[3]  = \gpio_clock_1[2] ;
+  assign \gpio_clock_1_shifted[2]  = \gpio_clock_1[1] ;
+  assign \gpio_clock_1_shifted[1]  = \gpio_clock_1[0] ;
+  assign \gpio_resetn_1_shifted[18]  = \gpio_resetn_1[17] ;
+  assign \gpio_resetn_1_shifted[17]  = \gpio_resetn_1[16] ;
+  assign \gpio_resetn_1_shifted[16]  = \gpio_resetn_1[15] ;
+  assign \gpio_resetn_1_shifted[15]  = \gpio_resetn_1[14] ;
+  assign \gpio_resetn_1_shifted[14]  = \gpio_resetn_1[13] ;
+  assign \gpio_resetn_1_shifted[13]  = \gpio_resetn_1[12] ;
+  assign \gpio_resetn_1_shifted[12]  = \gpio_resetn_1[11] ;
+  assign \gpio_resetn_1_shifted[11]  = \gpio_resetn_1[10] ;
+  assign \gpio_resetn_1_shifted[10]  = \gpio_resetn_1[9] ;
+  assign \gpio_resetn_1_shifted[9]  = \gpio_resetn_1[8] ;
+  assign \gpio_resetn_1_shifted[8]  = \gpio_resetn_1[7] ;
+  assign \gpio_resetn_1_shifted[7]  = \gpio_resetn_1[6] ;
+  assign \gpio_resetn_1_shifted[6]  = \gpio_resetn_1[5] ;
+  assign \gpio_resetn_1_shifted[5]  = \gpio_resetn_1[4] ;
+  assign \gpio_resetn_1_shifted[4]  = \gpio_resetn_1[3] ;
+  assign \gpio_resetn_1_shifted[3]  = \gpio_resetn_1[2] ;
+  assign \gpio_resetn_1_shifted[2]  = \gpio_resetn_1[1] ;
+  assign \gpio_resetn_1_shifted[1]  = \gpio_resetn_1[0] ;
+  assign \gpio_clock_2_shifted[17]  = \gpio_clock_2[18] ;
+  assign \gpio_clock_2_shifted[16]  = \gpio_clock_2[17] ;
+  assign \gpio_clock_2_shifted[15]  = \gpio_clock_2[16] ;
+  assign \gpio_clock_2_shifted[14]  = \gpio_clock_2[15] ;
+  assign \gpio_clock_2_shifted[13]  = \gpio_clock_2[14] ;
+  assign \gpio_clock_2_shifted[12]  = \gpio_clock_2[13] ;
+  assign \gpio_clock_2_shifted[11]  = \gpio_clock_2[12] ;
+  assign \gpio_clock_2_shifted[10]  = \gpio_clock_2[11] ;
+  assign \gpio_clock_2_shifted[9]  = \gpio_clock_2[10] ;
+  assign \gpio_clock_2_shifted[8]  = \gpio_clock_2[9] ;
+  assign \gpio_clock_2_shifted[7]  = \gpio_clock_2[8] ;
+  assign \gpio_clock_2_shifted[6]  = \gpio_clock_2[7] ;
+  assign \gpio_clock_2_shifted[5]  = \gpio_clock_2[6] ;
+  assign \gpio_clock_2_shifted[4]  = \gpio_clock_2[5] ;
+  assign \gpio_clock_2_shifted[3]  = \gpio_clock_2[4] ;
+  assign \gpio_clock_2_shifted[2]  = \gpio_clock_2[3] ;
+  assign \gpio_clock_2_shifted[1]  = \gpio_clock_2[2] ;
+  assign \gpio_clock_2_shifted[0]  = \gpio_clock_2[1] ;
+  assign \gpio_load_1_shifted[18]  = \gpio_load_1[17] ;
+  assign \gpio_load_1_shifted[17]  = \gpio_load_1[16] ;
+  assign \gpio_load_1_shifted[16]  = \gpio_load_1[15] ;
+  assign \gpio_load_1_shifted[15]  = \gpio_load_1[14] ;
+  assign \gpio_load_1_shifted[14]  = \gpio_load_1[13] ;
+  assign \gpio_load_1_shifted[13]  = \gpio_load_1[12] ;
+  assign \gpio_load_1_shifted[12]  = \gpio_load_1[11] ;
+  assign \gpio_load_1_shifted[11]  = \gpio_load_1[10] ;
+  assign \gpio_load_1_shifted[10]  = \gpio_load_1[9] ;
+  assign \gpio_load_1_shifted[9]  = \gpio_load_1[8] ;
+  assign \gpio_load_1_shifted[8]  = \gpio_load_1[7] ;
+  assign \gpio_load_1_shifted[7]  = \gpio_load_1[6] ;
+  assign \gpio_load_1_shifted[6]  = \gpio_load_1[5] ;
+  assign \gpio_load_1_shifted[5]  = \gpio_load_1[4] ;
+  assign \gpio_load_1_shifted[4]  = \gpio_load_1[3] ;
+  assign \gpio_load_1_shifted[3]  = \gpio_load_1[2] ;
+  assign \gpio_load_1_shifted[2]  = \gpio_load_1[1] ;
+  assign \gpio_load_1_shifted[1]  = \gpio_load_1[0] ;
+  assign \gpio_serial_link_2_shifted[17]  = \gpio_serial_link_2[18] ;
+  assign \gpio_serial_link_2_shifted[16]  = \gpio_serial_link_2[17] ;
+  assign \gpio_serial_link_2_shifted[15]  = \gpio_serial_link_2[16] ;
+  assign \gpio_serial_link_2_shifted[14]  = \gpio_serial_link_2[15] ;
+  assign \gpio_serial_link_2_shifted[13]  = \gpio_serial_link_2[14] ;
+  assign \gpio_serial_link_2_shifted[12]  = \gpio_serial_link_2[13] ;
+  assign \gpio_serial_link_2_shifted[11]  = \gpio_serial_link_2[12] ;
+  assign \gpio_serial_link_2_shifted[10]  = \gpio_serial_link_2[11] ;
+  assign \gpio_serial_link_2_shifted[9]  = \gpio_serial_link_2[10] ;
+  assign \gpio_serial_link_2_shifted[8]  = \gpio_serial_link_2[9] ;
+  assign \gpio_serial_link_2_shifted[7]  = \gpio_serial_link_2[8] ;
+  assign \gpio_serial_link_2_shifted[6]  = \gpio_serial_link_2[7] ;
+  assign \gpio_serial_link_2_shifted[5]  = \gpio_serial_link_2[6] ;
+  assign \gpio_serial_link_2_shifted[4]  = \gpio_serial_link_2[5] ;
+  assign \gpio_serial_link_2_shifted[3]  = \gpio_serial_link_2[4] ;
+  assign \gpio_serial_link_2_shifted[2]  = \gpio_serial_link_2[3] ;
+  assign \gpio_serial_link_2_shifted[1]  = \gpio_serial_link_2[2] ;
+  assign \gpio_serial_link_2_shifted[0]  = \gpio_serial_link_2[1] ;
+  assign \gpio_resetn_2_shifted[17]  = \gpio_resetn_2[18] ;
+  assign \gpio_resetn_2_shifted[16]  = \gpio_resetn_2[17] ;
+  assign \gpio_resetn_2_shifted[15]  = \gpio_resetn_2[16] ;
+  assign \gpio_resetn_2_shifted[14]  = \gpio_resetn_2[15] ;
+  assign \gpio_resetn_2_shifted[13]  = \gpio_resetn_2[14] ;
+  assign \gpio_resetn_2_shifted[12]  = \gpio_resetn_2[13] ;
+  assign \gpio_resetn_2_shifted[11]  = \gpio_resetn_2[12] ;
+  assign \gpio_resetn_2_shifted[10]  = \gpio_resetn_2[11] ;
+  assign \gpio_resetn_2_shifted[9]  = \gpio_resetn_2[10] ;
+  assign \gpio_resetn_2_shifted[8]  = \gpio_resetn_2[9] ;
+  assign \gpio_resetn_2_shifted[7]  = \gpio_resetn_2[8] ;
+  assign \gpio_resetn_2_shifted[6]  = \gpio_resetn_2[7] ;
+  assign \gpio_resetn_2_shifted[5]  = \gpio_resetn_2[6] ;
+  assign \gpio_resetn_2_shifted[4]  = \gpio_resetn_2[5] ;
+  assign \gpio_resetn_2_shifted[3]  = \gpio_resetn_2[4] ;
+  assign \gpio_resetn_2_shifted[2]  = \gpio_resetn_2[3] ;
+  assign \gpio_resetn_2_shifted[1]  = \gpio_resetn_2[2] ;
+  assign \gpio_resetn_2_shifted[0]  = \gpio_resetn_2[1] ;
+  assign \mgmt_io_in_hk[6]  = \mgmt_io_in[6] ;
+  assign \mgmt_io_in_hk[5]  = \mgmt_io_in[5] ;
+  assign \mgmt_io_in_hk[4]  = \mgmt_io_in[4] ;
+  assign \mgmt_io_in_hk[3]  = \mgmt_io_in[3] ;
+  assign \mgmt_io_in_hk[2]  = \mgmt_io_in[2] ;
+  assign \mgmt_io_in_hk[1]  = \mgmt_io_in[1] ;
+  assign \mgmt_io_in_hk[0]  = \mgmt_io_in[0] ;
+  assign \mgmt_io_out_hk[6]  = \mgmt_io_out[6] ;
+  assign \mgmt_io_out_hk[5]  = \mgmt_io_out[5] ;
+  assign \mgmt_io_out_hk[4]  = \mgmt_io_out[4] ;
+  assign \mgmt_io_out_hk[3]  = \mgmt_io_out[3] ;
+  assign \mgmt_io_out_hk[2]  = \mgmt_io_out[2] ;
+  assign \mgmt_io_out_hk[1]  = \mgmt_io_out[1] ;
+  assign \mgmt_io_out_hk[0]  = \mgmt_io_out[0] ;
+  assign \mgmt_io_oeb_hk[34]  = \mgmt_io_oeb[34] ;
+  assign \mgmt_io_oeb_hk[33]  = \mgmt_io_oeb[33] ;
+  assign \mgmt_io_oeb_hk[32]  = \mgmt_io_oeb[32] ;
+  assign \mgmt_io_oeb_hk[31]  = \mgmt_io_oeb[31] ;
+  assign \mgmt_io_oeb_hk[30]  = \mgmt_io_oeb[30] ;
+  assign \mgmt_io_oeb_hk[29]  = \mgmt_io_oeb[29] ;
+  assign \mgmt_io_oeb_hk[28]  = \mgmt_io_oeb[28] ;
+  assign \mgmt_io_oeb_hk[27]  = \mgmt_io_oeb[27] ;
+  assign \mgmt_io_oeb_hk[26]  = \mgmt_io_oeb[26] ;
+  assign \mgmt_io_oeb_hk[25]  = \mgmt_io_oeb[25] ;
+  assign \mgmt_io_oeb_hk[24]  = \mgmt_io_oeb[24] ;
+  assign \mgmt_io_oeb_hk[23]  = \mgmt_io_oeb[23] ;
+  assign \mgmt_io_oeb_hk[22]  = \mgmt_io_oeb[22] ;
+  assign \mgmt_io_oeb_hk[21]  = \mgmt_io_oeb[21] ;
+  assign \mgmt_io_oeb_hk[20]  = \mgmt_io_oeb[20] ;
+  assign \mgmt_io_oeb_hk[19]  = \mgmt_io_oeb[19] ;
+  assign \mgmt_io_oeb_hk[18]  = \mgmt_io_oeb[18] ;
+  assign \mgmt_io_oeb_hk[17]  = \mgmt_io_oeb[17] ;
+  assign \mgmt_io_oeb_hk[16]  = \mgmt_io_oeb[16] ;
+  assign \mgmt_io_oeb_hk[15]  = \mgmt_io_oeb[15] ;
+  assign \mgmt_io_oeb_hk[14]  = \mgmt_io_oeb[14] ;
+  assign \mgmt_io_oeb_hk[13]  = \mgmt_io_oeb[13] ;
+  assign \mgmt_io_oeb_hk[12]  = \mgmt_io_oeb[12] ;
+  assign \mgmt_io_oeb_hk[11]  = \mgmt_io_oeb[11] ;
+  assign \mgmt_io_oeb_hk[10]  = \mgmt_io_oeb[10] ;
+  assign \mgmt_io_oeb_hk[9]  = \mgmt_io_oeb[9] ;
+  assign \mgmt_io_oeb_hk[8]  = \mgmt_io_oeb[8] ;
+  assign \mgmt_io_oeb_hk[7]  = \mgmt_io_oeb[7] ;
+  assign \mgmt_io_oeb_hk[6]  = \mgmt_io_oeb[6] ;
+  assign \mgmt_io_oeb_hk[5]  = \mgmt_io_oeb[5] ;
+  assign \mgmt_io_oeb_hk[4]  = \mgmt_io_oeb[4] ;
+  assign \mgmt_io_oeb_hk[3]  = \mgmt_io_oeb[3] ;
+  assign \mgmt_io_oeb_hk[2]  = \mgmt_io_oeb[2] ;
+  assign \mgmt_io_oeb_hk[1]  = \mgmt_io_oeb[1] ;
+  assign \mgmt_io_oeb_hk[0]  = \mgmt_io_oeb[0] ;
+  assign mprj_io_loader_data_2_buf = \gpio_serial_link_2_shifted[18] ;
+  assign mprj_io_loader_resetn_buf = \gpio_resetn_2_shifted[18] ;
+  assign mprj_io_loader_strobe_buf = \gpio_load_2_shifted[18] ;
+  assign mprj_io_loader_clock_buf = \gpio_clock_2_shifted[18] ;
+  assign mprj_io_loader_data_1 = \gpio_serial_link_1_shifted[0] ;
+  assign mprj_io_loader_strobe = \gpio_load_1_shifted[0] ;
+  assign mprj_io_loader_clock = \gpio_clock_1_shifted[0] ;
+  assign mprj_io_loader_resetn = \gpio_resetn_1_shifted[0] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v
new file mode 100644
index 0000000..33fbfde
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_0403 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_high[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_high[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_low[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_low[12] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v
new file mode 100644
index 0000000..379ba1c
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_0801 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_low[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_low[12] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v
new file mode 100644
index 0000000..d29d576
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_1801.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_1801 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_low[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_high[12] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v
new file mode 100644
index 0000000..13ad29a
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_1803 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_high[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_high[12] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/user_id_programming.v b/tapeout/outputs/verilog/gl/user_id_programming.v
new file mode 100644
index 0000000..c62008c
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/user_id_programming.v
@@ -0,0 +1,786 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+/* Generated by Yosys 0.9+3621 (git sha1 84e9fa7, gcc 8.3.1 -fPIC -Os) */
+
+module user_id_programming(VPWR, VGND, mask_rev);
+  input VGND;
+  input VPWR;
+  output [31:0] mask_rev;
+  wire \user_proj_id_high[0] ;
+  wire \user_proj_id_high[10] ;
+  wire \user_proj_id_high[11] ;
+  wire \user_proj_id_low[12] ;
+  wire \user_proj_id_high[13] ;
+  wire \user_proj_id_high[14] ;
+  wire \user_proj_id_high[15] ;
+  wire \user_proj_id_high[16] ;
+  wire \user_proj_id_low[17] ;
+  wire \user_proj_id_low[18] ;
+  wire \user_proj_id_low[19] ;
+  wire \user_proj_id_high[1] ;
+  wire \user_proj_id_high[20] ;
+  wire \user_proj_id_low[21] ;
+  wire \user_proj_id_high[22] ;
+  wire \user_proj_id_low[23] ;
+  wire \user_proj_id_high[24] ;
+  wire \user_proj_id_low[25] ;
+  wire \user_proj_id_high[26] ;
+  wire \user_proj_id_high[27] ;
+  wire \user_proj_id_low[28] ;
+  wire \user_proj_id_high[29] ;
+  wire \user_proj_id_high[2] ;
+  wire \user_proj_id_low[30] ;
+  wire \user_proj_id_low[31] ;
+  wire \user_proj_id_high[3] ;
+  wire \user_proj_id_high[4] ;
+  wire \user_proj_id_high[5] ;
+  wire \user_proj_id_high[6] ;
+  wire \user_proj_id_high[7] ;
+  wire \user_proj_id_high[8] ;
+  wire \user_proj_id_high[9] ;
+  sky130_fd_sc_hd__decap_3 FILLER_0_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_21 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_0_29 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_0_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_0_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_39 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_0_47 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_7 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_1_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_1_20 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_1_24 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_1_33 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_1_45 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_1_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_2_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_2_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_2_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_2_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_2_44 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_18 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_30 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_3_42 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_10 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_14 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_4_18 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_26 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_30 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_4_35 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_4_41 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_46 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_5_11 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_5_23 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_5_31 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_5_40 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_5_49 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_5_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_6_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_20 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_24 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_6_28 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_6_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_6_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_36 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_6_40 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_6_48 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_7_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_7_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_7_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_7_36 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_7_42 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_7_46 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_8_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_8_44 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_0 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_1 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_10 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_11 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_13 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_14 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_16 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_17 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_2 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_4 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_5 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_7 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_8 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_9 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[0]  (
+    .HI(\user_proj_id_high[0] ),
+    .LO(mask_rev[0]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[10]  (
+    .HI(\user_proj_id_high[10] ),
+    .LO(mask_rev[10]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[11]  (
+    .HI(\user_proj_id_high[11] ),
+    .LO(mask_rev[11]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[12]  (
+    .LO(\user_proj_id_low[12] ),
+    .HI(mask_rev[12]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[13]  (
+    .HI(\user_proj_id_high[13] ),
+    .LO(mask_rev[13]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[14]  (
+    .HI(\user_proj_id_high[14] ),
+    .LO(mask_rev[14]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[15]  (
+    .HI(\user_proj_id_high[15] ),
+    .LO(mask_rev[15]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[16]  (
+    .HI(\user_proj_id_high[16] ),
+    .LO(mask_rev[16]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[17]  (
+    .LO(\user_proj_id_low[17] ),
+    .HI(mask_rev[17]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[18]  (
+    .LO(\user_proj_id_low[18] ),
+    .HI(mask_rev[18]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[19]  (
+    .LO(\user_proj_id_low[19] ),
+    .HI(mask_rev[19]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[1]  (
+    .HI(\user_proj_id_high[1] ),
+    .LO(mask_rev[1]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[20]  (
+    .HI(\user_proj_id_high[20] ),
+    .LO(mask_rev[20]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[21]  (
+    .LO(\user_proj_id_low[21] ),
+    .HI(mask_rev[21]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[22]  (
+    .HI(\user_proj_id_high[22] ),
+    .LO(mask_rev[22]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[23]  (
+    .LO(\user_proj_id_low[23] ),
+    .HI(mask_rev[23]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[24]  (
+    .HI(\user_proj_id_high[24] ),
+    .LO(mask_rev[24]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[25]  (
+    .LO(\user_proj_id_low[25] ),
+    .HI(mask_rev[25]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[26]  (
+    .HI(\user_proj_id_high[26] ),
+    .LO(mask_rev[26]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[27]  (
+    .HI(\user_proj_id_high[27] ),
+    .LO(mask_rev[27]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[28]  (
+    .LO(\user_proj_id_low[28] ),
+    .HI(mask_rev[28]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[29]  (
+    .HI(\user_proj_id_high[29] ),
+    .LO(mask_rev[29]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[2]  (
+    .HI(\user_proj_id_high[2] ),
+    .LO(mask_rev[2]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[30]  (
+    .LO(\user_proj_id_low[30] ),
+    .HI(mask_rev[30]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[31]  (
+    .LO(\user_proj_id_low[31] ),
+    .HI(mask_rev[31]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[3]  (
+    .HI(\user_proj_id_high[3] ),
+    .LO(mask_rev[3]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[4]  (
+    .HI(\user_proj_id_high[4] ),
+    .LO(mask_rev[4]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[5]  (
+    .HI(\user_proj_id_high[5] ),
+    .LO(mask_rev[5]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[6]  (
+    .HI(\user_proj_id_high[6] ),
+    .LO(mask_rev[6]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[7]  (
+    .HI(\user_proj_id_high[7] ),
+    .LO(mask_rev[7]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[8]  (
+    .HI(\user_proj_id_high[8] ),
+    .LO(mask_rev[8]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[9]  (
+    .HI(\user_proj_id_high[9] ),
+    .LO(mask_rev[9]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+endmodule
diff --git a/tapeout/outputs/verilog/rtl/caravel.v b/tapeout/outputs/verilog/rtl/caravel.v
new file mode 100644
index 0000000..366f71d
--- /dev/null
+++ b/tapeout/outputs/verilog/rtl/caravel.v
@@ -0,0 +1,1635 @@
+ `ifdef SIM
+ `default_nettype wire
+ `endif
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+/*--------------------------------------------------------------*/
+/* caravel, a project harness for the Google/SkyWater sky130	*/
+/* fabrication process and open source PDK			*/
+/*                                                          	*/
+/* Copyright 2020 efabless, Inc.                            	*/
+/* Written by Tim Edwards, December 2019                    	*/
+/* and Mohamed Shalan, August 2020			    	*/
+/* This file is open source hardware released under the     	*/
+/* Apache 2.0 license.  See file LICENSE.                   	*/
+/*								*/
+/* Updated 10/15/2021:  Revised using the housekeeping module	*/
+/* from housekeeping.v (refactoring a number of functions from	*/
+/* the management SoC).						*/
+/*                                                          	*/
+/*--------------------------------------------------------------*/
+
+module caravel (
+
+    // All top-level I/O are package-facing pins
+
+    inout vddio,	// Common 3.3V padframe/ESD power
+    inout vddio_2,	// Common 3.3V padframe/ESD power
+    inout vssio,	// Common padframe/ESD ground
+    inout vssio_2,	// Common padframe/ESD ground
+    inout vdda,		// Management 3.3V power
+    inout vssa,		// Common analog ground
+    inout vccd,		// Management/Common 1.8V power
+    inout vssd,		// Common digital ground
+    inout vdda1,	// User area 1 3.3V power
+    inout vdda1_2,	// User area 1 3.3V power
+    inout vdda2,	// User area 2 3.3V power
+    inout vssa1,	// User area 1 analog ground
+    inout vssa1_2,	// User area 1 analog ground
+    inout vssa2,	// User area 2 analog ground
+    inout vccd1,	// User area 1 1.8V power
+    inout vccd2,	// User area 2 1.8V power
+    inout vssd1,	// User area 1 digital ground
+    inout vssd2,	// User area 2 digital ground
+
+    inout gpio,		// Used for external LDO control
+    inout [`MPRJ_IO_PADS-1:0] mprj_io,
+    input clock,    	// CMOS core clock input, not a crystal
+    input resetb,	// Reset input (sense inverted)
+
+    // Note that only two flash data pins are dedicated to the
+    // management SoC wrapper.  The management SoC exports the
+    // quad SPI mode status to make use of the top two mprj_io
+    // pins for io2 and io3.
+
+    output flash_csb,
+    output flash_clk,
+    output flash_io0,
+    output flash_io1
+);
+
+    //------------------------------------------------------------
+    // This value is uniquely defined for each user project.
+    //------------------------------------------------------------
+    parameter USER_PROJECT_ID = 32'h0008754b;
+
+    /*
+     *--------------------------------------------------------------------
+     *
+     * These pins are overlaid on mprj_io space.  They have the function
+     * below when the management processor is in reset, or in the default
+     * configuration.  They are assigned to uses in the user space by the
+     * configuration program running off of the SPI flash.  Note that even
+     * when the user has taken control of these pins, they can be restored
+     * to the original use by setting the resetb pin low.  The SPI pins and
+     * UART pins can be connected directly to an FTDI chip as long as the
+     * FTDI chip sets these lines to high impedence (input function) at
+     * all times except when holding the chip in reset.
+     *
+     * JTAG       = mprj_io[0]		(inout)
+     * SDO 	  = mprj_io[1]		(output)
+     * SDI 	  = mprj_io[2]		(input)
+     * CSB 	  = mprj_io[3]		(input)
+     * SCK	  = mprj_io[4]		(input)
+     * ser_rx     = mprj_io[5]		(input)
+     * ser_tx     = mprj_io[6]		(output)
+     * irq 	  = mprj_io[7]		(input)
+     *
+     * spi_sck    = mprj_io[32]		(output)
+     * spi_csb    = mprj_io[33]		(output)
+     * spi_sdi    = mprj_io[34]		(input)
+     * spi_sdo    = mprj_io[35]		(output)
+     * flash_io2  = mprj_io[36]		(inout) 
+     * flash_io3  = mprj_io[37]		(inout) 
+     *
+     * These pins are reserved for any project that wants to incorporate
+     * its own processor and flash controller.  While a user project can
+     * technically use any available I/O pins for the purpose, these
+     * four pins connect to a pass-through mode from the SPI slave (pins
+     * 1-4 above) so that any SPI flash connected to these specific pins
+     * can be accessed through the SPI slave even when the processor is in
+     * reset.
+     *
+     * user_flash_csb = mprj_io[8]
+     * user_flash_sck = mprj_io[9]
+     * user_flash_io0 = mprj_io[10]
+     * user_flash_io1 = mprj_io[11]
+     *
+     *--------------------------------------------------------------------
+     */
+
+    // One-bit GPIO dedicated to management SoC (outside of user control)
+    wire gpio_out_core;
+    wire gpio_in_core;
+    wire gpio_mode0_core;
+    wire gpio_mode1_core;
+    wire gpio_outenb_core;
+    wire gpio_inenb_core;
+
+    // User Project Control (pad-facing)
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_inp_dis;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_oeb;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_ib_mode_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_vtrip_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_slow_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_holdover;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_en;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_pol;
+    wire [`MPRJ_IO_PADS*3-1:0] mprj_io_dm;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_in;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_out;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_one;
+
+    // User Project Control (user-facing)
+    wire [`MPRJ_IO_PADS-1:0] user_io_oeb;
+    wire [`MPRJ_IO_PADS-1:0] user_io_in;
+    wire [`MPRJ_IO_PADS-1:0] user_io_out;
+    wire [`MPRJ_IO_PADS-10:0] user_analog_io;
+
+    /* Padframe control signals */
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2;
+    wire mprj_io_loader_resetn;
+    wire mprj_io_loader_clock;
+    wire mprj_io_loader_strobe;
+    wire mprj_io_loader_data_1;		/* user1 side serial loader */
+    wire mprj_io_loader_data_2;		/* user2 side serial loader */
+
+    // User Project Control management I/O
+    // There are two types of GPIO connections:
+    // (1) Full Bidirectional: Management connects to in, out, and oeb
+    //     Uses:  JTAG and SDO
+    // (2) Selectable bidirectional:  Management connects to in and out,
+    //	   which are tied together.  oeb is grounded (oeb from the
+    //	   configuration is used)
+
+    // SDI 	 = mprj_io[2]		(input)
+    // CSB 	 = mprj_io[3]		(input)
+    // SCK	 = mprj_io[4]		(input)
+    // ser_rx    = mprj_io[5]		(input)
+    // ser_tx    = mprj_io[6]		(output)
+    // irq 	 = mprj_io[7]		(input)
+
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_in;	/* two- and three-pin data in	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_out;	/* two- and three-pin data out	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb;	/* output enable, used only by	*/
+						/* the three-pin interfaces	*/
+    wire [`MPRJ_PWR_PADS-1:0] pwr_ctrl_nc;	/* no-connects */
+
+    /* Buffers are placed between housekeeping and gpio_control_block		*/
+    /* instances to mitigate timing issues on very long (> 1.5mm) wires.	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_in_hk;	/* mgmt_io_in at housekeeping	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_out_hk;	/* mgmt_io_out at housekeeping	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb_hk;	/* mgmt_io_oeb at housekeeping	*/
+    
+    wire clock_core;
+
+    // Power-on-reset signal.  The reset pad generates the sense-inverted
+    // reset at 3.3V.  The 1.8V signal and the inverted 1.8V signal are
+    // derived.
+
+    wire porb_h;
+    wire porb_l;
+    wire por_l;
+
+    wire rstb_h;
+    wire rstb_l;
+
+    // Flash SPI communication (management SoC to housekeeping)
+    wire flash_clk_core,     flash_csb_core;
+    wire flash_clk_oeb_core, flash_csb_oeb_core;
+    wire flash_io0_oeb_core, flash_io1_oeb_core;
+    wire flash_io2_oeb_core, flash_io3_oeb_core;
+    wire flash_io0_ieb_core, flash_io1_ieb_core;
+    wire flash_io2_ieb_core, flash_io3_ieb_core;
+    wire flash_io0_do_core,  flash_io1_do_core;
+    wire flash_io2_do_core,  flash_io3_do_core;
+    wire flash_io0_di_core,  flash_io1_di_core;
+    wire flash_io2_di_core,  flash_io3_di_core;
+
+    // Flash SPI communication (
+    wire flash_clk_frame;
+    wire flash_csb_frame;
+    wire flash_clk_oeb, flash_csb_oeb;
+    wire flash_clk_ieb, flash_csb_ieb;
+    wire flash_io0_oeb, flash_io1_oeb;
+    wire flash_io0_ieb, flash_io1_ieb;
+    wire flash_io0_do,  flash_io1_do;
+    wire flash_io0_di,  flash_io1_di;
+
+	// Flash buffered signals
+    wire flash_clk_frame_buf;
+    wire flash_csb_frame_buf;
+    wire flash_clk_ieb_buf, flash_csb_ieb_buf;
+    wire flash_io0_oeb_buf, flash_io1_oeb_buf;
+    wire flash_io0_ieb_buf, flash_io1_ieb_buf;
+    wire flash_io0_do_buf,  flash_io1_do_buf;
+    wire flash_io0_di_buf,  flash_io1_di_buf;
+	
+	// Clock and reset buffered signals
+	wire caravel_clk_buf;
+	wire caravel_rstn_buf;
+	wire clock_core_buf;
+
+	// SoC pass through buffered signals
+	wire mprj_io_loader_clock_buf;
+	wire mprj_io_loader_strobe_buf;
+	wire mprj_io_loader_resetn_buf;
+	wire mprj_io_loader_data_2_buf;
+	wire rstb_l_buf;
+	wire por_l_buf;
+	wire porb_h_buf;
+	
+
+    // SoC core
+    wire caravel_clk;
+    wire caravel_clk2;
+    wire caravel_rstn;
+	
+	// top-level buffers
+	buff_flash_clkrst flash_clkrst_buffers (
+	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+	`endif
+	.in_n({
+		caravel_clk,
+		caravel_rstn,
+		flash_clk_frame, 
+		flash_csb_frame, 
+		flash_clk_oeb, 
+		flash_csb_oeb, 
+		flash_io0_oeb, 
+		flash_io1_oeb,
+		flash_io0_ieb, 
+		flash_io1_ieb,
+		flash_io0_do,  
+		flash_io1_do }), 
+	.in_s({
+		clock_core,
+		flash_io1_di, 
+		flash_io0_di }),
+	.out_s({ 
+		caravel_clk_buf,
+		caravel_rstn_buf,
+		flash_clk_frame_buf, 
+		flash_csb_frame_buf, 
+		flash_clk_oeb_buf, 
+		flash_csb_oeb_buf, 
+		flash_io0_oeb_buf, 
+		flash_io1_oeb_buf,
+		flash_io0_ieb_buf, 
+		flash_io1_ieb_buf,
+		flash_io0_do_buf,  
+		flash_io1_do_buf }), 
+	.out_n({
+		clock_core_buf,
+		flash_io1_di_buf, 
+		flash_io0_di_buf })
+	);
+
+	`ifdef NO_TOP_LEVEL_BUFFERING
+		assign mgmt_io_in_hk = mgmt_io_in;
+		assign mgmt_io_out = mgmt_io_out_hk;
+		assign mgmt_io_oeb = mgmt_io_oeb_hk;
+	`else
+
+		/* NOTE: The first 7 GPIO are unbuffered, and all
+		 * OEB lines except the last three are unbuffered
+		 * (most of these end up being no-connects from
+		 * housekeeping).
+		 */
+		assign mgmt_io_in_hk[6:0] = mgmt_io_in[6:0];
+		assign mgmt_io_out[6:0] = mgmt_io_out_hk[6:0];
+		assign mgmt_io_oeb[34:0] = mgmt_io_oeb_hk[34:0];
+
+		gpio_signal_buffering sigbuf (
+		`ifdef USE_POWER_PINS
+			.vccd(vccd_core),
+			.vssd(vssd_core),
+		`endif
+		.mgmt_io_in_unbuf(mgmt_io_in[37:7]),
+		.mgmt_io_out_unbuf(mgmt_io_out_hk[37:7]),
+		.mgmt_io_oeb_unbuf(mgmt_io_oeb_hk[37:35]),
+		.mgmt_io_in_buf(mgmt_io_in_hk[37:7]),
+		.mgmt_io_out_buf(mgmt_io_out[37:7]),
+		.mgmt_io_oeb_buf(mgmt_io_oeb[37:35])
+		);
+	`endif
+
+	chip_io padframe(
+	`ifndef TOP_ROUTING
+		// Package Pins
+		.vddio_pad	(vddio),		// Common padframe/ESD supply
+		.vddio_pad2	(vddio_2),
+		.vssio_pad	(vssio),		// Common padframe/ESD ground
+		.vssio_pad2	(vssio_2),
+		.vccd_pad	(vccd),			// Common 1.8V supply
+		.vssd_pad	(vssd),			// Common digital ground
+		.vdda_pad	(vdda),			// Management analog 3.3V supply
+		.vssa_pad	(vssa),			// Management analog ground
+		.vdda1_pad	(vdda1),		// User area 1 3.3V supply
+		.vdda1_pad2	(vdda1_2),		
+		.vdda2_pad	(vdda2),		// User area 2 3.3V supply
+		.vssa1_pad	(vssa1),		// User area 1 analog ground
+		.vssa1_pad2	(vssa1_2),
+		.vssa2_pad	(vssa2),		// User area 2 analog ground
+		.vccd1_pad	(vccd1),		// User area 1 1.8V supply
+		.vccd2_pad	(vccd2),		// User area 2 1.8V supply
+		.vssd1_pad	(vssd1),		// User area 1 digital ground
+		.vssd2_pad	(vssd2),		// User area 2 digital ground
+        .vddio	(vddio_core),
+        .vssio	(vssio_core),
+        .vdda	(vdda_core),
+        .vssa	(vssa_core),
+        .vccd	(vccd_core),
+        .vssd	(vssd_core),
+        .vdda1	(vdda1_core),
+        .vdda2	(vdda2_core),
+        .vssa1	(vssa1_core),
+        .vssa2	(vssa2_core),
+        .vccd1	(vccd1_core),
+        .vccd2	(vccd2_core),
+        .vssd1	(vssd1_core),
+        .vssd2	(vssd2_core),
+	`endif
+	// Core Side Pins
+	.gpio(gpio),
+	.mprj_io(mprj_io),
+	.clock(clock),
+	.resetb(resetb),
+	.flash_csb(flash_csb),
+	.flash_clk(flash_clk),
+	.flash_io0(flash_io0),
+	.flash_io1(flash_io1),
+	// SoC Core Interface
+	.porb_h(porb_h),
+	.por(por_l_buf),
+	.resetb_core_h(rstb_h),
+	.clock_core(clock_core),
+	.gpio_out_core(gpio_out_core),
+	.gpio_in_core(gpio_in_core),
+	.gpio_mode0_core(gpio_mode0_core),
+	.gpio_mode1_core(gpio_mode1_core),
+	.gpio_outenb_core(gpio_outenb_core),
+	.gpio_inenb_core(gpio_inenb_core),
+	.flash_csb_core(flash_csb_frame_buf),
+	.flash_clk_core(flash_clk_frame_buf),
+	.flash_csb_oeb_core(flash_csb_oeb_buf),
+	.flash_clk_oeb_core(flash_clk_oeb_buf),
+	.flash_io0_oeb_core(flash_io0_oeb_buf),
+	.flash_io1_oeb_core(flash_io1_oeb_buf),
+	.flash_io0_ieb_core(flash_io0_ieb_buf),
+	.flash_io1_ieb_core(flash_io1_ieb_buf),
+	.flash_io0_do_core(flash_io0_do_buf),
+	.flash_io1_do_core(flash_io1_do_buf),
+	.flash_io0_di_core(flash_io0_di),
+	.flash_io1_di_core(flash_io1_di),
+	.mprj_io_one(mprj_io_one),
+	.mprj_io_in(mprj_io_in),
+	.mprj_io_out(mprj_io_out),
+	.mprj_io_oeb(mprj_io_oeb),
+	.mprj_io_inp_dis(mprj_io_inp_dis),
+	.mprj_io_ib_mode_sel(mprj_io_ib_mode_sel),
+	.mprj_io_vtrip_sel(mprj_io_vtrip_sel),
+	.mprj_io_slow_sel(mprj_io_slow_sel),
+	.mprj_io_holdover(mprj_io_holdover),
+	.mprj_io_analog_en(mprj_io_analog_en),
+	.mprj_io_analog_sel(mprj_io_analog_sel),
+	.mprj_io_analog_pol(mprj_io_analog_pol),
+	.mprj_io_dm(mprj_io_dm),
+	.mprj_analog_io(user_analog_io)
+    );
+
+
+    // Logic analyzer signals
+    wire [127:0] la_data_in_user;  // From CPU to MPRJ
+    wire [127:0] la_data_in_mprj;  // From MPRJ to CPU
+    wire [127:0] la_data_out_mprj; // From CPU to MPRJ
+    wire [127:0] la_data_out_user; // From MPRJ to CPU
+    wire [127:0] la_oenb_user;     // From CPU to MPRJ
+    wire [127:0] la_oenb_mprj;     // From CPU to MPRJ
+    wire [127:0] la_iena_mprj;     // From CPU only
+
+    wire [2:0]   user_irq;	  // From MRPJ to CPU
+    wire [2:0]   user_irq_core;
+    wire [2:0]   user_irq_ena;
+    wire [2:0]	 irq_spi;	  // From SPI and external pins
+
+    // Exported Wishbone Bus (processor facing)
+    wire mprj_iena_wb;
+    wire mprj_cyc_o_core;
+    wire mprj_stb_o_core;
+    wire mprj_we_o_core;
+    wire [3:0] mprj_sel_o_core;
+    wire [31:0] mprj_adr_o_core;
+    wire [31:0] mprj_dat_o_core;
+    wire mprj_ack_i_core;
+    wire [31:0] mprj_dat_i_core;
+
+    wire [31:0] hk_dat_i;
+    wire hk_ack_i;
+    wire hk_stb_o;
+    wire hk_cyc_o;
+
+    // Exported Wishbone Bus (user area facing)
+    wire 	mprj_cyc_o_user;
+    wire 	mprj_stb_o_user;
+    wire 	mprj_we_o_user;
+    wire [3:0]  mprj_sel_o_user;
+    wire [31:0] mprj_adr_o_user;
+    wire [31:0] mprj_dat_o_user;
+    wire [31:0] mprj_dat_i_user;
+    wire	mprj_ack_i_user;
+
+    // Mask revision
+    wire [31:0] mask_rev;
+
+    wire 	mprj_clock;
+    wire 	mprj_clock2;
+    wire 	mprj_reset;
+
+    // Power monitoring 
+    wire	mprj_vcc_pwrgood;
+    wire	mprj2_vcc_pwrgood;
+    wire	mprj_vdd_pwrgood;
+    wire	mprj2_vdd_pwrgood;
+
+`ifdef USE_SRAM_RO_INTERFACE
+    // SRAM read-only access from housekeeping
+    wire 	hkspi_sram_clk;
+    wire 	hkspi_sram_csb;
+    wire [7:0]	hkspi_sram_addr;
+    wire [31:0]	hkspi_sram_data;
+`endif
+
+    // Management processor (wrapper).  Any management core
+    // implementation must match this pinout.
+
+    // Pass thru clock and reset
+    wire 	clk_passthru;
+    wire 	resetn_passthru;
+
+	// NC passthru signal porb_h 
+	wire porb_h_in_nc;
+	wire porb_h_out_nc;
+
+    mgmt_core_wrapper soc (
+	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+	`endif
+
+	// SoC pass through buffered signals
+	.serial_clock_in(mprj_io_loader_clock),
+	.serial_clock_out(mprj_io_loader_clock_buf),
+	.serial_load_in(mprj_io_loader_strobe),
+	.serial_load_out(mprj_io_loader_strobe_buf),
+	.serial_resetn_in(mprj_io_loader_resetn),
+	.serial_resetn_out(mprj_io_loader_resetn_buf),
+	.serial_data_2_in(mprj_io_loader_data_2),
+	.serial_data_2_out(mprj_io_loader_data_2_buf),
+	.rstb_l_in(rstb_l),
+	.rstb_l_out(rstb_l_buf),
+	.porb_h_in(porb_h_in_nc),
+	.porb_h_out(porb_h_out_nc),
+	.por_l_in(por_l),
+	.por_l_out(por_l_buf),
+
+	// Clock and reset
+	.core_clk(caravel_clk_buf),
+	.core_rstn(caravel_rstn_buf),
+
+    // Pass thru Clock and reset
+	.clk_in(caravel_clk_buf),
+	.resetn_in(caravel_rstn_buf),
+	.clk_out(clk_passthru),
+	.resetn_out(resetn_passthru),
+
+	// GPIO (1 pin)
+	.gpio_out_pad(gpio_out_core),
+	.gpio_in_pad(gpio_in_core),
+	.gpio_mode0_pad(gpio_mode0_core),
+	.gpio_mode1_pad(gpio_mode1_core),
+	.gpio_outenb_pad(gpio_outenb_core),
+	.gpio_inenb_pad(gpio_inenb_core),
+
+	// Primary SPI flash controller
+	.flash_csb(flash_csb_core),
+	.flash_clk(flash_clk_core),
+	.flash_io0_oeb(flash_io0_oeb_core),
+	.flash_io0_di(flash_io0_di_core),
+	.flash_io0_do(flash_io0_do_core),
+	.flash_io1_oeb(flash_io1_oeb_core),
+	.flash_io1_di(flash_io1_di_core),
+	.flash_io1_do(flash_io1_do_core),
+	.flash_io2_oeb(flash_io2_oeb_core),
+	.flash_io2_di(flash_io2_di_core),
+	.flash_io2_do(flash_io2_do_core),
+	.flash_io3_oeb(flash_io3_oeb_core),
+	.flash_io3_di(flash_io3_di_core),
+	.flash_io3_do(flash_io3_do_core),
+
+	// Exported Wishbone Bus
+	.mprj_wb_iena(mprj_iena_wb),
+	.mprj_cyc_o(mprj_cyc_o_core),
+	.mprj_stb_o(mprj_stb_o_core),
+	.mprj_we_o(mprj_we_o_core),
+	.mprj_sel_o(mprj_sel_o_core),
+	.mprj_adr_o(mprj_adr_o_core),
+	.mprj_dat_o(mprj_dat_o_core),
+	.mprj_ack_i(mprj_ack_i_core),
+	.mprj_dat_i(mprj_dat_i_core),
+
+	.hk_stb_o(hk_stb_o),
+	.hk_cyc_o(hk_cyc_o),
+	.hk_dat_i(hk_dat_i),
+	.hk_ack_i(hk_ack_i),
+
+	// IRQ
+	.irq({irq_spi, user_irq}),
+	.user_irq_ena(user_irq_ena),
+
+	// Module status (these may or may not be implemented)
+	.qspi_enabled(qspi_enabled),
+	.uart_enabled(uart_enabled),
+	.spi_enabled(spi_enabled),
+	.debug_mode(debug_mode),
+
+	// Module I/O (these may or may not be implemented)
+	// UART
+	.ser_tx(ser_tx),
+	.ser_rx(ser_rx),
+	// SPI master
+	.spi_sdi(spi_sdi),
+	.spi_csb(spi_csb),
+	.spi_sck(spi_sck),
+	.spi_sdo(spi_sdo),
+	.spi_sdoenb(spi_sdoenb),
+	// Debug
+	.debug_in(debug_in),
+	.debug_out(debug_out),
+	.debug_oeb(debug_oeb),
+	// Logic analyzer
+	.la_input(la_data_in_mprj),
+	.la_output(la_data_out_mprj),
+	.la_oenb(la_oenb_mprj),
+	.la_iena(la_iena_mprj),
+
+`ifdef USE_SRAM_RO_INTERFACE
+	// SRAM Read-only access from housekeeping
+	.sram_ro_clk(hkspi_sram_clk),
+	.sram_ro_csb(hkspi_sram_csb),
+	.sram_ro_addr(hkspi_sram_addr),
+	.sram_ro_data(hkspi_sram_data),
+`endif
+
+	// Trap status
+	.trap(trap)
+    );
+
+    /* Clock and reset to user space are passed through a tristate	*/
+    /* buffer like the above, but since they are intended to be		*/
+    /* always active, connect the enable to the logic-1 output from	*/
+    /* the vccd1 domain.						*/
+
+    mgmt_protect mgmt_buffers (
+	`ifdef USE_POWER_PINS
+ 	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+	    .vccd2(vccd2_core),
+	    .vssd2(vssd2_core),
+	    .vdda1(vdda1_core),
+	    .vssa1(vssa1_core),
+	    .vdda2(vdda2_core),
+	    .vssa2(vssa2_core),
+	`endif
+	.caravel_clk(clk_passthru),
+	.caravel_clk2(caravel_clk2),
+	.caravel_rstn(resetn_passthru),
+	.mprj_iena_wb(mprj_iena_wb),
+	.mprj_cyc_o_core(mprj_cyc_o_core),
+	.mprj_stb_o_core(mprj_stb_o_core),
+	.mprj_we_o_core(mprj_we_o_core),
+	.mprj_sel_o_core(mprj_sel_o_core),
+	.mprj_adr_o_core(mprj_adr_o_core),
+	.mprj_dat_o_core(mprj_dat_o_core),
+	.mprj_ack_i_core(mprj_ack_i_core),
+	.mprj_dat_i_core(mprj_dat_i_core),
+	.user_irq_core(user_irq_core),
+	.user_irq_ena(user_irq_ena),
+	.la_data_out_core(la_data_out_user),
+	.la_data_out_mprj(la_data_out_mprj),
+	.la_data_in_core(la_data_in_user),
+	.la_data_in_mprj(la_data_in_mprj),
+	.la_oenb_mprj(la_oenb_mprj),
+	.la_oenb_core(la_oenb_user),
+	.la_iena_mprj(la_iena_mprj),
+
+	.user_clock(mprj_clock),
+	.user_clock2(mprj_clock2),
+	.user_reset(mprj_reset),
+	.mprj_cyc_o_user(mprj_cyc_o_user),
+	.mprj_stb_o_user(mprj_stb_o_user),
+	.mprj_we_o_user(mprj_we_o_user),
+	.mprj_sel_o_user(mprj_sel_o_user),
+	.mprj_adr_o_user(mprj_adr_o_user),
+	.mprj_dat_o_user(mprj_dat_o_user),
+	.mprj_dat_i_user(mprj_dat_i_user),
+	.mprj_ack_i_user(mprj_ack_i_user),
+	.user_irq(user_irq),
+	.user1_vcc_powergood(mprj_vcc_pwrgood),
+	.user2_vcc_powergood(mprj2_vcc_pwrgood),
+	.user1_vdd_powergood(mprj_vdd_pwrgood),
+	.user2_vdd_powergood(mprj2_vdd_pwrgood)
+    );
+
+    /*--------------------------------------------------*/
+    /* Wrapper module around the user project 		*/
+    /*--------------------------------------------------*/
+
+    user_project_wrapper mprj ( 
+        `ifdef USE_POWER_PINS
+	    .vdda1(vdda1_core),		// User area 1 3.3V power
+	    .vdda2(vdda2_core),		// User area 2 3.3V power
+	    .vssa1(vssa1_core),		// User area 1 analog ground
+	    .vssa2(vssa2_core),		// User area 2 analog ground
+	    .vccd1(vccd1_core),		// User area 1 1.8V power
+	    .vccd2(vccd2_core),		// User area 2 1.8V power
+	    .vssd1(vssd1_core),		// User area 1 digital ground
+	    .vssd2(vssd2_core),		// User area 2 digital ground
+    	`endif
+
+    	.wb_clk_i(mprj_clock),
+    	.wb_rst_i(mprj_reset),
+
+	// Management SoC Wishbone bus (exported)
+	.wbs_cyc_i(mprj_cyc_o_user),
+	.wbs_stb_i(mprj_stb_o_user),
+	.wbs_we_i(mprj_we_o_user),
+	.wbs_sel_i(mprj_sel_o_user),
+	.wbs_adr_i(mprj_adr_o_user),
+	.wbs_dat_i(mprj_dat_o_user),
+	.wbs_ack_o(mprj_ack_i_user),
+	.wbs_dat_o(mprj_dat_i_user),
+
+	// GPIO pad 3-pin interface (plus analog)
+	.io_in (user_io_in),
+    	.io_out(user_io_out),
+    	.io_oeb(user_io_oeb),
+	.analog_io(user_analog_io),
+
+	// Logic analyzer
+	.la_data_in(la_data_in_user),
+	.la_data_out(la_data_out_user),
+	.la_oenb(la_oenb_user),
+
+	// Independent clock
+	.user_clock2(mprj_clock2),
+
+	// IRQ
+	.user_irq(user_irq_core)
+    );
+
+    /*------------------------------------------*/
+    /* End user project instantiation		*/
+    /*------------------------------------------*/
+
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2_shifted;
+
+    assign gpio_serial_link_1_shifted = {gpio_serial_link_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_data_1};
+    // Note that serial_link_2 is backwards compared to serial_link_1, so it
+    // shifts in the other direction.
+    assign gpio_serial_link_2_shifted = {mprj_io_loader_data_2_buf,
+					 gpio_serial_link_2[`MPRJ_IO_PADS_2-1:1]};
+
+    // Propagating clock and reset to mitigate timing and fanout issues
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_load_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_load_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2_shifted;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2_shifted;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_load_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_load_2_shifted;
+
+    assign gpio_clock_1_shifted = {gpio_clock_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_clock};
+    assign gpio_clock_2_shifted = {mprj_io_loader_clock_buf,
+					gpio_clock_2[`MPRJ_IO_PADS_2-1:1]};
+    assign gpio_resetn_1_shifted = {gpio_resetn_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_resetn};
+    assign gpio_resetn_2_shifted = {mprj_io_loader_resetn_buf,
+					gpio_resetn_2[`MPRJ_IO_PADS_2-1:1]};
+    assign gpio_load_1_shifted = {gpio_load_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_strobe};
+    assign gpio_load_2_shifted = {mprj_io_loader_strobe_buf,
+					gpio_load_2[`MPRJ_IO_PADS_2-1:1]};
+
+    wire [2:0] spi_pll_sel;
+    wire [2:0] spi_pll90_sel;
+    wire [4:0] spi_pll_div;
+    wire [25:0] spi_pll_trim;
+
+    // Clocking control
+
+    caravel_clocking clock_ctrl (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+        .ext_clk_sel(ext_clk_sel),
+        .ext_clk(clock_core_buf),
+        .pll_clk(pll_clk),
+        .pll_clk90(pll_clk90),
+        .resetb(rstb_l_buf),
+        .sel(spi_pll_sel),
+        .sel2(spi_pll90_sel),
+        .ext_reset(ext_reset),  // From housekeeping SPI
+        .core_clk(caravel_clk),
+        .user_clk(caravel_clk2),
+        .resetb_sync(caravel_rstn)
+    );
+
+    // DCO/Digital Locked Loop
+
+    digital_pll pll (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+        .resetb(rstb_l_buf),
+        .enable(spi_pll_ena),
+        .osc(clock_core_buf),
+        .clockp({pll_clk, pll_clk90}),
+        .div(spi_pll_div),
+        .dco(spi_pll_dco_ena),
+        .ext_trim(spi_pll_trim)
+    );
+
+    // Housekeeping interface
+
+    housekeeping housekeeping (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+
+        .wb_clk_i(caravel_clk),
+        .wb_rstn_i(caravel_rstn),
+
+        .wb_adr_i(mprj_adr_o_core),
+        .wb_dat_i(mprj_dat_o_core),
+        .wb_sel_i(mprj_sel_o_core),
+        .wb_we_i(mprj_we_o_core),
+        .wb_cyc_i(hk_cyc_o),
+        .wb_stb_i(hk_stb_o),
+        .wb_ack_o(hk_ack_i),
+        .wb_dat_o(hk_dat_i),
+
+        .porb(porb_l),
+
+        .pll_ena(spi_pll_ena),
+        .pll_dco_ena(spi_pll_dco_ena),
+        .pll_div(spi_pll_div),
+        .pll_sel(spi_pll_sel),
+        .pll90_sel(spi_pll90_sel),
+        .pll_trim(spi_pll_trim),
+        .pll_bypass(ext_clk_sel),
+
+	.qspi_enabled(qspi_enabled),
+	.uart_enabled(uart_enabled),
+	.spi_enabled(spi_enabled),
+	.debug_mode(debug_mode),
+
+	.ser_tx(ser_tx),
+	.ser_rx(ser_rx),
+
+	.spi_sdi(spi_sdi),
+	.spi_csb(spi_csb),
+	.spi_sck(spi_sck),
+	.spi_sdo(spi_sdo),
+	.spi_sdoenb(spi_sdoenb),
+
+	.debug_in(debug_in),
+	.debug_out(debug_out),
+	.debug_oeb(debug_oeb),
+
+        .irq(irq_spi),
+        .reset(ext_reset),
+
+        .serial_clock(mprj_io_loader_clock),
+        .serial_load(mprj_io_loader_strobe),
+        .serial_resetn(mprj_io_loader_resetn),
+        .serial_data_1(mprj_io_loader_data_1),
+        .serial_data_2(mprj_io_loader_data_2),
+
+	.mgmt_gpio_in(mgmt_io_in_hk),
+	.mgmt_gpio_out(mgmt_io_out_hk),
+	.mgmt_gpio_oeb(mgmt_io_oeb_hk),
+
+	.pwr_ctrl_out(pwr_ctrl_nc),	/* Not used in this version */
+
+        .trap(trap),
+
+	.user_clock(caravel_clk2),
+
+        .mask_rev_in(mask_rev),
+
+	.spimemio_flash_csb(flash_csb_core),
+	.spimemio_flash_clk(flash_clk_core),
+	.spimemio_flash_io0_oeb(flash_io0_oeb_core),
+	.spimemio_flash_io1_oeb(flash_io1_oeb_core),
+	.spimemio_flash_io2_oeb(flash_io2_oeb_core),
+	.spimemio_flash_io3_oeb(flash_io3_oeb_core),
+	.spimemio_flash_io0_do(flash_io0_do_core),
+	.spimemio_flash_io1_do(flash_io1_do_core),
+	.spimemio_flash_io2_do(flash_io2_do_core),
+	.spimemio_flash_io3_do(flash_io3_do_core),
+	.spimemio_flash_io0_di(flash_io0_di_core),
+	.spimemio_flash_io1_di(flash_io1_di_core),
+	.spimemio_flash_io2_di(flash_io2_di_core),
+	.spimemio_flash_io3_di(flash_io3_di_core),
+
+	.pad_flash_csb(flash_csb_frame),
+	.pad_flash_csb_oeb(flash_csb_oeb),
+	.pad_flash_clk(flash_clk_frame),
+	.pad_flash_clk_oeb(flash_clk_oeb),
+	.pad_flash_io0_oeb(flash_io0_oeb),
+	.pad_flash_io1_oeb(flash_io1_oeb),
+	.pad_flash_io0_ieb(flash_io0_ieb),
+	.pad_flash_io1_ieb(flash_io1_ieb),
+	.pad_flash_io0_do(flash_io0_do),
+	.pad_flash_io1_do(flash_io1_do),
+	.pad_flash_io0_di(flash_io0_di_buf),
+	.pad_flash_io1_di(flash_io1_di_buf),
+
+`ifdef USE_SRAM_RO_INTERFACE
+	.sram_ro_clk(hkspi_sram_clk),
+	.sram_ro_csb(hkspi_sram_csb),
+	.sram_ro_addr(hkspi_sram_addr),
+	.sram_ro_data(hkspi_sram_data),
+`endif
+
+	.usr1_vcc_pwrgood(mprj_vcc_pwrgood),
+	.usr2_vcc_pwrgood(mprj2_vcc_pwrgood),
+	.usr1_vdd_pwrgood(mprj_vdd_pwrgood),
+	.usr2_vdd_pwrgood(mprj2_vdd_pwrgood)
+    );
+
+    /* GPIO defaults (via programmed) */
+    wire [`MPRJ_IO_PADS*13-1:0] gpio_defaults;
+
+    /* Fixed defaults for the first 5 GPIO pins */
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h1803)
+    ) gpio_defaults_block_0 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[12:0])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h1803)
+    ) gpio_defaults_block_1 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[25:13])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0403)
+    ) gpio_defaults_block_2 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[38:26])
+    );
+
+    // CSB pin is set as an internal pull-up
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0801)
+    ) gpio_defaults_block_3 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[51:39])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0403)
+    ) gpio_defaults_block_4 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[64:52])
+    );
+
+    /* Via-programmable defaults for the rest of the GPIO pins */
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_5_INIT)
+    ) gpio_defaults_block_5 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[77:65])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_6_INIT)
+    ) gpio_defaults_block_6 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[90:78])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_7_INIT)
+    ) gpio_defaults_block_7 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[103:91])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_8_INIT)
+    ) gpio_defaults_block_8 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[116:104])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_9_INIT)
+    ) gpio_defaults_block_9 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[129:117])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_10_INIT)
+    ) gpio_defaults_block_10 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[142:130])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_11_INIT)
+    ) gpio_defaults_block_11 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[155:143])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_12_INIT)
+    ) gpio_defaults_block_12 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[168:156])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_13_INIT)
+    ) gpio_defaults_block_13 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[181:169])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_14_INIT)
+    ) gpio_defaults_block_14 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[194:182])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_15_INIT)
+    ) gpio_defaults_block_15 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[207:195])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_16_INIT)
+    ) gpio_defaults_block_16 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[220:208])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_17_INIT)
+    ) gpio_defaults_block_17 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[233:221])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_18_INIT)
+    ) gpio_defaults_block_18 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[246:234])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_19_INIT)
+    ) gpio_defaults_block_19 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[259:247])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_20_INIT)
+    ) gpio_defaults_block_20 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[272:260])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_21_INIT)
+    ) gpio_defaults_block_21 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[285:273])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_22_INIT)
+    ) gpio_defaults_block_22 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[298:286])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_23_INIT)
+    ) gpio_defaults_block_23 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[311:299])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_24_INIT)
+    ) gpio_defaults_block_24 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[324:312])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_25_INIT)
+    ) gpio_defaults_block_25 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[337:325])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_26_INIT)
+    ) gpio_defaults_block_26 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[350:338])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_27_INIT)
+    ) gpio_defaults_block_27 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[363:351])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_28_INIT)
+    ) gpio_defaults_block_28 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[376:364])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_29_INIT)
+    ) gpio_defaults_block_29 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[389:377])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_30_INIT)
+    ) gpio_defaults_block_30 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[402:390])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_31_INIT)
+    ) gpio_defaults_block_31 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[415:403])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_32_INIT)
+    ) gpio_defaults_block_32 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[428:416])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_33_INIT)
+    ) gpio_defaults_block_33 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[441:429])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_34_INIT)
+    ) gpio_defaults_block_34 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[454:442])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_35_INIT)
+    ) gpio_defaults_block_35 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[467:455])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_36_INIT)
+    ) gpio_defaults_block_36 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[480:468])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_37_INIT)
+    ) gpio_defaults_block_37 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[493:481])
+    );
+
+    // Each control block sits next to an I/O pad in the user area.
+    // It gets input through a serial chain from the previous control
+    // block and passes it to the next control block.  Due to the nature
+    // of the shift register, bits are presented in reverse, as the first
+    // bit in ends up as the last bit of the last I/O pad control block.
+
+    // There are two types of block;  the first two and the last two
+    // are configured to be full bidirectional under control of the
+    // management Soc (JTAG and SDO for the first two;  flash_io2 and
+    // flash_io3 for the last two).  The rest are configured to be default
+    // (input).  Note that the first two and last two are the ones closest
+    // to the management SoC on either side, which minimizes the wire length
+    // of the extra signals those pads need.
+
+    /* First two GPIOs (JTAG and SDO) */
+
+    gpio_control_block gpio_control_bidir_1 [1:0] (
+    	`ifdef USE_POWER_PINS
+	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[25:0]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[1:0]),
+    	.serial_clock(gpio_clock_1_shifted[1:0]),
+    	.serial_load(gpio_load_1_shifted[1:0]),
+
+    	.resetn_out(gpio_resetn_1[1:0]),
+    	.serial_clock_out(gpio_clock_1[1:0]),
+    	.serial_load_out(gpio_load_1[1:0]),
+
+    	.mgmt_gpio_in(mgmt_io_in[1:0]),
+	.mgmt_gpio_out(mgmt_io_out[1:0]),
+	.mgmt_gpio_oeb(mgmt_io_oeb[1:0]),
+
+        .one(mprj_io_one[1:0]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[1:0]),
+    	.serial_data_out(gpio_serial_link_1[1:0]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[1:0]),
+    	.user_gpio_oeb(user_io_oeb[1:0]),
+    	.user_gpio_in(user_io_in[1:0]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[1:0]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[1:0]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[1:0]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[1:0]),
+    	.pad_gpio_holdover(mprj_io_holdover[1:0]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[1:0]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[1:0]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[1:0]),
+    	.pad_gpio_dm(mprj_io_dm[5:0]),
+    	.pad_gpio_outenb(mprj_io_oeb[1:0]),
+    	.pad_gpio_out(mprj_io_out[1:0]),
+    	.pad_gpio_in(mprj_io_in[1:0])
+    );
+
+    /* Section 1 GPIOs (GPIO 2 to 7) that start up under management control */
+
+    gpio_control_block gpio_control_in_1a [5:0] (
+        `ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[103:26]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[7:2]),
+    	.serial_clock(gpio_clock_1_shifted[7:2]),
+    	.serial_load(gpio_load_1_shifted[7:2]),
+
+    	.resetn_out(gpio_resetn_1[7:2]),
+    	.serial_clock_out(gpio_clock_1[7:2]),
+    	.serial_load_out(gpio_load_1[7:2]),
+
+	.mgmt_gpio_in(mgmt_io_in[7:2]),
+	.mgmt_gpio_out(mgmt_io_out[7:2]),
+	.mgmt_gpio_oeb(mprj_io_one[7:2]),
+
+        .one(mprj_io_one[7:2]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[7:2]),
+    	.serial_data_out(gpio_serial_link_1[7:2]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[7:2]),
+    	.user_gpio_oeb(user_io_oeb[7:2]),
+    	.user_gpio_in(user_io_in[7:2]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[7:2]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[7:2]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[7:2]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[7:2]),
+    	.pad_gpio_holdover(mprj_io_holdover[7:2]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[7:2]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[7:2]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[7:2]),
+    	.pad_gpio_dm(mprj_io_dm[23:6]),
+    	.pad_gpio_outenb(mprj_io_oeb[7:2]),
+    	.pad_gpio_out(mprj_io_out[7:2]),
+    	.pad_gpio_in(mprj_io_in[7:2])
+    );
+
+    /* Section 1 GPIOs (GPIO 8 to 18) */
+
+    gpio_control_block gpio_control_in_1 [`MPRJ_IO_PADS_1-9:0] (
+        `ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS_1*13-1):104]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_clock(gpio_clock_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_load(gpio_load_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+
+    	.resetn_out(gpio_resetn_1[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_clock_out(gpio_clock_1[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_load_out(gpio_load_1[(`MPRJ_IO_PADS_1-1):8]),
+
+	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS_1-1):8]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS_1-1):8]),
+	.mgmt_gpio_oeb(mprj_io_one[(`MPRJ_IO_PADS_1-1):8]),
+  
+        .one(mprj_io_one[(`MPRJ_IO_PADS_1-1):8]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_data_out(gpio_serial_link_1[(`MPRJ_IO_PADS_1-1):8]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS_1-1):8]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS_1-1):8]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS_1-1):8]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS_1*3-1):24]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS_1-1):8])
+    );
+
+    /* Last three GPIOs (spi_sdo, flash_io2, and flash_io3) */
+
+    gpio_control_block gpio_control_bidir_2 [2:0] (
+    	`ifdef USE_POWER_PINS
+	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-1):(`MPRJ_IO_PADS*13-39)]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_clock(gpio_clock_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_load(gpio_load_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	.resetn_out(gpio_resetn_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_clock_out(gpio_clock_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_load_out(gpio_load_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+	.mgmt_gpio_oeb(mgmt_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+
+        .one(mprj_io_one[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-1):(`MPRJ_IO_PADS*3-9)]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)])
+    );
+
+    /* Section 2 GPIOs (GPIO 19 to 34) */
+
+    gpio_control_block gpio_control_in_2 [`MPRJ_IO_PADS_2-4:0] (
+    	`ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-40):(`MPRJ_IO_PADS_1*13)]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_clock(gpio_clock_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_load(gpio_load_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+
+    	.resetn_out(gpio_resetn_2[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_clock_out(gpio_clock_2[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_load_out(gpio_load_2[(`MPRJ_IO_PADS_2-4):0]),
+
+	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+	.mgmt_gpio_oeb(mprj_io_one[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+
+
+        .one(mprj_io_one[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-4):0]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-10):(`MPRJ_IO_PADS_1*3)]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)])
+    );
+
+    user_id_programming #(
+	.USER_PROJECT_ID(USER_PROJECT_ID)
+    ) user_id_value (
+	`ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+	`endif
+	.mask_rev(mask_rev)
+    );
+
+    // Power-on-reset circuit
+    simple_por por (
+	`ifdef USE_POWER_PINS
+		.vdd3v3(vddio_core),
+		.vdd1v8(vccd_core),
+		.vss3v3(vssio_core),
+		.vss1v8(vssd_core),
+	`endif
+		.porb_h(porb_h),
+		.porb_l(porb_l),
+		.por_l(por_l)
+    );
+
+    // XRES (chip input pin reset) reset level converter
+    xres_buf rstb_level (
+	`ifdef USE_POWER_PINS
+		.VPWR(vddio_core),
+		.LVPWR(vccd_core),
+		.LVGND(vssd_core),
+		.VGND(vssio_core),
+	`endif
+		.A(rstb_h),
+		.X(rstb_l)
+    );
+
+    /* Spare logic for metal mask fixes */
+    // `define NUM_SPARE_BLOCKS (`MPRJ_IO_PADS+4)
+    `define NUM_SPARE_BLOCKS 4
+
+    wire [(27*`NUM_SPARE_BLOCKS)-1:0] spare_xz_nc;
+    wire [(4*`NUM_SPARE_BLOCKS)-1:0] spare_xi_nc;
+    wire [(1*`NUM_SPARE_BLOCKS)-1:0] spare_xib_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xna_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xno_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xmx_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xfq_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xfqn_nc;
+
+    // Four spare logic blocks above the processor and one per GPIO
+    // control block.
+    spare_logic_block spare_logic [`NUM_SPARE_BLOCKS-1:0] (
+	`ifdef USE_POWER_PINS
+		.vccd(vccd_core),
+		.vssd(vssd_core),
+	`endif
+		.spare_xz(spare_xz_nc),
+		.spare_xi(spare_xi_nc),
+		.spare_xib(spare_xib_nc),
+		.spare_xna(spare_xna_nc),
+		.spare_xno(spare_xno_nc),
+		.spare_xmx(spare_xmx_nc),
+		.spare_xfq(spare_xfq_nc),
+		.spare_xfqn(spare_xfqn_nc)
+    );
+
+    `ifdef TOP_ROUTING
+    caravel_power_routing caravel_power_routing();
+    copyright_block copyright_block();
+    caravel_logo caravel_logo();
+    caravel_motto caravel_motto();
+    open_source open_source();
+    user_id_textblock user_id_textblock();
+    `endif
+
+endmodule
+// `default_nettype wire