)]}'
{
  "commit": "bfd401a927a57d5ac3b629d20b369ee7b047ca34",
  "tree": "c939459732094d9ae49eacc10335d62be1b5afa3",
  "parents": [
    "eedfbaed33eb69eb7f9d101e70bbfcff69e42b96"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Wed Oct 05 14:37:32 2022 -0400"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Wed Oct 05 14:37:32 2022 -0400"
  },
  "message": "Corrected the pull-up and pull-down definitions in the user_defines\nverilog RTL, which were swapped.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c97c0d7d2b644fe63cef4ffcdcdb4a1415db6a2e",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_defines.v",
      "new_id": "c5f1c757d9199615e661f6720648c75cf8abf85f",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_defines.v"
    }
  ]
}