[
    {
        "project": {
            "wokwi_id": 339501025136214612,
            "git_url": "https://github.com/TinyTapeout/tt02-test-straight"
        },
        "documentation": {
            "author": "Matt Venn",
            "title": "Test Straight Project",
            "description": "connects the inputs direct to the outputs",
            "how_it_works": "n/a",
            "how_to_test": "setting each switch to on should set the corresponding led on",
            "external_hw": "",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "matrix.v"
            ],
            "top_module": "chrisruk_matrix",
            "git_url": "https://github.com/chrisruk/matrixchip"
        },
        "documentation": {
            "author": "Chris",
            "discord": "hoglet",
            "title": "Scrolling Binary Matrix display",
            "description": "Display scrolling binary data from input pin on 8x8 SK9822 matrix display",
            "how_it_works": "Uses 8x8 matrix SK9822 display to scroll binary data from input pin",
            "how_to_test": "Need 8x8 SK9822 display and level shifter to convert output clock and data logic to 5V logic",
            "external_hw": "Requires SK9822 display and 3.3V to 5V logic level shifter",
            "language": "verilog",
            "doc_link": "https://github.com/chrisruk/matrixchip/blob/main/README.md",
            "clock_hz": 6000,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "digit",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "LED Clock",
                "LED Data",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "sequencer.v"
            ],
            "top_module": "loxodes_sequencer",
            "git_url": "https://github.com/loxodes/tt02-submission-loxodes"
        },
        "documentation": {
            "author": "Jon Klein",
            "discord": "loxodes",
            "title": "Power supply sequencer",
            "description": "Sequentially enable and disable channels with configurable delay",
            "how_it_works": "Counters and registers control and track the state of channel activations. The delay input sets the counter threshold.",
            "how_to_test": "After reset, bring enable high to enable channels sequentially, starting with channel 0. Bring enable low to switch off channels sequentially, starting with channel 7.",
            "external_hw": "None, but could be useful for GaAs amplifiers or other circuits which need sequenced power supplies.",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 12500,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "enable",
                "delay0",
                "delay1",
                "delay2",
                "delay3",
                "delay4"
            ],
            "outputs": [
                "channel 0",
                "channel 1",
                "channel 2",
                "channel 3",
                "channel 4",
                "channel 5",
                "channel 6",
                "channel 7"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "top.v",
                "pwm.v",
                "debouncer.v",
                "synchronizer.v"
            ],
            "top_module": "migcorre_pwm",
            "git_url": "https://github.com/migcorre/tt02-dc"
        },
        "documentation": {
            "author": "Marcelo Pouso / Miguel Correia",
            "discord": "not",
            "title": "Duty Controler",
            "description": "Increase/Decrease a duty cycle of square signal",
            "how_it_works": "Enter a square clock of 12.5Khz, and change Its duty cycle by pressing increase or decrease bottom. the change will be in steps of 10%. We have in mind the problem of bouncing bottom, and this was implemented for incremental and decremental bottom.  ",
            "how_to_test": "You need connect a signal clock of 12.5Khz in the io_in[0] port, a reset active high in io_in[1], a incremental signal in io_in[2], and the decremental signal in io_in[3]. The output signal will be in the io_out[0] port and the negate output in io_out[1]. The signal output will have a frecuency of 10Khz. When you press the incremental input bottom then the signal will increment by 10% Its duty cycle, and when you press the decremental input bottom you will see that the output signal decrement by 10%.",
            "external_hw": "You are gonna need a 12.5Khz clock signal generator, and 2 bottoms for incremental and decremental inputs. An oscilloscope to see the output PWM 1.2KHZ signal. ",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 12500,
            "picture": "",
            "inputs": [
                {
                    "clock": "Clock input of 12.5Khz."
                },
                {
                    "reset": "Reset active high."
                },
                {
                    "increase": "This will increase the final duty cycle of the output signal by 10%."
                },
                {
                    "decrease": "This will decrease the final duty cycle of the output signal by 10%."
                },
                {
                    "disable_debouncer": "Disable debouncer for the increase / decrease inputs."
                },
                "none",
                "none",
                "none"
            ],
            "outputs": [
                {
                    "pwm": "PWM output signal of input clk/10 = 1.2Khz."
                },
                {
                    "pwm_neg": "PWM negate output signal."
                },
                {
                    "increase": "Syncronized signal from increase input."
                },
                {
                    "decrease": "Syncronized signal from decrease input."
                },
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "s4ga.v"
            ],
            "top_module": "s4ga",
            "git_url": "https://github.com/grayresearch/tt02-s4ga"
        },
        "documentation": {
            "author": "Jan Gray",
            "discord": "jangray",
            "title": "S4GA: Super Slow Serial SRAM FPGA",
            "description": "one fracturable 5-LUT that receives FPGA LUT configuration frames, serially evaluates LUT inputs and LUT outputs",
            "how_it_works": "The design is a single physical LUT into which an external agent pours a series of 72b LUT configuration frames, four bits per cycle. Every 18 clock cycles it evaluates a 5-input LUT. The last N=67 LUT output values are kept on die to be used as LUT inputs of subsequent LUTs. The design also has 2 FPGA input pins and 7 FPGA output pins.",
            "how_to_test": "tricky",
            "external_hw": "serial SRAM or FLASH",
            "language": "verilog",
            "doc_link": "https://github.com/grayresearch/tt02-s4ga/blob/main/README.md",
            "clock_hz": "",
            "picture": "doc/S4GA-block-diagram.png",
            "inputs": [
                "clk",
                "rst",
                "si[0]",
                "si[1]",
                "si[2]",
                "si[3]",
                "in[0]",
                "in[1]"
            ],
            "outputs": [
                "out[0]",
                "out[1]",
                "out[2]",
                "out[3]",
                "out[4]",
                "out[5]",
                "out[6]",
                "debug"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "alu.v",
                "alu_top.v"
            ],
            "top_module": "alu_top",
            "git_url": "https://github.com/ryancor/tt02-submission-template"
        },
        "documentation": {
            "author": "Ryan C",
            "discord": "hackeranium",
            "title": "CPU",
            "description": "2bit ALU",
            "how_it_works": "todo",
            "how_to_test": "todo",
            "external_hw": "todo",
            "language": "Verilog",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "mccoy.v",
                "add1.v",
                "alu.v",
                "branch.v",
                "decoder.v",
                "iSign.v",
                "mux2.v",
                "mux3.v",
                "mux4.v",
                "notx8.v",
                "pc.v",
                "register.v",
                "x8.v"
            ],
            "top_module": "aidan_McCoy",
            "git_url": "https://github.com/AidanGood/tt02-McCoy"
        },
        "documentation": {
            "author": "Aidan Good",
            "discord": "Aidan G",
            "title": "The McCoy 6-bit Microprocessor",
            "description": "Custom RISC-V inspired microprocessor capable of simple arithmatic, branching, and jumps through a custom ISA.",
            "how_it_works": "This chip contains an opcode decoder, 6-bit ALU, 7 general purpose and 3 special purpose 6-bit registers, branch target selector, and other supporting structures all connected together to make a 1-stage microprocessor",
            "how_to_test": "To put the processor in a valid state, hold the reset pin high for one clock cycle. Instructions can begin to be fed into the processor at the beginning of the next cycle when reset is set low. When the clock signal is high, the PC will be output. When the clock signal is low, the x8 register will be output. There are example programs in the testbench folder and a more thourough explaination in the project readme.",
            "external_hw": "Any source that allows for 14 GPIO pins. 8 to set the input pins, 6 to read the output pins.",
            "language": "Whole thing is wrote and tested in verilog",
            "doc_link": "https://github.com/cpldcpu/tinytapeout_mcpu5/blob/main/README.md",
            "clock_hz": null,
            "picture": "",
            "inputs": [
                "clk",
                "reset",
                "in0",
                "in1",
                "in2",
                "in3",
                "in4",
                "in5"
            ],
            "outputs": [
                "out0",
                "out1",
                "out2",
                "out3",
                "out4",
                "out5",
                "N/A",
                "N/A"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "binary_clock.v"
            ],
            "top_module": "azdle_binary_clock",
            "git_url": "https://github.com/azdle/binary-clock-asic"
        },
        "documentation": {
            "author": "Azdle",
            "discord": "azdle",
            "title": "binary clock",
            "description": "A binary clock using multiplexed LEDs",
            "how_it_works": "Using the internal clock, minutes and hours are counted in registers with an overflow comparision. An overflow in one, triggers a rising edge on the clock input of the successive register.\nThe values of each register are connected to the input to a multiplexer, which is able to control 16 LEDs using just the 8 outputs.\n",
            "how_to_test": "after reset, the output shows the current time in BCD H:M when applied to a multiplexed array of LEDs\n",
            "external_hw": "",
            "language": "verilog",
            "doc_link": "https://github.com/azdle/binary-clock-asic",
            "clock_hz": 100,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "col 0",
                "col 1",
                "col 2",
                "col 3",
                "row 0",
                "row 2",
                "row 3",
                "row 4"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 347787021138264660,
            "git_url": "https://github.com/justinP-wrk/tt02-TinySensor"
        },
        "documentation": {
            "author": "Justin Pelan",
            "discord": "Tavangel",
            "title": "TinySensor",
            "description": "Using external hardware photodiodes as inputs, display light intensity on the 7-segment display",
            "how_it_works": "inputs 1 - 7 will be connected to external photodiodes to read either a '0' or '1', inputs will be added together and displayed on the 7-segment display",
            "how_to_test": "the dip switches can be used in place of external hw, simply throw the switches and the total number should show up on the 7-segment display",
            "external_hw": "Breadboard, resistors, photodiodes, specific part# TBD",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "TT01.png",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "sram_top.v"
            ],
            "top_module": "jar_sram_top",
            "git_url": "https://github.com/jar/tt02_sram"
        },
        "documentation": {
            "author": "James Ross",
            "discord": "jar",
            "title": "8x8 SRAM",
            "description": "Write to and Read from 8 addressable 8-bit words of memory",
            "how_it_works": "Write Enable (WE) pin high while passing 4-bits low data, 4-bits high data into an 8-bit temporary shift register. Then Commit high while passing a 3-bit address places the register value into memory. While Output Enable (OE) high, a 3-bit address places the data from memory into the temporary register returns 8-bit register to output data interface.  The highest 4th bit of the address is ignored. Fast memset, such as zeroing memory, can be performed with Commit high while passing a new address per clock cycle.",
            "how_to_test": "After reset, you can write values into memory and read back. See the verilator testbench.",
            "external_hw": "",
            "language": "verilog",
            "doc_link": "https://github.com/jar/tt02_sram/blob/main/README.md",
            "clock_hz": 0,
            "picture": "8x8sram.svg",
            "inputs": [
                "clk",
                "we",
                "oe",
                "commit",
                "addr[0]/high[0]/low[0]",
                "addr[1]/high[1]/low[1]",
                "addr[2]/high[2]/low[2]",
                "xxxxxxx/high[3]/low[3]"
            ],
            "outputs": [
                "data[0]",
                "data[1]",
                "data[2]",
                "data[3]",
                "data[4]",
                "data[5]",
                "data[6]",
                "data[7]"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 347690870424732244,
            "git_url": "https://github.com/JensIMS/tt02-trafficlight"
        },
        "documentation": {
            "author": "Jens Schleusner",
            "discord": "Jens S",
            "title": "German Traffic Light State Machine",
            "description": "A state machine to control german traffic lights at an intersection.",
            "how_it_works": "A state machine generates signals for vehicle and pedestrian traffic lights at an intersection of a main street and a side street. A blinking yellow light for the side street is generated in the reset state.",
            "how_to_test": "Provide a clock, hook up LEDs and generate a reset signal to reset the intersection to all-red. If your leave the reset signal enabled, a blinking yellow light is shown for the side street.",
            "external_hw": "An additional inverter is required to generate the pedestrian red signals from the green output. Hookup your own LEDs for the signals.",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 1,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "main street red",
                "main street yellow",
                "main street green",
                "main street pedestrian green",
                "side street red",
                "side street yellow",
                "side street green",
                "side street pedestrian green"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 347592305412145748,
            "git_url": "https://github.com/svd321/tt02-Ising"
        },
        "documentation": {
            "author": "Seppe Van Dyck",
            "title": "4-spin Ising Chain Simulation",
            "description": "A self-contained physics simulation. This circuit simulates 4 spins of an Ising chain in  an external field.",
            "how_it_works": "It runs the Metropolis-Hastings monte-carlo algorithm to simulate 4 Ising spins in a linear chain with two external neighbours and an external field. Every monte-carlo step (10 clock cycles) a random number is created through a 32-bit LFSR and is compared to an 8-bit representations of the acceptance probability of a random spin flip.",
            "how_to_test": "When you only enable one of the neighbours and leave everything else 0, the system will evolve into a ground state with every other spin pointing up.",
            "external_hw": "",
            "language": "wokwi",
            "doc_link": "README.md",
            "clock_hz": 20,
            "picture": "Overview.png",
            "inputs": [
                "clock, clock input.",
                "T0, LSB of the 3-bit temperature representation.",
                "T1, Middle bit of the 3-bit temperature.",
                "T2, MSB of the 3-bit temperature.",
                "N1, Value of neighbour 1 (up/1 or down/0).",
                "N2, Value of neighbour 2 (up/1 or down/0).",
                "J, The sign of the NN coupling constant J (+/1 or -/0).",
                "H, Value of the coupling to the external field H (1 or 0)."
            ],
            "outputs": [
                "segment a, Spin 0.",
                "segment b, Spin 1.",
                "segment c, Spin 2.",
                "segment d, Spin 3.",
                "segment e, Neighbour 2.",
                "segment f, Neighbour 1.",
                "none",
                "segment h, MC Step Indicator."
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "toplevel/logisimTopLevelShell.v",
                "circuit/CPU.v",
                "circuit/clock_gen_2.v",
                "circuit/dest_reg_sel_new.v",
                "circuit/eq_0.v",
                "circuit/inst_dec.v",
                "circuit/int_memory.v",
                "circuit/main.v",
                "circuit/output_logic.v",
                "gates/AND_GATE.v",
                "gates/AND_GATE_BUS.v",
                "gates/NAND_GATE.v",
                "gates/NOR_GATE.v",
                "gates/OR_GATE.v",
                "gates/OR_GATE_BUS.v",
                "gates/OR_GATE_BUS_3_INPUTS.v",
                "gates/OR_GATE_BUS_4_INPUTS.v",
                "gates/XOR_GATE_ONEHOT.v",
                "memory/D_FLIPFLOP.v",
                "memory/REGISTER_FLIP_FLOP.v",
                "plexers/Demultiplexer_8.v"
            ],
            "top_module": "tholin_avalonsemi_5401",
            "git_url": "https://github.com/89Mods/tt2-AvalonSemi-5401"
        },
        "documentation": {
            "author": "Tholin",
            "title": "Avalon Semiconductors '5401' 4-bit Microprocessor",
            "description": "4-bit CPU capable of addressing 4096 bytes program memory and 254 words data memory, with 6 words of on-chip RAM and two general-purpose input ports. Hopefully capable of more complex computation than previous CPU submissions.",
            "how_it_works": "The chip contains a 4-bit ALU, a 4-bit Accumulator, 8-bit Memory Address Register and 12-bit \u02ddDestination Register\u02dd, which is used to buffer branch target addresses. It also has two general-purpose input ports. The instruction set consists of 16 instructions, containing arihmatic, logical, load/store, branch and conditional branch instruction. See the full documentation for a complete architectural description.",
            "how_to_test": "It is possible to test the CPU using a debounced push button as the clock, and using the DIP switches on the PCB to key in instructions manually. Set the switches to 0100_0000 to assert RST, and pulse the clock a few times. Then, change the switches to 0000_1000 (SEI instruction) and pulse the clock four times. After that, set the switches to all 0s (LD instruction). Pulse the clock once, then change the switches to 0001_0100, and pulse the clock three more times. Lastly, set the switches to 0011_1100 (LMH instruction). If done correctly, after two pulses of the clock, the outputs will read 0101_0000 and two more pulses after that, they will be xxxx_1000 (\u2019x\u2019 means don\u2019t care). This sequence should repeat for as long as you keep pulsing the clock, without changing the inputs.",
            "external_hw": "At the very minimum a program memory, and the required glue logic. See \u02ddExample system diagram\u02dd in the full documentation.",
            "language": "verilog",
            "doc_link": "https://github.com/89Mods/tt2-AvalonSemi-5401/blob/main/README.md",
            "clock_hz": 6000,
            "picture": "assets/block_diag.png",
            "inputs": [
                "CLK",
                "RST",
                "I0 / D0",
                "I1 / D1",
                "I2 / D2",
                "I3 / D3",
                "EF0",
                "EF1"
            ],
            "outputs": [
                "MAR0 / DR0 / DR8 / RR0",
                "MAR1 / DR1 / DR9 / RR1",
                "MAR2 / DR2 / DR10 / RR2",
                "MAR3 / DR3 / DR11 / RR3",
                "MAR4 / DR4 / F_MAR",
                "MAR5 / DR5 / F_WRITE",
                "MAR6 / DR6 / F_JMP",
                "MAR7 / DR7 / F_I"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "tiny_fft.v"
            ],
            "top_module": "tiny_fft",
            "git_url": "https://github.com/RiceShelley/tiny-fft"
        },
        "documentation": {
            "author": "Rice Shelley",
            "discord": "ganesh",
            "title": "small FFT",
            "description": "Computes a small fft",
            "how_it_works": "Takes 4 4-bit signed inputs (real integer numbers) and outputs 4 6-bit complex numbers",
            "how_to_test": "after reset, use the write enable signal to write 4 inputs. Read the output for the computer FFT.",
            "external_hw": "",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 1000,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "wrEn",
                "none",
                "data_in_0",
                "data_in_1",
                "data_in_2",
                "data_in_3"
            ],
            "outputs": [
                "rd_idx_zero",
                "none",
                "data_out_0",
                "data_out_1",
                "data_out_2",
                "data_out_3",
                "data_out_4",
                "data_out_5"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 346553315158393428,
            "git_url": "https://github.com/moyesw/tt02-moyesw-StreamIntegrator"
        },
        "documentation": {
            "author": "William Moyes",
            "title": "Stream Integrator",
            "description": "A silicon implementation of a simple optical computation",
            "how_it_works": "It is possible to generate a pseudorandom bit sequence optomechanically using four loops of punched paper tape. Each of the four tape loops, labeled A, B, C, and D, encodes one bit of information per linear position using a tape specific hole pattern. The patterns are TapeA_0=XOOO, TapeA_1=OXOO, TapeB_0=OOXO, TapeB_1=OOOX, TapeC_0=OOXX, TapeC_1=XXOO, TapeD_0=OXOX, TapeD_1=XOXO, where O is a hole, and X is filled. The pseudorandom sequence is obtained by physically stacking the four tapes together at a single linear point, and observing if light can pass through any of the four hole positions. If all four hole positions are blocked, a 0 is generated. If any of the four holes allows light to pass, a 1 is generated. The next bit is obtained by advancing all four tapes by one linear position and repeating the observation. By using the specified bit encoding patterns, the expression (C ? A : B) ^ D is calculated. If all four tapes are punched with randomly chosen 1 and 0 patterns, and each tape's length is relatively prime to the other tape lengths, then a maximum generator period is obtained. This TinyTapeout-02 minimal project was inspired by the paper tape pseudorandom bit sequence generator. It implements the core (C ? A : B) ^ D operation electrically instead of optomechanically. An extra ^ E term is added for ease of use.",
            "how_to_test": "Run through the 32 possible input patterns, and verify the expected output value is observed. Counting from 00000 to 111111, where IN0 is the LSB (i.e. Tape A), and IN4 (i.e. Extra E) is the MSB should yield the pattern: 01010011101011001010110001010011.",
            "external_hw": "",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "Value from Tape A",
                "Value from Tape B",
                "Value from Tape C",
                "Value from Tape D",
                "Extra term XORed with generator output",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "Output",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 347894637149553236,
            "git_url": "https://github.com/Tschucker/tt02-submission-tiny-fir"
        },
        "documentation": {
            "author": "Tom Schucker",
            "discord": "tdsepsilon",
            "title": "tiny-fir",
            "description": "4bit 2-stage FIR filter",
            "how_it_works": "Multiplies the input by the tap coefficient for each stage and outputs the sum of all stages",
            "how_to_test": "Load tap coefficients by setting the value and pulsing 2 times, then repeat for second tap. Change input value each clock to run filter. Select signals change output to debug 00(normal) 01(output of mult 2) 10(tap values in mem) 11(output of mult 1). FIR output discards least significant bit due to output limitations",
            "external_hw": "Arduino or FPGA",
            "language": "wokwi",
            "doc_link": "FIR_README.md",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "data0/tap0",
                "data1/tap1",
                "data2/tap2",
                "data3/tap3",
                "select0",
                "select1",
                "loadpulse"
            ],
            "outputs": [
                "fir1/mult0/tap10",
                "fir2/mult1/tap11",
                "fir3/mult2/tap12",
                "fir4/mult3/tap13",
                "fir5/mult4/tap20",
                "fir6/mult5/tap21",
                "fir7/mult6/tap22",
                "fir8/mult7/tap23"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 346916357828248146,
            "git_url": "https://github.com/steieio/tt02-submission-universal-sr"
        },
        "documentation": {
            "author": "Greg Steiert",
            "discord": "gsteiert",
            "title": "Configurable SR",
            "description": "Two configurable gates driving an SR flip-flop",
            "how_it_works": "Connect to each of the configurable gates to control the SR FF",
            "how_to_test": "set up inputs like 1G99 configurable gate to drive SR FF",
            "external_hw": "none",
            "language": "wokwi",
            "doc_link": "https://github.com/steieio/tt02-submission-universal-sr/blob/main/README.md",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "SA",
                "SB",
                "Ssel",
                "Sinv",
                "RA",
                "RB",
                "Rsel",
                "Rinv"
            ],
            "outputs": [
                "Smux",
                "Sxor",
                "Q",
                "none",
                "Rmux",
                "Rxor",
                "Qbar",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 347594509754827347,
            "git_url": "https://github.com/leardilap/tt02-LUTRAM"
        },
        "documentation": {
            "author": "Luis Ardila",
            "discord": "leardilap",
            "title": "LUTRAM",
            "description": "LUTRAM with 4 bit address and 8 bit output preloaded with a binary to 7 segments decoder, sadly it was too big for 0-F, so now it is 0-9?",
            "how_it_works": "uses the address bits to pull from memory the value to be displayed on the 7 segments, content of the memory can be updated via a clock and data pins, reset button will revert to default info, you would need to issue one clock cycle to load the default info",
            "how_to_test": "clk, data, rst, nc, address [4:0]",
            "external_hw": "",
            "language": "wokwi",
            "doc_link": "https://github.com/leardilap/tt02-LUTRAM",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "data",
                "reset",
                "nc",
                "address bit 3",
                "address bit 2",
                "address bit 1",
                "address bit 0"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "segment pd"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "chase_the_beat.v",
                "top.v"
            ],
            "top_module": "chase_the_beat",
            "git_url": "https://github.com/ekliptik/tt02-chase-the-beat"
        },
        "documentation": {
            "author": "Emil J Tywoniak",
            "discord": "widlarizer",
            "title": "chase the beat",
            "description": "Tap twice to the beat, the outputs will chase the beat. Or generate some audio noise!",
            "how_it_works": "The second button press sets a ceiling value for the 1kHz counter. When the counter hits that value, it barrel-shifts the outputs by one bit. When the mode pin isn't asserted, the first output pin emits digital noise generated by a LFSR",
            "how_to_test": "Set 1kHz clock on first input. After reset, set mode to 1, tap the tap button twice within one second. The outputs should set to the beat",
            "external_hw": "A button on the tap input, a switch on the mode input, LEDs on the 8 outputs, and audio output on the first output. Don't just connect headphones or speakers directly! It could fry the circuit, you need some sort of amplifier.",
            "language": "amaranth",
            "doc_link": "",
            "clock_hz": 1000,
            "picture": "",
            "inputs": [
                "clk",
                "rst",
                "tap",
                "mode",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "o_0 - LED or noise output",
                "o_1 - LED",
                "o_2 - LED",
                "o_3 - LED",
                "o_4 - LED",
                "o_5 - LED",
                "o_6 - LED",
                "o_7 - LED"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 347688030570545747,
            "git_url": "https://github.com/maehw/tt02-bcd-7segment-encoder"
        },
        "documentation": {
            "author": "maehw",
            "discord": "maehw",
            "title": "BCD to 7-segment encoder",
            "description": "Encode binary coded decimals (BCD) in the range 0..9 to 7-segment display control signals",
            "how_it_works": "The design has been fully generated using https://github.com/maehw/wokwi-lookup-table-generator using a truth table (https://github.com/maehw/wokwi-lookup-table-generator/blob/main/demos/bcd_7segment_lut.logic.json). The truth table describes the translation of binary coded decimal (BCD) numbers to wokwi 7-segment display (https://docs.wokwi.com/parts/wokwi-7segment). Valid BCD input values are in the range 0..9, other values will show a blank display.",
            "how_to_test": "Control the input switches on the PCB and check the digit displayed on the 7-segment display.",
            "external_hw": "Input switches and 7-segment display (should be on the PCB)",
            "language": "wokwi",
            "doc_link": "https://github.com/maehw/wokwi-lookup-table-generator/blob/main/README.md",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "w",
                "x",
                "y",
                "z",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 342981109408072274,
            "git_url": "https://github.com/benevpi/tt02-LED-flasher"
        },
        "documentation": {
            "author": "Ben Everard",
            "discord": "benev2",
            "title": "A LED Flasher",
            "description": "Select different inputs to generate different LED patterns",
            "how_it_works": "see How To Test",
            "how_to_test": " input 1 - clock input input 2 - feed NOT LED 1 back into the shift register -- this creates a pattern where every other LED is switched on input 3 - feed 1 into the shift register if both the first two LEDs are off. This creates a pattern where every third LED is on input 4 - feed 1 into the shift register if the first three LEDs are off. This creates a pattern where every fourth LED is on input 5 - feed 1 into the shift register if all the LEDs are off. This creates a pattern of one light scanning across the LEDs input 6 - set the direction of the shift register input 7 - toggles fixed direction or alternating direction. If alternating direction is set, the direction of the shift register will flip if all the LEDs are off input 8 - enable the clock divider",
            "external_hw": "A LED on each pin",
            "language": "wokwi",
            "doc_link": "https://github.com/benevpi/tt02-LED-flasher/blob/main/README.md",
            "clock_hz": 0,
            "picture": "https://github.com/benevpi/tt02-LED-flasher/tree/main",
            "inputs": [
                "clock input",
                "feed NOT LED 1 back into the shift register -- this creates a pattern where every other LED is switched on",
                "feed 1 into the shift register if both the first two LEDs are off. This creates a pattern where every third LED is on",
                "feed 1 into the shift register if the first three LEDs are off. This creates a pattern where every fourth LED is on",
                "feed 1 into the shift register if all the LEDs are off. This creates a pattern of one light scanning across the LEDs",
                "set the direction of the shift register",
                "toggles fixed direction or alternating direction. If alternating direction is set, the direction of the shift register will flip if all the LEDs are off",
                "enable the clock divider"
            ],
            "outputs": [
                "All LEDs to flash "
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "bit_full_adder.v",
                "n_bit_adder.v",
                "seg7.v",
                "multiplier.v",
                "asic_multiplier.v",
                "asic_multiplier_wrapper.v"
            ],
            "top_module": "asic_multiplier_wrapper",
            "git_url": "https://github.com/kuriousd/tt02-4bit-multiplier"
        },
        "documentation": {
            "author": "Fernando Dominguez Pousa",
            "discord": "CuriosoD",
            "title": "4-bit Multiplier",
            "description": "4-bit Multiplier based on single bit full adders",
            "how_it_works": "Inputs to the multiplier are provided with the switch. As only eight inputs are available including clock and reset, only three bits remain available for each multiplication factor. Thus, a bit zero is set as the fourth bit. The output product is showed in the 7 segment display. Inputs are registered and a product is calculated. As output is 8-bit number, every 500ms a number appears. First the less significant 4 bits, after 500ms the most significant. When less significant 4-bits are displayed, the led dot including in the display is powered on.",
            "how_to_test": "HDL code is tested using Makefile and cocotb. 4 set of tests are included: the single bit adder, the 4-bit adder, the 4-bit multiplier and the top design. In real hardware, the three less significant bits can create a number times the number created with the next three bits. Reset is asserted with the seventh bit of the switch.",
            "external_hw": "Clock divider to 2500 Hz. Seven segment display with dot led. 8-bit DIP Switch",
            "language": "Verilog",
            "doc_link": "",
            "clock_hz": 2500,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "i_factor_a[0]",
                "i_factor_a[1]",
                "i_factor_a[2]",
                "i_factor_b[3]",
                "i_factor_b[4]",
                "i_factor_b[5]"
            ],
            "outputs": [
                "segment_1 (o_segments[0])",
                "segment_2 (o_segments[1])",
                "segment_3 (o_segments[2])",
                "segment_4 (o_segments[3])",
                "segment_5 (o_segments[4])",
                "segment_6 (o_segments[5])",
                "segment_7 (o_segments[6])",
                "segment_dot (o_lsb_digit)"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "toplevel/logisimTopLevelShell.v",
                "circuit/main.v",
                "circuit/tone_generator_2.v",
                "gates/AND_GATE.v",
                "gates/AND_GATE_BUS.v",
                "gates/OR_GATE.v",
                "gates/XNOR_GATE_ONEHOT.v",
                "gates/XOR_GATE_ONEHOT.v",
                "memory/D_FLIPFLOP.v",
                "memory/REGISTER_FLIP_FLOP.v",
                "plexers/Demultiplexer_16.v",
                "plexers/Demultiplexer_8.v",
                "plexers/Multiplexer_8.v"
            ],
            "top_module": "tholin_avalonsemi_tbb1143",
            "git_url": "https://github.com/89Mods/tt2-avalonsemi-TBB1143"
        },
        "documentation": {
            "author": "Tholin",
            "title": "Avalon Semiconductors 'TBB1143' Programmable Sound Generator",
            "description": "Sound generator with two basic, square-wave voices. Can also be used as a general-purpose frequency generator.",
            "how_it_works": "Either tone generator simply takes the input clock frequency, multiplied by 128 and divides it by 8 times the generator's divisor setting.",
            "how_to_test": "It is possible to use the DIP switches to program the generator according to the documentation. Writing 1101 into address 1, 1010 into address 2, 0000 into address 3 and finally 0001 into address 7 will cause a ~440Hz tone to appear on SOUT0.",
            "external_hw": "Two speakers, or a suitable way to combine the audio signals, as well as a microprocessor or microcontroller to program the 1143.",
            "language": "verilog",
            "doc_link": "https://github.com/89Mods/tt2-avalonsemi-TBB1143/blob/main/README.md",
            "clock_hz": 6000,
            "picture": "",
            "inputs": [
                "CLK",
                "RST",
                "D0",
                "D1",
                "D2",
                "D3",
                "A0",
                "WRT"
            ],
            "outputs": [
                "SOUT0",
                "SOUT1",
                "NC",
                "NC",
                "NC",
                "NC",
                "NC",
                "NC"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "tomkeddie_top_tto_a.v",
                "uart_tx.v"
            ],
            "top_module": "tomkeddie_top_tto_a",
            "git_url": "https://github.com/TomKeddie/tinytapeout-2022-2a"
        },
        "documentation": {
            "author": "Tom Keddie",
            "discord": "TomKeddie",
            "title": "Transmit UART",
            "description": "Transmits a async serial string on a pin",
            "how_it_works": "See https://github.com/TomKeddie/tinytapeout-2022-2a/blob/main/doc/README.md",
            "how_to_test": "See https://github.com/TomKeddie/tinytapeout-2022-2a/blob/main/doc/README.md",
            "external_hw": "Serial cable",
            "language": "verilog",
            "doc_link": "https://github.com/TomKeddie/tinytapeout-2022-2a/blob/main/doc/README.md",
            "clock_hz": 1200,
            "picture": "doc/wiring.png",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "uart_tx_1",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "ledmatrix.v"
            ],
            "top_module": "mm21_LEDMatrixTop",
            "git_url": "https://github.com/mm21/tinytapeout2-led-matrix"
        },
        "documentation": {
            "author": "Matt M",
            "discord": "",
            "title": "RGB LED Matrix Driver",
            "description": "Drives a simple animation on SparkFun's RGB LED 8x8 matrix backpack",
            "how_it_works": "Implements an SPI master to drive an animation with overlapping green/blue waves and a moving white diagonal. Some 7-segment wires are used for a 'sanity check' animation.",
            "how_to_test": "Wire accordingly and use a clock up to 12.5 KHz. Asynchronous reset is synchronized to the clock.",
            "external_hw": "RGB LED matrix backpack from SparkFun: https://www.sparkfun.com/products/retired/760",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 6250,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "SCLK",
                "MOSI",
                "segment c",
                "segment d",
                "segment e",
                "nCS",
                "segment g",
                "none (always high)"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 348195845106041428,
            "git_url": "https://github.com/argunda/tt02-TinyPFD"
        },
        "documentation": {
            "author": "argunda",
            "discord": "catbeans",
            "title": "Tiny Phase/Frequency Detector",
            "description": "Detect phase shifts between 2 square waves.",
            "how_it_works": "This is one of the blocks of a phased locked loop. The inputs are a reference clock and feedback clock and the outputs are the phase difference on either up or /down pin.",
            "how_to_test": "If the phase of the feedback clock is leading the reference clock, the up signal should show the phase difference. If it's lagging, the down signal will show the difference.",
            "external_hw": "Signal generators for square wave inputs.",
            "language": "wokwi",
            "doc_link": "https://ieeexplore.ieee.org/document/278348?subid1=20221113-1837-0613-a274-db851cd8a2cb",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "reference clock",
                "feedback clock",
                "active-low reset",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "up",
                "(inverted) down",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 348121131386929746,
            "git_url": "https://github.com/meriac/loading-animation"
        },
        "documentation": {
            "author": "Andre & Milosch Meriac",
            "discord": "FoolsDelight",
            "title": "Loading Animation",
            "description": "Submission for tt02 - Rotating Dash",
            "how_it_works": "Slide switch to external clock. All DIP switches to off. DIP2 (Reset) on to run (Reset is low-active). By switching DIP3 (Mode) on and setting the sliding switch to Step-Button, the Step-Button can be now used to animate step by step.",
            "how_to_test": "Slide switch to external clock. All DIP switches to off. DIP2 (Reset) on to run (Reset is low-active).",
            "external_hw": "Default PCB",
            "language": "wokwi",
            "doc_link": "https://github.com/meriac/loading-animation/blob/main/README.md",
            "clock_hz": 10000,
            "picture": "img/loading-animation.png",
            "inputs": [
                "clock",
                "reset",
                "mode",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "yubex_egg_timer.v"
            ],
            "top_module": "yubex_egg_timer",
            "git_url": "https://github.com/yubex/tt02-tiny_egg_timer"
        },
        "documentation": {
            "author": "yubex",
            "discord": "",
            "title": "tiny egg timer",
            "description": "tiny egg timer is a configurable small timer",
            "how_it_works": "Its a simple FSM with 3 states (Idle, Waiting and Alarm) and counters regarding clk_cycles, seconds and minutes...",
            "how_to_test": "Set the clock to 10kHz, set the wait time you want (in minutes) by setting io_in[7:3], set the start switch to 1, the timer should be running, the dot of the 7segment display should toggle each second. If the time is expired, an A for alarm should be displayed. You can stop the alarm by setting the start switch to 0 again.",
            "external_hw": "no external hw requrired",
            "language": "Verilog",
            "doc_link": "",
            "clock_hz": 10000,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "start",
                "wait time in minutes [0]",
                "wait time in minutes [1]",
                "wait time in minutes [2]",
                "wait time in minutes [3]",
                "wait time in minutes [4]"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "dot"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "potato1.v"
            ],
            "top_module": "xyz_peppergray_Potato1_top",
            "git_url": "https://github.com/peppergrayxyz/Potato-1"
        },
        "documentation": {
            "author": "Pepper Gray (they/them)",
            "title": "Potato-1 (Brainfuck CPU)",
            "description": "Potato-1 is part of a Brainfuck CPU. It is only the control logic, i.e. you have to bring your own registers, memory controller and io logic. It is very simple, hence likely very slow: You could probably run your brainfuck code on a potato and it would be equally fast, hence the name. The project picture was generated using DALL\u00b7E.\n",
            "how_it_works": "Each rising edge the CU will read in the instruction, zero flag and IO Wait flag and process it. Each falling edge the output pins will be updated. The output pins indiciate which action to take, i.e. which registers to increment/decrement. If Put or Get pin is set, the CU will pause execution until IO Wait is unset. If IO Wait is already unset, the CU will immidiatly execute the next command without waiting.\n\nAdditionaly to the 8 original brainfuck instructions there is a HALT instruction to stop execution and a NOP instructions to do nothing, also there are unused instruction (some of them may be used to extend the instruction set in a later itteration).\n\nInstructions:\n  0000  >       Increment the data pointer \n  0001  <       Decrement data pointer\n  0010  +       Increment value\n  0011  -       Decrement value\n  0100  .       Write value\n  0101  ,       Read value\n  0110  [       Start Loop (enter if value is non-zero, else jump to matchin ']')\n  0111  ]       End Loop (leave if value is zero, , else jump to matchin '[')\n  1000  NOP     No Operation\n  1111  HALT    Halt Execution\n",
            "how_to_test": "Reset: \n  Set Reset_n=0 and wait one clockycycle\n\nRun: \n  Set Reset_n=1\n\nSimple Test:\n  - all input pins zero\n  - clock cycle\n  - Reset_n high\n  - clock cylce\n  --> PC++ high, all outer outputs are low\n \nCheck test/test.py for small scripts to verify the CU logic\n",
            "external_hw": "Bidirectional Counter (3x)\n  - program counter\n  - data pointer\n  - value\nROM (addressed via programm counter)\nRAM (addressed via data pointer, all bytes must be zero after reset)\n\nsome TTL gates, e.g. to configure that the value is written to RAM every time it is changed or the data pointer is changed\n",
            "language": "verilog",
            "doc_link": "https://github.com/peppergrayxyz/Potato-1",
            "clock_hz": 12500,
            "picture": "doc/potato1.png",
            "inputs": [
                "Clock",
                "Reset_n",
                "IO Wait",
                "Zero Flag",
                "Instruction[0]",
                "Instruction[1]",
                "Instruction[2]",
                "Instruction[3]"
            ],
            "outputs": [
                "PC++",
                "PC--",
                "X++",
                "X--",
                "A++",
                "A--",
                "Put",
                "Get"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "zoechip.v"
            ],
            "top_module": "zoechip",
            "git_url": "https://github.com/zoent/tt02-zoe-chip"
        },
        "documentation": {
            "author": "zoe nguyen.  taylor",
            "discord": "",
            "title": "heart zoe mom dad",
            "description": "outputs my name and my age (zoe 4)",
            "how_it_works": "spells leters",
            "how_to_test": "shift 1 hot value",
            "external_hw": "",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 1000,
            "picture": "",
            "inputs": [
                "Z",
                "O",
                "E",
                "F",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 348255968419643987,
            "git_url": "https://github.com/nanikgeorge/tt02-submission-template"
        },
        "documentation": {
            "author": "Nanik Adnani",
            "discord": "nanik",
            "title": "Tiny Synth",
            "description": "A tiny synthesizer! Modulates the frequency of the clock based on inputs, plays a C scale (hopefully).",
            "how_it_works": "Will come back and write more after my exams!",
            "how_to_test": "Make sure the clock is tied to input 0, whatever frequency you want, play with it! Then you can play different notes by toggling the other inputs.",
            "external_hw": "Not entirely sure yet, it outputs a square wave, I still need to figure out what to do with it to make it make sound.",
            "language": "wokwi",
            "doc_link": "Not done yet, eventually!",
            "clock_hz": 12500,
            "picture": "Not done yet.",
            "inputs": [
                "clock",
                "C",
                "D",
                "E",
                "F",
                "G",
                "A",
                "B"
            ],
            "outputs": [
                "square wave out",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "mbikovitsky_top.v"
            ],
            "top_module": "mbikovitsky_top",
            "git_url": "https://github.com/mbikovitsky/tt02-lfsr"
        },
        "documentation": {
            "author": "Michael Bikovitsky",
            "discord": "",
            "title": "5-bit Galois LFSR",
            "description": "5-bit Galois LFSR with configurable taps and initial state. Outputs a value every second.",
            "how_it_works": "https://en.wikipedia.org/wiki/Linear-feedback_shift_register#Galois_LFSRs",
            "how_to_test": "1. Set the desired taps using the switches\n2. Assert the reset_taps pin\n3. Deassert reset_taps\n4. Set the desired initial state\n5. Assert reset_lfsr\n6. Deassert reset_lfsr\n7. Look at it go!\n",
            "external_hw": "Logic analyzer for reading the binary output",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 1000,
            "picture": "",
            "inputs": [
                "clock",
                "reset_lfsr",
                "reset_taps",
                "data_in1",
                "data_in2",
                "data_in3",
                "data_in4",
                "data_in5"
            ],
            "outputs": [
                "data_out1",
                "data_out2",
                "data_out3",
                "data_out4",
                "data_out5",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 348260124451668562,
            "git_url": "https://github.com/teaandtechtime/tt02-submission-prbs15"
        },
        "documentation": {
            "author": "Tom Schucker",
            "discord": "tdsepsilon",
            "title": "prbs15",
            "description": "generates and checks prbs15 sequences",
            "how_it_works": "uses lfsr to generate and check prbs15 sequence",
            "how_to_test": "running clk, gnd pin1, set enable high. feedback prbs15 output to check, monitor error for pulses",
            "external_hw": "logic analyzer and jumper leads",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "gnd",
                "enable",
                "check",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "clk",
                "prbs15",
                "error",
                "checked",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "fsm.v",
                "top.v"
            ],
            "top_module": "rolfmobile99_alu_fsm_top",
            "git_url": "https://github.com/rolfmobile99/tt02-submission-template"
        },
        "documentation": {
            "author": "Rolf Widenfelt",
            "discord": "?",
            "title": "4-bit badge ALU",
            "description": "A 4-bit ALU inspired by Supercon.6 badge",
            "how_it_works": "finite state machine with combinational logic (in verilog)",
            "how_to_test": "cocotb",
            "external_hw": "",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clk",
                "rst",
                "ctl",
                "none",
                "datain3",
                "datain2",
                "datain1",
                "datain0"
            ],
            "outputs": [
                "none",
                "none",
                "none",
                "cout",
                "alu3",
                "alu2",
                "alu1",
                "alu0"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "illegal_logic.v",
                "decoder.v"
            ],
            "top_module": "jar_illegal_logic",
            "git_url": "https://github.com/jar/tt02_freespeech"
        },
        "documentation": {
            "author": "James Ross",
            "discord": "jar",
            "title": "Illegal Logic",
            "description": "This circuit logic emits a sequences of 32 hexadecimal digits to the 7 segment display which may be considered illegal in certain jurisdictions. The sequence is considered to be an illegal number.",
            "how_it_works": "There is some combinatorial logic which generates 32 numbers and then decodes those digits to the 7 segment display.",
            "how_to_test": "First, raise the reset I/O (io_in[1]) high.  Then Output Enable (io_in[2]) high for 32 cycles.",
            "external_hw": "The 7-segment display is used directly.",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "oe",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 348242239268323922,
            "git_url": "https://github.com/alanvgreen/tt02-siren"
        },
        "documentation": {
            "author": "Alan Green",
            "discord": "AlanGreen#3623",
            "title": "Siren",
            "description": "Pretty patterns and a siren straight from the 1970s",
            "how_it_works": "A long chain of D flip flops divides down the clock to produce a range of frequencies  that are used for various purposes.\nSome of the higher frequencies are used to produce the tones. Lower frequencies are used to control the patterns of lights and to change the tones being sent to the speaker.\nAn interesting part of the project is a counter that counts to 5 and resets to zero. This is used for one of the two patterns of lights, where the period of pattern is six.\n",
            "how_to_test": "Connect a speaker to the last digital output pin, the one which is also connected to the decimal point on the seven segment display. Switch 8 is used to select between two groups of patterns.\n",
            "external_hw": "For the audio output on pin 7, either use an audio amplifier or, if bravely connecting a speaker directly, place a resistor in series to limit the current.\n",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 12500,
            "picture": "",
            "inputs": [
                "clock",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none",
                "pattern_select"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "spade.sv",
                "wrapper.v"
            ],
            "top_module": "thezoq2_yafpga",
            "git_url": "https://github.com/TheZoq2/smolfpga"
        },
        "documentation": {
            "author": "Frans Skarman",
            "discord": "TheZoq2",
            "title": "YaFPGA",
            "description": "Yet another FPGA",
            "how_it_works": "TODO",
            "how_to_test": "TODO",
            "external_hw": "",
            "language": "Spade",
            "doc_link": "TODO",
            "clock_hz": 1000,
            "picture": "",
            "inputs": [
                "clock",
                "input1",
                "input2",
                "input3",
                "input4",
                "config data",
                "config clock",
                "none"
            ],
            "outputs": [
                "output0",
                "output1",
                "output2",
                "output3",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "counter.v",
                "decoder.v",
                "core.v"
            ],
            "top_module": "moyes0_top_module",
            "git_url": "https://github.com/moyesw/TT02-M0"
        },
        "documentation": {
            "author": "William Moyes",
            "discord": "",
            "title": "M0",
            "description": "todo",
            "how_it_works": "todo",
            "how_to_test": "todo",
            "external_hw": "",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 12000,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "spi_miso",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "spi_cs0",
                "spi_cs1",
                "spi_clk",
                "spi_mosi",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "yupferris_bitslam.v"
            ],
            "top_module": "yupferris_bitslam",
            "git_url": "https://github.com/yupferris/bitslam"
        },
        "documentation": {
            "author": "Jake \"ferris\" Taylor",
            "discord": "yupferris#1454",
            "title": "bitslam",
            "description": "bitslam is a programmable sound chip with 2 LFSR voices.",
            "how_it_works": "bitslam is programmed via its register write interface. A register write is performed by first writing an internal address register, which selects which register will be written to, and then writing a value. Bit 1 distinguishes address writes (0) or data writes (1). Address bits 1-2 address different internal modules: 00 addresses voice 0, 01 addresses voice 1, and 10 addresses the mixer. Address bit 0 addresses a register in the internal module. Each voice is controlled by a clock divider and a tap mask for the LFSR state. The clock divider is at address 0 and controls the rate at which the LFSR is updated, effectively controlling the pitch. Since bitslam is (expected to be) clocked at 6khz, the pitch will be determined by 3khz / x where x is the 6-bit clock divider value. Each voice also contains a 4-bit LFSR tap mask (address 1) which determines which of 4 LFSR bits are XOR'd together to determine the new LFSR LSB. The LFSR is 10 bits wide and the tap mask bits correspond to positions 1, 4, 6, and 9, respectively. The mixer has a single register to control the volume of each voice. Bits 0-2 determine voice 0 volume, and bits 3-5 determine voice 1 volume. A value of 0 means a voice is silent, and a value of 7 is full volume. Special thanks to Daniel \"trilader\" Schulte for pointing out a crucial interconnect bug.",
            "how_to_test": "bitslam is meant to be driven and clocked by an external host, eg. a microcontroller. The microcontroller should use the register write interface described above to program the desired audio output (eg. to play a song or sound effects) and 4-bit digital audio should be generated on the 4 digital out pins.",
            "external_hw": "A 4-bit DAC connected to the four digital output pins.",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 6000,
            "picture": "",
            "inputs": [
                "clock",
                "address/data selector",
                "address/data 0",
                "address/data 1",
                "address/data 2",
                "address/data 3",
                "address/data 4",
                "address/data 5"
            ],
            "outputs": [
                "digital out 0",
                "digital out 1",
                "digital out 2",
                "digital out 3",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 341620484740219475,
            "git_url": "https://github.com/ThorKn/tinytapeout02_pattern_player"
        },
        "documentation": {
            "author": "Thorsten Knoll",
            "discord": "",
            "title": "8x8 Bit Pattern Player",
            "description": "8x8 bit serial programmable, addressable and playable memory.",
            "how_it_works": "The 8x8 memory is a 64-bit shiftregister, consisting of 64 serial chained D-FlipFlops (data: IN0, clk_sr: IN1). 8 memoryslots of each 8 bit can be directly addressed via addresslines (3 bit: IN2, IN3, IN4) or from a clockdriven player (3 bit counter, clk_pl: IN7). A mode selector line (mode: IN5) sets the operation mode to addressing or to player. The 8 outputs are driven by the 8 bit of the addressed memoryslot.",
            "how_to_test": "Programm the memory: Start by filling the 64 bit shiftregister via data and clk_sr, each rising edge on clk_sr shifts a new data bit into the register. Select mode: Set mode input for direct addressing or clockdriven player. Address mode: Address a memoryslot via the three addresslines and watch the memoryslot at the outputs. Player mode: Each rising edge at clk_pl enables the next memoryslot to the outputs.",
            "external_hw": "You could programm, address and play the 8x8 Bit Pattern Player with a breadboard, two clock buttons and some dipswitches on the input side. Add some LED to the output side. Just like the WOKWI simulation.",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "pattern_player.png",
            "inputs": [
                "data",
                "clk_sr",
                "address_0",
                "address_1",
                "address_2",
                "mode",
                "none",
                "clk_pl"
            ],
            "outputs": [
                "bit 0",
                "bit 1",
                "bit 2",
                "bit 3",
                "bit 4",
                "bit 5",
                "bit 6",
                "bit 7"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "user_module.v",
                "top.v"
            ],
            "top_module": "top",
            "git_url": "https://github.com/proppy/tt02-xls-popcount"
        },
        "documentation": {
            "author": "proppy",
            "discord": "proppy",
            "title": "XLS: bit population count",
            "description": "Count bits set in the input.",
            "how_it_works": "https://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel",
            "how_to_test": "Pull up input bits, check that output bits represent the count.",
            "external_hw": "LEDs and resistors",
            "language": "XLS",
            "doc_link": "https://github.com/proppy/tt02-xls-popcount/blob/main/README.md",
            "clock_hz": 0,
            "picture": "popcount.svg",
            "inputs": [
                "bit0",
                "bit1",
                "bit2",
                "bit3",
                "bit4",
                "bit5",
                "bit6",
                "bit7"
            ],
            "outputs": [
                "count0",
                "count1",
                "count2",
                "count3",
                "count4",
                "count5",
                "count6",
                "count7"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "rc5.v",
                "decoder.v",
                "rc5_top.v"
            ],
            "top_module": "rc5_top",
            "git_url": "https://github.com/jeanthom/tt02-rc5-receiver"
        },
        "documentation": {
            "author": "Jean THOMAS",
            "discord": "",
            "title": "RC5 decoder",
            "description": "Increment/decrement a counter with the press of a IR remote button!",
            "how_it_works": "Decodes an RC5 remote signal, increments the counter if the volume up button is pressed, decrements the counter if the volume down button is pressed",
            "how_to_test": "after reset, point a remote to the IR received. Press the volume up button and the display count should increase.",
            "external_hw": "Connect an IR demodulator (ie. TSOP1738) to the input pin",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 562,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "IR demodulator output",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 341614374571475540,
            "git_url": "https://github.com/mmolteni-secpat/tinytapeout02_chiDOM"
        },
        "documentation": {
            "author": "Maria CHiara Molteni",
            "discord": "Mari-secpat",
            "title": "chiDOM",
            "description": "Chi function of Xoodoo protected at the first-order by DOM",
            "how_it_works": "Chi function of Xoodoo protected at the first-order by DOM",
            "how_to_test": "Set on all the inputs",
            "external_hw": "",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "player.v",
                "tune.v"
            ],
            "top_module": "meriac_tt02_play_tune",
            "git_url": "https://github.com/meriac/tt02-play-tune"
        },
        "documentation": {
            "author": "Milosch Meriac",
            "discord": "FoolsDelight",
            "title": "Super Mario Tune on A Piezo Speaker",
            "description": "Plays Super Mario Tune over a Piezo Speaker connected across io_out[1:0]",
            "how_it_works": "Converts an RTTL ringtone into verilog using Python - and plays it back using differential PWM modulation",
            "how_to_test": "Provide 10kHz clock on io_in[0], briefly hit reset io_in[1] (L->H->L) and io_out[1:0] will play a differential sound wave over piezo speaker (Super Mario)",
            "external_hw": "Piezo speaker connected across io_out[1:0]",
            "language": "verilog",
            "doc_link": "https://github.com/meriac/tt02-play-tune",
            "clock_hz": 10000,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "piezo_speaker_p",
                "piezo_speaker_n",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 0,
            "source_files": [
                "counter.v",
                "decoder.v"
            ],
            "top_module": "phasenoisepon_seven_segment_seconds",
            "git_url": "https://github.com/phasenoisepon/tt02-phasenoisepon"
        },
        "documentation": {
            "author": "Phase Noise",
            "discord": "@PhaseNoisePega",
            "title": "Tiny rot13",
            "description": "implements rot13 in the constraints of TT02",
            "how_it_works": "shifts in low and high nibble to construct an ASCII character, performs rot13, then outputs. The design uses some registers to store the low and high nibbles before constructing them into the ASCII character. ROT13 is implemented with a LUT genetated from Python. Controlled using control lines instead of specific clock cycles. Any non-alphabetic characters are passed through",
            "how_to_test": "CTL0 and CTL1 are control lines. Let CTL[1:0], 2b00 -> Shift in low nibble on D[3:0] and set output[7:0]=0x0f, 2b01 -> Shift in high nibble on D[3:0] and set output[7:0]=0xf0, 2b1X -> Shift out S on output[7:0]. Shift in the low and high nibbles of rot13, then read the result on the next cycle. Internal registers are init to 0, so by default after a RST, the output will be 0x00 for a single cycle(if CTL=2'b10), otherwise it will 2'b00 before updating to whatever the control lines set it to. Every operation effectively sets the output of the next clock cycle. Every complete operation effectively takes 4 cycles. To test, Set RST, then write 0x1 as the low nibble (clock 0), 0x4 as the high nibble (clock 1), then set the control lines to output (clock 1). 0x4e should be read at clock 4, with the output sequence being C=0 out=0x00, C=1 out=0x01, C=2 out=0x10, C=3 out=0x4e. 0x00 should produce 0x00 while 0x7f should produce 0x7f.",
            "external_hw": "For basic usage, the carrier board should suffice. An MCU or FPGA would be required to use this to the fullest extent, and an FPGA with PCIe would let you build the world's worst ROT13 Accelerator!",
            "language": "verilog",
            "doc_link": "https://github.com/phasenoisepon/tt02-phasenoisepon/blob/main/README.md",
            "clock_hz": 1000,
            "picture": "./ROT13.png",
            "inputs": [
                "clock",
                "reset - Resets the system to a clean state",
                "CTL0 - LSB of control",
                "CTL1 - MSB of control",
                "D0 - LSB of input nibble",
                "D1",
                "D2",
                "D3 - MSB of input nibble"
            ],
            "outputs": [
                "DO0 - LSB of output",
                "DO1",
                "DO2",
                "DO3",
                "DO4",
                "DO5",
                "DO6",
                "DO7 - MSB of output"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 341541108650607187,
            "git_url": "https://github.com/13arn/tt02_counter_steamdeck"
        },
        "documentation": {
            "author": "13arn",
            "discord": "13arn#9121",
            "title": "4 bit counter on steamdeck",
            "description": "copy of my tt01 submission, enable first input and press button to use the counter",
            "how_it_works": "fsm that uses 1 input to progress abd count from 0 to 3. Other inputs have various logic to play with",
            "how_to_test": "enable first input so it is on and connected to the button. All other inputs are off. Press button to progress the fsm.",
            "external_hw": "",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "",
            "inputs": [
                "clock",
                "reset",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "segment a",
                "segment b",
                "segment c",
                "segment d",
                "segment e",
                "segment f",
                "segment g",
                "none"
            ]
        }
    },
    {
        "project": {
            "wokwi_id": 341516949939814994,
            "git_url": "https://github.com/ThorKn/tinytapeout02_shiftregister_challenge"
        },
        "documentation": {
            "author": "Thorsten Knoll",
            "discord": "",
            "title": "Shiftregister Challenge 40 Bit",
            "description": "The design is a 40 bit shiftregister with a hardcoded 40 bit number. The challenge is to find the correct 40 bit to enable the output to high. With all other numbers the output will be low.",
            "how_it_works": "Shift a 40 bit number into the chip with the two inputs data (IN0) and clk (IN1). If the shifted 40 bit match the hardcoded internal 40 bit, then and only then the output will become high. Having only the mikrochip without the design files, one might need reverse engineering and/or side channel attacks to fing the correct 40 bit.",
            "how_to_test": "Get the correct 40 bit from the design and shift them into the shiftregister. Each rising edge at the clk will push the next bit into the register. At the correct 40 bit, the output will enable high.",
            "external_hw": "To test when knowing the correct 40 bit, only a dipswitch (data), a button (clk) and a LED (output) is needed. Without knowing the number it becomes the challenge and more hardware might be required.",
            "language": "wokwi",
            "doc_link": "",
            "clock_hz": 0,
            "picture": "shiftregister_challenge.png",
            "inputs": [
                "data",
                "clk",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ],
            "outputs": [
                "output",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none",
                "none"
            ]
        }
    },
    {
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            "source_files": [
                "toplevel/logisimTopLevelShell.v",
                "circuit/main.v",
                "arith/Adder.v",
                "gates/AND_GATE_BUS.v"
            ],
            "top_module": "tt2_tholin_multiplier",
            "git_url": "https://github.com/89Mods/tt2-4x4-multiply"
        },
        "documentation": {
            "author": "Tholin",
            "title": "TinyTapeout2 4-bit multiplier.",
            "description": "Multiplies two 4-bit numbers presented on the input pins and outputs an 8-bit result.",
            "how_it_works": "The multiplier is implemented using purely combinatorial logic. One 6-bit adder and two 8-bit adders as well as a heap of AND gates are the only used components.",
            "how_to_test": "Input any two numbers on the input ports, and check if the 8-bit result is correct.",
            "external_hw": "DIP switches for the inputs, and LEDs on the outputs, to be able to read the binary result.",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 6000,
            "picture": "",
            "inputs": [
                "A0",
                "A1",
                "A2",
                "A3",
                "B0",
                "B1",
                "B2",
                "B3"
            ],
            "outputs": [
                "R0",
                "R1",
                "R2",
                "R3",
                "R4",
                "R5",
                "R6",
                "R7"
            ]
        }
    },
    {
        "project": {
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            "source_files": [
                "toplevel/logisimTopLevelShell.v",
                "circuit/main.v",
                "circuit/bcd_to_seg.v",
                "circuit/seconds_counter.v",
                "circuit/full_counter.v",
                "circuit/custom_counter_3.v",
                "circuit/custom_counter_4.v",
                "circuit/custom_counter_10.v",
                "arith/Comparator.v",
                "gates/AND_GATE.v",
                "gates/OR_GATE.v",
                "memory/D_FLIPFLOP.v",
                "plexers/Multiplexer_bus_4.v"
            ],
            "top_module": "tt2_tholin_multiplexed_counter",
            "git_url": "https://github.com/89Mods/tt2-multiplexed-counter"
        },
        "documentation": {
            "author": "Tholin",
            "title": "TinyTapeout2 multiplexed segment display timer.",
            "description": "Measures time up to 99 minutes and 99 seconds by multiplexing 4 seven-segment displays.",
            "how_it_works": "TODO",
            "how_to_test": "TODO",
            "external_hw": "4 sevent segment displays, plus some 74-series chips to build the select logic.",
            "language": "verilog",
            "doc_link": "",
            "clock_hz": 1024,
            "picture": "",
            "inputs": [
                "CLK",
                "RST",
                "NC",
                "NC",
                "NC",
                "NC",
                "NC",
                "NC"
            ],
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                "C",
                "D",
                "E",
                "F",
                "G",
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            ]
        }
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            "doc_link": "",
            "clock_hz": 0,
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            "inputs": [
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            "inputs": [
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]