)]}'
{
  "commit": "c0e0fff60ebe846eba4ec5c096f3714600ef4c5f",
  "tree": "4170d0850681b5fa0f7b063a279ea2c54f7f9372",
  "parents": [
    "fbf90194a7b94c9cdde6de3a1435b67713155138"
  ],
  "author": {
    "name": "Staf Verhaegen",
    "email": "staf@fibraservi.eu",
    "time": "Wed Mar 23 10:43:13 2022 +0100"
  },
  "committer": {
    "name": "Staf Verhaegen",
    "email": "staf@fibraservi.eu",
    "time": "Wed Mar 23 10:43:13 2022 +0100"
  },
  "message": "Fix DRC errors and connect ESD clamp to SRAM vdd/vss\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8b06584927e6cd683545b502b8de235a9ed732ff",
      "old_mode": 33188,
      "old_path": "doitcode/frame.py",
      "new_id": "9bf5d393e662989be7435d055270fceaaf8cffa7",
      "new_mode": 33188,
      "new_path": "doitcode/frame.py"
    },
    {
      "type": "modify",
      "old_id": "86edfb72bcac6dfc1e2ff1a26311261c68f548eb",
      "old_mode": 33188,
      "old_path": "doitcode/sram.py",
      "new_id": "b0ddb51658b19828df89a30574efaf4606c3485c",
      "new_mode": 33188,
      "new_path": "doitcode/sram.py"
    },
    {
      "type": "modify",
      "old_id": "9d084bf0ff7e599c4117320a9a424fce72655349",
      "old_mode": 33188,
      "old_path": "gds/user_analog_project_wrapper.gds.gz",
      "new_id": "e6b360bc68b9d8c4f0f9faf91d99b288712041ac",
      "new_mode": 33188,
      "new_path": "gds/user_analog_project_wrapper.gds.gz"
    }
  ]
}
