)]}'
{
  "id": "072b36319a30778e95ff73c471b3f636ac822e52",
  "entries": [
    {
      "mode": 33188,
      "type": "blob",
      "id": "95cd1b8ea2ba46e66d5d01ff6671d726f4d6e4e7",
      "name": "0001-usb_cdc-fix-make-targets.patch"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "44a29a02e510eda6a9b95a4b9255eef403b5f05a",
      "name": "defines.v"
    },
    {
      "mode": 16384,
      "type": "tree",
      "id": "55bbe6db11ef4dc9265700f1f56a87d93b06679f",
      "name": "fpga"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "a566b2b1f4a73dba28d3034ed406a39c8e4f0fa6",
      "name": "usb2uart.v"
    },
    {
      "mode": 57344,
      "type": "commit",
      "id": "c20f51bb6256a9ee6b356e73a1bfcf03d6aafcde",
      "name": "usb_cdc"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "c93c274a9e915172fb78592e7e62c3e58a58c480",
      "name": "user_defines.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "6f6a14c48755b3431af264981c334037911e81be",
      "name": "user_proj_example.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "2bbb1e295a050bcb84a9e804f02bd504d3cae19b",
      "name": "user_project_wrapper.v"
    },
    {
      "mode": 57344,
      "type": "commit",
      "id": "b973f08697b03a17ce56b90783622c7b7a28fa2a",
      "name": "verilog-uart"
    }
  ]
}