)]}'
{
  "id": "90c46a79c4686c90bb1c319ca47c42070bc9f702",
  "entries": [
    {
      "mode": 33188,
      "type": "blob",
      "id": "95cd1b8ea2ba46e66d5d01ff6671d726f4d6e4e7",
      "name": "0001-fix-make-targets.patch"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "44a29a02e510eda6a9b95a4b9255eef403b5f05a",
      "name": "defines.v"
    },
    {
      "mode": 16384,
      "type": "tree",
      "id": "76407d0b11ef453b25909d493def5b03abd8cad8",
      "name": "fpga"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "1b54548979f215380af12e4a5293b9493c99426d",
      "name": "test_uart.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "3537de803dd1d472e447f0791344cbf5c9391455",
      "name": "uprj_netlists.v"
    },
    {
      "mode": 57344,
      "type": "commit",
      "id": "c20f51bb6256a9ee6b356e73a1bfcf03d6aafcde",
      "name": "usb_cdc"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "8533e2f27181403248ff1334b4881693308f84f1",
      "name": "user_defines.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "26081e98ecdd98ac1a677c29dfbd5fb0dbc4ee53",
      "name": "user_proj_example.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "5ee1ceecfb5f08335c33a73de2e09ef869af17a9",
      "name": "user_project_wrapper.v"
    },
    {
      "mode": 57344,
      "type": "commit",
      "id": "b973f08697b03a17ce56b90783622c7b7a28fa2a",
      "name": "verilog-uart"
    }
  ]
}