diff --git a/verilog/dv/Makefile b/verilog/dv/Makefile
index bd50827..ee8c829 100644
--- a/verilog/dv/Makefile
+++ b/verilog/dv/Makefile
@@ -19,7 +19,7 @@
 .SUFFIXES:
 .SILENT: clean all
 
-PATTERNS = wb_port risc_boot user_risc_boot user_uart user_uart1 user_qspi user_i2cm riscv_regress user_basic user_usb user_pwm user_timer user_uart_master uart_master user_mcore user_sram_exec user_cache_bypass user_gpio arudino_risc_boot arudino_ascii_table
+PATTERNS = wb_port risc_boot user_risc_boot user_uart user_uart1 user_qspi user_i2cm riscv_regress user_basic user_usb user_pwm user_timer user_uart_master uart_master user_mcore user_sram_exec user_cache_bypass user_gpio arduino_risc_boot arduino_hello_world arduino_ascii_table
 
 all:  ${PATTERNS}
 	for i in ${PATTERNS}; do \
diff --git a/verilog/dv/arudino_hello_world/Makefile b/verilog/dv/arduino_ascii_table/Makefile
similarity index 99%
rename from verilog/dv/arudino_hello_world/Makefile
rename to verilog/dv/arduino_ascii_table/Makefile
index a14c509..b636250 100644
--- a/verilog/dv/arudino_hello_world/Makefile
+++ b/verilog/dv/arduino_ascii_table/Makefile
@@ -45,7 +45,7 @@
 
 .SUFFIXES:
 
-PATTERN = arudino_hello_world
+PATTERN = arduino_ascii_table
 
 all:  ${PATTERN:=.vcd}
 
diff --git a/verilog/dv/arudino_ascii_table/arudino_ascii_table.ino b/verilog/dv/arduino_ascii_table/arduino_ascii_table.ino
similarity index 100%
rename from verilog/dv/arudino_ascii_table/arudino_ascii_table.ino
rename to verilog/dv/arduino_ascii_table/arduino_ascii_table.ino
diff --git a/verilog/dv/arudino_ascii_table/arudino_ascii_table.ino.cpp b/verilog/dv/arduino_ascii_table/arduino_ascii_table.ino.cpp
similarity index 100%
rename from verilog/dv/arudino_ascii_table/arudino_ascii_table.ino.cpp
rename to verilog/dv/arduino_ascii_table/arduino_ascii_table.ino.cpp
diff --git a/verilog/dv/arudino_ascii_table/arudino_ascii_table_tb.v b/verilog/dv/arduino_ascii_table/arduino_ascii_table_tb.v
similarity index 97%
rename from verilog/dv/arudino_ascii_table/arudino_ascii_table_tb.v
rename to verilog/dv/arduino_ascii_table/arduino_ascii_table_tb.v
index d49b9b3..af4e082 100644
--- a/verilog/dv/arudino_ascii_table/arudino_ascii_table_tb.v
+++ b/verilog/dv/arduino_ascii_table/arduino_ascii_table_tb.v
@@ -77,7 +77,7 @@
 `include "sram_macros/sky130_sram_2kbyte_1rw1r_32x512_8.v"
 `include "uart_agent.v"
 
-module arudino_ascii_table_tb;
+module arduino_ascii_table_tb;
 	reg clock;
 	reg wb_rst_i;
 	reg power1, power2;
@@ -149,11 +149,11 @@
 	`ifdef WFDUMP
 	   initial begin
 	   	$dumpfile("simx.vcd");
-	   	$dumpvars(3, arudino_ascii_table_tb);
-	   	$dumpvars(0, arudino_ascii_table_tb.u_top.u_riscv_top.i_core_top_0);
-	   	$dumpvars(0, arudino_ascii_table_tb.u_top.u_riscv_top.u_connect);
-	   	$dumpvars(0, arudino_ascii_table_tb.u_top.u_riscv_top.u_intf);
-	   	$dumpvars(0, arudino_ascii_table_tb.u_top.u_uart_i2c_usb_spi.u_uart0_core);
+	   	$dumpvars(3, arduino_ascii_table_tb);
+	   	$dumpvars(0, arduino_ascii_table_tb.u_top.u_riscv_top.i_core_top_0);
+	   	$dumpvars(0, arduino_ascii_table_tb.u_top.u_riscv_top.u_connect);
+	   	$dumpvars(0, arduino_ascii_table_tb.u_top.u_riscv_top.u_intf);
+	   	$dumpvars(0, arduino_ascii_table_tb.u_top.u_uart_i2c_usb_spi.u_uart0_core);
 	   end
        `endif
 
@@ -356,7 +356,7 @@
    assign io_in[32] = flash_io3;
 
    // Quard flash
-     s25fl256s #(.mem_file_name("arudino_ascii_table.ino.hex"),
+     s25fl256s #(.mem_file_name("arduino_ascii_table.ino.hex"),
 	         .otp_file_name("none"),
                  .TimingModel("S25FL512SAGMFI010_F_30pF")) 
 		 u_spi_flash_256mb (
diff --git a/verilog/dv/arudino_hello_world/Makefile b/verilog/dv/arduino_hello_world/Makefile
similarity index 99%
copy from verilog/dv/arudino_hello_world/Makefile
copy to verilog/dv/arduino_hello_world/Makefile
index a14c509..0f7f623 100644
--- a/verilog/dv/arudino_hello_world/Makefile
+++ b/verilog/dv/arduino_hello_world/Makefile
@@ -45,7 +45,7 @@
 
 .SUFFIXES:
 
-PATTERN = arudino_hello_world
+PATTERN = arduino_hello_world
 
 all:  ${PATTERN:=.vcd}
 
diff --git a/verilog/dv/arudino_hello_world/arudino_hello_world.ino b/verilog/dv/arduino_hello_world/arduino_hello_world.ino
similarity index 100%
rename from verilog/dv/arudino_hello_world/arudino_hello_world.ino
rename to verilog/dv/arduino_hello_world/arduino_hello_world.ino
diff --git a/verilog/dv/arudino_hello_world/arudino_hello_world.ino.cpp b/verilog/dv/arduino_hello_world/arduino_hello_world.ino.cpp
similarity index 100%
rename from verilog/dv/arudino_hello_world/arudino_hello_world.ino.cpp
rename to verilog/dv/arduino_hello_world/arduino_hello_world.ino.cpp
diff --git a/verilog/dv/arudino_hello_world/arudino_hello_world_tb.v b/verilog/dv/arduino_hello_world/arduino_hello_world_tb.v
similarity index 97%
rename from verilog/dv/arudino_hello_world/arudino_hello_world_tb.v
rename to verilog/dv/arduino_hello_world/arduino_hello_world_tb.v
index 4f3b1e7..051b224 100644
--- a/verilog/dv/arudino_hello_world/arudino_hello_world_tb.v
+++ b/verilog/dv/arduino_hello_world/arduino_hello_world_tb.v
@@ -77,7 +77,7 @@
 `include "sram_macros/sky130_sram_2kbyte_1rw1r_32x512_8.v"
 `include "uart_agent.v"
 
-module arudino_hello_world_tb;
+module arduino_hello_world_tb;
 	reg clock;
 	reg wb_rst_i;
 	reg power1, power2;
@@ -147,11 +147,11 @@
 	`ifdef WFDUMP
 	   initial begin
 	   	$dumpfile("simx.vcd");
-	   	$dumpvars(3, arudino_hello_world_tb);
-	   	//$dumpvars(0, arudino_hello_world_tb.u_top.u_riscv_top.i_core_top_0);
-	   	//$dumpvars(0, arudino_hello_world_tb.u_top.u_riscv_top.u_connect);
-	   	//$dumpvars(0, arudino_hello_world_tb.u_top.u_riscv_top.u_intf);
-	   	$dumpvars(0, arudino_hello_world_tb.u_top.u_uart_i2c_usb_spi.u_uart0_core);
+	   	$dumpvars(3, arduino_hello_world_tb);
+	   	//$dumpvars(0, arduino_hello_world_tb.u_top.u_riscv_top.i_core_top_0);
+	   	//$dumpvars(0, arduino_hello_world_tb.u_top.u_riscv_top.u_connect);
+	   	//$dumpvars(0, arduino_hello_world_tb.u_top.u_riscv_top.u_intf);
+	   	$dumpvars(0, arduino_hello_world_tb.u_top.u_uart_i2c_usb_spi.u_uart0_core);
 	   end
        `endif
 
@@ -357,7 +357,7 @@
    assign io_in[32] = flash_io3;
 
    // Quard flash
-     s25fl256s #(.mem_file_name("arudino_hello_world.ino.hex"),
+     s25fl256s #(.mem_file_name("arduino_hello_world.ino.hex"),
 	         .otp_file_name("none"),
                  .TimingModel("S25FL512SAGMFI010_F_30pF")) 
 		 u_spi_flash_256mb (
diff --git a/verilog/dv/arudino_risc_boot/Makefile b/verilog/dv/arduino_risc_boot/Makefile
similarity index 99%
rename from verilog/dv/arudino_risc_boot/Makefile
rename to verilog/dv/arduino_risc_boot/Makefile
index 6e6738d..a85da52 100644
--- a/verilog/dv/arudino_risc_boot/Makefile
+++ b/verilog/dv/arduino_risc_boot/Makefile
@@ -45,7 +45,7 @@
 
 .SUFFIXES:
 
-PATTERN = arudino_risc_boot
+PATTERN = arduino_risc_boot
 
 all:  ${PATTERN:=.vcd}
 
diff --git a/verilog/dv/arudino_risc_boot/arudino_risc_boot.ino b/verilog/dv/arduino_risc_boot/arduino_risc_boot.ino
similarity index 100%
rename from verilog/dv/arudino_risc_boot/arudino_risc_boot.ino
rename to verilog/dv/arduino_risc_boot/arduino_risc_boot.ino
diff --git a/verilog/dv/arudino_risc_boot/arudino_risc_boot.ino.cpp b/verilog/dv/arduino_risc_boot/arduino_risc_boot.ino.cpp
similarity index 100%
rename from verilog/dv/arudino_risc_boot/arudino_risc_boot.ino.cpp
rename to verilog/dv/arduino_risc_boot/arduino_risc_boot.ino.cpp
diff --git a/verilog/dv/arudino_risc_boot/arudino_risc_boot_tb.v b/verilog/dv/arduino_risc_boot/arduino_risc_boot_tb.v
similarity index 98%
rename from verilog/dv/arudino_risc_boot/arudino_risc_boot_tb.v
rename to verilog/dv/arduino_risc_boot/arduino_risc_boot_tb.v
index dc150a2..c435c40 100644
--- a/verilog/dv/arudino_risc_boot/arudino_risc_boot_tb.v
+++ b/verilog/dv/arduino_risc_boot/arduino_risc_boot_tb.v
@@ -75,7 +75,7 @@
 `timescale 1 ns / 1 ns
 
 `include "sram_macros/sky130_sram_2kbyte_1rw1r_32x512_8.v"
-module arudino_risc_boot_tb;
+module arduino_risc_boot_tb;
 	reg clock;
 	reg wb_rst_i;
 	reg power1, power2;
@@ -125,7 +125,7 @@
 	`ifdef WFDUMP
 	   initial begin
 	   	$dumpfile("simx.vcd");
-	   	$dumpvars(3, arudino_risc_boot_tb);
+	   	$dumpvars(3, arduino_risc_boot_tb);
 	   end
        `endif
 
@@ -270,7 +270,7 @@
    assign io_in[32] = flash_io3;
 
    // Quard flash
-     s25fl256s #(.mem_file_name("arudino_risc_boot.ino.hex"),
+     s25fl256s #(.mem_file_name("arduino_risc_boot.ino.hex"),
 	         .otp_file_name("none"),
                  .TimingModel("S25FL512SAGMFI010_F_30pF")) 
 		 u_spi_flash_256mb (
diff --git a/verilog/dv/arudino_ascii_table/Makefile b/verilog/dv/arudino_ascii_table/Makefile
deleted file mode 100644
index ffb2b33..0000000
--- a/verilog/dv/arudino_ascii_table/Makefile
+++ /dev/null
@@ -1,141 +0,0 @@
-# SPDX-FileCopyrightText: 2020 Efabless Corporation
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#      http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-# SPDX-License-Identifier: Apache-2.0
-
-
-# ---- Include Partitioned Makefiles ----
-
-CONFIG = caravel_user_project
- 
-#######################################################################
-## Caravel Verilog for Integration Tests
-#######################################################################
-
-DESIGNS?=../../..
-TOOLS?=/opt/riscv64i/
-
-export USER_PROJECT_VERILOG ?=  $(DESIGNS)/verilog
-export RISCDUINO_BOARD ?=  $(USER_PROJECT_VERILOG)/dv/common/riscduino_board/custom_board/riscduino
-## YIFIVE FIRMWARE
-YIFIVE_FIRMWARE_PATH = $(USER_PROJECT_VERILOG)/dv/firmware
-GCC64_PREFIX?=riscv64-unknown-elf
-GCC32_PREFIX?=riscv32-unknown-elf
-
-
-## Simulation mode: RTL/GL
-SIM?=RTL
-DUMP?=OFF
-RISC_CORE?=0
-
-### To Enable IVERILOG FST DUMP
-export IVERILOG_DUMPER = fst
-
-
-.SUFFIXES:
-
-PATTERN = arudino_ascii_table
-
-all:  ${PATTERN:=.vcd}
-
-
-vvp:  ${PATTERN:=.vvp}
-
-%.vvp: %_tb.v
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${PATTERN}.ino.cpp -o ${PATTERN}.ino.cpp.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/Print.cpp -o Print.cpp.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/WMath.cpp -o WMath.cpp.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/WString.cpp -o WString.cpp.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/WInterrupts.c -o WInterrupts.c.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/drivers/fe300prci/fe300prci_driver.c -o fe300prci_driver.c.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/abi.cpp -o abi.cpp.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/drivers/plic/plic_driver.c -o plic_driver.c.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/UARTClass.cpp -o UARTClass.cpp.o
-	${GCC32_PREFIX}-gcc -c -march=rv32imac -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/entry.S -o entry.S.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/hooks.c -o hooks.c.o
-	${GCC32_PREFIX}-gcc -c -march=rv32imac -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/init.S -o init.S.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/itoa.c -o itoa.c.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/main.cpp -o main.cpp.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/malloc.c -o malloc.c.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/new.cpp -o new.cpp.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/sbrk.c -o sbrk.c.o
-	${GCC32_PREFIX}-gcc -c -march=rv32imac -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/start.S -o start.S.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/wiring.c -o wiring.c.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/wiring_analog.c -o wiring_analog.c.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/wiring_digital.c -o wiring_digital.c.o
-	${GCC32_PREFIX}-g++ -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -fpermissive -Wall -fno-rtti -fno-exceptions -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/wiring_pulse.cpp -o wiring_pulse.cpp.o
-	${GCC32_PREFIX}-gcc -c -O2 -march=rv32imac -fpeel-loops -ffreestanding -ffunction-sections -fdata-sections -Wall -I${RISCDUINO_BOARD}/system/include -I${RISCDUINO_BOARD}/sdk/bsp/include -I${RISCDUINO_BOARD}/sdk/bsp/env -I${RISCDUINO_BOARD}/sdk/bsp/drivers -I${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score -include sys/cdefs.h -g -DARDUINO=10607 -DF_CPU=50000000LL -DRISCDUINO_SCORE_DEVKIT -I${RISCDUINO_BOARD}/cores/arduino -I${RISCDUINO_BOARD}/variants/standard ${RISCDUINO_BOARD}/cores/arduino/wiring_shift.c -o wiring_shift.c.o
-	${GCC32_PREFIX}-ar rcs core.a Print.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a UARTClass.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a WInterrupts.c.o
-	${GCC32_PREFIX}-ar rcs core.a WMath.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a WString.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a abi.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a fe300prci_driver.c.o
-	${GCC32_PREFIX}-ar rcs core.a plic_driver.c.o
-	${GCC32_PREFIX}-ar rcs core.a entry.S.o
-	${GCC32_PREFIX}-ar rcs core.a hooks.c.o
-	${GCC32_PREFIX}-ar rcs core.a init.S.o
-	${GCC32_PREFIX}-ar rcs core.a itoa.c.o
-	${GCC32_PREFIX}-ar rcs core.a main.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a malloc.c.o
-	${GCC32_PREFIX}-ar rcs core.a new.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a sbrk.c.o
-	${GCC32_PREFIX}-ar rcs core.a start.S.o
-	${GCC32_PREFIX}-ar rcs core.a wiring.c.o
-	${GCC32_PREFIX}-ar rcs core.a wiring_analog.c.o
-	${GCC32_PREFIX}-ar rcs core.a wiring_digital.c.o
-	${GCC32_PREFIX}-ar rcs core.a wiring_pulse.cpp.o
-	${GCC32_PREFIX}-ar rcs core.a wiring_shift.c.o
-	${GCC32_PREFIX}-g++ -T ${RISCDUINO_BOARD}/sdk/bsp/env/riscduino_score/link.lds -nostartfiles -Wl,-N -Wl,--gc-sections -Wl,--wrap=malloc -Wl,--wrap=free -Wl,--wrap=sbrk ${PATTERN}.ino.cpp.o -nostdlib -Wl,--start-group core.a -lm -lstdc++ -lc -lgloss -Wl,--end-group -lgcc -o ${PATTERN}.ino.elf
-	${GCC32_PREFIX}-objcopy -R .rel.dyn -O binary ${PATTERN}.ino.elf ${PATTERN}.ino.bin
-	${GCC32_PREFIX}-objcopy -R .rel.dyn -O verilog ${PATTERN}.ino.elf ${PATTERN}.ino.hex
-	${GCC32_PREFIX}-objdump -D  ${PATTERN}.ino.elf >   ${PATTERN}.ino.dump
-	rm *.o *.a
-ifeq ($(SIM),RTL)
-   ifeq ($(DUMP),OFF)
-	iverilog -g2012 -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.rtl.$(CONFIG) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.rtl.lib  \
-	$< -o $@ 
-    else  
-	iverilog -g2012 -DWFDUMP -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.rtl.$(CONFIG) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.rtl.lib  \
-	$< -o $@ 
-   endif
-else  
-   ifeq ($(DUMP),OFF)
-	iverilog -g2012 -DFUNCTIONAL -DUSE_POWER_PINS -DGL -I $(PDK_PATH) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.gl.$(CONFIG) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.gl.lib \
-	$< -o $@ 
-    else  
-	iverilog -g2012 -DWFDUMP -DFUNCTIONAL -DUSE_POWER_PINS -DGL -I $(PDK_PATH) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.gl.$(CONFIG) \
-	-f$(USER_PROJECT_VERILOG)/includes/includes.gl.lib \
-	$< -o $@ 
-   endif
-endif
-
-%.vcd: %.vvp
-	vvp $< +risc_core_id=$(RISC_CORE)
-
-
-# ---- Clean ----
-
-clean:
-	rm -f *.elf *.hex *.bin *.vvp *.vcd *.log *.dump *.a *.o
-
-.PHONY: clean hex all