blob: 016df722b78126c44dc33544f9eaf89e5950c3f8 [file] [log] [blame]
#BUS_SORT
#MANUAL_PLACE
#N
core_icache_req_ack 000 0 2
core_icache_req
core_icache_cmd
core_icache_addr\[31\]
core_icache_addr\[30\]
core_icache_addr\[29\]
core_icache_addr\[28\]
core_icache_addr\[27\]
core_icache_addr\[26\]
core_icache_addr\[25\]
core_icache_addr\[24\]
core_icache_addr\[23\]
core_icache_addr\[22\]
core_icache_addr\[21\]
core_icache_addr\[20\]
core_icache_addr\[19\]
core_icache_addr\[18\]
core_icache_addr\[17\]
core_icache_addr\[16\]
core_icache_addr\[15\]
core_icache_addr\[14\]
core_icache_addr\[13\]
core_icache_addr\[12\]
core_icache_addr\[11\]
core_icache_addr\[10\]
core_icache_addr\[9\]
core_icache_addr\[8\]
core_icache_addr\[7\]
core_icache_addr\[6\]
core_icache_addr\[5\]
core_icache_addr\[4\]
core_icache_addr\[3\]
core_icache_addr\[2\]
core_icache_addr\[1\]
core_icache_addr\[0\]
core_icache_bl\[2\]
core_icache_bl\[1\]
core_icache_bl\[0\]
core_icache_width\[1\]
core_icache_width\[0\]
core_icache_rdata\[31\]
core_icache_rdata\[30\]
core_icache_rdata\[29\]
core_icache_rdata\[28\]
core_icache_rdata\[27\]
core_icache_rdata\[26\]
core_icache_rdata\[25\]
core_icache_rdata\[24\]
core_icache_rdata\[23\]
core_icache_rdata\[22\]
core_icache_rdata\[21\]
core_icache_rdata\[20\]
core_icache_rdata\[19\]
core_icache_rdata\[18\]
core_icache_rdata\[17\]
core_icache_rdata\[16\]
core_icache_rdata\[15\]
core_icache_rdata\[14\]
core_icache_rdata\[13\]
core_icache_rdata\[12\]
core_icache_rdata\[11\]
core_icache_rdata\[10\]
core_icache_rdata\[9\]
core_icache_rdata\[8\]
core_icache_rdata\[7\]
core_icache_rdata\[6\]
core_icache_rdata\[5\]
core_icache_rdata\[4\]
core_icache_rdata\[3\]
core_icache_rdata\[2\]
core_icache_rdata\[1\]
core_icache_rdata\[0\]
core_icache_resp\[1\]
core_icache_resp\[0\]
core_dcache_req_ack 100 0 2
core_dcache_req
core_dcache_cmd
core_dcache_width\[1\]
core_dcache_width\[0\]
core_dcache_addr\[31\]
core_dcache_addr\[30\]
core_dcache_addr\[29\]
core_dcache_addr\[28\]
core_dcache_addr\[27\]
core_dcache_addr\[26\]
core_dcache_addr\[25\]
core_dcache_addr\[24\]
core_dcache_addr\[23\]
core_dcache_addr\[22\]
core_dcache_addr\[21\]
core_dcache_addr\[20\]
core_dcache_addr\[19\]
core_dcache_addr\[18\]
core_dcache_addr\[17\]
core_dcache_addr\[16\]
core_dcache_addr\[15\]
core_dcache_addr\[14\]
core_dcache_addr\[13\]
core_dcache_addr\[12\]
core_dcache_addr\[11\]
core_dcache_addr\[10\]
core_dcache_addr\[9\]
core_dcache_addr\[8\]
core_dcache_addr\[7\]
core_dcache_addr\[6\]
core_dcache_addr\[5\]
core_dcache_addr\[4\]
core_dcache_addr\[3\]
core_dcache_addr\[2\]
core_dcache_addr\[1\]
core_dcache_addr\[0\]
core_dcache_wdata\[31\]
core_dcache_wdata\[30\]
core_dcache_wdata\[29\]
core_dcache_wdata\[28\]
core_dcache_wdata\[27\]
core_dcache_wdata\[26\]
core_dcache_wdata\[25\]
core_dcache_wdata\[24\]
core_dcache_wdata\[23\]
core_dcache_wdata\[22\]
core_dcache_wdata\[21\]
core_dcache_wdata\[20\]
core_dcache_wdata\[19\]
core_dcache_wdata\[18\]
core_dcache_wdata\[17\]
core_dcache_wdata\[16\]
core_dcache_wdata\[15\]
core_dcache_wdata\[14\]
core_dcache_wdata\[13\]
core_dcache_wdata\[12\]
core_dcache_wdata\[11\]
core_dcache_wdata\[10\]
core_dcache_wdata\[9\]
core_dcache_wdata\[8\]
core_dcache_wdata\[7\]
core_dcache_wdata\[6\]
core_dcache_wdata\[5\]
core_dcache_wdata\[4\]
core_dcache_wdata\[3\]
core_dcache_wdata\[2\]
core_dcache_wdata\[1\]
core_dcache_wdata\[0\]
core_dcache_rdata\[31\]
core_dcache_rdata\[30\]
core_dcache_rdata\[29\]
core_dcache_rdata\[28\]
core_dcache_rdata\[27\]
core_dcache_rdata\[26\]
core_dcache_rdata\[25\]
core_dcache_rdata\[24\]
core_dcache_rdata\[23\]
core_dcache_rdata\[22\]
core_dcache_rdata\[21\]
core_dcache_rdata\[20\]
core_dcache_rdata\[19\]
core_dcache_rdata\[18\]
core_dcache_rdata\[17\]
core_dcache_rdata\[16\]
core_dcache_rdata\[15\]
core_dcache_rdata\[14\]
core_dcache_rdata\[13\]
core_dcache_rdata\[12\]
core_dcache_rdata\[11\]
core_dcache_rdata\[10\]
core_dcache_rdata\[9\]
core_dcache_rdata\[8\]
core_dcache_rdata\[7\]
core_dcache_rdata\[6\]
core_dcache_rdata\[5\]
core_dcache_rdata\[4\]
core_dcache_rdata\[3\]
core_dcache_rdata\[2\]
core_dcache_rdata\[1\]
core_dcache_rdata\[0\]
core_dcache_resp\[1\]
core_dcache_resp\[0\]
core_dmem_req_ack 0200 0 2
core_dmem_req
core_dmem_cmd
core_dmem_bl\[2\]
core_dmem_bl\[1\]
core_dmem_bl\[0\]
core_dmem_width\[1\]
core_dmem_width\[0\]
core_dmem_addr\[31\]
core_dmem_addr\[30\]
core_dmem_addr\[29\]
core_dmem_addr\[28\]
core_dmem_addr\[27\]
core_dmem_addr\[26\]
core_dmem_addr\[25\]
core_dmem_addr\[24\]
core_dmem_addr\[23\]
core_dmem_addr\[22\]
core_dmem_addr\[21\]
core_dmem_addr\[20\]
core_dmem_addr\[19\]
core_dmem_addr\[18\]
core_dmem_addr\[17\]
core_dmem_addr\[16\]
core_dmem_addr\[15\]
core_dmem_addr\[14\]
core_dmem_addr\[13\]
core_dmem_addr\[12\]
core_dmem_addr\[11\]
core_dmem_addr\[10\]
core_dmem_addr\[9\]
core_dmem_addr\[8\]
core_dmem_addr\[7\]
core_dmem_addr\[6\]
core_dmem_addr\[5\]
core_dmem_addr\[4\]
core_dmem_addr\[3\]
core_dmem_addr\[2\]
core_dmem_addr\[1\]
core_dmem_addr\[0\]
core_dmem_wdata\[31\]
core_dmem_wdata\[30\]
core_dmem_wdata\[29\]
core_dmem_wdata\[28\]
core_dmem_wdata\[27\]
core_dmem_wdata\[26\]
core_dmem_wdata\[25\]
core_dmem_wdata\[24\]
core_dmem_wdata\[23\]
core_dmem_wdata\[22\]
core_dmem_wdata\[21\]
core_dmem_wdata\[20\]
core_dmem_wdata\[19\]
core_dmem_wdata\[18\]
core_dmem_wdata\[17\]
core_dmem_wdata\[16\]
core_dmem_wdata\[15\]
core_dmem_wdata\[14\]
core_dmem_wdata\[13\]
core_dmem_wdata\[12\]
core_dmem_wdata\[11\]
core_dmem_wdata\[10\]
core_dmem_wdata\[9\]
core_dmem_wdata\[8\]
core_dmem_wdata\[7\]
core_dmem_wdata\[6\]
core_dmem_wdata\[5\]
core_dmem_wdata\[4\]
core_dmem_wdata\[3\]
core_dmem_wdata\[2\]
core_dmem_wdata\[1\]
core_dmem_wdata\[0\]
core_dmem_rdata\[31\]
core_dmem_rdata\[30\]
core_dmem_rdata\[29\]
core_dmem_rdata\[28\]
core_dmem_rdata\[27\]
core_dmem_rdata\[26\]
core_dmem_rdata\[25\]
core_dmem_rdata\[24\]
core_dmem_rdata\[23\]
core_dmem_rdata\[22\]
core_dmem_rdata\[21\]
core_dmem_rdata\[20\]
core_dmem_rdata\[19\]
core_dmem_rdata\[18\]
core_dmem_rdata\[17\]
core_dmem_rdata\[16\]
core_dmem_rdata\[15\]
core_dmem_rdata\[14\]
core_dmem_rdata\[13\]
core_dmem_rdata\[12\]
core_dmem_rdata\[11\]
core_dmem_rdata\[10\]
core_dmem_rdata\[9\]
core_dmem_rdata\[8\]
core_dmem_rdata\[7\]
core_dmem_rdata\[6\]
core_dmem_rdata\[5\]
core_dmem_rdata\[4\]
core_dmem_rdata\[3\]
core_dmem_rdata\[2\]
core_dmem_rdata\[1\]
core_dmem_rdata\[0\]
core_dmem_resp\[1\]
core_dmem_resp\[0\]
cfg_dcache_force_flush
cfg_bypass_icache
cfg_bypass_dcache
#S
icache_mem_clk0
icache_mem_csb0
icache_mem_web0
icache_mem_addr0\[0\]
icache_mem_addr0\[1\]
icache_mem_addr0\[2\]
icache_mem_addr0\[3\]
icache_mem_addr0\[4\]
icache_mem_addr0\[5\]
icache_mem_addr0\[6\]
icache_mem_addr0\[7\]
icache_mem_addr0\[8\]
icache_mem_wmask0\[0\]
icache_mem_wmask0\[1\]
icache_mem_wmask0\[2\]
icache_mem_wmask0\[3\]
icache_mem_din0\[0\]
icache_mem_din0\[1\]
icache_mem_din0\[2\]
icache_mem_din0\[3\]
icache_mem_din0\[4\]
icache_mem_din0\[5\]
icache_mem_din0\[6\]
icache_mem_din0\[7\]
icache_mem_din0\[8\]
icache_mem_din0\[9\]
icache_mem_din0\[10\]
icache_mem_din0\[11\]
icache_mem_din0\[12\]
icache_mem_din0\[13\]
icache_mem_din0\[14\]
icache_mem_din0\[15\]
icache_mem_din0\[16\]
icache_mem_din0\[17\]
icache_mem_din0\[18\]
icache_mem_din0\[19\]
icache_mem_din0\[20\]
icache_mem_din0\[21\]
icache_mem_din0\[22\]
icache_mem_din0\[23\]
icache_mem_din0\[24\]
icache_mem_din0\[25\]
icache_mem_din0\[26\]
icache_mem_din0\[27\]
icache_mem_din0\[28\]
icache_mem_din0\[29\]
icache_mem_din0\[30\]
icache_mem_din0\[31\]
icache_mem_clk1 100 0 4
icache_mem_csb1
icache_mem_addr1\[8\]
icache_mem_addr1\[7\]
icache_mem_addr1\[6\]
icache_mem_addr1\[5\]
icache_mem_addr1\[4\]
icache_mem_addr1\[3\]
icache_mem_addr1\[2\]
icache_mem_addr1\[1\]
icache_mem_addr1\[0\]
icache_mem_dout1\[0\] 150 0 2
icache_mem_dout1\[1\]
icache_mem_dout1\[2\]
icache_mem_dout1\[3\]
icache_mem_dout1\[4\]
icache_mem_dout1\[5\]
icache_mem_dout1\[6\]
icache_mem_dout1\[7\]
icache_mem_dout1\[8\]
icache_mem_dout1\[9\]
icache_mem_dout1\[10\]
icache_mem_dout1\[11\]
icache_mem_dout1\[12\]
icache_mem_dout1\[13\]
icache_mem_dout1\[14\]
icache_mem_dout1\[15\]
icache_mem_dout1\[16\]
icache_mem_dout1\[17\]
icache_mem_dout1\[18\]
icache_mem_dout1\[19\]
icache_mem_dout1\[20\]
icache_mem_dout1\[21\]
icache_mem_dout1\[22\]
icache_mem_dout1\[23\]
icache_mem_dout1\[24\]
icache_mem_dout1\[25\]
icache_mem_dout1\[26\]
icache_mem_dout1\[27\]
icache_mem_dout1\[28\]
icache_mem_dout1\[29\]
icache_mem_dout1\[30\]
icache_mem_dout1\[31\]
wb_rst_n 500 0
pwrup_rst_n
core_clk
cpu_intf_rst_n
#W
dcache_mem_clk0 000 0 2
dcache_mem_csb0
dcache_mem_web0
dcache_mem_addr0\[0\]
dcache_mem_addr0\[1\]
dcache_mem_addr0\[2\]
dcache_mem_addr0\[3\]
dcache_mem_addr0\[4\]
dcache_mem_addr0\[5\]
dcache_mem_addr0\[6\]
dcache_mem_addr0\[7\]
dcache_mem_addr0\[8\]
dcache_mem_wmask0\[0\]
dcache_mem_wmask0\[1\]
dcache_mem_wmask0\[2\]
dcache_mem_wmask0\[3\]
dcache_mem_din0\[0\]
dcache_mem_din0\[1\]
dcache_mem_din0\[2\]
dcache_mem_din0\[3\]
dcache_mem_din0\[4\]
dcache_mem_din0\[5\]
dcache_mem_din0\[6\]
dcache_mem_din0\[7\]
dcache_mem_din0\[8\]
dcache_mem_din0\[9\]
dcache_mem_din0\[10\]
dcache_mem_din0\[11\]
dcache_mem_din0\[12\]
dcache_mem_din0\[13\]
dcache_mem_din0\[14\]
dcache_mem_din0\[15\]
dcache_mem_din0\[16\]
dcache_mem_din0\[17\]
dcache_mem_din0\[18\]
dcache_mem_din0\[19\]
dcache_mem_din0\[20\]
dcache_mem_din0\[21\]
dcache_mem_din0\[22\]
dcache_mem_din0\[23\]
dcache_mem_din0\[24\]
dcache_mem_din0\[25\]
dcache_mem_din0\[26\]
dcache_mem_din0\[27\]
dcache_mem_din0\[28\]
dcache_mem_din0\[29\]
dcache_mem_din0\[30\]
dcache_mem_din0\[31\]
dcache_mem_dout0\[0\] 100 0 2
dcache_mem_dout0\[1\]
dcache_mem_dout0\[2\]
dcache_mem_dout0\[3\]
dcache_mem_dout0\[4\]
dcache_mem_dout0\[5\]
dcache_mem_dout0\[6\]
dcache_mem_dout0\[7\]
dcache_mem_dout0\[8\]
dcache_mem_dout0\[9\]
dcache_mem_dout0\[10\]
dcache_mem_dout0\[11\]
dcache_mem_dout0\[12\]
dcache_mem_dout0\[13\]
dcache_mem_dout0\[14\]
dcache_mem_dout0\[15\]
dcache_mem_dout0\[16\]
dcache_mem_dout0\[17\]
dcache_mem_dout0\[18\]
dcache_mem_dout0\[19\]
dcache_mem_dout0\[20\]
dcache_mem_dout0\[21\]
dcache_mem_dout0\[22\]
dcache_mem_dout0\[23\]
dcache_mem_dout0\[24\]
dcache_mem_dout0\[25\]
dcache_mem_dout0\[26\]
dcache_mem_dout0\[27\]
dcache_mem_dout0\[28\]
dcache_mem_dout0\[29\]
dcache_mem_dout0\[30\]
dcache_mem_dout0\[31\]
dcache_mem_clk1 200 0 2
dcache_mem_csb1
dcache_mem_addr1\[8\]
dcache_mem_addr1\[7\]
dcache_mem_addr1\[6\]
dcache_mem_addr1\[5\]
dcache_mem_addr1\[4\]
dcache_mem_addr1\[3\]
dcache_mem_addr1\[2\]
dcache_mem_addr1\[1\]
dcache_mem_addr1\[0\]
dcache_mem_dout1\[0\] 250 0 2
dcache_mem_dout1\[1\]
dcache_mem_dout1\[2\]
dcache_mem_dout1\[3\]
dcache_mem_dout1\[4\]
dcache_mem_dout1\[5\]
dcache_mem_dout1\[6\]
dcache_mem_dout1\[7\]
dcache_mem_dout1\[8\]
dcache_mem_dout1\[9\]
dcache_mem_dout1\[10\]
dcache_mem_dout1\[11\]
dcache_mem_dout1\[12\]
dcache_mem_dout1\[13\]
dcache_mem_dout1\[14\]
dcache_mem_dout1\[15\]
dcache_mem_dout1\[16\]
dcache_mem_dout1\[17\]
dcache_mem_dout1\[18\]
dcache_mem_dout1\[19\]
dcache_mem_dout1\[20\]
dcache_mem_dout1\[21\]
dcache_mem_dout1\[22\]
dcache_mem_dout1\[23\]
dcache_mem_dout1\[24\]
dcache_mem_dout1\[25\]
dcache_mem_dout1\[26\]
dcache_mem_dout1\[27\]
dcache_mem_dout1\[28\]
dcache_mem_dout1\[29\]
dcache_mem_dout1\[30\]
dcache_mem_dout1\[31\]
#E
cfg_cska_riscv\[3\] 0000 0 2
cfg_cska_riscv\[2\]
cfg_cska_riscv\[1\]
cfg_cska_riscv\[0\]
wbd_clk_int
wbd_clk_riscv
wb_clk
wbd_dmem_stb_o 0100 0 2
wbd_dmem_we_o
wbd_dmem_adr_o\[31\]
wbd_dmem_adr_o\[30\]
wbd_dmem_adr_o\[29\]
wbd_dmem_adr_o\[28\]
wbd_dmem_adr_o\[27\]
wbd_dmem_adr_o\[26\]
wbd_dmem_adr_o\[25\]
wbd_dmem_adr_o\[24\]
wbd_dmem_adr_o\[23\]
wbd_dmem_adr_o\[22\]
wbd_dmem_adr_o\[21\]
wbd_dmem_adr_o\[20\]
wbd_dmem_adr_o\[19\]
wbd_dmem_adr_o\[18\]
wbd_dmem_adr_o\[17\]
wbd_dmem_adr_o\[16\]
wbd_dmem_adr_o\[15\]
wbd_dmem_adr_o\[14\]
wbd_dmem_adr_o\[13\]
wbd_dmem_adr_o\[12\]
wbd_dmem_adr_o\[11\]
wbd_dmem_adr_o\[10\]
wbd_dmem_adr_o\[9\]
wbd_dmem_adr_o\[8\]
wbd_dmem_adr_o\[7\]
wbd_dmem_adr_o\[6\]
wbd_dmem_adr_o\[5\]
wbd_dmem_adr_o\[4\]
wbd_dmem_adr_o\[3\]
wbd_dmem_adr_o\[2\]
wbd_dmem_adr_o\[1\]
wbd_dmem_adr_o\[0\]
wbd_dmem_sel_o\[3\]
wbd_dmem_sel_o\[2\]
wbd_dmem_sel_o\[1\]
wbd_dmem_sel_o\[0\]
wbd_dmem_bl_o\[2\]
wbd_dmem_bl_o\[1\]
wbd_dmem_bl_o\[0\]
wbd_dmem_bry_o
wbd_dmem_dat_o\[31\]
wbd_dmem_dat_o\[30\]
wbd_dmem_dat_o\[29\]
wbd_dmem_dat_o\[28\]
wbd_dmem_dat_o\[27\]
wbd_dmem_dat_o\[26\]
wbd_dmem_dat_o\[25\]
wbd_dmem_dat_o\[24\]
wbd_dmem_dat_o\[23\]
wbd_dmem_dat_o\[22\]
wbd_dmem_dat_o\[21\]
wbd_dmem_dat_o\[20\]
wbd_dmem_dat_o\[19\]
wbd_dmem_dat_o\[18\]
wbd_dmem_dat_o\[17\]
wbd_dmem_dat_o\[16\]
wbd_dmem_dat_o\[15\]
wbd_dmem_dat_o\[14\]
wbd_dmem_dat_o\[13\]
wbd_dmem_dat_o\[12\]
wbd_dmem_dat_o\[11\]
wbd_dmem_dat_o\[10\]
wbd_dmem_dat_o\[9\]
wbd_dmem_dat_o\[8\]
wbd_dmem_dat_o\[7\]
wbd_dmem_dat_o\[6\]
wbd_dmem_dat_o\[5\]
wbd_dmem_dat_o\[4\]
wbd_dmem_dat_o\[3\]
wbd_dmem_dat_o\[2\]
wbd_dmem_dat_o\[1\]
wbd_dmem_dat_o\[0\]
wbd_dmem_dat_i\[31\]
wbd_dmem_dat_i\[30\]
wbd_dmem_dat_i\[29\]
wbd_dmem_dat_i\[28\]
wbd_dmem_dat_i\[27\]
wbd_dmem_dat_i\[26\]
wbd_dmem_dat_i\[25\]
wbd_dmem_dat_i\[24\]
wbd_dmem_dat_i\[23\]
wbd_dmem_dat_i\[22\]
wbd_dmem_dat_i\[21\]
wbd_dmem_dat_i\[20\]
wbd_dmem_dat_i\[19\]
wbd_dmem_dat_i\[18\]
wbd_dmem_dat_i\[17\]
wbd_dmem_dat_i\[16\]
wbd_dmem_dat_i\[15\]
wbd_dmem_dat_i\[14\]
wbd_dmem_dat_i\[13\]
wbd_dmem_dat_i\[12\]
wbd_dmem_dat_i\[11\]
wbd_dmem_dat_i\[10\]
wbd_dmem_dat_i\[9\]
wbd_dmem_dat_i\[8\]
wbd_dmem_dat_i\[7\]
wbd_dmem_dat_i\[6\]
wbd_dmem_dat_i\[5\]
wbd_dmem_dat_i\[4\]
wbd_dmem_dat_i\[3\]
wbd_dmem_dat_i\[2\]
wbd_dmem_dat_i\[1\]
wbd_dmem_dat_i\[0\]
wbd_dmem_lack_i
wbd_dmem_ack_i
wbd_dmem_err_i
wb_dcache_stb_o 0300 0 2
wb_dcache_we_o
wb_dcache_adr_o\[31\]
wb_dcache_adr_o\[30\]
wb_dcache_adr_o\[29\]
wb_dcache_adr_o\[28\]
wb_dcache_adr_o\[27\]
wb_dcache_adr_o\[26\]
wb_dcache_adr_o\[25\]
wb_dcache_adr_o\[24\]
wb_dcache_adr_o\[23\]
wb_dcache_adr_o\[22\]
wb_dcache_adr_o\[21\]
wb_dcache_adr_o\[20\]
wb_dcache_adr_o\[19\]
wb_dcache_adr_o\[18\]
wb_dcache_adr_o\[17\]
wb_dcache_adr_o\[16\]
wb_dcache_adr_o\[15\]
wb_dcache_adr_o\[14\]
wb_dcache_adr_o\[13\]
wb_dcache_adr_o\[12\]
wb_dcache_adr_o\[11\]
wb_dcache_adr_o\[10\]
wb_dcache_adr_o\[9\]
wb_dcache_adr_o\[8\]
wb_dcache_adr_o\[7\]
wb_dcache_adr_o\[6\]
wb_dcache_adr_o\[5\]
wb_dcache_adr_o\[4\]
wb_dcache_adr_o\[3\]
wb_dcache_adr_o\[2\]
wb_dcache_adr_o\[1\]
wb_dcache_adr_o\[0\]
wb_dcache_sel_o\[3\]
wb_dcache_sel_o\[2\]
wb_dcache_sel_o\[1\]
wb_dcache_sel_o\[0\]
wb_dcache_bl_o\[9\]
wb_dcache_bl_o\[8\]
wb_dcache_bl_o\[7\]
wb_dcache_bl_o\[6\]
wb_dcache_bl_o\[5\]
wb_dcache_bl_o\[4\]
wb_dcache_bl_o\[3\]
wb_dcache_bl_o\[2\]
wb_dcache_bl_o\[1\]
wb_dcache_bl_o\[0\]
wb_dcache_bry_o
wb_dcache_dat_o\[31\]
wb_dcache_dat_o\[30\]
wb_dcache_dat_o\[29\]
wb_dcache_dat_o\[28\]
wb_dcache_dat_o\[27\]
wb_dcache_dat_o\[26\]
wb_dcache_dat_o\[25\]
wb_dcache_dat_o\[24\]
wb_dcache_dat_o\[23\]
wb_dcache_dat_o\[22\]
wb_dcache_dat_o\[21\]
wb_dcache_dat_o\[20\]
wb_dcache_dat_o\[19\]
wb_dcache_dat_o\[18\]
wb_dcache_dat_o\[17\]
wb_dcache_dat_o\[16\]
wb_dcache_dat_o\[15\]
wb_dcache_dat_o\[14\]
wb_dcache_dat_o\[13\]
wb_dcache_dat_o\[12\]
wb_dcache_dat_o\[11\]
wb_dcache_dat_o\[10\]
wb_dcache_dat_o\[9\]
wb_dcache_dat_o\[8\]
wb_dcache_dat_o\[7\]
wb_dcache_dat_o\[6\]
wb_dcache_dat_o\[5\]
wb_dcache_dat_o\[4\]
wb_dcache_dat_o\[3\]
wb_dcache_dat_o\[2\]
wb_dcache_dat_o\[1\]
wb_dcache_dat_o\[0\]
wb_dcache_dat_i\[31\]
wb_dcache_dat_i\[30\]
wb_dcache_dat_i\[29\]
wb_dcache_dat_i\[28\]
wb_dcache_dat_i\[27\]
wb_dcache_dat_i\[26\]
wb_dcache_dat_i\[25\]
wb_dcache_dat_i\[24\]
wb_dcache_dat_i\[23\]
wb_dcache_dat_i\[22\]
wb_dcache_dat_i\[21\]
wb_dcache_dat_i\[20\]
wb_dcache_dat_i\[19\]
wb_dcache_dat_i\[18\]
wb_dcache_dat_i\[17\]
wb_dcache_dat_i\[16\]
wb_dcache_dat_i\[15\]
wb_dcache_dat_i\[14\]
wb_dcache_dat_i\[13\]
wb_dcache_dat_i\[12\]
wb_dcache_dat_i\[11\]
wb_dcache_dat_i\[10\]
wb_dcache_dat_i\[9\]
wb_dcache_dat_i\[8\]
wb_dcache_dat_i\[7\]
wb_dcache_dat_i\[6\]
wb_dcache_dat_i\[5\]
wb_dcache_dat_i\[4\]
wb_dcache_dat_i\[3\]
wb_dcache_dat_i\[2\]
wb_dcache_dat_i\[1\]
wb_dcache_dat_i\[0\]
wb_dcache_ack_i
wb_dcache_lack_i
wb_dcache_err_i
wb_dcache_cyc_o
wb_icache_stb_o 500 0 2
wb_icache_we_o
wb_icache_adr_o\[31\]
wb_icache_adr_o\[30\]
wb_icache_adr_o\[29\]
wb_icache_adr_o\[28\]
wb_icache_adr_o\[27\]
wb_icache_adr_o\[26\]
wb_icache_adr_o\[25\]
wb_icache_adr_o\[24\]
wb_icache_adr_o\[23\]
wb_icache_adr_o\[22\]
wb_icache_adr_o\[21\]
wb_icache_adr_o\[20\]
wb_icache_adr_o\[19\]
wb_icache_adr_o\[18\]
wb_icache_adr_o\[17\]
wb_icache_adr_o\[16\]
wb_icache_adr_o\[15\]
wb_icache_adr_o\[14\]
wb_icache_adr_o\[13\]
wb_icache_adr_o\[12\]
wb_icache_adr_o\[11\]
wb_icache_adr_o\[10\]
wb_icache_adr_o\[9\]
wb_icache_adr_o\[8\]
wb_icache_adr_o\[7\]
wb_icache_adr_o\[6\]
wb_icache_adr_o\[5\]
wb_icache_adr_o\[4\]
wb_icache_adr_o\[3\]
wb_icache_adr_o\[2\]
wb_icache_adr_o\[1\]
wb_icache_adr_o\[0\]
wb_icache_sel_o\[3\]
wb_icache_sel_o\[2\]
wb_icache_sel_o\[1\]
wb_icache_sel_o\[0\]
wb_icache_bl_o\[9\]
wb_icache_bl_o\[8\]
wb_icache_bl_o\[7\]
wb_icache_bl_o\[6\]
wb_icache_bl_o\[5\]
wb_icache_bl_o\[4\]
wb_icache_bl_o\[3\]
wb_icache_bl_o\[2\]
wb_icache_bl_o\[1\]
wb_icache_bl_o\[0\]
wb_icache_bry_o
wb_icache_dat_i\[31\]
wb_icache_dat_i\[30\]
wb_icache_dat_i\[29\]
wb_icache_dat_i\[28\]
wb_icache_dat_i\[27\]
wb_icache_dat_i\[26\]
wb_icache_dat_i\[25\]
wb_icache_dat_i\[24\]
wb_icache_dat_i\[23\]
wb_icache_dat_i\[22\]
wb_icache_dat_i\[21\]
wb_icache_dat_i\[20\]
wb_icache_dat_i\[19\]
wb_icache_dat_i\[18\]
wb_icache_dat_i\[17\]
wb_icache_dat_i\[16\]
wb_icache_dat_i\[15\]
wb_icache_dat_i\[14\]
wb_icache_dat_i\[13\]
wb_icache_dat_i\[12\]
wb_icache_dat_i\[11\]
wb_icache_dat_i\[10\]
wb_icache_dat_i\[9\]
wb_icache_dat_i\[8\]
wb_icache_dat_i\[7\]
wb_icache_dat_i\[6\]
wb_icache_dat_i\[5\]
wb_icache_dat_i\[4\]
wb_icache_dat_i\[3\]
wb_icache_dat_i\[2\]
wb_icache_dat_i\[1\]
wb_icache_dat_i\[0\]
wb_icache_ack_i
wb_icache_lack_i
wb_icache_err_i
wb_icache_cyc_o
cfg_icache_pfet_dis
cfg_icache_ntag_pfet_dis
cfg_dcache_pfet_dis
cfg_sram_lphase\[1\]
cfg_sram_lphase\[0\]