blob: 63c493abbaa7db580346560e074ffb9ccb5f9bcd [file] [log] [blame]
Project Chip ID is: 490519
Setting Project Chip ID to: 00077c17
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!