blob: 6de3a4e3da87c01c243d4546bd3b8c1a2668de49 [file] [log] [blame]
/root/graphics_controller/sdc/openGFX430.sdc
/root/graphics_controller/sdc/user_project_wrapper.sdc
/root/graphics_controller/sdf/openGFX430.sdf
/root/graphics_controller/sdf/user_project_wrapper.sdf
/root/graphics_controller/spef/openGFX430.spef
/root/graphics_controller/spef/user_project_wrapper.spef
/root/graphics_controller/verilog/includes/includes.gl+sdf.caravel_user_project
/root/graphics_controller/verilog/includes/includes.gl.caravel_user_project
/root/graphics_controller/verilog/includes/includes.rtl.caravel_user_project
/root/graphics_controller/verilog/rtl/src/ogfx_backend.v
/root/graphics_controller/verilog/rtl/src/ogfx_backend_frame_fifo.v
/root/graphics_controller/verilog/rtl/src/ogfx_backend_lut_fifo.v
/root/graphics_controller/verilog/rtl/src/ogfx_gpu.v
/root/graphics_controller/verilog/rtl/src/ogfx_gpu_dma.v
/root/graphics_controller/verilog/rtl/src/ogfx_gpu_dma_addr.v
/root/graphics_controller/verilog/rtl/src/ogfx_gpu_reg.v
/root/graphics_controller/verilog/rtl/src/ogfx_if_lt24.v
/root/graphics_controller/verilog/rtl/src/ogfx_ram_arbiter.v
/root/graphics_controller/verilog/rtl/src/ogfx_reg.v
/root/graphics_controller/verilog/rtl/src/ogfx_reg_fifo.v
/root/graphics_controller/verilog/rtl/src/ogfx_reg_vram_addr.v
/root/graphics_controller/verilog/rtl/src/ogfx_reg_vram_if.v
/root/graphics_controller/verilog/rtl/src/openGFX430.v
/root/graphics_controller/verilog/rtl/src/openGFX430_defines.v
/root/graphics_controller/verilog/rtl/src/openGFX430_undefines.v