blob: 0e6623921a19a84775199306faa3888fdd4f321b [file] [log] [blame]
Project Chip ID is: 461455
Setting Project Chip ID to: 00070a8f
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!