blob: bbcbe90625036b792095a2ea8bbb3c468d00e1c5 [file] [log] [blame]
Project Chip ID is: 509618
Setting Project Chip ID to: 0007c6b2
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!