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  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. lib/
  7. mag/
  8. maglef/
  9. openlane/
  10. sdc/
  11. signoff/
  12. spi/
  13. verilog/
  14. .gitignore
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  16. LICENSE
  17. Makefile
  18. README.md
README.md

Caravel User Project

License UPRJ_CI Caravel Build

Waveform Generator

The source files for the Waveform Generator can be found under the waveform-generator repository.

The completed GSD file

The general idea is that various stimuli can be arbitrarily connected to different driver.

WFG block diagram

Currently the following blocks are implemented:

Stimuli

  • wfg_stim_sine
  • wfg_stim_mem

Driver

  • wfg_drive_spi
  • wfg_drive_pat

Various

  • wfg_interconnect
  • wfg_core
  • wfg_subcore

Memory Map

The base address of the user project is 0x30000000.

By adding an offset to this base address, the various peripherals can be configured.

For more information about the register entries please refer to the waveform-generator repository.

wfg_core

OffsetNameDescription
0x10CTRLCore control register
0x14CFGCore configuration register

wfg_subcore

OffsetNameDescription
0x20CTRLSubcore control register
0x24CFGSubcore configuration register

wfg_interconnect

OffsetNameDescription
0x30CTRLControl register for interconnect
0x34DRIVER0Driver configuration register
0x38DRIVER1Driver configuration register

wfg_stim_sine

OffsetNameDescription
0x40CTRLControl register for sine wave generation unit
0x44INCIncrement register
0x48GAINGain register
0x4COFFSETOffset register

wfg_stim_mem

OffsetNameDescription
0x50CTRLControl register for memory unit
0x54STARTStart register
0x58ENDEnd register
0x5CCFGConfiguration register

wfg_drive_spi

OffsetNameDescription
0x60CTRLControl register for SPI unit
0x64CFGSPI configuration register
0x68CLKCFGSPI clock configuration register

wfg_drive_pat

OffsetNameDescription
0x70CTRLControl register for pattern unit
0x74CFGPattern configuration register
0x78PATSEL0Low bits of PATSEL
0x7CPATSEL1High bits of PATSEL