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{
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  "tree": "4b0c41f2aa3bc126d12e943edf76c95b72afb571",
  "parents": [
    "610ad9ab1653119b2d2f0d463792d0ae46e960b5"
  ],
  "author": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Sun Aug 22 17:49:55 2021 -0400"
  },
  "committer": {
    "name": "Tim Edwards",
    "email": "tim@opencircuitdesign.com",
    "time": "Sun Aug 22 17:49:55 2021 -0400"
  },
  "message": "Updated with various corrections.  There are now three testbenches,\nadding one which exercises the LUT programming write, load, and\nread cycles;  and one which exercises the full array programming\nand tests the LUT core cell functions, applying data to the array\nthrough the logic analyzer, and reading data from the array.\n",
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