v {xschem version=3.0.0 file_version=1.2 }
G {}
K {}
V {}
S {}
E {}
B 2 880 -280 1680 120 {flags=graph
y1=0
y2=2
ypos1=0
ypos2=2
divy=5
subdivy=1
unity=1
x1=1.74605e-05
x2=4.68269e-05
divx=5
subdivx=1


dataset=0
unitx=u
digital=1
color="5 4"
node="COL1,col1x2x,col1x1x,col1x0x
COL0,col0x2x,col0x1x,col0x0x"}
B 2 870 -750 1670 -350 {flags=graph
y1=0.05
y2=0.601
ypos1=0
ypos2=2


unity=1
x1=1.74605e-05
x2=4.68269e-05
divx=5
subdivx=1
node="analog_00
analog_01
analog_10
analog_11"
color="4 5 6 7"
dataset=0
unitx=u
subdivy=1
divy=10}
N -120 -200 -110 -200 {
lab=VCC}
N -120 -220 -110 -220 {
lab=CLK}
N -120 -180 -110 -180 {
lab=RESET}
N -120 -160 -110 -160 {
lab=RAMP}
N -120 90 -110 90 {
lab=VCC}
N -120 70 -110 70 {
lab=CLK}
N -120 110 -110 110 {
lab=RESET}
N -120 130 -110 130 {
lab=RAMP}
N 410 -200 420 -200 {
lab=VCC}
N 410 -220 420 -220 {
lab=CLK}
N 410 -180 420 -180 {
lab=RESET}
N 410 -160 420 -160 {
lab=RAMP}
N 410 90 420 90 {
lab=VCC}
N 410 70 420 70 {
lab=CLK}
N 410 110 420 110 {
lab=RESET}
N 410 130 420 130 {
lab=RAMP}
N 70 270 230 270 {
lab=#net1}
N 50 340 70 340 {
lab=SA_VREF}
N 600 260 760 260 {
lab=#net2}
N 600 260 600 310 {
lab=#net2}
N 580 330 600 330 {
lab=SA_VREF}
N 900 310 920 310 {
lab=COL1[7:0]}
N 370 320 390 320 {
lab=COL0[7:0]}
N 230 -50 230 270 {
lab=#net1}
N 760 -50 760 260 {
lab=#net2}
N -120 -70 -110 -70 {
lab=ROW0}
N -110 -70 420 -70 {
lab=ROW0}
N -110 200 420 200 {
lab=ROW1}
N 70 270 70 320 {
lab=#net1}
N 230 -340 230 -50 {
lab=#net1}
N 190 -340 230 -340 {
lab=#net1}
N 760 -340 760 -50 {
lab=#net2}
N 720 -340 760 -340 {
lab=#net2}
N 720 -50 760 -50 {
lab=#net2}
N -120 -240 -110 -240 {
lab=vbias}
N -120 -260 -110 -260 {
lab=NB2}
N -120 -280 -110 -280 {
lab=NB1}
N -130 -320 -110 -320 {
lab=PLUS}
N -130 -340 -110 -340 {
lab=CSA}
N -120 50 -110 50 {
lab=vbias}
N -120 30 -110 30 {
lab=NB2}
N -120 10 -110 10 {
lab=NB1}
N -130 -30 -110 -30 {
lab=PLUS}
N -130 -50 -110 -50 {
lab=CSA}
N 410 50 420 50 {
lab=vbias}
N 410 30 420 30 {
lab=NB2}
N 410 10 420 10 {
lab=NB1}
N 400 -30 420 -30 {
lab=PLUS}
N 400 -50 420 -50 {
lab=CSA}
N 410 -240 420 -240 {
lab=vbias}
N 410 -260 420 -260 {
lab=NB2}
N 410 -280 420 -280 {
lab=NB1}
N 400 -320 420 -320 {
lab=PLUS}
N 400 -340 420 -340 {
lab=CSA}
N -120 200 -110 200 {
lab=ROW1}
N 190 -320 250 -320 {
lab=ANALOG_00}
N -130 -300 -110 -300 {
lab=itest}
N -770 -440 -770 -410 { lab=PLUS}
N -630 -440 -630 -410 { lab=vbias}
N -530 -440 -530 -410 { lab=CSA}
N -400 -260 -400 -240 {
lab=RAMP}
N -470 -260 -470 -240 {
lab=VCC}
N -910 -100 -910 -40 {
lab=GND}
N -910 -180 -910 -160 {
lab=NB1}
N -910 -130 -870 -130 {
lab=GND}
N -910 -220 -910 -180 {
lab=NB1}
N -990 -180 -990 -130 {
lab=NB1}
N -990 -130 -950 -130 {
lab=NB1}
N -990 -180 -910 -180 {
lab=NB1}
N -990 -320 -990 -180 {
lab=NB1}
N -620 -100 -620 -40 {
lab=GND}
N -620 -130 -580 -130 {
lab=GND}
N -620 -180 -620 -160 {
lab=NB2}
N -690 -130 -660 -130 {
lab=NB2}
N -690 -180 -690 -130 {
lab=NB2}
N -690 -180 -620 -180 {
lab=NB2}
N -750 -130 -690 -130 {
lab=NB2}
N -620 -190 -620 -180 {
lab=NB2}
N -630 10 -630 30 {
lab=RESET}
N -1410 -40 -1410 -20 {
lab=ROW0}
N -380 -100 -380 -80 {
lab=SA_VREF}
N -380 -20 -380 0 {
lab=GND}
N -1030 -540 -970 -540 {
lab=GND}
N -970 -480 -970 -440 {
lab=itest}
N -250 -510 -250 -490 {
lab=#net3}
N -250 -510 -170 -510 {
lab=#net3}
N -110 -510 70 -510 {
lab=CLK}
N -340 -570 -340 -550 {
lab=#net4}
N -340 -570 -140 -570 {
lab=#net4}
N -140 -570 -140 -550 {
lab=#net4}
N 720 -320 780 -320 {
lab=ANALOG_01}
N 190 -50 230 -50 {
lab=#net1}
N -1440 -230 -1440 -210 {
lab=ROW1}
N 190 -30 250 -30 {
lab=ANALOG_10}
N 720 -30 780 -30 {
lab=ANALOG_11}
N -900 -720 -840 -720 {
lab=GND}
N -840 -660 -840 -620 {
lab=itest2}
N 410 -10 420 -10 {
lab=itest2}
N -120 -140 -110 -140 {
lab=ROW0}
N -120 -140 -120 -70 {
lab=ROW0}
N 410 -140 420 -140 {
lab=ROW0}
N 410 -140 410 -70 {
lab=ROW0}
N -120 150 -110 150 {
lab=ROW1}
N -120 150 -120 200 {
lab=ROW1}
N 410 150 420 150 {
lab=ROW1}
N 410 150 410 190 {
lab=ROW1}
N 410 190 410 200 {
lab=ROW1}
N 170 -710 190 -710 {
lab=#net5}
N 170 -690 190 -690 {
lab=#net6}
N 170 -730 190 -730 {
lab=#net7}
N 490 -590 510 -590 {
lab=GRAY_IN[0]}
N 490 -610 510 -610 {
lab=GRAY_IN[1]}
N 490 -630 510 -630 {
lab=GRAY_IN[2]}
N 490 -650 510 -650 {
lab=GRAY_IN[3]}
N 490 -670 510 -670 {
lab=GRAY_IN[4]}
N 490 -690 510 -690 {
lab=GRAY_IN[5]}
N 490 -710 510 -710 {
lab=GRAY_IN[6]}
N 490 -730 510 -730 {
lab=GRAY_IN[7]}
N 0 -690 10 -690 {
lab=GND}
N -140 -120 -110 -120 {
lab=GRAY_IN[7:0]}
N 390 -120 420 -120 {
lab=GRAY_IN[7:0]}
N 390 170 420 170 {
lab=GRAY_IN[7:0]}
N -140 170 -110 170 {
lab=GRAY_IN[7:0]}
C {pixel_dps.sym} 40 -230 0 0 {name=x2}
C {devices/lab_pin.sym} -120 -200 0 0 {name=p2 lab=VCC}
C {devices/lab_pin.sym} -120 -220 0 0 {name=l5 sig_type=std_logic lab=CLK}
C {devices/lab_pin.sym} -120 -180 0 0 {name=l9 sig_type=std_logic lab=RESET}
C {devices/lab_pin.sym} -120 -160 0 0 {name=l13 sig_type=std_logic lab=RAMP}
C {devices/code.sym} -830 340 0 0 {name=TT_MODELS1
only_toplevel=true
format="tcleval( @value )"
value="
** opencircuitdesign pdks install
.lib $::SKYWATER_MODELS/sky130.lib.spice tt

"
spice_ignore=false}
C {devices/lab_pin.sym} -120 90 0 0 {name=p3 lab=VCC}
C {devices/lab_pin.sym} -120 70 0 0 {name=l12 sig_type=std_logic lab=CLK}
C {devices/lab_pin.sym} -120 110 0 0 {name=l14 sig_type=std_logic lab=RESET}
C {devices/lab_pin.sym} -120 130 0 0 {name=l19 sig_type=std_logic lab=RAMP}
C {devices/lab_pin.sym} 410 -200 0 0 {name=p4 lab=VCC}
C {devices/lab_pin.sym} 410 -220 0 0 {name=l23 sig_type=std_logic lab=CLK}
C {devices/lab_pin.sym} 410 -180 0 0 {name=l24 sig_type=std_logic lab=RESET}
C {devices/lab_pin.sym} 410 -160 0 0 {name=l25 sig_type=std_logic lab=RAMP}
C {devices/lab_pin.sym} 410 90 0 0 {name=p5 lab=VCC}
C {devices/lab_pin.sym} 410 70 0 0 {name=l28 sig_type=std_logic lab=CLK}
C {devices/lab_pin.sym} 410 110 0 0 {name=l29 sig_type=std_logic lab=RESET}
C {devices/lab_pin.sym} 410 130 0 0 {name=l30 sig_type=std_logic lab=RAMP}
C {devices/lab_pin.sym} -120 200 0 0 {name=l22 sig_type=std_logic lab=ROW1}
C {devices/lab_pin.sym} 580 330 0 0 {name=l40 sig_type=std_logic lab=SA_VREF}
C {devices/netlist_options.sym} 190 550 0 0 {
bus_replacement_char="xx"

}
C {devices/opin.sym} 390 320 0 0 {name=p6 lab=COL0[7:0]}
C {devices/opin.sym} 920 310 0 0 {name=p9 lab=COL1[7:0]}
C {devices/lab_pin.sym} -130 -340 2 1 {name=l7 sig_type=std_logic lab=CSA}
C {devices/lab_pin.sym} -130 -320 2 1 {name=l10 sig_type=std_logic lab=PLUS}
C {devices/lab_pin.sym} -120 -240 2 1 {name=l18 sig_type=std_logic lab=vbias}
C {devices/lab_pin.sym} -120 -280 2 1 {name=l26 sig_type=std_logic lab=NB1}
C {devices/lab_pin.sym} -120 -260 0 0 {name=l27 sig_type=std_logic lab=NB2}
C {devices/lab_pin.sym} -130 -50 2 1 {name=l32 sig_type=std_logic lab=CSA}
C {devices/lab_pin.sym} -130 -30 2 1 {name=l43 sig_type=std_logic lab=PLUS}
C {devices/lab_pin.sym} -120 50 2 1 {name=l52 sig_type=std_logic lab=vbias}
C {devices/lab_pin.sym} -120 10 2 1 {name=l53 sig_type=std_logic lab=NB1}
C {devices/lab_pin.sym} -120 30 0 0 {name=l54 sig_type=std_logic lab=NB2}
C {devices/lab_pin.sym} 400 -50 2 1 {name=l55 sig_type=std_logic lab=CSA}
C {devices/lab_pin.sym} 400 -30 2 1 {name=l56 sig_type=std_logic lab=PLUS}
C {devices/lab_pin.sym} 410 50 2 1 {name=l57 sig_type=std_logic lab=vbias}
C {devices/lab_pin.sym} 410 10 2 1 {name=l58 sig_type=std_logic lab=NB1}
C {devices/lab_pin.sym} 410 30 0 0 {name=l59 sig_type=std_logic lab=NB2}
C {devices/lab_pin.sym} 400 -340 2 1 {name=l60 sig_type=std_logic lab=CSA}
C {devices/lab_pin.sym} 400 -320 2 1 {name=l61 sig_type=std_logic lab=PLUS}
C {devices/lab_pin.sym} 410 -240 2 1 {name=l62 sig_type=std_logic lab=vbias}
C {devices/lab_pin.sym} 410 -280 2 1 {name=l63 sig_type=std_logic lab=NB1}
C {devices/lab_pin.sym} 410 -260 0 0 {name=l64 sig_type=std_logic lab=NB2}
C {devices/lab_pin.sym} 50 340 0 0 {name=l39 sig_type=std_logic lab=SA_VREF}
C {devices/opin.sym} 240 -320 0 0 {name=p8 lab=ANALOG_00}
C {devices/lab_pin.sym} -130 -300 0 0 {name=l68 sig_type=std_logic lab=itest}
C {devices/code.sym} -830 160 0 0 {name=STIMULI1 
only_toplevel=true
place=end
value="
.options gmin=10e-20
.save v(ANALOG_00)
.control

*dc v2 0 1.8 0.05
*plot v(test)
tran 10u 1.4m

write pixelarray_tb.raw

options filetype=ascii
write pixelarray_tb.out
.endc
"}
C {devices/vsource.sym} -840 -380 0 0 {name=V8 value=1.8 net_name=true}
C {devices/vsource.sym} -770 -380 0 0 {name=V9 only_toplevel=true value="DC=0.60"}
C {devices/lab_pin.sym} -770 -440 0 1 {name=l1 sig_type=std_logic lab=PLUS}
C {devices/vsource.sym} -630 -380 0 0 {name=V11 only_toplevel=true value="DC=1"}
C {devices/lab_pin.sym} -630 -440 0 1 {name=l2 sig_type=std_logic lab=vbias}
C {devices/gnd.sym} -840 -350 0 0 {name=l3 lab=GND}
C {devices/gnd.sym} -770 -350 0 0 {name=l4 lab=GND}
C {devices/gnd.sym} -630 -350 0 0 {name=l31 lab=GND}
C {devices/vsource.sym} -530 -380 0 0 {name=V12 only_toplevel=true value="DC=0.4"}
C {devices/lab_pin.sym} -530 -440 0 1 {name=l6 sig_type=std_logic lab=CSA}
C {devices/gnd.sym} -530 -350 0 0 {name=l36 lab=GND}
C {devices/vdd.sym} -840 -410 0 0 {name=l37 lab=VDD}
C {devices/lab_pin.sym} -470 -260 0 0 {name=p1 lab=VCC}
C {devices/vsource.sym} -470 -210 0 0 {name=V1 value=1.8}
C {devices/gnd.sym} -470 -180 0 0 {name=l11 lab=GND}
C {devices/vsource.sym} -400 -210 0 0 {name=V2 value="PULSE(\{ramp_low\} \{ramp_high\} \{t_start\} \{t_ramp\} 0.1u \{pixel_rate-t_ramp\} \{pixel_rate\})"}
C {devices/gnd.sym} -400 -180 0 0 {name=l15 lab=GND}
C {devices/lab_pin.sym} -400 -260 2 0 {name=l16 sig_type=std_logic lab=RAMP}
C {sky130_fd_pr/nfet_01v8_lvt.sym} -930 -130 0 0 {name=M2
L=1.2
W=1
nf=1
mult=1
ad="'int((nf+1)/2) * W/nf * 0.29'" 
pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
as="'int((nf+2)/2) * W/nf * 0.29'" 
ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
model=nfet_01v8_lvt
spiceprefix=X
}
C {devices/ngspice_probe.sym} -910 -190 0 0 {name=r2}
C {devices/lab_pin.sym} -870 -130 0 1 {name=l44 sig_type=std_logic lab=GND}
C {devices/lab_pin.sym} -910 -40 0 1 {name=l45 sig_type=std_logic lab=GND}
C {devices/isource.sym} -910 -250 0 0 {name=I0 value=400n}
C {devices/vdd.sym} -910 -280 0 0 {name=l46 lab=VDD}
C {devices/lab_pin.sym} -990 -320 0 1 {name=l47 sig_type=std_logic lab=NB1}
C {devices/vdd.sym} -620 -250 0 0 {name=l48 lab=VDD}
C {devices/isource.sym} -620 -220 0 0 {name=I4 value=30n}
C {sky130_fd_pr/nfet_01v8_lvt.sym} -640 -130 0 0 {name=M6
L=1.2
W=1
nf=1
mult=1
ad="'int((nf+1)/2) * W/nf * 0.29'" 
pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
as="'int((nf+2)/2) * W/nf * 0.29'" 
ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
model=nfet_01v8_lvt
spiceprefix=X
}
C {devices/lab_pin.sym} -580 -130 0 1 {name=l49 sig_type=std_logic lab=GND}
C {devices/lab_pin.sym} -620 -40 0 1 {name=l50 sig_type=std_logic lab=GND}
C {devices/lab_pin.sym} -750 -130 0 0 {name=l51 sig_type=std_logic lab=NB2}
C {devices/gnd.sym} -630 90 0 0 {name=l17 lab=GND}
C {devices/lab_pin.sym} -630 10 2 0 {name=l20 sig_type=std_logic lab=RESET}
C {devices/vsource.sym} -1410 10 0 0 {name=V7 value="PULSE(0 1.8 \{read_start\} 0.01u 0.01u \{t_read\} \{pixel_rate\})"}
C {devices/gnd.sym} -1410 40 0 0 {name=l21 lab=GND}
C {devices/lab_pin.sym} -1410 -40 2 0 {name=l33 sig_type=std_logic lab=ROW0}
C {devices/vsource.sym} -630 60 0 1 {name=V6 value="PULSE(0 1.8 \{read_start\} 0.01u 0.01u \{per\} \{pixel_rate\})"}
C {devices/vsource.sym} -380 -50 0 0 {name=V10 value=200m}
C {devices/gnd.sym} -380 0 0 0 {name=V13 value="PULSE(0 1.8 20us 0.01us 0.01us 10us 50us)"}
C {devices/gnd.sym} -380 0 0 0 {name=V14 value="PULSE(0 1.8 20us 0.01us 0.01us 10us 50us)"}
C {devices/lab_pin.sym} -380 -100 0 0 {name=l34 sig_type=std_logic lab=SA_VREF}
C {devices/gnd.sym} -1030 -540 0 0 {name=I5 value="dc=0" PWL(0 0
+ 1.000000e+04u 0.000000e+00 
+ 1.008654e+04u 0.000000e+00 
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}
C {devices/isource.sym} -970 -510 0 0 {name=I2 value="DC=0 PULSE(0 300p 60u 0.01u 0.01u 10u)"}
C {devices/lab_pin.sym} -970 -440 0 0 {name=l35 sig_type=std_logic lab=itest}
C {devices/vsource.sym} -250 -460 0 0 {name=V4 value="PULSE(0 1.8 \{t_start\} 0.01u 0.01u \{per/2\} \{per\})"}
C {devices/gnd.sym} -250 -430 0 0 {name=l38 lab=GND}
C {sky130_fd_pr/nfet3_01v8.sym} -140 -530 3 1 {name=M1
L=5
W=5
body=GND
nf=1
mult=1
ad="'int((nf+1)/2) * W/nf * 0.29'" 
pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
as="'int((nf+2)/2) * W/nf * 0.29'" 
ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
model=nfet_01v8
spiceprefix=X
}
C {devices/vsource.sym} -340 -520 0 0 {name=V5 value="PULSE(4 0 \{read_start\} 0.01us 0.01us \{pixel_rate-t_ramp\} \{pixel_rate\})"}
C {devices/gnd.sym} -340 -490 0 0 {name=l41 lab=GND}
C {devices/lab_pin.sym} 70 -510 2 0 {name=l42 sig_type=std_logic lab=CLK}
C {pixel_dps.sym} 40 60 0 0 {name=x1}
C {pixel_dps.sym} 570 60 0 0 {name=x3}
C {pixel_dps.sym} 570 -230 0 0 {name=x4}
C {devices/opin.sym} 770 -320 0 0 {name=p7 lab=ANALOG_01}
C {devices/vsource.sym} -1440 -180 0 0 {name=V3 value="PULSE(0 1.8 \{read_start+1*t_read\}  0.01u 0.01u \{t_read\} \{pixel_rate\})"}
C {devices/gnd.sym} -1440 -150 0 0 {name=l66 lab=GND}
C {devices/lab_pin.sym} -1440 -230 2 0 {name=l67 sig_type=std_logic lab=ROW1}
C {devices/lab_pin.sym} -120 -70 0 0 {name=l8 sig_type=std_logic lab=ROW0}
C {devices/opin.sym} 240 -30 0 0 {name=p10 lab=ANALOG_10}
C {devices/opin.sym} 770 -30 0 0 {name=p11 lab=ANALOG_11}
C {devices/spice_probe.sym} 380 320 0 0 {name=p12 attrs=""}
C {devices/spice_probe.sym} 910 310 0 0 {name=p13 attrs=""}
C {devices/spice_probe.sym} 740 -30 0 0 {name=p14 attrs=""}
C {devices/spice_probe.sym} 210 -30 0 0 {name=p15 attrs=""}
C {devices/spice_probe.sym} 210 -320 0 0 {name=p16 attrs=""}
C {devices/spice_probe.sym} 740 -320 0 0 {name=p17 attrs=""}
C {devices/spice_probe.sym} -400 -250 3 0 {name=p18 attrs=""}
C {devices/spice_probe.sym} -470 -250 1 1 {name=p19 attrs=""}
C {devices/spice_probe.sym} -1410 -30 3 0 {name=p20 attrs=""}
C {devices/spice_probe.sym} -630 20 3 0 {name=p21 attrs=""}
C {devices/spice_probe.sym} -60 -510 3 0 {name=p22 attrs=""}
C {devices/spice_probe.sym} -1440 -220 3 0 {name=p23 attrs=""}
C {devices/code_shown.sym} -510 330 0 0 {name=SPICE only_toplevel=false value="
.param per = 0.1u
.param t_start = 4u

.param num_bits=8
.param num_rows = 2
.param num_cols = 2

.param ramp_low=0m
.param ramp_high=800m
.param t_read=2u

.param t_ramp = \{per * pow(2,num_bits)\}
.param read_start = \{t_start + t_ramp\}
.param pixel_rate = \{t_ramp + t_read*num_rows\}
"}
C {devices/gnd.sym} -900 -720 0 0 {name=I1 value="dc=0" PWL(0 0
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}
C {devices/isource.sym} -840 -690 0 0 {name=I3 value="DC=0 PULSE(0 200p 100u 0.01u 0.01u 10u)"}
C {devices/lab_pin.sym} -840 -620 0 0 {name=l65 sig_type=std_logic lab=itest2}
C {devices/lab_pin.sym} 410 -10 0 0 {name=l69 sig_type=std_logic lab=itest2}
C {digital_prims/adc_bridge.sym} 80 -690 0 0 {name=x5}
C {devices/lab_pin.sym} 10 -730 0 0 {name=p24 lab=VCC}
C {digital_prims/adc_bridge.sym} 80 -730 0 0 {name=x8}
C {digital_prims/adc_bridge.sym} 80 -710 0 0 {name=x9}
C {devices/lab_pin.sym} 510 -590 2 0 {name=l70 sig_type=std_logic lab=GRAY_IN[0]}
C {adc/8bit_graycounter.sym} 340 -660 0 0 {name=x10}
C {devices/gnd.sym} 0 -690 1 0 {name=l71 lab=GND}
C {devices/lab_pin.sym} 510 -610 2 0 {name=l72 sig_type=std_logic lab=GRAY_IN[1]}
C {devices/lab_pin.sym} 510 -630 2 0 {name=l73 sig_type=std_logic lab=GRAY_IN[2]}
C {devices/lab_pin.sym} 510 -650 2 0 {name=l74 sig_type=std_logic lab=GRAY_IN[3]}
C {devices/lab_pin.sym} 510 -670 2 0 {name=l75 sig_type=std_logic lab=GRAY_IN[4]}
C {devices/lab_pin.sym} 510 -690 2 0 {name=l76 sig_type=std_logic lab=GRAY_IN[5]}
C {devices/lab_pin.sym} 510 -710 2 0 {name=l77 sig_type=std_logic lab=GRAY_IN[6]}
C {devices/lab_pin.sym} 510 -730 2 0 {name=l78 sig_type=std_logic lab=GRAY_IN[7]}
C {devices/lab_pin.sym} 10 -710 0 0 {name=l79 sig_type=std_logic lab=CLK}
C {devices/lab_pin.sym} -140 -120 0 0 {name=l80 sig_type=std_logic lab=GRAY_IN[7:0]}
C {devices/lab_pin.sym} 390 -120 0 0 {name=l81 sig_type=std_logic lab=GRAY_IN[7:0]}
C {devices/lab_pin.sym} 390 170 0 0 {name=l82 sig_type=std_logic lab=GRAY_IN[7:0]}
C {devices/lab_pin.sym} -140 170 0 0 {name=l83 sig_type=std_logic lab=GRAY_IN[7:0]}
C {8bit_SA.sym} 220 330 0 0 {name=x6}
C {8bit_SA.sym} 750 320 0 0 {name=x7}