v {xschem version=3.0.0 file_version=1.2 }
G {}
K {}
V {}
S {}
E {}
N -30 -120 -30 -100 {
lab=VDD}
N -50 -120 -50 -100 {
lab=GND}
N -10 -120 -10 -100 {
lab=CSA}
N -10 -120 20 -120 {
lab=CSA}
N -170 0 -150 0 {
lab=PLUS}
N -170 20 -150 20 {
lab=itest}
N 150 10 190 10 {
lab=AMP_OUT}
N -30 100 -30 130 {
lab=NB1}
N -50 100 -50 140 {
lab=NB2}
N -10 110 -10 140 {
lab=vbias}
N -630 -160 -630 -130 { lab=PLUS}
N -490 -160 -490 -130 { lab=vbias}
N -390 -160 -390 -130 { lab=CSA}
N -300 -220 -240 -220 {
lab=GND}
N -720 270 -720 330 {
lab=GND}
N -720 190 -720 210 {
lab=NB1}
N -720 240 -680 240 {
lab=GND}
N -720 150 -720 190 {
lab=NB1}
N -800 190 -800 240 {
lab=NB1}
N -800 240 -760 240 {
lab=NB1}
N -800 190 -720 190 {
lab=NB1}
N -800 50 -800 190 {
lab=NB1}
N -430 270 -430 330 {
lab=GND}
N -430 240 -390 240 {
lab=GND}
N -430 190 -430 210 {
lab=NB2}
N -500 240 -470 240 {
lab=NB2}
N -500 190 -500 240 {
lab=NB2}
N -500 190 -430 190 {
lab=NB2}
N -560 240 -500 240 {
lab=NB2}
N -430 180 -430 190 {
lab=NB2}
N -240 -160 -240 -100 {
lab=itest}
C {/home/hni/TopMetalSe-OpenMPW6/xschem/csa.sym} 10 10 0 0 {name=x3}
C {devices/vdd.sym} -30 -120 0 0 {name=l38 lab=VDD}
C {devices/gnd.sym} -50 -120 1 0 {name=l39 lab=GND}
C {devices/lab_pin.sym} 20 -120 0 1 {name=l40 sig_type=std_logic lab=CSA}
C {devices/lab_pin.sym} -170 0 2 1 {name=l41 sig_type=std_logic lab=PLUS}
C {devices/lab_pin.sym} -170 20 0 0 {name=l42 sig_type=std_logic lab=itest}
C {devices/lab_pin.sym} -10 140 2 0 {name=l43 sig_type=std_logic lab=vbias}
C {devices/lab_pin.sym} -30 130 1 1 {name=l52 sig_type=std_logic lab=NB1}
C {devices/lab_pin.sym} -50 140 1 1 {name=l53 sig_type=std_logic lab=NB2}
C {devices/lab_pin.sym} 190 10 2 0 {name=l54 sig_type=std_logic lab=AMP_OUT}
C {devices/vsource.sym} -700 -100 0 0 {name=V8 value=1.8 net_name=true}
C {devices/vsource.sym} -630 -100 0 0 {name=V9 only_toplevel=true value="DC=0.60"}
C {devices/lab_pin.sym} -630 -160 0 1 {name=l9 sig_type=std_logic lab=PLUS}
C {devices/vsource.sym} -490 -100 0 0 {name=V11 only_toplevel=true value="DC=1"}
C {devices/lab_pin.sym} -490 -160 0 1 {name=l12 sig_type=std_logic lab=vbias}
C {devices/gnd.sym} -700 -70 0 0 {name=l29 lab=GND}
C {devices/gnd.sym} -630 -70 0 0 {name=l30 lab=GND}
C {devices/gnd.sym} -490 -70 0 0 {name=l31 lab=GND}
C {devices/vsource.sym} -390 -100 0 0 {name=V12 only_toplevel=true value="DC=0.2"}
C {devices/lab_pin.sym} -390 -160 0 1 {name=l32 sig_type=std_logic lab=CSA}
C {devices/gnd.sym} -300 -220 0 0 {name=I5 value="dc=0" PWL(0 0
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+ 4.227885e+04u 0.000000e+00 
+ 4.236538e+04u 0.000000e+00 
+ 4.245192e+04u 0.000000e+00 
+ 4.253846e+04u 0.000000e+00 
+ 4.262500e+04u 0.000000e+00 
+ 4.271154e+04u 0.000000e+00 
+ 4.279808e+04u 0.000000e+00 
+ 4.288462e+04u 0.000000e+00 
+ 4.297115e+04u 0.000000e+00 
+ 4.305769e+04u 0.000000e+00 
+ 4.314423e+04u 0.000000e+00 
+ 4.323077e+04u 0.000000e+00 
+ 4.331731e+04u 0.000000e+00 
+ 4.340385e+04u 0.000000e+00 
+ 4.349038e+04u 0.000000e+00 
+ 4.357692e+04u 0.000000e+00 
+ 4.366346e+04u 0.000000e+00 
+ 4.375000e+04u 0.000000e+00 
+ 4.383654e+04u 0.000000e+00 
+ 4.392308e+04u 0.000000e+00 
+ 4.400962e+04u 0.000000e+00 
+ 4.409615e+04u 0.000000e+00 
+ 4.418269e+04u 0.000000e+00 
+ 4.426923e+04u 0.000000e+00 
+ 4.435577e+04u 0.000000e+00 )"
}
C {devices/lab_pin.sym} -240 -100 3 0 {name=l33 sig_type=std_logic lab=itest}
C {devices/isource.sym} -240 -190 0 0 {name=I2 value="DC=0 PULSE(0 100p 20m 0.01u 0.01u 10m)"}
C {devices/gnd.sym} -390 -70 0 0 {name=l36 lab=GND}
C {devices/vdd.sym} -700 -130 0 0 {name=l37 lab=VDD}
C {sky130_fd_pr/nfet_01v8_lvt.sym} -740 240 0 0 {name=M2
L=1.2
W=1
nf=1
mult=1
ad="'int((nf+1)/2) * W/nf * 0.29'" 
pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
as="'int((nf+2)/2) * W/nf * 0.29'" 
ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
model=nfet_01v8_lvt
spiceprefix=X
}
C {devices/ngspice_probe.sym} -720 180 0 0 {name=r2}
C {devices/lab_pin.sym} -680 240 0 1 {name=l44 sig_type=std_logic lab=GND}
C {devices/lab_pin.sym} -720 330 0 1 {name=l45 sig_type=std_logic lab=GND}
C {devices/isource.sym} -720 120 0 0 {name=I0 value=400n}
C {devices/vdd.sym} -720 90 0 0 {name=l46 lab=VDD}
C {devices/lab_pin.sym} -800 50 0 1 {name=l47 sig_type=std_logic lab=NB1}
C {devices/vdd.sym} -430 120 0 0 {name=l48 lab=VDD}
C {devices/isource.sym} -430 150 0 0 {name=I4 value=30n}
C {sky130_fd_pr/nfet_01v8_lvt.sym} -450 240 0 0 {name=M6
L=1.2
W=1
nf=1
mult=1
ad="'int((nf+1)/2) * W/nf * 0.29'" 
pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
as="'int((nf+2)/2) * W/nf * 0.29'" 
ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
nrd="'0.29 / W'" nrs="'0.29 / W'"
sa=0 sb=0 sd=0
model=nfet_01v8_lvt
spiceprefix=X
}
C {devices/lab_pin.sym} -390 240 0 1 {name=l49 sig_type=std_logic lab=GND}
C {devices/lab_pin.sym} -430 330 0 1 {name=l50 sig_type=std_logic lab=GND}
C {devices/lab_pin.sym} -560 240 0 0 {name=l51 sig_type=std_logic lab=NB2}
C {devices/code.sym} -210 270 0 0 {name=STIMULI1 
only_toplevel=true
place=end
value="
.control
save all

tran 1m 40m
plot v(AMP_OUT)
.endc
"}
C {devices/code.sym} -200 440 0 0 {name=TT_MODELS1
only_toplevel=true
format="tcleval( @value )"
value="
** opencircuitdesign pdks install
.lib $::SKYWATER_MODELS/sky130.lib.spice tt

"
spice_ignore=false}