blob: 563d923ee2edf3e1c5c7acf6a060da9b0639d1d2 [file] [log] [blame]
Project Chip ID is: 507062
Setting Project Chip ID to: 0007bcb6
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!