)]}'
{
  "name": "third_party/shuttle/sky130/mpw-007/slot-022",
  "clone_url": "https://foss-eda-tools.googlesource.com/third_party/shuttle/sky130/mpw-007/slot-022",
  "description": "WARP-V: WARP-V is an open-source CPU core generator written in TL-Verilog with support for RISC-V and MIPS I."
}