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index e421827..a1551c7 100644
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+++ b/README.md
@@ -11,6 +11,7 @@
 
 As of today the primary objectives of the PMU are to accurately transfer FPGA bitstream data to the core and protect the IP the lies within a bitstream using AES as well as authenticating the bitstream data and user via SHA. The PMU is capable of on the fly use of both AES and SHA algorithms when transfering data from a host PC to FPGA core. This project will serve as a test implementation of the PMU where the user project wrapper includes the PMU version 3, SOFA 2x2 FPGA generated using OpenFPGA, and AES/SHA cores from secworks. Git repositories for all macros are given below.
 
+
 -PMU:  https://github.com/lnis-uofu/FPGA_Secured_Bitstream
 
 -FPGA: https://github.com/lnis-uofu/OpenFPGA
@@ -18,3 +19,10 @@
 -AES:  https://github.com/secworks/aes
 
 -SHA:  https://github.com/secworks/sha256
+
+
+## Tools
+
+SiliconCompiler was used to complete RTL-to-GDS flow for this project. SiliconCompiler is opensource compiler for automating source code to silicon using a Python API. 
+
+-SiliconCompiler: https://github.com/siliconcompiler/siliconcompiler