diff --git a/verilog/dv/make/sim.makefile b/verilog/dv/make/sim.makefile
new file mode 100644
index 0000000..8345579
--- /dev/null
+++ b/verilog/dv/make/sim.makefile
@@ -0,0 +1,191 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# Questa/Icarus
+SIMULATOR ?= Questa
+
+export IVERILOG_DUMPER = fst
+
+# RTL/GL/GL_SDF
+SIM?=RTL
+
+
+.SUFFIXES:
+
+
+ifeq ($(SIMULATOR),Icarus)
+all:  ${BLOCKS:=.lst} sim_icarus
+else
+all:  ${BLOCKS:=.lst} sim_questa
+endif
+
+hex:  ${BLOCKS:=.hex}
+
+#.SUFFIXES:
+
+##############################################################################
+# Comiple firmeware
+##############################################################################
+%.elf: %.c $(LINKER_SCRIPT) $(SOURCE_FILES)
+	${GCC_PATH}/${GCC_PREFIX}-gcc -g \
+	-I$(FIRMWARE_PATH) \
+	-I$(VERILOG_PATH)/dv/generated \
+	-I$(VERILOG_PATH)/dv/ \
+	-I$(VERILOG_PATH)/common \
+	  $(CPUFLAGS) \
+	-Wl,-Bstatic,-T,$(LINKER_SCRIPT),--strip-debug \
+	-ffreestanding -nostdlib -o $@ $(SOURCE_FILES) $<
+
+%.lst: %.elf
+	${GCC_PATH}/${GCC_PREFIX}-objdump -d -S $< > $@
+
+%.hex: %.elf
+	${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@ 
+	# to fix flash base address
+	sed -ie 's/@10/@00/g' $@
+
+%.bin: %.elf
+	${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
+	
+	
+##############################################################################
+# Runing the simulations
+##############################################################################
+
+#------------------------------------
+# Icarus Veriog
+#------------------------------------
+ifeq ($(SIMULATOR),Icarus)
+
+COMPOPT := -g2005-sv
+
+%.vvp: %_tb.v %.hex
+
+## RTL
+ifeq ($(SIM),RTL)
+    ifeq ($(CONFIG),caravel_user_project)
+		iverilog $(COMPOPT) -Ttyp -DFUNCTIONAL -DSIM -DUSE_POWER_PINS -DUNIT_DELAY=#1 \
+        -f$(VERILOG_PATH)/includes/includes.rtl.caravel \
+        -f$(USER_PROJECT_VERILOG)/includes/includes.rtl.$(CONFIG) -o $@ $<
+    else
+		iverilog $(COMPOPT) -Ttyp -DFUNCTIONAL -DSIM -DUSE_POWER_PINS -DUNIT_DELAY=#1 \
+		-f$(VERILOG_PATH)/includes/includes.rtl.$(CONFIG) \
+		-f$(CARAVEL_PATH)/rtl/__user_project_wrapper.v -o $@ $<
+    endif
+endif 
+
+## GL
+ifeq ($(SIM),GL)
+    ifeq ($(CONFIG),caravel_user_project)
+		iverilog $(COMPOPT) -Ttyp -DFUNCTIONAL -DGL -DUSE_POWER_PINS -DUNIT_DELAY=#1 \
+        -f$(VERILOG_PATH)/includes/includes.gl.caravel \
+        -f$(USER_PROJECT_VERILOG)/includes/includes.gl.$(CONFIG) -o $@ $<
+    else
+		iverilog $(COMPOPT) -Ttyp -DFUNCTIONAL -DGL -DUSE_POWER_PINS -DUNIT_DELAY=#1 \
+        -f$(VERILOG_PATH)/includes/includes.gl.$(CONFIG) \
+		-f$(CARAVEL_PATH)/gl/__user_project_wrapper.v -o $@ $<
+    endif
+endif 
+
+## GL+SDF
+ifeq ($(SIM),GL_SDF)
+    ifeq ($(CONFIG),caravel_user_project)
+		cvc64  +interp \
+		+define+SIM +define+FUNCTIONAL +define+GL +define+USE_POWER_PINS +define+UNIT_DELAY +define+ENABLE_SDF \
+		+change_port_type +dump2fst +fst+parallel2=on   +nointeractive +notimingchecks +mipdopt \
+		-f $(VERILOG_PATH)/includes/includes.gl+sdf.caravel \
+		-f $(USER_PROJECT_VERILOG)/includes/includes.gl+sdf.$(CONFIG) $<
+	else
+		cvc64  +interp \
+		+define+SIM +define+FUNCTIONAL +define+GL +define+USE_POWER_PINS +define+UNIT_DELAY +define+ENABLE_SDF \
+		+change_port_type +dump2fst +fst+parallel2=on   +nointeractive +notimingchecks +mipdopt \
+		-f $(VERILOG_PATH)/includes/includes.gl+sdf.$(CONFIG) \
+		-f $CARAVEL_PATH/gl/__user_project_wrapper.v $<
+    endif
+endif
+
+sim_icarus: ${BLOCKS:=.vvp}
+	vvp $< $(SIMOPT)
+
+# twinwave: RTL-%.vcd GL-%.vcd
+#     twinwave RTL-$@ * + GL-$@ *
+
+#------------------------------------
+# Questa
+#------------------------------------
+else
+
+COMPOPT := -64 -work work -sv -sv12compat -mfcu -suppress vlog-2892,vlog-2388,vlog-2248 +acc=lprn
+COMPOPT += ../vip/APM_APS6404L-3SQN_SQPI_PSRAM_model_v2.9_encrypt.vp_modelsim
+SIMOPT := -64 -c -suppress vsim-3009 -debugDB $(USER_SIMOPT)
+
+sim_questa:
+## RTL
+ifeq ($(SIM),RTL)
+	rm -rf work
+	vlib work
+  ifeq ($(CONFIG),caravel_user_project)
+	  vlog $(COMPOPT) +define+SIMULATOR_QUESTA +define+FUNCTIONAL +define+SIM +define+USE_POWER_PINS +define+UNIT_DELAY=#1 \
+	    -f $(VERILOG_PATH)/includes/includes.rtl.caravel \
+	    -f $(USER_PROJECT_VERILOG)/includes/includes.rtl.$(CONFIG) \
+	    ${BLOCKS:=_tb.v}
+	  vsim work.testbench $(SIMOPT) -do "$(DOOPT) run -all; quit;"
+  else
+	  echo "CONFIG = $(CONFIG): not supported."
+	  exit
+  endif
+endif
+
+## GL
+ifeq ($(SIM),GL)
+	rm -rf work
+	vlib work
+  ifeq ($(CONFIG),caravel_user_project)
+	  vlog $(COMPOPT) +define+SIMULATOR_QUESTA +define+FUNCTIONAL +define+GL +define+USE_POWER_PINS +define+UNIT_DELAY=#1 \
+	    -f $(VERILOG_PATH)/includes/includes.gl.caravel \
+	    -f $(USER_PROJECT_VERILOG)/includes/includes.gl.$(CONFIG) \
+	    ${BLOCKS:=_tb.v}
+	  vsim work.testbench $(SIMOPT) -do "$(DOOPT) run -all; quit;"
+  else
+	  echo "CONFIG = $(CONFIG): not supported."
+	  exit
+  endif
+endif
+endif
+
+check-env:
+ifndef PDK_ROOT
+	$(error PDK_ROOT is undefined, please export it before running make)
+endif
+ifeq (,$(wildcard $(PDK_ROOT)/$(PDK)))
+	$(error $(PDK_ROOT)/$(PDK) not found, please install pdk before running make)
+endif
+ifeq (,$(wildcard $(GCC_PATH)/$(GCC_PREFIX)-gcc ))
+	$(error $(GCC_PATH)/$(GCC_PREFIX)-gcc is not found, please export GCC_PATH and GCC_PREFIX before running make)
+endif
+# check for efabless style installation
+ifeq (,$(wildcard $(PDK_ROOT)/$(PDK)/libs.ref/*/verilog))
+SIM_DEFINES := ${SIM_DEFINES} -DEF_STYLE
+endif
+
+
+# ---- Clean ----
+
+clean:
+	rm -rf *.elf *.hex *.bin *.vvp *.log *.vcd* *.lst *.hexe *.err *.dbg *.wlf transcript work
+
+.PHONY: clean hex all
+
diff --git a/verilog/dv/marmot_test1/Makefile b/verilog/dv/marmot_test1/Makefile
index 3fd0b56..b1dbeed 100644
--- a/verilog/dv/marmot_test1/Makefile
+++ b/verilog/dv/marmot_test1/Makefile
@@ -14,8 +14,27 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 
+# RTL/GL/GL_SDF
+export SIM ?= RTL
 
- 
+# Questa/Icarus
+#SIMULATOR ?= Questa
+#DOOPT = log -r /testbench/* ;
+
+SIMULATOR ?= Icarus
+
+export TARGET_PATH = $(MARMOT_ROOT)
+export DESIGNS = $(TARGET_PATH)
+export CARAVEL_ROOT = $(TARGET_PATH)/caravel
+export MCW_ROOT = $(TARGET_PATH)/mgmt_core_wrapper
+export CORE_VERILOG_PATH = $(MCW_ROOT)/verilog
+#export PDK_ROOT = $(PDK_ROOT)
+#export PDK = $(PDK)
+export TOOLS = $(RISCV)
+export GCC_PREFIX = riscv64-unknown-linux-gnu
+
+TESTCASE_DIR = $(HOME)/Development/RISC-V/chipyard/vlsi/sim/testcase
+
 PWDD := $(shell pwd)
 BLOCKS := $(shell basename $(PWDD))
 
@@ -23,10 +42,13 @@
 
 CONFIG = caravel_user_project
 
-
 include $(MCW_ROOT)/verilog/dv/make/env.makefile
 include $(MCW_ROOT)/verilog/dv/make/var.makefile
 include $(MCW_ROOT)/verilog/dv/make/cpu.makefile
-include $(MCW_ROOT)/verilog/dv/make/sim.makefile
+include ../make/sim.makefile
 
+setup:
+	echo "// $(TESTCASE_DIR)/hello/spi_flash.mem" > spi_flash.mem
+	cat $(TESTCASE_DIR)/hello/spi_flash.mem >> spi_flash.mem
+	cp $(TESTCASE_DIR)/hello/spi_flash.lis spi_flash.lis
 
diff --git a/verilog/dv/marmot_test1/marmot_test1_tb.v b/verilog/dv/marmot_test1/marmot_test1_tb.v
index 717044e..f08c8e4 100644
--- a/verilog/dv/marmot_test1/marmot_test1_tb.v
+++ b/verilog/dv/marmot_test1/marmot_test1_tb.v
@@ -55,40 +55,41 @@
   wire        reset = `MARMOT.wb_rst_i;
 
 `ifdef SIM
-  wire [31:0] PC    = `CORE.coreMonitorBundle_pc;
+  wire [31:0] PC = `CORE.coreMonitorBundle_pc;
 `else
-  wire [31:0] PC    = {`MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[31] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[30] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[29] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[28] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[27] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[26] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[25] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[24] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[23] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[22] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[21] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[20] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[19] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[18] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[17] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[16] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[15] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[14] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[13] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[12] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[11] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[10] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[9] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[8] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[7] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[6] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[5] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[4] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[3] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[2] ,
-                       `MARMOT.\MarmotCaravelChip.MarmotCaravelPlatform.sys.tile.core.coreMonitorBundle_pc[1] ,
-                       1'b0};
+  wire [31:0] PC = {
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[31] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[30] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[29] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[28] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[27] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[26] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[25] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[24] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[23] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[22] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[21] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[20] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[19] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[18] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[17] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[16] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[15] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[14] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[13] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[12] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[11] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[10] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[9] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[8] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[7] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[6] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[5] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[4] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[3] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[2] ,
+    `MARMOT.\MarmotCaravelChip_dut_sys_tile_prci_domain_tile_reset_domain_tile_core_coreMonitorBundle_pc[1] ,
+    1'b0};
 `endif
 
 //-------------------------------------------------------------------------------
@@ -121,10 +122,10 @@
 //-------------------------------------------------------------------------------
 // Waveform
   initial begin
-    `ifdef WAVEFORM
-      $dumpfile("marmot_test1.vcd");
+    if ($test$plusargs("waveform")) begin
+      $dumpfile("wave.vcd");
       $dumpvars(0, `TB);
-    `endif
+    end 
   end
 
 //-------------------------------------------------------------------------------
@@ -142,11 +143,6 @@
     $sdf_annotate("../../../mgmt_core_wrapper/sdf/mgmt_core_wrapper.sdf", `CARAVEL.soc);
     $sdf_annotate("../../../sdf/user_project_wrapper.sdf.gz", `USER_PROJECT_WRAPPER);
     $sdf_annotate("../../../sdf/Marmot.sdf.gz", `MARMOT);
-    $sdf_annotate("../../../sdf/clk_skew_adjust.sdf.gz", `USER_PROJECT_WRAPPER.u_clk_skew_adjust_0);
-    $sdf_annotate("../../../sdf/clk_skew_adjust.sdf.gz", `USER_PROJECT_WRAPPER.u_clk_skew_adjust_1);
-    $sdf_annotate("../../../sdf/clk_skew_adjust.sdf.gz", `USER_PROJECT_WRAPPER.u_clk_skew_adjust_2);
-    $sdf_annotate("../../../sdf/clk_skew_adjust.sdf.gz", `USER_PROJECT_WRAPPER.u_clk_skew_adjust_3);
-    $sdf_annotate("../../../sdf/clk_skew_adjust.sdf.gz", `USER_PROJECT_WRAPPER.u_clk_skew_adjust_4);
   end
 `endif
 
@@ -166,18 +162,18 @@
   integer exception_pc_count;
 
   always @ (posedge clock) begin
-  //if ($test$plusargs("pc_monitor")) begin
+    if ($test$plusargs("pc_monitor")) begin
       if (cycle % 1000 == 0) begin
         $fwrite(32'h80000002, "[%t] %10d pc=%08x\n", $time, cycle, PC);
       end
-  //end
+    end
 
     // Finish on PC=x
-    if (^PC === 1'bx) begin
-      $display("[%t] PC=xxxxxxxx", $time);
-      repeat (50) @(posedge clock);
-      $finish;
-    end
+    //if (^PC === 1'bx) begin
+    //  $display("[%t] PC=xxxxxxxx", $time);
+    //  repeat (50) @(posedge clock);
+    //  $finish;
+    //end
 
     // Finish on exception
     if (PC == 32'h00000000 || PC == 32'h00000002) begin
@@ -322,10 +318,9 @@
 );
 
 //-------------------------------------------------------------------------------
-// SPI RAM model for Marmot
-`ifdef SIMULATOR_QUESTA
 // SPI RAM model (APM APS6404L-3SQN_SQPI_PSRAM)
-sqpi_model #(.VeriOutStr(1), .STOP_ON_ERROR(1)) spi_ram
+`ifdef SIMULATOR_QUESTA
+sqpi_model #(.VeriOutStr(1), .STOP_ON_ERROR(0)) spi_ram
 (
     .SCK_i  (mprj_io[io_spi2_sck]),
     .nCE_i  (mprj_io[io_spi2_csb]),
diff --git a/verilog/dv/marmot_test1/run_sim.csh b/verilog/dv/marmot_test1/run_sim.csh
new file mode 100755
index 0000000..af27425
--- /dev/null
+++ b/verilog/dv/marmot_test1/run_sim.csh
@@ -0,0 +1,16 @@
+#!/bin/csh -f
+
+#set sim = RTL
+set sim = GL
+
+set simopt =
+#set simopt = "$simopt +waveform"
+set simopt = "$simopt +pc_monitor"
+#set simopt = "$simopt +max_cycle=200000"
+
+if ($sim == RTL) then
+  make SIM=$sim SIMOPT="$simopt" |& spike-dasm | egrep -v '\[0\] pc=' | tee sim_${sim}.log
+else
+  make SIM=$sim SIMOPT="$simopt" |& tee sim_${sim}.log
+endif
+
diff --git a/verilog/dv/marmot_test1/setup.csh b/verilog/dv/marmot_test1/setup.csh
deleted file mode 100755
index f429bd5..0000000
--- a/verilog/dv/marmot_test1/setup.csh
+++ /dev/null
@@ -1,9 +0,0 @@
-#!/bin/csh -f
-
-set testcase_dir = /home/shc/Development/RISC-V/freedom/sim/testcase
-
-#cp -p $testcase_dir/dhrystone-2.1/gcc_dry2reg_flash.mem .
-cp -p $testcase_dir/hello/spi_flash.mem hello_flash.mem
-
-$testcase_dir/../../script/mk_init_ff.py $MARMOT_ROOT/verilog/gl/Marmot.v > init_ff.v
-
diff --git a/verilog/dv/marmot_test1/spi_flash.lis b/verilog/dv/marmot_test1/spi_flash.lis
new file mode 100644
index 0000000..0a54585
--- /dev/null
+++ b/verilog/dv/marmot_test1/spi_flash.lis
@@ -0,0 +1,1218 @@
+
+spi_flash.elf:     file format elf32-littleriscv
+
+
+Disassembly of section .text:
+
+20000000 <_prog_start>:
+20000000:	00000093          	li	ra,0
+20000004:	00000113          	li	sp,0
+20000008:	00000193          	li	gp,0
+2000000c:	00000213          	li	tp,0
+20000010:	00000293          	li	t0,0
+20000014:	00000313          	li	t1,0
+20000018:	00000393          	li	t2,0
+2000001c:	00000413          	li	s0,0
+20000020:	00000493          	li	s1,0
+20000024:	00000513          	li	a0,0
+20000028:	00000593          	li	a1,0
+2000002c:	00000613          	li	a2,0
+20000030:	00000693          	li	a3,0
+20000034:	00000713          	li	a4,0
+20000038:	00000793          	li	a5,0
+2000003c:	00000813          	li	a6,0
+20000040:	00000893          	li	a7,0
+20000044:	00000913          	li	s2,0
+20000048:	00000993          	li	s3,0
+2000004c:	00000a13          	li	s4,0
+20000050:	00000a93          	li	s5,0
+20000054:	00000b13          	li	s6,0
+20000058:	00000b93          	li	s7,0
+2000005c:	00000c13          	li	s8,0
+20000060:	00000c93          	li	s9,0
+20000064:	00000d13          	li	s10,0
+20000068:	00000d93          	li	s11,0
+2000006c:	00000e13          	li	t3,0
+20000070:	00000e93          	li	t4,0
+20000074:	00000f13          	li	t5,0
+20000078:	00000f93          	li	t6,0
+2000007c:	00800913          	li	s2,8
+20000080:	30491073          	csrw	mie,s2
+20000084:	00000493          	li	s1,0
+20000088:	f1402973          	csrr	s2,mhartid
+2000008c:	03249663          	bne	s1,s2,200000b8 <_prog_start+0xb8>
+20000090:	08002137          	lui	sp,0x8002
+20000094:	ff010113          	addi	sp,sp,-16 # 8001ff0 <_stack>
+20000098:	421000ef          	jal	ra,20000cb8 <main>
+2000009c:	020004b7          	lui	s1,0x2000
+200000a0:	00100913          	li	s2,1
+200000a4:	0124a023          	sw	s2,0(s1) # 2000000 <spi_quad_mode-0x6000000>
+200000a8:	00448493          	addi	s1,s1,4
+200000ac:	02000937          	lui	s2,0x2000
+200000b0:	08090913          	addi	s2,s2,128 # 2000080 <spi_quad_mode-0x5ffff80>
+200000b4:	ff24c6e3          	blt	s1,s2,200000a0 <_prog_start+0xa0>
+200000b8:	10500073          	wfi
+200000bc:	34402973          	csrr	s2,mip
+200000c0:	00897913          	andi	s2,s2,8
+200000c4:	fe090ae3          	beqz	s2,200000b8 <_prog_start+0xb8>
+200000c8:	020004b7          	lui	s1,0x2000
+200000cc:	f1402973          	csrr	s2,mhartid
+200000d0:	00291913          	slli	s2,s2,0x2
+200000d4:	00990933          	add	s2,s2,s1
+200000d8:	00092023          	sw	zero,0(s2)
+200000dc:	0004a903          	lw	s2,0(s1) # 2000000 <spi_quad_mode-0x6000000>
+200000e0:	fe091ee3          	bnez	s2,200000dc <_prog_start+0xdc>
+200000e4:	00448493          	addi	s1,s1,4
+200000e8:	02000937          	lui	s2,0x2000
+200000ec:	08090913          	addi	s2,s2,128 # 2000080 <spi_quad_mode-0x5ffff80>
+200000f0:	ff24c6e3          	blt	s1,s2,200000dc <_prog_start+0xdc>
+
+200000f4 <loop>:
+200000f4:	0000006f          	j	200000f4 <loop>
+
+200000f8 <memset>:
+200000f8:	0ff5f593          	andi	a1,a1,255
+200000fc:	00c50733          	add	a4,a0,a2
+20000100:	87aa                	mv	a5,a0
+20000102:	00c05763          	blez	a2,20000110 <memset+0x18>
+20000106:	0785                	addi	a5,a5,1
+20000108:	feb78fa3          	sb	a1,-1(a5)
+2000010c:	fef71de3          	bne	a4,a5,20000106 <memset+0xe>
+20000110:	8082                	ret
+
+20000112 <memcpy>:
+20000112:	00c05c63          	blez	a2,2000012a <memcpy+0x18>
+20000116:	962a                	add	a2,a2,a0
+20000118:	87aa                	mv	a5,a0
+2000011a:	0005c703          	lbu	a4,0(a1)
+2000011e:	0785                	addi	a5,a5,1
+20000120:	0585                	addi	a1,a1,1
+20000122:	fee78fa3          	sb	a4,-1(a5)
+20000126:	fef61ae3          	bne	a2,a5,2000011a <memcpy+0x8>
+2000012a:	8082                	ret
+
+2000012c <memcmp>:
+2000012c:	02c05563          	blez	a2,20000156 <memcmp+0x2a>
+20000130:	962e                	add	a2,a2,a1
+20000132:	a019                	j	20000138 <memcmp+0xc>
+20000134:	02b60163          	beq	a2,a1,20000156 <memcmp+0x2a>
+20000138:	00054783          	lbu	a5,0(a0)
+2000013c:	0005c703          	lbu	a4,0(a1)
+20000140:	0505                	addi	a0,a0,1
+20000142:	0585                	addi	a1,a1,1
+20000144:	fee788e3          	beq	a5,a4,20000134 <memcmp+0x8>
+20000148:	00f73533          	sltu	a0,a4,a5
+2000014c:	40a00533          	neg	a0,a0
+20000150:	8909                	andi	a0,a0,2
+20000152:	157d                	addi	a0,a0,-1
+20000154:	8082                	ret
+20000156:	4501                	li	a0,0
+20000158:	8082                	ret
+
+2000015a <strlen>:
+2000015a:	00054783          	lbu	a5,0(a0)
+2000015e:	872a                	mv	a4,a0
+20000160:	4501                	li	a0,0
+20000162:	cb81                	beqz	a5,20000172 <strlen+0x18>
+20000164:	0505                	addi	a0,a0,1
+20000166:	00a707b3          	add	a5,a4,a0
+2000016a:	0007c783          	lbu	a5,0(a5)
+2000016e:	fbfd                	bnez	a5,20000164 <strlen+0xa>
+20000170:	8082                	ret
+20000172:	8082                	ret
+
+20000174 <strcpy>:
+20000174:	0005c783          	lbu	a5,0(a1)
+20000178:	00f50023          	sb	a5,0(a0)
+2000017c:	0005c783          	lbu	a5,0(a1)
+20000180:	cb99                	beqz	a5,20000196 <strcpy+0x22>
+20000182:	87aa                	mv	a5,a0
+20000184:	0015c703          	lbu	a4,1(a1)
+20000188:	0585                	addi	a1,a1,1
+2000018a:	0785                	addi	a5,a5,1
+2000018c:	00e78023          	sb	a4,0(a5)
+20000190:	0005c703          	lbu	a4,0(a1)
+20000194:	fb65                	bnez	a4,20000184 <strcpy+0x10>
+20000196:	8082                	ret
+
+20000198 <strcmp>:
+20000198:	a019                	j	2000019e <strcmp+0x6>
+2000019a:	00e79d63          	bne	a5,a4,200001b4 <strcmp+0x1c>
+2000019e:	00054783          	lbu	a5,0(a0)
+200001a2:	0005c703          	lbu	a4,0(a1)
+200001a6:	0505                	addi	a0,a0,1
+200001a8:	0585                	addi	a1,a1,1
+200001aa:	00e7e6b3          	or	a3,a5,a4
+200001ae:	f6f5                	bnez	a3,2000019a <strcmp+0x2>
+200001b0:	4501                	li	a0,0
+200001b2:	8082                	ret
+200001b4:	00f73533          	sltu	a0,a4,a5
+200001b8:	40a00533          	neg	a0,a0
+200001bc:	8909                	andi	a0,a0,2
+200001be:	157d                	addi	a0,a0,-1
+200001c0:	8082                	ret
+
+200001c2 <strncmp>:
+200001c2:	87aa                	mv	a5,a0
+200001c4:	00c50833          	add	a6,a0,a2
+200001c8:	0007c703          	lbu	a4,0(a5)
+200001cc:	40f806b3          	sub	a3,a6,a5
+200001d0:	eb19                	bnez	a4,200001e6 <strncmp+0x24>
+200001d2:	0005c703          	lbu	a4,0(a1)
+200001d6:	c70d                	beqz	a4,20000200 <strncmp+0x3e>
+200001d8:	9532                	add	a0,a0,a2
+200001da:	8d1d                	sub	a0,a0,a5
+200001dc:	00a02533          	sgtz	a0,a0
+200001e0:	40a00533          	neg	a0,a0
+200001e4:	8082                	ret
+200001e6:	00d05d63          	blez	a3,20000200 <strncmp+0x3e>
+200001ea:	0005c683          	lbu	a3,0(a1)
+200001ee:	0785                	addi	a5,a5,1
+200001f0:	0585                	addi	a1,a1,1
+200001f2:	fce68be3          	beq	a3,a4,200001c8 <strncmp+0x6>
+200001f6:	4505                	li	a0,1
+200001f8:	fee6e6e3          	bltu	a3,a4,200001e4 <strncmp+0x22>
+200001fc:	557d                	li	a0,-1
+200001fe:	8082                	ret
+20000200:	4501                	li	a0,0
+20000202:	8082                	ret
+
+20000204 <putc>:
+20000204:	1141                	addi	sp,sp,-16
+20000206:	c422                	sw	s0,8(sp)
+20000208:	c606                	sw	ra,12(sp)
+2000020a:	47a9                	li	a5,10
+2000020c:	842a                	mv	s0,a0
+2000020e:	00f50863          	beq	a0,a5,2000021e <putc+0x1a>
+20000212:	85a2                	mv	a1,s0
+20000214:	4422                	lw	s0,8(sp)
+20000216:	40b2                	lw	ra,12(sp)
+20000218:	4501                	li	a0,0
+2000021a:	0141                	addi	sp,sp,16
+2000021c:	a261                	j	200003a4 <serial_send_byte>
+2000021e:	45b5                	li	a1,13
+20000220:	4501                	li	a0,0
+20000222:	2249                	jal	200003a4 <serial_send_byte>
+20000224:	85a2                	mv	a1,s0
+20000226:	4422                	lw	s0,8(sp)
+20000228:	40b2                	lw	ra,12(sp)
+2000022a:	4501                	li	a0,0
+2000022c:	0141                	addi	sp,sp,16
+2000022e:	aa9d                	j	200003a4 <serial_send_byte>
+
+20000230 <getc>:
+20000230:	1141                	addi	sp,sp,-16
+20000232:	4501                	li	a0,0
+20000234:	c422                	sw	s0,8(sp)
+20000236:	c606                	sw	ra,12(sp)
+20000238:	225d                	jal	200003de <serial_recv_byte>
+2000023a:	47b5                	li	a5,13
+2000023c:	4429                	li	s0,10
+2000023e:	00f50363          	beq	a0,a5,20000244 <getc+0x14>
+20000242:	842a                	mv	s0,a0
+20000244:	8522                	mv	a0,s0
+20000246:	3f7d                	jal	20000204 <putc>
+20000248:	40b2                	lw	ra,12(sp)
+2000024a:	8522                	mv	a0,s0
+2000024c:	4422                	lw	s0,8(sp)
+2000024e:	0141                	addi	sp,sp,16
+20000250:	8082                	ret
+
+20000252 <puts>:
+20000252:	1141                	addi	sp,sp,-16
+20000254:	c422                	sw	s0,8(sp)
+20000256:	c606                	sw	ra,12(sp)
+20000258:	842a                	mv	s0,a0
+2000025a:	00054503          	lbu	a0,0(a0)
+2000025e:	c511                	beqz	a0,2000026a <puts+0x18>
+20000260:	0405                	addi	s0,s0,1
+20000262:	374d                	jal	20000204 <putc>
+20000264:	00044503          	lbu	a0,0(s0)
+20000268:	fd65                	bnez	a0,20000260 <puts+0xe>
+2000026a:	40b2                	lw	ra,12(sp)
+2000026c:	4422                	lw	s0,8(sp)
+2000026e:	4501                	li	a0,0
+20000270:	0141                	addi	sp,sp,16
+20000272:	8082                	ret
+
+20000274 <gets>:
+20000274:	1141                	addi	sp,sp,-16
+20000276:	c422                	sw	s0,8(sp)
+20000278:	c226                	sw	s1,4(sp)
+2000027a:	c04a                	sw	s2,0(sp)
+2000027c:	c606                	sw	ra,12(sp)
+2000027e:	4929                	li	s2,10
+20000280:	842a                	mv	s0,a0
+20000282:	4481                	li	s1,0
+20000284:	3775                	jal	20000230 <getc>
+20000286:	01250c63          	beq	a0,s2,2000029e <gets+0x2a>
+2000028a:	00a40023          	sb	a0,0(s0)
+2000028e:	00148793          	addi	a5,s1,1
+20000292:	0405                	addi	s0,s0,1
+20000294:	c519                	beqz	a0,200002a2 <gets+0x2e>
+20000296:	84be                	mv	s1,a5
+20000298:	3f61                	jal	20000230 <getc>
+2000029a:	ff2518e3          	bne	a0,s2,2000028a <gets+0x16>
+2000029e:	00040023          	sb	zero,0(s0)
+200002a2:	40b2                	lw	ra,12(sp)
+200002a4:	4422                	lw	s0,8(sp)
+200002a6:	4902                	lw	s2,0(sp)
+200002a8:	8526                	mv	a0,s1
+200002aa:	4492                	lw	s1,4(sp)
+200002ac:	0141                	addi	sp,sp,16
+200002ae:	8082                	ret
+
+200002b0 <putxval>:
+200002b0:	1101                	addi	sp,sp,-32
+200002b2:	ce06                	sw	ra,28(sp)
+200002b4:	cc22                	sw	s0,24(sp)
+200002b6:	00010623          	sb	zero,12(sp)
+200002ba:	ed05                	bnez	a0,200002f2 <putxval+0x42>
+200002bc:	e191                	bnez	a1,200002c0 <putxval+0x10>
+200002be:	4585                	li	a1,1
+200002c0:	00b10793          	addi	a5,sp,11
+200002c4:	03000713          	li	a4,48
+200002c8:	c591                	beqz	a1,200002d4 <putxval+0x24>
+200002ca:	00e78023          	sb	a4,0(a5)
+200002ce:	15fd                	addi	a1,a1,-1
+200002d0:	17fd                	addi	a5,a5,-1
+200002d2:	fde5                	bnez	a1,200002ca <putxval+0x1a>
+200002d4:	0017c503          	lbu	a0,1(a5)
+200002d8:	00178413          	addi	s0,a5,1
+200002dc:	c511                	beqz	a0,200002e8 <putxval+0x38>
+200002de:	0405                	addi	s0,s0,1
+200002e0:	3715                	jal	20000204 <putc>
+200002e2:	00044503          	lbu	a0,0(s0)
+200002e6:	fd65                	bnez	a0,200002de <putxval+0x2e>
+200002e8:	40f2                	lw	ra,28(sp)
+200002ea:	4462                	lw	s0,24(sp)
+200002ec:	4501                	li	a0,0
+200002ee:	6105                	addi	sp,sp,32
+200002f0:	8082                	ret
+200002f2:	872a                	mv	a4,a0
+200002f4:	00f77793          	andi	a5,a4,15
+200002f8:	00001817          	auipc	a6,0x1
+200002fc:	cfc80813          	addi	a6,a6,-772 # 20000ff4 <uart_ctrl_addr+0x22c>
+20000300:	97c2                	add	a5,a5,a6
+20000302:	0007c503          	lbu	a0,0(a5)
+20000306:	00b10413          	addi	s0,sp,11
+2000030a:	fff40793          	addi	a5,s0,-1
+2000030e:	00a780a3          	sb	a0,1(a5)
+20000312:	8311                	srli	a4,a4,0x4
+20000314:	cd99                	beqz	a1,20000332 <putxval+0x82>
+20000316:	15fd                	addi	a1,a1,-1
+20000318:	d755                	beqz	a4,200002c4 <putxval+0x14>
+2000031a:	843e                	mv	s0,a5
+2000031c:	00f77793          	andi	a5,a4,15
+20000320:	97c2                	add	a5,a5,a6
+20000322:	0007c503          	lbu	a0,0(a5)
+20000326:	8311                	srli	a4,a4,0x4
+20000328:	fff40793          	addi	a5,s0,-1
+2000032c:	00a780a3          	sb	a0,1(a5)
+20000330:	f1fd                	bnez	a1,20000316 <putxval+0x66>
+20000332:	00f77693          	andi	a3,a4,15
+20000336:	96c2                	add	a3,a3,a6
+20000338:	fff78613          	addi	a2,a5,-1
+2000033c:	d345                	beqz	a4,200002dc <putxval+0x2c>
+2000033e:	0006c503          	lbu	a0,0(a3)
+20000342:	8311                	srli	a4,a4,0x4
+20000344:	843e                	mv	s0,a5
+20000346:	00a78023          	sb	a0,0(a5)
+2000034a:	00f77693          	andi	a3,a4,15
+2000034e:	87b2                	mv	a5,a2
+20000350:	96c2                	add	a3,a3,a6
+20000352:	fff78613          	addi	a2,a5,-1
+20000356:	d359                	beqz	a4,200002dc <putxval+0x2c>
+20000358:	b7dd                	j	2000033e <putxval+0x8e>
+
+2000035a <serial_init>:
+2000035a:	00251793          	slli	a5,a0,0x2
+2000035e:	00001517          	auipc	a0,0x1
+20000362:	a6a50513          	addi	a0,a0,-1430 # 20000dc8 <uart_ctrl_addr>
+20000366:	953e                	add	a0,a0,a5
+20000368:	4118                	lw	a4,0(a0)
+2000036a:	4785                	li	a5,1
+2000036c:	c71c                	sw	a5,8(a4)
+2000036e:	c75c                	sw	a5,12(a4)
+20000370:	00f58a63          	beq	a1,a5,20000384 <serial_init+0x2a>
+20000374:	36300793          	li	a5,867
+20000378:	cf1c                	sw	a5,24(a4)
+2000037a:	435c                	lw	a5,4(a4)
+2000037c:	fe07dfe3          	bgez	a5,2000037a <serial_init+0x20>
+20000380:	4501                	li	a0,0
+20000382:	8082                	ret
+20000384:	47bd                	li	a5,15
+20000386:	cf1c                	sw	a5,24(a4)
+20000388:	bfcd                	j	2000037a <serial_init+0x20>
+
+2000038a <serial_is_send_enable>:
+2000038a:	00251793          	slli	a5,a0,0x2
+2000038e:	00001517          	auipc	a0,0x1
+20000392:	a3a50513          	addi	a0,a0,-1478 # 20000dc8 <uart_ctrl_addr>
+20000396:	953e                	add	a0,a0,a5
+20000398:	411c                	lw	a5,0(a0)
+2000039a:	4388                	lw	a0,0(a5)
+2000039c:	fff54513          	not	a0,a0
+200003a0:	817d                	srli	a0,a0,0x1f
+200003a2:	8082                	ret
+
+200003a4 <serial_send_byte>:
+200003a4:	00251793          	slli	a5,a0,0x2
+200003a8:	00001517          	auipc	a0,0x1
+200003ac:	a2050513          	addi	a0,a0,-1504 # 20000dc8 <uart_ctrl_addr>
+200003b0:	953e                	add	a0,a0,a5
+200003b2:	4118                	lw	a4,0(a0)
+200003b4:	431c                	lw	a5,0(a4)
+200003b6:	fe07cfe3          	bltz	a5,200003b4 <serial_send_byte+0x10>
+200003ba:	c30c                	sw	a1,0(a4)
+200003bc:	4501                	li	a0,0
+200003be:	8082                	ret
+
+200003c0 <serial_is_recv_enable>:
+200003c0:	00251793          	slli	a5,a0,0x2
+200003c4:	00001517          	auipc	a0,0x1
+200003c8:	a0450513          	addi	a0,a0,-1532 # 20000dc8 <uart_ctrl_addr>
+200003cc:	953e                	add	a0,a0,a5
+200003ce:	411c                	lw	a5,0(a0)
+200003d0:	43dc                	lw	a5,4(a5)
+200003d2:	fff7c513          	not	a0,a5
+200003d6:	00f58023          	sb	a5,0(a1)
+200003da:	817d                	srli	a0,a0,0x1f
+200003dc:	8082                	ret
+
+200003de <serial_recv_byte>:
+200003de:	00251793          	slli	a5,a0,0x2
+200003e2:	00001517          	auipc	a0,0x1
+200003e6:	9e650513          	addi	a0,a0,-1562 # 20000dc8 <uart_ctrl_addr>
+200003ea:	953e                	add	a0,a0,a5
+200003ec:	411c                	lw	a5,0(a0)
+200003ee:	43c8                	lw	a0,4(a5)
+200003f0:	fe054fe3          	bltz	a0,200003ee <serial_recv_byte+0x10>
+200003f4:	0ff57513          	andi	a0,a0,255
+200003f8:	8082                	ret
+
+200003fa <number>:
+200003fa:	711d                	addi	sp,sp,-96
+200003fc:	cea2                	sw	s0,92(sp)
+200003fe:	cca6                	sw	s1,88(sp)
+20000400:	0407f813          	andi	a6,a5,64
+20000404:	00001e17          	auipc	t3,0x1
+20000408:	c2ce0e13          	addi	t3,t3,-980 # 20001030 <uart_ctrl_addr+0x268>
+2000040c:	00081663          	bnez	a6,20000418 <number+0x1e>
+20000410:	00001e17          	auipc	t3,0x1
+20000414:	bf8e0e13          	addi	t3,t3,-1032 # 20001008 <uart_ctrl_addr+0x240>
+20000418:	0107f413          	andi	s0,a5,16
+2000041c:	14040263          	beqz	s0,20000560 <number+0x166>
+20000420:	9bf9                	andi	a5,a5,-2
+20000422:	84a2                	mv	s1,s0
+20000424:	0027f813          	andi	a6,a5,2
+20000428:	02000f93          	li	t6,32
+2000042c:	0207f393          	andi	t2,a5,32
+20000430:	14080663          	beqz	a6,2000057c <number+0x182>
+20000434:	1405c663          	bltz	a1,20000580 <number+0x186>
+20000438:	0047f813          	andi	a6,a5,4
+2000043c:	16081c63          	bnez	a6,200005b4 <number+0x1ba>
+20000440:	8ba1                	andi	a5,a5,8
+20000442:	4281                	li	t0,0
+20000444:	c781                	beqz	a5,2000044c <number+0x52>
+20000446:	16fd                	addi	a3,a3,-1
+20000448:	02000293          	li	t0,32
+2000044c:	00038a63          	beqz	t2,20000460 <number+0x66>
+20000450:	47c1                	li	a5,16
+20000452:	16f60f63          	beq	a2,a5,200005d0 <number+0x1d6>
+20000456:	ff860793          	addi	a5,a2,-8
+2000045a:	0017b793          	seqz	a5,a5
+2000045e:	8e9d                	sub	a3,a3,a5
+20000460:	12059763          	bnez	a1,2000058e <number+0x194>
+20000464:	03000793          	li	a5,48
+20000468:	00f10623          	sb	a5,12(sp)
+2000046c:	4301                	li	t1,0
+2000046e:	03000813          	li	a6,48
+20000472:	4885                	li	a7,1
+20000474:	007c                	addi	a5,sp,12
+20000476:	8ec6                	mv	t4,a7
+20000478:	00e8d363          	bge	a7,a4,2000047e <number+0x84>
+2000047c:	8eba                	mv	t4,a4
+2000047e:	41d68e33          	sub	t3,a3,t4
+20000482:	fffe0593          	addi	a1,t3,-1
+20000486:	ec91                	bnez	s1,200004a2 <number+0xa8>
+20000488:	01c506b3          	add	a3,a0,t3
+2000048c:	02000713          	li	a4,32
+20000490:	15c05a63          	blez	t3,200005e4 <number+0x1ea>
+20000494:	0505                	addi	a0,a0,1
+20000496:	fee50fa3          	sb	a4,-1(a0)
+2000049a:	fed51de3          	bne	a0,a3,20000494 <number+0x9a>
+2000049e:	55f9                	li	a1,-2
+200004a0:	5e7d                	li	t3,-1
+200004a2:	00028563          	beqz	t0,200004ac <number+0xb2>
+200004a6:	00550023          	sb	t0,0(a0)
+200004aa:	0505                	addi	a0,a0,1
+200004ac:	00038863          	beqz	t2,200004bc <number+0xc2>
+200004b0:	4721                	li	a4,8
+200004b2:	12e60163          	beq	a2,a4,200005d4 <number+0x1da>
+200004b6:	4741                	li	a4,16
+200004b8:	10e60263          	beq	a2,a4,200005bc <number+0x1c2>
+200004bc:	e80d                	bnez	s0,200004ee <number+0xf4>
+200004be:	862a                	mv	a2,a0
+200004c0:	4705                	li	a4,1
+200004c2:	13c05663          	blez	t3,200005ee <number+0x1f4>
+200004c6:	0605                	addi	a2,a2,1
+200004c8:	40c706b3          	sub	a3,a4,a2
+200004cc:	96ae                	add	a3,a3,a1
+200004ce:	96aa                	add	a3,a3,a0
+200004d0:	fff60fa3          	sb	t6,-1(a2)
+200004d4:	fed049e3          	bgtz	a3,200004c6 <number+0xcc>
+200004d8:	fff5c713          	not	a4,a1
+200004dc:	877d                	srai	a4,a4,0x1f
+200004de:	8f6d                	and	a4,a4,a1
+200004e0:	15fd                	addi	a1,a1,-1
+200004e2:	40e58e33          	sub	t3,a1,a4
+200004e6:	0705                	addi	a4,a4,1
+200004e8:	953a                	add	a0,a0,a4
+200004ea:	fffe0593          	addi	a1,t3,-1
+200004ee:	411e8733          	sub	a4,t4,a7
+200004f2:	972a                	add	a4,a4,a0
+200004f4:	03000693          	li	a3,48
+200004f8:	0fd8d463          	bge	a7,t4,200005e0 <number+0x1e6>
+200004fc:	0505                	addi	a0,a0,1
+200004fe:	fed50fa3          	sb	a3,-1(a0)
+20000502:	fea71de3          	bne	a4,a0,200004fc <number+0x102>
+20000506:	00678633          	add	a2,a5,t1
+2000050a:	86ba                	mv	a3,a4
+2000050c:	4505                	li	a0,1
+2000050e:	a019                	j	20000514 <number+0x11a>
+20000510:	00064803          	lbu	a6,0(a2)
+20000514:	0685                	addi	a3,a3,1
+20000516:	40d507b3          	sub	a5,a0,a3
+2000051a:	979a                	add	a5,a5,t1
+2000051c:	97ba                	add	a5,a5,a4
+2000051e:	ff068fa3          	sb	a6,-1(a3)
+20000522:	167d                	addi	a2,a2,-1
+20000524:	fef046e3          	bgtz	a5,20000510 <number+0x116>
+20000528:	00130513          	addi	a0,t1,1
+2000052c:	953a                	add	a0,a0,a4
+2000052e:	03c05563          	blez	t3,20000558 <number+0x15e>
+20000532:	872a                	mv	a4,a0
+20000534:	02000613          	li	a2,32
+20000538:	4685                	li	a3,1
+2000053a:	0705                	addi	a4,a4,1
+2000053c:	40e687b3          	sub	a5,a3,a4
+20000540:	97ae                	add	a5,a5,a1
+20000542:	97aa                	add	a5,a5,a0
+20000544:	fec70fa3          	sb	a2,-1(a4)
+20000548:	fef049e3          	bgtz	a5,2000053a <number+0x140>
+2000054c:	fff5c793          	not	a5,a1
+20000550:	87fd                	srai	a5,a5,0x1f
+20000552:	8dfd                	and	a1,a1,a5
+20000554:	0585                	addi	a1,a1,1
+20000556:	952e                	add	a0,a0,a1
+20000558:	4476                	lw	s0,92(sp)
+2000055a:	44e6                	lw	s1,88(sp)
+2000055c:	6125                	addi	sp,sp,96
+2000055e:	8082                	ret
+20000560:	0017f813          	andi	a6,a5,1
+20000564:	0117f493          	andi	s1,a5,17
+20000568:	03000f93          	li	t6,48
+2000056c:	ea080ce3          	beqz	a6,20000424 <number+0x2a>
+20000570:	0027f813          	andi	a6,a5,2
+20000574:	0207f393          	andi	t2,a5,32
+20000578:	ea081ee3          	bnez	a6,20000434 <number+0x3a>
+2000057c:	4281                	li	t0,0
+2000057e:	b5f9                	j	2000044c <number+0x52>
+20000580:	40b005b3          	neg	a1,a1
+20000584:	16fd                	addi	a3,a3,-1
+20000586:	02d00293          	li	t0,45
+2000058a:	ec0393e3          	bnez	t2,20000450 <number+0x56>
+2000058e:	4881                	li	a7,0
+20000590:	007c                	addi	a5,sp,12
+20000592:	02c5f833          	remu	a6,a1,a2
+20000596:	8346                	mv	t1,a7
+20000598:	0885                	addi	a7,a7,1
+2000059a:	01178f33          	add	t5,a5,a7
+2000059e:	8eae                	mv	t4,a1
+200005a0:	9872                	add	a6,a6,t3
+200005a2:	00084803          	lbu	a6,0(a6)
+200005a6:	02c5d5b3          	divu	a1,a1,a2
+200005aa:	ff0f0fa3          	sb	a6,-1(t5)
+200005ae:	fecef2e3          	bgeu	t4,a2,20000592 <number+0x198>
+200005b2:	b5d1                	j	20000476 <number+0x7c>
+200005b4:	16fd                	addi	a3,a3,-1
+200005b6:	02b00293          	li	t0,43
+200005ba:	bd49                	j	2000044c <number+0x52>
+200005bc:	03000713          	li	a4,48
+200005c0:	00e50023          	sb	a4,0(a0)
+200005c4:	07800713          	li	a4,120
+200005c8:	00e500a3          	sb	a4,1(a0)
+200005cc:	0509                	addi	a0,a0,2
+200005ce:	b5fd                	j	200004bc <number+0xc2>
+200005d0:	16f9                	addi	a3,a3,-2
+200005d2:	b579                	j	20000460 <number+0x66>
+200005d4:	03000713          	li	a4,48
+200005d8:	00e50023          	sb	a4,0(a0)
+200005dc:	0505                	addi	a0,a0,1
+200005de:	bdf9                	j	200004bc <number+0xc2>
+200005e0:	872a                	mv	a4,a0
+200005e2:	b715                	j	20000506 <number+0x10c>
+200005e4:	ffee0713          	addi	a4,t3,-2
+200005e8:	8e2e                	mv	t3,a1
+200005ea:	85ba                	mv	a1,a4
+200005ec:	bd5d                	j	200004a2 <number+0xa8>
+200005ee:	8e2e                	mv	t3,a1
+200005f0:	15fd                	addi	a1,a1,-1
+200005f2:	bdf5                	j	200004ee <number+0xf4>
+
+200005f4 <uart_send_char>:
+200005f4:	85aa                	mv	a1,a0
+200005f6:	4501                	li	a0,0
+200005f8:	b375                	j	200003a4 <serial_send_byte>
+
+200005fa <ee_printf>:
+200005fa:	7149                	addi	sp,sp,-368
+200005fc:	13612823          	sw	s6,304(sp)
+20000600:	14112623          	sw	ra,332(sp)
+20000604:	14812423          	sw	s0,328(sp)
+20000608:	14912223          	sw	s1,324(sp)
+2000060c:	15212023          	sw	s2,320(sp)
+20000610:	13312e23          	sw	s3,316(sp)
+20000614:	13412c23          	sw	s4,312(sp)
+20000618:	13512a23          	sw	s5,308(sp)
+2000061c:	13712623          	sw	s7,300(sp)
+20000620:	13812423          	sw	s8,296(sp)
+20000624:	13912223          	sw	s9,292(sp)
+20000628:	13a12023          	sw	s10,288(sp)
+2000062c:	14b12a23          	sw	a1,340(sp)
+20000630:	14c12c23          	sw	a2,344(sp)
+20000634:	14d12e23          	sw	a3,348(sp)
+20000638:	16e12023          	sw	a4,352(sp)
+2000063c:	16f12223          	sw	a5,356(sp)
+20000640:	17012423          	sw	a6,360(sp)
+20000644:	17112623          	sw	a7,364(sp)
+20000648:	00054783          	lbu	a5,0(a0)
+2000064c:	15410b13          	addi	s6,sp,340
+20000650:	c25a                	sw	s6,4(sp)
+20000652:	5c078963          	beqz	a5,20000c24 <ee_printf+0x62a>
+20000656:	02010993          	addi	s3,sp,32
+2000065a:	832a                	mv	t1,a0
+2000065c:	00000a97          	auipc	s5,0x0
+20000660:	784a8a93          	addi	s5,s5,1924 # 20000de0 <uart_ctrl_addr+0x18>
+20000664:	854e                	mv	a0,s3
+20000666:	02e00b93          	li	s7,46
+2000066a:	00000a17          	auipc	s4,0x0
+2000066e:	7baa0a13          	addi	s4,s4,1978 # 20000e24 <uart_ctrl_addr+0x5c>
+20000672:	00001497          	auipc	s1,0x1
+20000676:	99648493          	addi	s1,s1,-1642 # 20001008 <uart_ctrl_addr+0x240>
+2000067a:	00001417          	auipc	s0,0x1
+2000067e:	88a40413          	addi	s0,s0,-1910 # 20000f04 <uart_ctrl_addr+0x13c>
+20000682:	02500713          	li	a4,37
+20000686:	06e78463          	beq	a5,a4,200006ee <ee_printf+0xf4>
+2000068a:	00f50023          	sb	a5,0(a0)
+2000068e:	00134783          	lbu	a5,1(t1)
+20000692:	0505                	addi	a0,a0,1
+20000694:	0305                	addi	t1,t1,1
+20000696:	f7f5                	bnez	a5,20000682 <ee_printf+0x88>
+20000698:	00050023          	sb	zero,0(a0)
+2000069c:	02014583          	lbu	a1,32(sp)
+200006a0:	12058463          	beqz	a1,200007c8 <ee_printf+0x1ce>
+200006a4:	4405                	li	s0,1
+200006a6:	41340433          	sub	s0,s0,s3
+200006aa:	4501                	li	a0,0
+200006ac:	39e5                	jal	200003a4 <serial_send_byte>
+200006ae:	0019c583          	lbu	a1,1(s3)
+200006b2:	00898533          	add	a0,s3,s0
+200006b6:	0985                	addi	s3,s3,1
+200006b8:	f9ed                	bnez	a1,200006aa <ee_printf+0xb0>
+200006ba:	14c12083          	lw	ra,332(sp)
+200006be:	14812403          	lw	s0,328(sp)
+200006c2:	14412483          	lw	s1,324(sp)
+200006c6:	14012903          	lw	s2,320(sp)
+200006ca:	13c12983          	lw	s3,316(sp)
+200006ce:	13812a03          	lw	s4,312(sp)
+200006d2:	13412a83          	lw	s5,308(sp)
+200006d6:	13012b03          	lw	s6,304(sp)
+200006da:	12c12b83          	lw	s7,300(sp)
+200006de:	12812c03          	lw	s8,296(sp)
+200006e2:	12412c83          	lw	s9,292(sp)
+200006e6:	12012d03          	lw	s10,288(sp)
+200006ea:	6175                	addi	sp,sp,368
+200006ec:	8082                	ret
+200006ee:	4781                	li	a5,0
+200006f0:	46c1                	li	a3,16
+200006f2:	00134583          	lbu	a1,1(t1)
+200006f6:	00130913          	addi	s2,t1,1
+200006fa:	fe058713          	addi	a4,a1,-32
+200006fe:	0ff77713          	andi	a4,a4,255
+20000702:	00e6e763          	bltu	a3,a4,20000710 <ee_printf+0x116>
+20000706:	070a                	slli	a4,a4,0x2
+20000708:	9756                	add	a4,a4,s5
+2000070a:	4318                	lw	a4,0(a4)
+2000070c:	9756                	add	a4,a4,s5
+2000070e:	8702                	jr	a4
+20000710:	fd058713          	addi	a4,a1,-48
+20000714:	0ff77713          	andi	a4,a4,255
+20000718:	46a5                	li	a3,9
+2000071a:	0ce6fb63          	bgeu	a3,a4,200007f0 <ee_printf+0x1f6>
+2000071e:	02a00713          	li	a4,42
+20000722:	56fd                	li	a3,-1
+20000724:	0ee58963          	beq	a1,a4,20000816 <ee_printf+0x21c>
+20000728:	577d                	li	a4,-1
+2000072a:	0b758163          	beq	a1,s7,200007cc <ee_printf+0x1d2>
+2000072e:	0df5f613          	andi	a2,a1,223
+20000732:	04c00813          	li	a6,76
+20000736:	05060363          	beq	a2,a6,2000077c <ee_printf+0x182>
+2000073a:	fbf58613          	addi	a2,a1,-65
+2000073e:	0ff67613          	andi	a2,a2,255
+20000742:	03700813          	li	a6,55
+20000746:	04c86e63          	bltu	a6,a2,200007a2 <ee_printf+0x1a8>
+2000074a:	060a                	slli	a2,a2,0x2
+2000074c:	9652                	add	a2,a2,s4
+2000074e:	4210                	lw	a2,0(a2)
+20000750:	9652                	add	a2,a2,s4
+20000752:	8602                	jr	a2
+20000754:	0017e793          	ori	a5,a5,1
+20000758:	834a                	mv	t1,s2
+2000075a:	bf61                	j	200006f2 <ee_printf+0xf8>
+2000075c:	0107e793          	ori	a5,a5,16
+20000760:	834a                	mv	t1,s2
+20000762:	bf41                	j	200006f2 <ee_printf+0xf8>
+20000764:	0047e793          	ori	a5,a5,4
+20000768:	834a                	mv	t1,s2
+2000076a:	b761                	j	200006f2 <ee_printf+0xf8>
+2000076c:	0207e793          	ori	a5,a5,32
+20000770:	834a                	mv	t1,s2
+20000772:	b741                	j	200006f2 <ee_printf+0xf8>
+20000774:	0087e793          	ori	a5,a5,8
+20000778:	834a                	mv	t1,s2
+2000077a:	bfa5                	j	200006f2 <ee_printf+0xf8>
+2000077c:	00194803          	lbu	a6,1(s2)
+20000780:	03700313          	li	t1,55
+20000784:	00190893          	addi	a7,s2,1
+20000788:	fbf80613          	addi	a2,a6,-65
+2000078c:	0ff67613          	andi	a2,a2,255
+20000790:	00c36763          	bltu	t1,a2,2000079e <ee_printf+0x1a4>
+20000794:	060a                	slli	a2,a2,0x2
+20000796:	9622                	add	a2,a2,s0
+20000798:	4210                	lw	a2,0(a2)
+2000079a:	9622                	add	a2,a2,s0
+2000079c:	8602                	jr	a2
+2000079e:	85c2                	mv	a1,a6
+200007a0:	8946                	mv	s2,a7
+200007a2:	02500713          	li	a4,37
+200007a6:	00150793          	addi	a5,a0,1
+200007aa:	42e58963          	beq	a1,a4,20000bdc <ee_printf+0x5e2>
+200007ae:	00e50023          	sb	a4,0(a0)
+200007b2:	00094703          	lbu	a4,0(s2)
+200007b6:	4c071a63          	bnez	a4,20000c8a <ee_printf+0x690>
+200007ba:	853e                	mv	a0,a5
+200007bc:	00050023          	sb	zero,0(a0)
+200007c0:	02014583          	lbu	a1,32(sp)
+200007c4:	ee0590e3          	bnez	a1,200006a4 <ee_printf+0xaa>
+200007c8:	4501                	li	a0,0
+200007ca:	bdc5                	j	200006ba <ee_printf+0xc0>
+200007cc:	00194583          	lbu	a1,1(s2)
+200007d0:	4625                	li	a2,9
+200007d2:	00190813          	addi	a6,s2,1
+200007d6:	fd058713          	addi	a4,a1,-48
+200007da:	0ff77713          	andi	a4,a4,255
+200007de:	3ae67763          	bgeu	a2,a4,20000b8c <ee_printf+0x592>
+200007e2:	02a00713          	li	a4,42
+200007e6:	3ce58b63          	beq	a1,a4,20000bbc <ee_printf+0x5c2>
+200007ea:	8942                	mv	s2,a6
+200007ec:	4701                	li	a4,0
+200007ee:	b781                	j	2000072e <ee_printf+0x134>
+200007f0:	4681                	li	a3,0
+200007f2:	4625                	li	a2,9
+200007f4:	00269713          	slli	a4,a3,0x2
+200007f8:	96ba                	add	a3,a3,a4
+200007fa:	0905                	addi	s2,s2,1
+200007fc:	0686                	slli	a3,a3,0x1
+200007fe:	96ae                	add	a3,a3,a1
+20000800:	00094583          	lbu	a1,0(s2)
+20000804:	fd068693          	addi	a3,a3,-48
+20000808:	fd058713          	addi	a4,a1,-48
+2000080c:	0ff77713          	andi	a4,a4,255
+20000810:	fee672e3          	bgeu	a2,a4,200007f4 <ee_printf+0x1fa>
+20000814:	bf11                	j	20000728 <ee_printf+0x12e>
+20000816:	000b2683          	lw	a3,0(s6)
+2000081a:	00234583          	lbu	a1,2(t1)
+2000081e:	00230913          	addi	s2,t1,2
+20000822:	0b11                	addi	s6,s6,4
+20000824:	f006d2e3          	bgez	a3,20000728 <ee_printf+0x12e>
+20000828:	40d006b3          	neg	a3,a3
+2000082c:	0107e793          	ori	a5,a5,16
+20000830:	bde5                	j	20000728 <ee_printf+0x12e>
+20000832:	004b0813          	addi	a6,s6,4
+20000836:	4641                	li	a2,16
+20000838:	000b2583          	lw	a1,0(s6)
+2000083c:	8b42                	mv	s6,a6
+2000083e:	3e75                	jal	200003fa <number>
+20000840:	00194783          	lbu	a5,1(s2)
+20000844:	00190313          	addi	t1,s2,1
+20000848:	e2079de3          	bnez	a5,20000682 <ee_printf+0x88>
+2000084c:	b5b1                	j	20000698 <ee_printf+0x9e>
+2000084e:	004b0813          	addi	a6,s6,4
+20000852:	4629                	li	a2,10
+20000854:	b7d5                	j	20000838 <ee_printf+0x23e>
+20000856:	8946                	mv	s2,a7
+20000858:	000b2603          	lw	a2,0(s6)
+2000085c:	0b11                	addi	s6,s6,4
+2000085e:	3a060163          	beqz	a2,20000c00 <ee_printf+0x606>
+20000862:	00064583          	lbu	a1,0(a2)
+20000866:	3e058b63          	beqz	a1,20000c5c <ee_printf+0x662>
+2000086a:	3e070963          	beqz	a4,20000c5c <ee_printf+0x662>
+2000086e:	85b2                	mv	a1,a2
+20000870:	a029                	j	2000087a <ee_printf+0x280>
+20000872:	40e58833          	sub	a6,a1,a4
+20000876:	00c80763          	beq	a6,a2,20000884 <ee_printf+0x28a>
+2000087a:	0015c803          	lbu	a6,1(a1)
+2000087e:	0585                	addi	a1,a1,1
+20000880:	fe0819e3          	bnez	a6,20000872 <ee_printf+0x278>
+20000884:	8bc1                	andi	a5,a5,16
+20000886:	8d91                	sub	a1,a1,a2
+20000888:	3a078263          	beqz	a5,20000c2c <ee_printf+0x632>
+2000088c:	40b05b63          	blez	a1,20000ca2 <ee_printf+0x6a8>
+20000890:	00b60833          	add	a6,a2,a1
+20000894:	87aa                	mv	a5,a0
+20000896:	00064703          	lbu	a4,0(a2)
+2000089a:	0605                	addi	a2,a2,1
+2000089c:	0785                	addi	a5,a5,1
+2000089e:	fee78fa3          	sb	a4,-1(a5)
+200008a2:	ff061ae3          	bne	a2,a6,20000896 <ee_printf+0x29c>
+200008a6:	00b50733          	add	a4,a0,a1
+200008aa:	40b68533          	sub	a0,a3,a1
+200008ae:	00190313          	addi	t1,s2,1
+200008b2:	953a                	add	a0,a0,a4
+200008b4:	02000793          	li	a5,32
+200008b8:	3cd5d163          	bge	a1,a3,20000c7a <ee_printf+0x680>
+200008bc:	0705                	addi	a4,a4,1
+200008be:	fef70fa3          	sb	a5,-1(a4)
+200008c2:	fea71de3          	bne	a4,a0,200008bc <ee_printf+0x2c2>
+200008c6:	00194783          	lbu	a5,1(s2)
+200008ca:	da079ce3          	bnez	a5,20000682 <ee_printf+0x88>
+200008ce:	b3e9                	j	20000698 <ee_printf+0x9e>
+200008d0:	8946                	mv	s2,a7
+200008d2:	567d                	li	a2,-1
+200008d4:	32c68263          	beq	a3,a2,20000bf8 <ee_printf+0x5fe>
+200008d8:	000b2583          	lw	a1,0(s6)
+200008dc:	4641                	li	a2,16
+200008de:	0b11                	addi	s6,s6,4
+200008e0:	3e29                	jal	200003fa <number>
+200008e2:	00194783          	lbu	a5,1(s2)
+200008e6:	00190313          	addi	t1,s2,1
+200008ea:	d8079ce3          	bnez	a5,20000682 <ee_printf+0x88>
+200008ee:	b36d                	j	20000698 <ee_printf+0x9e>
+200008f0:	004b0813          	addi	a6,s6,4
+200008f4:	4621                	li	a2,8
+200008f6:	b789                	j	20000838 <ee_printf+0x23e>
+200008f8:	0027e793          	ori	a5,a5,2
+200008fc:	004b0813          	addi	a6,s6,4
+20000900:	4629                	li	a2,10
+20000902:	bf1d                	j	20000838 <ee_printf+0x23e>
+20000904:	8946                	mv	s2,a7
+20000906:	8bc1                	andi	a5,a5,16
+20000908:	16fd                	addi	a3,a3,-1
+2000090a:	30078063          	beqz	a5,20000c0a <ee_printf+0x610>
+2000090e:	000b2603          	lw	a2,0(s6)
+20000912:	00150713          	addi	a4,a0,1
+20000916:	00168793          	addi	a5,a3,1
+2000091a:	00c50023          	sb	a2,0(a0)
+2000091e:	0b11                	addi	s6,s6,4
+20000920:	953e                	add	a0,a0,a5
+20000922:	00190313          	addi	t1,s2,1
+20000926:	87ba                	mv	a5,a4
+20000928:	02000613          	li	a2,32
+2000092c:	34d05763          	blez	a3,20000c7a <ee_printf+0x680>
+20000930:	0785                	addi	a5,a5,1
+20000932:	fec78fa3          	sb	a2,-1(a5)
+20000936:	fea79de3          	bne	a5,a0,20000930 <ee_printf+0x336>
+2000093a:	00194783          	lbu	a5,1(s2)
+2000093e:	00d70533          	add	a0,a4,a3
+20000942:	d40790e3          	bnez	a5,20000682 <ee_printf+0x88>
+20000946:	bb89                	j	20000698 <ee_printf+0x9e>
+20000948:	0407e793          	ori	a5,a5,64
+2000094c:	004b0813          	addi	a6,s6,4
+20000950:	4641                	li	a2,16
+20000952:	b5dd                	j	20000838 <ee_printf+0x23e>
+20000954:	000b2703          	lw	a4,0(s6)
+20000958:	0407e793          	ori	a5,a5,64
+2000095c:	0b11                	addi	s6,s6,4
+2000095e:	00074583          	lbu	a1,0(a4)
+20000962:	4801                	li	a6,0
+20000964:	00470893          	addi	a7,a4,4
+20000968:	06300e93          	li	t4,99
+2000096c:	4fa5                	li	t6,9
+2000096e:	4329                	li	t1,10
+20000970:	06400f13          	li	t5,100
+20000974:	03000e13          	li	t3,48
+20000978:	00180613          	addi	a2,a6,1
+2000097c:	e19d                	bnez	a1,200009a2 <ee_printf+0x3a8>
+2000097e:	120c                	addi	a1,sp,288
+20000980:	982e                	add	a6,a6,a1
+20000982:	efc80423          	sb	t3,-280(a6)
+20000986:	0705                	addi	a4,a4,1
+20000988:	07170663          	beq	a4,a7,200009f4 <ee_printf+0x3fa>
+2000098c:	120c                	addi	a1,sp,288
+2000098e:	95b2                	add	a1,a1,a2
+20000990:	ef758423          	sb	s7,-280(a1)
+20000994:	00074583          	lbu	a1,0(a4)
+20000998:	00160813          	addi	a6,a2,1
+2000099c:	00180613          	addi	a2,a6,1
+200009a0:	ddf9                	beqz	a1,2000097e <ee_printf+0x384>
+200009a2:	1cbed063          	bge	t4,a1,20000b62 <ee_printf+0x568>
+200009a6:	03e5ec33          	rem	s8,a1,t5
+200009aa:	12010293          	addi	t0,sp,288
+200009ae:	01028d33          	add	s10,t0,a6
+200009b2:	00c28cb3          	add	s9,t0,a2
+200009b6:	00280393          	addi	t2,a6,2
+200009ba:	00380613          	addi	a2,a6,3
+200009be:	03e5c5b3          	div	a1,a1,t5
+200009c2:	026c4833          	div	a6,s8,t1
+200009c6:	00b482b3          	add	t0,s1,a1
+200009ca:	0002c583          	lbu	a1,0(t0)
+200009ce:	eebd0423          	sb	a1,-280(s10)
+200009d2:	026c65b3          	rem	a1,s8,t1
+200009d6:	9826                	add	a6,a6,s1
+200009d8:	00084803          	lbu	a6,0(a6)
+200009dc:	ef0c8423          	sb	a6,-280(s9)
+200009e0:	95a6                	add	a1,a1,s1
+200009e2:	0005c803          	lbu	a6,0(a1)
+200009e6:	120c                	addi	a1,sp,288
+200009e8:	959e                	add	a1,a1,t2
+200009ea:	ef058423          	sb	a6,-280(a1)
+200009ee:	0705                	addi	a4,a4,1
+200009f0:	f9171ee3          	bne	a4,a7,2000098c <ee_printf+0x392>
+200009f4:	8bc1                	andi	a5,a5,16
+200009f6:	fff68813          	addi	a6,a3,-1
+200009fa:	e395                	bnez	a5,20000a1e <ee_printf+0x424>
+200009fc:	40c687b3          	sub	a5,a3,a2
+20000a00:	97aa                	add	a5,a5,a0
+20000a02:	02000713          	li	a4,32
+20000a06:	28d65463          	bge	a2,a3,20000c8e <ee_printf+0x694>
+20000a0a:	0505                	addi	a0,a0,1
+20000a0c:	fee50fa3          	sb	a4,-1(a0)
+20000a10:	fea79de3          	bne	a5,a0,20000a0a <ee_printf+0x410>
+20000a14:	40d606b3          	sub	a3,a2,a3
+20000a18:	96c2                	add	a3,a3,a6
+20000a1a:	fff68813          	addi	a6,a3,-1
+20000a1e:	003c                	addi	a5,sp,8
+20000a20:	00c505b3          	add	a1,a0,a2
+20000a24:	0007c703          	lbu	a4,0(a5)
+20000a28:	0505                	addi	a0,a0,1
+20000a2a:	0785                	addi	a5,a5,1
+20000a2c:	fee50fa3          	sb	a4,-1(a0)
+20000a30:	feb51ae3          	bne	a0,a1,20000a24 <ee_printf+0x42a>
+20000a34:	e0d656e3          	bge	a2,a3,20000840 <ee_printf+0x246>
+20000a38:	872e                	mv	a4,a1
+20000a3a:	02000513          	li	a0,32
+20000a3e:	4685                	li	a3,1
+20000a40:	0705                	addi	a4,a4,1
+20000a42:	40e687b3          	sub	a5,a3,a4
+20000a46:	97c2                	add	a5,a5,a6
+20000a48:	97ae                	add	a5,a5,a1
+20000a4a:	fea70fa3          	sb	a0,-1(a4)
+20000a4e:	fef649e3          	blt	a2,a5,20000a40 <ee_printf+0x446>
+20000a52:	4505                	li	a0,1
+20000a54:	16c85f63          	bge	a6,a2,20000bd2 <ee_printf+0x5d8>
+20000a58:	952e                	add	a0,a0,a1
+20000a5a:	b3dd                	j	20000840 <ee_printf+0x246>
+20000a5c:	0027e793          	ori	a5,a5,2
+20000a60:	4629                	li	a2,10
+20000a62:	06c00313          	li	t1,108
+20000a66:	004b0813          	addi	a6,s6,4
+20000a6a:	20659e63          	bne	a1,t1,20000c86 <ee_printf+0x68c>
+20000a6e:	000b2583          	lw	a1,0(s6)
+20000a72:	8946                	mv	s2,a7
+20000a74:	8b42                	mv	s6,a6
+20000a76:	b3e1                	j	2000083e <ee_printf+0x244>
+20000a78:	4621                	li	a2,8
+20000a7a:	b7e5                	j	20000a62 <ee_printf+0x468>
+20000a7c:	0407e793          	ori	a5,a5,64
+20000a80:	4641                	li	a2,16
+20000a82:	b7c5                	j	20000a62 <ee_printf+0x468>
+20000a84:	0407e793          	ori	a5,a5,64
+20000a88:	06c00613          	li	a2,108
+20000a8c:	000b2703          	lw	a4,0(s6)
+20000a90:	0b11                	addi	s6,s6,4
+20000a92:	1ac59f63          	bne	a1,a2,20000c50 <ee_printf+0x656>
+20000a96:	0407f613          	andi	a2,a5,64
+20000a9a:	88a6                	mv	a7,s1
+20000a9c:	c609                	beqz	a2,20000aa6 <ee_printf+0x4ac>
+20000a9e:	00000897          	auipc	a7,0x0
+20000aa2:	59288893          	addi	a7,a7,1426 # 20001030 <uart_ctrl_addr+0x268>
+20000aa6:	00810313          	addi	t1,sp,8
+20000aaa:	01a10e13          	addi	t3,sp,26
+20000aae:	859a                	mv	a1,t1
+20000ab0:	03a00e93          	li	t4,58
+20000ab4:	a019                	j	20000aba <ee_printf+0x4c0>
+20000ab6:	ffd58fa3          	sb	t4,-1(a1)
+20000aba:	00074603          	lbu	a2,0(a4)
+20000abe:	058d                	addi	a1,a1,3
+20000ac0:	0705                	addi	a4,a4,1
+20000ac2:	00465813          	srli	a6,a2,0x4
+20000ac6:	8a3d                	andi	a2,a2,15
+20000ac8:	9846                	add	a6,a6,a7
+20000aca:	9646                	add	a2,a2,a7
+20000acc:	00084803          	lbu	a6,0(a6)
+20000ad0:	00064603          	lbu	a2,0(a2)
+20000ad4:	ff058ea3          	sb	a6,-3(a1)
+20000ad8:	fec58f23          	sb	a2,-2(a1)
+20000adc:	fdc59de3          	bne	a1,t3,20000ab6 <ee_printf+0x4bc>
+20000ae0:	8bc1                	andi	a5,a5,16
+20000ae2:	fff68613          	addi	a2,a3,-1
+20000ae6:	e39d                	bnez	a5,20000b0c <ee_printf+0x512>
+20000ae8:	fef68593          	addi	a1,a3,-17
+20000aec:	4845                	li	a6,17
+20000aee:	00b50733          	add	a4,a0,a1
+20000af2:	02000793          	li	a5,32
+20000af6:	1ad85163          	bge	a6,a3,20000c98 <ee_printf+0x69e>
+20000afa:	0505                	addi	a0,a0,1
+20000afc:	fef50fa3          	sb	a5,-1(a0)
+20000b00:	fee51de3          	bne	a0,a4,20000afa <ee_printf+0x500>
+20000b04:	40b606b3          	sub	a3,a2,a1
+20000b08:	fff68613          	addi	a2,a3,-1
+20000b0c:	87aa                	mv	a5,a0
+20000b0e:	01130593          	addi	a1,t1,17
+20000b12:	00034703          	lbu	a4,0(t1)
+20000b16:	0305                	addi	t1,t1,1
+20000b18:	0785                	addi	a5,a5,1
+20000b1a:	fee78fa3          	sb	a4,-1(a5)
+20000b1e:	feb31ae3          	bne	t1,a1,20000b12 <ee_printf+0x518>
+20000b22:	47c5                	li	a5,17
+20000b24:	0545                	addi	a0,a0,17
+20000b26:	02d7d763          	bge	a5,a3,20000b54 <ee_printf+0x55a>
+20000b2a:	872a                	mv	a4,a0
+20000b2c:	02000813          	li	a6,32
+20000b30:	4585                	li	a1,1
+20000b32:	46c5                	li	a3,17
+20000b34:	0705                	addi	a4,a4,1
+20000b36:	40e587b3          	sub	a5,a1,a4
+20000b3a:	97b2                	add	a5,a5,a2
+20000b3c:	97aa                	add	a5,a5,a0
+20000b3e:	ff070fa3          	sb	a6,-1(a4)
+20000b42:	fef6c9e3          	blt	a3,a5,20000b34 <ee_printf+0x53a>
+20000b46:	4741                	li	a4,16
+20000b48:	4785                	li	a5,1
+20000b4a:	00c75463          	bge	a4,a2,20000b52 <ee_printf+0x558>
+20000b4e:	ff060793          	addi	a5,a2,-16
+20000b52:	953e                	add	a0,a0,a5
+20000b54:	00294783          	lbu	a5,2(s2)
+20000b58:	00290313          	addi	t1,s2,2
+20000b5c:	b20793e3          	bnez	a5,20000682 <ee_printf+0x88>
+20000b60:	be25                	j	20000698 <ee_printf+0x9e>
+20000b62:	83c2                	mv	t2,a6
+20000b64:	e6bfdee3          	bge	t6,a1,200009e0 <ee_printf+0x3e6>
+20000b68:	0265c2b3          	div	t0,a1,t1
+20000b6c:	12010393          	addi	t2,sp,288
+20000b70:	01038c33          	add	s8,t2,a6
+20000b74:	83b2                	mv	t2,a2
+20000b76:	00280613          	addi	a2,a6,2
+20000b7a:	00548833          	add	a6,s1,t0
+20000b7e:	00084803          	lbu	a6,0(a6)
+20000b82:	0265e5b3          	rem	a1,a1,t1
+20000b86:	ef0c0423          	sb	a6,-280(s8)
+20000b8a:	bd99                	j	200009e0 <ee_printf+0x3e6>
+20000b8c:	4701                	li	a4,0
+20000b8e:	48a5                	li	a7,9
+20000b90:	00271613          	slli	a2,a4,0x2
+20000b94:	9732                	add	a4,a4,a2
+20000b96:	0805                	addi	a6,a6,1
+20000b98:	0706                	slli	a4,a4,0x1
+20000b9a:	972e                	add	a4,a4,a1
+20000b9c:	00084583          	lbu	a1,0(a6)
+20000ba0:	fd070713          	addi	a4,a4,-48
+20000ba4:	fd058613          	addi	a2,a1,-48
+20000ba8:	0ff67613          	andi	a2,a2,255
+20000bac:	fec8f2e3          	bgeu	a7,a2,20000b90 <ee_printf+0x596>
+20000bb0:	8942                	mv	s2,a6
+20000bb2:	beb5                	j	2000072e <ee_printf+0x134>
+20000bb4:	000b2703          	lw	a4,0(s6)
+20000bb8:	0b11                	addi	s6,s6,4
+20000bba:	b355                	j	2000095e <ee_printf+0x364>
+20000bbc:	000b2703          	lw	a4,0(s6)
+20000bc0:	00294583          	lbu	a1,2(s2)
+20000bc4:	0b11                	addi	s6,s6,4
+20000bc6:	fff74613          	not	a2,a4
+20000bca:	867d                	srai	a2,a2,0x1f
+20000bcc:	8f71                	and	a4,a4,a2
+20000bce:	0909                	addi	s2,s2,2
+20000bd0:	beb9                	j	2000072e <ee_printf+0x134>
+20000bd2:	8e91                	sub	a3,a3,a2
+20000bd4:	01068533          	add	a0,a3,a6
+20000bd8:	952e                	add	a0,a0,a1
+20000bda:	b19d                	j	20000840 <ee_printf+0x246>
+20000bdc:	00094703          	lbu	a4,0(s2)
+20000be0:	86be                	mv	a3,a5
+20000be2:	87aa                	mv	a5,a0
+20000be4:	8536                	mv	a0,a3
+20000be6:	00e78023          	sb	a4,0(a5)
+20000bea:	00194783          	lbu	a5,1(s2)
+20000bee:	00190313          	addi	t1,s2,1
+20000bf2:	a80798e3          	bnez	a5,20000682 <ee_printf+0x88>
+20000bf6:	b44d                	j	20000698 <ee_printf+0x9e>
+20000bf8:	0017e793          	ori	a5,a5,1
+20000bfc:	46a1                	li	a3,8
+20000bfe:	b9e9                	j	200008d8 <ee_printf+0x2de>
+20000c00:	00000617          	auipc	a2,0x0
+20000c04:	45860613          	addi	a2,a2,1112 # 20001058 <uart_ctrl_addr+0x290>
+20000c08:	b18d                	j	2000086a <ee_printf+0x270>
+20000c0a:	00d50733          	add	a4,a0,a3
+20000c0e:	02000793          	li	a5,32
+20000c12:	04d05b63          	blez	a3,20000c68 <ee_printf+0x66e>
+20000c16:	0505                	addi	a0,a0,1
+20000c18:	fef50fa3          	sb	a5,-1(a0)
+20000c1c:	fee51de3          	bne	a0,a4,20000c16 <ee_printf+0x61c>
+20000c20:	56fd                	li	a3,-1
+20000c22:	b1f5                	j	2000090e <ee_printf+0x314>
+20000c24:	02010993          	addi	s3,sp,32
+20000c28:	854e                	mv	a0,s3
+20000c2a:	b4bd                	j	20000698 <ee_printf+0x9e>
+20000c2c:	fff68813          	addi	a6,a3,-1
+20000c30:	08d5d263          	bge	a1,a3,20000cb4 <ee_printf+0x6ba>
+20000c34:	40b687b3          	sub	a5,a3,a1
+20000c38:	97aa                	add	a5,a5,a0
+20000c3a:	02000713          	li	a4,32
+20000c3e:	0505                	addi	a0,a0,1
+20000c40:	fee50fa3          	sb	a4,-1(a0)
+20000c44:	fef51de3          	bne	a0,a5,20000c3e <ee_printf+0x644>
+20000c48:	40d586b3          	sub	a3,a1,a3
+20000c4c:	96c2                	add	a3,a3,a6
+20000c4e:	b93d                	j	2000088c <ee_printf+0x292>
+20000c50:	8946                	mv	s2,a7
+20000c52:	b331                	j	2000095e <ee_printf+0x364>
+20000c54:	4641                	li	a2,16
+20000c56:	b531                	j	20000a62 <ee_printf+0x468>
+20000c58:	4629                	li	a2,10
+20000c5a:	b521                	j	20000a62 <ee_printf+0x468>
+20000c5c:	0107f593          	andi	a1,a5,16
+20000c60:	c1b9                	beqz	a1,20000ca6 <ee_printf+0x6ac>
+20000c62:	872a                	mv	a4,a0
+20000c64:	4581                	li	a1,0
+20000c66:	b191                	j	200008aa <ee_printf+0x2b0>
+20000c68:	000b2783          	lw	a5,0(s6)
+20000c6c:	00150713          	addi	a4,a0,1
+20000c70:	0b11                	addi	s6,s6,4
+20000c72:	00f50023          	sb	a5,0(a0)
+20000c76:	00190313          	addi	t1,s2,1
+20000c7a:	00194783          	lbu	a5,1(s2)
+20000c7e:	853a                	mv	a0,a4
+20000c80:	a00791e3          	bnez	a5,20000682 <ee_printf+0x88>
+20000c84:	bc11                	j	20000698 <ee_printf+0x9e>
+20000c86:	8946                	mv	s2,a7
+20000c88:	be45                	j	20000838 <ee_printf+0x23e>
+20000c8a:	0509                	addi	a0,a0,2
+20000c8c:	bfa9                	j	20000be6 <ee_printf+0x5ec>
+20000c8e:	ffe68793          	addi	a5,a3,-2
+20000c92:	86c2                	mv	a3,a6
+20000c94:	883e                	mv	a6,a5
+20000c96:	b361                	j	20000a1e <ee_printf+0x424>
+20000c98:	ffe68793          	addi	a5,a3,-2
+20000c9c:	86b2                	mv	a3,a2
+20000c9e:	863e                	mv	a2,a5
+20000ca0:	b5b5                	j	20000b0c <ee_printf+0x512>
+20000ca2:	872a                	mv	a4,a0
+20000ca4:	b119                	j	200008aa <ee_printf+0x2b0>
+20000ca6:	fff68813          	addi	a6,a3,-1
+20000caa:	f8d045e3          	bgtz	a3,20000c34 <ee_printf+0x63a>
+20000cae:	86c2                	mv	a3,a6
+20000cb0:	872a                	mv	a4,a0
+20000cb2:	bee5                	j	200008aa <ee_printf+0x2b0>
+20000cb4:	86c2                	mv	a3,a6
+20000cb6:	bed9                	j	2000088c <ee_printf+0x292>
+
+Disassembly of section .text.startup:
+
+20000cb8 <main>:
+20000cb8:	e7fff517          	auipc	a0,0xe7fff
+20000cbc:	34850513          	addi	a0,a0,840 # 8000000 <spi_quad_mode>
+20000cc0:	e7fff617          	auipc	a2,0xe7fff
+20000cc4:	3b460613          	addi	a2,a2,948 # 8000074 <itim_end>
+20000cc8:	1141                	addi	sp,sp,-16
+20000cca:	8e09                	sub	a2,a2,a0
+20000ccc:	00000597          	auipc	a1,0x0
+20000cd0:	08858593          	addi	a1,a1,136 # 20000d54 <itim_load_start>
+20000cd4:	c606                	sw	ra,12(sp)
+20000cd6:	c3cff0ef          	jal	ra,20000112 <memcpy>
+20000cda:	1ffff517          	auipc	a0,0x1ffff
+20000cde:	32650513          	addi	a0,a0,806 # 40000000 <_end>
+20000ce2:	1ffff617          	auipc	a2,0x1ffff
+20000ce6:	31e60613          	addi	a2,a2,798 # 40000000 <_end>
+20000cea:	8e09                	sub	a2,a2,a0
+20000cec:	00000597          	auipc	a1,0x0
+20000cf0:	37458593          	addi	a1,a1,884 # 20001060 <erodata>
+20000cf4:	c1eff0ef          	jal	ra,20000112 <memcpy>
+20000cf8:	1ffff517          	auipc	a0,0x1ffff
+20000cfc:	30850513          	addi	a0,a0,776 # 40000000 <_end>
+20000d00:	1ffff617          	auipc	a2,0x1ffff
+20000d04:	30060613          	addi	a2,a2,768 # 40000000 <_end>
+20000d08:	8e09                	sub	a2,a2,a0
+20000d0a:	4581                	li	a1,0
+20000d0c:	becff0ef          	jal	ra,200000f8 <memset>
+20000d10:	10014537          	lui	a0,0x10014
+20000d14:	e7fff097          	auipc	ra,0xe7fff
+20000d18:	2ec080e7          	jalr	748(ra) # 8000000 <spi_quad_mode>
+20000d1c:	4585                	li	a1,1
+20000d1e:	4501                	li	a0,0
+20000d20:	e3aff0ef          	jal	ra,2000035a <serial_init>
+20000d24:	00000517          	auipc	a0,0x0
+20000d28:	2c050513          	addi	a0,a0,704 # 20000fe4 <uart_ctrl_addr+0x21c>
+20000d2c:	d26ff0ef          	jal	ra,20000252 <puts>
+20000d30:	100127b7          	lui	a5,0x10012
+20000d34:	5f98                	lw	a4,56(a5)
+20000d36:	c00006b7          	lui	a3,0xc0000
+20000d3a:	40b2                	lw	ra,12(sp)
+20000d3c:	070a                	slli	a4,a4,0x2
+20000d3e:	8309                	srli	a4,a4,0x2
+20000d40:	df98                	sw	a4,56(a5)
+20000d42:	4798                	lw	a4,8(a5)
+20000d44:	4501                	li	a0,0
+20000d46:	8f55                	or	a4,a4,a3
+20000d48:	c798                	sw	a4,8(a5)
+20000d4a:	80000737          	lui	a4,0x80000
+20000d4e:	c7d8                	sw	a4,12(a5)
+20000d50:	0141                	addi	sp,sp,16
+20000d52:	8082                	ret
+
+Disassembly of section .text_itim:
+
+08000000 <spi_quad_mode>:
+ 8000000:	1141                	addi	sp,sp,-16
+ 8000002:	0ff0000f          	fence
+ 8000006:	0000100f          	fence.i
+ 800000a:	4114                	lw	a3,0(a0)
+ 800000c:	4705                	li	a4,1
+ 800000e:	4785                	li	a5,1
+ 8000010:	00e68663          	beq	a3,a4,800001c <spi_quad_mode+0x1c>
+ 8000014:	c11c                	sw	a5,0(a0)
+ 8000016:	4118                	lw	a4,0(a0)
+ 8000018:	fef71ee3          	bne	a4,a5,8000014 <spi_quad_mode+0x14>
+ 800001c:	5138                	lw	a4,96(a0)
+ 800001e:	06050793          	addi	a5,a0,96
+ 8000022:	c709                	beqz	a4,800002c <spi_quad_mode+0x2c>
+ 8000024:	0007a023          	sw	zero,0(a5) # 10012000 <_stack+0x8010010>
+ 8000028:	4398                	lw	a4,0(a5)
+ 800002a:	ff6d                	bnez	a4,8000024 <spi_quad_mode+0x24>
+ 800002c:	04850693          	addi	a3,a0,72
+ 8000030:	4298                	lw	a4,0(a3)
+ 8000032:	fe074fe3          	bltz	a4,8000030 <spi_quad_mode+0x30>
+ 8000036:	03500713          	li	a4,53
+ 800003a:	c538                	sw	a4,72(a0)
+ 800003c:	000b3737          	lui	a4,0xb3
+ 8000040:	a4770713          	addi	a4,a4,-1465 # b2a47 <spi_quad_mode-0x7f4d5b9>
+ 8000044:	c63a                	sw	a4,12(sp)
+ 8000046:	5174                	lw	a3,100(a0)
+ 8000048:	4632                	lw	a2,12(sp)
+ 800004a:	06450713          	addi	a4,a0,100
+ 800004e:	00d60863          	beq	a2,a3,800005e <spi_quad_mode+0x5e>
+ 8000052:	46b2                	lw	a3,12(sp)
+ 8000054:	c314                	sw	a3,0(a4)
+ 8000056:	4310                	lw	a2,0(a4)
+ 8000058:	46b2                	lw	a3,12(sp)
+ 800005a:	fed61ce3          	bne	a2,a3,8000052 <spi_quad_mode+0x52>
+ 800005e:	5130                	lw	a2,96(a0)
+ 8000060:	4685                	li	a3,1
+ 8000062:	4705                	li	a4,1
+ 8000064:	00d60663          	beq	a2,a3,8000070 <spi_quad_mode+0x70>
+ 8000068:	c398                	sw	a4,0(a5)
+ 800006a:	4394                	lw	a3,0(a5)
+ 800006c:	fee69ee3          	bne	a3,a4,8000068 <spi_quad_mode+0x68>
+ 8000070:	0141                	addi	sp,sp,16
+ 8000072:	8082                	ret
diff --git a/verilog/dv/marmot_test1/spi_flash.mem b/verilog/dv/marmot_test1/spi_flash.mem
deleted file mode 120000
index 3cf3653..0000000
--- a/verilog/dv/marmot_test1/spi_flash.mem
+++ /dev/null
@@ -1 +0,0 @@
-hello_flash.mem
\ No newline at end of file
diff --git a/verilog/dv/marmot_test1/hello_flash.mem b/verilog/dv/marmot_test1/spi_flash.mem
similarity index 92%
rename from verilog/dv/marmot_test1/hello_flash.mem
rename to verilog/dv/marmot_test1/spi_flash.mem
index 1ae2f8e..cf135cf 100644
--- a/verilog/dv/marmot_test1/hello_flash.mem
+++ b/verilog/dv/marmot_test1/spi_flash.mem
@@ -1,9 +1,142 @@
+// /home/shc/Development/RISC-V/chipyard/vlsi/sim/testcase/hello/spi_flash.mem
 // spi_flash.srec
 @00000000
+93
+00
+00
+00
+13
+01
+00
+00
+93
+01
+00
+00
+13
+02
+00
+00
+@00000010
+93
+02
+00
+00
+13
+03
+00
+00
+93
+03
+00
+00
+13
+04
+00
+00
+@00000020
+93
+04
+00
+00
+13
+05
+00
+00
+93
+05
+00
+00
+13
+06
+00
+00
+@00000030
+93
+06
+00
+00
+13
+07
+00
+00
+93
+07
+00
+00
+13
+08
+00
+00
+@00000040
+93
+08
+00
+00
+13
+09
+00
+00
+93
+09
+00
+00
+13
+0A
+00
+00
+@00000050
+93
+0A
+00
+00
+13
+0B
+00
+00
+93
+0B
+00
+00
+13
+0C
+00
+00
+@00000060
+93
+0C
+00
+00
+13
+0D
+00
+00
+93
+0D
+00
+00
+13
+0E
+00
+00
+@00000070
+93
+0E
+00
+00
+13
+0F
+00
+00
+93
+0F
+00
+00
 13
 09
 80
 00
+@00000080
 73
 10
 49
@@ -16,11 +149,11 @@
 29
 40
 F1
-@00000010
 63
 96
 24
 03
+@00000090
 37
 21
 00
@@ -33,11 +166,11 @@
 00
 10
 42
-@00000020
 B7
 04
 00
 02
+@000000A0
 13
 09
 10
@@ -50,11 +183,11 @@
 84
 44
 00
-@00000030
 37
 09
 00
 02
+@000000B0
 13
 09
 09
@@ -67,11 +200,11 @@
 00
 50
 10
-@00000040
 73
 29
 40
 34
+@000000C0
 13
 79
 89
@@ -84,11 +217,11 @@
 04
 00
 02
-@00000050
 73
 29
 40
 F1
+@000000D0
 13
 19
 29
@@ -101,11 +234,11 @@
 20
 09
 00
-@00000060
 03
 A9
 04
 00
+@000000E0
 E3
 1E
 09
@@ -118,11 +251,11 @@
 09
 00
 02
-@00000070
 13
 09
 09
 08
+@000000F0
 E3
 C6
 24
@@ -135,11 +268,11 @@
 F5
 F5
 0F
-@00000080
 33
 07
 C5
 00
+@00000100
 AA
 87
 63
@@ -152,11 +285,11 @@
 8F
 B7
 FE
-@00000090
 E3
 1D
 F7
 FE
+@00000110
 82
 80
 63
@@ -169,11 +302,11 @@
 87
 03
 C7
-@000000A0
 05
 00
 85
 07
+@00000120
 85
 05
 A3
@@ -186,11 +319,11 @@
 FE
 82
 80
-@000000B0
 63
 55
 C0
 02
+@00000130
 2E
 96
 19
@@ -203,11 +336,11 @@
 47
 05
 00
-@000000C0
 03
 C7
 05
 00
+@00000140
 05
 05
 85
@@ -220,11 +353,11 @@
 35
 F7
 00
-@000000D0
 33
 05
 A0
 40
+@00000150
 09
 89
 7D
@@ -237,11 +370,11 @@
 80
 83
 47
-@000000E0
 05
 00
 2A
 87
+@00000160
 01
 45
 81
@@ -254,11 +387,11 @@
 00
 83
 C7
-@000000F0
 07
 00
 FD
 FB
+@00000170
 82
 80
 82
@@ -271,11 +404,11 @@
 00
 F5
 00
-@00000100
 83
 C7
 05
 00
+@00000180
 99
 CB
 AA
@@ -288,11 +421,11 @@
 05
 85
 07
-@00000110
 23
 80
 E7
 00
+@00000190
 03
 C7
 05
@@ -305,11 +438,11 @@
 A0
 63
 9D
-@00000120
 E7
 00
 83
 47
+@000001A0
 05
 00
 03
@@ -322,11 +455,11 @@
 05
 B3
 E6
-@00000130
 E7
 00
 F5
 F6
+@000001B0
 01
 45
 82
@@ -339,11 +472,11 @@
 05
 A0
 40
-@00000140
 09
 89
 7D
 15
+@000001C0
 82
 80
 AA
@@ -356,11 +489,11 @@
 C7
 07
 00
-@00000150
 B3
 06
 F8
 40
+@000001D0
 19
 EB
 03
@@ -373,11 +506,11 @@
 95
 1D
 8D
-@00000160
 33
 25
 A0
 00
+@000001E0
 33
 05
 A0
@@ -390,11 +523,11 @@
 00
 83
 C6
-@00000170
 05
 00
 85
 07
+@000001F0
 85
 05
 E3
@@ -407,11 +540,11 @@
 E6
 E6
 FE
-@00000180
 7D
 55
 82
 80
+@00000200
 01
 45
 82
@@ -424,11 +557,11 @@
 C6
 A9
 47
-@00000190
 2A
 84
 63
 08
+@00000210
 F5
 00
 A2
@@ -441,11 +574,11 @@
 45
 41
 01
-@000001A0
 61
 A2
 B5
 45
+@00000220
 01
 45
 49
@@ -458,11 +591,11 @@
 40
 01
 45
-@000001B0
 41
 01
 9D
 AA
+@00000230
 41
 11
 01
@@ -475,11 +608,11 @@
 22
 B5
 47
-@000001C0
 29
 44
 63
 03
+@00000240
 F5
 00
 2A
@@ -492,11 +625,11 @@
 40
 22
 85
-@000001D0
 22
 44
 41
 01
+@00000250
 82
 80
 41
@@ -509,11 +642,11 @@
 84
 03
 45
-@000001E0
 05
 00
 11
 C5
+@00000260
 05
 04
 4D
@@ -526,11 +659,11 @@
 FD
 B2
 40
-@000001F0
 22
 44
 01
 45
+@00000270
 41
 01
 82
@@ -543,11 +676,11 @@
 C2
 4A
 C0
-@00000200
 06
 C6
 29
 49
+@00000280
 2A
 84
 81
@@ -560,11 +693,11 @@
 01
 23
 00
-@00000210
 A4
 00
 93
 87
+@00000290
 14
 00
 05
@@ -577,11 +710,11 @@
 3F
 E3
 18
-@00000220
 25
 FF
 23
 00
+@000002A0
 04
 00
 B2
@@ -594,11 +727,11 @@
 85
 92
 44
-@00000230
 41
 01
 82
 80
+@000002B0
 01
 11
 06
@@ -611,11 +744,11 @@
 00
 05
 ED
-@00000240
 91
 E1
 85
 45
+@000002C0
 93
 07
 B1
@@ -628,11 +761,11 @@
 C5
 23
 80
-@00000250
 E7
 00
 FD
 15
+@000002D0
 FD
 17
 E5
@@ -645,11 +778,11 @@
 84
 17
 00
-@00000260
 11
 C5
 05
 04
+@000002E0
 15
 37
 03
@@ -662,11 +795,11 @@
 40
 62
 44
-@00000270
 01
 45
 05
 61
+@000002F0
 82
 80
 2A
@@ -679,11 +812,11 @@
 18
 00
 00
-@00000280
 13
 08
 C8
 CF
+@00000300
 C2
 97
 03
@@ -696,11 +829,11 @@
 00
 93
 07
-@00000290
 F4
 FF
 A3
 80
+@00000310
 A7
 00
 11
@@ -713,11 +846,11 @@
 D7
 3E
 84
-@000002A0
 93
 77
 F7
 00
+@00000320
 C2
 97
 03
@@ -730,11 +863,11 @@
 07
 F4
 FF
-@000002B0
 A3
 80
 A7
 00
+@00000330
 FD
 F1
 93
@@ -747,11 +880,11 @@
 86
 F7
 FF
-@000002C0
 45
 D3
 03
 C5
+@00000340
 06
 00
 11
@@ -764,11 +897,11 @@
 00
 93
 76
-@000002D0
 F7
 00
 B2
 87
+@00000350
 C2
 96
 13
@@ -781,11 +914,11 @@
 B7
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@@ -3093,11 +3226,11 @@
 95
 9D
 B1
-@00000B60
 03
 47
 09
 00
+@00000BE0
 BE
 86
 AA
@@ -3110,11 +3243,11 @@
 00
 83
 47
-@00000B70
 19
 00
 13
 03
+@00000BF0
 19
 00
 E3
@@ -3127,11 +3260,11 @@
 E7
 17
 00
-@00000B80
 A1
 46
 E9
 B9
+@00000C00
 17
 06
 00
@@ -3144,11 +3277,11 @@
 B1
 33
 07
-@00000B90
 D5
 00
 93
 07
+@00000C10
 00
 02
 63
@@ -3161,11 +3294,11 @@
 0F
 F5
 FE
-@00000BA0
 E3
 1D
 E5
 FE
+@00000C20
 FD
 56
 F5
@@ -3178,11 +3311,11 @@
 85
 BD
 B4
-@00000BB0
 13
 88
 F6
 FF
+@00000C30
 63
 D2
 D5
@@ -3195,11 +3328,11 @@
 97
 13
 07
-@00000BC0
 00
 02
 05
 05
+@00000C40
 A3
 0F
 E5
@@ -3212,11 +3345,11 @@
 86
 D5
 40
-@00000BD0
 C2
 96
 3D
 B9
+@00000C50
 46
 89
 31
@@ -3229,11 +3362,11 @@
 46
 21
 B5
-@00000BE0
 93
 F5
 07
 01
+@00000C60
 B9
 C1
 2A
@@ -3246,11 +3379,11 @@
 27
 0B
 00
-@00000BF0
 13
 07
 15
 00
+@00000C70
 11
 0B
 23
@@ -3263,11 +3396,11 @@
 00
 83
 47
-@00000C00
 19
 00
 3A
 85
+@00000C80
 E3
 91
 07
@@ -3280,11 +3413,11 @@
 BE
 09
 05
-@00000C10
 A9
 BF
 93
 87
+@00000C90
 E6
 FF
 C2
@@ -3297,11 +3430,11 @@
 87
 E6
 FF
-@00000C20
 B2
 86
 3E
 86
+@00000CA0
 B5
 B5
 2A
@@ -3314,11 +3447,11 @@
 FF
 E3
 45
-@00000C30
 D0
 F8
 C2
 86
+@00000CB0
 2A
 87
 E5
@@ -3327,24 +3460,24 @@
 86
 D9
 BE
-@00000C3C
+@00000CB8
 17
 F5
 FF
 E7
 13
 05
-45
-3C
+85
+34
 17
 F6
 FF
 E7
 13
 06
-06
-43
-@00000C4C
+46
+3B
+@00000CC8
 41
 11
 09
@@ -3361,7 +3494,7 @@
 C6
 EF
 F0
-@00000C5C
+@00000CD8
 CF
 C3
 17
@@ -3370,17 +3503,17 @@
 1F
 13
 05
-25
-3A
+65
+32
 17
 F6
 FF
 1F
 13
 06
-@00000C6C
-A6
-39
+@00000CE8
+E6
+31
 09
 8E
 97
@@ -3395,24 +3528,24 @@
 F0
 EF
 C1
-@00000C7C
+@00000CF8
 17
 F5
 FF
 1F
 13
 05
-45
-38
+85
+30
 17
 F6
 FF
 1F
 13
 06
-C6
-37
-@00000C8C
+06
+30
+@00000D08
 09
 8E
 81
@@ -3429,11 +3562,11 @@
 F0
 FF
 E7
-@00000C9C
+@00000D18
 E7
 80
-80
-36
+C0
+2E
 85
 45
 01
@@ -3446,7 +3579,7 @@
 05
 00
 00
-@00000CAC
+@00000D28
 13
 05
 05
@@ -3463,7 +3596,7 @@
 5F
 B7
 06
-@00000CBC
+@00000D38
 00
 C0
 B2
@@ -3480,7 +3613,7 @@
 45
 55
 8F
-@00000CCC
+@00000D48
 98
 C7
 37
@@ -3493,7 +3626,7 @@
 01
 82
 80
-@00000CD8
+@00000D54
 41
 11
 0F
@@ -3510,7 +3643,7 @@
 47
 85
 47
-@00000CE8
+@00000D64
 63
 86
 E6
@@ -3527,7 +3660,7 @@
 51
 93
 07
-@00000CF8
+@00000D74
 05
 06
 09
@@ -3544,7 +3677,7 @@
 06
 85
 04
-@00000D08
+@00000D84
 98
 42
 E3
@@ -3561,7 +3694,7 @@
 37
 0B
 00
-@00000D18
+@00000D94
 13
 07
 77
@@ -3578,7 +3711,7 @@
 06
 63
 08
-@00000D28
+@00000DA4
 D6
 00
 B2
@@ -3595,7 +3728,7 @@
 FE
 30
 51
-@00000D38
+@00000DB4
 85
 46
 05
@@ -3612,12 +3745,12 @@
 9E
 E6
 FE
-@00000D48
+@00000DC4
 41
 01
 82
 80
-@00000D4C
+@00000DC8
 00
 30
 01
@@ -3634,7 +3767,7 @@
 30
 04
 10
-@00000D5C
+@00000DD8
 00
 30
 05
@@ -3651,7 +3784,7 @@
 F9
 FF
 FF
-@00000D6C
+@00000DE8
 30
 F9
 FF
@@ -3668,7 +3801,7 @@
 F9
 FF
 FF
-@00000D7C
+@00000DF8
 30
 F9
 FF
@@ -3685,7 +3818,7 @@
 F9
 FF
 FF
-@00000D8C
+@00000E08
 30
 F9
 FF
@@ -3702,7 +3835,7 @@
 F9
 FF
 FF
-@00000D9C
+@00000E18
 30
 F9
 FF
@@ -3719,7 +3852,7 @@
 FB
 FF
 FF
-@00000DAC
+@00000E28
 7E
 F9
 FF
@@ -3736,7 +3869,7 @@
 F9
 FF
 FF
-@00000DBC
+@00000E38
 7E
 F9
 FF
@@ -3753,7 +3886,7 @@
 F9
 FF
 FF
-@00000DCC
+@00000E48
 7E
 F9
 FF
@@ -3770,7 +3903,7 @@
 F9
 FF
 FF
-@00000DDC
+@00000E58
 7E
 F9
 FF
@@ -3787,7 +3920,7 @@
 F9
 FF
 FF
-@00000DEC
+@00000E68
 7E
 F9
 FF
@@ -3804,7 +3937,7 @@
 F9
 FF
 FF
-@00000DFC
+@00000E78
 7E
 F9
 FF
@@ -3821,7 +3954,7 @@
 F9
 FF
 FF
-@00000E0C
+@00000E88
 7E
 F9
 FF
@@ -3838,7 +3971,7 @@
 F9
 FF
 FF
-@00000E1C
+@00000E98
 7E
 F9
 FF
@@ -3855,7 +3988,7 @@
 FD
 FF
 FF
-@00000E2C
+@00000EA8
 7E
 F9
 FF
@@ -3872,7 +4005,7 @@
 F9
 FF
 FF
-@00000E3C
+@00000EB8
 7E
 F9
 FF
@@ -3889,7 +4022,7 @@
 FA
 FF
 FF
-@00000E4C
+@00000EC8
 7E
 F9
 FF
@@ -3906,7 +4039,7 @@
 F9
 FF
 FF
-@00000E5C
+@00000ED8
 7E
 F9
 FF
@@ -3923,7 +4056,7 @@
 F9
 FF
 FF
-@00000E6C
+@00000EE8
 7E
 F9
 FF
@@ -3940,7 +4073,7 @@
 FA
 FF
 FF
-@00000E7C
+@00000EF8
 7E
 F9
 FF
@@ -3957,7 +4090,7 @@
 FB
 FF
 FF
-@00000E8C
+@00000F08
 9A
 F8
 FF
@@ -3974,7 +4107,7 @@
 F8
 FF
 FF
-@00000E9C
+@00000F18
 9A
 F8
 FF
@@ -3991,7 +4124,7 @@
 F8
 FF
 FF
-@00000EAC
+@00000F28
 9A
 F8
 FF
@@ -4008,7 +4141,7 @@
 F8
 FF
 FF
-@00000EBC
+@00000F38
 9A
 F8
 FF
@@ -4025,7 +4158,7 @@
 F8
 FF
 FF
-@00000ECC
+@00000F48
 9A
 F8
 FF
@@ -4042,7 +4175,7 @@
 F8
 FF
 FF
-@00000EDC
+@00000F58
 9A
 F8
 FF
@@ -4059,7 +4192,7 @@
 F8
 FF
 FF
-@00000EEC
+@00000F68
 9A
 F8
 FF
@@ -4076,7 +4209,7 @@
 F8
 FF
 FF
-@00000EFC
+@00000F78
 9A
 F8
 FF
@@ -4093,7 +4226,7 @@
 FB
 FF
 FF
-@00000F0C
+@00000F88
 9A
 F8
 FF
@@ -4110,7 +4243,7 @@
 F8
 FF
 FF
-@00000F1C
+@00000F98
 9A
 F8
 FF
@@ -4127,7 +4260,7 @@
 FB
 FF
 FF
-@00000F2C
+@00000FA8
 9A
 F8
 FF
@@ -4144,7 +4277,7 @@
 F8
 FF
 FF
-@00000F3C
+@00000FB8
 9A
 F8
 FF
@@ -4161,7 +4294,7 @@
 F8
 FF
 FF
-@00000F4C
+@00000FC8
 9A
 F8
 FF
@@ -4178,7 +4311,7 @@
 FD
 FF
 FF
-@00000F5C
+@00000FD8
 9A
 F8
 FF
@@ -4195,7 +4328,7 @@
 65
 6C
 6C
-@00000F6C
+@00000FE8
 6F
 2C
 20
@@ -4212,7 +4345,7 @@
 31
 32
 33
-@00000F7C
+@00000FF8
 34
 35
 36
@@ -4229,7 +4362,7 @@
 00
 00
 00
-@00000F8C
+@00001008
 30
 31
 32
@@ -4246,7 +4379,7 @@
 64
 65
 66
-@00000F9C
+@00001018
 67
 68
 69
@@ -4263,7 +4396,7 @@
 74
 75
 76
-@00000FAC
+@00001028
 77
 78
 79
@@ -4280,7 +4413,7 @@
 35
 36
 37
-@00000FBC
+@00001038
 38
 39
 41
@@ -4297,7 +4430,7 @@
 4C
 4D
 4E
-@00000FCC
+@00001048
 4F
 50
 51
@@ -4314,7 +4447,7 @@
 00
 00
 00
-@00000FDC
+@00001058
 3C
 4E
 55
diff --git a/verilog/includes/includes.gl+sdf.caravel_user_project b/verilog/includes/includes.gl+sdf.caravel_user_project
index a8a4d16..1fe8cb3 100644
--- a/verilog/includes/includes.gl+sdf.caravel_user_project
+++ b/verilog/includes/includes.gl+sdf.caravel_user_project
@@ -1,3 +1,21 @@
-// Caravel user project includes		
-$USER_PROJECT_VERILOG/gl/user_project_wrapper.v	     
-$USER_PROJECT_VERILOG/gl/Marmot.v
++define+RANDOMIZE_MEM_INIT
++define+RANDOMIZE_REG_INIT
++define+RANDOMIZE_DELAY=1
++define+UART_HIGH_SPEED
+
+// Caravel user project includes	     
+-v $(USER_PROJECT_VERILOG)/gl/user_project_wrapper.v	     
+-v $(USER_PROJECT_VERILOG)/gl/Marmot.v     
++incdir+$(USER_PROJECT_VERILOG)/gl
+
+-v $(USER_PROJECT_VERILOG)/lib/sky130_sram_1kbyte_1rw1r_32x256_8.v
+//-v $(USER_PROJECT_VERILOG)/lib/sky130_sram_2kbyte_1rw1r_32x512_8.v
+
+// SPI Flash model
++define+SPEEDSIM
+-v $(USER_PROJECT_VERILOG)/dv/vip/MX25U3235F.v
+
+// UART model
++incdir+$(USER_PROJECT_VERILOG)/dv/vip/uart
+-v $(USER_PROJECT_VERILOG)/dv/vip/uart/uart_tb.v
+
diff --git a/verilog/includes/includes.gl.caravel_user_project b/verilog/includes/includes.gl.caravel_user_project
index b860173..1fe8cb3 100644
--- a/verilog/includes/includes.gl.caravel_user_project
+++ b/verilog/includes/includes.gl.caravel_user_project
@@ -1,3 +1,21 @@
-# Caravel user project includes	     
++define+RANDOMIZE_MEM_INIT
++define+RANDOMIZE_REG_INIT
++define+RANDOMIZE_DELAY=1
++define+UART_HIGH_SPEED
+
+// Caravel user project includes	     
 -v $(USER_PROJECT_VERILOG)/gl/user_project_wrapper.v	     
 -v $(USER_PROJECT_VERILOG)/gl/Marmot.v     
++incdir+$(USER_PROJECT_VERILOG)/gl
+
+-v $(USER_PROJECT_VERILOG)/lib/sky130_sram_1kbyte_1rw1r_32x256_8.v
+//-v $(USER_PROJECT_VERILOG)/lib/sky130_sram_2kbyte_1rw1r_32x512_8.v
+
+// SPI Flash model
++define+SPEEDSIM
+-v $(USER_PROJECT_VERILOG)/dv/vip/MX25U3235F.v
+
+// UART model
++incdir+$(USER_PROJECT_VERILOG)/dv/vip/uart
+-v $(USER_PROJECT_VERILOG)/dv/vip/uart/uart_tb.v
+
diff --git a/verilog/includes/includes.rtl.caravel_user_project b/verilog/includes/includes.rtl.caravel_user_project
index 0a7740f..ebaeb45 100644
--- a/verilog/includes/includes.rtl.caravel_user_project
+++ b/verilog/includes/includes.rtl.caravel_user_project
@@ -4,9 +4,8 @@
 +define+RANDOMIZE_REG_INIT
 +define+RANDOMIZE_DELAY=1
 +define+UART_HIGH_SPEED
-+define+WAVEFORM
 
-# Caravel user project includes
+// Caravel user project includes
 -v $(USER_PROJECT_VERILOG)/rtl/user_project_wrapper.v	     
 
 +incdir+$(USER_PROJECT_VERILOG)/rtl/marmot
@@ -17,16 +16,11 @@
 -v $(USER_PROJECT_VERILOG)/rtl/marmot/SRLatch.v
  
 -v $(USER_PROJECT_VERILOG)/lib/sky130_sram_1kbyte_1rw1r_32x256_8.v
-#-v $(USER_PROJECT_VERILOG)/lib/sky130_sram_2kbyte_1rw1r_32x512_8.v
+//-v $(USER_PROJECT_VERILOG)/lib/sky130_sram_2kbyte_1rw1r_32x512_8.v
 
 // SPI Flash model
-//+define+SPEEDSIM
-//-v $(USER_PROJECT_VERILOG)/dv/vip/MX25U3235F.v
-
--v $(USER_PROJECT_VERILOG)/dv/vip/w25q16jv.v
-
-// SPI RAM model (protected, Questa/Modelsim is needed)
-//-v $(USER_PROJECT_VERILOG)/dv/vip/APM_APS6404L-3SQN_SQPI_PSRAM_model_v2.9_encrypt.vp_modelsim
++define+SPEEDSIM
+-v $(USER_PROJECT_VERILOG)/dv/vip/MX25U3235F.v
 
 // UART model
 +incdir+$(USER_PROJECT_VERILOG)/dv/vip/uart