)]}'
{
  "commit": "10a6f544cc1916d3b15a22f51b02b463f4bcad33",
  "tree": "eb92c6415507bed5b1eebe22102abd8d32cf9426",
  "parents": [
    "d3909d55210a2e0e9a3bd48732ec973c57a68e9c"
  ],
  "author": {
    "name": "mbaykenar",
    "email": "aykenar.burak@gmail.com",
    "time": "Mon Nov 21 16:21:16 2022 +0300"
  },
  "committer": {
    "name": "mbaykenar",
    "email": "aykenar.burak@gmail.com",
    "time": "Mon Nov 21 16:21:16 2022 +0300"
  },
  "message": "Add user_defines for sta issues\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e77e895d2f83a4efca2a33b1e08031b8a299f00f",
      "old_mode": 33188,
      "old_path": "Makefile",
      "new_id": "7a99ad4864743a0d432b27077e246d87f1113431",
      "new_mode": 33188,
      "new_path": "Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "1004f2e801444775b0e2e95f45650a034f0122ca",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_defines.v"
    }
  ]
}