| v {xschem version=3.0.0 file_version=1.2 } |
| G {} |
| K {} |
| V {} |
| S {} |
| E {} |
| P 4 5 -0 -190 470 -190 470 0 -0 -0 0 -190 {} |
| P 4 5 0 0 0 -830 1080 -830 1080 0 0 0 {} |
| P 4 5 1080 -830 1800 -830 1800 -0 1080 0 1080 -830 {} |
| P 4 5 470 -190 1080 -190 1080 -0 470 -0 470 -190 {} |
| N 830 -150 860 -150 {lab=avss} |
| N 830 -150 830 -120 {lab=avss} |
| N 270 -530 300 -530 {lab=vinn} |
| N 270 -530 270 -500 {lab=vinn} |
| N 270 -440 270 -400 {lab=GND} |
| N 130 -530 130 -500 {lab=vinp} |
| N 130 -440 130 -400 {lab=GND} |
| N 660 -580 740 -580 {lab=result[9:0]} |
| N 430 -490 430 -460 {lab=avss} |
| N 470 -490 470 -460 {lab=dvss} |
| N 430 -700 430 -670 {lab=avdd} |
| N 470 -700 470 -670 {lab=dvdd} |
| N 300 -530 330 -530 {lab=vinn} |
| N 300 -630 330 -630 {lab=vinp} |
| N 560 -370 560 -330 {lab=GND} |
| N 560 -490 560 -460 {lab=clk} |
| N 590 -490 590 -460 {lab=dvdd} |
| N 560 -700 560 -670 {lab=cal} |
| N 810 -460 810 -430 {lab=rstn} |
| N 810 -370 810 -330 {lab=GND} |
| N 610 -490 610 -460 {lab=rstn} |
| N 130 -630 300 -630 { lab=vinp} |
| N 130 -630 130 -530 { lab=vinp} |
| N 560 -460 560 -430 { lab=clk} |
| N 920 -150 950 -150 {lab=dvss} |
| N 920 -150 920 -120 {lab=dvss} |
| N 610 -460 810 -460 { lab=rstn} |
| N 660 -550 740 -550 { lab=valid} |
| N 610 -40 920 -40 { lab=GND} |
| N 830 -60 830 -40 { lab=GND} |
| N 920 -60 920 -40 { lab=GND} |
| N 560 -770 560 -760 { lab=GND} |
| N 1380 -210 1410 -210 { lab=vdd} |
| N 1380 -260 1380 -240 { lab=#net1} |
| N 1260 -210 1340 -210 { lab=#net2} |
| N 1190 -210 1220 -210 { lab=vdd} |
| N 1220 -260 1220 -240 { lab=#net3} |
| N 1220 -180 1220 -160 { lab=#net2} |
| N 1220 -100 1220 -70 { lab=vss} |
| N 1220 -340 1220 -320 { lab=vdd} |
| N 1220 -340 1380 -340 { lab=vdd} |
| N 1380 -340 1380 -320 { lab=vdd} |
| N 1220 -170 1280 -170 { lab=#net2} |
| N 1280 -170 1300 -170 { lab=#net2} |
| N 1300 -210 1300 -170 { lab=#net2} |
| N 1260 -290 1300 -290 { lab=#net2} |
| N 1300 -290 1300 -210 { lab=#net2} |
| N 1300 -290 1340 -290 { lab=#net2} |
| N 1380 -290 1410 -290 { lab=vdd} |
| N 1190 -290 1220 -290 { lab=vdd} |
| N 1380 -180 1380 -140 { lab=#net4} |
| N 1380 -140 1460 -140 { lab=#net4} |
| N 1380 -110 1380 -100 { lab=#net5} |
| N 1380 -110 1460 -110 { lab=#net5} |
| N 1430 -50 1460 -50 { lab=avss} |
| N 1430 -80 1460 -80 { lab=vdd} |
| N 1430 -170 1460 -170 { lab=vdd} |
| N 1620 -170 1620 -130 { lab=avdd} |
| N 1620 -170 1660 -170 { lab=avdd} |
| N 740 -60 740 -40 { lab=GND} |
| N 1380 -620 1410 -620 { lab=vdd} |
| N 1380 -670 1380 -650 { lab=#net6} |
| N 1260 -620 1340 -620 { lab=#net7} |
| N 1190 -620 1220 -620 { lab=vdd} |
| N 1220 -670 1220 -650 { lab=#net8} |
| N 1220 -590 1220 -570 { lab=#net7} |
| N 1220 -510 1220 -480 { lab=vss} |
| N 1220 -750 1220 -730 { lab=vdd} |
| N 1220 -750 1380 -750 { lab=vdd} |
| N 1380 -750 1380 -730 { lab=vdd} |
| N 1220 -580 1280 -580 { lab=#net7} |
| N 1280 -580 1300 -580 { lab=#net7} |
| N 1300 -620 1300 -580 { lab=#net7} |
| N 1260 -700 1300 -700 { lab=#net7} |
| N 1300 -700 1300 -620 { lab=#net7} |
| N 1300 -700 1340 -700 { lab=#net7} |
| N 1380 -700 1410 -700 { lab=vdd} |
| N 1190 -700 1220 -700 { lab=vdd} |
| N 1380 -590 1380 -540 { lab=#net9} |
| N 1380 -540 1460 -540 { lab=#net9} |
| N 1380 -510 1380 -500 { lab=#net10} |
| N 1380 -510 1460 -510 { lab=#net10} |
| N 1430 -450 1460 -450 { lab=dvss} |
| N 1430 -480 1460 -480 { lab=vdd} |
| N 1430 -570 1460 -570 { lab=vdd} |
| N 1620 -570 1620 -530 { lab=dvdd} |
| N 1620 -570 1660 -570 { lab=dvdd} |
| N 740 -150 770 -150 {lab=vdd} |
| N 740 -150 740 -120 {lab=vdd} |
| N 1660 -70 1660 -40 { lab=avss} |
| N 1660 -170 1660 -130 { lab=avdd} |
| N 1660 -470 1660 -440 { lab=dvss} |
| N 1660 -570 1660 -530 { lab=dvdd} |
| N 1380 -40 1380 -10 { lab=vss} |
| N 1380 -440 1380 -410 { lab=vss} |
| C {devices/vsource.sym} 830 -90 0 0 {name=Vssa value=0 |
| } |
| C {devices/lab_wire.sym} 860 -150 0 0 {name=l7 sig_type=std_logic lab=avss |
| } |
| C {devices/gnd.sym} 610 -40 0 0 {name=l11 lab=GND} |
| C {devices/vsource.sym} 270 -470 0 0 {name=Vinn value=vsign |
| } |
| C {devices/gnd.sym} 270 -400 0 0 {name=l18 lab=GND} |
| C {devices/vsource.sym} 130 -470 0 0 {name=Vinp value=vsigp |
| } |
| C {devices/gnd.sym} 130 -400 0 0 {name=l20 lab=GND} |
| C {devices/code.sym} 320 -140 0 0 { |
| name=STDCELLS |
| only_toplevel=false |
| format="tcleval( @value )" |
| value=" |
| .include \\\\$::SKYWATER_STDCELLS\\\\/cells/inv/sky130_fd_sc_hd__inv_4.spice |
| .include \\\\$::SKYWATER_STDCELLS\\\\/cells/decap/sky130_fd_sc_hd__decap_8.spice |
| .include \\\\$::SKYWATER_STDCELLS\\\\/cells/decap/sky130_fd_sc_hd__decap_3.spice |
| .include \\\\$::SKYWATER_STDCELLS\\\\/cells/buf/sky130_fd_sc_hd__buf_1.spice |
| .include \\\\$::SKYWATER_STDCELLS\\\\/cells/inv/sky130_fd_sc_hd__inv_1.spice |
| .include \\\\$::SKYWATER_STDCELLS\\\\/cells/inv/sky130_fd_sc_hd__inv_2.spice |
| .include \\\\$::SKYWATER_STDCELLS\\\\/cells/tap/sky130_fd_sc_hd__tap_2.spice" |
| } |
| C {devices/code.sym} 20 -140 0 0 { |
| name=NGSPICE |
| only_toplevel=false |
| format="tcleval( @value )" |
| value="*------------------------- |
| * normal setup |
| *------------------------- |
| .options method = gear |
| .options gmin = 1e-15 |
| .options abstol = 1e-14 |
| .options chtol = 1e-18 |
| .options reltol = 100e-6 |
| *------------------------- |
| |
| *------------------------- |
| * extracted logic setup |
| *------------------------- |
| *.options method = gear |
| *.options gmin = 1e-12 |
| *.options abstol = 1e-10 |
| *.options chtol = 1e-12 |
| *.options reltol = 100e-3 |
| *------------------------- |
| |
| |
| .ic v(xsar.vp)=0 |
| .ic v(xsar.vn)=0 |
| .ic v(xsar.outp)=0 |
| .ic v(xsar.outn)=0 |
| .ic v(xsar.comp)=0 |
| |
| .ic v(xsar.ctlp_0_)=0 |
| .ic v(xsar.ctlp_1_)=0 |
| .ic v(xsar.ctlp_2_)=0 |
| .ic v(xsar.ctlp_3_)=0 |
| .ic v(xsar.ctlp_4_)=0 |
| .ic v(xsar.ctlp_5_)=0 |
| .ic v(xsar.ctlp_6_)=0 |
| .ic v(xsar.ctlp_7_)=0 |
| .ic v(xsar.ctlp_8_)=0 |
| .ic v(xsar.ctlp_9_)=0 |
| |
| .ic v(xsar.ctln_0_)=0 |
| .ic v(xsar.ctln_1_)=0 |
| .ic v(xsar.ctln_2_)=0 |
| .ic v(xsar.ctln_3_)=0 |
| .ic v(xsar.ctln_4_)=0 |
| .ic v(xsar.ctln_5_)=0 |
| .ic v(xsar.ctln_6_)=0 |
| .ic v(xsar.ctln_7_)=0 |
| .ic v(xsar.ctln_8_)=0 |
| .ic v(xsar.ctln_9_)=0 |
| |
| *.include \\\\$::DESIGN_PATH\\\\/switches/bootstrapped_sw.sp |
| *.include \\\\$::DESIGN_PATH\\\\/sar_10b/dac/dac_mom.pex.sp |
| *.include \\\\$::DESIGN_PATH\\\\/sar_10b/sar/sar.pex.spice |
| *.include \\\\$::DESIGN_PATH\\\\/sar_10b/sar/sar_mom.pex.spice |
| *.include \\\\$::DESIGN_PATH\\\\/sar_10b/sar/sar_mim.pex.spice |
| *.include \\\\$::DESIGN_PATH\\\\/sar_10b/control/sarlogic.ext.spice |
| *.include \\\\$::DESIGN_PATH\\\\/sar_10b/sar/sar.pex.spice |
| *.include \\\\$::DESIGN_PATH\\\\/sar_10b/sar/sar.ext.spice |
| |
| .param MC_SWITCH=0 |
| .param vin=0 |
| .param vcm=0.7 |
| .param vsigp=\\"\{vcm + vin/2\}\\" |
| .param vsign=\\"\{vcm - vin/2\}\\" |
| |
| .tran 100e-9 68e-6 uic |
| |
| .control |
| |
| run |
| |
| meas tran d0 find v(xsar.xlogic.res0) at=62.5e-6 |
| meas tran d1 find v(xsar.xlogic.res1) at=62.5e-6 |
| meas tran d2 find v(xsar.xlogic.res2) at=62.5e-6 |
| meas tran d3 find v(xsar.xlogic.res3) at=62.5e-6 |
| meas tran d4 find v(xsar.xlogic.res4) at=62.5e-6 |
| meas tran d5 find v(xsar.xlogic.res5) at=62.5e-6 |
| meas tran d6 find v(xsar.xlogic.res6) at=62.5e-6 |
| meas tran d7 find v(xsar.xlogic.res7) at=62.5e-6 |
| meas tran d8 find v(xsar.xlogic.res8) at=62.5e-6 |
| meas tran d9 find v(xsar.xlogic.res9) at=62.5e-6 |
| |
| meas tran vpmax max xsar.vp |
| meas tran vpmin min xsar.vp |
| meas tran vpend find v(xsar.vp) at=62.5e-6 |
| |
| meas tran vnmax max xsar.vn |
| meas tran vnmin min xsar.vn |
| meas tran vnend find v(xsar.vn) at=62.5e-6 |
| |
| print d0 |
| print d1 |
| print d2 |
| print d3 |
| print d4 |
| print d5 |
| print d6 |
| print d7 |
| print d8 |
| print d9 |
| |
| print vpmax |
| print vpmin |
| |
| print vnmax |
| print vnmin |
| |
| print vpend |
| print vnend |
| |
| echo Simulation Finished |
| echo ------------------- |
| shell date |
| echo ------------------- |
| |
| .endc |
| "} |
| C {devices/lab_wire.sym} 660 -580 0 1 {name=l15 sig_type=std_logic lab=result[9:0] |
| } |
| C {devices/lab_wire.sym} 430 -490 3 0 {name=l16 sig_type=std_logic lab=avss |
| } |
| C {devices/lab_wire.sym} 470 -490 3 0 {name=l23 sig_type=std_logic lab=dvss |
| } |
| C {devices/lab_wire.sym} 430 -670 3 1 {name=l24 sig_type=std_logic lab=avdd |
| } |
| C {devices/lab_wire.sym} 470 -670 3 1 {name=l25 sig_type=std_logic lab=dvdd |
| } |
| C {devices/lab_wire.sym} 330 -530 0 0 {name=l27 sig_type=std_logic lab=vinn} |
| C {devices/lab_wire.sym} 330 -630 0 0 {name=l28 sig_type=std_logic lab=vinp} |
| C {devices/vsource.sym} 560 -400 0 0 {name=Vclk value="PULSE(0 1 10e-6 1e-9 1e-9 2e-6 4e-6)" |
| } |
| C {devices/gnd.sym} 560 -330 0 0 {name=l32 lab=GND} |
| C {devices/lab_wire.sym} 560 -490 3 0 {name=l33 sig_type=std_logic lab=clk} |
| C {devices/lab_wire.sym} 590 -490 3 0 {name=l37 sig_type=std_logic lab=dvdd |
| } |
| C {devices/code.sym} 170 -140 0 0 { |
| name=CORNERS |
| only_toplevel=true |
| format="tcleval( @value )" |
| spice_ignore="tcleval($cmdline_ignore)" |
| value="* FET CORNERS |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/tt_all.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ff_all.spice |
| .include \\\\$::SKYWATER_MODELS\\\\/corners/ss_all.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/tt.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ff.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ss.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/sf.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/fs.spice |
| |
| * TT + R + C |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/tt_rmax_cmax.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/tt_rmin_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/tt_rmax_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/tt_rmin_cmax.spice |
| |
| * FF + R + C |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ff_rmax_cmax.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ff_rmin_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ff_rmax_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ff_rmin_cmax.spice |
| |
| |
| * SS + R + C |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ss_rmax_cmax.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ss_rmin_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ss_rmax_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/ss_rmin_cmax.spice |
| |
| * SF + R + C |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/sf_rmax_cmax.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/sf_rmin_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/sf_rmax_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/sf_rmin_cmax.spice |
| |
| * FS + R + C |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/fs_rmax_cmax.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/fs_rmin_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/fs_rmax_cmin.spice |
| *.include \\\\$::SKYWATER_MODELS\\\\/corners/fs_rmin_cmax.spice |
| "} |
| C {devices/lab_wire.sym} 660 -550 0 1 {name=l38 sig_type=std_logic lab=valid} |
| C {devices/noconn.sym} 740 -550 2 0 {name=l39} |
| C {devices/vsource.sym} 560 -730 2 0 {name=Vcal value=0 |
| } |
| C {devices/gnd.sym} 560 -770 2 0 {name=l43 lab=GND} |
| C {devices/lab_wire.sym} 560 -670 3 1 {name=l44 sig_type=std_logic lab=cal} |
| C {devices/noconn.sym} 740 -580 2 0 {name=l49[7:0]} |
| C {sar_10b/sar/sar.sym} 610 -400 0 0 {name=xsar} |
| C {devices/gnd.sym} 810 -330 0 0 {name=l6 lab=GND} |
| C {devices/lab_wire.sym} 610 -490 3 0 {name=l9 sig_type=std_logic lab=rstn} |
| C {devices/vsource.sym} 810 -400 0 0 {name=Vrstn value="PULSE(0 1.2 10e-6 1e-9 1e-9 99e-6 100e-6)" |
| } |
| C {devices/vsource.sym} 920 -90 0 0 {name=Vssd value=0 |
| } |
| C {devices/lab_wire.sym} 950 -150 0 0 {name=l1 sig_type=std_logic lab=dvss |
| } |
| C {devices/lab_wire.sym} 1380 -210 0 1 {name=l30 sig_type=std_logic lab=vdd} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1360 -210 0 0 {name=M2 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {devices/lab_wire.sym} 1220 -210 0 0 {name=l31 sig_type=std_logic lab=vdd} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1240 -210 0 1 {name=M4 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {devices/isource.sym} 1220 -130 0 0 {name=i2 value=125n |
| } |
| C {devices/lab_wire.sym} 1220 -100 3 0 {name=l3 sig_type=std_logic lab=vss} |
| C {devices/lab_wire.sym} 1320 -340 0 0 {name=l4 sig_type=std_logic lab=vdd} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1240 -290 0 1 {name=M5 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1360 -290 0 0 {name=M6 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {devices/lab_wire.sym} 1380 -290 0 1 {name=l5 sig_type=std_logic lab=vdd} |
| C {devices/lab_wire.sym} 1220 -290 0 0 {name=l10 sig_type=std_logic lab=vdd} |
| C {devices/vsource.sym} 1380 -70 0 0 {name=v2 value=0.75 |
| } |
| C {devices/vsource.sym} 740 -90 0 0 {name=v1 value=1.8} |
| C {regulator/regulator.sym} 1400 -30 0 0 {name=xrega |
| } |
| C {devices/lab_wire.sym} 1460 -50 0 0 {name=l12 sig_type=std_logic lab=avss |
| } |
| C {devices/lab_wire.sym} 1460 -80 0 0 {name=l22 sig_type=std_logic lab=vdd |
| } |
| C {devices/lab_wire.sym} 1460 -170 0 0 {name=l26 sig_type=std_logic lab=vdd |
| } |
| C {devices/lab_wire.sym} 1660 -170 0 0 {name=l8 sig_type=std_logic lab=avdd |
| } |
| C {devices/lab_wire.sym} 1380 -620 0 1 {name=l2 sig_type=std_logic lab=vdd} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1360 -620 0 0 {name=M1 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {devices/lab_wire.sym} 1220 -620 0 0 {name=l14 sig_type=std_logic lab=vdd} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1240 -620 0 1 {name=M3 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {devices/isource.sym} 1220 -540 0 0 {name=i1 value=125n |
| } |
| C {devices/lab_wire.sym} 1220 -510 3 0 {name=l17 sig_type=std_logic lab=vss} |
| C {devices/lab_wire.sym} 1320 -750 0 0 {name=l21 sig_type=std_logic lab=vdd} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1240 -700 0 1 {name=M7 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {sky130_primitives/pfet_01v8_lvt.sym} 1360 -700 0 0 {name=M8 |
| L=2 |
| W=0.5 |
| nf=1 |
| mult=4 |
| ad="'int((nf+1)/2) * W/nf * 0.29'" |
| pd="'2*int((nf+1)/2) * (W/nf + 0.29)'" |
| as="'int((nf+2)/2) * W/nf * 0.29'" |
| ps="'2*int((nf+2)/2) * (W/nf + 0.29)'" |
| nrd="'0.29 / W'" nrs="'0.29 / W'" |
| sa=0 sb=0 sd=0 |
| model=pfet_01v8_lvt |
| spiceprefix=X} |
| C {devices/lab_wire.sym} 1380 -700 0 1 {name=l29 sig_type=std_logic lab=vdd} |
| C {devices/lab_wire.sym} 1220 -700 0 0 {name=l34 sig_type=std_logic lab=vdd} |
| C {devices/vsource.sym} 1380 -470 0 0 {name=v3 value=0.6 |
| } |
| C {regulator/regulator.sym} 1400 -430 0 0 {name=xregd |
| } |
| C {devices/lab_wire.sym} 1460 -450 0 0 {name=l36 sig_type=std_logic lab=dvss |
| } |
| C {devices/lab_wire.sym} 1460 -480 0 0 {name=l40 sig_type=std_logic lab=vdd |
| } |
| C {devices/lab_wire.sym} 1460 -570 0 0 {name=l41 sig_type=std_logic lab=vdd |
| } |
| C {devices/lab_wire.sym} 1660 -570 0 0 {name=l42 sig_type=std_logic lab=dvdd |
| } |
| C {devices/lab_wire.sym} 770 -150 0 0 {name=l13 sig_type=std_logic lab=vdd |
| } |
| C {xschem/symbols/sky130_primitives/cap_mim_m3_2.sym} 1660 -100 0 0 {name=C1[40:0] model=cap_mim_m3_2 W=30 L=30 MF=1 spiceprefix=X |
| } |
| C {devices/lab_wire.sym} 1660 -70 3 0 {name=l45 sig_type=std_logic lab=avss |
| } |
| C {xschem/symbols/sky130_primitives/cap_mim_m3_2.sym} 1660 -500 0 0 {name=C2[39:0] model=cap_mim_m3_2 W=30 L=30 MF=1 spiceprefix=X |
| } |
| C {devices/lab_wire.sym} 1660 -470 3 0 {name=l47 sig_type=std_logic lab=dvss |
| } |
| C {devices/lab_wire.sym} 1380 -40 3 0 {name=l19 sig_type=std_logic lab=vss} |
| C {devices/lab_wire.sym} 1380 -440 3 0 {name=l35 sig_type=std_logic lab=vss} |