| #BUS_SORT |
| #MANUAL_PLACE |
| |
| #S |
| h_reset_n 000 0 2 |
| cpu_core_rst_n\[1\] |
| cpu_core_rst_n\[0\] |
| cpu_intf_rst_n |
| qspim_rst_n |
| sspim_rst_n |
| uart_rst_n |
| i2cm_rst_n |
| usb_rst_n |
| cfg_riscv_debug_sel\[1\] |
| cfg_riscv_debug_sel\[0\] |
| user_irq\[0\] |
| user_irq\[1\] |
| user_irq\[2\] |
| usb_dp_o |
| usb_dn_o |
| usb_oen |
| usb_dp_i |
| usb_dn_i |
| uart_txd |
| uart_rxd |
| i2cm_clk_o |
| i2cm_clk_i |
| i2cm_clk_oen |
| i2cm_data_oen |
| i2cm_data_o |
| i2cm_data_i |
| spim_sck |
| spim_ss |
| spim_miso |
| spim_mosi |
| pulse1m_mclk |
| i2cm_intr |
| usb_intr |
| uartm_rxd |
| uartm_txd |
| |
| pinmux_debug\[0\] 0100 0 2 |
| pinmux_debug\[1\] |
| pinmux_debug\[2\] |
| pinmux_debug\[3\] |
| pinmux_debug\[4\] |
| pinmux_debug\[5\] |
| pinmux_debug\[6\] |
| pinmux_debug\[7\] |
| pinmux_debug\[8\] |
| pinmux_debug\[9\] |
| pinmux_debug\[10\] |
| pinmux_debug\[11\] |
| pinmux_debug\[12\] |
| pinmux_debug\[13\] |
| pinmux_debug\[14\] |
| pinmux_debug\[15\] |
| pinmux_debug\[16\] |
| pinmux_debug\[17\] |
| pinmux_debug\[18\] |
| pinmux_debug\[19\] |
| pinmux_debug\[20\] |
| pinmux_debug\[21\] |
| pinmux_debug\[22\] |
| pinmux_debug\[23\] |
| pinmux_debug\[24\] |
| pinmux_debug\[25\] |
| pinmux_debug\[26\] |
| pinmux_debug\[27\] |
| pinmux_debug\[28\] |
| pinmux_debug\[29\] |
| pinmux_debug\[30\] |
| pinmux_debug\[31\] |
| |
| #W |
| |
| soft_irq |
| irq_lines\[15\] |
| irq_lines\[14\] |
| irq_lines\[13\] |
| irq_lines\[12\] |
| irq_lines\[11\] |
| irq_lines\[10\] |
| irq_lines\[9\] |
| irq_lines\[8\] |
| irq_lines\[7\] |
| irq_lines\[6\] |
| irq_lines\[5\] |
| irq_lines\[4\] |
| irq_lines\[3\] |
| irq_lines\[2\] |
| irq_lines\[1\] |
| irq_lines\[0\] |
| fuse_mhartid\[31\] |
| fuse_mhartid\[30\] |
| fuse_mhartid\[29\] |
| fuse_mhartid\[28\] |
| fuse_mhartid\[27\] |
| fuse_mhartid\[26\] |
| fuse_mhartid\[25\] |
| fuse_mhartid\[24\] |
| fuse_mhartid\[23\] |
| fuse_mhartid\[22\] |
| fuse_mhartid\[21\] |
| fuse_mhartid\[20\] |
| fuse_mhartid\[19\] |
| fuse_mhartid\[18\] |
| fuse_mhartid\[17\] |
| fuse_mhartid\[16\] |
| fuse_mhartid\[15\] |
| fuse_mhartid\[14\] |
| fuse_mhartid\[13\] |
| fuse_mhartid\[12\] |
| fuse_mhartid\[11\] |
| fuse_mhartid\[10\] |
| fuse_mhartid\[9\] |
| fuse_mhartid\[8\] |
| fuse_mhartid\[7\] |
| fuse_mhartid\[6\] |
| fuse_mhartid\[5\] |
| fuse_mhartid\[4\] |
| fuse_mhartid\[3\] |
| fuse_mhartid\[2\] |
| fuse_mhartid\[1\] |
| fuse_mhartid\[0\] |
| |
| cfg_cska_pinmux\[3\] |
| cfg_cska_pinmux\[2\] |
| cfg_cska_pinmux\[1\] |
| cfg_cska_pinmux\[0\] |
| wbd_clk_int |
| wbd_clk_pinmux |
| mclk |
| |
| |
| |
| reg_cs 200 0 |
| reg_wr |
| reg_addr\[7\] |
| reg_addr\[6\] |
| reg_addr\[5\] |
| reg_addr\[4\] |
| reg_addr\[3\] |
| reg_addr\[2\] |
| reg_addr\[1\] |
| reg_addr\[0\] |
| reg_be\[3\] |
| reg_be\[2\] |
| reg_be\[1\] |
| reg_be\[0\] |
| reg_wdata\[31\] |
| reg_wdata\[30\] |
| reg_wdata\[29\] |
| reg_wdata\[28\] |
| reg_wdata\[27\] |
| reg_wdata\[26\] |
| reg_wdata\[25\] |
| reg_wdata\[24\] |
| reg_wdata\[23\] |
| reg_wdata\[22\] |
| reg_wdata\[21\] |
| reg_wdata\[20\] |
| reg_wdata\[19\] |
| reg_wdata\[18\] |
| reg_wdata\[17\] |
| reg_wdata\[16\] |
| reg_wdata\[15\] |
| reg_wdata\[14\] |
| reg_wdata\[13\] |
| reg_wdata\[12\] |
| reg_wdata\[11\] |
| reg_wdata\[10\] |
| reg_wdata\[9\] |
| reg_wdata\[8\] |
| reg_wdata\[7\] |
| reg_wdata\[6\] |
| reg_wdata\[5\] |
| reg_wdata\[4\] |
| reg_wdata\[3\] |
| reg_wdata\[2\] |
| reg_wdata\[1\] |
| reg_wdata\[0\] |
| reg_rdata\[31\] |
| reg_rdata\[30\] |
| reg_rdata\[29\] |
| reg_rdata\[28\] |
| reg_rdata\[27\] |
| reg_rdata\[26\] |
| reg_rdata\[25\] |
| reg_rdata\[24\] |
| reg_rdata\[23\] |
| reg_rdata\[22\] |
| reg_rdata\[21\] |
| reg_rdata\[20\] |
| reg_rdata\[19\] |
| reg_rdata\[18\] |
| reg_rdata\[17\] |
| reg_rdata\[16\] |
| reg_rdata\[15\] |
| reg_rdata\[14\] |
| reg_rdata\[13\] |
| reg_rdata\[12\] |
| reg_rdata\[11\] |
| reg_rdata\[10\] |
| reg_rdata\[9\] |
| reg_rdata\[8\] |
| reg_rdata\[7\] |
| reg_rdata\[6\] |
| reg_rdata\[5\] |
| reg_rdata\[4\] |
| reg_rdata\[3\] |
| reg_rdata\[2\] |
| reg_rdata\[1\] |
| reg_rdata\[0\] |
| reg_ack |
| |
| |
| #N |
| digital_io_oen\[37\] 000 0 2 |
| digital_io_out\[37\] |
| digital_io_in\[37\] |
| digital_io_oen\[36\] |
| digital_io_out\[36\] |
| digital_io_in\[36\] |
| digital_io_oen\[35\] |
| digital_io_out\[35\] |
| digital_io_in\[35\] |
| digital_io_oen\[34\] |
| digital_io_out\[34\] |
| digital_io_in\[34\] |
| digital_io_oen\[33\] |
| digital_io_out\[33\] |
| digital_io_in\[33\] |
| digital_io_oen\[32\] |
| digital_io_out\[32\] |
| digital_io_in\[32\] |
| digital_io_oen\[31\] |
| digital_io_out\[31\] |
| digital_io_in\[31\] |
| digital_io_oen\[30\] |
| digital_io_out\[30\] |
| digital_io_in\[30\] |
| digital_io_oen\[29\] |
| digital_io_out\[29\] |
| digital_io_in\[29\] |
| digital_io_oen\[28\] |
| digital_io_out\[28\] |
| |
| |
| |
| digital_io_in\[28\] 0300 0 2 |
| digital_io_oen\[27\] |
| digital_io_out\[27\] |
| digital_io_in\[27\] |
| digital_io_oen\[26\] |
| digital_io_out\[26\] |
| digital_io_in\[26\] |
| digital_io_oen\[25\] |
| digital_io_out\[25\] |
| digital_io_in\[25\] |
| digital_io_oen\[24\] |
| digital_io_out\[24\] |
| digital_io_in\[24\] |
| |
| sflash_oen\[0\] 350 0 2 |
| sflash_oen\[1\] |
| sflash_oen\[2\] |
| sflash_oen\[3\] |
| sflash_ss\[0\] |
| sflash_ss\[1\] |
| sflash_ss\[2\] |
| sflash_ss\[3\] |
| sflash_sck |
| sflash_do\[0\] |
| sflash_do\[1\] |
| sflash_do\[2\] |
| sflash_do\[3\] |
| sflash_di\[0\] |
| sflash_di\[1\] |
| sflash_di\[2\] |
| sflash_di\[3\] |
| |
| digital_io_in\[23\] 400 0 |
| digital_io_out\[23\] |
| digital_io_oen\[23\] |
| digital_io_in\[22\] |
| digital_io_out\[22\] |
| digital_io_oen\[22\] |
| digital_io_in\[21\] |
| digital_io_out\[21\] |
| digital_io_oen\[21\] |
| digital_io_in\[20\] |
| digital_io_out\[20\] |
| digital_io_oen\[20\] |
| digital_io_in\[19\] |
| digital_io_out\[19\] |
| digital_io_oen\[19\] |
| digital_io_in\[18\] |
| digital_io_out\[18\] |
| digital_io_oen\[18\] |
| digital_io_in\[17\] |
| digital_io_out\[17\] |
| digital_io_oen\[17\] |
| digital_io_in\[16\] |
| digital_io_out\[16\] |
| digital_io_oen\[16\] |
| digital_io_in\[15\] |
| digital_io_out\[15\] |
| digital_io_oen\[15\] |
| |
| |
| #E |
| digital_io_in\[0\] 0000 0 4 |
| digital_io_out\[0\] |
| digital_io_oen\[0\] |
| digital_io_in\[1\] |
| digital_io_out\[1\] |
| digital_io_oen\[1\] |
| digital_io_in\[2\] |
| digital_io_out\[2\] |
| digital_io_oen\[2\] |
| digital_io_in\[3\] |
| digital_io_out\[3\] |
| digital_io_oen\[3\] |
| digital_io_in\[4\] |
| digital_io_out\[4\] |
| digital_io_oen\[4\] |
| digital_io_in\[5\] |
| digital_io_out\[5\] |
| digital_io_oen\[5\] |
| digital_io_in\[6\] |
| digital_io_out\[6\] |
| digital_io_oen\[6\] |
| digital_io_in\[7\] |
| digital_io_out\[7\] |
| digital_io_oen\[7\] |
| digital_io_in\[8\] |
| digital_io_out\[8\] |
| digital_io_oen\[8\] |
| digital_io_in\[9\] |
| digital_io_out\[9\] |
| digital_io_oen\[9\] |
| digital_io_in\[10\] |
| digital_io_out\[10\] |
| digital_io_oen\[10\] |
| digital_io_in\[11\] |
| digital_io_out\[11\] |
| digital_io_oen\[11\] |
| digital_io_in\[12\] |
| digital_io_out\[12\] |
| digital_io_oen\[12\] |
| digital_io_in\[13\] |
| digital_io_out\[13\] |
| digital_io_oen\[13\] |
| digital_io_in\[14\] |
| digital_io_out\[14\] |
| digital_io_oen\[14\] |
| |
| |