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mpw-007
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slot-006
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a60df8c5ee9aa219e55043f42aa976123bc9b9e2
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.gitmodules
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[
submodule
"verilog/rtl/qspim"
]
path
=
verilog
/
rtl
/
qspim
url
=
https
:
//github.com/dineshannayya/qspim.git
[
submodule
"verilog/rtl/yifive/ycr2c"
]
path
=
verilog
/
rtl
/
yifive
/
ycr2c
url
=
https
:
//github.com/dineshannayya/ycr2c.git