)]}'
{
  "commit": "c3dc14d19a1036fa8a600cb07bb47387d429eda8",
  "tree": "618e808dfdf08bacbbec9df6b1c10065c22474ea",
  "parents": [
    "beaa352dd6b6a4fe8496b19ec9c86d96610ea690"
  ],
  "author": {
    "name": "Anton Blanchard",
    "email": "anton@linux.ibm.com",
    "time": "Thu Nov 24 20:27:23 2022 +1100"
  },
  "committer": {
    "name": "Anton Blanchard",
    "email": "anton@ozlabs.org",
    "time": "Thu Nov 24 20:27:23 2022 +1100"
  },
  "message": "Fix merge issue\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6a586dfed8ba1311d0ce1bd3bb72e2881e4d6638",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_defines.v",
      "new_id": "11169e040e6e60458c9306dde892c1084354fc4e",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_defines.v"
    }
  ]
}
