blob: 6c2b2dc7efbd3f6e1e83d9fdfd4152006cbf3a8f [file] [log] [blame]
Project Chip ID is: 430650
Setting Project Chip ID to: 0006923a
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!