)]}'
{
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        "time": "Fri Nov 18 19:31:01 2022 -0800"
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        "time": "Tue Jun 07 09:30:20 2022 +0100"
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      "message": "Updated readme.\n"
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        "time": "Tue Jun 07 00:57:05 2022 +0100"
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      "message": "Rebuild with fixes to core access to memory.\n"
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        "time": "Tue Jun 07 00:51:59 2022 +0100"
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      "message": "Added additional core memory tests to verify read from flash and writes to gpio.\n"
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      "message": "Fixed cores not being able to access the wishbone bus.\n"
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        "time": "Mon Jun 06 21:47:14 2022 +0100"
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      "message": "Fixed performing load instructions not triggering a read from the local memory controller.\n"
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        "time": "Mon Jun 06 21:46:25 2022 +0100"
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      "message": "Added test for the cores ability to access memory.\n"
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        "time": "Mon Jun 06 09:17:57 2022 +0100"
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        "time": "Mon Jun 06 09:17:57 2022 +0100"
      },
      "message": "Rebuild with changes to caravel host which where not included in previous rebuild. Also removed GL simulations from GitHub action as they take too long and where causing it to time out.\n"
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        "time": "Sun Jun 05 23:06:51 2022 +0100"
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        "time": "Sun Jun 05 23:06:51 2022 +0100"
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      "message": "Rebuild with fixes to flash controller and wishbone bus.\n"
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        "time": "Sun Jun 05 22:03:01 2022 +0100"
      },
      "message": "Fixed flash controller using the wrong address when storing data in the sram cache. Also fixed some problems with the flash test.\n"
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun Jun 05 21:26:35 2022 +0100"
      },
      "message": "Fixed an additional clock cycle being generated by the flash controller.\n"
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    {
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun Jun 05 21:26:05 2022 +0100"
      },
      "message": "Fixed access to the wishbone bus causing it to lock infinitely if an address is used that isn\u0027t the SoC wishbone bus.\n"
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        "time": "Sun Jun 05 20:52:53 2022 +0100"
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        "name": "Charlie",
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        "time": "Sun Jun 05 20:52:53 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
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        "time": "Sun Jun 05 20:51:15 2022 +0100"
      },
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun Jun 05 20:51:15 2022 +0100"
      },
      "message": "Rebuild with updated spi, flash device, and other small fixes.\n"
    },
    {
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        "time": "Sun Jun 05 20:48:41 2022 +0100"
      },
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun Jun 05 20:48:41 2022 +0100"
      },
      "message": "Added a simple flash interface controller.\n"
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        "time": "Sun Jun 05 20:47:40 2022 +0100"
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun Jun 05 20:47:40 2022 +0100"
      },
      "message": "Added test for user flash interface.\n"
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        "time": "Sat Jun 04 23:29:16 2022 +0100"
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat Jun 04 23:29:16 2022 +0100"
      },
      "message": "Added buffers to data registers.\n"
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    {
      "commit": "65d4228e581503f5e01f31feb53d4e4f8d2490cb",
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat Jun 04 19:08:44 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat Jun 04 19:08:44 2022 +0100"
      },
      "message": "Updated the SPI test to include a test of the inverted clock mode. Also fixed a number of problems with the SPI implementation and added a status register for determining if data is still being sent.\n"
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        "time": "Sat Jun 04 01:00:22 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat Jun 04 01:00:22 2022 +0100"
      },
      "message": "Added SPI test.\n"
    },
    {
      "commit": "1d03f86829184c53e870b707cc0816d16e10b807",
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        "time": "Fri Jun 03 16:06:15 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 16:06:15 2022 +0100"
      },
      "message": "Updated GitHub workflow so that it will run all rtl tests, and also added the coreArch gl test.\n"
    },
    {
      "commit": "f42433019f2288b859284d36c90112f49b9dad30",
      "tree": "cb7ed1af2a9aee83e9dbdbcf55214bfffcbb632a",
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        "time": "Fri Jun 03 16:01:48 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 16:01:48 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
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        "time": "Fri Jun 03 15:59:14 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 15:59:14 2022 +0100"
      },
      "message": "Full rebuild with additions to core, and other fixes.\n"
    },
    {
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        "time": "Fri Jun 03 14:18:09 2022 +0100"
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 14:18:09 2022 +0100"
      },
      "message": "Fixed incorrect command when running GL core architecture tests. Also added compiled test program so that the test can be run through the OpenLane system.\n"
    },
    {
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        "time": "Fri Jun 03 14:16:23 2022 +0100"
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 14:16:23 2022 +0100"
      },
      "message": "Fixed valid time ranges in PWM test. Also added message saying valid range if the timing test fails.\n"
    },
    {
      "commit": "fab5f032d44174fa748b9cf91f089f05c9600f20",
      "tree": "73fdd96aa29b308378b92a83d06b06614e582ba5",
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 14:05:50 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 14:05:50 2022 +0100"
      },
      "message": "Fixed off by one error on the default PWM top compare value.\n"
    },
    {
      "commit": "0cd43a29593e58d98b939832fac201cfece40282",
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 14:04:51 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 14:04:51 2022 +0100"
      },
      "message": "Added test for PWM peripheral.\n"
    },
    {
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 12:40:44 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 12:40:44 2022 +0100"
      },
      "message": "Fixed that the previous change used the full counter value rather than the scaled counter value for comparing to the top value.\n"
    },
    {
      "commit": "b283c6fecd5d60029f4a6bd6f35539fddf79c492",
      "tree": "e5da75b4b4d69d45f0610e387c6f3630cd8754f4",
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 12:28:22 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 12:28:22 2022 +0100"
      },
      "message": "Added separate counter top register to PWM devices. This stores the full mask allowing more control over the clock frequency. Also fixed a number of PWM issues including that data could not be read from registers, and that if the top value is set to a value under the current counter value the counter would not reset.\n"
    },
    {
      "commit": "c561c88fec263181327c0ecb9736793cea072e15",
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        "time": "Fri Jun 03 11:20:30 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 11:20:30 2022 +0100"
      },
      "message": "Fixed a number of small issues.\n"
    },
    {
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      "tree": "6bb837072115460edc0cb16c5d24068a7795164e",
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        "time": "Fri Jun 03 11:18:24 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 11:18:24 2022 +0100"
      },
      "message": "Added buffers to irq lines from GPIO and PWM peripherals.\n"
    },
    {
      "commit": "e768ce4a4df4d80baf81c33713ddd75d066d6261",
      "tree": "5a4bfe1b8296446a4aa58ef086ae012f3d2d811c",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 11:17:01 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri Jun 03 11:17:01 2022 +0100"
      },
      "message": "Fixed that the PWM device was using a wildly wrong reset value.\n"
    },
    {
      "commit": "530e657f9a514d656ac6fc9d7cd4d384c0c70d1e",
      "tree": "5787bb8c9708c99595787e9b96c19c6e981aed5f",
      "parents": [
        "1fbc0bbde42def47931206124a6941bb2c291835"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 23:34:01 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 23:34:01 2022 +0100"
      },
      "message": "Added buffer to UART signals to interrupt and status register. This should help with some timing issues. Also fixed a bug where the wrong signal was being used for the Rx data available interrupt.\n"
    },
    {
      "commit": "1fbc0bbde42def47931206124a6941bb2c291835",
      "tree": "50f07a34359ae0fc3c31d234793f1ae7110880a4",
      "parents": [
        "f0597c4bfcd0ceb19a86db8c26be821ba03fdcc6"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 16:19:08 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 16:19:08 2022 +0100"
      },
      "message": "Added peripheral interrupts\n"
    },
    {
      "commit": "f0597c4bfcd0ceb19a86db8c26be821ba03fdcc6",
      "tree": "ba3fa70afa7a47b63997a573102fd7af5ea94d19",
      "parents": [
        "546583cb32b25d4f7a99babaea878ae7133c79e4"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 14:43:45 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 14:43:45 2022 +0100"
      },
      "message": "Fixed branch and jump instructions not generating instruction address misalignment exceptions when jumping to a non word aligned address.\n"
    },
    {
      "commit": "546583cb32b25d4f7a99babaea878ae7133c79e4",
      "tree": "4786d444264bdaa014134ec23136c6159775ac30",
      "parents": [
        "a4827b322c80b1c40ddb4e969a1f58c7d30aa254"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 13:22:57 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 13:22:57 2022 +0100"
      },
      "message": "Added RISCV spec.\n"
    },
    {
      "commit": "a4827b322c80b1c40ddb4e969a1f58c7d30aa254",
      "tree": "70ffcf21c880981268dd6d465d4a6c0c83606ca4",
      "parents": [
        "e78d21187306967e0eaef7a1f77970daf925a0d0"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 12:54:49 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu Jun 02 12:54:49 2022 +0100"
      },
      "message": "Added trap handling to core.\n"
    },
    {
      "commit": "e78d21187306967e0eaef7a1f77970daf925a0d0",
      "tree": "90a196e733ace333fe0db1ce634b7943669f1716",
      "parents": [
        "17641e27390956c21ae1c415c2d534e6a728bb40"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Mon May 30 00:12:22 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Mon May 30 00:12:22 2022 +0100"
      },
      "message": "Fixed arithmetic right shifts not sign extending correctly.\n"
    },
    {
      "commit": "17641e27390956c21ae1c415c2d534e6a728bb40",
      "tree": "0e991f6b099c44487246f61f4fedd85bb8b86751",
      "parents": [
        "c9949d15dc3b31e5a32e18b114ae3206407a4d92"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Mon May 30 00:11:59 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Mon May 30 00:11:59 2022 +0100"
      },
      "message": "Fixed store instructions not using the correct byte mask.\n"
    },
    {
      "commit": "c9949d15dc3b31e5a32e18b114ae3206407a4d92",
      "tree": "3224fec2573be1304e0a61a03665222471ded08c",
      "parents": [
        "cfdb424fe8354291df67cdc799328fd708e6252b"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 23:31:15 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 23:31:15 2022 +0100"
      },
      "message": "Fixed that non word aligned loads would not have the data shifted. Also fixed signed loads.\n"
    },
    {
      "commit": "cfdb424fe8354291df67cdc799328fd708e6252b",
      "tree": "87f930780174a50d9b5350222980d11fc1ef21d8",
      "parents": [
        "a56209ce3d9b40000c08c19dc0b88f7e94f46d52"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 23:30:28 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 23:30:28 2022 +0100"
      },
      "message": "Fixed load word instructions being marked as invalid.\n"
    },
    {
      "commit": "a56209ce3d9b40000c08c19dc0b88f7e94f46d52",
      "tree": "712abf767f5a0e1e442b3a798f2d419ee1ba4efa",
      "parents": [
        "c678a2e4fa47590c2b0b6f555275df724974152a"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 22:36:34 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 22:36:34 2022 +0100"
      },
      "message": "Fixed that address misalignment error bit could be set when not performing a load or store instruction. This means that some other instructions would trigger the core to lock, when performing valid instructions.\n"
    },
    {
      "commit": "c678a2e4fa47590c2b0b6f555275df724974152a",
      "tree": "baaf711ca20d5030bb9450e6817dd670e4cbdee9",
      "parents": [
        "7d855dbac26e72e816268065c671fe8ba1515494"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 22:35:01 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 22:35:01 2022 +0100"
      },
      "message": "Fixed ALU immediate instructions producing the wrong result if the aluAlt bit is set, even when this signal is not used in the instruction.\n"
    },
    {
      "commit": "7d855dbac26e72e816268065c671fe8ba1515494",
      "tree": "d831ff61fd3569f006b9bd387fea6d427675cdfe",
      "parents": [
        "bf7d214b34df057ff951bf452f9275a89f3f7c8e"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 21:48:08 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 21:48:08 2022 +0100"
      },
      "message": "Added core architecture simulation. Currently this will only work locally with some other applications installed. Already used this to fix AUIPC instruction not actually adding the program counter,\n"
    },
    {
      "commit": "bf7d214b34df057ff951bf452f9275a89f3f7c8e",
      "tree": "5e29bbcabc5ad545debaad154623e5b6c58edc07",
      "parents": [
        "600ce3a2bd517f798877cf487d71b066c91419eb"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 21:46:23 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 21:46:23 2022 +0100"
      },
      "message": "Added assignments to unused input pins, this helps GL simulations work now that input pins are actually connected. Also made some ease of use changes, such as adding a script to copy simulation results, and automatically copy guide file when regenerating guide view.\n"
    },
    {
      "commit": "600ce3a2bd517f798877cf487d71b066c91419eb",
      "tree": "40ef5a6b734887cb4af2697352972e2d8b4298ce",
      "parents": [
        "1a18a9725cf2337ea025ded267b944091210e032"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 00:32:36 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 00:32:36 2022 +0100"
      },
      "message": "Re added ore PC GL simulation to GitHub workflow. Between this and the GPIO test, it should ensure nothing major is missing from the SoC, and these simulations should be just about fast enough to run.\n"
    },
    {
      "commit": "1a18a9725cf2337ea025ded267b944091210e032",
      "tree": "850eadc5da1da944e00e03c653173ebc10a18dde",
      "parents": [
        "e67733d9dad02a604a86c3bd632276924c667ca7"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 00:30:20 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 29 00:30:20 2022 +0100"
      },
      "message": "Added additional modules to variable dump after GL simulations. This means that its actually possible to see what\u0027s happening on the wishbone bus in the event of a simulation failing.\n"
    },
    {
      "commit": "e67733d9dad02a604a86c3bd632276924c667ca7",
      "tree": "62133655fa5507bc2689dbf1177e349bc81b1849",
      "parents": [
        "753ef0cd8a5bdb8bb80694f19d73b5e8a15b4934"
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 23:55:20 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 23:55:20 2022 +0100"
      },
      "message": "Added CSR registers to core. These include the basic counters and status registers.\n"
    },
    {
      "commit": "753ef0cd8a5bdb8bb80694f19d73b5e8a15b4934",
      "tree": "1fbb223f60094d065848f69970190b6d619ba749",
      "parents": [
        "9e727281760308b1e83e89e2b893f9bb717e36f9"
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 23:53:43 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 23:53:43 2022 +0100"
      },
      "message": "Added JTAG core management controller. This is untested and don\u0027t use a standard method of using JTAG for managing a core. However, if it works, a custom interface could be written to allow programming the core over JTAG.\n"
    },
    {
      "commit": "9e727281760308b1e83e89e2b893f9bb717e36f9",
      "tree": "c643e99e321478b4480194edc90c2e0d1bbe2fd2",
      "parents": [
        "626c8dc5099128794b80f564a62e13afb0d78460"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 22:40:13 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 22:40:13 2022 +0100"
      },
      "message": "Fixed gpio not getting input connections (a bit more) due to verilog being dumb and not correctly parsing a mux inside a mux when performing syntheses, even though it works correctly in rtl simulation.\n"
    },
    {
      "commit": "626c8dc5099128794b80f564a62e13afb0d78460",
      "tree": "d5aa487d96700e7dc0f1257874d97a2de4a75221",
      "parents": [
        "bcdb9c9b031be47959e55c573d9f89eed65dd6a3"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 20:03:11 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 28 20:03:11 2022 +0100"
      },
      "message": "Fixed GL simulations not working properly due to missing pullup on mprj_io[3]. This is needed to make sure the management core doesn\u0027t end up in an invalid reset state. Also fixed nextTest method which wasn\u0027t correctly setting the test passed pin low if a test failed. This uncovered a some mistake made in the GPIO, memory, and UART tests, which are now also fixed. These included input pins not being connected to anything within the peripherals macro.\n"
    },
    {
      "commit": "1f2caf54d4f0e2cd1c5e1ab82d4ecd8cbfe3ace8",
      "tree": "9b0c91904d98aefa0bc7a3fed637af8f3434d763",
      "parents": [
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 18:57:54 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 18:57:54 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
    },
    {
      "commit": "bcdb9c9b031be47959e55c573d9f89eed65dd6a3",
      "tree": "9b0c91904d98aefa0bc7a3fed637af8f3434d763",
      "parents": [
        "9f217508a3a295bc8f4c23dc4181b887c5a239b1"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 18:56:18 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 18:56:18 2022 +0100"
      },
      "message": "Updated art macro so that it can pass prechecks.\n"
    },
    {
      "commit": "67582057332ff56c175fd832172c7834b3dc1a43",
      "tree": "3d85231fc2f5ca954c3e16f855e17631f01d312f",
      "parents": [
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 01:29:14 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 01:29:14 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
    },
    {
      "commit": "9f217508a3a295bc8f4c23dc4181b887c5a239b1",
      "tree": "3d85231fc2f5ca954c3e16f855e17631f01d312f",
      "parents": [
        "6885aec7fd8d2bee17702a49d2807fb8d8960fea"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 01:28:09 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 01:28:09 2022 +0100"
      },
      "message": "Updated Art macro to possibly pass prechecks.\n"
    },
    {
      "commit": "6885aec7fd8d2bee17702a49d2807fb8d8960fea",
      "tree": "9345c96deba42559ad78a1101925e5f59e597862",
      "parents": [
        "bda2da0d3d466e7ec1aed354511219d1f0d13fe0"
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 00:16:57 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 27 00:16:57 2022 +0100"
      },
      "message": "Added memory test. This check that all regions of memory can be written to and read from, and that reading from unused parts of memory gives the correct value.\n"
    },
    {
      "commit": "bda2da0d3d466e7ec1aed354511219d1f0d13fe0",
      "tree": "40b45a108c8ed9ace81bf52647dab0b14b7b1549",
      "parents": [
        "7b09468ed11e245574c08155eb91f119ee34c11e"
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 23:26:03 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 23:26:03 2022 +0100"
      },
      "message": "Rebuilt with recent fixes. Also re-added GL simulation to GitHub workflow.\n"
    },
    {
      "commit": "7b09468ed11e245574c08155eb91f119ee34c11e",
      "tree": "dd9f8928f539b0960c2438ab454da500476c3d43",
      "parents": [
        "6ab7edd5e4f440579d74160af9dcb0304cffe5fb"
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 17:59:36 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 17:59:36 2022 +0100"
      },
      "message": "Fixed VGA pixel data being misaligned with synchronisation signals.\n"
    },
    {
      "commit": "6ab7edd5e4f440579d74160af9dcb0304cffe5fb",
      "tree": "00a856fb1949c1d15844d3259a8d549f6bb348d6",
      "parents": [
        "6fb002f0f912f872a2e95302e3f30dac5dd6d2e9"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 17:03:34 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 17:03:34 2022 +0100"
      },
      "message": "Fixed VGA using the wrong pixel stretch size, and using the wrong pixel data from memory.\n"
    },
    {
      "commit": "6fb002f0f912f872a2e95302e3f30dac5dd6d2e9",
      "tree": "851170804a3954ac47553ac1ebcb108739ba07ed",
      "parents": [
        "e88c88428772057543141fe9e0d71b572d8ba55d"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 14:14:17 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 14:14:17 2022 +0100"
      },
      "message": "Fixed some issues with VGA pixel counters not changing correctly.\n"
    },
    {
      "commit": "e88c88428772057543141fe9e0d71b572d8ba55d",
      "tree": "ac0a7dc2df3d45ba7f84061e79d230f355d65ae5",
      "parents": [
        "b2e455b426cb28d1dac18fce053cbe8bb2999c41"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 00:39:29 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 00:39:29 2022 +0100"
      },
      "message": "Fixed timing valid pin being inverted when output error in video test.\n"
    },
    {
      "commit": "b2e455b426cb28d1dac18fce053cbe8bb2999c41",
      "tree": "cccb379f022c3c6503d757eb6579cdddf9588b58",
      "parents": [
        "2746c447db94bba40a29927255a48363bd0952fb"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 00:31:14 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Thu May 26 00:31:14 2022 +0100"
      },
      "message": "Added video device simulation test, and new VGA state register which contains synchronisation signals. Also fixed some issues with register addresses, and the VGA signal generation. The video test doesn\u0027t currently validate that the correct pixels are displayed, but it does test the synchronisation times.\n"
    },
    {
      "commit": "2746c447db94bba40a29927255a48363bd0952fb",
      "tree": "8866c920ce13ae60eb015ece79df03359208b891",
      "parents": [
        "d52c5c2f369801430e04e50872817de0c1acb570"
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Wed May 25 18:20:02 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Wed May 25 18:20:02 2022 +0100"
      },
      "message": "Made fixes to UART device and caravel host to enable UART-rtl test to pass. Also updated corePC test to use the newer GPIO registers.\n"
    },
    {
      "commit": "823b8ab2f048dc3b2f39f2b243fa99686bc3aab0",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Wed May 25 11:48:27 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Wed May 25 11:48:27 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
    },
    {
      "commit": "d52c5c2f369801430e04e50872817de0c1acb570",
      "tree": "b077b17034e6ffa2e2930732afe5703440a7daf2",
      "parents": [
        "7e131524e5533a93e2c323c0d3b16da98598eb5a"
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Wed May 25 11:46:01 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Wed May 25 11:46:01 2022 +0100"
      },
      "message": "Updated GitHub workflow to uncompress the Art gds file so it can be used in building the user project.\n"
    },
    {
      "commit": "fdffa98dbdda368fb6a256f6230e6a60149faef3",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 23:57:22 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 23:57:22 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
    },
    {
      "commit": "7e131524e5533a93e2c323c0d3b16da98598eb5a",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 23:56:27 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 23:56:27 2022 +0100"
      },
      "message": "Removed art from art module so that it doesn\u0027t cause DRC errors (this will be changed back when a fix for this is found). Also added set, clear, and toggle registers to gpio for easier control. This also makes it easier for both cores to write to gpio without clearing what the other core has set.\n"
    },
    {
      "commit": "e4118ea630d43e1c9b62058d6a0f223d74498a01",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 20:43:23 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 20:43:23 2022 +0100"
      },
      "message": "Renamed Counter.v to use the upper case first letter. This allows the file to be used when building on case sensitive file systems. Strangely this wasn\u0027t a problem when using Ubuntu through WSL.\n"
    },
    {
      "commit": "273a77b40ae38622522a26d2e64601da3ddb97fd",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 20:06:02 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 20:06:02 2022 +0100"
      },
      "message": "Fixed directory that GitHub workflows checks for finding precheck results.\n"
    },
    {
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 19:16:12 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 19:16:12 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
    },
    {
      "commit": "9cc20318e39e4f5beaf643490a627ad6df99605f",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 19:11:00 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 19:11:00 2022 +0100"
      },
      "message": "Reverted to older OpenLane version, as it seems this is a requirement for MPW submission.\n"
    },
    {
      "commit": "d7d2d89a5ef30380a81a2559097a905bc5698894",
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 14:02:04 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 14:02:04 2022 +0100"
      },
      "message": "Merge branch \u0027Development\u0027\n"
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    {
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 13:58:49 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 13:58:49 2022 +0100"
      },
      "message": "Rebuilt with recent changes.\n"
    },
    {
      "commit": "257d2839c5a24f262d9eebe48c392d3c8e1ee33a",
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 13:16:34 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 13:16:34 2022 +0100"
      },
      "message": "Removed commented out tests completely from GitHub workflow file, as the file now has an error.\n"
    },
    {
      "commit": "a504e94926f3514331646806e3e70a9130fd3409",
      "tree": "50a0482011058f0b7d5d1de1d079a5826366cd08",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 12:35:12 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 12:35:12 2022 +0100"
      },
      "message": "Changed how VGA reads pixel data from sram so that it should work correctly.\n"
    },
    {
      "commit": "52e7ba14ecf0d5358c996bb2314245e6a747cbb4",
      "tree": "a12352c049caa3fe43bc0ea1a8eeb06847890663",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 12:33:43 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 12:33:43 2022 +0100"
      },
      "message": "Updated Github workflow to use the correct mpw precheck version. Also disabled tests that haven\u0027t been written yet.\n"
    },
    {
      "commit": "4562681c352776ff63ddbcb2788adadecdf7c7dd",
      "tree": "16745a92c4e0f50f8dc259337ddb430a3158b1a7",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 12:32:51 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Tue May 24 12:32:51 2022 +0100"
      },
      "message": "Re-added licence and CI badges to readme.\n"
    },
    {
      "commit": "52866026ef09c625259775f12bf79903129beef3",
      "tree": "f72cf5767420cddaa0378a2f0f3cdd73dfbcd816",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Mon May 23 23:35:40 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Mon May 23 23:35:40 2022 +0100"
      },
      "message": "Made a number of fixes and changes which now allows the cores to pass the corePC simulation test. This has required the core size to increased\n"
    },
    {
      "commit": "4443fea31ed75e319c3532b0ff48d1f108b6559c",
      "tree": "c0557906a3a368d6c16d9515465b9d748eb52e23",
      "parents": [
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 23:52:06 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 23:52:06 2022 +0100"
      },
      "message": "Added read back of test memory to core program counter test.\n"
    },
    {
      "commit": "c138fb0519ad778b4625b6f1d7391c7018ac14c5",
      "tree": "af9ac99468df85aa3347774fab6612b83a686292",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 22:06:01 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 22:06:01 2022 +0100"
      },
      "message": "Added core program counter test. Also fixed the core not putting any of the core in the macro. This was caused by the unimplemented JTAG device not sending a signal to the core management, preventing it from ever allowing the core to run, resulting it being optimised away.\n"
    },
    {
      "commit": "951f5a34fb96c59e219de6851038767f211be617",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 17:07:57 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 17:07:57 2022 +0100"
      },
      "message": "Updated GitHub workflow to harden and test the correct modules.\n"
    },
    {
      "commit": "2ccd997671278f9fec2aaa1f1a9c625d8e9edcf7",
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      "author": {
        "name": "Wevel",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 16:53:29 2022 +0100"
      },
      "committer": {
        "name": "GitHub",
        "email": "noreply@github.com",
        "time": "Sun May 22 16:53:29 2022 +0100"
      },
      "message": "Merge pull request #3 from Wevel/Development\n\nDevelopment"
    },
    {
      "commit": "ff79e9296da0cc9ee6c8a677f30b1cdbf3419124",
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 16:49:09 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 16:49:09 2022 +0100"
      },
      "message": "Got user_project_wrapper to build successfully. There are still problems to be resolved, but this is now a\n"
    },
    {
      "commit": "99bde90b21a6fc5e9cda003db05768f02576f272",
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        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 11:41:17 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 11:41:17 2022 +0100"
      },
      "message": "Fixed spelling error in source file name.\n"
    },
    {
      "commit": "0ba103fac53cac1a5f1dfa5fff46e41a7ed07887",
      "tree": "7c07caaf7f1119a7dc1424e357548a813d9921dc",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 11:31:07 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sun May 22 11:31:07 2022 +0100"
      },
      "message": "Updated rendering of guide file to show layers better, this now also shows macro positions using a custom macro placement json file. Also added generation of macro position configuration using the macro placement file.\n"
    },
    {
      "commit": "049d4be60f10b7c608a6dbf59230620c774aa8fd",
      "tree": "77b505f179bdbdaf9e23e1cb34bd32dbe3c1ff2c",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 23:41:59 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 23:41:59 2022 +0100"
      },
      "message": "Fixed UART test not checking for the correct status bit. Also added some extra checks to make sure data leaves the FIFO buffers correctly.\n"
    },
    {
      "commit": "4dfa7912db0fd9c483ea31d0d0a4f8951112db25",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 22:33:34 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 22:33:34 2022 +0100"
      },
      "message": "Added UART test .\n"
    },
    {
      "commit": "2b18208b708cd51459ee46c3c1d1531eed5ddbed",
      "tree": "89f5f29b91cee87dd0396bd1d74a28db38957c83",
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 22:32:57 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 22:32:57 2022 +0100"
      },
      "message": "Fixed uart device outputting data when not enabled. Also fixed uart using the wrong cycles per bit value.\n"
    },
    {
      "commit": "bedb595d4dfe22d088efac99de78eb4ddc23322d",
      "tree": "d8cf95d776f4f7dcd7a3f3abe5ba77c94c2e1bd3",
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        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 19:09:15 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 19:09:15 2022 +0100"
      },
      "message": "Fixed N input mux not generating an output signal.\n"
    },
    {
      "commit": "2988523b0cc07f1a93ae7a88f831c5b933343150",
      "tree": "610ff001ce4a91e92a9dc43602c2f5d853211133",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 19:04:14 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 19:04:14 2022 +0100"
      },
      "message": "Fixed wishbone slave stall signal staying on for an extra clock cycle.\n"
    },
    {
      "commit": "e31260034d767a20ca95a043eca12ad24667ca82",
      "tree": "1d339e50f46ce48687f868b5c66fa0b6eb70cd79",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:51:44 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:51:44 2022 +0100"
      },
      "message": "Updated GPIO test to set the success  pin high before the test starts, so that if it fails on the first test its more clear.\n"
    },
    {
      "commit": "7d7207a1eb188e3277ade12be54f319b78208ba1",
      "tree": "033f20c142362c0d6a457acfbb1ddcf4fc63bb24",
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      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:43:37 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:43:37 2022 +0100"
      },
      "message": "Updated testing setup to remove example tests, and provide a proper GPIO test which passes when using verify rtl.\n"
    },
    {
      "commit": "e851b8afcd11bd89694aa53c39a0442f2c15ed60",
      "tree": "b4d777ee89c83bbdba260b9a3918daa3675dae7d",
      "parents": [
        "aeb29be39dde00816e99bc4e953e19e82af39668"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:41:48 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:41:48 2022 +0100"
      },
      "message": "Fixed UART sending a single bit of data on reset.\n"
    },
    {
      "commit": "aeb29be39dde00816e99bc4e953e19e82af39668",
      "tree": "ab9dcf6438aa407eb39e7aec9025cf167cc4347d",
      "parents": [
        "8b2f2838570312f7d5bbe3eb9be100bc4997e8ee"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:41:26 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:41:26 2022 +0100"
      },
      "message": "Added gpio input buffer to remove unknown data bits.\n"
    },
    {
      "commit": "8b2f2838570312f7d5bbe3eb9be100bc4997e8ee",
      "tree": "42ff2c7a740ad0aaf3b085b171b4c01446edf7ec",
      "parents": [
        "025b919cb981d3de305f2839e2489cec0e7a74dd"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:40:25 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 18:40:25 2022 +0100"
      },
      "message": "Fixed wishbone slaves not providing read data on the correct clock cycle.\n"
    },
    {
      "commit": "025b919cb981d3de305f2839e2489cec0e7a74dd",
      "tree": "85fa98610dcb7bf21c953ff7a4e88db2dd86a5f4",
      "parents": [
        "b8c7bb25bfc0bb290de43a968359fd72e524018f"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 11:46:06 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 11:46:06 2022 +0100"
      },
      "message": "Fixed user macros not being connected to PDN. Rotated SRAM macros are still not connected, so the full build still fails.\n"
    },
    {
      "commit": "b8c7bb25bfc0bb290de43a968359fd72e524018f",
      "tree": "666cc67b9f67d23e6f517defc315862f53bba5ba",
      "parents": [
        "c6f707b8370c84ecdbb9fe6588da0838651287b3"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 01:21:54 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 01:21:54 2022 +0100"
      },
      "message": "Made some small changes to try to get PDN to connect to macros. Also fixed some missing logic in the core macro. However, most of the macro still does not get built.\n"
    },
    {
      "commit": "c6f707b8370c84ecdbb9fe6588da0838651287b3",
      "tree": "f18ee9fbae02a53d091d01f90e3075bab12657df",
      "parents": [
        "8afd017992b715c894a213ffbe2837a4127750a1"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 01:20:11 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Sat May 21 01:20:11 2022 +0100"
      },
      "message": "Added info on tests that need to be implemented.\n"
    },
    {
      "commit": "8afd017992b715c894a213ffbe2837a4127750a1",
      "tree": "d59c43206df6b9cde6e59dd684cf531b8398b37d",
      "parents": [
        "8100c3eeee0447a6da520d5c92c907f310947cd4"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 20 20:31:48 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 20 20:31:48 2022 +0100"
      },
      "message": "Fixed core 1 SRAM macros not having the correct orientation.\n"
    },
    {
      "commit": "8100c3eeee0447a6da520d5c92c907f310947cd4",
      "tree": "311c5a001f69b4ba8aa559a2fe638f91508cc308",
      "parents": [
        "d6dcdf141fb11f65539f51f3aa50bbb3a631a451"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 20 20:30:11 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 20 20:30:11 2022 +0100"
      },
      "message": "Added script to render image of routing guide files. This can be useful to make sure macros are placed correctly, but only when there are lots of wires near them.\n"
    },
    {
      "commit": "d6dcdf141fb11f65539f51f3aa50bbb3a631a451",
      "tree": "7f5d70df2466ba3d18ef343a3757834fc86cc48f",
      "parents": [
        "c8a9669b1ed0c8c1211a1380234e85f5997c3b9b"
      ],
      "author": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 20 17:44:12 2022 +0100"
      },
      "committer": {
        "name": "Charlie",
        "email": "charlie.david.smith@hotmail.co.uk",
        "time": "Fri May 20 17:44:12 2022 +0100"
      },
      "message": "Updated collated logs after previous build.\n"
    }
  ],
  "next": "c8a9669b1ed0c8c1211a1380234e85f5997c3b9b"
}