)]}'
{
  "commit": "c678a2e4fa47590c2b0b6f555275df724974152a",
  "tree": "baaf711ca20d5030bb9450e6817dd670e4cbdee9",
  "parents": [
    "7d855dbac26e72e816268065c671fe8ba1515494"
  ],
  "author": {
    "name": "Charlie",
    "email": "charlie.david.smith@hotmail.co.uk",
    "time": "Sun May 29 22:35:01 2022 +0100"
  },
  "committer": {
    "name": "Charlie",
    "email": "charlie.david.smith@hotmail.co.uk",
    "time": "Sun May 29 22:35:01 2022 +0100"
  },
  "message": "Fixed ALU immediate instructions producing the wrong result if the aluAlt bit is set, even when this signal is not used in the instruction.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "371a75d7a2dcfb1d6b44656fea0f7a514f2ef93f",
      "old_mode": 33188,
      "old_path": "verilog/rtl/ExperiarCore/RV32ICore.v",
      "new_id": "5319df1c15e0ca299b381dffedd9a232cf39aa84",
      "new_mode": 33188,
      "new_path": "verilog/rtl/ExperiarCore/RV32ICore.v"
    }
  ]
}