| ,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY |
| 0,/home/crab/windows/ASIC/ExperiarSoC/openlane/CaravelHost,CaravelHost,CaravelHost,flow completed,0h5m18s0ms,0h3m54s0ms,77910.20408163263,0.1225,38955.10204081632,41.17,1386.02,4772,0,0,0,0,0,0,0,13,0,0,-1,208374,35666,0.0,0.0,-1,0.0,0.0,0.0,0.0,-1,0.0,0.0,158747896.0,0.0,46.08,51.56,5.13,28.25,-1,1973,4616,307,2916,0,0,0,2678,97,0,51,11,334,101,16,696,897,1440,13,240,1586,0,1826,40.0,25.0,25,AREA 0,5,50,1,153.6,153.18,0.415,0.3,sky130_fd_sc_hd,4,3 |
