)]}'
{
  "commit": "238b9993b7d7f82191493fcc3eaa5945b1d84cd2",
  "tree": "c0cc7b021efa6a0fb8763a41e309a61340fe3f09",
  "parents": [
    "b283c6fecd5d60029f4a6bd6f35539fddf79c492"
  ],
  "author": {
    "name": "Charlie",
    "email": "charlie.david.smith@hotmail.co.uk",
    "time": "Fri Jun 03 12:40:44 2022 +0100"
  },
  "committer": {
    "name": "Charlie",
    "email": "charlie.david.smith@hotmail.co.uk",
    "time": "Fri Jun 03 12:40:44 2022 +0100"
  },
  "message": "Fixed that the previous change used the full counter value rather than the scaled counter value for comparing to the top value.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "fb7a8ca485fcbdbcb47dbffdd41aa1936ca9d0a7",
      "old_mode": 33188,
      "old_path": "verilog/rtl/Peripherals/PWM/PWMDevice.v",
      "new_id": "d9a43c9e1f852e924c0c7446047f699f5c9a5fe0",
      "new_mode": 33188,
      "new_path": "verilog/rtl/Peripherals/PWM/PWMDevice.v"
    }
  ]
}