diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..261eeb9
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,201 @@
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diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..4e877be
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,140 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+CARAVEL_ROOT?=$(PWD)/caravel
+PRECHECK_ROOT?=${HOME}/mpw_precheck
+SIM ?= RTL
+
+# Install lite version of caravel, (1): caravel-lite, (0): caravel
+CARAVEL_LITE?=1
+
+ifeq ($(CARAVEL_LITE),1) 
+	CARAVEL_NAME := caravel-lite
+	CARAVEL_REPO := https://github.com/efabless/caravel-lite
+	CARAVEL_TAG := 'mpw-5a'
+else
+	CARAVEL_NAME := caravel
+	CARAVEL_REPO := https://github.com/efabless/caravel
+	CARAVEL_TAG := 'mpw-5a'
+endif
+
+# Include Caravel Makefile Targets
+.PHONY: % : check-caravel
+%: 
+	export CARAVEL_ROOT=$(CARAVEL_ROOT) && $(MAKE) -f $(CARAVEL_ROOT)/Makefile $@
+
+# Verify Target for running simulations
+.PHONY: verify
+verify:
+	cd ./verilog/dv/ && \
+	export SIM=${SIM} && \
+		$(MAKE) -j$(THREADS)
+
+# Install DV setup
+.PHONY: simenv
+simenv:
+	docker pull efabless/dv_setup:latest
+
+PATTERNS=$(shell cd verilog/dv && find * -maxdepth 0 -type d)
+DV_PATTERNS = $(foreach dv, $(PATTERNS), verify-$(dv))
+TARGET_PATH=$(shell pwd)
+VERIFY_COMMAND="cd ${TARGET_PATH}/verilog/dv/$* && export SIM=${SIM} && make"
+$(DV_PATTERNS): verify-% : ./verilog/dv/% 
+	docker run -v ${TARGET_PATH}:${TARGET_PATH} -v ${PDK_ROOT}:${PDK_ROOT} \
+                -v ${CARAVEL_ROOT}:${CARAVEL_ROOT} \
+                -e TARGET_PATH=${TARGET_PATH} -e PDK_ROOT=${PDK_ROOT} \
+                -e CARAVEL_ROOT=${CARAVEL_ROOT} \
+                -u $(id -u $$USER):$(id -g $$USER) efabless/dv_setup:latest \
+                sh -c $(VERIFY_COMMAND)
+				
+# Openlane Makefile Targets
+BLOCKS = $(shell cd openlane && find * -maxdepth 0 -type d)
+.PHONY: $(BLOCKS)
+$(BLOCKS): %:
+	cd openlane && $(MAKE) $*
+
+# Install caravel
+.PHONY: install
+install:
+	@echo "Installing $(CARAVEL_NAME).."
+	@git clone -b $(CARAVEL_TAG) $(CARAVEL_REPO) $(CARAVEL_ROOT)
+
+# Create symbolic links to caravel's main files
+.PHONY: simlink
+simlink: check-caravel
+### Symbolic links relative path to $CARAVEL_ROOT 
+	$(eval MAKEFILE_PATH := $(shell realpath --relative-to=openlane $(CARAVEL_ROOT)/openlane/Makefile))
+	mkdir -p openlane
+	cd openlane &&\
+	ln -sf $(MAKEFILE_PATH) Makefile
+
+# Update Caravel
+.PHONY: update_caravel
+update_caravel: check-caravel
+	cd $(CARAVEL_ROOT)/ && git checkout $(CARAVEL_TAG) && git pull
+
+# Uninstall Caravel
+.PHONY: uninstall
+uninstall: 
+	rm -rf $(CARAVEL_ROOT)
+
+# Install Openlane
+.PHONY: openlane
+openlane: 
+	cd openlane && $(MAKE) openlane
+
+# Install Pre-check
+# Default installs to the user home directory, override by "export PRECHECK_ROOT=<precheck-installation-path>"
+.PHONY: precheck
+precheck:
+	@git clone --depth=1 --branch mpw-5a https://github.com/efabless/mpw_precheck.git $(PRECHECK_ROOT)
+	@docker pull efabless/mpw_precheck:latest
+
+.PHONY: run-precheck
+run-precheck: check-pdk check-precheck
+	$(eval INPUT_DIRECTORY := $(shell pwd))
+	cd $(PRECHECK_ROOT) && \
+	docker run -v $(PRECHECK_ROOT):$(PRECHECK_ROOT) -v $(INPUT_DIRECTORY):$(INPUT_DIRECTORY) -v $(PDK_ROOT):$(PDK_ROOT) -e INPUT_DIRECTORY=$(INPUT_DIRECTORY) -e PDK_ROOT=$(PDK_ROOT) \
+	-u $(shell id -u $(USER)):$(shell id -g $(USER)) efabless/mpw_precheck:latest bash -c "cd $(PRECHECK_ROOT) ; python3 mpw_precheck.py --input_directory $(INPUT_DIRECTORY) --pdk_root $(PDK_ROOT)"
+
+# Clean 
+.PHONY: clean
+clean:
+	cd ./verilog/dv/ && \
+		$(MAKE) -j$(THREADS) clean
+
+check-caravel:
+	@if [ ! -d "$(CARAVEL_ROOT)" ]; then \
+		echo "Caravel Root: "$(CARAVEL_ROOT)" doesn't exists, please export the correct path before running make. "; \
+		exit 1; \
+	fi
+
+check-precheck:
+	@if [ ! -d "$(PRECHECK_ROOT)" ]; then \
+		echo "Pre-check Root: "$(PRECHECK_ROOT)" doesn't exists, please export the correct path before running make. "; \
+		exit 1; \
+	fi
+
+check-pdk:
+	@if [ ! -d "$(PDK_ROOT)" ]; then \
+		echo "PDK Root: "$(PDK_ROOT)" doesn't exists, please export the correct path before running make. "; \
+		exit 1; \
+	fi
+
+.PHONY: help
+help:
+	cd $(CARAVEL_ROOT) && $(MAKE) help 
+	@$(MAKE) -pRrq -f $(lastword $(MAKEFILE_LIST)) : 2>/dev/null | awk -v RS= -F: '/^# File/,/^# Finished Make data base/ {if ($$1 !~ "^[#.]") {print $$1}}' | sort | egrep -v -e '^[^[:alnum:]]' -e '^$@$$'
diff --git a/Pos-Layout/detV2.ext b/Pos-Layout/detV2.ext
new file mode 100644
index 0000000..dc7c719
--- /dev/null
+++ b/Pos-Layout/detV2.ext
@@ -0,0 +1,24 @@
+timestamp 1647728325
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use sky130_fd_pr__res_xhigh_po_0p35_HDW2JU R 1 0 -44735 0 1 -9330
+parameters sky130_fd_pr__nfet_01v8 l=l w=w
+parameters sky130_fd_pr__cap_mim_m3_1 w=w l=l
+port "din" 1 -63034 -25264 -63034 -25264 m4
+port "do" 3 -35040 -25176 -35040 -25176 m4
+port "db" 2 -45852 -26620 -45852 -26620 li
+port "GND" 4 -52114 -3556 -52114 -3556 m1
+node "din" 0 17500.7 -63034 -25264 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 57996708 32168 0 0 0 0
+node "do" 5 38226.5 -35040 -25176 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8300544 37092 2560000 6400 2560000 6400 64947092 41180 0 0 0 0
+node "bot_cin" 4376 35489.8 -46000 -11880 ndif 0 0 0 0 0 0 0 0 630000 9280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 248880 6636 134620 3992 28640 964 5893736 150028 0 0 0 0 0 0
+node "db" 7836 16773.5 -45852 -26620 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 156600 9960 0 0 8715904 30440 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "GND" 0 0 -52114 -3556 m1 0 0 0 0 0 0 0 0 630000 9280 630000 9280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14088324 40020 13586104 28300 1008016 4016 5658760 145976 0 0 0 0 0 0
+cap "bot_cin" "db" 11.6617
+cap "bot_cin" "din" 2760.78
+device msubckt sky130_fd_pr__nfet_01v8 -45860 -11880 -45859 -11879 l=30 w=4500 "GND" "db" 60 0 "bot_cin" 4500 0 "GND" 4500 0
+merge "R/VSUBS" "GND" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+merge "R/a_n35_n2292#" "do" -15.927 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3300 -108 0 0 0 0 0 0 0 0 0 0
+merge "R/a_n35_1860#" "bot_cin" -14.896 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -100 0 0 0 0 0 0 0 0 0 0
diff --git a/Pos-Layout/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext b/Pos-Layout/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext
new file mode 100644
index 0000000..2e7c8bb
--- /dev/null
+++ b/Pos-Layout/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext
@@ -0,0 +1,17 @@
+timestamp 1647728325
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__res_xhigh_po l=l w=w
+parameters sky130_fd_pr__res_xhigh_po_5p73 l=l
+parameters sky130_fd_pr__res_xhigh_po_2p85 l=l
+parameters sky130_fd_pr__res_xhigh_po_1p41 l=l
+parameters sky130_fd_pr__res_xhigh_po_0p69 l=l
+parameters sky130_fd_pr__res_xhigh_po_0p35 l=l
+node "a_n35_n2292#" 179 547.239 -35 -2292 xpc 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60480 2008 21050 942 0 0 0 0 0 0 0 0 0 0
+node "a_n35_n1860#" 106286 0 -35 -1860 xres 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 260400 7580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_n35_1860#" 179 547.239 -35 1860 xpc 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60480 2008 21050 942 0 0 0 0 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+device rsubckt sky130_fd_pr__res_xhigh_po -35 -1860 -34 -1859 l=3720 w=70 "VSUBS" "a_n35_n1860#" 0 0 "a_n35_n2292#" 70 0 "a_n35_1860#" 70 0
diff --git a/Pos-Layout/user_analog_project_wrapper.ext b/Pos-Layout/user_analog_project_wrapper.ext
new file mode 100644
index 0000000..8521c6e
--- /dev/null
+++ b/Pos-Layout/user_analog_project_wrapper.ext
@@ -0,0 +1,103 @@
+timestamp 1647728325
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use user_analog_project_wrapper_empty user_analog_project_wrapper_empty_0 1 0 0 0 1 0
+use detV2 detV2_0 1 0 432146 0 1 607260
+parameters sky130_fd_pr__cap_mim_m3_1 w=w l=l
+node "c1_391936_587362#" 0 0 391936 587362 mim 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "c1_369548_587108#" 0 0 369548 587108 mim 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "m3_389074_583506#" 0 106814 389074 583506 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 308072700 70208 0 0 0 0 0 0
+node "m3_367190_583496#" 0 106746 367190 583496 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 307862052 70184 0 0 0 0 0 0
+node "m3_528674_679002#" 0 291548 528674 679002 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 190632000 194632 508280000 512284 0 0 0 0
+node "io_analog[3]" 0 128234 415004 647976 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 117932272 121948 184713768 188684 0 0 0 0
+node "m1_385540_604196#" 0 410694 385540 604196 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 362964000 366964 8000000 12000 200465136 203856 0 0 0 0 0 0
+node "li_385184_574990#" 113 187051 385184 574990 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6986452 17824 4056052 8056 4056052 8056 83872236 91876 348719976 351632 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "li_385184_574990#" "m1_385540_604196#" 2680
+cap "io_analog[3]" "m1_385540_604196#" 5140
+device csubckt sky130_fd_pr__cap_mim_m3_1 391936 587362 391937 587363 w=4682 l=3380 "None" "c1_391936_587362#" 0 0 "m3_389074_583506#" 4500 0
+device csubckt sky130_fd_pr__cap_mim_m3_1 369548 587108 369549 587109 w=4682 l=3380 "None" "c1_369548_587108#" 0 0 "m3_367190_583496#" 4500 0
+cap "io_analog[3]" "detV2_0/do" 32.0613
+cap "detV2_0/do" "io_analog[3]" 32.0613
+cap "m3_367190_583496#" "detV2_0/din" 2062.71
+cap "m3_367190_583496#" "detV2_0/din" 2256.8
+cap "m3_367190_583496#" "detV2_0/din" 2256.8
+cap "detV2_0/din" "m3_367190_583496#" 2256.8
+cap "m3_367190_583496#" "detV2_0/din" 582.89
+cap "m3_389074_583506#" "detV2_0/do" 1810.39
+cap "m3_389074_583506#" "detV2_0/do" 2227.4
+cap "detV2_0/do" "m3_389074_583506#" 2227.4
+cap "m3_389074_583506#" "detV2_0/do" 2227.4
+cap "detV2_0/do" "m3_389074_583506#" 801.692
+cap "detV2_0/din" "m3_367190_583496#" 3695.72
+cap "detV2_0/din" "m3_367190_583496#" 3887.43
+cap "detV2_0/din" "m3_367190_583496#" 3887.43
+cap "detV2_0/din" "m3_367190_583496#" 3827.08
+cap "m3_367190_583496#" "detV2_0/din" 768.23
+cap "detV2_0/do" "m3_389074_583506#" 3278.24
+cap "detV2_0/do" "m3_389074_583506#" 3887.43
+cap "m3_389074_583506#" "detV2_0/do" 3887.43
+cap "detV2_0/do" "m3_389074_583506#" 3776.67
+cap "m3_389074_583506#" "detV2_0/do" 1185.71
+cap "m3_367190_583496#" "detV2_0/din" 3695.72
+cap "m3_367190_583496#" "detV2_0/din" 3887.43
+cap "m3_367190_583496#" "detV2_0/din" 3887.43
+cap "m3_367190_583496#" "detV2_0/din" 3827.08
+cap "detV2_0/din" "m3_367190_583496#" 768.23
+cap "m3_389074_583506#" "detV2_0/do" 3278.24
+cap "m3_389074_583506#" "detV2_0/do" 3887.43
+cap "m3_389074_583506#" "detV2_0/do" 3887.43
+cap "detV2_0/do" "m3_389074_583506#" 3776.67
+cap "m3_389074_583506#" "detV2_0/do" 1185.71
+cap "m3_367190_583496#" "detV2_0/din" 3695.72
+cap "m3_367190_583496#" "detV2_0/din" 3658.86
+cap "detV2_0/din" "m3_367190_583496#" 3658.86
+cap "m3_367190_583496#" "detV2_0/din" 3538.16
+cap "m3_367190_583496#" "detV2_0/din" 682.015
+cap "m3_389074_583506#" "c1_391936_587362#" 3278.24
+cap "c1_391936_587362#" "m3_389074_583506#" 3658.86
+cap "m3_389074_583506#" "c1_391936_587362#" 3658.86
+cap "m3_389074_583506#" "detV2_0/do" 3437.34
+cap "detV2_0/do" "m3_389074_583506#" 1099.49
+cap "m3_367190_583496#" "detV2_0/din" 3695.72
+cap "m3_367190_583496#" "detV2_0/din" 3887.43
+cap "m3_367190_583496#" "detV2_0/din" 3887.43
+cap "m3_367190_583496#" "detV2_0/din" 3827.08
+cap "m3_367190_583496#" "detV2_0/din" 910.585
+cap "m3_389074_583506#" "c1_391936_587362#" 3278.24
+cap "m3_389074_583506#" "c1_391936_587362#" 3887.43
+cap "m3_389074_583506#" "c1_391936_587362#" 3887.43
+cap "m3_389074_583506#" "detV2_0/do" 3776.67
+cap "m3_389074_583506#" "detV2_0/do" 1328.06
+cap "m3_367190_583496#" "detV2_0/din" 3216.11
+cap "m3_367190_583496#" "detV2_0/din" 3191.54
+cap "detV2_0/din" "m3_367190_583496#" 3191.54
+cap "detV2_0/din" "m3_367190_583496#" 3070.84
+cap "detV2_0/din" "m3_367190_583496#" 508.829
+cap "m3_389074_583506#" "c1_391936_587362#" 3614.07
+cap "m3_389074_583506#" "c1_391936_587362#" 4155.86
+cap "c1_391936_587362#" "m3_389074_583506#" 4155.86
+cap "detV2_0/do" "m3_389074_583506#" 3934.34
+cap "m3_389074_583506#" "detV2_0/do" 1210.25
+cap "detV2_0/do" "m3_389074_583506#" 1019.58
+cap "m3_389074_583506#" "detV2_0/do" 1126.91
+cap "m3_389074_583506#" "detV2_0/do" 1126.91
+cap "m3_389074_583506#" "detV2_0/do" 1016.15
+cap "m3_389074_583506#" "detV2_0/do" 177.168
+merge "user_analog_project_wrapper_empty_0/io_analog[2]" "detV2_0/db" -2755.37 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -411696 -3648 0 0 0 0 -1045160 -5160 0 0 0 0 0 0
+merge "detV2_0/db" "li_385184_574990#"
+merge "user_analog_project_wrapper_empty_0/io_analog[1]" "detV2_0/din" -10328.8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1088360 -5352 -2323076 -7956 0 0 0 0
+merge "detV2_0/din" "c1_369548_587108#"
+merge "c1_369548_587108#" "m3_528674_679002#"
+merge "user_analog_project_wrapper_empty_0/vssa1" "detV2_0/GND" -95105 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -3884000 -12144 0 0 -149354644 -220900 0 0 0 0 0 0
+merge "detV2_0/GND" "m1_385540_604196#"
+merge "m1_385540_604196#" "m3_389074_583506#"
+merge "m3_389074_583506#" "user_analog_project_wrapper_empty_0/VSUBS"
+merge "user_analog_project_wrapper_empty_0/VSUBS" "VSUBS"
+merge "detV2_0/bot_cin" "m3_367190_583496#" -85359.2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -143382748 -206558 0 0 0 0 0 0
+merge "user_analog_project_wrapper_empty_0/io_analog[3]" "detV2_0/do" -61612.6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -100997296 -107000 -25452144 -18324 0 0 0 0
+merge "detV2_0/do" "c1_391936_587362#"
+merge "c1_391936_587362#" "io_analog[3]"
diff --git a/Pos-Layout/user_analog_project_wrapper.spice b/Pos-Layout/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..a1a74b1
--- /dev/null
+++ b/Pos-Layout/user_analog_project_wrapper.spice
@@ -0,0 +1,698 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt sky130_fd_pr__res_xhigh_po_0p35_HDW2JU a_n35_1860# a_n35_n2292# VSUBS
+X0 a_n35_n2292# a_n35_1860# VSUBS sky130_fd_pr__res_xhigh_po_0p35 l=1.86e+07u
+C0 a_n35_n2292# VSUBS 0.55fF
+C1 a_n35_1860# VSUBS 0.55fF
+.ends
+
+.subckt detV2 din db do GND
+XR a_n46000_n11880# do GND sky130_fd_pr__res_xhigh_po_0p35_HDW2JU
+X0 din a_n46000_n11880# sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X1 do GND sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X2 GND db a_n46000_n11880# GND sky130_fd_pr__nfet_01v8 w=2.25e+07u l=150000u
+C0 db a_n46000_n11880# 0.01fF
+C1 din a_n46000_n11880# 95.06fF
+C2 din GND 5.50fF
+C3 db GND 16.77fF
+C4 do GND 125.35fF
+C5 a_n46000_n11880# GND 112.58fF
+.ends
+
+.subckt user_analog_project_wrapper
+XdetV2_0 io_analog[2] detV2_0/db io_analog[3] vssa1 detV2
+C0 user_analog_project_wrapper_empty_0/io_clamp_high[1] user_analog_project_wrapper_empty_0/io_analog[5] 0.53fF
+C1 user_analog_project_wrapper_empty_0/io_clamp_high[0] user_analog_project_wrapper_empty_0/io_clamp_low[0] 0.53fF
+C2 user_analog_project_wrapper_empty_0/io_clamp_high[1] user_analog_project_wrapper_empty_0/io_clamp_low[1] 0.53fF
+C3 io_analog[2] detV2_0/db 10.68fF
+C4 user_analog_project_wrapper_empty_0/io_analog[5] user_analog_project_wrapper_empty_0/io_clamp_low[1] 0.53fF
+C5 user_analog_project_wrapper_empty_0/io_clamp_high[2] user_analog_project_wrapper_empty_0/io_analog[6] 0.53fF
+C6 user_analog_project_wrapper_empty_0/io_clamp_high[0] user_analog_project_wrapper_empty_0/io_analog[4] 0.53fF
+C7 user_analog_project_wrapper_empty_0/io_clamp_low[2] user_analog_project_wrapper_empty_0/io_analog[6] 0.53fF
+C8 user_analog_project_wrapper_empty_0/io_clamp_low[2] user_analog_project_wrapper_empty_0/io_clamp_high[2] 0.53fF
+C9 user_analog_project_wrapper_empty_0/io_analog[4] user_analog_project_wrapper_empty_0/io_clamp_low[0] 0.53fF
+C10 io_analog[2] vssa1 154.95fF
+C11 detV2_0/db vssa1 230.22fF
+C12 io_analog[3] vssa1 199.92fF
+C13 detV2_0/a_n46000_n11880# vssa1 112.58fF
+C14 user_analog_project_wrapper_empty_0/io_analog[4] vssa1 25.05fF
+C15 user_analog_project_wrapper_empty_0/io_analog[5] vssa1 25.05fF
+C16 user_analog_project_wrapper_empty_0/io_analog[6] vssa1 25.05fF
+C17 user_analog_project_wrapper_empty_0/io_in_3v3[0] vssa1 0.61fF
+C18 user_analog_project_wrapper_empty_0/io_oeb[26] vssa1 0.61fF
+C19 user_analog_project_wrapper_empty_0/io_in[0] vssa1 0.61fF
+C20 user_analog_project_wrapper_empty_0/io_out[26] vssa1 0.61fF
+C21 user_analog_project_wrapper_empty_0/io_out[0] vssa1 0.61fF
+C22 user_analog_project_wrapper_empty_0/io_in[26] vssa1 0.61fF
+C23 user_analog_project_wrapper_empty_0/io_oeb[0] vssa1 0.61fF
+C24 user_analog_project_wrapper_empty_0/io_in_3v3[26] vssa1 0.61fF
+C25 user_analog_project_wrapper_empty_0/io_in_3v3[1] vssa1 0.61fF
+C26 user_analog_project_wrapper_empty_0/io_oeb[25] vssa1 0.61fF
+C27 user_analog_project_wrapper_empty_0/io_in[1] vssa1 0.61fF
+C28 user_analog_project_wrapper_empty_0/io_out[25] vssa1 0.61fF
+C29 user_analog_project_wrapper_empty_0/io_out[1] vssa1 0.61fF
+C30 user_analog_project_wrapper_empty_0/io_in[25] vssa1 0.61fF
+C31 user_analog_project_wrapper_empty_0/io_oeb[1] vssa1 0.61fF
+C32 user_analog_project_wrapper_empty_0/io_in_3v3[25] vssa1 0.61fF
+C33 user_analog_project_wrapper_empty_0/io_in_3v3[2] vssa1 0.61fF
+C34 user_analog_project_wrapper_empty_0/io_oeb[24] vssa1 0.61fF
+C35 user_analog_project_wrapper_empty_0/io_in[2] vssa1 0.61fF
+C36 user_analog_project_wrapper_empty_0/io_out[24] vssa1 0.61fF
+C37 user_analog_project_wrapper_empty_0/io_out[2] vssa1 0.61fF
+C38 user_analog_project_wrapper_empty_0/io_in[24] vssa1 0.61fF
+C39 user_analog_project_wrapper_empty_0/io_oeb[2] vssa1 0.61fF
+C40 user_analog_project_wrapper_empty_0/io_in_3v3[24] vssa1 0.61fF
+C41 user_analog_project_wrapper_empty_0/io_in_3v3[3] vssa1 0.61fF
+C42 user_analog_project_wrapper_empty_0/gpio_noesd[17] vssa1 0.61fF
+C43 user_analog_project_wrapper_empty_0/io_in[3] vssa1 0.61fF
+C44 user_analog_project_wrapper_empty_0/gpio_analog[17] vssa1 0.61fF
+C45 user_analog_project_wrapper_empty_0/io_out[3] vssa1 0.61fF
+C46 user_analog_project_wrapper_empty_0/io_oeb[3] vssa1 0.61fF
+C47 user_analog_project_wrapper_empty_0/io_in_3v3[4] vssa1 0.61fF
+C48 user_analog_project_wrapper_empty_0/io_in[4] vssa1 0.61fF
+C49 user_analog_project_wrapper_empty_0/io_out[4] vssa1 0.61fF
+C50 user_analog_project_wrapper_empty_0/io_oeb[4] vssa1 0.61fF
+C51 user_analog_project_wrapper_empty_0/io_oeb[23] vssa1 0.61fF
+C52 user_analog_project_wrapper_empty_0/io_out[23] vssa1 0.61fF
+C53 user_analog_project_wrapper_empty_0/io_in[23] vssa1 0.61fF
+C54 user_analog_project_wrapper_empty_0/io_in_3v3[23] vssa1 0.61fF
+C55 user_analog_project_wrapper_empty_0/gpio_noesd[16] vssa1 0.61fF
+C56 user_analog_project_wrapper_empty_0/gpio_analog[16] vssa1 0.61fF
+C57 user_analog_project_wrapper_empty_0/io_in_3v3[5] vssa1 0.61fF
+C58 user_analog_project_wrapper_empty_0/io_in[5] vssa1 0.61fF
+C59 user_analog_project_wrapper_empty_0/io_out[5] vssa1 0.61fF
+C60 user_analog_project_wrapper_empty_0/io_oeb[5] vssa1 0.61fF
+C61 user_analog_project_wrapper_empty_0/io_oeb[22] vssa1 0.61fF
+C62 user_analog_project_wrapper_empty_0/io_out[22] vssa1 0.61fF
+C63 user_analog_project_wrapper_empty_0/io_in[22] vssa1 0.61fF
+C64 user_analog_project_wrapper_empty_0/io_in_3v3[22] vssa1 0.61fF
+C65 user_analog_project_wrapper_empty_0/gpio_noesd[15] vssa1 0.61fF
+C66 user_analog_project_wrapper_empty_0/gpio_analog[15] vssa1 0.61fF
+C67 user_analog_project_wrapper_empty_0/io_in_3v3[6] vssa1 0.61fF
+C68 user_analog_project_wrapper_empty_0/io_in[6] vssa1 0.61fF
+C69 user_analog_project_wrapper_empty_0/io_out[6] vssa1 0.61fF
+C70 user_analog_project_wrapper_empty_0/io_oeb[6] vssa1 0.61fF
+C71 user_analog_project_wrapper_empty_0/io_oeb[21] vssa1 0.61fF
+C72 user_analog_project_wrapper_empty_0/io_out[21] vssa1 0.61fF
+C73 user_analog_project_wrapper_empty_0/io_in[21] vssa1 0.61fF
+C74 user_analog_project_wrapper_empty_0/io_in_3v3[21] vssa1 0.61fF
+C75 user_analog_project_wrapper_empty_0/gpio_noesd[14] vssa1 0.61fF
+C76 user_analog_project_wrapper_empty_0/gpio_analog[14] vssa1 0.61fF
+C77 user_analog_project_wrapper_empty_0/vssd2 vssa1 13.04fF
+C78 user_analog_project_wrapper_empty_0/vssd1 vssa1 13.04fF
+C79 user_analog_project_wrapper_empty_0/vdda2 vssa1 13.04fF
+C80 user_analog_project_wrapper_empty_0/vdda1 vssa1 26.08fF
+C81 user_analog_project_wrapper_empty_0/io_oeb[20] vssa1 0.61fF
+C82 user_analog_project_wrapper_empty_0/io_out[20] vssa1 0.61fF
+C83 user_analog_project_wrapper_empty_0/io_in[20] vssa1 0.61fF
+C84 user_analog_project_wrapper_empty_0/io_in_3v3[20] vssa1 0.61fF
+C85 user_analog_project_wrapper_empty_0/gpio_noesd[13] vssa1 0.61fF
+C86 user_analog_project_wrapper_empty_0/gpio_analog[13] vssa1 0.61fF
+C87 user_analog_project_wrapper_empty_0/gpio_analog[0] vssa1 0.61fF
+C88 user_analog_project_wrapper_empty_0/gpio_noesd[0] vssa1 0.61fF
+C89 user_analog_project_wrapper_empty_0/io_in_3v3[7] vssa1 0.61fF
+C90 user_analog_project_wrapper_empty_0/io_in[7] vssa1 0.61fF
+C91 user_analog_project_wrapper_empty_0/io_out[7] vssa1 0.61fF
+C92 user_analog_project_wrapper_empty_0/io_oeb[7] vssa1 0.61fF
+C93 user_analog_project_wrapper_empty_0/io_oeb[19] vssa1 0.61fF
+C94 user_analog_project_wrapper_empty_0/io_out[19] vssa1 0.61fF
+C95 user_analog_project_wrapper_empty_0/io_in[19] vssa1 0.61fF
+C96 user_analog_project_wrapper_empty_0/io_in_3v3[19] vssa1 0.61fF
+C97 user_analog_project_wrapper_empty_0/gpio_noesd[12] vssa1 0.61fF
+C98 user_analog_project_wrapper_empty_0/gpio_analog[12] vssa1 0.61fF
+C99 user_analog_project_wrapper_empty_0/gpio_analog[1] vssa1 0.61fF
+C100 user_analog_project_wrapper_empty_0/gpio_noesd[1] vssa1 0.61fF
+C101 user_analog_project_wrapper_empty_0/io_in_3v3[8] vssa1 0.61fF
+C102 user_analog_project_wrapper_empty_0/io_in[8] vssa1 0.61fF
+C103 user_analog_project_wrapper_empty_0/io_out[8] vssa1 0.61fF
+C104 user_analog_project_wrapper_empty_0/io_oeb[8] vssa1 0.61fF
+C105 user_analog_project_wrapper_empty_0/io_oeb[18] vssa1 0.61fF
+C106 user_analog_project_wrapper_empty_0/io_out[18] vssa1 0.61fF
+C107 user_analog_project_wrapper_empty_0/io_in[18] vssa1 0.61fF
+C108 user_analog_project_wrapper_empty_0/io_in_3v3[18] vssa1 0.61fF
+C109 user_analog_project_wrapper_empty_0/gpio_noesd[11] vssa1 0.61fF
+C110 user_analog_project_wrapper_empty_0/gpio_analog[11] vssa1 0.61fF
+C111 user_analog_project_wrapper_empty_0/gpio_analog[2] vssa1 0.61fF
+C112 user_analog_project_wrapper_empty_0/gpio_noesd[2] vssa1 0.61fF
+C113 user_analog_project_wrapper_empty_0/io_in_3v3[9] vssa1 0.61fF
+C114 user_analog_project_wrapper_empty_0/io_in[9] vssa1 0.61fF
+C115 user_analog_project_wrapper_empty_0/io_out[9] vssa1 0.61fF
+C116 user_analog_project_wrapper_empty_0/io_oeb[9] vssa1 0.61fF
+C117 user_analog_project_wrapper_empty_0/io_oeb[17] vssa1 0.61fF
+C118 user_analog_project_wrapper_empty_0/io_out[17] vssa1 0.61fF
+C119 user_analog_project_wrapper_empty_0/io_in[17] vssa1 0.61fF
+C120 user_analog_project_wrapper_empty_0/io_in_3v3[17] vssa1 0.61fF
+C121 user_analog_project_wrapper_empty_0/gpio_noesd[10] vssa1 0.61fF
+C122 user_analog_project_wrapper_empty_0/gpio_analog[10] vssa1 0.61fF
+C123 user_analog_project_wrapper_empty_0/gpio_analog[3] vssa1 0.61fF
+C124 user_analog_project_wrapper_empty_0/gpio_noesd[3] vssa1 0.61fF
+C125 user_analog_project_wrapper_empty_0/io_in_3v3[10] vssa1 0.61fF
+C126 user_analog_project_wrapper_empty_0/io_in[10] vssa1 0.61fF
+C127 user_analog_project_wrapper_empty_0/io_out[10] vssa1 0.61fF
+C128 user_analog_project_wrapper_empty_0/io_oeb[10] vssa1 0.61fF
+C129 user_analog_project_wrapper_empty_0/io_oeb[16] vssa1 0.61fF
+C130 user_analog_project_wrapper_empty_0/io_out[16] vssa1 0.61fF
+C131 user_analog_project_wrapper_empty_0/io_in[16] vssa1 0.61fF
+C132 user_analog_project_wrapper_empty_0/io_in_3v3[16] vssa1 0.61fF
+C133 user_analog_project_wrapper_empty_0/gpio_noesd[9] vssa1 0.61fF
+C134 user_analog_project_wrapper_empty_0/gpio_analog[9] vssa1 0.61fF
+C135 user_analog_project_wrapper_empty_0/gpio_analog[4] vssa1 0.61fF
+C136 user_analog_project_wrapper_empty_0/gpio_noesd[4] vssa1 0.61fF
+C137 user_analog_project_wrapper_empty_0/io_in_3v3[11] vssa1 0.61fF
+C138 user_analog_project_wrapper_empty_0/io_in[11] vssa1 0.61fF
+C139 user_analog_project_wrapper_empty_0/io_out[11] vssa1 0.61fF
+C140 user_analog_project_wrapper_empty_0/io_oeb[11] vssa1 0.61fF
+C141 user_analog_project_wrapper_empty_0/io_oeb[15] vssa1 0.61fF
+C142 user_analog_project_wrapper_empty_0/io_out[15] vssa1 0.61fF
+C143 user_analog_project_wrapper_empty_0/io_in[15] vssa1 0.61fF
+C144 user_analog_project_wrapper_empty_0/io_in_3v3[15] vssa1 0.61fF
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+C605 user_analog_project_wrapper_empty_0/wbs_adr_i[19] vssa1 0.63fF
+C606 user_analog_project_wrapper_empty_0/wbs_dat_o[18] vssa1 0.63fF
+C607 user_analog_project_wrapper_empty_0/wbs_dat_i[18] vssa1 0.63fF
+C608 user_analog_project_wrapper_empty_0/wbs_adr_i[18] vssa1 0.63fF
+C609 user_analog_project_wrapper_empty_0/wbs_dat_o[17] vssa1 0.63fF
+C610 user_analog_project_wrapper_empty_0/wbs_dat_i[17] vssa1 0.63fF
+C611 user_analog_project_wrapper_empty_0/wbs_adr_i[17] vssa1 0.63fF
+C612 user_analog_project_wrapper_empty_0/wbs_dat_o[16] vssa1 0.63fF
+C613 user_analog_project_wrapper_empty_0/wbs_dat_i[16] vssa1 0.63fF
+C614 user_analog_project_wrapper_empty_0/wbs_adr_i[16] vssa1 0.63fF
+C615 user_analog_project_wrapper_empty_0/wbs_dat_o[15] vssa1 0.63fF
+C616 user_analog_project_wrapper_empty_0/wbs_dat_i[15] vssa1 0.63fF
+C617 user_analog_project_wrapper_empty_0/wbs_adr_i[15] vssa1 0.63fF
+C618 user_analog_project_wrapper_empty_0/wbs_dat_o[14] vssa1 0.63fF
+C619 user_analog_project_wrapper_empty_0/wbs_dat_i[14] vssa1 0.63fF
+C620 user_analog_project_wrapper_empty_0/wbs_adr_i[14] vssa1 0.63fF
+C621 user_analog_project_wrapper_empty_0/wbs_dat_o[13] vssa1 0.63fF
+C622 user_analog_project_wrapper_empty_0/wbs_dat_i[13] vssa1 0.63fF
+C623 user_analog_project_wrapper_empty_0/wbs_adr_i[13] vssa1 0.63fF
+C624 user_analog_project_wrapper_empty_0/wbs_dat_o[12] vssa1 0.63fF
+C625 user_analog_project_wrapper_empty_0/wbs_dat_i[12] vssa1 0.63fF
+C626 user_analog_project_wrapper_empty_0/wbs_adr_i[12] vssa1 0.63fF
+C627 user_analog_project_wrapper_empty_0/wbs_dat_o[11] vssa1 0.63fF
+C628 user_analog_project_wrapper_empty_0/wbs_dat_i[11] vssa1 0.63fF
+C629 user_analog_project_wrapper_empty_0/wbs_adr_i[11] vssa1 0.63fF
+C630 user_analog_project_wrapper_empty_0/wbs_dat_o[10] vssa1 0.63fF
+C631 user_analog_project_wrapper_empty_0/wbs_dat_i[10] vssa1 0.63fF
+C632 user_analog_project_wrapper_empty_0/wbs_adr_i[10] vssa1 0.63fF
+C633 user_analog_project_wrapper_empty_0/wbs_dat_o[9] vssa1 0.63fF
+C634 user_analog_project_wrapper_empty_0/wbs_dat_i[9] vssa1 0.63fF
+C635 user_analog_project_wrapper_empty_0/wbs_adr_i[9] vssa1 0.63fF
+C636 user_analog_project_wrapper_empty_0/wbs_dat_o[8] vssa1 0.63fF
+C637 user_analog_project_wrapper_empty_0/wbs_dat_i[8] vssa1 0.63fF
+C638 user_analog_project_wrapper_empty_0/wbs_adr_i[8] vssa1 0.63fF
+C639 user_analog_project_wrapper_empty_0/wbs_dat_o[7] vssa1 0.63fF
+C640 user_analog_project_wrapper_empty_0/wbs_dat_i[7] vssa1 0.63fF
+C641 user_analog_project_wrapper_empty_0/wbs_adr_i[7] vssa1 0.63fF
+C642 user_analog_project_wrapper_empty_0/wbs_dat_o[6] vssa1 0.63fF
+C643 user_analog_project_wrapper_empty_0/wbs_dat_i[6] vssa1 0.63fF
+C644 user_analog_project_wrapper_empty_0/wbs_adr_i[6] vssa1 0.63fF
+C645 user_analog_project_wrapper_empty_0/wbs_dat_o[5] vssa1 0.63fF
+C646 user_analog_project_wrapper_empty_0/wbs_dat_i[5] vssa1 0.63fF
+C647 user_analog_project_wrapper_empty_0/wbs_adr_i[5] vssa1 0.63fF
+C648 user_analog_project_wrapper_empty_0/wbs_dat_o[4] vssa1 0.63fF
+C649 user_analog_project_wrapper_empty_0/wbs_dat_i[4] vssa1 0.63fF
+C650 user_analog_project_wrapper_empty_0/wbs_adr_i[4] vssa1 0.63fF
+C651 user_analog_project_wrapper_empty_0/wbs_sel_i[3] vssa1 0.63fF
+C652 user_analog_project_wrapper_empty_0/wbs_dat_o[3] vssa1 0.63fF
+C653 user_analog_project_wrapper_empty_0/wbs_dat_i[3] vssa1 0.63fF
+C654 user_analog_project_wrapper_empty_0/wbs_adr_i[3] vssa1 0.63fF
+C655 user_analog_project_wrapper_empty_0/wbs_sel_i[2] vssa1 0.63fF
+C656 user_analog_project_wrapper_empty_0/wbs_dat_o[2] vssa1 0.63fF
+C657 user_analog_project_wrapper_empty_0/wbs_dat_i[2] vssa1 0.63fF
+C658 user_analog_project_wrapper_empty_0/wbs_adr_i[2] vssa1 0.63fF
+C659 user_analog_project_wrapper_empty_0/wbs_sel_i[1] vssa1 0.63fF
+C660 user_analog_project_wrapper_empty_0/wbs_dat_o[1] vssa1 0.63fF
+C661 user_analog_project_wrapper_empty_0/wbs_dat_i[1] vssa1 0.63fF
+C662 user_analog_project_wrapper_empty_0/wbs_adr_i[1] vssa1 0.63fF
+C663 user_analog_project_wrapper_empty_0/wbs_sel_i[0] vssa1 0.63fF
+C664 user_analog_project_wrapper_empty_0/wbs_dat_o[0] vssa1 0.63fF
+C665 user_analog_project_wrapper_empty_0/wbs_dat_i[0] vssa1 0.63fF
+C666 user_analog_project_wrapper_empty_0/wbs_adr_i[0] vssa1 0.63fF
+C667 user_analog_project_wrapper_empty_0/wbs_we_i vssa1 0.63fF
+C668 user_analog_project_wrapper_empty_0/wbs_stb_i vssa1 0.63fF
+C669 user_analog_project_wrapper_empty_0/wbs_cyc_i vssa1 0.63fF
+C670 user_analog_project_wrapper_empty_0/wbs_ack_o vssa1 0.63fF
+C671 user_analog_project_wrapper_empty_0/wb_rst_i vssa1 0.63fF
+C672 user_analog_project_wrapper_empty_0/wb_clk_i vssa1 0.63fF
+.ends
+
diff --git a/Pos-Layout/user_analog_project_wrapper_empty.ext b/Pos-Layout/user_analog_project_wrapper_empty.ext
new file mode 100644
index 0000000..dc9c6bd
--- /dev/null
+++ b/Pos-Layout/user_analog_project_wrapper_empty.ext
@@ -0,0 +1,1408 @@
+timestamp 1647728325
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+port "io_analog[4]" 42 329294 702300 334294 704800 m5
+port "io_analog[4]" 42 318994 702300 323994 704800 m5
+port "io_analog[5]" 43 227594 702300 232594 704800 m5
+port "io_analog[5]" 43 217294 702300 222294 704800 m5
+port "io_analog[6]" 44 175894 702300 180894 704800 m5
+port "io_analog[6]" 44 165594 702300 170594 704800 m5
+port "io_analog[4]" 42 329294 702300 334294 704800 m4
+port "io_analog[4]" 42 318994 702300 323994 704800 m4
+port "io_analog[5]" 43 227594 702300 232594 704800 m4
+port "io_analog[5]" 43 217294 702300 222294 704800 m4
+port "io_analog[6]" 44 175894 702300 180894 704800 m4
+port "io_analog[6]" 44 165594 702300 170594 704800 m4
+port "io_in_3v3[0]" 81 583520 1544 584800 1656 m3
+port "io_oeb[26]" 126 -800 1544 480 1656 m3
+port "io_in[0]" 54 583520 2726 584800 2838 m3
+port "io_out[26]" 153 -800 2726 480 2838 m3
+port "io_out[0]" 135 583520 3908 584800 4020 m3
+port "io_in[26]" 72 -800 3908 480 4020 m3
+port "io_oeb[0]" 108 583520 5090 584800 5202 m3
+port "io_in_3v3[26]" 99 -800 5090 480 5202 m3
+port "io_in_3v3[1]" 92 583520 6272 584800 6384 m3
+port "io_oeb[25]" 125 -800 6272 480 6384 m3
+port "io_in[1]" 65 583520 7454 584800 7566 m3
+port "io_out[25]" 152 -800 7454 480 7566 m3
+port "io_out[1]" 146 583520 8636 584800 8748 m3
+port "io_in[25]" 71 -800 8636 480 8748 m3
+port "io_oeb[1]" 119 583520 9818 584800 9930 m3
+port "io_in_3v3[25]" 98 -800 9818 480 9930 m3
+port "io_in_3v3[2]" 100 583520 11000 584800 11112 m3
+port "io_oeb[24]" 124 -800 11000 480 11112 m3
+port "io_in[2]" 73 583520 12182 584800 12294 m3
+port "io_out[24]" 151 -800 12182 480 12294 m3
+port "io_out[2]" 154 583520 13364 584800 13476 m3
+port "io_in[24]" 70 -800 13364 480 13476 m3
+port "io_oeb[2]" 127 583520 14546 584800 14658 m3
+port "io_in_3v3[24]" 97 -800 14546 480 14658 m3
+port "io_in_3v3[3]" 101 583520 15728 584800 15840 m3
+port "gpio_noesd[17]" 27 -800 15728 480 15840 m3
+port "io_in[3]" 74 583520 16910 584800 17022 m3
+port "gpio_analog[17]" 9 -800 16910 480 17022 m3
+port "io_out[3]" 155 583520 18092 584800 18204 m3
+port "io_oeb[3]" 128 583520 19274 584800 19386 m3
+port "io_in_3v3[4]" 102 583520 20456 584800 20568 m3
+port "io_in[4]" 75 583520 21638 584800 21750 m3
+port "io_out[4]" 156 583520 22820 584800 22932 m3
+port "io_oeb[4]" 129 583520 24002 584800 24114 m3
+port "io_oeb[23]" 123 -800 32422 480 32534 m3
+port "io_out[23]" 150 -800 33604 480 33716 m3
+port "io_in[23]" 69 -800 34786 480 34898 m3
+port "io_in_3v3[23]" 96 -800 35968 480 36080 m3
+port "gpio_noesd[16]" 26 -800 37150 480 37262 m3
+port "gpio_analog[16]" 8 -800 38332 480 38444 m3
+port "io_in_3v3[5]" 103 583520 46914 584800 47026 m3
+port "io_in[5]" 76 583520 48096 584800 48208 m3
+port "io_out[5]" 157 583520 49278 584800 49390 m3
+port "io_oeb[5]" 130 583520 50460 584800 50572 m3
+port "io_oeb[22]" 122 -800 75644 480 75756 m3
+port "io_out[22]" 149 -800 76826 480 76938 m3
+port "io_in[22]" 68 -800 78008 480 78120 m3
+port "io_in_3v3[22]" 95 -800 79190 480 79302 m3
+port "gpio_noesd[15]" 25 -800 80372 480 80484 m3
+port "gpio_analog[15]" 7 -800 81554 480 81666 m3
+port "io_in_3v3[6]" 104 583520 91572 584800 91684 m3
+port "io_in[6]" 77 583520 92754 584800 92866 m3
+port "io_out[6]" 158 583520 93936 584800 94048 m3
+port "io_oeb[6]" 131 583520 95118 584800 95230 m3
+port "io_oeb[21]" 121 -800 118866 480 118978 m3
+port "io_out[21]" 148 -800 120048 480 120160 m3
+port "io_in[21]" 67 -800 121230 480 121342 m3
+port "io_in_3v3[21]" 94 -800 122412 480 122524 m3
+port "gpio_noesd[14]" 24 -800 123594 480 123706 m3
+port "gpio_analog[14]" 6 -800 124776 480 124888 m3
+port "vssa1" 554 582340 136830 584800 141630 m3
+port "vssa1" 554 582340 146830 584800 151630 m3
+port "vssd2" 557 0 162888 1660 167688 m3
+port "vssd2" 557 0 172888 1660 177688 m3
+port "vssd1" 556 582340 181430 584800 186230 m3
+port "vssd1" 556 582340 191430 584800 196230 m3
+port "vdda2" 553 0 204888 1660 209688 m3
+port "vdda2" 553 0 214888 1660 219688 m3
+port "vdda1" 552 582340 225230 584800 230030 m3
+port "vdda1" 552 582340 235230 584800 240030 m3
+port "io_oeb[20]" 120 -800 246488 480 246600 m3
+port "io_out[20]" 147 -800 247670 480 247782 m3
+port "io_in[20]" 66 -800 248852 480 248964 m3
+port "io_in_3v3[20]" 93 -800 250034 480 250146 m3
+port "gpio_noesd[13]" 23 -800 251216 480 251328 m3
+port "gpio_analog[13]" 5 -800 252398 480 252510 m3
+port "gpio_analog[0]" 1 583520 269230 584800 269342 m3
+port "gpio_noesd[0]" 19 583520 270412 584800 270524 m3
+port "io_in_3v3[7]" 105 583520 271594 584800 271706 m3
+port "io_in[7]" 78 583520 272776 584800 272888 m3
+port "io_out[7]" 159 583520 273958 584800 274070 m3
+port "io_oeb[7]" 132 583520 275140 584800 275252 m3
+port "io_oeb[19]" 118 -800 289510 480 289622 m3
+port "io_out[19]" 145 -800 290692 480 290804 m3
+port "io_in[19]" 64 -800 291874 480 291986 m3
+port "io_in_3v3[19]" 91 -800 293056 480 293168 m3
+port "gpio_noesd[12]" 22 -800 294238 480 294350 m3
+port "gpio_analog[12]" 4 -800 295420 480 295532 m3
+port "gpio_analog[1]" 10 583520 313652 584800 313764 m3
+port "gpio_noesd[1]" 28 583520 314834 584800 314946 m3
+port "io_in_3v3[8]" 106 583520 316016 584800 316128 m3
+port "io_in[8]" 79 583520 317198 584800 317310 m3
+port "io_out[8]" 160 583520 318380 584800 318492 m3
+port "io_oeb[8]" 133 583520 319562 584800 319674 m3
+port "io_oeb[18]" 117 -800 332732 480 332844 m3
+port "io_out[18]" 144 -800 333914 480 334026 m3
+port "io_in[18]" 63 -800 335096 480 335208 m3
+port "io_in_3v3[18]" 90 -800 336278 480 336390 m3
+port "gpio_noesd[11]" 21 -800 337460 480 337572 m3
+port "gpio_analog[11]" 3 -800 338642 480 338754 m3
+port "gpio_analog[2]" 11 583520 358874 584800 358986 m3
+port "gpio_noesd[2]" 29 583520 360056 584800 360168 m3
+port "io_in_3v3[9]" 107 583520 361238 584800 361350 m3
+port "io_in[9]" 80 583520 362420 584800 362532 m3
+port "io_out[9]" 161 583520 363602 584800 363714 m3
+port "io_oeb[9]" 134 583520 364784 584800 364896 m3
+port "io_oeb[17]" 116 -800 375954 480 376066 m3
+port "io_out[17]" 143 -800 377136 480 377248 m3
+port "io_in[17]" 62 -800 378318 480 378430 m3
+port "io_in_3v3[17]" 89 -800 379500 480 379612 m3
+port "gpio_noesd[10]" 20 -800 380682 480 380794 m3
+port "gpio_analog[10]" 2 -800 381864 480 381976 m3
+port "gpio_analog[3]" 12 583520 405296 584800 405408 m3
+port "gpio_noesd[3]" 30 583520 406478 584800 406590 m3
+port "io_in_3v3[10]" 82 583520 407660 584800 407772 m3
+port "io_in[10]" 55 583520 408842 584800 408954 m3
+port "io_out[10]" 136 583520 410024 584800 410136 m3
+port "io_oeb[10]" 109 583520 411206 584800 411318 m3
+port "io_oeb[16]" 115 -800 419176 480 419288 m3
+port "io_out[16]" 142 -800 420358 480 420470 m3
+port "io_in[16]" 61 -800 421540 480 421652 m3
+port "io_in_3v3[16]" 88 -800 422722 480 422834 m3
+port "gpio_noesd[9]" 36 -800 423904 480 424016 m3
+port "gpio_analog[9]" 18 -800 425086 480 425198 m3
+port "gpio_analog[4]" 13 583520 449718 584800 449830 m3
+port "gpio_noesd[4]" 31 583520 450900 584800 451012 m3
+port "io_in_3v3[11]" 83 583520 452082 584800 452194 m3
+port "io_in[11]" 56 583520 453264 584800 453376 m3
+port "io_out[11]" 137 583520 454446 584800 454558 m3
+port "io_oeb[11]" 110 583520 455628 584800 455740 m3
+port "io_oeb[15]" 114 -800 462398 480 462510 m3
+port "io_out[15]" 141 -800 463580 480 463692 m3
+port "io_in[15]" 60 -800 464762 480 464874 m3
+port "io_in_3v3[15]" 87 -800 465944 480 466056 m3
+port "gpio_noesd[8]" 35 -800 467126 480 467238 m3
+port "gpio_analog[8]" 17 -800 468308 480 468420 m3
+port "gpio_analog[5]" 14 583520 494140 584800 494252 m3
+port "gpio_noesd[5]" 32 583520 495322 584800 495434 m3
+port "io_in_3v3[12]" 84 583520 496504 584800 496616 m3
+port "io_in[12]" 57 583520 497686 584800 497798 m3
+port "io_out[12]" 138 583520 498868 584800 498980 m3
+port "io_oeb[12]" 111 583520 500050 584800 500162 m3
+port "io_oeb[14]" 113 -800 505620 480 505732 m3
+port "io_out[14]" 140 -800 506802 480 506914 m3
+port "io_in[14]" 59 -800 507984 480 508096 m3
+port "io_in_3v3[14]" 86 -800 509166 480 509278 m3
+port "gpio_noesd[7]" 34 -800 510348 480 510460 m3
+port "gpio_analog[7]" 16 -800 511530 480 511642 m3
+port "vdda1" 552 582340 540562 584800 545362 m3
+port "vdda1" 552 582340 550562 584800 555362 m3
+port "vssa2" 555 0 549442 1660 554242 m3
+port "vssa2" 555 0 559442 1660 564242 m3
+port "gpio_analog[6]" 15 583520 583562 584800 583674 m3
+port "gpio_noesd[6]" 33 583520 584744 584800 584856 m3
+port "io_in_3v3[13]" 85 583520 585926 584800 586038 m3
+port "io_in[13]" 58 583520 587108 584800 587220 m3
+port "io_out[13]" 139 583520 588290 584800 588402 m3
+port "io_oeb[13]" 112 583520 589472 584800 589584 m3
+port "vccd1" 550 582340 629784 584800 634584 m3
+port "vccd2" 551 0 633842 1660 638642 m3
+port "vccd1" 550 582340 639784 584800 644584 m3
+port "vccd2" 551 0 643842 1660 648642 m3
+port "io_analog[0]" 37 582300 677984 584800 682984 m3
+port "io_analog[10]" 38 0 680242 1700 685242 m3
+port "io_analog[1]" 39 566594 702300 571594 704800 m3
+port "vssa1" 554 520594 702340 525394 704800 m3
+port "vssa1" 554 510594 702340 515394 704800 m3
+port "io_analog[2]" 40 465394 702300 470394 704800 m3
+port "io_analog[3]" 41 413394 702300 418394 704800 m3
+port "io_analog[4]" 42 329294 702300 334294 704800 m3
+port "io_clamp_high[0]" 48 326794 702300 328994 704800 m3
+port "io_clamp_low[0]" 51 324294 702300 326494 704800 m3
+port "io_analog[4]" 42 318994 702300 323994 704800 m3
+port "io_analog[5]" 43 227594 702300 232594 704800 m3
+port "io_clamp_high[1]" 49 225094 702300 227294 704800 m3
+port "io_clamp_low[1]" 52 222594 702300 224794 704800 m3
+port "io_analog[5]" 43 217294 702300 222294 704800 m3
+port "io_analog[6]" 44 175894 702300 180894 704800 m3
+port "io_clamp_high[2]" 50 173394 702300 175594 704800 m3
+port "io_clamp_low[2]" 53 170894 702300 173094 704800 m3
+port "io_analog[6]" 44 165594 702300 170594 704800 m3
+port "io_analog[7]" 45 120194 702300 125194 704800 m3
+port "io_analog[8]" 46 68194 702300 73194 704800 m3
+port "io_analog[9]" 47 16194 702300 21194 704800 m3
+port "user_irq[2]" 549 583250 -800 583362 480 m2
+port "user_irq[1]" 548 582068 -800 582180 480 m2
+port "user_irq[0]" 547 580886 -800 580998 480 m2
+port "user_clock2" 546 579704 -800 579816 480 m2
+port "la_oenb[127]" 448 578522 -800 578634 480 m2
+port "la_data_out[127]" 320 577340 -800 577452 480 m2
+port "la_data_in[127]" 192 576158 -800 576270 480 m2
+port "la_oenb[126]" 447 574976 -800 575088 480 m2
+port "la_data_out[126]" 319 573794 -800 573906 480 m2
+port "la_data_in[126]" 191 572612 -800 572724 480 m2
+port "la_oenb[125]" 446 571430 -800 571542 480 m2
+port "la_data_out[125]" 318 570248 -800 570360 480 m2
+port "la_data_in[125]" 190 569066 -800 569178 480 m2
+port "la_oenb[124]" 445 567884 -800 567996 480 m2
+port "la_data_out[124]" 317 566702 -800 566814 480 m2
+port "la_data_in[124]" 189 565520 -800 565632 480 m2
+port "la_oenb[123]" 444 564338 -800 564450 480 m2
+port "la_data_out[123]" 316 563156 -800 563268 480 m2
+port "la_data_in[123]" 188 561974 -800 562086 480 m2
+port "la_oenb[122]" 443 560792 -800 560904 480 m2
+port "la_data_out[122]" 315 559610 -800 559722 480 m2
+port "la_data_in[122]" 187 558428 -800 558540 480 m2
+port "la_oenb[121]" 442 557246 -800 557358 480 m2
+port "la_data_out[121]" 314 556064 -800 556176 480 m2
+port "la_data_in[121]" 186 554882 -800 554994 480 m2
+port "la_oenb[120]" 441 553700 -800 553812 480 m2
+port "la_data_out[120]" 313 552518 -800 552630 480 m2
+port "la_data_in[120]" 185 551336 -800 551448 480 m2
+port "la_oenb[119]" 439 550154 -800 550266 480 m2
+port "la_data_out[119]" 311 548972 -800 549084 480 m2
+port "la_data_in[119]" 183 547790 -800 547902 480 m2
+port "la_oenb[118]" 438 546608 -800 546720 480 m2
+port "la_data_out[118]" 310 545426 -800 545538 480 m2
+port "la_data_in[118]" 182 544244 -800 544356 480 m2
+port "la_oenb[117]" 437 543062 -800 543174 480 m2
+port "la_data_out[117]" 309 541880 -800 541992 480 m2
+port "la_data_in[117]" 181 540698 -800 540810 480 m2
+port "la_oenb[116]" 436 539516 -800 539628 480 m2
+port "la_data_out[116]" 308 538334 -800 538446 480 m2
+port "la_data_in[116]" 180 537152 -800 537264 480 m2
+port "la_oenb[115]" 435 535970 -800 536082 480 m2
+port "la_data_out[115]" 307 534788 -800 534900 480 m2
+port "la_data_in[115]" 179 533606 -800 533718 480 m2
+port "la_oenb[114]" 434 532424 -800 532536 480 m2
+port "la_data_out[114]" 306 531242 -800 531354 480 m2
+port "la_data_in[114]" 178 530060 -800 530172 480 m2
+port "la_oenb[113]" 433 528878 -800 528990 480 m2
+port "la_data_out[113]" 305 527696 -800 527808 480 m2
+port "la_data_in[113]" 177 526514 -800 526626 480 m2
+port "la_oenb[112]" 432 525332 -800 525444 480 m2
+port "la_data_out[112]" 304 524150 -800 524262 480 m2
+port "la_data_in[112]" 176 522968 -800 523080 480 m2
+port "la_oenb[111]" 431 521786 -800 521898 480 m2
+port "la_data_out[111]" 303 520604 -800 520716 480 m2
+port "la_data_in[111]" 175 519422 -800 519534 480 m2
+port "la_oenb[110]" 430 518240 -800 518352 480 m2
+port "la_data_out[110]" 302 517058 -800 517170 480 m2
+port "la_data_in[110]" 174 515876 -800 515988 480 m2
+port "la_oenb[109]" 428 514694 -800 514806 480 m2
+port "la_data_out[109]" 300 513512 -800 513624 480 m2
+port "la_data_in[109]" 172 512330 -800 512442 480 m2
+port "la_oenb[108]" 427 511148 -800 511260 480 m2
+port "la_data_out[108]" 299 509966 -800 510078 480 m2
+port "la_data_in[108]" 171 508784 -800 508896 480 m2
+port "la_oenb[107]" 426 507602 -800 507714 480 m2
+port "la_data_out[107]" 298 506420 -800 506532 480 m2
+port "la_data_in[107]" 170 505238 -800 505350 480 m2
+port "la_oenb[106]" 425 504056 -800 504168 480 m2
+port "la_data_out[106]" 297 502874 -800 502986 480 m2
+port "la_data_in[106]" 169 501692 -800 501804 480 m2
+port "la_oenb[105]" 424 500510 -800 500622 480 m2
+port "la_data_out[105]" 296 499328 -800 499440 480 m2
+port "la_data_in[105]" 168 498146 -800 498258 480 m2
+port "la_oenb[104]" 423 496964 -800 497076 480 m2
+port "la_data_out[104]" 295 495782 -800 495894 480 m2
+port "la_data_in[104]" 167 494600 -800 494712 480 m2
+port "la_oenb[103]" 422 493418 -800 493530 480 m2
+port "la_data_out[103]" 294 492236 -800 492348 480 m2
+port "la_data_in[103]" 166 491054 -800 491166 480 m2
+port "la_oenb[102]" 421 489872 -800 489984 480 m2
+port "la_data_out[102]" 293 488690 -800 488802 480 m2
+port "la_data_in[102]" 165 487508 -800 487620 480 m2
+port "la_oenb[101]" 420 486326 -800 486438 480 m2
+port "la_data_out[101]" 292 485144 -800 485256 480 m2
+port "la_data_in[101]" 164 483962 -800 484074 480 m2
+port "la_oenb[100]" 419 482780 -800 482892 480 m2
+port "la_data_out[100]" 291 481598 -800 481710 480 m2
+port "la_data_in[100]" 163 480416 -800 480528 480 m2
+port "la_oenb[99]" 544 479234 -800 479346 480 m2
+port "la_data_out[99]" 416 478052 -800 478164 480 m2
+port "la_data_in[99]" 288 476870 -800 476982 480 m2
+port "la_oenb[98]" 543 475688 -800 475800 480 m2
+port "la_data_out[98]" 415 474506 -800 474618 480 m2
+port "la_data_in[98]" 287 473324 -800 473436 480 m2
+port "la_oenb[97]" 542 472142 -800 472254 480 m2
+port "la_data_out[97]" 414 470960 -800 471072 480 m2
+port "la_data_in[97]" 286 469778 -800 469890 480 m2
+port "la_oenb[96]" 541 468596 -800 468708 480 m2
+port "la_data_out[96]" 413 467414 -800 467526 480 m2
+port "la_data_in[96]" 285 466232 -800 466344 480 m2
+port "la_oenb[95]" 540 465050 -800 465162 480 m2
+port "la_data_out[95]" 412 463868 -800 463980 480 m2
+port "la_data_in[95]" 284 462686 -800 462798 480 m2
+port "la_oenb[94]" 539 461504 -800 461616 480 m2
+port "la_data_out[94]" 411 460322 -800 460434 480 m2
+port "la_data_in[94]" 283 459140 -800 459252 480 m2
+port "la_oenb[93]" 538 457958 -800 458070 480 m2
+port "la_data_out[93]" 410 456776 -800 456888 480 m2
+port "la_data_in[93]" 282 455594 -800 455706 480 m2
+port "la_oenb[92]" 537 454412 -800 454524 480 m2
+port "la_data_out[92]" 409 453230 -800 453342 480 m2
+port "la_data_in[92]" 281 452048 -800 452160 480 m2
+port "la_oenb[91]" 536 450866 -800 450978 480 m2
+port "la_data_out[91]" 408 449684 -800 449796 480 m2
+port "la_data_in[91]" 280 448502 -800 448614 480 m2
+port "la_oenb[90]" 535 447320 -800 447432 480 m2
+port "la_data_out[90]" 407 446138 -800 446250 480 m2
+port "la_data_in[90]" 279 444956 -800 445068 480 m2
+port "la_oenb[89]" 533 443774 -800 443886 480 m2
+port "la_data_out[89]" 405 442592 -800 442704 480 m2
+port "la_data_in[89]" 277 441410 -800 441522 480 m2
+port "la_oenb[88]" 532 440228 -800 440340 480 m2
+port "la_data_out[88]" 404 439046 -800 439158 480 m2
+port "la_data_in[88]" 276 437864 -800 437976 480 m2
+port "la_oenb[87]" 531 436682 -800 436794 480 m2
+port "la_data_out[87]" 403 435500 -800 435612 480 m2
+port "la_data_in[87]" 275 434318 -800 434430 480 m2
+port "la_oenb[86]" 530 433136 -800 433248 480 m2
+port "la_data_out[86]" 402 431954 -800 432066 480 m2
+port "la_data_in[86]" 274 430772 -800 430884 480 m2
+port "la_oenb[85]" 529 429590 -800 429702 480 m2
+port "la_data_out[85]" 401 428408 -800 428520 480 m2
+port "la_data_in[85]" 273 427226 -800 427338 480 m2
+port "la_oenb[84]" 528 426044 -800 426156 480 m2
+port "la_data_out[84]" 400 424862 -800 424974 480 m2
+port "la_data_in[84]" 272 423680 -800 423792 480 m2
+port "la_oenb[83]" 527 422498 -800 422610 480 m2
+port "la_data_out[83]" 399 421316 -800 421428 480 m2
+port "la_data_in[83]" 271 420134 -800 420246 480 m2
+port "la_oenb[82]" 526 418952 -800 419064 480 m2
+port "la_data_out[82]" 398 417770 -800 417882 480 m2
+port "la_data_in[82]" 270 416588 -800 416700 480 m2
+port "la_oenb[81]" 525 415406 -800 415518 480 m2
+port "la_data_out[81]" 397 414224 -800 414336 480 m2
+port "la_data_in[81]" 269 413042 -800 413154 480 m2
+port "la_oenb[80]" 524 411860 -800 411972 480 m2
+port "la_data_out[80]" 396 410678 -800 410790 480 m2
+port "la_data_in[80]" 268 409496 -800 409608 480 m2
+port "la_oenb[79]" 522 408314 -800 408426 480 m2
+port "la_data_out[79]" 394 407132 -800 407244 480 m2
+port "la_data_in[79]" 266 405950 -800 406062 480 m2
+port "la_oenb[78]" 521 404768 -800 404880 480 m2
+port "la_data_out[78]" 393 403586 -800 403698 480 m2
+port "la_data_in[78]" 265 402404 -800 402516 480 m2
+port "la_oenb[77]" 520 401222 -800 401334 480 m2
+port "la_data_out[77]" 392 400040 -800 400152 480 m2
+port "la_data_in[77]" 264 398858 -800 398970 480 m2
+port "la_oenb[76]" 519 397676 -800 397788 480 m2
+port "la_data_out[76]" 391 396494 -800 396606 480 m2
+port "la_data_in[76]" 263 395312 -800 395424 480 m2
+port "la_oenb[75]" 518 394130 -800 394242 480 m2
+port "la_data_out[75]" 390 392948 -800 393060 480 m2
+port "la_data_in[75]" 262 391766 -800 391878 480 m2
+port "la_oenb[74]" 517 390584 -800 390696 480 m2
+port "la_data_out[74]" 389 389402 -800 389514 480 m2
+port "la_data_in[74]" 261 388220 -800 388332 480 m2
+port "la_oenb[73]" 516 387038 -800 387150 480 m2
+port "la_data_out[73]" 388 385856 -800 385968 480 m2
+port "la_data_in[73]" 260 384674 -800 384786 480 m2
+port "la_oenb[72]" 515 383492 -800 383604 480 m2
+port "la_data_out[72]" 387 382310 -800 382422 480 m2
+port "la_data_in[72]" 259 381128 -800 381240 480 m2
+port "la_oenb[71]" 514 379946 -800 380058 480 m2
+port "la_data_out[71]" 386 378764 -800 378876 480 m2
+port "la_data_in[71]" 258 377582 -800 377694 480 m2
+port "la_oenb[70]" 513 376400 -800 376512 480 m2
+port "la_data_out[70]" 385 375218 -800 375330 480 m2
+port "la_data_in[70]" 257 374036 -800 374148 480 m2
+port "la_oenb[69]" 511 372854 -800 372966 480 m2
+port "la_data_out[69]" 383 371672 -800 371784 480 m2
+port "la_data_in[69]" 255 370490 -800 370602 480 m2
+port "la_oenb[68]" 510 369308 -800 369420 480 m2
+port "la_data_out[68]" 382 368126 -800 368238 480 m2
+port "la_data_in[68]" 254 366944 -800 367056 480 m2
+port "la_oenb[67]" 509 365762 -800 365874 480 m2
+port "la_data_out[67]" 381 364580 -800 364692 480 m2
+port "la_data_in[67]" 253 363398 -800 363510 480 m2
+port "la_oenb[66]" 508 362216 -800 362328 480 m2
+port "la_data_out[66]" 380 361034 -800 361146 480 m2
+port "la_data_in[66]" 252 359852 -800 359964 480 m2
+port "la_oenb[65]" 507 358670 -800 358782 480 m2
+port "la_data_out[65]" 379 357488 -800 357600 480 m2
+port "la_data_in[65]" 251 356306 -800 356418 480 m2
+port "la_oenb[64]" 506 355124 -800 355236 480 m2
+port "la_data_out[64]" 378 353942 -800 354054 480 m2
+port "la_data_in[64]" 250 352760 -800 352872 480 m2
+port "la_oenb[63]" 505 351578 -800 351690 480 m2
+port "la_data_out[63]" 377 350396 -800 350508 480 m2
+port "la_data_in[63]" 249 349214 -800 349326 480 m2
+port "la_oenb[62]" 504 348032 -800 348144 480 m2
+port "la_data_out[62]" 376 346850 -800 346962 480 m2
+port "la_data_in[62]" 248 345668 -800 345780 480 m2
+port "la_oenb[61]" 503 344486 -800 344598 480 m2
+port "la_data_out[61]" 375 343304 -800 343416 480 m2
+port "la_data_in[61]" 247 342122 -800 342234 480 m2
+port "la_oenb[60]" 502 340940 -800 341052 480 m2
+port "la_data_out[60]" 374 339758 -800 339870 480 m2
+port "la_data_in[60]" 246 338576 -800 338688 480 m2
+port "la_oenb[59]" 500 337394 -800 337506 480 m2
+port "la_data_out[59]" 372 336212 -800 336324 480 m2
+port "la_data_in[59]" 244 335030 -800 335142 480 m2
+port "la_oenb[58]" 499 333848 -800 333960 480 m2
+port "la_data_out[58]" 371 332666 -800 332778 480 m2
+port "la_data_in[58]" 243 331484 -800 331596 480 m2
+port "la_oenb[57]" 498 330302 -800 330414 480 m2
+port "la_data_out[57]" 370 329120 -800 329232 480 m2
+port "la_data_in[57]" 242 327938 -800 328050 480 m2
+port "la_oenb[56]" 497 326756 -800 326868 480 m2
+port "la_data_out[56]" 369 325574 -800 325686 480 m2
+port "la_data_in[56]" 241 324392 -800 324504 480 m2
+port "la_oenb[55]" 496 323210 -800 323322 480 m2
+port "la_data_out[55]" 368 322028 -800 322140 480 m2
+port "la_data_in[55]" 240 320846 -800 320958 480 m2
+port "la_oenb[54]" 495 319664 -800 319776 480 m2
+port "la_data_out[54]" 367 318482 -800 318594 480 m2
+port "la_data_in[54]" 239 317300 -800 317412 480 m2
+port "la_oenb[53]" 494 316118 -800 316230 480 m2
+port "la_data_out[53]" 366 314936 -800 315048 480 m2
+port "la_data_in[53]" 238 313754 -800 313866 480 m2
+port "la_oenb[52]" 493 312572 -800 312684 480 m2
+port "la_data_out[52]" 365 311390 -800 311502 480 m2
+port "la_data_in[52]" 237 310208 -800 310320 480 m2
+port "la_oenb[51]" 492 309026 -800 309138 480 m2
+port "la_data_out[51]" 364 307844 -800 307956 480 m2
+port "la_data_in[51]" 236 306662 -800 306774 480 m2
+port "la_oenb[50]" 491 305480 -800 305592 480 m2
+port "la_data_out[50]" 363 304298 -800 304410 480 m2
+port "la_data_in[50]" 235 303116 -800 303228 480 m2
+port "la_oenb[49]" 489 301934 -800 302046 480 m2
+port "la_data_out[49]" 361 300752 -800 300864 480 m2
+port "la_data_in[49]" 233 299570 -800 299682 480 m2
+port "la_oenb[48]" 488 298388 -800 298500 480 m2
+port "la_data_out[48]" 360 297206 -800 297318 480 m2
+port "la_data_in[48]" 232 296024 -800 296136 480 m2
+port "la_oenb[47]" 487 294842 -800 294954 480 m2
+port "la_data_out[47]" 359 293660 -800 293772 480 m2
+port "la_data_in[47]" 231 292478 -800 292590 480 m2
+port "la_oenb[46]" 486 291296 -800 291408 480 m2
+port "la_data_out[46]" 358 290114 -800 290226 480 m2
+port "la_data_in[46]" 230 288932 -800 289044 480 m2
+port "la_oenb[45]" 485 287750 -800 287862 480 m2
+port "la_data_out[45]" 357 286568 -800 286680 480 m2
+port "la_data_in[45]" 229 285386 -800 285498 480 m2
+port "la_oenb[44]" 484 284204 -800 284316 480 m2
+port "la_data_out[44]" 356 283022 -800 283134 480 m2
+port "la_data_in[44]" 228 281840 -800 281952 480 m2
+port "la_oenb[43]" 483 280658 -800 280770 480 m2
+port "la_data_out[43]" 355 279476 -800 279588 480 m2
+port "la_data_in[43]" 227 278294 -800 278406 480 m2
+port "la_oenb[42]" 482 277112 -800 277224 480 m2
+port "la_data_out[42]" 354 275930 -800 276042 480 m2
+port "la_data_in[42]" 226 274748 -800 274860 480 m2
+port "la_oenb[41]" 481 273566 -800 273678 480 m2
+port "la_data_out[41]" 353 272384 -800 272496 480 m2
+port "la_data_in[41]" 225 271202 -800 271314 480 m2
+port "la_oenb[40]" 480 270020 -800 270132 480 m2
+port "la_data_out[40]" 352 268838 -800 268950 480 m2
+port "la_data_in[40]" 224 267656 -800 267768 480 m2
+port "la_oenb[39]" 478 266474 -800 266586 480 m2
+port "la_data_out[39]" 350 265292 -800 265404 480 m2
+port "la_data_in[39]" 222 264110 -800 264222 480 m2
+port "la_oenb[38]" 477 262928 -800 263040 480 m2
+port "la_data_out[38]" 349 261746 -800 261858 480 m2
+port "la_data_in[38]" 221 260564 -800 260676 480 m2
+port "la_oenb[37]" 476 259382 -800 259494 480 m2
+port "la_data_out[37]" 348 258200 -800 258312 480 m2
+port "la_data_in[37]" 220 257018 -800 257130 480 m2
+port "la_oenb[36]" 475 255836 -800 255948 480 m2
+port "la_data_out[36]" 347 254654 -800 254766 480 m2
+port "la_data_in[36]" 219 253472 -800 253584 480 m2
+port "la_oenb[35]" 474 252290 -800 252402 480 m2
+port "la_data_out[35]" 346 251108 -800 251220 480 m2
+port "la_data_in[35]" 218 249926 -800 250038 480 m2
+port "la_oenb[34]" 473 248744 -800 248856 480 m2
+port "la_data_out[34]" 345 247562 -800 247674 480 m2
+port "la_data_in[34]" 217 246380 -800 246492 480 m2
+port "la_oenb[33]" 472 245198 -800 245310 480 m2
+port "la_data_out[33]" 344 244016 -800 244128 480 m2
+port "la_data_in[33]" 216 242834 -800 242946 480 m2
+port "la_oenb[32]" 471 241652 -800 241764 480 m2
+port "la_data_out[32]" 343 240470 -800 240582 480 m2
+port "la_data_in[32]" 215 239288 -800 239400 480 m2
+port "la_oenb[31]" 470 238106 -800 238218 480 m2
+port "la_data_out[31]" 342 236924 -800 237036 480 m2
+port "la_data_in[31]" 214 235742 -800 235854 480 m2
+port "la_oenb[30]" 469 234560 -800 234672 480 m2
+port "la_data_out[30]" 341 233378 -800 233490 480 m2
+port "la_data_in[30]" 213 232196 -800 232308 480 m2
+port "la_oenb[29]" 467 231014 -800 231126 480 m2
+port "la_data_out[29]" 339 229832 -800 229944 480 m2
+port "la_data_in[29]" 211 228650 -800 228762 480 m2
+port "la_oenb[28]" 466 227468 -800 227580 480 m2
+port "la_data_out[28]" 338 226286 -800 226398 480 m2
+port "la_data_in[28]" 210 225104 -800 225216 480 m2
+port "la_oenb[27]" 465 223922 -800 224034 480 m2
+port "la_data_out[27]" 337 222740 -800 222852 480 m2
+port "la_data_in[27]" 209 221558 -800 221670 480 m2
+port "la_oenb[26]" 464 220376 -800 220488 480 m2
+port "la_data_out[26]" 336 219194 -800 219306 480 m2
+port "la_data_in[26]" 208 218012 -800 218124 480 m2
+port "la_oenb[25]" 463 216830 -800 216942 480 m2
+port "la_data_out[25]" 335 215648 -800 215760 480 m2
+port "la_data_in[25]" 207 214466 -800 214578 480 m2
+port "la_oenb[24]" 462 213284 -800 213396 480 m2
+port "la_data_out[24]" 334 212102 -800 212214 480 m2
+port "la_data_in[24]" 206 210920 -800 211032 480 m2
+port "la_oenb[23]" 461 209738 -800 209850 480 m2
+port "la_data_out[23]" 333 208556 -800 208668 480 m2
+port "la_data_in[23]" 205 207374 -800 207486 480 m2
+port "la_oenb[22]" 460 206192 -800 206304 480 m2
+port "la_data_out[22]" 332 205010 -800 205122 480 m2
+port "la_data_in[22]" 204 203828 -800 203940 480 m2
+port "la_oenb[21]" 459 202646 -800 202758 480 m2
+port "la_data_out[21]" 331 201464 -800 201576 480 m2
+port "la_data_in[21]" 203 200282 -800 200394 480 m2
+port "la_oenb[20]" 458 199100 -800 199212 480 m2
+port "la_data_out[20]" 330 197918 -800 198030 480 m2
+port "la_data_in[20]" 202 196736 -800 196848 480 m2
+port "la_oenb[19]" 456 195554 -800 195666 480 m2
+port "la_data_out[19]" 328 194372 -800 194484 480 m2
+port "la_data_in[19]" 200 193190 -800 193302 480 m2
+port "la_oenb[18]" 455 192008 -800 192120 480 m2
+port "la_data_out[18]" 327 190826 -800 190938 480 m2
+port "la_data_in[18]" 199 189644 -800 189756 480 m2
+port "la_oenb[17]" 454 188462 -800 188574 480 m2
+port "la_data_out[17]" 326 187280 -800 187392 480 m2
+port "la_data_in[17]" 198 186098 -800 186210 480 m2
+port "la_oenb[16]" 453 184916 -800 185028 480 m2
+port "la_data_out[16]" 325 183734 -800 183846 480 m2
+port "la_data_in[16]" 197 182552 -800 182664 480 m2
+port "la_oenb[15]" 452 181370 -800 181482 480 m2
+port "la_data_out[15]" 324 180188 -800 180300 480 m2
+port "la_data_in[15]" 196 179006 -800 179118 480 m2
+port "la_oenb[14]" 451 177824 -800 177936 480 m2
+port "la_data_out[14]" 323 176642 -800 176754 480 m2
+port "la_data_in[14]" 195 175460 -800 175572 480 m2
+port "la_oenb[13]" 450 174278 -800 174390 480 m2
+port "la_data_out[13]" 322 173096 -800 173208 480 m2
+port "la_data_in[13]" 194 171914 -800 172026 480 m2
+port "la_oenb[12]" 449 170732 -800 170844 480 m2
+port "la_data_out[12]" 321 169550 -800 169662 480 m2
+port "la_data_in[12]" 193 168368 -800 168480 480 m2
+port "la_oenb[11]" 440 167186 -800 167298 480 m2
+port "la_data_out[11]" 312 166004 -800 166116 480 m2
+port "la_data_in[11]" 184 164822 -800 164934 480 m2
+port "la_oenb[10]" 429 163640 -800 163752 480 m2
+port "la_data_out[10]" 301 162458 -800 162570 480 m2
+port "la_data_in[10]" 173 161276 -800 161388 480 m2
+port "la_oenb[9]" 545 160094 -800 160206 480 m2
+port "la_data_out[9]" 417 158912 -800 159024 480 m2
+port "la_data_in[9]" 289 157730 -800 157842 480 m2
+port "la_oenb[8]" 534 156548 -800 156660 480 m2
+port "la_data_out[8]" 406 155366 -800 155478 480 m2
+port "la_data_in[8]" 278 154184 -800 154296 480 m2
+port "la_oenb[7]" 523 153002 -800 153114 480 m2
+port "la_data_out[7]" 395 151820 -800 151932 480 m2
+port "la_data_in[7]" 267 150638 -800 150750 480 m2
+port "la_oenb[6]" 512 149456 -800 149568 480 m2
+port "la_data_out[6]" 384 148274 -800 148386 480 m2
+port "la_data_in[6]" 256 147092 -800 147204 480 m2
+port "la_oenb[5]" 501 145910 -800 146022 480 m2
+port "la_data_out[5]" 373 144728 -800 144840 480 m2
+port "la_data_in[5]" 245 143546 -800 143658 480 m2
+port "la_oenb[4]" 490 142364 -800 142476 480 m2
+port "la_data_out[4]" 362 141182 -800 141294 480 m2
+port "la_data_in[4]" 234 140000 -800 140112 480 m2
+port "la_oenb[3]" 479 138818 -800 138930 480 m2
+port "la_data_out[3]" 351 137636 -800 137748 480 m2
+port "la_data_in[3]" 223 136454 -800 136566 480 m2
+port "la_oenb[2]" 468 135272 -800 135384 480 m2
+port "la_data_out[2]" 340 134090 -800 134202 480 m2
+port "la_data_in[2]" 212 132908 -800 133020 480 m2
+port "la_oenb[1]" 457 131726 -800 131838 480 m2
+port "la_data_out[1]" 329 130544 -800 130656 480 m2
+port "la_data_in[1]" 201 129362 -800 129474 480 m2
+port "la_oenb[0]" 418 128180 -800 128292 480 m2
+port "la_data_out[0]" 290 126998 -800 127110 480 m2
+port "la_data_in[0]" 162 125816 -800 125928 480 m2
+port "wbs_dat_o[31]" 650 124634 -800 124746 480 m2
+port "wbs_dat_i[31]" 618 123452 -800 123564 480 m2
+port "wbs_adr_i[31]" 585 122270 -800 122382 480 m2
+port "wbs_dat_o[30]" 649 121088 -800 121200 480 m2
+port "wbs_dat_i[30]" 617 119906 -800 120018 480 m2
+port "wbs_adr_i[30]" 584 118724 -800 118836 480 m2
+port "wbs_dat_o[29]" 647 117542 -800 117654 480 m2
+port "wbs_dat_i[29]" 615 116360 -800 116472 480 m2
+port "wbs_adr_i[29]" 582 115178 -800 115290 480 m2
+port "wbs_dat_o[28]" 646 113996 -800 114108 480 m2
+port "wbs_dat_i[28]" 614 112814 -800 112926 480 m2
+port "wbs_adr_i[28]" 581 111632 -800 111744 480 m2
+port "wbs_dat_o[27]" 645 110450 -800 110562 480 m2
+port "wbs_dat_i[27]" 613 109268 -800 109380 480 m2
+port "wbs_adr_i[27]" 580 108086 -800 108198 480 m2
+port "wbs_dat_o[26]" 644 106904 -800 107016 480 m2
+port "wbs_dat_i[26]" 612 105722 -800 105834 480 m2
+port "wbs_adr_i[26]" 579 104540 -800 104652 480 m2
+port "wbs_dat_o[25]" 643 103358 -800 103470 480 m2
+port "wbs_dat_i[25]" 611 102176 -800 102288 480 m2
+port "wbs_adr_i[25]" 578 100994 -800 101106 480 m2
+port "wbs_dat_o[24]" 642 99812 -800 99924 480 m2
+port "wbs_dat_i[24]" 610 98630 -800 98742 480 m2
+port "wbs_adr_i[24]" 577 97448 -800 97560 480 m2
+port "wbs_dat_o[23]" 641 96266 -800 96378 480 m2
+port "wbs_dat_i[23]" 609 95084 -800 95196 480 m2
+port "wbs_adr_i[23]" 576 93902 -800 94014 480 m2
+port "wbs_dat_o[22]" 640 92720 -800 92832 480 m2
+port "wbs_dat_i[22]" 608 91538 -800 91650 480 m2
+port "wbs_adr_i[22]" 575 90356 -800 90468 480 m2
+port "wbs_dat_o[21]" 639 89174 -800 89286 480 m2
+port "wbs_dat_i[21]" 607 87992 -800 88104 480 m2
+port "wbs_adr_i[21]" 574 86810 -800 86922 480 m2
+port "wbs_dat_o[20]" 638 85628 -800 85740 480 m2
+port "wbs_dat_i[20]" 606 84446 -800 84558 480 m2
+port "wbs_adr_i[20]" 573 83264 -800 83376 480 m2
+port "wbs_dat_o[19]" 636 82082 -800 82194 480 m2
+port "wbs_dat_i[19]" 604 80900 -800 81012 480 m2
+port "wbs_adr_i[19]" 571 79718 -800 79830 480 m2
+port "wbs_dat_o[18]" 635 78536 -800 78648 480 m2
+port "wbs_dat_i[18]" 603 77354 -800 77466 480 m2
+port "wbs_adr_i[18]" 570 76172 -800 76284 480 m2
+port "wbs_dat_o[17]" 634 74990 -800 75102 480 m2
+port "wbs_dat_i[17]" 602 73808 -800 73920 480 m2
+port "wbs_adr_i[17]" 569 72626 -800 72738 480 m2
+port "wbs_dat_o[16]" 633 71444 -800 71556 480 m2
+port "wbs_dat_i[16]" 601 70262 -800 70374 480 m2
+port "wbs_adr_i[16]" 568 69080 -800 69192 480 m2
+port "wbs_dat_o[15]" 632 67898 -800 68010 480 m2
+port "wbs_dat_i[15]" 600 66716 -800 66828 480 m2
+port "wbs_adr_i[15]" 567 65534 -800 65646 480 m2
+port "wbs_dat_o[14]" 631 64352 -800 64464 480 m2
+port "wbs_dat_i[14]" 599 63170 -800 63282 480 m2
+port "wbs_adr_i[14]" 566 61988 -800 62100 480 m2
+port "wbs_dat_o[13]" 630 60806 -800 60918 480 m2
+port "wbs_dat_i[13]" 598 59624 -800 59736 480 m2
+port "wbs_adr_i[13]" 565 58442 -800 58554 480 m2
+port "wbs_dat_o[12]" 629 57260 -800 57372 480 m2
+port "wbs_dat_i[12]" 597 56078 -800 56190 480 m2
+port "wbs_adr_i[12]" 564 54896 -800 55008 480 m2
+port "wbs_dat_o[11]" 628 53714 -800 53826 480 m2
+port "wbs_dat_i[11]" 596 52532 -800 52644 480 m2
+port "wbs_adr_i[11]" 563 51350 -800 51462 480 m2
+port "wbs_dat_o[10]" 627 50168 -800 50280 480 m2
+port "wbs_dat_i[10]" 595 48986 -800 49098 480 m2
+port "wbs_adr_i[10]" 562 47804 -800 47916 480 m2
+port "wbs_dat_o[9]" 657 46622 -800 46734 480 m2
+port "wbs_dat_i[9]" 625 45440 -800 45552 480 m2
+port "wbs_adr_i[9]" 592 44258 -800 44370 480 m2
+port "wbs_dat_o[8]" 656 43076 -800 43188 480 m2
+port "wbs_dat_i[8]" 624 41894 -800 42006 480 m2
+port "wbs_adr_i[8]" 591 40712 -800 40824 480 m2
+port "wbs_dat_o[7]" 655 39530 -800 39642 480 m2
+port "wbs_dat_i[7]" 623 38348 -800 38460 480 m2
+port "wbs_adr_i[7]" 590 37166 -800 37278 480 m2
+port "wbs_dat_o[6]" 654 35984 -800 36096 480 m2
+port "wbs_dat_i[6]" 622 34802 -800 34914 480 m2
+port "wbs_adr_i[6]" 589 33620 -800 33732 480 m2
+port "wbs_dat_o[5]" 653 32438 -800 32550 480 m2
+port "wbs_dat_i[5]" 621 31256 -800 31368 480 m2
+port "wbs_adr_i[5]" 588 30074 -800 30186 480 m2
+port "wbs_dat_o[4]" 652 28892 -800 29004 480 m2
+port "wbs_dat_i[4]" 620 27710 -800 27822 480 m2
+port "wbs_adr_i[4]" 587 26528 -800 26640 480 m2
+port "wbs_sel_i[3]" 661 25346 -800 25458 480 m2
+port "wbs_dat_o[3]" 651 24164 -800 24276 480 m2
+port "wbs_dat_i[3]" 619 22982 -800 23094 480 m2
+port "wbs_adr_i[3]" 586 21800 -800 21912 480 m2
+port "wbs_sel_i[2]" 660 20618 -800 20730 480 m2
+port "wbs_dat_o[2]" 648 19436 -800 19548 480 m2
+port "wbs_dat_i[2]" 616 18254 -800 18366 480 m2
+port "wbs_adr_i[2]" 583 17072 -800 17184 480 m2
+port "wbs_sel_i[1]" 659 15890 -800 16002 480 m2
+port "wbs_dat_o[1]" 637 14708 -800 14820 480 m2
+port "wbs_dat_i[1]" 605 13526 -800 13638 480 m2
+port "wbs_adr_i[1]" 572 12344 -800 12456 480 m2
+port "wbs_sel_i[0]" 658 11162 -800 11274 480 m2
+port "wbs_dat_o[0]" 626 9980 -800 10092 480 m2
+port "wbs_dat_i[0]" 594 8798 -800 8910 480 m2
+port "wbs_adr_i[0]" 561 7616 -800 7728 480 m2
+port "wbs_we_i" 663 6434 -800 6546 480 m2
+port "wbs_stb_i" 662 5252 -800 5364 480 m2
+port "wbs_cyc_i" 593 4070 -800 4182 480 m2
+port "wbs_ack_o" 560 2888 -800 3000 480 m2
+port "wb_rst_i" 559 1706 -800 1818 480 m2
+port "wb_clk_i" 558 524 -800 636 480 m2
+node "io_analog[4]" 0 2925 329294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[4]" 0 2925 318994 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[5]" 0 2925 227594 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[5]" 0 2925 217294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[6]" 0 2925 175894 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[6]" 0 2925 165594 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[4]" 0 2775 329294 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[4]" 0 2775 318994 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[5]" 0 2775 227594 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[5]" 0 2775 217294 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[6]" 0 2775 175894 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[6]" 0 2775 165594 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_in_3v3[0]" 1 613.728 583520 1544 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[26]" 1 613.728 -800 1544 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[0]" 1 613.728 583520 2726 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[26]" 1 613.728 -800 2726 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[0]" 1 613.728 583520 3908 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[26]" 1 613.728 -800 3908 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[0]" 1 613.728 583520 5090 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[26]" 1 613.728 -800 5090 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[1]" 1 613.728 583520 6272 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_in[1]" 1 613.728 583520 7454 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_out[1]" 1 613.728 583520 8636 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_in[4]" 1 613.728 583520 21638 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_oeb[23]" 1 613.728 -800 32422 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[23]" 1 613.728 -800 33604 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[23]" 1 613.728 -800 34786 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_in[5]" 1 613.728 583520 48096 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_out[22]" 1 613.728 -800 76826 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_oeb[21]" 1 613.728 -800 118866 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "io_analog[4]" "io_analog[4]" 26250
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "io_analog[6]" "io_analog[6]" 21250
+cap "io_analog[4]" "io_analog[4]" 26250
+cap "io_clamp_low[1]" "io_analog[5]" 525
+cap "io_clamp_low[0]" "io_analog[4]" 525
+cap "io_analog[4]" "io_analog[4]" 21250
+cap "io_clamp_high[2]" "io_analog[6]" 525
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "io_analog[6]" "io_analog[6]" 26250
+cap "io_analog[4]" "io_analog[4]" 21250
+cap "io_analog[6]" "io_analog[6]" 26250
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "io_clamp_high[1]" "io_analog[5]" 525
+cap "io_clamp_low[0]" "io_clamp_high[0]" 525
+cap "io_analog[6]" "io_analog[6]" 21250
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "io_clamp_high[2]" "io_clamp_low[2]" 525
+cap "io_clamp_high[0]" "io_analog[4]" 525
+cap "io_clamp_high[1]" "io_clamp_low[1]" 525
+cap "io_clamp_low[2]" "io_analog[6]" 525
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..64917b3
--- /dev/null
+++ b/README.md
@@ -0,0 +1,17 @@
+# Caravel Analog User
+
+[![License](https://img.shields.io/badge/License-Apache%202.0-blue.svg)](https://opensource.org/licenses/Apache-2.0) [![CI](https://github.com/efabless/caravel_user_project_analog/actions/workflows/user_project_ci.yml/badge.svg)](https://github.com/efabless/caravel_user_project_analog/actions/workflows/user_project_ci.yml) [![Caravan Build](https://github.com/efabless/caravel_user_project_analog/actions/workflows/caravan_build.yml/badge.svg)](https://github.com/efabless/caravel_user_project_analog/actions/workflows/caravan_build.yml)
+
+---
+
+
+## Amplifier and detector blocks
+ This design contains um amplifier circuit with AC a
+ 
+ The passive detector circuit has a NMOS transistor,coupling capacitor at the input and an RC filter at the output. 
+ The filter has a cuttof frequency of 150 kHz. 
+
+
+
+
+Refer to [README](docs/source/index.rst) for this sample project documentation. 
diff --git a/caravel b/caravel
new file mode 160000
index 0000000..05a73d7
--- /dev/null
+++ b/caravel
@@ -0,0 +1 @@
+Subproject commit 05a73d70b12b1f0ee9e2043f6b46d43e42031bec
diff --git a/docs/Makefile b/docs/Makefile
new file mode 100644
index 0000000..c715218
--- /dev/null
+++ b/docs/Makefile
@@ -0,0 +1,37 @@
+
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+# Minimal makefile for Sphinx documentation
+#
+
+# You can set these variables from the command line, and also
+# from the environment for the first two.
+SPHINXOPTS    ?=
+SPHINXBUILD   ?= sphinx-build
+SOURCEDIR     = source
+BUILDDIR      = build
+
+# Put it first so that "make" without argument is like "make help".
+help:
+	@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
+.PHONY: help Makefile
+
+# Catch-all target: route all unknown targets to Sphinx using the new
+# "make mode" option.  $(O) is meant as a shortcut for $(SPHINXOPTS).
+%: Makefile
+	@$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
diff --git a/docs/environment.yml b/docs/environment.yml
new file mode 100644
index 0000000..2bddf94
--- /dev/null
+++ b/docs/environment.yml
@@ -0,0 +1,23 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+name: caravel-docs
+channels:
+- defaults
+dependencies:
+- python>=3.8
+- pip:
+  - -r file:requirements.txt
diff --git a/docs/requirements.txt b/docs/requirements.txt
new file mode 100644
index 0000000..f5c5383
--- /dev/null
+++ b/docs/requirements.txt
@@ -0,0 +1,6 @@
+git+https://github.com/SymbiFlow/sphinx_materialdesign_theme.git#egg=sphinx-symbiflow-theme
+
+docutils
+sphinx
+sphinx-autobuild
+sphinxcontrib-wavedrom
diff --git a/docs/source/conf.py b/docs/source/conf.py
new file mode 100644
index 0000000..f960f13
--- /dev/null
+++ b/docs/source/conf.py
@@ -0,0 +1,89 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# Configuration file for the Sphinx documentation builder.
+#
+# This file only contains a selection of the most common options. For a full
+# list see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+# -- Path setup --------------------------------------------------------------
+
+# If extensions (or modules to document with autodoc) are in another directory,
+# add these directories to sys.path here. If the directory is relative to the
+# documentation root, use os.path.abspath to make it absolute, like shown here.
+#
+# import os
+# import sys
+# sys.path.insert(0, os.path.abspath('.'))
+
+
+# -- Project information -----------------------------------------------------
+
+project = 'CIIC Harness'
+copyright = '2020, efabless'
+author = 'efabless'
+
+
+# -- General configuration ---------------------------------------------------
+
+# Add any Sphinx extension module names here, as strings. They can be
+# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
+# ones.
+extensions = [
+  'sphinxcontrib.wavedrom',
+  'sphinx.ext.mathjax',
+  'sphinx.ext.todo'
+]
+
+# Add any paths that contain templates here, relative to this directory.
+templates_path = ['_templates']
+
+# List of patterns, relative to source directory, that match files and
+# directories to ignore when looking for source files.
+# This pattern also affects html_static_path and html_extra_path.
+exclude_patterns = [
+    'build',
+    'Thumbs.db',
+    # Files included in other rst files.
+    'introduction.rst',
+]
+
+
+# -- Options for HTML output -------------------------------------------------
+"""
+html_theme_options = {
+    'header_links' : [
+        ("Home", 'index', False, 'home'),
+        ("GitHub", "https://github.com/efabless/caravel", True, 'code'),
+    ],
+    'hide_symbiflow_links': True,
+    'license_url' : 'https://www.apache.org/licenses/LICENSE-2.0',
+}
+"""
+# The theme to use for HTML and HTML Help pages.  See the documentation for
+# a list of builtin themes.
+#
+html_theme = 'sphinx_rtd_theme'
+
+# Add any paths that contain custom static files (such as style sheets) here,
+# relative to this directory. They are copied after the builtin static files,
+# so a file named "default.css" will overwrite the builtin "default.css".
+html_static_path = ['_static']
+
+todo_include_todos = False
+
+numfig = True
diff --git a/docs/source/index.rst b/docs/source/index.rst
new file mode 100644
index 0000000..0a7c0c7
--- /dev/null
+++ b/docs/source/index.rst
@@ -0,0 +1,322 @@
+.. raw:: html
+
+   <!---
+   # SPDX-FileCopyrightText: 2020 Efabless Corporation
+   #
+   # Licensed under the Apache License, Version 2.0 (the "License");
+   # you may not use this file except in compliance with the License.
+   # You may obtain a copy of the License at
+   #
+   #      http://www.apache.org/licenses/LICENSE-2.0
+   #
+   # Unless required by applicable law or agreed to in writing, software
+   # distributed under the License is distributed on an "AS IS" BASIS,
+   # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+   # See the License for the specific language governing permissions and
+   # limitations under the License.
+   #
+   # SPDX-License-Identifier: Apache-2.0
+   -->
+
+Caravel Analog User Project
+===========================
+
+|License| |User CI| |Caravan Build|
+
+Table of contents
+=================
+
+-  `Overview <#overview>`__
+-  `Install Caravel <#install-caravel>`__
+-  `Caravel Integration <#caravel-integration>`__
+
+   - `User Project: Power on Reset <#user-project-power-on-reset>`_
+   -  `Verilog Integration <#verilog-integration>`__
+   
+-  `Running Full Chip Simulation <#running-full-chip-simulation>`__
+-  `Analog Design Flow <#analog-design-flow>`__
+- `Other Miscellaneous Targets <#other-miscellaneous-targets>`_
+-  `Checklist for Open-MPW
+   Submission <#checklist-for-open-mpw-submission>`__
+   
+Overview
+========
+
+This repo contains a sample user project that utilizes the caravan chip (analog version of `caravel <https://github.com/efabless/caravel.git>`__) user space. The user project is a simple power-on-reset that showcases how to make use of caravan's user space utilities like IO pads, logic analyzer probes, and wishbone port. The repo also demonstrates the recommended structure for the open-mpw **analog** projects.
+
+Install Caravel
+===============
+
+To setup caravel, run the following:
+
+.. code:: bash
+
+    # By default, CARAVEL_ROOT is set to $(pwd)/caravel
+    # If you want to install caravel at a different location, run "export CARAVEL_ROOT=<caravel-path>"
+    # Disable submodule installation if needed by, run "export SUBMODULE=0"
+    
+    git clone https://github.com/efabless/caravel_user_project_analog.git
+    cd caravel_user_project_analog
+    make install
+
+To update the installed caravel to the latest, run:
+
+.. code:: bash
+
+     make update_caravel
+
+To remove caravel, run
+
+.. code:: bash
+
+    make uninstall
+
+By default
+`caravel-lite <https://github.com/efabless/caravel-lite.git>`__ is
+installed. To install the full version of caravel, run this prior to
+calling make install.
+
+.. code:: bash
+
+    export CARAVEL_LITE=0
+ 
+Caravel Integration
+=====================
+
+
+User Project: Power on Reset
+----------------------------
+
+This is an example user analog project which breaks out the power-on-reset
+circuit used by the management SoC for power-up behavior so that the circuit
+input and output can be independently controlled and measured.
+
+The power-on-reset circuit itself is a simple, non-temperature-compensated
+analog delay calibrated to 15ms under nominal conditions, with a Schmitt
+trigger inverter to provide hysteresis around the trigger point to provide
+a clean output reset signal. 
+
+The circuit provides a single high-voltage (3.3V domain) sense-inverted reset
+signal "porb_h" and complementary low-voltage (1.8V domain) reset signals
+"por_l" and "porb_l".
+
+The only input to the circuit is the 3.3V domain power supply itself.
+
+
+Verilog Integration
+-------------------
+
+You need to create a wrapper around your macro that adheres to the
+template at
+`user\_analog_project\_wrapper <https://github.com/efabless/caravel/blob/master/verilog/rtl/__user_analog_project_wrapper.v>`__.
+The wrapper top module must be named ``user_analog_project_wrapper`` and must
+have the same input and output ports as the analog wrapper template. The wrapper gives access to the
+user space utilities provided by caravel like IO ports, logic analyzer
+probes, and wishbone bus connection to the management SoC.
+
+The verilog modules instantiated in the wrapper module should represent
+the analog project;  they need not be more than empty blocks, but it is
+encouraged to write a simple behavioral description of the analog circuit
+in standard verilog, using real-valued wires when necessary.  This allows
+the whole system to be run in a verilog testbench and verify the connectivity
+to the padframe and management SoC, even if the testbench C code does nothing
+more than set the mode of each GPIO pin.  The example top-level verilog code
+emulates the behavior of the power-on-reset delay after applying a valid
+power supply to the circuit.
+
+
+Building the PDK 
+================
+
+Make sure you have `Magic VLSI Layout Tool <http://opencircuitdesign.com/magic/index.html>`__   `version 8.3.265 <https://github.com/RTimothyEdwards/magic/tree/8.3.265>`__ installed on your machine before building the pdk. 
+
+.. code:: bash
+
+    # set PDK_ROOT to the path you wish to use for the pdk
+    export PDK_ROOT=<pdk-installation-path>
+
+    # you can optionally specify skywater-pdk and open-pdks commit used
+    # by setting and exporting SKYWATER_COMMIT and OPEN_PDKS_COMMIT
+    # if you do not set them, they default to the last verfied commits tested for this project
+
+    make pdk
+
+
+
+Running Full Chip Simulation
+============================
+
+First, you will need to install the simulation environment, by
+
+.. code:: bash
+
+    make simenv
+
+This will pull a docker image with the needed tools installed.
+
+To install the simulation environment locally, refer to `README <https://github.com/efabless/caravel_user_project_analog/blob/main/verilog/dv/README.md>`__
+
+Then, run the RTL and GL simulation by
+
+.. code:: bash
+
+    export PDK_ROOT=<pdk-installation-path>
+    export CARAVEL_ROOT=$(pwd)/caravel
+    # specify simulation mode: RTL/GL
+    export SIM=RTL
+    # Run the mprj_por testbench, make verify-mprj_por
+    make verify-<testbench-name>
+
+The verilog test-benches are under this directory
+`verilog/dv <https://github.com/efabless/caravel_user_project_analog/tree/main/verilog/dv>`__.
+
+
+Analog Design Flow
+===================
+
+The example project uses a very simple analog design flow with schematics
+made with xschem, simulation done using ngspice, layout done with magic,
+and LVS verification done with netgen.  Sources for the power-on-reset
+circuit are in the "xschem/" directory, which also includes a schematic
+representing the wrapper with all of its ports, for use in a testbench
+circuit.  There are several testbenches in the example, starting from
+tests of the component devices to a full test of the completed project
+inside the wrapper.
+
+There is no automation in this project;  the schematic and layout were
+done by hand, including both the power-on-reset block and the power and
+signal routing to the pins on the wrapper.
+
+The power-on-reset circuit itself is simple and is not compensated for
+temperature or voltage variation.  When the power supply reaches a
+sufficient level, the voltage divider sets the gate voltage on an nFET
+device to draw a current of nominally 240nA.  The testbench
+"threshold_test_tb.spice" does a DC sweep to find the gate voltage that
+produces this value.   Next, a cascaded current mirror divides down the
+current by a factor of (roughly) 400.  The testbench current_test.spice
+checks the current division value.  Finally, the output ~600pA from the
+end of the current mirror is accumulated on a capacitor until the value
+trips the input of the 3.3V Schmitt trigger buffer from the
+sky130_fd_sd_hvl library.  The capacitor is sized to peg the nominal
+time to trigger at 15ms.  The schematic "example_por_tb.sch" sets up
+the testbench for this timing test.
+
+The output of the Schmitt trigger buffer becomes the high-voltage
+output, and is input to a standard buffer and inverter used as
+level shifters from the 3.3V domain to the 1.8V domain, producing
+complementary low-voltage outputs.
+
+The user project is formed from two power-on-reset circuits, one of
+which is connected to the user area VDDA1 power supply, and the other
+of which is connected to one of the analog I/O pads, used as a power
+supply input and connected to its voltage ESD clamp circuit.  The
+3.3V domain outputs are connected directly to GPIO pads through the
+ESD (150 ohm series) connection.  The 1.8V domain outputs are connected
+to GPIO pads through the usual I/O connections, with the corresponding
+user output enable (sense inverted) held low to keep the output always
+active.
+
+The C code testbench is in "verilog/dv/mprj_por/mprj_por.c" and only
+sets the GPIO pins used to the correct state (user output function).
+The POR circuit outputs are monitored by the testbench verilog file
+"mprj_por_tb.v" which will fail if the connections are wrong or if
+the behavioral POR verilog does not work as intended.
+
+Note that to properly test this circuit, the GPIO pins have to be
+configured for output to be seen and measured, implying that the
+management SoC power supply must be stable and the C program running
+off of the SPI flash before the user area power supplies are raised.
+
+**NOTE**
+
+   When running spice extraction on the user_analog_project_wrapper layout, it is recommended to use `ext2spice short resistor`. 
+   This is to preserve all the different port names in the extracted netlist. In case you have two ports that are electrically shorted
+   in the layout, the `short resistor` option will tell magic not to merge the two shorted ports instead it adds zero-ohm ideal resistors 
+   between the net names so that they can be kept as separate nets. 
+   
+
+Running Open-MPW Precheck Locally
+=================================
+
+You can install the precheck by running 
+
+.. code:: bash
+
+   # By default, this install the precheck in your home directory
+   # To change the installtion path, run "export PRECHECK_ROOT=<precheck installation path>" 
+   make precheck
+
+This will clone the precheck repo and pull the latest precheck docker image. 
+
+
+Then, you can run the precheck by running
+Specify CARAVEL_ROOT before running any of the following, 
+
+.. code:: bash
+
+   # export CARAVEL_ROOT=$(pwd)/caravel 
+   export CARAVEL_ROOT=<path-to-caravel>
+   make run-precheck
+
+This will run all the precheck checks on your project and will retain the logs under the ``checks`` directory.
+
+Other Miscellaneous Targets
+============================
+
+The makefile provides a number of useful that targets that can run compress, uncompress, and run XOR checks on your design. 
+
+Compress gds files and any file larger than 100MB (GH file size limit), 
+
+.. code:: bash
+
+   make compress
+
+Uncompress files, 
+
+.. code:: bash
+
+   make uncompress
+
+
+Specify ``CARAVEL_ROOT`` before running any of the following, 
+
+.. code:: bash
+
+   # export CARAVEL_ROOT=$(pwd)/caravel 
+   export CARAVEL_ROOT=<path-to-caravel>
+   
+Run XOR check, 
+
+.. code:: bash
+
+   make xor-analog-wrapper
+
+Checklist for Open-MPW Submission
+=================================
+
+
+|:heavy_check_mark:| The project repo adheres to the same directory structure in this repo.
+   
+|:heavy_check_mark:| The project repo contain info.yaml at the project root.
+
+|:heavy_check_mark:| Top level macro is named ``user_analog_project_wrapper``.
+
+|:heavy_check_mark:| Full Chip Simulation passes for RTL and GL (gate-level)
+
+|:heavy_check_mark:| The project contains a spice netlist for the ``user_analog_project_wrapper`` at netgen/user_analog_project_wrapper.spice
+
+|:heavy_check_mark:| The hardened Macros are LVS and DRC clean
+
+|:heavy_check_mark:| The ``user_analog_project_wrapper`` adheres to empty wrapper template  order specified at  `user_analog_project_wrapper_empty <https://github.com/efabless/caravel/blob/master/mag/user_analog_project_wrapper_empty.mag>`__
+
+|:heavy_check_mark:| XOR check passes with zero total difference.
+
+|:heavy_check_mark:| Open-MPW-Precheck tool runs successfully. 
+
+
+.. |License| image:: https://img.shields.io/badge/License-Apache%202.0-blue.svg
+   :target: https://opensource.org/licenses/Apache-2.0
+.. |User CI| image:: https://github.com/efabless/caravel_user_project_analog/actions/workflows/user_project_ci.yml/badge.svg
+   :target: https://github.com/efabless/caravel_user_project_analog/actions/workflows/user_project_ci.yml
+.. |Caravan Build| image:: https://github.com/efabless/caravel_user_project_analog/actions/workflows/caravan_build.yml/badge.svg
+   :target: https://github.com/efabless/caravel_user_project_analog/actions/workflows/caravan_build.yml
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz
new file mode 100644
index 0000000..346e5a8
--- /dev/null
+++ b/gds/user_analog_project_wrapper.gds.gz
Binary files differ
diff --git a/mag/.magicrc b/mag/.magicrc
new file mode 100644
index 0000000..30eb883
--- /dev/null
+++ b/mag/.magicrc
@@ -0,0 +1,75 @@
+puts stdout "Sourcing design .magicrc for technology sky130A ..."
+
+# Put grid on 0.005 pitch.  This is important, as some commands don't
+# rescale the grid automatically (such as lef read?).
+
+set scalefac [tech lambda]
+if {[lindex $scalefac 1] < 2} {
+    scalegrid 1 2
+}
+
+# drc off
+drc euclidean on
+
+# Allow override of PDK path from environment variable PDKPATH
+if {[catch {set PDKPATH $env(PDKPATH)}]} {
+    set PDKPATH "/edatools/pdks/sky130A"
+}
+
+# loading technology
+tech load $PDKPATH/libs.tech/magic/current/sky130A.tech
+
+# load device generator
+source $PDKPATH/libs.tech/magic/current/sky130A.tcl
+
+# load bind keys (optional)
+# source $PDKPATH/libs.tech/magic/current/sky130A-BindKeys
+
+# set units to lambda grid 
+snap lambda
+
+# set sky130 standard power, ground, and substrate names
+set VDD VPWR
+set GND VGND
+set SUB VSUBS
+
+# Allow override of type of magic library views used, "mag" or "maglef",
+# from environment variable MAGTYPE
+
+if {[catch {set MAGTYPE $env(MAGTYPE)}]} {
+   set MAGTYPE mag
+}
+
+# add path to reference cells
+if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} {
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc
+    addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc_t18
+} else {
+    addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE}
+    addpath ${PDKPATH}/libs.ref/sky130_osu_sc_t18/${MAGTYPE}
+}
+
+# add path to GDS cells
+
+# add path to IP from catalog.  This procedure defined in the PDK script.
+catch {magic::query_mylib_ip}
+# add path to local IP from user design space.  Defined in the PDK script.
+catch {magic::query_my_projects}
diff --git a/mag/detV2.ext b/mag/detV2.ext
new file mode 100644
index 0000000..ab46810
--- /dev/null
+++ b/mag/detV2.ext
@@ -0,0 +1,26 @@
+timestamp 1647797958
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use sky130_fd_pr__res_xhigh_po_0p35_HDW2JU R 1 0 -44735 0 1 -9330
+parameters sky130_fd_pr__nfet_01v8 l=l w=w
+parameters sky130_fd_pr__cap_mim_m3_1 w=w l=l
+port "din" 1 -63034 -25264 -63034 -25264 m4
+port "do" 3 -35040 -25176 -35040 -25176 m4
+port "db" 2 -45852 -26620 -45852 -26620 li
+port "GND" 4 -52114 -3556 -52114 -3556 m1
+node "din" 0 5432.53 -63034 -25264 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 57996708 32168 0 0 0 0
+node "do" 5 125590 -35040 -25176 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8300544 37092 2560000 6400 2560000 6400 64947092 41180 0 0 0 0
+node "bot_cin" 4376 113372 -46000 -11880 ndif 0 0 0 0 0 0 0 0 630000 9280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 248880 6636 134620 3992 28640 964 312824408 80772 0 0 0 0 0 0
+node "db" 7836 16773.5 -45852 -26620 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 156600 9960 0 0 8715904 30440 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "GND" 0 0 -52114 -3556 m1 0 0 0 0 0 0 0 0 630000 9280 630000 9280 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14088324 40020 13586104 28300 1008016 4016 312853200 76780 0 0 0 0 0 0
+cap "bot_cin" "db" 11.6617
+cap "din" "bot_cin" 95616.7
+device csubckt sky130_fd_pr__cap_mim_m3_1 -43000 -23676 -42999 -23675 w=17400 l=17400 "None" "do" 14656 0 "GND" 70 0
+device csubckt sky130_fd_pr__cap_mim_m3_1 -64884 -23708 -64883 -23707 w=17400 l=17400 "None" "din" 14656 0 "bot_cin" 70 0
+device msubckt sky130_fd_pr__nfet_01v8 -45860 -11880 -45859 -11879 l=30 w=4500 "GND" "db" 60 0 "bot_cin" 4500 0 "GND" 4500 0
+merge "R/VSUBS" "GND" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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diff --git a/mag/detV2.mag b/mag/detV2.mag
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index 0000000..58f18b1
--- /dev/null
+++ b/mag/detV2.mag
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+timestamp 1647797958
+transform 1 0 -44735 0 1 -9330
+box -35 -2292 35 2292
+<< labels >>
+flabel metal3 s -49252 -5534 -48136 -5026 0 FreeSans 1250 0 0 0 bot_cin
+rlabel metal4 s -63034 -25264 -63034 -25264 4 din
+port 1 nsew
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+rlabel metal1 s -52114 -3556 -52114 -3556 4 GND
+port 4 nsew
+<< end >>
diff --git a/mag/sky130_fd_pr__cap_mim_m3_1_4DPJ86.mag b/mag/sky130_fd_pr__cap_mim_m3_1_4DPJ86.mag
new file mode 100644
index 0000000..7b2f8e2
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_1_4DPJ86.mag
@@ -0,0 +1,370 @@
+magic
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+rect 20339 -9388 20435 -9372
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_1
+string FIXED_BBOX 14167 3200 20367 9400
+string parameters w 30.0 l 30.0 val 920.4 carea 1.00 cperi 0.17 nx 5.5 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 0 tconnect 0 ccov 20
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__cap_mim_m3_1_4DPJQ5.mag b/mag/sky130_fd_pr__cap_mim_m3_1_4DPJQ5.mag
new file mode 100644
index 0000000..fda12cc
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_1_4DPJQ5.mag
@@ -0,0 +1,370 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647304853
+<< error_p >>
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+rect 14047 -9388 14143 -9372
+rect 20339 -9372 20355 -3228
+rect 20419 -9372 20435 -3228
+rect 20339 -9388 20435 -9372
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_1
+string FIXED_BBOX 14167 3200 20367 9400
+string parameters w 30.0 l 30.0 val 920.4 carea 1.00 cperi 0.17 nx 5.5 ny 3 dummy 0 square 1 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 0 tconnect 0 ccov 20
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__cap_mim_m3_1_4DTJ86.mag b/mag/sky130_fd_pr__cap_mim_m3_1_4DTJ86.mag
new file mode 100644
index 0000000..ed9059e
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_1_4DTJ86.mag
@@ -0,0 +1,358 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647304853
+<< error_p >>
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+rect 7795 -9400 7855 -3200
+rect 7875 -9400 7935 -3200
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+rect 14167 -9400 14227 -3200
+<< metal3 >>
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+rect -11001 9372 -4729 9400
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+rect 20419 3228 20439 9372
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+<< via3 >>
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+rect 7771 3228 7835 9372
+rect 14063 3228 14127 9372
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+rect 16675 -9260 17859 -3340
+<< metal4 >>
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+rect -14786 3339 -13600 3340
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+rect 16674 2960 17860 2961
+rect 16674 -2960 16675 2960
+rect 17859 -2960 17860 2960
+rect 16674 -2961 17860 -2960
+rect 14043 -3228 14147 -3072
+rect 10382 -3340 11568 -3339
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+rect 10382 -9261 11568 -9260
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+rect 20335 -3072 20355 3072
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+rect 16674 -3340 17860 -3339
+rect 16674 -9260 16675 -3340
+rect 17859 -9260 17860 -3340
+rect 16674 -9261 17860 -9260
+rect 14043 -9450 14147 -9372
+rect 20335 -9372 20355 -3228
+rect 20419 -9372 20439 -3228
+rect 20335 -9450 20439 -9372
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_1
+string FIXED_BBOX 14167 3200 20367 9400
+string parameters w 30.0 l 30.0 val 920.4 carea 1.00 cperi 0.17 nx 5.5 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 0 ccov 20
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__cap_mim_m3_1_4MTJ86.mag b/mag/sky130_fd_pr__cap_mim_m3_1_4MTJ86.mag
new file mode 100644
index 0000000..0c89b26
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_1_4MTJ86.mag
@@ -0,0 +1,382 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647304853
+<< error_p >>
+rect -11081 3200 -11021 9400
+rect -11001 3200 -10941 9400
+rect -4789 3200 -4729 9400
+rect -4709 3200 -4649 9400
+rect 1503 3200 1563 9400
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+rect -11001 -3100 -10941 3100
+rect -4789 -3100 -4729 3100
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+rect 7795 -9400 7855 -3200
+rect 7875 -9400 7935 -3200
+rect 14087 -9400 14147 -3200
+rect 14167 -9400 14227 -3200
+<< metal3 >>
+rect -17293 9372 -11021 9400
+rect -17293 3228 -11105 9372
+rect -11041 3228 -11021 9372
+rect -17293 3200 -11021 3228
+rect -11001 9372 -4729 9400
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+rect 7875 3228 14063 9372
+rect 14127 3228 14147 9372
+rect 7875 3200 14147 3228
+rect 14167 9372 20439 9400
+rect 14167 3228 20355 9372
+rect 20419 3228 20439 9372
+rect 14167 3200 20439 3228
+rect -17293 3072 -11021 3100
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+rect 20335 -9450 20439 -9372
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_1
+string FIXED_BBOX 14167 3200 20367 9400
+string parameters w 30.0 l 30.0 val 920.4 carea 1.00 cperi 0.17 nx 5.5 ny 3 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov 20
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__cap_mim_m3_1_LCPJQ5.mag b/mag/sky130_fd_pr__cap_mim_m3_1_LCPJQ5.mag
new file mode 100644
index 0000000..791ef4d
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_1_LCPJQ5.mag
@@ -0,0 +1,370 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647304853
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+rect 18155 -2960 18156 2960
+rect 16378 -2961 18156 -2960
+rect 14047 -3088 14143 -3072
+rect 20339 -3072 20355 3072
+rect 20419 -3072 20435 3072
+rect 20339 -3088 20435 -3072
+rect -11121 -3228 -11025 -3212
+rect -15082 -3340 -13304 -3339
+rect -15082 -9260 -15081 -3340
+rect -13305 -9260 -13304 -3340
+rect -15082 -9261 -13304 -9260
+rect -11121 -9372 -11105 -3228
+rect -11041 -9372 -11025 -3228
+rect -4829 -3228 -4733 -3212
+rect -8790 -3340 -7012 -3339
+rect -8790 -9260 -8789 -3340
+rect -7013 -9260 -7012 -3340
+rect -8790 -9261 -7012 -9260
+rect -11121 -9388 -11025 -9372
+rect -4829 -9372 -4813 -3228
+rect -4749 -9372 -4733 -3228
+rect 1463 -3228 1559 -3212
+rect -2498 -3340 -720 -3339
+rect -2498 -9260 -2497 -3340
+rect -721 -9260 -720 -3340
+rect -2498 -9261 -720 -9260
+rect -4829 -9388 -4733 -9372
+rect 1463 -9372 1479 -3228
+rect 1543 -9372 1559 -3228
+rect 7755 -3228 7851 -3212
+rect 3794 -3340 5572 -3339
+rect 3794 -9260 3795 -3340
+rect 5571 -9260 5572 -3340
+rect 3794 -9261 5572 -9260
+rect 1463 -9388 1559 -9372
+rect 7755 -9372 7771 -3228
+rect 7835 -9372 7851 -3228
+rect 14047 -3228 14143 -3212
+rect 10086 -3340 11864 -3339
+rect 10086 -9260 10087 -3340
+rect 11863 -9260 11864 -3340
+rect 10086 -9261 11864 -9260
+rect 7755 -9388 7851 -9372
+rect 14047 -9372 14063 -3228
+rect 14127 -9372 14143 -3228
+rect 20339 -3228 20435 -3212
+rect 16378 -3340 18156 -3339
+rect 16378 -9260 16379 -3340
+rect 18155 -9260 18156 -3340
+rect 16378 -9261 18156 -9260
+rect 14047 -9388 14143 -9372
+rect 20339 -9372 20355 -3228
+rect 20419 -9372 20435 -3228
+rect 20339 -9388 20435 -9372
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_1
+string FIXED_BBOX 14167 3200 20367 9400
+string parameters w 30.0 l 30.0 val 920.4 carea 1.00 cperi 0.17 nx 5.5 ny 3 dummy 0 square 1 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 0 tconnect 0 ccov 30
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__nfet_01v8_4J56K8.mag b/mag/sky130_fd_pr__nfet_01v8_4J56K8.mag
new file mode 100644
index 0000000..f90b9be
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_01v8_4J56K8.mag
@@ -0,0 +1,100 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647304558
+<< error_p >>
+rect -29 2322 29 2328
+rect -29 2288 -17 2322
+rect -29 2282 29 2288
+rect -29 -2288 29 -2282
+rect -29 -2322 -17 -2288
+rect -29 -2328 29 -2322
+<< pwell >>
+rect -211 -2460 211 2460
+<< nmos >>
+rect -15 -2250 15 2250
+<< ndiff >>
+rect -73 2238 -15 2250
+rect -73 -2238 -61 2238
+rect -27 -2238 -15 2238
+rect -73 -2250 -15 -2238
+rect 15 2238 73 2250
+rect 15 -2238 27 2238
+rect 61 -2238 73 2238
+rect 15 -2250 73 -2238
+<< ndiffc >>
+rect -61 -2238 -27 2238
+rect 27 -2238 61 2238
+<< psubdiff >>
+rect -175 2390 -79 2424
+rect 79 2390 175 2424
+rect -175 2328 -141 2390
+rect 141 2328 175 2390
+rect -175 -2390 -141 -2328
+rect 141 -2390 175 -2328
+rect -175 -2424 -79 -2390
+rect 79 -2424 175 -2390
+<< psubdiffcont >>
+rect -79 2390 79 2424
+rect -175 -2328 -141 2328
+rect 141 -2328 175 2328
+rect -79 -2424 79 -2390
+<< poly >>
+rect -33 2322 33 2338
+rect -33 2288 -17 2322
+rect 17 2288 33 2322
+rect -33 2272 33 2288
+rect -15 2250 15 2272
+rect -15 -2272 15 -2250
+rect -33 -2288 33 -2272
+rect -33 -2322 -17 -2288
+rect 17 -2322 33 -2288
+rect -33 -2338 33 -2322
+<< polycont >>
+rect -17 2288 17 2322
+rect -17 -2322 17 -2288
+<< locali >>
+rect -175 2390 -79 2424
+rect 79 2390 175 2424
+rect -175 2328 -141 2390
+rect 141 2328 175 2390
+rect -33 2288 -17 2322
+rect 17 2288 33 2322
+rect -61 2238 -27 2254
+rect -61 -2254 -27 -2238
+rect 27 2238 61 2254
+rect 27 -2254 61 -2238
+rect -33 -2322 -17 -2288
+rect 17 -2322 33 -2288
+rect -175 -2390 -141 -2328
+rect 141 -2390 175 -2328
+rect -175 -2424 -79 -2390
+rect 79 -2424 175 -2390
+<< viali >>
+rect -17 2288 17 2322
+rect -61 -2238 -27 2238
+rect 27 -2238 61 2238
+rect -17 -2322 17 -2288
+<< metal1 >>
+rect -29 2322 29 2328
+rect -29 2288 -17 2322
+rect 17 2288 29 2322
+rect -29 2282 29 2288
+rect -67 2238 -21 2250
+rect -67 -2238 -61 2238
+rect -27 -2238 -21 2238
+rect -67 -2250 -21 -2238
+rect 21 2238 67 2250
+rect 21 -2238 27 2238
+rect 61 -2238 67 2238
+rect 21 -2250 67 -2238
+rect -29 -2288 29 -2282
+rect -29 -2322 -17 -2288
+rect 17 -2322 29 -2288
+rect -29 -2328 29 -2322
+<< properties >>
+string gencell sky130_fd_pr__nfet_01v8
+string FIXED_BBOX -158 -2407 158 2407
+string parameters w 22.5 l 0.150 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.15 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt  sky130_fd_bs_flash__special_sonosfet_star  sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 0
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__nfet_01v8_SY7QQ3.mag b/mag/sky130_fd_pr__nfet_01v8_SY7QQ3.mag
new file mode 100644
index 0000000..0c60f59
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_01v8_SY7QQ3.mag
@@ -0,0 +1,75 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647304558
+<< error_p >>
+rect -29 2322 29 2328
+rect -29 2288 -17 2322
+rect -29 2282 29 2288
+rect -29 -2288 29 -2282
+rect -29 -2322 -17 -2288
+rect -29 -2328 29 -2322
+<< nmos >>
+rect -15 -2250 15 2250
+<< ndiff >>
+rect -73 2238 -15 2250
+rect -73 -2238 -61 2238
+rect -27 -2238 -15 2238
+rect -73 -2250 -15 -2238
+rect 15 2238 73 2250
+rect 15 -2238 27 2238
+rect 61 -2238 73 2238
+rect 15 -2250 73 -2238
+<< ndiffc >>
+rect -61 -2238 -27 2238
+rect 27 -2238 61 2238
+<< poly >>
+rect -33 2322 33 2338
+rect -33 2288 -17 2322
+rect 17 2288 33 2322
+rect -33 2272 33 2288
+rect -15 2250 15 2272
+rect -15 -2272 15 -2250
+rect -33 -2288 33 -2272
+rect -33 -2322 -17 -2288
+rect 17 -2322 33 -2288
+rect -33 -2338 33 -2322
+<< polycont >>
+rect -17 2288 17 2322
+rect -17 -2322 17 -2288
+<< locali >>
+rect -33 2288 -17 2322
+rect 17 2288 33 2322
+rect -61 2238 -27 2254
+rect -61 -2254 -27 -2238
+rect 27 2238 61 2254
+rect 27 -2254 61 -2238
+rect -33 -2322 -17 -2288
+rect 17 -2322 33 -2288
+<< viali >>
+rect -17 2288 17 2322
+rect -61 -2238 -27 2238
+rect 27 -2238 61 2238
+rect -17 -2322 17 -2288
+<< metal1 >>
+rect -29 2322 29 2328
+rect -29 2288 -17 2322
+rect 17 2288 29 2322
+rect -29 2282 29 2288
+rect -67 2238 -21 2250
+rect -67 -2238 -61 2238
+rect -27 -2238 -21 2238
+rect -67 -2250 -21 -2238
+rect 21 2238 67 2250
+rect 21 -2238 27 2238
+rect 61 -2238 67 2238
+rect 21 -2250 67 -2238
+rect -29 -2288 29 -2282
+rect -29 -2322 -17 -2288
+rect 17 -2322 29 -2288
+rect -29 -2328 29 -2322
+<< properties >>
+string gencell sky130_fd_pr__nfet_01v8
+string parameters w 22.5 l 0.150 m 1 nf 1 diffcov 100 polycov 100 guard 0 glc 0 grc 0 gtc 0 gbc 0 tbcov 100 rlcov 100 topc 0 botc 0 poverlap 1 doverlap 0 lmin 0.15 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt  sky130_fd_bs_flash__special_sonosfet_star  sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt} full_metal 0 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 0
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext b/mag/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext
new file mode 100644
index 0000000..bc6cad9
--- /dev/null
+++ b/mag/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.ext
@@ -0,0 +1,17 @@
+timestamp 1647797958
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__res_xhigh_po l=l w=w
+parameters sky130_fd_pr__res_xhigh_po_5p73 l=l
+parameters sky130_fd_pr__res_xhigh_po_2p85 l=l
+parameters sky130_fd_pr__res_xhigh_po_1p41 l=l
+parameters sky130_fd_pr__res_xhigh_po_0p69 l=l
+parameters sky130_fd_pr__res_xhigh_po_0p35 l=l
+node "a_n35_n2292#" 179 547.239 -35 -2292 xpc 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60480 2008 21050 942 0 0 0 0 0 0 0 0 0 0
+node "a_n35_n1860#" 106286 0 -35 -1860 xres 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 260400 7580 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_n35_1860#" 179 547.239 -35 1860 xpc 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60480 2008 21050 942 0 0 0 0 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+device rsubckt sky130_fd_pr__res_xhigh_po -35 -1860 -34 -1859 l=3720 w=70 "VSUBS" "a_n35_n1860#" 0 0 "a_n35_n2292#" 70 0 "a_n35_1860#" 70 0
diff --git a/mag/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.mag b/mag/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.mag
new file mode 100644
index 0000000..8ffb027
--- /dev/null
+++ b/mag/sky130_fd_pr__res_xhigh_po_0p35_HDW2JU.mag
@@ -0,0 +1,62 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647797958
+<< xpolycontact >>
+rect -35 1860 35 2292
+rect -35 -2292 35 -1860
+<< xpolyres >>
+rect -35 -1860 35 1860
+<< viali >>
+rect -17 2238 17 2272
+rect -17 2166 17 2200
+rect -17 2094 17 2128
+rect -17 2022 17 2056
+rect -17 1950 17 1984
+rect -17 1878 17 1912
+rect -17 -1913 17 -1879
+rect -17 -1985 17 -1951
+rect -17 -2057 17 -2023
+rect -17 -2129 17 -2095
+rect -17 -2201 17 -2167
+rect -17 -2273 17 -2239
+<< metal1 >>
+rect -25 2272 25 2286
+rect -25 2238 -17 2272
+rect 17 2238 25 2272
+rect -25 2200 25 2238
+rect -25 2166 -17 2200
+rect 17 2166 25 2200
+rect -25 2128 25 2166
+rect -25 2094 -17 2128
+rect 17 2094 25 2128
+rect -25 2056 25 2094
+rect -25 2022 -17 2056
+rect 17 2022 25 2056
+rect -25 1984 25 2022
+rect -25 1950 -17 1984
+rect 17 1950 25 1984
+rect -25 1912 25 1950
+rect -25 1878 -17 1912
+rect 17 1878 25 1912
+rect -25 1865 25 1878
+rect -25 -1879 25 -1865
+rect -25 -1913 -17 -1879
+rect 17 -1913 25 -1879
+rect -25 -1951 25 -1913
+rect -25 -1985 -17 -1951
+rect 17 -1985 25 -1951
+rect -25 -2023 25 -1985
+rect -25 -2057 -17 -2023
+rect 17 -2057 25 -2023
+rect -25 -2095 25 -2057
+rect -25 -2129 -17 -2095
+rect 17 -2129 25 -2095
+rect -25 -2167 25 -2129
+rect -25 -2201 -17 -2167
+rect 17 -2201 25 -2167
+rect -25 -2239 25 -2201
+rect -25 -2273 -17 -2239
+rect 17 -2273 25 -2239
+rect -25 -2286 25 -2273
+<< end >>
diff --git a/mag/user_analog_project_wrapper.ext b/mag/user_analog_project_wrapper.ext
new file mode 100644
index 0000000..dd22418
--- /dev/null
+++ b/mag/user_analog_project_wrapper.ext
@@ -0,0 +1,1414 @@
+timestamp 1647819952
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use detV2 detV2_0 1 0 488900 0 1 581290
+port "io_analog[4]" 41 329294 702300 334294 704800 m5
+port "io_analog[4]" 47 318994 702300 323994 704800 m5
+port "io_analog[5]" 42 227594 702300 232594 704800 m5
+port "io_analog[5]" 48 217294 702300 222294 704800 m5
+port "io_analog[6]" 43 175894 702300 180894 704800 m5
+port "io_analog[6]" 49 165594 702300 170594 704800 m5
+port "io_analog[4]" 41 329294 702300 334294 704800 m4
+port "io_analog[4]" 47 318994 702300 323994 704800 m4
+port "io_analog[5]" 42 227594 702300 232594 704800 m4
+port "io_analog[5]" 48 217294 702300 222294 704800 m4
+port "io_analog[6]" 43 175894 702300 180894 704800 m4
+port "io_analog[6]" 49 165594 702300 170594 704800 m4
+port "io_in_3v3[0]" 83 583520 1544 584800 1656 m3
+port "io_oeb[26]" 128 -800 1544 480 1656 m3
+port "io_in[0]" 56 583520 2726 584800 2838 m3
+port "io_out[26]" 155 -800 2726 480 2838 m3
+port "io_out[0]" 137 583520 3908 584800 4020 m3
+port "io_in[26]" 74 -800 3908 480 4020 m3
+port "io_oeb[0]" 110 583520 5090 584800 5202 m3
+port "io_in_3v3[26]" 101 -800 5090 480 5202 m3
+port "io_in_3v3[1]" 94 583520 6272 584800 6384 m3
+port "io_oeb[25]" 127 -800 6272 480 6384 m3
+port "io_in[1]" 67 583520 7454 584800 7566 m3
+port "io_out[25]" 154 -800 7454 480 7566 m3
+port "io_out[1]" 148 583520 8636 584800 8748 m3
+port "io_in[25]" 73 -800 8636 480 8748 m3
+port "io_oeb[1]" 121 583520 9818 584800 9930 m3
+port "io_in_3v3[25]" 100 -800 9818 480 9930 m3
+port "io_in_3v3[2]" 102 583520 11000 584800 11112 m3
+port "io_oeb[24]" 126 -800 11000 480 11112 m3
+port "io_in[2]" 75 583520 12182 584800 12294 m3
+port "io_out[24]" 153 -800 12182 480 12294 m3
+port "io_out[2]" 156 583520 13364 584800 13476 m3
+port "io_in[24]" 72 -800 13364 480 13476 m3
+port "io_oeb[2]" 129 583520 14546 584800 14658 m3
+port "io_in_3v3[24]" 99 -800 14546 480 14658 m3
+port "io_in_3v3[3]" 103 583520 15728 584800 15840 m3
+port "gpio_noesd[17]" 26 -800 15728 480 15840 m3
+port "io_in[3]" 76 583520 16910 584800 17022 m3
+port "gpio_analog[17]" 8 -800 16910 480 17022 m3
+port "io_out[3]" 157 583520 18092 584800 18204 m3
+port "io_oeb[3]" 130 583520 19274 584800 19386 m3
+port "io_in_3v3[4]" 104 583520 20456 584800 20568 m3
+port "io_in[4]" 77 583520 21638 584800 21750 m3
+port "io_out[4]" 158 583520 22820 584800 22932 m3
+port "io_oeb[4]" 131 583520 24002 584800 24114 m3
+port "io_oeb[23]" 125 -800 32422 480 32534 m3
+port "io_out[23]" 152 -800 33604 480 33716 m3
+port "io_in[23]" 71 -800 34786 480 34898 m3
+port "io_in_3v3[23]" 98 -800 35968 480 36080 m3
+port "gpio_noesd[16]" 25 -800 37150 480 37262 m3
+port "gpio_analog[16]" 7 -800 38332 480 38444 m3
+port "io_in_3v3[5]" 105 583520 46914 584800 47026 m3
+port "io_in[5]" 78 583520 48096 584800 48208 m3
+port "io_out[5]" 159 583520 49278 584800 49390 m3
+port "io_oeb[5]" 132 583520 50460 584800 50572 m3
+port "io_oeb[22]" 124 -800 75644 480 75756 m3
+port "io_out[22]" 151 -800 76826 480 76938 m3
+port "io_in[22]" 70 -800 78008 480 78120 m3
+port "io_in_3v3[22]" 97 -800 79190 480 79302 m3
+port "gpio_noesd[15]" 24 -800 80372 480 80484 m3
+port "gpio_analog[15]" 6 -800 81554 480 81666 m3
+port "io_in_3v3[6]" 106 583520 91572 584800 91684 m3
+port "io_in[6]" 79 583520 92754 584800 92866 m3
+port "io_out[6]" 160 583520 93936 584800 94048 m3
+port "io_oeb[6]" 133 583520 95118 584800 95230 m3
+port "io_oeb[21]" 123 -800 118866 480 118978 m3
+port "io_out[21]" 150 -800 120048 480 120160 m3
+port "io_in[21]" 69 -800 121230 480 121342 m3
+port "io_in_3v3[21]" 96 -800 122412 480 122524 m3
+port "gpio_noesd[14]" 23 -800 123594 480 123706 m3
+port "gpio_analog[14]" 5 -800 124776 480 124888 m3
+port "vssa1" 565 582340 136830 584800 141630 m3
+port "vssa1" 564 582340 146830 584800 151630 m3
+port "vssd2" 571 0 162888 1660 167688 m3
+port "vssd2" 570 0 172888 1660 177688 m3
+port "vssd1" 569 582340 181430 584800 186230 m3
+port "vssd1" 568 582340 191430 584800 196230 m3
+port "vdda2" 560 0 204888 1660 209688 m3
+port "vdda2" 561 0 214888 1660 219688 m3
+port "vdda1" 559 582340 225230 584800 230030 m3
+port "vdda1" 558 582340 235230 584800 240030 m3
+port "io_oeb[20]" 122 -800 246488 480 246600 m3
+port "io_out[20]" 149 -800 247670 480 247782 m3
+port "io_in[20]" 68 -800 248852 480 248964 m3
+port "io_in_3v3[20]" 95 -800 250034 480 250146 m3
+port "gpio_noesd[13]" 22 -800 251216 480 251328 m3
+port "gpio_analog[13]" 4 -800 252398 480 252510 m3
+port "gpio_analog[0]" 0 583520 269230 584800 269342 m3
+port "gpio_noesd[0]" 18 583520 270412 584800 270524 m3
+port "io_in_3v3[7]" 107 583520 271594 584800 271706 m3
+port "io_in[7]" 80 583520 272776 584800 272888 m3
+port "io_out[7]" 161 583520 273958 584800 274070 m3
+port "io_oeb[7]" 134 583520 275140 584800 275252 m3
+port "io_oeb[19]" 120 -800 289510 480 289622 m3
+port "io_out[19]" 147 -800 290692 480 290804 m3
+port "io_in[19]" 66 -800 291874 480 291986 m3
+port "io_in_3v3[19]" 93 -800 293056 480 293168 m3
+port "gpio_noesd[12]" 21 -800 294238 480 294350 m3
+port "gpio_analog[12]" 3 -800 295420 480 295532 m3
+port "gpio_analog[1]" 9 583520 313652 584800 313764 m3
+port "gpio_noesd[1]" 27 583520 314834 584800 314946 m3
+port "io_in_3v3[8]" 108 583520 316016 584800 316128 m3
+port "io_in[8]" 81 583520 317198 584800 317310 m3
+port "io_out[8]" 162 583520 318380 584800 318492 m3
+port "io_oeb[8]" 135 583520 319562 584800 319674 m3
+port "io_oeb[18]" 119 -800 332732 480 332844 m3
+port "io_out[18]" 146 -800 333914 480 334026 m3
+port "io_in[18]" 65 -800 335096 480 335208 m3
+port "io_in_3v3[18]" 92 -800 336278 480 336390 m3
+port "gpio_noesd[11]" 20 -800 337460 480 337572 m3
+port "gpio_analog[11]" 2 -800 338642 480 338754 m3
+port "gpio_analog[2]" 10 583520 358874 584800 358986 m3
+port "gpio_noesd[2]" 28 583520 360056 584800 360168 m3
+port "io_in_3v3[9]" 109 583520 361238 584800 361350 m3
+port "io_in[9]" 82 583520 362420 584800 362532 m3
+port "io_out[9]" 163 583520 363602 584800 363714 m3
+port "io_oeb[9]" 136 583520 364784 584800 364896 m3
+port "io_oeb[17]" 118 -800 375954 480 376066 m3
+port "io_out[17]" 145 -800 377136 480 377248 m3
+port "io_in[17]" 64 -800 378318 480 378430 m3
+port "io_in_3v3[17]" 91 -800 379500 480 379612 m3
+port "gpio_noesd[10]" 19 -800 380682 480 380794 m3
+port "gpio_analog[10]" 1 -800 381864 480 381976 m3
+port "gpio_analog[3]" 11 583520 405296 584800 405408 m3
+port "gpio_noesd[3]" 29 583520 406478 584800 406590 m3
+port "io_in_3v3[10]" 84 583520 407660 584800 407772 m3
+port "io_in[10]" 57 583520 408842 584800 408954 m3
+port "io_out[10]" 138 583520 410024 584800 410136 m3
+port "io_oeb[10]" 111 583520 411206 584800 411318 m3
+port "io_oeb[16]" 117 -800 419176 480 419288 m3
+port "io_out[16]" 144 -800 420358 480 420470 m3
+port "io_in[16]" 63 -800 421540 480 421652 m3
+port "io_in_3v3[16]" 90 -800 422722 480 422834 m3
+port "gpio_noesd[9]" 35 -800 423904 480 424016 m3
+port "gpio_analog[9]" 17 -800 425086 480 425198 m3
+port "gpio_analog[4]" 12 583520 449718 584800 449830 m3
+port "gpio_noesd[4]" 30 583520 450900 584800 451012 m3
+port "io_in_3v3[11]" 85 583520 452082 584800 452194 m3
+port "io_in[11]" 58 583520 453264 584800 453376 m3
+port "io_out[11]" 139 583520 454446 584800 454558 m3
+port "io_oeb[11]" 112 583520 455628 584800 455740 m3
+port "io_oeb[15]" 116 -800 462398 480 462510 m3
+port "io_out[15]" 143 -800 463580 480 463692 m3
+port "io_in[15]" 62 -800 464762 480 464874 m3
+port "io_in_3v3[15]" 89 -800 465944 480 466056 m3
+port "gpio_noesd[8]" 34 -800 467126 480 467238 m3
+port "gpio_analog[8]" 16 -800 468308 480 468420 m3
+port "gpio_analog[5]" 13 583520 494140 584800 494252 m3
+port "gpio_noesd[5]" 31 583520 495322 584800 495434 m3
+port "io_in_3v3[12]" 86 583520 496504 584800 496616 m3
+port "io_in[12]" 59 583520 497686 584800 497798 m3
+port "io_out[12]" 140 583520 498868 584800 498980 m3
+port "io_oeb[12]" 113 583520 500050 584800 500162 m3
+port "io_oeb[14]" 115 -800 505620 480 505732 m3
+port "io_out[14]" 142 -800 506802 480 506914 m3
+port "io_in[14]" 61 -800 507984 480 508096 m3
+port "io_in_3v3[14]" 88 -800 509166 480 509278 m3
+port "gpio_noesd[7]" 33 -800 510348 480 510460 m3
+port "gpio_analog[7]" 15 -800 511530 480 511642 m3
+port "vdda1" 556 582340 540562 584800 545362 m3
+port "vdda1" 557 582340 550562 584800 555362 m3
+port "vssa2" 567 0 549442 1660 554242 m3
+port "vssa2" 566 0 559442 1660 564242 m3
+port "gpio_analog[6]" 14 583520 583562 584800 583674 m3
+port "gpio_noesd[6]" 32 583520 584744 584800 584856 m3
+port "io_in_3v3[13]" 87 583520 585926 584800 586038 m3
+port "io_in[13]" 60 583520 587108 584800 587220 m3
+port "io_out[13]" 141 583520 588290 584800 588402 m3
+port "io_oeb[13]" 114 583520 589472 584800 589584 m3
+port "vccd1" 553 582340 629784 584800 634584 m3
+port "vccd2" 555 0 633842 1660 638642 m3
+port "vccd1" 552 582340 639784 584800 644584 m3
+port "vccd2" 554 0 643842 1660 648642 m3
+port "io_analog[0]" 36 582300 677984 584800 682984 m3
+port "io_analog[10]" 37 0 680242 1700 685242 m3
+port "io_analog[2]" 39 465394 702300 470394 704800 m3
+port "io_analog[3]" 40 413394 702300 418394 704800 m3
+port "io_analog[4]" 41 329294 702300 334294 704800 m3
+port "io_clamp_high[0]" 50 326794 702300 328994 704800 m3
+port "io_clamp_low[0]" 53 324294 702300 326494 704800 m3
+port "io_analog[4]" 47 318994 702300 323994 704800 m3
+port "io_analog[5]" 42 227594 702300 232594 704800 m3
+port "io_clamp_high[1]" 51 225094 702300 227294 704800 m3
+port "io_clamp_low[1]" 54 222594 702300 224794 704800 m3
+port "io_analog[5]" 48 217294 702300 222294 704800 m3
+port "io_analog[6]" 43 175894 702300 180894 704800 m3
+port "io_clamp_high[2]" 52 173394 702300 175594 704800 m3
+port "io_clamp_low[2]" 55 170894 702300 173094 704800 m3
+port "io_analog[6]" 49 165594 702300 170594 704800 m3
+port "io_analog[7]" 44 120194 702300 125194 704800 m3
+port "io_analog[8]" 45 68194 702300 73194 704800 m3
+port "io_analog[9]" 46 16194 702300 21194 704800 m3
+port "user_irq[2]" 551 583250 -800 583362 480 m2
+port "user_irq[1]" 550 582068 -800 582180 480 m2
+port "user_irq[0]" 549 580886 -800 580998 480 m2
+port "user_clock2" 548 579704 -800 579816 480 m2
+port "la_oenb[127]" 450 578522 -800 578634 480 m2
+port "la_data_out[127]" 322 577340 -800 577452 480 m2
+port "la_data_in[127]" 194 576158 -800 576270 480 m2
+port "la_oenb[126]" 449 574976 -800 575088 480 m2
+port "la_data_out[126]" 321 573794 -800 573906 480 m2
+port "la_data_in[126]" 193 572612 -800 572724 480 m2
+port "la_oenb[125]" 448 571430 -800 571542 480 m2
+port "la_data_out[125]" 320 570248 -800 570360 480 m2
+port "la_data_in[125]" 192 569066 -800 569178 480 m2
+port "la_oenb[124]" 447 567884 -800 567996 480 m2
+port "la_data_out[124]" 319 566702 -800 566814 480 m2
+port "la_data_in[124]" 191 565520 -800 565632 480 m2
+port "la_oenb[123]" 446 564338 -800 564450 480 m2
+port "la_data_out[123]" 318 563156 -800 563268 480 m2
+port "la_data_in[123]" 190 561974 -800 562086 480 m2
+port "la_oenb[122]" 445 560792 -800 560904 480 m2
+port "la_data_out[122]" 317 559610 -800 559722 480 m2
+port "la_data_in[122]" 189 558428 -800 558540 480 m2
+port "la_oenb[121]" 444 557246 -800 557358 480 m2
+port "la_data_out[121]" 316 556064 -800 556176 480 m2
+port "la_data_in[121]" 188 554882 -800 554994 480 m2
+port "la_oenb[120]" 443 553700 -800 553812 480 m2
+port "la_data_out[120]" 315 552518 -800 552630 480 m2
+port "la_data_in[120]" 187 551336 -800 551448 480 m2
+port "la_oenb[119]" 441 550154 -800 550266 480 m2
+port "la_data_out[119]" 313 548972 -800 549084 480 m2
+port "la_data_in[119]" 185 547790 -800 547902 480 m2
+port "la_oenb[118]" 440 546608 -800 546720 480 m2
+port "la_data_out[118]" 312 545426 -800 545538 480 m2
+port "la_data_in[118]" 184 544244 -800 544356 480 m2
+port "la_oenb[117]" 439 543062 -800 543174 480 m2
+port "la_data_out[117]" 311 541880 -800 541992 480 m2
+port "la_data_in[117]" 183 540698 -800 540810 480 m2
+port "la_oenb[116]" 438 539516 -800 539628 480 m2
+port "la_data_out[116]" 310 538334 -800 538446 480 m2
+port "la_data_in[116]" 182 537152 -800 537264 480 m2
+port "la_oenb[115]" 437 535970 -800 536082 480 m2
+port "la_data_out[115]" 309 534788 -800 534900 480 m2
+port "la_data_in[115]" 181 533606 -800 533718 480 m2
+port "la_oenb[114]" 436 532424 -800 532536 480 m2
+port "la_data_out[114]" 308 531242 -800 531354 480 m2
+port "la_data_in[114]" 180 530060 -800 530172 480 m2
+port "la_oenb[113]" 435 528878 -800 528990 480 m2
+port "la_data_out[113]" 307 527696 -800 527808 480 m2
+port "la_data_in[113]" 179 526514 -800 526626 480 m2
+port "la_oenb[112]" 434 525332 -800 525444 480 m2
+port "la_data_out[112]" 306 524150 -800 524262 480 m2
+port "la_data_in[112]" 178 522968 -800 523080 480 m2
+port "la_oenb[111]" 433 521786 -800 521898 480 m2
+port "la_data_out[111]" 305 520604 -800 520716 480 m2
+port "la_data_in[111]" 177 519422 -800 519534 480 m2
+port "la_oenb[110]" 432 518240 -800 518352 480 m2
+port "la_data_out[110]" 304 517058 -800 517170 480 m2
+port "la_data_in[110]" 176 515876 -800 515988 480 m2
+port "la_oenb[109]" 430 514694 -800 514806 480 m2
+port "la_data_out[109]" 302 513512 -800 513624 480 m2
+port "la_data_in[109]" 174 512330 -800 512442 480 m2
+port "la_oenb[108]" 429 511148 -800 511260 480 m2
+port "la_data_out[108]" 301 509966 -800 510078 480 m2
+port "la_data_in[108]" 173 508784 -800 508896 480 m2
+port "la_oenb[107]" 428 507602 -800 507714 480 m2
+port "la_data_out[107]" 300 506420 -800 506532 480 m2
+port "la_data_in[107]" 172 505238 -800 505350 480 m2
+port "la_oenb[106]" 427 504056 -800 504168 480 m2
+port "la_data_out[106]" 299 502874 -800 502986 480 m2
+port "la_data_in[106]" 171 501692 -800 501804 480 m2
+port "la_oenb[105]" 426 500510 -800 500622 480 m2
+port "la_data_out[105]" 298 499328 -800 499440 480 m2
+port "la_data_in[105]" 170 498146 -800 498258 480 m2
+port "la_oenb[104]" 425 496964 -800 497076 480 m2
+port "la_data_out[104]" 297 495782 -800 495894 480 m2
+port "la_data_in[104]" 169 494600 -800 494712 480 m2
+port "la_oenb[103]" 424 493418 -800 493530 480 m2
+port "la_data_out[103]" 296 492236 -800 492348 480 m2
+port "la_data_in[103]" 168 491054 -800 491166 480 m2
+port "la_oenb[102]" 423 489872 -800 489984 480 m2
+port "la_data_out[102]" 295 488690 -800 488802 480 m2
+port "la_data_in[102]" 167 487508 -800 487620 480 m2
+port "la_oenb[101]" 422 486326 -800 486438 480 m2
+port "la_data_out[101]" 294 485144 -800 485256 480 m2
+port "la_data_in[101]" 166 483962 -800 484074 480 m2
+port "la_oenb[100]" 421 482780 -800 482892 480 m2
+port "la_data_out[100]" 293 481598 -800 481710 480 m2
+port "la_data_in[100]" 165 480416 -800 480528 480 m2
+port "la_oenb[99]" 546 479234 -800 479346 480 m2
+port "la_data_out[99]" 418 478052 -800 478164 480 m2
+port "la_data_in[99]" 290 476870 -800 476982 480 m2
+port "la_oenb[98]" 545 475688 -800 475800 480 m2
+port "la_data_out[98]" 417 474506 -800 474618 480 m2
+port "la_data_in[98]" 289 473324 -800 473436 480 m2
+port "la_oenb[97]" 544 472142 -800 472254 480 m2
+port "la_data_out[97]" 416 470960 -800 471072 480 m2
+port "la_data_in[97]" 288 469778 -800 469890 480 m2
+port "la_oenb[96]" 543 468596 -800 468708 480 m2
+port "la_data_out[96]" 415 467414 -800 467526 480 m2
+port "la_data_in[96]" 287 466232 -800 466344 480 m2
+port "la_oenb[95]" 542 465050 -800 465162 480 m2
+port "la_data_out[95]" 414 463868 -800 463980 480 m2
+port "la_data_in[95]" 286 462686 -800 462798 480 m2
+port "la_oenb[94]" 541 461504 -800 461616 480 m2
+port "la_data_out[94]" 413 460322 -800 460434 480 m2
+port "la_data_in[94]" 285 459140 -800 459252 480 m2
+port "la_oenb[93]" 540 457958 -800 458070 480 m2
+port "la_data_out[93]" 412 456776 -800 456888 480 m2
+port "la_data_in[93]" 284 455594 -800 455706 480 m2
+port "la_oenb[92]" 539 454412 -800 454524 480 m2
+port "la_data_out[92]" 411 453230 -800 453342 480 m2
+port "la_data_in[92]" 283 452048 -800 452160 480 m2
+port "la_oenb[91]" 538 450866 -800 450978 480 m2
+port "la_data_out[91]" 410 449684 -800 449796 480 m2
+port "la_data_in[91]" 282 448502 -800 448614 480 m2
+port "la_oenb[90]" 537 447320 -800 447432 480 m2
+port "la_data_out[90]" 409 446138 -800 446250 480 m2
+port "la_data_in[90]" 281 444956 -800 445068 480 m2
+port "la_oenb[89]" 535 443774 -800 443886 480 m2
+port "la_data_out[89]" 407 442592 -800 442704 480 m2
+port "la_data_in[89]" 279 441410 -800 441522 480 m2
+port "la_oenb[88]" 534 440228 -800 440340 480 m2
+port "la_data_out[88]" 406 439046 -800 439158 480 m2
+port "la_data_in[88]" 278 437864 -800 437976 480 m2
+port "la_oenb[87]" 533 436682 -800 436794 480 m2
+port "la_data_out[87]" 405 435500 -800 435612 480 m2
+port "la_data_in[87]" 277 434318 -800 434430 480 m2
+port "la_oenb[86]" 532 433136 -800 433248 480 m2
+port "la_data_out[86]" 404 431954 -800 432066 480 m2
+port "la_data_in[86]" 276 430772 -800 430884 480 m2
+port "la_oenb[85]" 531 429590 -800 429702 480 m2
+port "la_data_out[85]" 403 428408 -800 428520 480 m2
+port "la_data_in[85]" 275 427226 -800 427338 480 m2
+port "la_oenb[84]" 530 426044 -800 426156 480 m2
+port "la_data_out[84]" 402 424862 -800 424974 480 m2
+port "la_data_in[84]" 274 423680 -800 423792 480 m2
+port "la_oenb[83]" 529 422498 -800 422610 480 m2
+port "la_data_out[83]" 401 421316 -800 421428 480 m2
+port "la_data_in[83]" 273 420134 -800 420246 480 m2
+port "la_oenb[82]" 528 418952 -800 419064 480 m2
+port "la_data_out[82]" 400 417770 -800 417882 480 m2
+port "la_data_in[82]" 272 416588 -800 416700 480 m2
+port "la_oenb[81]" 527 415406 -800 415518 480 m2
+port "la_data_out[81]" 399 414224 -800 414336 480 m2
+port "la_data_in[81]" 271 413042 -800 413154 480 m2
+port "la_oenb[80]" 526 411860 -800 411972 480 m2
+port "la_data_out[80]" 398 410678 -800 410790 480 m2
+port "la_data_in[80]" 270 409496 -800 409608 480 m2
+port "la_oenb[79]" 524 408314 -800 408426 480 m2
+port "la_data_out[79]" 396 407132 -800 407244 480 m2
+port "la_data_in[79]" 268 405950 -800 406062 480 m2
+port "la_oenb[78]" 523 404768 -800 404880 480 m2
+port "la_data_out[78]" 395 403586 -800 403698 480 m2
+port "la_data_in[78]" 267 402404 -800 402516 480 m2
+port "la_oenb[77]" 522 401222 -800 401334 480 m2
+port "la_data_out[77]" 394 400040 -800 400152 480 m2
+port "la_data_in[77]" 266 398858 -800 398970 480 m2
+port "la_oenb[76]" 521 397676 -800 397788 480 m2
+port "la_data_out[76]" 393 396494 -800 396606 480 m2
+port "la_data_in[76]" 265 395312 -800 395424 480 m2
+port "la_oenb[75]" 520 394130 -800 394242 480 m2
+port "la_data_out[75]" 392 392948 -800 393060 480 m2
+port "la_data_in[75]" 264 391766 -800 391878 480 m2
+port "la_oenb[74]" 519 390584 -800 390696 480 m2
+port "la_data_out[74]" 391 389402 -800 389514 480 m2
+port "la_data_in[74]" 263 388220 -800 388332 480 m2
+port "la_oenb[73]" 518 387038 -800 387150 480 m2
+port "la_data_out[73]" 390 385856 -800 385968 480 m2
+port "la_data_in[73]" 262 384674 -800 384786 480 m2
+port "la_oenb[72]" 517 383492 -800 383604 480 m2
+port "la_data_out[72]" 389 382310 -800 382422 480 m2
+port "la_data_in[72]" 261 381128 -800 381240 480 m2
+port "la_oenb[71]" 516 379946 -800 380058 480 m2
+port "la_data_out[71]" 388 378764 -800 378876 480 m2
+port "la_data_in[71]" 260 377582 -800 377694 480 m2
+port "la_oenb[70]" 515 376400 -800 376512 480 m2
+port "la_data_out[70]" 387 375218 -800 375330 480 m2
+port "la_data_in[70]" 259 374036 -800 374148 480 m2
+port "la_oenb[69]" 513 372854 -800 372966 480 m2
+port "la_data_out[69]" 385 371672 -800 371784 480 m2
+port "la_data_in[69]" 257 370490 -800 370602 480 m2
+port "la_oenb[68]" 512 369308 -800 369420 480 m2
+port "la_data_out[68]" 384 368126 -800 368238 480 m2
+port "la_data_in[68]" 256 366944 -800 367056 480 m2
+port "la_oenb[67]" 511 365762 -800 365874 480 m2
+port "la_data_out[67]" 383 364580 -800 364692 480 m2
+port "la_data_in[67]" 255 363398 -800 363510 480 m2
+port "la_oenb[66]" 510 362216 -800 362328 480 m2
+port "la_data_out[66]" 382 361034 -800 361146 480 m2
+port "la_data_in[66]" 254 359852 -800 359964 480 m2
+port "la_oenb[65]" 509 358670 -800 358782 480 m2
+port "la_data_out[65]" 381 357488 -800 357600 480 m2
+port "la_data_in[65]" 253 356306 -800 356418 480 m2
+port "la_oenb[64]" 508 355124 -800 355236 480 m2
+port "la_data_out[64]" 380 353942 -800 354054 480 m2
+port "la_data_in[64]" 252 352760 -800 352872 480 m2
+port "la_oenb[63]" 507 351578 -800 351690 480 m2
+port "la_data_out[63]" 379 350396 -800 350508 480 m2
+port "la_data_in[63]" 251 349214 -800 349326 480 m2
+port "la_oenb[62]" 506 348032 -800 348144 480 m2
+port "la_data_out[62]" 378 346850 -800 346962 480 m2
+port "la_data_in[62]" 250 345668 -800 345780 480 m2
+port "la_oenb[61]" 505 344486 -800 344598 480 m2
+port "la_data_out[61]" 377 343304 -800 343416 480 m2
+port "la_data_in[61]" 249 342122 -800 342234 480 m2
+port "la_oenb[60]" 504 340940 -800 341052 480 m2
+port "la_data_out[60]" 376 339758 -800 339870 480 m2
+port "la_data_in[60]" 248 338576 -800 338688 480 m2
+port "la_oenb[59]" 502 337394 -800 337506 480 m2
+port "la_data_out[59]" 374 336212 -800 336324 480 m2
+port "la_data_in[59]" 246 335030 -800 335142 480 m2
+port "la_oenb[58]" 501 333848 -800 333960 480 m2
+port "la_data_out[58]" 373 332666 -800 332778 480 m2
+port "la_data_in[58]" 245 331484 -800 331596 480 m2
+port "la_oenb[57]" 500 330302 -800 330414 480 m2
+port "la_data_out[57]" 372 329120 -800 329232 480 m2
+port "la_data_in[57]" 244 327938 -800 328050 480 m2
+port "la_oenb[56]" 499 326756 -800 326868 480 m2
+port "la_data_out[56]" 371 325574 -800 325686 480 m2
+port "la_data_in[56]" 243 324392 -800 324504 480 m2
+port "la_oenb[55]" 498 323210 -800 323322 480 m2
+port "la_data_out[55]" 370 322028 -800 322140 480 m2
+port "la_data_in[55]" 242 320846 -800 320958 480 m2
+port "la_oenb[54]" 497 319664 -800 319776 480 m2
+port "la_data_out[54]" 369 318482 -800 318594 480 m2
+port "la_data_in[54]" 241 317300 -800 317412 480 m2
+port "la_oenb[53]" 496 316118 -800 316230 480 m2
+port "la_data_out[53]" 368 314936 -800 315048 480 m2
+port "la_data_in[53]" 240 313754 -800 313866 480 m2
+port "la_oenb[52]" 495 312572 -800 312684 480 m2
+port "la_data_out[52]" 367 311390 -800 311502 480 m2
+port "la_data_in[52]" 239 310208 -800 310320 480 m2
+port "la_oenb[51]" 494 309026 -800 309138 480 m2
+port "la_data_out[51]" 366 307844 -800 307956 480 m2
+port "la_data_in[51]" 238 306662 -800 306774 480 m2
+port "la_oenb[50]" 493 305480 -800 305592 480 m2
+port "la_data_out[50]" 365 304298 -800 304410 480 m2
+port "la_data_in[50]" 237 303116 -800 303228 480 m2
+port "la_oenb[49]" 491 301934 -800 302046 480 m2
+port "la_data_out[49]" 363 300752 -800 300864 480 m2
+port "la_data_in[49]" 235 299570 -800 299682 480 m2
+port "la_oenb[48]" 490 298388 -800 298500 480 m2
+port "la_data_out[48]" 362 297206 -800 297318 480 m2
+port "la_data_in[48]" 234 296024 -800 296136 480 m2
+port "la_oenb[47]" 489 294842 -800 294954 480 m2
+port "la_data_out[47]" 361 293660 -800 293772 480 m2
+port "la_data_in[47]" 233 292478 -800 292590 480 m2
+port "la_oenb[46]" 488 291296 -800 291408 480 m2
+port "la_data_out[46]" 360 290114 -800 290226 480 m2
+port "la_data_in[46]" 232 288932 -800 289044 480 m2
+port "la_oenb[45]" 487 287750 -800 287862 480 m2
+port "la_data_out[45]" 359 286568 -800 286680 480 m2
+port "la_data_in[45]" 231 285386 -800 285498 480 m2
+port "la_oenb[44]" 486 284204 -800 284316 480 m2
+port "la_data_out[44]" 358 283022 -800 283134 480 m2
+port "la_data_in[44]" 230 281840 -800 281952 480 m2
+port "la_oenb[43]" 485 280658 -800 280770 480 m2
+port "la_data_out[43]" 357 279476 -800 279588 480 m2
+port "la_data_in[43]" 229 278294 -800 278406 480 m2
+port "la_oenb[42]" 484 277112 -800 277224 480 m2
+port "la_data_out[42]" 356 275930 -800 276042 480 m2
+port "la_data_in[42]" 228 274748 -800 274860 480 m2
+port "la_oenb[41]" 483 273566 -800 273678 480 m2
+port "la_data_out[41]" 355 272384 -800 272496 480 m2
+port "la_data_in[41]" 227 271202 -800 271314 480 m2
+port "la_oenb[40]" 482 270020 -800 270132 480 m2
+port "la_data_out[40]" 354 268838 -800 268950 480 m2
+port "la_data_in[40]" 226 267656 -800 267768 480 m2
+port "la_oenb[39]" 480 266474 -800 266586 480 m2
+port "la_data_out[39]" 352 265292 -800 265404 480 m2
+port "la_data_in[39]" 224 264110 -800 264222 480 m2
+port "la_oenb[38]" 479 262928 -800 263040 480 m2
+port "la_data_out[38]" 351 261746 -800 261858 480 m2
+port "la_data_in[38]" 223 260564 -800 260676 480 m2
+port "la_oenb[37]" 478 259382 -800 259494 480 m2
+port "la_data_out[37]" 350 258200 -800 258312 480 m2
+port "la_data_in[37]" 222 257018 -800 257130 480 m2
+port "la_oenb[36]" 477 255836 -800 255948 480 m2
+port "la_data_out[36]" 349 254654 -800 254766 480 m2
+port "la_data_in[36]" 221 253472 -800 253584 480 m2
+port "la_oenb[35]" 476 252290 -800 252402 480 m2
+port "la_data_out[35]" 348 251108 -800 251220 480 m2
+port "la_data_in[35]" 220 249926 -800 250038 480 m2
+port "la_oenb[34]" 475 248744 -800 248856 480 m2
+port "la_data_out[34]" 347 247562 -800 247674 480 m2
+port "la_data_in[34]" 219 246380 -800 246492 480 m2
+port "la_oenb[33]" 474 245198 -800 245310 480 m2
+port "la_data_out[33]" 346 244016 -800 244128 480 m2
+port "la_data_in[33]" 218 242834 -800 242946 480 m2
+port "la_oenb[32]" 473 241652 -800 241764 480 m2
+port "la_data_out[32]" 345 240470 -800 240582 480 m2
+port "la_data_in[32]" 217 239288 -800 239400 480 m2
+port "la_oenb[31]" 472 238106 -800 238218 480 m2
+port "la_data_out[31]" 344 236924 -800 237036 480 m2
+port "la_data_in[31]" 216 235742 -800 235854 480 m2
+port "la_oenb[30]" 471 234560 -800 234672 480 m2
+port "la_data_out[30]" 343 233378 -800 233490 480 m2
+port "la_data_in[30]" 215 232196 -800 232308 480 m2
+port "la_oenb[29]" 469 231014 -800 231126 480 m2
+port "la_data_out[29]" 341 229832 -800 229944 480 m2
+port "la_data_in[29]" 213 228650 -800 228762 480 m2
+port "la_oenb[28]" 468 227468 -800 227580 480 m2
+port "la_data_out[28]" 340 226286 -800 226398 480 m2
+port "la_data_in[28]" 212 225104 -800 225216 480 m2
+port "la_oenb[27]" 467 223922 -800 224034 480 m2
+port "la_data_out[27]" 339 222740 -800 222852 480 m2
+port "la_data_in[27]" 211 221558 -800 221670 480 m2
+port "la_oenb[26]" 466 220376 -800 220488 480 m2
+port "la_data_out[26]" 338 219194 -800 219306 480 m2
+port "la_data_in[26]" 210 218012 -800 218124 480 m2
+port "la_oenb[25]" 465 216830 -800 216942 480 m2
+port "la_data_out[25]" 337 215648 -800 215760 480 m2
+port "la_data_in[25]" 209 214466 -800 214578 480 m2
+port "la_oenb[24]" 464 213284 -800 213396 480 m2
+port "la_data_out[24]" 336 212102 -800 212214 480 m2
+port "la_data_in[24]" 208 210920 -800 211032 480 m2
+port "la_oenb[23]" 463 209738 -800 209850 480 m2
+port "la_data_out[23]" 335 208556 -800 208668 480 m2
+port "la_data_in[23]" 207 207374 -800 207486 480 m2
+port "la_oenb[22]" 462 206192 -800 206304 480 m2
+port "la_data_out[22]" 334 205010 -800 205122 480 m2
+port "la_data_in[22]" 206 203828 -800 203940 480 m2
+port "la_oenb[21]" 461 202646 -800 202758 480 m2
+port "la_data_out[21]" 333 201464 -800 201576 480 m2
+port "la_data_in[21]" 205 200282 -800 200394 480 m2
+port "la_oenb[20]" 460 199100 -800 199212 480 m2
+port "la_data_out[20]" 332 197918 -800 198030 480 m2
+port "la_data_in[20]" 204 196736 -800 196848 480 m2
+port "la_oenb[19]" 458 195554 -800 195666 480 m2
+port "la_data_out[19]" 330 194372 -800 194484 480 m2
+port "la_data_in[19]" 202 193190 -800 193302 480 m2
+port "la_oenb[18]" 457 192008 -800 192120 480 m2
+port "la_data_out[18]" 329 190826 -800 190938 480 m2
+port "la_data_in[18]" 201 189644 -800 189756 480 m2
+port "la_oenb[17]" 456 188462 -800 188574 480 m2
+port "la_data_out[17]" 328 187280 -800 187392 480 m2
+port "la_data_in[17]" 200 186098 -800 186210 480 m2
+port "la_oenb[16]" 455 184916 -800 185028 480 m2
+port "la_data_out[16]" 327 183734 -800 183846 480 m2
+port "la_data_in[16]" 199 182552 -800 182664 480 m2
+port "la_oenb[15]" 454 181370 -800 181482 480 m2
+port "la_data_out[15]" 326 180188 -800 180300 480 m2
+port "la_data_in[15]" 198 179006 -800 179118 480 m2
+port "la_oenb[14]" 453 177824 -800 177936 480 m2
+port "la_data_out[14]" 325 176642 -800 176754 480 m2
+port "la_data_in[14]" 197 175460 -800 175572 480 m2
+port "la_oenb[13]" 452 174278 -800 174390 480 m2
+port "la_data_out[13]" 324 173096 -800 173208 480 m2
+port "la_data_in[13]" 196 171914 -800 172026 480 m2
+port "la_oenb[12]" 451 170732 -800 170844 480 m2
+port "la_data_out[12]" 323 169550 -800 169662 480 m2
+port "la_data_in[12]" 195 168368 -800 168480 480 m2
+port "la_oenb[11]" 442 167186 -800 167298 480 m2
+port "la_data_out[11]" 314 166004 -800 166116 480 m2
+port "la_data_in[11]" 186 164822 -800 164934 480 m2
+port "la_oenb[10]" 431 163640 -800 163752 480 m2
+port "la_data_out[10]" 303 162458 -800 162570 480 m2
+port "la_data_in[10]" 175 161276 -800 161388 480 m2
+port "la_oenb[9]" 547 160094 -800 160206 480 m2
+port "la_data_out[9]" 419 158912 -800 159024 480 m2
+port "la_data_in[9]" 291 157730 -800 157842 480 m2
+port "la_oenb[8]" 536 156548 -800 156660 480 m2
+port "la_data_out[8]" 408 155366 -800 155478 480 m2
+port "la_data_in[8]" 280 154184 -800 154296 480 m2
+port "la_oenb[7]" 525 153002 -800 153114 480 m2
+port "la_data_out[7]" 397 151820 -800 151932 480 m2
+port "la_data_in[7]" 269 150638 -800 150750 480 m2
+port "la_oenb[6]" 514 149456 -800 149568 480 m2
+port "la_data_out[6]" 386 148274 -800 148386 480 m2
+port "la_data_in[6]" 258 147092 -800 147204 480 m2
+port "la_oenb[5]" 503 145910 -800 146022 480 m2
+port "la_data_out[5]" 375 144728 -800 144840 480 m2
+port "la_data_in[5]" 247 143546 -800 143658 480 m2
+port "la_oenb[4]" 492 142364 -800 142476 480 m2
+port "la_data_out[4]" 364 141182 -800 141294 480 m2
+port "la_data_in[4]" 236 140000 -800 140112 480 m2
+port "la_oenb[3]" 481 138818 -800 138930 480 m2
+port "la_data_out[3]" 353 137636 -800 137748 480 m2
+port "la_data_in[3]" 225 136454 -800 136566 480 m2
+port "la_oenb[2]" 470 135272 -800 135384 480 m2
+port "la_data_out[2]" 342 134090 -800 134202 480 m2
+port "la_data_in[2]" 214 132908 -800 133020 480 m2
+port "la_oenb[1]" 459 131726 -800 131838 480 m2
+port "la_data_out[1]" 331 130544 -800 130656 480 m2
+port "la_data_in[1]" 203 129362 -800 129474 480 m2
+port "la_oenb[0]" 420 128180 -800 128292 480 m2
+port "la_data_out[0]" 292 126998 -800 127110 480 m2
+port "la_data_in[0]" 164 125816 -800 125928 480 m2
+port "wbs_dat_o[31]" 664 124634 -800 124746 480 m2
+port "wbs_dat_i[31]" 632 123452 -800 123564 480 m2
+port "wbs_adr_i[31]" 599 122270 -800 122382 480 m2
+port "wbs_dat_o[30]" 663 121088 -800 121200 480 m2
+port "wbs_dat_i[30]" 631 119906 -800 120018 480 m2
+port "wbs_adr_i[30]" 598 118724 -800 118836 480 m2
+port "wbs_dat_o[29]" 661 117542 -800 117654 480 m2
+port "wbs_dat_i[29]" 629 116360 -800 116472 480 m2
+port "wbs_adr_i[29]" 596 115178 -800 115290 480 m2
+port "wbs_dat_o[28]" 660 113996 -800 114108 480 m2
+port "wbs_dat_i[28]" 628 112814 -800 112926 480 m2
+port "wbs_adr_i[28]" 595 111632 -800 111744 480 m2
+port "wbs_dat_o[27]" 659 110450 -800 110562 480 m2
+port "wbs_dat_i[27]" 627 109268 -800 109380 480 m2
+port "wbs_adr_i[27]" 594 108086 -800 108198 480 m2
+port "wbs_dat_o[26]" 658 106904 -800 107016 480 m2
+port "wbs_dat_i[26]" 626 105722 -800 105834 480 m2
+port "wbs_adr_i[26]" 593 104540 -800 104652 480 m2
+port "wbs_dat_o[25]" 657 103358 -800 103470 480 m2
+port "wbs_dat_i[25]" 625 102176 -800 102288 480 m2
+port "wbs_adr_i[25]" 592 100994 -800 101106 480 m2
+port "wbs_dat_o[24]" 656 99812 -800 99924 480 m2
+port "wbs_dat_i[24]" 624 98630 -800 98742 480 m2
+port "wbs_adr_i[24]" 591 97448 -800 97560 480 m2
+port "wbs_dat_o[23]" 655 96266 -800 96378 480 m2
+port "wbs_dat_i[23]" 623 95084 -800 95196 480 m2
+port "wbs_adr_i[23]" 590 93902 -800 94014 480 m2
+port "wbs_dat_o[22]" 654 92720 -800 92832 480 m2
+port "wbs_dat_i[22]" 622 91538 -800 91650 480 m2
+port "wbs_adr_i[22]" 589 90356 -800 90468 480 m2
+port "wbs_dat_o[21]" 653 89174 -800 89286 480 m2
+port "wbs_dat_i[21]" 621 87992 -800 88104 480 m2
+port "wbs_adr_i[21]" 588 86810 -800 86922 480 m2
+port "wbs_dat_o[20]" 652 85628 -800 85740 480 m2
+port "wbs_dat_i[20]" 620 84446 -800 84558 480 m2
+port "wbs_adr_i[20]" 587 83264 -800 83376 480 m2
+port "wbs_dat_o[19]" 650 82082 -800 82194 480 m2
+port "wbs_dat_i[19]" 618 80900 -800 81012 480 m2
+port "wbs_adr_i[19]" 585 79718 -800 79830 480 m2
+port "wbs_dat_o[18]" 649 78536 -800 78648 480 m2
+port "wbs_dat_i[18]" 617 77354 -800 77466 480 m2
+port "wbs_adr_i[18]" 584 76172 -800 76284 480 m2
+port "wbs_dat_o[17]" 648 74990 -800 75102 480 m2
+port "wbs_dat_i[17]" 616 73808 -800 73920 480 m2
+port "wbs_adr_i[17]" 583 72626 -800 72738 480 m2
+port "wbs_dat_o[16]" 647 71444 -800 71556 480 m2
+port "wbs_dat_i[16]" 615 70262 -800 70374 480 m2
+port "wbs_adr_i[16]" 582 69080 -800 69192 480 m2
+port "wbs_dat_o[15]" 646 67898 -800 68010 480 m2
+port "wbs_dat_i[15]" 614 66716 -800 66828 480 m2
+port "wbs_adr_i[15]" 581 65534 -800 65646 480 m2
+port "wbs_dat_o[14]" 645 64352 -800 64464 480 m2
+port "wbs_dat_i[14]" 613 63170 -800 63282 480 m2
+port "wbs_adr_i[14]" 580 61988 -800 62100 480 m2
+port "wbs_dat_o[13]" 644 60806 -800 60918 480 m2
+port "wbs_dat_i[13]" 612 59624 -800 59736 480 m2
+port "wbs_adr_i[13]" 579 58442 -800 58554 480 m2
+port "wbs_dat_o[12]" 643 57260 -800 57372 480 m2
+port "wbs_dat_i[12]" 611 56078 -800 56190 480 m2
+port "wbs_adr_i[12]" 578 54896 -800 55008 480 m2
+port "wbs_dat_o[11]" 642 53714 -800 53826 480 m2
+port "wbs_dat_i[11]" 610 52532 -800 52644 480 m2
+port "wbs_adr_i[11]" 577 51350 -800 51462 480 m2
+port "wbs_dat_o[10]" 641 50168 -800 50280 480 m2
+port "wbs_dat_i[10]" 609 48986 -800 49098 480 m2
+port "wbs_adr_i[10]" 576 47804 -800 47916 480 m2
+port "wbs_dat_o[9]" 671 46622 -800 46734 480 m2
+port "wbs_dat_i[9]" 639 45440 -800 45552 480 m2
+port "wbs_adr_i[9]" 606 44258 -800 44370 480 m2
+port "wbs_dat_o[8]" 670 43076 -800 43188 480 m2
+port "wbs_dat_i[8]" 638 41894 -800 42006 480 m2
+port "wbs_adr_i[8]" 605 40712 -800 40824 480 m2
+port "wbs_dat_o[7]" 669 39530 -800 39642 480 m2
+port "wbs_dat_i[7]" 637 38348 -800 38460 480 m2
+port "wbs_adr_i[7]" 604 37166 -800 37278 480 m2
+port "wbs_dat_o[6]" 668 35984 -800 36096 480 m2
+port "wbs_dat_i[6]" 636 34802 -800 34914 480 m2
+port "wbs_adr_i[6]" 603 33620 -800 33732 480 m2
+port "wbs_dat_o[5]" 667 32438 -800 32550 480 m2
+port "wbs_dat_i[5]" 635 31256 -800 31368 480 m2
+port "wbs_adr_i[5]" 602 30074 -800 30186 480 m2
+port "wbs_dat_o[4]" 666 28892 -800 29004 480 m2
+port "wbs_dat_i[4]" 634 27710 -800 27822 480 m2
+port "wbs_adr_i[4]" 601 26528 -800 26640 480 m2
+port "wbs_sel_i[3]" 675 25346 -800 25458 480 m2
+port "wbs_dat_o[3]" 665 24164 -800 24276 480 m2
+port "wbs_dat_i[3]" 633 22982 -800 23094 480 m2
+port "wbs_adr_i[3]" 600 21800 -800 21912 480 m2
+port "wbs_sel_i[2]" 674 20618 -800 20730 480 m2
+port "wbs_dat_o[2]" 662 19436 -800 19548 480 m2
+port "wbs_dat_i[2]" 630 18254 -800 18366 480 m2
+port "wbs_adr_i[2]" 597 17072 -800 17184 480 m2
+port "wbs_sel_i[1]" 673 15890 -800 16002 480 m2
+port "wbs_dat_o[1]" 651 14708 -800 14820 480 m2
+port "wbs_dat_i[1]" 619 13526 -800 13638 480 m2
+port "wbs_adr_i[1]" 586 12344 -800 12456 480 m2
+port "wbs_sel_i[0]" 672 11162 -800 11274 480 m2
+port "wbs_dat_o[0]" 640 9980 -800 10092 480 m2
+port "wbs_dat_i[0]" 608 8798 -800 8910 480 m2
+port "wbs_adr_i[0]" 575 7616 -800 7728 480 m2
+port "wbs_we_i" 677 6434 -800 6546 480 m2
+port "wbs_stb_i" 676 5252 -800 5364 480 m2
+port "wbs_cyc_i" 607 4070 -800 4182 480 m2
+port "wbs_ack_o" 574 2888 -800 3000 480 m2
+port "wb_rst_i" 573 1706 -800 1818 480 m2
+port "wb_clk_i" 572 524 -800 636 480 m2
+port "vssa1" 563 510594 702340 515394 704800 m3
+port "vssa1" 562 520594 702340 525394 704800 m3
+port "io_analog[1]" 38 566594 702300 571594 704800 m3
+node "io_analog[4]" 0 2925 329294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[4]" 0 2925 318994 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[5]" 0 2925 227594 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[5]" 0 2925 217294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[6]" 0 2925 175894 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[6]" 0 2925 165594 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[4]" 0 2775 329294 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[4]" 0 2775 318994 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[5]" 0 2775 227594 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[5]" 0 2775 217294 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[6]" 0 2775 175894 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[6]" 0 2775 165594 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_in_3v3[0]" 1 613.728 583520 1544 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[26]" 1 613.728 -800 1544 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[0]" 1 613.728 583520 2726 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[26]" 1 613.728 -800 2726 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[0]" 1 613.728 583520 3908 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[26]" 1 613.728 -800 3908 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[0]" 1 613.728 583520 5090 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[26]" 1 613.728 -800 5090 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[1]" 1 613.728 583520 6272 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[25]" 1 613.728 -800 6272 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[1]" 1 613.728 583520 7454 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[25]" 1 613.728 -800 7454 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[1]" 1 613.728 583520 8636 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[25]" 1 613.728 -800 8636 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[1]" 1 613.728 583520 9818 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[25]" 1 613.728 -800 9818 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[2]" 1 613.728 583520 11000 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[24]" 1 613.728 -800 11000 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[2]" 1 613.728 583520 12182 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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diff --git a/mag/user_analog_project_wrapper.gds b/mag/user_analog_project_wrapper.gds
new file mode 100644
index 0000000..a6741cf
--- /dev/null
+++ b/mag/user_analog_project_wrapper.gds
Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
new file mode 100644
index 0000000..e0b7cc4
--- /dev/null
+++ b/mag/user_analog_project_wrapper.mag
@@ -0,0 +1,2197 @@
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+rect 259711 -400 259767 240
+rect 260302 -400 260358 240
+rect 260893 -400 260949 240
+rect 261484 -400 261540 240
+rect 262075 -400 262131 240
+rect 262666 -400 262722 240
+rect 263257 -400 263313 240
+rect 263848 -400 263904 240
+rect 264439 -400 264495 240
+rect 265030 -400 265086 240
+rect 265621 -400 265677 240
+rect 266212 -400 266268 240
+rect 266803 -400 266859 240
+rect 267394 -400 267450 240
+rect 267985 -400 268041 240
+rect 268576 -400 268632 240
+rect 269167 -400 269223 240
+rect 269758 -400 269814 240
+rect 270349 -400 270405 240
+rect 270940 -400 270996 240
+rect 271531 -400 271587 240
+rect 272122 -400 272178 240
+rect 272713 -400 272769 240
+rect 273304 -400 273360 240
+rect 273895 -400 273951 240
+rect 274486 -400 274542 240
+rect 275077 -400 275133 240
+rect 275668 -400 275724 240
+rect 276259 -400 276315 240
+rect 276850 -400 276906 240
+rect 277441 -400 277497 240
+rect 278032 -400 278088 240
+rect 278623 -400 278679 240
+rect 279214 -400 279270 240
+rect 279805 -400 279861 240
+rect 280396 -400 280452 240
+rect 280987 -400 281043 240
+rect 281578 -400 281634 240
+rect 282169 -400 282225 240
+rect 282760 -400 282816 240
+rect 283351 -400 283407 240
+rect 283942 -400 283998 240
+rect 284533 -400 284589 240
+rect 285124 -400 285180 240
+rect 285715 -400 285771 240
+rect 286306 -400 286362 240
+rect 286897 -400 286953 240
+rect 287488 -400 287544 240
+rect 288079 -400 288135 240
+rect 288670 -400 288726 240
+rect 289261 -400 289317 240
+rect 289852 -400 289908 240
+rect 290443 -400 290499 240
+rect 291034 -400 291090 240
+rect 291625 -400 291681 240
+<< via2 >>
+rect 255963 338246 257036 339235
+rect 221161 270289 221793 270883
+<< metal3 >>
+rect 8097 351150 10597 352400
+rect 34097 351150 36597 352400
+rect 60097 351150 62597 352400
+rect 82797 351150 85297 352400
+rect 85447 351150 86547 352400
+rect 86697 351150 87797 352400
+rect 87947 351150 90447 352400
+rect 108647 351150 111147 352400
+rect 111297 351150 112397 352400
+rect 112547 351150 113647 352400
+rect 113797 351150 116297 352400
+rect 159497 351150 161997 352400
+rect 162147 351150 163247 352400
+rect 163397 351150 164497 352400
+rect 164647 351150 167147 352400
+rect 206697 351150 209197 352400
+rect 232697 351150 235197 352400
+rect 255297 351170 257697 352400
+rect 260297 351170 262697 352400
+rect -400 340121 850 342621
+rect 207499 334019 208499 351150
+rect 207498 333570 208499 334019
+rect 207498 332497 207740 333570
+rect 208279 333491 208499 333570
+rect 208279 332497 208495 333491
+rect 207498 331810 208495 332497
+rect 233502 325002 234502 351150
+rect 256000 339524 257000 351170
+rect 255507 339493 257511 339524
+rect 260999 339493 261999 351170
+rect 283297 351150 285797 352400
+rect 255507 339235 261999 339493
+rect 255507 338246 255963 339235
+rect 257036 339002 261999 339235
+rect 257036 338493 261987 339002
+rect 257036 338246 257511 338493
+rect 255507 337981 257511 338246
+rect 283996 334498 284996 351150
+rect 291150 338992 292400 341492
+rect 249995 334350 284996 334498
+rect 249995 333656 250149 334350
+rect 250846 333656 284996 334350
+rect 249995 333498 284996 333656
+rect 233502 324652 234503 325002
+rect -400 321921 830 324321
+rect 233502 323711 233727 324652
+rect 233503 323284 233727 323711
+rect 234235 323284 234503 324652
+rect 233503 323002 234503 323284
+rect 291170 319892 292400 322292
+rect -400 316921 830 319321
+rect 291170 314892 292400 317292
+rect 291760 294736 292400 294792
+rect 291760 294145 292400 294201
+rect 291760 293554 292400 293610
+rect 291760 292963 292400 293019
+rect 291760 292372 292400 292428
+rect 291760 291781 292400 291837
+rect -400 279721 830 282121
+rect -400 274721 830 277121
+rect 291170 275281 292400 277681
+rect 221001 270883 222008 271221
+rect 221001 270289 221161 270883
+rect 221793 270289 222008 270883
+rect 221001 269990 222008 270289
+rect 291170 270281 292400 272681
+rect -400 255765 240 255821
+rect -400 255174 240 255230
+rect -400 254583 240 254639
+rect -400 253992 240 254048
+rect -400 253401 240 253457
+rect -400 252810 240 252866
+rect 291760 250025 292400 250081
+rect 291760 249434 292400 249490
+rect 291760 248843 292400 248899
+rect 291760 248252 292400 248308
+rect 291760 247661 292400 247717
+rect 291760 247070 292400 247126
+rect -400 234154 240 234210
+rect -400 233563 240 233619
+rect -400 232972 240 233028
+rect -400 232381 240 232437
+rect -400 231790 240 231846
+rect -400 231199 240 231255
+rect 291760 227814 292400 227870
+rect 291760 227223 292400 227279
+rect 291760 226632 292400 226688
+rect 291760 226041 292400 226097
+rect 291760 225450 292400 225506
+rect 291760 224859 292400 224915
+rect -400 212543 240 212599
+rect -400 211952 240 212008
+rect -400 211361 240 211417
+rect -400 210770 240 210826
+rect -400 210179 240 210235
+rect -400 209588 240 209644
+rect 291760 205603 292400 205659
+rect 291760 205012 292400 205068
+rect 291760 204421 292400 204477
+rect 291760 203830 292400 203886
+rect 291760 203239 292400 203295
+rect 291760 202648 292400 202704
+rect -400 190932 240 190988
+rect -400 190341 240 190397
+rect -400 189750 240 189806
+rect -400 189159 240 189215
+rect -400 188568 240 188624
+rect -400 187977 240 188033
+rect 291760 182392 292400 182448
+rect 291760 181801 292400 181857
+rect 291760 181210 292400 181266
+rect 291760 180619 292400 180675
+rect 291760 180028 292400 180084
+rect 291760 179437 292400 179493
+rect -400 169321 240 169377
+rect -400 168730 240 168786
+rect -400 168139 240 168195
+rect -400 167548 240 167604
+rect -400 166957 240 167013
+rect -400 166366 240 166422
+rect 291760 159781 292400 159837
+rect 291760 159190 292400 159246
+rect 291760 158599 292400 158655
+rect 291760 158008 292400 158064
+rect 291760 157417 292400 157473
+rect 291760 156826 292400 156882
+rect -400 147710 240 147766
+rect -400 147119 240 147175
+rect -400 146528 240 146584
+rect -400 145937 240 145993
+rect -400 145346 240 145402
+rect -400 144755 240 144811
+rect 291760 137570 292400 137626
+rect 291760 136979 292400 137035
+rect 291760 136388 292400 136444
+rect 291760 135797 292400 135853
+rect 291760 135206 292400 135262
+rect 291760 134615 292400 134671
+rect -400 126199 240 126255
+rect -400 125608 240 125664
+rect -400 125017 240 125073
+rect -400 124426 240 124482
+rect -400 123835 240 123891
+rect -400 123244 240 123300
+rect 291170 117615 292400 120015
+rect 291170 112615 292400 115015
+rect -400 107444 830 109844
+rect -400 102444 830 104844
+rect 291170 95715 292400 98115
+rect 291170 90715 292400 93115
+rect -400 86444 830 88844
+rect -400 81444 830 83844
+rect 291170 73415 292400 75815
+rect 291170 68415 292400 70815
+rect -400 62388 240 62444
+rect -400 61797 240 61853
+rect -400 61206 240 61262
+rect -400 60615 240 60671
+rect -400 60024 240 60080
+rect -400 59433 240 59489
+rect 291760 47559 292400 47615
+rect 291760 46968 292400 47024
+rect 291760 46377 292400 46433
+rect 291760 45786 292400 45842
+rect -400 40777 240 40833
+rect -400 40186 240 40242
+rect -400 39595 240 39651
+rect -400 39004 240 39060
+rect -400 38413 240 38469
+rect -400 37822 240 37878
+rect 291760 25230 292400 25286
+rect 291760 24639 292400 24695
+rect 291760 24048 292400 24104
+rect 291760 23457 292400 23513
+rect -400 19166 240 19222
+rect -400 18575 240 18631
+rect -400 17984 240 18040
+rect -400 17393 240 17449
+rect -400 16802 240 16858
+rect -400 16211 240 16267
+rect 291760 12001 292400 12057
+rect 291760 11410 292400 11466
+rect 291760 10819 292400 10875
+rect 291760 10228 292400 10284
+rect 291760 9637 292400 9693
+rect 291760 9046 292400 9102
+rect -400 8455 240 8511
+rect 291760 8455 292400 8511
+rect -400 7864 240 7920
+rect 291760 7864 292400 7920
+rect -400 7273 240 7329
+rect 291760 7273 292400 7329
+rect -400 6682 240 6738
+rect 291760 6682 292400 6738
+rect -400 6091 240 6147
+rect 291760 6091 292400 6147
+rect -400 5500 240 5556
+rect 291760 5500 292400 5556
+rect -400 4909 240 4965
+rect 291760 4909 292400 4965
+rect -400 4318 240 4374
+rect 291760 4318 292400 4374
+rect -400 3727 240 3783
+rect 291760 3727 292400 3783
+rect -400 3136 240 3192
+rect 291760 3136 292400 3192
+rect -400 2545 240 2601
+rect 291760 2545 292400 2601
+rect -400 1954 240 2010
+rect 291760 1954 292400 2010
+rect -400 1363 240 1419
+rect 291760 1363 292400 1419
+rect -400 772 240 828
+rect 291760 772 292400 828
+<< via3 >>
+rect 207740 332497 208279 333570
+rect 250149 333656 250846 334350
+rect 233727 323284 234235 324652
+rect 221161 270289 221793 270883
+<< metal4 >>
+rect 82797 351150 85297 352400
+rect 87947 351150 90447 352400
+rect 108647 351150 111147 352400
+rect 113797 351150 116297 352400
+rect 159497 351150 161997 352400
+rect 164647 351150 167147 352400
+rect 249995 334350 250995 334502
+rect 207498 333570 208495 334019
+rect 207498 332497 207740 333570
+rect 208279 332497 208495 333570
+rect 207498 331989 208495 332497
+rect 249995 333656 250149 334350
+rect 250846 333656 250995 334350
+rect 207497 274119 208497 331989
+rect 233503 324652 234503 325002
+rect 233503 323284 233727 324652
+rect 234235 323994 234503 324652
+rect 234235 323284 234505 323994
+rect 233503 323002 234505 323284
+rect 233505 289994 234502 323002
+rect 249995 305139 250995 333656
+rect 249995 304502 250998 305139
+rect 207497 273991 208522 274119
+rect 213717 273991 214717 277991
+rect 207497 272991 214717 273991
+rect 225002 273994 226002 277994
+rect 233505 273994 234505 289994
+rect 249998 278028 250998 304502
+rect 249998 275985 251009 278028
+rect 225002 272994 234505 273994
+rect 233004 272990 233508 272994
+rect 250009 271279 251009 275985
+rect 221001 270997 222008 271221
+rect 250008 271028 251009 271279
+rect 250008 270998 251000 271028
+rect 230500 270997 251000 270998
+rect 221001 270883 251000 270997
+rect 221001 270289 221161 270883
+rect 221793 270289 251000 270883
+rect 221001 269998 251000 270289
+rect 221001 269997 231010 269998
+rect 221001 269990 222008 269997
+<< metal5 >>
+rect 82797 351150 85297 352400
+rect 87947 351150 90447 352400
+rect 108647 351150 111147 352400
+rect 113797 351150 116297 352400
+rect 159497 351150 161997 352400
+rect 164647 351150 167147 352400
+<< comment >>
+rect -50 352000 292050 352050
+rect -50 0 0 352000
+rect 292000 0 292050 352000
+rect -50 -50 292050 0
+use detV2 *detV2_0
+timestamp 1647797958
+transform 1 0 244450 0 1 290645
+box -32487 -13471 -12750 -1496
+<< labels >>
+flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0]
+port 0 nsew signal bidirectional
+flabel metal3 s -400 190932 240 190988 0 FreeSans 560 0 0 0 gpio_analog[10]
+port 1 nsew signal bidirectional
+flabel metal3 s -400 169321 240 169377 0 FreeSans 560 0 0 0 gpio_analog[11]
+port 2 nsew signal bidirectional
+flabel metal3 s -400 147710 240 147766 0 FreeSans 560 0 0 0 gpio_analog[12]
+port 3 nsew signal bidirectional
+flabel metal3 s -400 126199 240 126255 0 FreeSans 560 0 0 0 gpio_analog[13]
+port 4 nsew signal bidirectional
+flabel metal3 s -400 62388 240 62444 0 FreeSans 560 0 0 0 gpio_analog[14]
+port 5 nsew signal bidirectional
+flabel metal3 s -400 40777 240 40833 0 FreeSans 560 0 0 0 gpio_analog[15]
+port 6 nsew signal bidirectional
+flabel metal3 s -400 19166 240 19222 0 FreeSans 560 0 0 0 gpio_analog[16]
+port 7 nsew signal bidirectional
+flabel metal3 s -400 8455 240 8511 0 FreeSans 560 0 0 0 gpio_analog[17]
+port 8 nsew signal bidirectional
+flabel metal3 s 291760 156826 292400 156882 0 FreeSans 560 0 0 0 gpio_analog[1]
+port 9 nsew signal bidirectional
+flabel metal3 s 291760 179437 292400 179493 0 FreeSans 560 0 0 0 gpio_analog[2]
+port 10 nsew signal bidirectional
+flabel metal3 s 291760 202648 292400 202704 0 FreeSans 560 0 0 0 gpio_analog[3]
+port 11 nsew signal bidirectional
+flabel metal3 s 291760 224859 292400 224915 0 FreeSans 560 0 0 0 gpio_analog[4]
+port 12 nsew signal bidirectional
+flabel metal3 s 291760 247070 292400 247126 0 FreeSans 560 0 0 0 gpio_analog[5]
+port 13 nsew signal bidirectional
+flabel metal3 s 291760 291781 292400 291837 0 FreeSans 560 0 0 0 gpio_analog[6]
+port 14 nsew signal bidirectional
+flabel metal3 s -400 255765 240 255821 0 FreeSans 560 0 0 0 gpio_analog[7]
+port 15 nsew signal bidirectional
+flabel metal3 s -400 234154 240 234210 0 FreeSans 560 0 0 0 gpio_analog[8]
+port 16 nsew signal bidirectional
+flabel metal3 s -400 212543 240 212599 0 FreeSans 560 0 0 0 gpio_analog[9]
+port 17 nsew signal bidirectional
+flabel metal3 s 291760 135206 292400 135262 0 FreeSans 560 0 0 0 gpio_noesd[0]
+port 18 nsew signal bidirectional
+flabel metal3 s -400 190341 240 190397 0 FreeSans 560 0 0 0 gpio_noesd[10]
+port 19 nsew signal bidirectional
+flabel metal3 s -400 168730 240 168786 0 FreeSans 560 0 0 0 gpio_noesd[11]
+port 20 nsew signal bidirectional
+flabel metal3 s -400 147119 240 147175 0 FreeSans 560 0 0 0 gpio_noesd[12]
+port 21 nsew signal bidirectional
+flabel metal3 s -400 125608 240 125664 0 FreeSans 560 0 0 0 gpio_noesd[13]
+port 22 nsew signal bidirectional
+flabel metal3 s -400 61797 240 61853 0 FreeSans 560 0 0 0 gpio_noesd[14]
+port 23 nsew signal bidirectional
+flabel metal3 s -400 40186 240 40242 0 FreeSans 560 0 0 0 gpio_noesd[15]
+port 24 nsew signal bidirectional
+flabel metal3 s -400 18575 240 18631 0 FreeSans 560 0 0 0 gpio_noesd[16]
+port 25 nsew signal bidirectional
+flabel metal3 s -400 7864 240 7920 0 FreeSans 560 0 0 0 gpio_noesd[17]
+port 26 nsew signal bidirectional
+flabel metal3 s 291760 157417 292400 157473 0 FreeSans 560 0 0 0 gpio_noesd[1]
+port 27 nsew signal bidirectional
+flabel metal3 s 291760 180028 292400 180084 0 FreeSans 560 0 0 0 gpio_noesd[2]
+port 28 nsew signal bidirectional
+flabel metal3 s 291760 203239 292400 203295 0 FreeSans 560 0 0 0 gpio_noesd[3]
+port 29 nsew signal bidirectional
+flabel metal3 s 291760 225450 292400 225506 0 FreeSans 560 0 0 0 gpio_noesd[4]
+port 30 nsew signal bidirectional
+flabel metal3 s 291760 247661 292400 247717 0 FreeSans 560 0 0 0 gpio_noesd[5]
+port 31 nsew signal bidirectional
+flabel metal3 s 291760 292372 292400 292428 0 FreeSans 560 0 0 0 gpio_noesd[6]
+port 32 nsew signal bidirectional
+flabel metal3 s -400 255174 240 255230 0 FreeSans 560 0 0 0 gpio_noesd[7]
+port 33 nsew signal bidirectional
+flabel metal3 s -400 233563 240 233619 0 FreeSans 560 0 0 0 gpio_noesd[8]
+port 34 nsew signal bidirectional
+flabel metal3 s -400 211952 240 212008 0 FreeSans 560 0 0 0 gpio_noesd[9]
+port 35 nsew signal bidirectional
+flabel metal3 s 291150 338992 292400 341492 0 FreeSans 560 0 0 0 io_analog[0]
+port 36 nsew signal bidirectional
+flabel metal3 s 0 340121 850 342621 0 FreeSans 560 0 0 0 io_analog[10]
+port 37 nsew signal bidirectional
+flabel metal3 s 283297 351150 285797 352400 0 FreeSans 960 180 0 0 io_analog[1]
+port 38 nsew signal bidirectional
+flabel metal3 s 232697 351150 235197 352400 0 FreeSans 960 180 0 0 io_analog[2]
+port 39 nsew signal bidirectional
+flabel metal3 s 206697 351150 209197 352400 0 FreeSans 960 180 0 0 io_analog[3]
+port 40 nsew signal bidirectional
+flabel metal3 s 164647 351150 167147 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal4 s 164647 351150 167147 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal5 s 164647 351150 167147 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal3 s 113797 351150 116297 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal4 s 113797 351150 116297 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal5 s 113797 351150 116297 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal3 s 87947 351150 90447 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal4 s 87947 351150 90447 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal5 s 87947 351150 90447 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal3 s 60097 351150 62597 352400 0 FreeSans 960 180 0 0 io_analog[7]
+port 44 nsew signal bidirectional
+flabel metal3 s 34097 351150 36597 352400 0 FreeSans 960 180 0 0 io_analog[8]
+port 45 nsew signal bidirectional
+flabel metal3 s 8097 351150 10597 352400 0 FreeSans 960 180 0 0 io_analog[9]
+port 46 nsew signal bidirectional
+flabel metal3 s 159497 351150 161997 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal4 s 159497 351150 161997 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal5 s 159497 351150 161997 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal3 s 108647 351150 111147 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal4 s 108647 351150 111147 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal5 s 108647 351150 111147 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal3 s 82797 351150 85297 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal4 s 82797 351150 85297 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal5 s 82797 351150 85297 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal3 s 163397 351150 164497 352400 0 FreeSans 960 180 0 0 io_clamp_high[0]
+port 50 nsew signal bidirectional
+flabel metal3 s 112547 351150 113647 352400 0 FreeSans 960 180 0 0 io_clamp_high[1]
+port 51 nsew signal bidirectional
+flabel metal3 s 86697 351150 87797 352400 0 FreeSans 960 180 0 0 io_clamp_high[2]
+port 52 nsew signal bidirectional
+flabel metal3 s 162147 351150 163247 352400 0 FreeSans 960 180 0 0 io_clamp_low[0]
+port 53 nsew signal bidirectional
+flabel metal3 s 111297 351150 112397 352400 0 FreeSans 960 180 0 0 io_clamp_low[1]
+port 54 nsew signal bidirectional
+flabel metal3 s 85447 351150 86547 352400 0 FreeSans 960 180 0 0 io_clamp_low[2]
+port 55 nsew signal bidirectional
+flabel metal3 s 291760 1363 292400 1419 0 FreeSans 560 0 0 0 io_in[0]
+port 56 nsew signal input
+flabel metal3 s 291760 204421 292400 204477 0 FreeSans 560 0 0 0 io_in[10]
+port 57 nsew signal input
+flabel metal3 s 291760 226632 292400 226688 0 FreeSans 560 0 0 0 io_in[11]
+port 58 nsew signal input
+flabel metal3 s 291760 248843 292400 248899 0 FreeSans 560 0 0 0 io_in[12]
+port 59 nsew signal input
+flabel metal3 s 291760 293554 292400 293610 0 FreeSans 560 0 0 0 io_in[13]
+port 60 nsew signal input
+flabel metal3 s -400 253992 240 254048 0 FreeSans 560 0 0 0 io_in[14]
+port 61 nsew signal input
+flabel metal3 s -400 232381 240 232437 0 FreeSans 560 0 0 0 io_in[15]
+port 62 nsew signal input
+flabel metal3 s -400 210770 240 210826 0 FreeSans 560 0 0 0 io_in[16]
+port 63 nsew signal input
+flabel metal3 s -400 189159 240 189215 0 FreeSans 560 0 0 0 io_in[17]
+port 64 nsew signal input
+flabel metal3 s -400 167548 240 167604 0 FreeSans 560 0 0 0 io_in[18]
+port 65 nsew signal input
+flabel metal3 s -400 145937 240 145993 0 FreeSans 560 0 0 0 io_in[19]
+port 66 nsew signal input
+flabel metal3 s 291760 3727 292400 3783 0 FreeSans 560 0 0 0 io_in[1]
+port 67 nsew signal input
+flabel metal3 s -400 124426 240 124482 0 FreeSans 560 0 0 0 io_in[20]
+port 68 nsew signal input
+flabel metal3 s -400 60615 240 60671 0 FreeSans 560 0 0 0 io_in[21]
+port 69 nsew signal input
+flabel metal3 s -400 39004 240 39060 0 FreeSans 560 0 0 0 io_in[22]
+port 70 nsew signal input
+flabel metal3 s -400 17393 240 17449 0 FreeSans 560 0 0 0 io_in[23]
+port 71 nsew signal input
+flabel metal3 s -400 6682 240 6738 0 FreeSans 560 0 0 0 io_in[24]
+port 72 nsew signal input
+flabel metal3 s -400 4318 240 4374 0 FreeSans 560 0 0 0 io_in[25]
+port 73 nsew signal input
+flabel metal3 s -400 1954 240 2010 0 FreeSans 560 0 0 0 io_in[26]
+port 74 nsew signal input
+flabel metal3 s 291760 6091 292400 6147 0 FreeSans 560 0 0 0 io_in[2]
+port 75 nsew signal input
+flabel metal3 s 291760 8455 292400 8511 0 FreeSans 560 0 0 0 io_in[3]
+port 76 nsew signal input
+flabel metal3 s 291760 10819 292400 10875 0 FreeSans 560 0 0 0 io_in[4]
+port 77 nsew signal input
+flabel metal3 s 291760 24048 292400 24104 0 FreeSans 560 0 0 0 io_in[5]
+port 78 nsew signal input
+flabel metal3 s 291760 46377 292400 46433 0 FreeSans 560 0 0 0 io_in[6]
+port 79 nsew signal input
+flabel metal3 s 291760 136388 292400 136444 0 FreeSans 560 0 0 0 io_in[7]
+port 80 nsew signal input
+flabel metal3 s 291760 158599 292400 158655 0 FreeSans 560 0 0 0 io_in[8]
+port 81 nsew signal input
+flabel metal3 s 291760 181210 292400 181266 0 FreeSans 560 0 0 0 io_in[9]
+port 82 nsew signal input
+flabel metal3 s 291760 772 292400 828 0 FreeSans 560 0 0 0 io_in_3v3[0]
+port 83 nsew signal input
+flabel metal3 s 291760 203830 292400 203886 0 FreeSans 560 0 0 0 io_in_3v3[10]
+port 84 nsew signal input
+flabel metal3 s 291760 226041 292400 226097 0 FreeSans 560 0 0 0 io_in_3v3[11]
+port 85 nsew signal input
+flabel metal3 s 291760 248252 292400 248308 0 FreeSans 560 0 0 0 io_in_3v3[12]
+port 86 nsew signal input
+flabel metal3 s 291760 292963 292400 293019 0 FreeSans 560 0 0 0 io_in_3v3[13]
+port 87 nsew signal input
+flabel metal3 s -400 254583 240 254639 0 FreeSans 560 0 0 0 io_in_3v3[14]
+port 88 nsew signal input
+flabel metal3 s -400 232972 240 233028 0 FreeSans 560 0 0 0 io_in_3v3[15]
+port 89 nsew signal input
+flabel metal3 s -400 211361 240 211417 0 FreeSans 560 0 0 0 io_in_3v3[16]
+port 90 nsew signal input
+flabel metal3 s -400 189750 240 189806 0 FreeSans 560 0 0 0 io_in_3v3[17]
+port 91 nsew signal input
+flabel metal3 s -400 168139 240 168195 0 FreeSans 560 0 0 0 io_in_3v3[18]
+port 92 nsew signal input
+flabel metal3 s -400 146528 240 146584 0 FreeSans 560 0 0 0 io_in_3v3[19]
+port 93 nsew signal input
+flabel metal3 s 291760 3136 292400 3192 0 FreeSans 560 0 0 0 io_in_3v3[1]
+port 94 nsew signal input
+flabel metal3 s -400 125017 240 125073 0 FreeSans 560 0 0 0 io_in_3v3[20]
+port 95 nsew signal input
+flabel metal3 s -400 61206 240 61262 0 FreeSans 560 0 0 0 io_in_3v3[21]
+port 96 nsew signal input
+flabel metal3 s -400 39595 240 39651 0 FreeSans 560 0 0 0 io_in_3v3[22]
+port 97 nsew signal input
+flabel metal3 s -400 17984 240 18040 0 FreeSans 560 0 0 0 io_in_3v3[23]
+port 98 nsew signal input
+flabel metal3 s -400 7273 240 7329 0 FreeSans 560 0 0 0 io_in_3v3[24]
+port 99 nsew signal input
+flabel metal3 s -400 4909 240 4965 0 FreeSans 560 0 0 0 io_in_3v3[25]
+port 100 nsew signal input
+flabel metal3 s -400 2545 240 2601 0 FreeSans 560 0 0 0 io_in_3v3[26]
+port 101 nsew signal input
+flabel metal3 s 291760 5500 292400 5556 0 FreeSans 560 0 0 0 io_in_3v3[2]
+port 102 nsew signal input
+flabel metal3 s 291760 7864 292400 7920 0 FreeSans 560 0 0 0 io_in_3v3[3]
+port 103 nsew signal input
+flabel metal3 s 291760 10228 292400 10284 0 FreeSans 560 0 0 0 io_in_3v3[4]
+port 104 nsew signal input
+flabel metal3 s 291760 23457 292400 23513 0 FreeSans 560 0 0 0 io_in_3v3[5]
+port 105 nsew signal input
+flabel metal3 s 291760 45786 292400 45842 0 FreeSans 560 0 0 0 io_in_3v3[6]
+port 106 nsew signal input
+flabel metal3 s 291760 135797 292400 135853 0 FreeSans 560 0 0 0 io_in_3v3[7]
+port 107 nsew signal input
+flabel metal3 s 291760 158008 292400 158064 0 FreeSans 560 0 0 0 io_in_3v3[8]
+port 108 nsew signal input
+flabel metal3 s 291760 180619 292400 180675 0 FreeSans 560 0 0 0 io_in_3v3[9]
+port 109 nsew signal input
+flabel metal3 s 291760 2545 292400 2601 0 FreeSans 560 0 0 0 io_oeb[0]
+port 110 nsew signal tristate
+flabel metal3 s 291760 205603 292400 205659 0 FreeSans 560 0 0 0 io_oeb[10]
+port 111 nsew signal tristate
+flabel metal3 s 291760 227814 292400 227870 0 FreeSans 560 0 0 0 io_oeb[11]
+port 112 nsew signal tristate
+flabel metal3 s 291760 250025 292400 250081 0 FreeSans 560 0 0 0 io_oeb[12]
+port 113 nsew signal tristate
+flabel metal3 s 291760 294736 292400 294792 0 FreeSans 560 0 0 0 io_oeb[13]
+port 114 nsew signal tristate
+flabel metal3 s -400 252810 240 252866 0 FreeSans 560 0 0 0 io_oeb[14]
+port 115 nsew signal tristate
+flabel metal3 s -400 231199 240 231255 0 FreeSans 560 0 0 0 io_oeb[15]
+port 116 nsew signal tristate
+flabel metal3 s -400 209588 240 209644 0 FreeSans 560 0 0 0 io_oeb[16]
+port 117 nsew signal tristate
+flabel metal3 s -400 187977 240 188033 0 FreeSans 560 0 0 0 io_oeb[17]
+port 118 nsew signal tristate
+flabel metal3 s -400 166366 240 166422 0 FreeSans 560 0 0 0 io_oeb[18]
+port 119 nsew signal tristate
+flabel metal3 s -400 144755 240 144811 0 FreeSans 560 0 0 0 io_oeb[19]
+port 120 nsew signal tristate
+flabel metal3 s 291760 4909 292400 4965 0 FreeSans 560 0 0 0 io_oeb[1]
+port 121 nsew signal tristate
+flabel metal3 s -400 123244 240 123300 0 FreeSans 560 0 0 0 io_oeb[20]
+port 122 nsew signal tristate
+flabel metal3 s -400 59433 240 59489 0 FreeSans 560 0 0 0 io_oeb[21]
+port 123 nsew signal tristate
+flabel metal3 s -400 37822 240 37878 0 FreeSans 560 0 0 0 io_oeb[22]
+port 124 nsew signal tristate
+flabel metal3 s -400 16211 240 16267 0 FreeSans 560 0 0 0 io_oeb[23]
+port 125 nsew signal tristate
+flabel metal3 s -400 5500 240 5556 0 FreeSans 560 0 0 0 io_oeb[24]
+port 126 nsew signal tristate
+flabel metal3 s -400 3136 240 3192 0 FreeSans 560 0 0 0 io_oeb[25]
+port 127 nsew signal tristate
+flabel metal3 s -400 772 240 828 0 FreeSans 560 0 0 0 io_oeb[26]
+port 128 nsew signal tristate
+flabel metal3 s 291760 7273 292400 7329 0 FreeSans 560 0 0 0 io_oeb[2]
+port 129 nsew signal tristate
+flabel metal3 s 291760 9637 292400 9693 0 FreeSans 560 0 0 0 io_oeb[3]
+port 130 nsew signal tristate
+flabel metal3 s 291760 12001 292400 12057 0 FreeSans 560 0 0 0 io_oeb[4]
+port 131 nsew signal tristate
+flabel metal3 s 291760 25230 292400 25286 0 FreeSans 560 0 0 0 io_oeb[5]
+port 132 nsew signal tristate
+flabel metal3 s 291760 47559 292400 47615 0 FreeSans 560 0 0 0 io_oeb[6]
+port 133 nsew signal tristate
+flabel metal3 s 291760 137570 292400 137626 0 FreeSans 560 0 0 0 io_oeb[7]
+port 134 nsew signal tristate
+flabel metal3 s 291760 159781 292400 159837 0 FreeSans 560 0 0 0 io_oeb[8]
+port 135 nsew signal tristate
+flabel metal3 s 291760 182392 292400 182448 0 FreeSans 560 0 0 0 io_oeb[9]
+port 136 nsew signal tristate
+flabel metal3 s 291760 1954 292400 2010 0 FreeSans 560 0 0 0 io_out[0]
+port 137 nsew signal tristate
+flabel metal3 s 291760 205012 292400 205068 0 FreeSans 560 0 0 0 io_out[10]
+port 138 nsew signal tristate
+flabel metal3 s 291760 227223 292400 227279 0 FreeSans 560 0 0 0 io_out[11]
+port 139 nsew signal tristate
+flabel metal3 s 291760 249434 292400 249490 0 FreeSans 560 0 0 0 io_out[12]
+port 140 nsew signal tristate
+flabel metal3 s 291760 294145 292400 294201 0 FreeSans 560 0 0 0 io_out[13]
+port 141 nsew signal tristate
+flabel metal3 s -400 253401 240 253457 0 FreeSans 560 0 0 0 io_out[14]
+port 142 nsew signal tristate
+flabel metal3 s -400 231790 240 231846 0 FreeSans 560 0 0 0 io_out[15]
+port 143 nsew signal tristate
+flabel metal3 s -400 210179 240 210235 0 FreeSans 560 0 0 0 io_out[16]
+port 144 nsew signal tristate
+flabel metal3 s -400 188568 240 188624 0 FreeSans 560 0 0 0 io_out[17]
+port 145 nsew signal tristate
+flabel metal3 s -400 166957 240 167013 0 FreeSans 560 0 0 0 io_out[18]
+port 146 nsew signal tristate
+flabel metal3 s -400 145346 240 145402 0 FreeSans 560 0 0 0 io_out[19]
+port 147 nsew signal tristate
+flabel metal3 s 291760 4318 292400 4374 0 FreeSans 560 0 0 0 io_out[1]
+port 148 nsew signal tristate
+flabel metal3 s -400 123835 240 123891 0 FreeSans 560 0 0 0 io_out[20]
+port 149 nsew signal tristate
+flabel metal3 s -400 60024 240 60080 0 FreeSans 560 0 0 0 io_out[21]
+port 150 nsew signal tristate
+flabel metal3 s -400 38413 240 38469 0 FreeSans 560 0 0 0 io_out[22]
+port 151 nsew signal tristate
+flabel metal3 s -400 16802 240 16858 0 FreeSans 560 0 0 0 io_out[23]
+port 152 nsew signal tristate
+flabel metal3 s -400 6091 240 6147 0 FreeSans 560 0 0 0 io_out[24]
+port 153 nsew signal tristate
+flabel metal3 s -400 3727 240 3783 0 FreeSans 560 0 0 0 io_out[25]
+port 154 nsew signal tristate
+flabel metal3 s -400 1363 240 1419 0 FreeSans 560 0 0 0 io_out[26]
+port 155 nsew signal tristate
+flabel metal3 s 291760 6682 292400 6738 0 FreeSans 560 0 0 0 io_out[2]
+port 156 nsew signal tristate
+flabel metal3 s 291760 9046 292400 9102 0 FreeSans 560 0 0 0 io_out[3]
+port 157 nsew signal tristate
+flabel metal3 s 291760 11410 292400 11466 0 FreeSans 560 0 0 0 io_out[4]
+port 158 nsew signal tristate
+flabel metal3 s 291760 24639 292400 24695 0 FreeSans 560 0 0 0 io_out[5]
+port 159 nsew signal tristate
+flabel metal3 s 291760 46968 292400 47024 0 FreeSans 560 0 0 0 io_out[6]
+port 160 nsew signal tristate
+flabel metal3 s 291760 136979 292400 137035 0 FreeSans 560 0 0 0 io_out[7]
+port 161 nsew signal tristate
+flabel metal3 s 291760 159190 292400 159246 0 FreeSans 560 0 0 0 io_out[8]
+port 162 nsew signal tristate
+flabel metal3 s 291760 181801 292400 181857 0 FreeSans 560 0 0 0 io_out[9]
+port 163 nsew signal tristate
+flabel metal2 s 62908 -400 62964 240 0 FreeSans 560 90 0 0 la_data_in[0]
+port 164 nsew signal input
+flabel metal2 s 240208 -400 240264 240 0 FreeSans 560 90 0 0 la_data_in[100]
+port 165 nsew signal input
+flabel metal2 s 241981 -400 242037 240 0 FreeSans 560 90 0 0 la_data_in[101]
+port 166 nsew signal input
+flabel metal2 s 243754 -400 243810 240 0 FreeSans 560 90 0 0 la_data_in[102]
+port 167 nsew signal input
+flabel metal2 s 245527 -400 245583 240 0 FreeSans 560 90 0 0 la_data_in[103]
+port 168 nsew signal input
+flabel metal2 s 247300 -400 247356 240 0 FreeSans 560 90 0 0 la_data_in[104]
+port 169 nsew signal input
+flabel metal2 s 249073 -400 249129 240 0 FreeSans 560 90 0 0 la_data_in[105]
+port 170 nsew signal input
+flabel metal2 s 250846 -400 250902 240 0 FreeSans 560 90 0 0 la_data_in[106]
+port 171 nsew signal input
+flabel metal2 s 252619 -400 252675 240 0 FreeSans 560 90 0 0 la_data_in[107]
+port 172 nsew signal input
+flabel metal2 s 254392 -400 254448 240 0 FreeSans 560 90 0 0 la_data_in[108]
+port 173 nsew signal input
+flabel metal2 s 256165 -400 256221 240 0 FreeSans 560 90 0 0 la_data_in[109]
+port 174 nsew signal input
+flabel metal2 s 80638 -400 80694 240 0 FreeSans 560 90 0 0 la_data_in[10]
+port 175 nsew signal input
+flabel metal2 s 257938 -400 257994 240 0 FreeSans 560 90 0 0 la_data_in[110]
+port 176 nsew signal input
+flabel metal2 s 259711 -400 259767 240 0 FreeSans 560 90 0 0 la_data_in[111]
+port 177 nsew signal input
+flabel metal2 s 261484 -400 261540 240 0 FreeSans 560 90 0 0 la_data_in[112]
+port 178 nsew signal input
+flabel metal2 s 263257 -400 263313 240 0 FreeSans 560 90 0 0 la_data_in[113]
+port 179 nsew signal input
+flabel metal2 s 265030 -400 265086 240 0 FreeSans 560 90 0 0 la_data_in[114]
+port 180 nsew signal input
+flabel metal2 s 266803 -400 266859 240 0 FreeSans 560 90 0 0 la_data_in[115]
+port 181 nsew signal input
+flabel metal2 s 268576 -400 268632 240 0 FreeSans 560 90 0 0 la_data_in[116]
+port 182 nsew signal input
+flabel metal2 s 270349 -400 270405 240 0 FreeSans 560 90 0 0 la_data_in[117]
+port 183 nsew signal input
+flabel metal2 s 272122 -400 272178 240 0 FreeSans 560 90 0 0 la_data_in[118]
+port 184 nsew signal input
+flabel metal2 s 273895 -400 273951 240 0 FreeSans 560 90 0 0 la_data_in[119]
+port 185 nsew signal input
+flabel metal2 s 82411 -400 82467 240 0 FreeSans 560 90 0 0 la_data_in[11]
+port 186 nsew signal input
+flabel metal2 s 275668 -400 275724 240 0 FreeSans 560 90 0 0 la_data_in[120]
+port 187 nsew signal input
+flabel metal2 s 277441 -400 277497 240 0 FreeSans 560 90 0 0 la_data_in[121]
+port 188 nsew signal input
+flabel metal2 s 279214 -400 279270 240 0 FreeSans 560 90 0 0 la_data_in[122]
+port 189 nsew signal input
+flabel metal2 s 280987 -400 281043 240 0 FreeSans 560 90 0 0 la_data_in[123]
+port 190 nsew signal input
+flabel metal2 s 282760 -400 282816 240 0 FreeSans 560 90 0 0 la_data_in[124]
+port 191 nsew signal input
+flabel metal2 s 284533 -400 284589 240 0 FreeSans 560 90 0 0 la_data_in[125]
+port 192 nsew signal input
+flabel metal2 s 286306 -400 286362 240 0 FreeSans 560 90 0 0 la_data_in[126]
+port 193 nsew signal input
+flabel metal2 s 288079 -400 288135 240 0 FreeSans 560 90 0 0 la_data_in[127]
+port 194 nsew signal input
+flabel metal2 s 84184 -400 84240 240 0 FreeSans 560 90 0 0 la_data_in[12]
+port 195 nsew signal input
+flabel metal2 s 85957 -400 86013 240 0 FreeSans 560 90 0 0 la_data_in[13]
+port 196 nsew signal input
+flabel metal2 s 87730 -400 87786 240 0 FreeSans 560 90 0 0 la_data_in[14]
+port 197 nsew signal input
+flabel metal2 s 89503 -400 89559 240 0 FreeSans 560 90 0 0 la_data_in[15]
+port 198 nsew signal input
+flabel metal2 s 91276 -400 91332 240 0 FreeSans 560 90 0 0 la_data_in[16]
+port 199 nsew signal input
+flabel metal2 s 93049 -400 93105 240 0 FreeSans 560 90 0 0 la_data_in[17]
+port 200 nsew signal input
+flabel metal2 s 94822 -400 94878 240 0 FreeSans 560 90 0 0 la_data_in[18]
+port 201 nsew signal input
+flabel metal2 s 96595 -400 96651 240 0 FreeSans 560 90 0 0 la_data_in[19]
+port 202 nsew signal input
+flabel metal2 s 64681 -400 64737 240 0 FreeSans 560 90 0 0 la_data_in[1]
+port 203 nsew signal input
+flabel metal2 s 98368 -400 98424 240 0 FreeSans 560 90 0 0 la_data_in[20]
+port 204 nsew signal input
+flabel metal2 s 100141 -400 100197 240 0 FreeSans 560 90 0 0 la_data_in[21]
+port 205 nsew signal input
+flabel metal2 s 101914 -400 101970 240 0 FreeSans 560 90 0 0 la_data_in[22]
+port 206 nsew signal input
+flabel metal2 s 103687 -400 103743 240 0 FreeSans 560 90 0 0 la_data_in[23]
+port 207 nsew signal input
+flabel metal2 s 105460 -400 105516 240 0 FreeSans 560 90 0 0 la_data_in[24]
+port 208 nsew signal input
+flabel metal2 s 107233 -400 107289 240 0 FreeSans 560 90 0 0 la_data_in[25]
+port 209 nsew signal input
+flabel metal2 s 109006 -400 109062 240 0 FreeSans 560 90 0 0 la_data_in[26]
+port 210 nsew signal input
+flabel metal2 s 110779 -400 110835 240 0 FreeSans 560 90 0 0 la_data_in[27]
+port 211 nsew signal input
+flabel metal2 s 112552 -400 112608 240 0 FreeSans 560 90 0 0 la_data_in[28]
+port 212 nsew signal input
+flabel metal2 s 114325 -400 114381 240 0 FreeSans 560 90 0 0 la_data_in[29]
+port 213 nsew signal input
+flabel metal2 s 66454 -400 66510 240 0 FreeSans 560 90 0 0 la_data_in[2]
+port 214 nsew signal input
+flabel metal2 s 116098 -400 116154 240 0 FreeSans 560 90 0 0 la_data_in[30]
+port 215 nsew signal input
+flabel metal2 s 117871 -400 117927 240 0 FreeSans 560 90 0 0 la_data_in[31]
+port 216 nsew signal input
+flabel metal2 s 119644 -400 119700 240 0 FreeSans 560 90 0 0 la_data_in[32]
+port 217 nsew signal input
+flabel metal2 s 121417 -400 121473 240 0 FreeSans 560 90 0 0 la_data_in[33]
+port 218 nsew signal input
+flabel metal2 s 123190 -400 123246 240 0 FreeSans 560 90 0 0 la_data_in[34]
+port 219 nsew signal input
+flabel metal2 s 124963 -400 125019 240 0 FreeSans 560 90 0 0 la_data_in[35]
+port 220 nsew signal input
+flabel metal2 s 126736 -400 126792 240 0 FreeSans 560 90 0 0 la_data_in[36]
+port 221 nsew signal input
+flabel metal2 s 128509 -400 128565 240 0 FreeSans 560 90 0 0 la_data_in[37]
+port 222 nsew signal input
+flabel metal2 s 130282 -400 130338 240 0 FreeSans 560 90 0 0 la_data_in[38]
+port 223 nsew signal input
+flabel metal2 s 132055 -400 132111 240 0 FreeSans 560 90 0 0 la_data_in[39]
+port 224 nsew signal input
+flabel metal2 s 68227 -400 68283 240 0 FreeSans 560 90 0 0 la_data_in[3]
+port 225 nsew signal input
+flabel metal2 s 133828 -400 133884 240 0 FreeSans 560 90 0 0 la_data_in[40]
+port 226 nsew signal input
+flabel metal2 s 135601 -400 135657 240 0 FreeSans 560 90 0 0 la_data_in[41]
+port 227 nsew signal input
+flabel metal2 s 137374 -400 137430 240 0 FreeSans 560 90 0 0 la_data_in[42]
+port 228 nsew signal input
+flabel metal2 s 139147 -400 139203 240 0 FreeSans 560 90 0 0 la_data_in[43]
+port 229 nsew signal input
+flabel metal2 s 140920 -400 140976 240 0 FreeSans 560 90 0 0 la_data_in[44]
+port 230 nsew signal input
+flabel metal2 s 142693 -400 142749 240 0 FreeSans 560 90 0 0 la_data_in[45]
+port 231 nsew signal input
+flabel metal2 s 144466 -400 144522 240 0 FreeSans 560 90 0 0 la_data_in[46]
+port 232 nsew signal input
+flabel metal2 s 146239 -400 146295 240 0 FreeSans 560 90 0 0 la_data_in[47]
+port 233 nsew signal input
+flabel metal2 s 148012 -400 148068 240 0 FreeSans 560 90 0 0 la_data_in[48]
+port 234 nsew signal input
+flabel metal2 s 149785 -400 149841 240 0 FreeSans 560 90 0 0 la_data_in[49]
+port 235 nsew signal input
+flabel metal2 s 70000 -400 70056 240 0 FreeSans 560 90 0 0 la_data_in[4]
+port 236 nsew signal input
+flabel metal2 s 151558 -400 151614 240 0 FreeSans 560 90 0 0 la_data_in[50]
+port 237 nsew signal input
+flabel metal2 s 153331 -400 153387 240 0 FreeSans 560 90 0 0 la_data_in[51]
+port 238 nsew signal input
+flabel metal2 s 155104 -400 155160 240 0 FreeSans 560 90 0 0 la_data_in[52]
+port 239 nsew signal input
+flabel metal2 s 156877 -400 156933 240 0 FreeSans 560 90 0 0 la_data_in[53]
+port 240 nsew signal input
+flabel metal2 s 158650 -400 158706 240 0 FreeSans 560 90 0 0 la_data_in[54]
+port 241 nsew signal input
+flabel metal2 s 160423 -400 160479 240 0 FreeSans 560 90 0 0 la_data_in[55]
+port 242 nsew signal input
+flabel metal2 s 162196 -400 162252 240 0 FreeSans 560 90 0 0 la_data_in[56]
+port 243 nsew signal input
+flabel metal2 s 163969 -400 164025 240 0 FreeSans 560 90 0 0 la_data_in[57]
+port 244 nsew signal input
+flabel metal2 s 165742 -400 165798 240 0 FreeSans 560 90 0 0 la_data_in[58]
+port 245 nsew signal input
+flabel metal2 s 167515 -400 167571 240 0 FreeSans 560 90 0 0 la_data_in[59]
+port 246 nsew signal input
+flabel metal2 s 71773 -400 71829 240 0 FreeSans 560 90 0 0 la_data_in[5]
+port 247 nsew signal input
+flabel metal2 s 169288 -400 169344 240 0 FreeSans 560 90 0 0 la_data_in[60]
+port 248 nsew signal input
+flabel metal2 s 171061 -400 171117 240 0 FreeSans 560 90 0 0 la_data_in[61]
+port 249 nsew signal input
+flabel metal2 s 172834 -400 172890 240 0 FreeSans 560 90 0 0 la_data_in[62]
+port 250 nsew signal input
+flabel metal2 s 174607 -400 174663 240 0 FreeSans 560 90 0 0 la_data_in[63]
+port 251 nsew signal input
+flabel metal2 s 176380 -400 176436 240 0 FreeSans 560 90 0 0 la_data_in[64]
+port 252 nsew signal input
+flabel metal2 s 178153 -400 178209 240 0 FreeSans 560 90 0 0 la_data_in[65]
+port 253 nsew signal input
+flabel metal2 s 179926 -400 179982 240 0 FreeSans 560 90 0 0 la_data_in[66]
+port 254 nsew signal input
+flabel metal2 s 181699 -400 181755 240 0 FreeSans 560 90 0 0 la_data_in[67]
+port 255 nsew signal input
+flabel metal2 s 183472 -400 183528 240 0 FreeSans 560 90 0 0 la_data_in[68]
+port 256 nsew signal input
+flabel metal2 s 185245 -400 185301 240 0 FreeSans 560 90 0 0 la_data_in[69]
+port 257 nsew signal input
+flabel metal2 s 73546 -400 73602 240 0 FreeSans 560 90 0 0 la_data_in[6]
+port 258 nsew signal input
+flabel metal2 s 187018 -400 187074 240 0 FreeSans 560 90 0 0 la_data_in[70]
+port 259 nsew signal input
+flabel metal2 s 188791 -400 188847 240 0 FreeSans 560 90 0 0 la_data_in[71]
+port 260 nsew signal input
+flabel metal2 s 190564 -400 190620 240 0 FreeSans 560 90 0 0 la_data_in[72]
+port 261 nsew signal input
+flabel metal2 s 192337 -400 192393 240 0 FreeSans 560 90 0 0 la_data_in[73]
+port 262 nsew signal input
+flabel metal2 s 194110 -400 194166 240 0 FreeSans 560 90 0 0 la_data_in[74]
+port 263 nsew signal input
+flabel metal2 s 195883 -400 195939 240 0 FreeSans 560 90 0 0 la_data_in[75]
+port 264 nsew signal input
+flabel metal2 s 197656 -400 197712 240 0 FreeSans 560 90 0 0 la_data_in[76]
+port 265 nsew signal input
+flabel metal2 s 199429 -400 199485 240 0 FreeSans 560 90 0 0 la_data_in[77]
+port 266 nsew signal input
+flabel metal2 s 201202 -400 201258 240 0 FreeSans 560 90 0 0 la_data_in[78]
+port 267 nsew signal input
+flabel metal2 s 202975 -400 203031 240 0 FreeSans 560 90 0 0 la_data_in[79]
+port 268 nsew signal input
+flabel metal2 s 75319 -400 75375 240 0 FreeSans 560 90 0 0 la_data_in[7]
+port 269 nsew signal input
+flabel metal2 s 204748 -400 204804 240 0 FreeSans 560 90 0 0 la_data_in[80]
+port 270 nsew signal input
+flabel metal2 s 206521 -400 206577 240 0 FreeSans 560 90 0 0 la_data_in[81]
+port 271 nsew signal input
+flabel metal2 s 208294 -400 208350 240 0 FreeSans 560 90 0 0 la_data_in[82]
+port 272 nsew signal input
+flabel metal2 s 210067 -400 210123 240 0 FreeSans 560 90 0 0 la_data_in[83]
+port 273 nsew signal input
+flabel metal2 s 211840 -400 211896 240 0 FreeSans 560 90 0 0 la_data_in[84]
+port 274 nsew signal input
+flabel metal2 s 213613 -400 213669 240 0 FreeSans 560 90 0 0 la_data_in[85]
+port 275 nsew signal input
+flabel metal2 s 215386 -400 215442 240 0 FreeSans 560 90 0 0 la_data_in[86]
+port 276 nsew signal input
+flabel metal2 s 217159 -400 217215 240 0 FreeSans 560 90 0 0 la_data_in[87]
+port 277 nsew signal input
+flabel metal2 s 218932 -400 218988 240 0 FreeSans 560 90 0 0 la_data_in[88]
+port 278 nsew signal input
+flabel metal2 s 220705 -400 220761 240 0 FreeSans 560 90 0 0 la_data_in[89]
+port 279 nsew signal input
+flabel metal2 s 77092 -400 77148 240 0 FreeSans 560 90 0 0 la_data_in[8]
+port 280 nsew signal input
+flabel metal2 s 222478 -400 222534 240 0 FreeSans 560 90 0 0 la_data_in[90]
+port 281 nsew signal input
+flabel metal2 s 224251 -400 224307 240 0 FreeSans 560 90 0 0 la_data_in[91]
+port 282 nsew signal input
+flabel metal2 s 226024 -400 226080 240 0 FreeSans 560 90 0 0 la_data_in[92]
+port 283 nsew signal input
+flabel metal2 s 227797 -400 227853 240 0 FreeSans 560 90 0 0 la_data_in[93]
+port 284 nsew signal input
+flabel metal2 s 229570 -400 229626 240 0 FreeSans 560 90 0 0 la_data_in[94]
+port 285 nsew signal input
+flabel metal2 s 231343 -400 231399 240 0 FreeSans 560 90 0 0 la_data_in[95]
+port 286 nsew signal input
+flabel metal2 s 233116 -400 233172 240 0 FreeSans 560 90 0 0 la_data_in[96]
+port 287 nsew signal input
+flabel metal2 s 234889 -400 234945 240 0 FreeSans 560 90 0 0 la_data_in[97]
+port 288 nsew signal input
+flabel metal2 s 236662 -400 236718 240 0 FreeSans 560 90 0 0 la_data_in[98]
+port 289 nsew signal input
+flabel metal2 s 238435 -400 238491 240 0 FreeSans 560 90 0 0 la_data_in[99]
+port 290 nsew signal input
+flabel metal2 s 78865 -400 78921 240 0 FreeSans 560 90 0 0 la_data_in[9]
+port 291 nsew signal input
+flabel metal2 s 63499 -400 63555 240 0 FreeSans 560 90 0 0 la_data_out[0]
+port 292 nsew signal tristate
+flabel metal2 s 240799 -400 240855 240 0 FreeSans 560 90 0 0 la_data_out[100]
+port 293 nsew signal tristate
+flabel metal2 s 242572 -400 242628 240 0 FreeSans 560 90 0 0 la_data_out[101]
+port 294 nsew signal tristate
+flabel metal2 s 244345 -400 244401 240 0 FreeSans 560 90 0 0 la_data_out[102]
+port 295 nsew signal tristate
+flabel metal2 s 246118 -400 246174 240 0 FreeSans 560 90 0 0 la_data_out[103]
+port 296 nsew signal tristate
+flabel metal2 s 247891 -400 247947 240 0 FreeSans 560 90 0 0 la_data_out[104]
+port 297 nsew signal tristate
+flabel metal2 s 249664 -400 249720 240 0 FreeSans 560 90 0 0 la_data_out[105]
+port 298 nsew signal tristate
+flabel metal2 s 251437 -400 251493 240 0 FreeSans 560 90 0 0 la_data_out[106]
+port 299 nsew signal tristate
+flabel metal2 s 253210 -400 253266 240 0 FreeSans 560 90 0 0 la_data_out[107]
+port 300 nsew signal tristate
+flabel metal2 s 254983 -400 255039 240 0 FreeSans 560 90 0 0 la_data_out[108]
+port 301 nsew signal tristate
+flabel metal2 s 256756 -400 256812 240 0 FreeSans 560 90 0 0 la_data_out[109]
+port 302 nsew signal tristate
+flabel metal2 s 81229 -400 81285 240 0 FreeSans 560 90 0 0 la_data_out[10]
+port 303 nsew signal tristate
+flabel metal2 s 258529 -400 258585 240 0 FreeSans 560 90 0 0 la_data_out[110]
+port 304 nsew signal tristate
+flabel metal2 s 260302 -400 260358 240 0 FreeSans 560 90 0 0 la_data_out[111]
+port 305 nsew signal tristate
+flabel metal2 s 262075 -400 262131 240 0 FreeSans 560 90 0 0 la_data_out[112]
+port 306 nsew signal tristate
+flabel metal2 s 263848 -400 263904 240 0 FreeSans 560 90 0 0 la_data_out[113]
+port 307 nsew signal tristate
+flabel metal2 s 265621 -400 265677 240 0 FreeSans 560 90 0 0 la_data_out[114]
+port 308 nsew signal tristate
+flabel metal2 s 267394 -400 267450 240 0 FreeSans 560 90 0 0 la_data_out[115]
+port 309 nsew signal tristate
+flabel metal2 s 269167 -400 269223 240 0 FreeSans 560 90 0 0 la_data_out[116]
+port 310 nsew signal tristate
+flabel metal2 s 270940 -400 270996 240 0 FreeSans 560 90 0 0 la_data_out[117]
+port 311 nsew signal tristate
+flabel metal2 s 272713 -400 272769 240 0 FreeSans 560 90 0 0 la_data_out[118]
+port 312 nsew signal tristate
+flabel metal2 s 274486 -400 274542 240 0 FreeSans 560 90 0 0 la_data_out[119]
+port 313 nsew signal tristate
+flabel metal2 s 83002 -400 83058 240 0 FreeSans 560 90 0 0 la_data_out[11]
+port 314 nsew signal tristate
+flabel metal2 s 276259 -400 276315 240 0 FreeSans 560 90 0 0 la_data_out[120]
+port 315 nsew signal tristate
+flabel metal2 s 278032 -400 278088 240 0 FreeSans 560 90 0 0 la_data_out[121]
+port 316 nsew signal tristate
+flabel metal2 s 279805 -400 279861 240 0 FreeSans 560 90 0 0 la_data_out[122]
+port 317 nsew signal tristate
+flabel metal2 s 281578 -400 281634 240 0 FreeSans 560 90 0 0 la_data_out[123]
+port 318 nsew signal tristate
+flabel metal2 s 283351 -400 283407 240 0 FreeSans 560 90 0 0 la_data_out[124]
+port 319 nsew signal tristate
+flabel metal2 s 285124 -400 285180 240 0 FreeSans 560 90 0 0 la_data_out[125]
+port 320 nsew signal tristate
+flabel metal2 s 286897 -400 286953 240 0 FreeSans 560 90 0 0 la_data_out[126]
+port 321 nsew signal tristate
+flabel metal2 s 288670 -400 288726 240 0 FreeSans 560 90 0 0 la_data_out[127]
+port 322 nsew signal tristate
+flabel metal2 s 84775 -400 84831 240 0 FreeSans 560 90 0 0 la_data_out[12]
+port 323 nsew signal tristate
+flabel metal2 s 86548 -400 86604 240 0 FreeSans 560 90 0 0 la_data_out[13]
+port 324 nsew signal tristate
+flabel metal2 s 88321 -400 88377 240 0 FreeSans 560 90 0 0 la_data_out[14]
+port 325 nsew signal tristate
+flabel metal2 s 90094 -400 90150 240 0 FreeSans 560 90 0 0 la_data_out[15]
+port 326 nsew signal tristate
+flabel metal2 s 91867 -400 91923 240 0 FreeSans 560 90 0 0 la_data_out[16]
+port 327 nsew signal tristate
+flabel metal2 s 93640 -400 93696 240 0 FreeSans 560 90 0 0 la_data_out[17]
+port 328 nsew signal tristate
+flabel metal2 s 95413 -400 95469 240 0 FreeSans 560 90 0 0 la_data_out[18]
+port 329 nsew signal tristate
+flabel metal2 s 97186 -400 97242 240 0 FreeSans 560 90 0 0 la_data_out[19]
+port 330 nsew signal tristate
+flabel metal2 s 65272 -400 65328 240 0 FreeSans 560 90 0 0 la_data_out[1]
+port 331 nsew signal tristate
+flabel metal2 s 98959 -400 99015 240 0 FreeSans 560 90 0 0 la_data_out[20]
+port 332 nsew signal tristate
+flabel metal2 s 100732 -400 100788 240 0 FreeSans 560 90 0 0 la_data_out[21]
+port 333 nsew signal tristate
+flabel metal2 s 102505 -400 102561 240 0 FreeSans 560 90 0 0 la_data_out[22]
+port 334 nsew signal tristate
+flabel metal2 s 104278 -400 104334 240 0 FreeSans 560 90 0 0 la_data_out[23]
+port 335 nsew signal tristate
+flabel metal2 s 106051 -400 106107 240 0 FreeSans 560 90 0 0 la_data_out[24]
+port 336 nsew signal tristate
+flabel metal2 s 107824 -400 107880 240 0 FreeSans 560 90 0 0 la_data_out[25]
+port 337 nsew signal tristate
+flabel metal2 s 109597 -400 109653 240 0 FreeSans 560 90 0 0 la_data_out[26]
+port 338 nsew signal tristate
+flabel metal2 s 111370 -400 111426 240 0 FreeSans 560 90 0 0 la_data_out[27]
+port 339 nsew signal tristate
+flabel metal2 s 113143 -400 113199 240 0 FreeSans 560 90 0 0 la_data_out[28]
+port 340 nsew signal tristate
+flabel metal2 s 114916 -400 114972 240 0 FreeSans 560 90 0 0 la_data_out[29]
+port 341 nsew signal tristate
+flabel metal2 s 67045 -400 67101 240 0 FreeSans 560 90 0 0 la_data_out[2]
+port 342 nsew signal tristate
+flabel metal2 s 116689 -400 116745 240 0 FreeSans 560 90 0 0 la_data_out[30]
+port 343 nsew signal tristate
+flabel metal2 s 118462 -400 118518 240 0 FreeSans 560 90 0 0 la_data_out[31]
+port 344 nsew signal tristate
+flabel metal2 s 120235 -400 120291 240 0 FreeSans 560 90 0 0 la_data_out[32]
+port 345 nsew signal tristate
+flabel metal2 s 122008 -400 122064 240 0 FreeSans 560 90 0 0 la_data_out[33]
+port 346 nsew signal tristate
+flabel metal2 s 123781 -400 123837 240 0 FreeSans 560 90 0 0 la_data_out[34]
+port 347 nsew signal tristate
+flabel metal2 s 125554 -400 125610 240 0 FreeSans 560 90 0 0 la_data_out[35]
+port 348 nsew signal tristate
+flabel metal2 s 127327 -400 127383 240 0 FreeSans 560 90 0 0 la_data_out[36]
+port 349 nsew signal tristate
+flabel metal2 s 129100 -400 129156 240 0 FreeSans 560 90 0 0 la_data_out[37]
+port 350 nsew signal tristate
+flabel metal2 s 130873 -400 130929 240 0 FreeSans 560 90 0 0 la_data_out[38]
+port 351 nsew signal tristate
+flabel metal2 s 132646 -400 132702 240 0 FreeSans 560 90 0 0 la_data_out[39]
+port 352 nsew signal tristate
+flabel metal2 s 68818 -400 68874 240 0 FreeSans 560 90 0 0 la_data_out[3]
+port 353 nsew signal tristate
+flabel metal2 s 134419 -400 134475 240 0 FreeSans 560 90 0 0 la_data_out[40]
+port 354 nsew signal tristate
+flabel metal2 s 136192 -400 136248 240 0 FreeSans 560 90 0 0 la_data_out[41]
+port 355 nsew signal tristate
+flabel metal2 s 137965 -400 138021 240 0 FreeSans 560 90 0 0 la_data_out[42]
+port 356 nsew signal tristate
+flabel metal2 s 139738 -400 139794 240 0 FreeSans 560 90 0 0 la_data_out[43]
+port 357 nsew signal tristate
+flabel metal2 s 141511 -400 141567 240 0 FreeSans 560 90 0 0 la_data_out[44]
+port 358 nsew signal tristate
+flabel metal2 s 143284 -400 143340 240 0 FreeSans 560 90 0 0 la_data_out[45]
+port 359 nsew signal tristate
+flabel metal2 s 145057 -400 145113 240 0 FreeSans 560 90 0 0 la_data_out[46]
+port 360 nsew signal tristate
+flabel metal2 s 146830 -400 146886 240 0 FreeSans 560 90 0 0 la_data_out[47]
+port 361 nsew signal tristate
+flabel metal2 s 148603 -400 148659 240 0 FreeSans 560 90 0 0 la_data_out[48]
+port 362 nsew signal tristate
+flabel metal2 s 150376 -400 150432 240 0 FreeSans 560 90 0 0 la_data_out[49]
+port 363 nsew signal tristate
+flabel metal2 s 70591 -400 70647 240 0 FreeSans 560 90 0 0 la_data_out[4]
+port 364 nsew signal tristate
+flabel metal2 s 152149 -400 152205 240 0 FreeSans 560 90 0 0 la_data_out[50]
+port 365 nsew signal tristate
+flabel metal2 s 153922 -400 153978 240 0 FreeSans 560 90 0 0 la_data_out[51]
+port 366 nsew signal tristate
+flabel metal2 s 155695 -400 155751 240 0 FreeSans 560 90 0 0 la_data_out[52]
+port 367 nsew signal tristate
+flabel metal2 s 157468 -400 157524 240 0 FreeSans 560 90 0 0 la_data_out[53]
+port 368 nsew signal tristate
+flabel metal2 s 159241 -400 159297 240 0 FreeSans 560 90 0 0 la_data_out[54]
+port 369 nsew signal tristate
+flabel metal2 s 161014 -400 161070 240 0 FreeSans 560 90 0 0 la_data_out[55]
+port 370 nsew signal tristate
+flabel metal2 s 162787 -400 162843 240 0 FreeSans 560 90 0 0 la_data_out[56]
+port 371 nsew signal tristate
+flabel metal2 s 164560 -400 164616 240 0 FreeSans 560 90 0 0 la_data_out[57]
+port 372 nsew signal tristate
+flabel metal2 s 166333 -400 166389 240 0 FreeSans 560 90 0 0 la_data_out[58]
+port 373 nsew signal tristate
+flabel metal2 s 168106 -400 168162 240 0 FreeSans 560 90 0 0 la_data_out[59]
+port 374 nsew signal tristate
+flabel metal2 s 72364 -400 72420 240 0 FreeSans 560 90 0 0 la_data_out[5]
+port 375 nsew signal tristate
+flabel metal2 s 169879 -400 169935 240 0 FreeSans 560 90 0 0 la_data_out[60]
+port 376 nsew signal tristate
+flabel metal2 s 171652 -400 171708 240 0 FreeSans 560 90 0 0 la_data_out[61]
+port 377 nsew signal tristate
+flabel metal2 s 173425 -400 173481 240 0 FreeSans 560 90 0 0 la_data_out[62]
+port 378 nsew signal tristate
+flabel metal2 s 175198 -400 175254 240 0 FreeSans 560 90 0 0 la_data_out[63]
+port 379 nsew signal tristate
+flabel metal2 s 176971 -400 177027 240 0 FreeSans 560 90 0 0 la_data_out[64]
+port 380 nsew signal tristate
+flabel metal2 s 178744 -400 178800 240 0 FreeSans 560 90 0 0 la_data_out[65]
+port 381 nsew signal tristate
+flabel metal2 s 180517 -400 180573 240 0 FreeSans 560 90 0 0 la_data_out[66]
+port 382 nsew signal tristate
+flabel metal2 s 182290 -400 182346 240 0 FreeSans 560 90 0 0 la_data_out[67]
+port 383 nsew signal tristate
+flabel metal2 s 184063 -400 184119 240 0 FreeSans 560 90 0 0 la_data_out[68]
+port 384 nsew signal tristate
+flabel metal2 s 185836 -400 185892 240 0 FreeSans 560 90 0 0 la_data_out[69]
+port 385 nsew signal tristate
+flabel metal2 s 74137 -400 74193 240 0 FreeSans 560 90 0 0 la_data_out[6]
+port 386 nsew signal tristate
+flabel metal2 s 187609 -400 187665 240 0 FreeSans 560 90 0 0 la_data_out[70]
+port 387 nsew signal tristate
+flabel metal2 s 189382 -400 189438 240 0 FreeSans 560 90 0 0 la_data_out[71]
+port 388 nsew signal tristate
+flabel metal2 s 191155 -400 191211 240 0 FreeSans 560 90 0 0 la_data_out[72]
+port 389 nsew signal tristate
+flabel metal2 s 192928 -400 192984 240 0 FreeSans 560 90 0 0 la_data_out[73]
+port 390 nsew signal tristate
+flabel metal2 s 194701 -400 194757 240 0 FreeSans 560 90 0 0 la_data_out[74]
+port 391 nsew signal tristate
+flabel metal2 s 196474 -400 196530 240 0 FreeSans 560 90 0 0 la_data_out[75]
+port 392 nsew signal tristate
+flabel metal2 s 198247 -400 198303 240 0 FreeSans 560 90 0 0 la_data_out[76]
+port 393 nsew signal tristate
+flabel metal2 s 200020 -400 200076 240 0 FreeSans 560 90 0 0 la_data_out[77]
+port 394 nsew signal tristate
+flabel metal2 s 201793 -400 201849 240 0 FreeSans 560 90 0 0 la_data_out[78]
+port 395 nsew signal tristate
+flabel metal2 s 203566 -400 203622 240 0 FreeSans 560 90 0 0 la_data_out[79]
+port 396 nsew signal tristate
+flabel metal2 s 75910 -400 75966 240 0 FreeSans 560 90 0 0 la_data_out[7]
+port 397 nsew signal tristate
+flabel metal2 s 205339 -400 205395 240 0 FreeSans 560 90 0 0 la_data_out[80]
+port 398 nsew signal tristate
+flabel metal2 s 207112 -400 207168 240 0 FreeSans 560 90 0 0 la_data_out[81]
+port 399 nsew signal tristate
+flabel metal2 s 208885 -400 208941 240 0 FreeSans 560 90 0 0 la_data_out[82]
+port 400 nsew signal tristate
+flabel metal2 s 210658 -400 210714 240 0 FreeSans 560 90 0 0 la_data_out[83]
+port 401 nsew signal tristate
+flabel metal2 s 212431 -400 212487 240 0 FreeSans 560 90 0 0 la_data_out[84]
+port 402 nsew signal tristate
+flabel metal2 s 214204 -400 214260 240 0 FreeSans 560 90 0 0 la_data_out[85]
+port 403 nsew signal tristate
+flabel metal2 s 215977 -400 216033 240 0 FreeSans 560 90 0 0 la_data_out[86]
+port 404 nsew signal tristate
+flabel metal2 s 217750 -400 217806 240 0 FreeSans 560 90 0 0 la_data_out[87]
+port 405 nsew signal tristate
+flabel metal2 s 219523 -400 219579 240 0 FreeSans 560 90 0 0 la_data_out[88]
+port 406 nsew signal tristate
+flabel metal2 s 221296 -400 221352 240 0 FreeSans 560 90 0 0 la_data_out[89]
+port 407 nsew signal tristate
+flabel metal2 s 77683 -400 77739 240 0 FreeSans 560 90 0 0 la_data_out[8]
+port 408 nsew signal tristate
+flabel metal2 s 223069 -400 223125 240 0 FreeSans 560 90 0 0 la_data_out[90]
+port 409 nsew signal tristate
+flabel metal2 s 224842 -400 224898 240 0 FreeSans 560 90 0 0 la_data_out[91]
+port 410 nsew signal tristate
+flabel metal2 s 226615 -400 226671 240 0 FreeSans 560 90 0 0 la_data_out[92]
+port 411 nsew signal tristate
+flabel metal2 s 228388 -400 228444 240 0 FreeSans 560 90 0 0 la_data_out[93]
+port 412 nsew signal tristate
+flabel metal2 s 230161 -400 230217 240 0 FreeSans 560 90 0 0 la_data_out[94]
+port 413 nsew signal tristate
+flabel metal2 s 231934 -400 231990 240 0 FreeSans 560 90 0 0 la_data_out[95]
+port 414 nsew signal tristate
+flabel metal2 s 233707 -400 233763 240 0 FreeSans 560 90 0 0 la_data_out[96]
+port 415 nsew signal tristate
+flabel metal2 s 235480 -400 235536 240 0 FreeSans 560 90 0 0 la_data_out[97]
+port 416 nsew signal tristate
+flabel metal2 s 237253 -400 237309 240 0 FreeSans 560 90 0 0 la_data_out[98]
+port 417 nsew signal tristate
+flabel metal2 s 239026 -400 239082 240 0 FreeSans 560 90 0 0 la_data_out[99]
+port 418 nsew signal tristate
+flabel metal2 s 79456 -400 79512 240 0 FreeSans 560 90 0 0 la_data_out[9]
+port 419 nsew signal tristate
+flabel metal2 s 64090 -400 64146 240 0 FreeSans 560 90 0 0 la_oenb[0]
+port 420 nsew signal input
+flabel metal2 s 241390 -400 241446 240 0 FreeSans 560 90 0 0 la_oenb[100]
+port 421 nsew signal input
+flabel metal2 s 243163 -400 243219 240 0 FreeSans 560 90 0 0 la_oenb[101]
+port 422 nsew signal input
+flabel metal2 s 244936 -400 244992 240 0 FreeSans 560 90 0 0 la_oenb[102]
+port 423 nsew signal input
+flabel metal2 s 246709 -400 246765 240 0 FreeSans 560 90 0 0 la_oenb[103]
+port 424 nsew signal input
+flabel metal2 s 248482 -400 248538 240 0 FreeSans 560 90 0 0 la_oenb[104]
+port 425 nsew signal input
+flabel metal2 s 250255 -400 250311 240 0 FreeSans 560 90 0 0 la_oenb[105]
+port 426 nsew signal input
+flabel metal2 s 252028 -400 252084 240 0 FreeSans 560 90 0 0 la_oenb[106]
+port 427 nsew signal input
+flabel metal2 s 253801 -400 253857 240 0 FreeSans 560 90 0 0 la_oenb[107]
+port 428 nsew signal input
+flabel metal2 s 255574 -400 255630 240 0 FreeSans 560 90 0 0 la_oenb[108]
+port 429 nsew signal input
+flabel metal2 s 257347 -400 257403 240 0 FreeSans 560 90 0 0 la_oenb[109]
+port 430 nsew signal input
+flabel metal2 s 81820 -400 81876 240 0 FreeSans 560 90 0 0 la_oenb[10]
+port 431 nsew signal input
+flabel metal2 s 259120 -400 259176 240 0 FreeSans 560 90 0 0 la_oenb[110]
+port 432 nsew signal input
+flabel metal2 s 260893 -400 260949 240 0 FreeSans 560 90 0 0 la_oenb[111]
+port 433 nsew signal input
+flabel metal2 s 262666 -400 262722 240 0 FreeSans 560 90 0 0 la_oenb[112]
+port 434 nsew signal input
+flabel metal2 s 264439 -400 264495 240 0 FreeSans 560 90 0 0 la_oenb[113]
+port 435 nsew signal input
+flabel metal2 s 266212 -400 266268 240 0 FreeSans 560 90 0 0 la_oenb[114]
+port 436 nsew signal input
+flabel metal2 s 267985 -400 268041 240 0 FreeSans 560 90 0 0 la_oenb[115]
+port 437 nsew signal input
+flabel metal2 s 269758 -400 269814 240 0 FreeSans 560 90 0 0 la_oenb[116]
+port 438 nsew signal input
+flabel metal2 s 271531 -400 271587 240 0 FreeSans 560 90 0 0 la_oenb[117]
+port 439 nsew signal input
+flabel metal2 s 273304 -400 273360 240 0 FreeSans 560 90 0 0 la_oenb[118]
+port 440 nsew signal input
+flabel metal2 s 275077 -400 275133 240 0 FreeSans 560 90 0 0 la_oenb[119]
+port 441 nsew signal input
+flabel metal2 s 83593 -400 83649 240 0 FreeSans 560 90 0 0 la_oenb[11]
+port 442 nsew signal input
+flabel metal2 s 276850 -400 276906 240 0 FreeSans 560 90 0 0 la_oenb[120]
+port 443 nsew signal input
+flabel metal2 s 278623 -400 278679 240 0 FreeSans 560 90 0 0 la_oenb[121]
+port 444 nsew signal input
+flabel metal2 s 280396 -400 280452 240 0 FreeSans 560 90 0 0 la_oenb[122]
+port 445 nsew signal input
+flabel metal2 s 282169 -400 282225 240 0 FreeSans 560 90 0 0 la_oenb[123]
+port 446 nsew signal input
+flabel metal2 s 283942 -400 283998 240 0 FreeSans 560 90 0 0 la_oenb[124]
+port 447 nsew signal input
+flabel metal2 s 285715 -400 285771 240 0 FreeSans 560 90 0 0 la_oenb[125]
+port 448 nsew signal input
+flabel metal2 s 287488 -400 287544 240 0 FreeSans 560 90 0 0 la_oenb[126]
+port 449 nsew signal input
+flabel metal2 s 289261 -400 289317 240 0 FreeSans 560 90 0 0 la_oenb[127]
+port 450 nsew signal input
+flabel metal2 s 85366 -400 85422 240 0 FreeSans 560 90 0 0 la_oenb[12]
+port 451 nsew signal input
+flabel metal2 s 87139 -400 87195 240 0 FreeSans 560 90 0 0 la_oenb[13]
+port 452 nsew signal input
+flabel metal2 s 88912 -400 88968 240 0 FreeSans 560 90 0 0 la_oenb[14]
+port 453 nsew signal input
+flabel metal2 s 90685 -400 90741 240 0 FreeSans 560 90 0 0 la_oenb[15]
+port 454 nsew signal input
+flabel metal2 s 92458 -400 92514 240 0 FreeSans 560 90 0 0 la_oenb[16]
+port 455 nsew signal input
+flabel metal2 s 94231 -400 94287 240 0 FreeSans 560 90 0 0 la_oenb[17]
+port 456 nsew signal input
+flabel metal2 s 96004 -400 96060 240 0 FreeSans 560 90 0 0 la_oenb[18]
+port 457 nsew signal input
+flabel metal2 s 97777 -400 97833 240 0 FreeSans 560 90 0 0 la_oenb[19]
+port 458 nsew signal input
+flabel metal2 s 65863 -400 65919 240 0 FreeSans 560 90 0 0 la_oenb[1]
+port 459 nsew signal input
+flabel metal2 s 99550 -400 99606 240 0 FreeSans 560 90 0 0 la_oenb[20]
+port 460 nsew signal input
+flabel metal2 s 101323 -400 101379 240 0 FreeSans 560 90 0 0 la_oenb[21]
+port 461 nsew signal input
+flabel metal2 s 103096 -400 103152 240 0 FreeSans 560 90 0 0 la_oenb[22]
+port 462 nsew signal input
+flabel metal2 s 104869 -400 104925 240 0 FreeSans 560 90 0 0 la_oenb[23]
+port 463 nsew signal input
+flabel metal2 s 106642 -400 106698 240 0 FreeSans 560 90 0 0 la_oenb[24]
+port 464 nsew signal input
+flabel metal2 s 108415 -400 108471 240 0 FreeSans 560 90 0 0 la_oenb[25]
+port 465 nsew signal input
+flabel metal2 s 110188 -400 110244 240 0 FreeSans 560 90 0 0 la_oenb[26]
+port 466 nsew signal input
+flabel metal2 s 111961 -400 112017 240 0 FreeSans 560 90 0 0 la_oenb[27]
+port 467 nsew signal input
+flabel metal2 s 113734 -400 113790 240 0 FreeSans 560 90 0 0 la_oenb[28]
+port 468 nsew signal input
+flabel metal2 s 115507 -400 115563 240 0 FreeSans 560 90 0 0 la_oenb[29]
+port 469 nsew signal input
+flabel metal2 s 67636 -400 67692 240 0 FreeSans 560 90 0 0 la_oenb[2]
+port 470 nsew signal input
+flabel metal2 s 117280 -400 117336 240 0 FreeSans 560 90 0 0 la_oenb[30]
+port 471 nsew signal input
+flabel metal2 s 119053 -400 119109 240 0 FreeSans 560 90 0 0 la_oenb[31]
+port 472 nsew signal input
+flabel metal2 s 120826 -400 120882 240 0 FreeSans 560 90 0 0 la_oenb[32]
+port 473 nsew signal input
+flabel metal2 s 122599 -400 122655 240 0 FreeSans 560 90 0 0 la_oenb[33]
+port 474 nsew signal input
+flabel metal2 s 124372 -400 124428 240 0 FreeSans 560 90 0 0 la_oenb[34]
+port 475 nsew signal input
+flabel metal2 s 126145 -400 126201 240 0 FreeSans 560 90 0 0 la_oenb[35]
+port 476 nsew signal input
+flabel metal2 s 127918 -400 127974 240 0 FreeSans 560 90 0 0 la_oenb[36]
+port 477 nsew signal input
+flabel metal2 s 129691 -400 129747 240 0 FreeSans 560 90 0 0 la_oenb[37]
+port 478 nsew signal input
+flabel metal2 s 131464 -400 131520 240 0 FreeSans 560 90 0 0 la_oenb[38]
+port 479 nsew signal input
+flabel metal2 s 133237 -400 133293 240 0 FreeSans 560 90 0 0 la_oenb[39]
+port 480 nsew signal input
+flabel metal2 s 69409 -400 69465 240 0 FreeSans 560 90 0 0 la_oenb[3]
+port 481 nsew signal input
+flabel metal2 s 135010 -400 135066 240 0 FreeSans 560 90 0 0 la_oenb[40]
+port 482 nsew signal input
+flabel metal2 s 136783 -400 136839 240 0 FreeSans 560 90 0 0 la_oenb[41]
+port 483 nsew signal input
+flabel metal2 s 138556 -400 138612 240 0 FreeSans 560 90 0 0 la_oenb[42]
+port 484 nsew signal input
+flabel metal2 s 140329 -400 140385 240 0 FreeSans 560 90 0 0 la_oenb[43]
+port 485 nsew signal input
+flabel metal2 s 142102 -400 142158 240 0 FreeSans 560 90 0 0 la_oenb[44]
+port 486 nsew signal input
+flabel metal2 s 143875 -400 143931 240 0 FreeSans 560 90 0 0 la_oenb[45]
+port 487 nsew signal input
+flabel metal2 s 145648 -400 145704 240 0 FreeSans 560 90 0 0 la_oenb[46]
+port 488 nsew signal input
+flabel metal2 s 147421 -400 147477 240 0 FreeSans 560 90 0 0 la_oenb[47]
+port 489 nsew signal input
+flabel metal2 s 149194 -400 149250 240 0 FreeSans 560 90 0 0 la_oenb[48]
+port 490 nsew signal input
+flabel metal2 s 150967 -400 151023 240 0 FreeSans 560 90 0 0 la_oenb[49]
+port 491 nsew signal input
+flabel metal2 s 71182 -400 71238 240 0 FreeSans 560 90 0 0 la_oenb[4]
+port 492 nsew signal input
+flabel metal2 s 152740 -400 152796 240 0 FreeSans 560 90 0 0 la_oenb[50]
+port 493 nsew signal input
+flabel metal2 s 154513 -400 154569 240 0 FreeSans 560 90 0 0 la_oenb[51]
+port 494 nsew signal input
+flabel metal2 s 156286 -400 156342 240 0 FreeSans 560 90 0 0 la_oenb[52]
+port 495 nsew signal input
+flabel metal2 s 158059 -400 158115 240 0 FreeSans 560 90 0 0 la_oenb[53]
+port 496 nsew signal input
+flabel metal2 s 159832 -400 159888 240 0 FreeSans 560 90 0 0 la_oenb[54]
+port 497 nsew signal input
+flabel metal2 s 161605 -400 161661 240 0 FreeSans 560 90 0 0 la_oenb[55]
+port 498 nsew signal input
+flabel metal2 s 163378 -400 163434 240 0 FreeSans 560 90 0 0 la_oenb[56]
+port 499 nsew signal input
+flabel metal2 s 165151 -400 165207 240 0 FreeSans 560 90 0 0 la_oenb[57]
+port 500 nsew signal input
+flabel metal2 s 166924 -400 166980 240 0 FreeSans 560 90 0 0 la_oenb[58]
+port 501 nsew signal input
+flabel metal2 s 168697 -400 168753 240 0 FreeSans 560 90 0 0 la_oenb[59]
+port 502 nsew signal input
+flabel metal2 s 72955 -400 73011 240 0 FreeSans 560 90 0 0 la_oenb[5]
+port 503 nsew signal input
+flabel metal2 s 170470 -400 170526 240 0 FreeSans 560 90 0 0 la_oenb[60]
+port 504 nsew signal input
+flabel metal2 s 172243 -400 172299 240 0 FreeSans 560 90 0 0 la_oenb[61]
+port 505 nsew signal input
+flabel metal2 s 174016 -400 174072 240 0 FreeSans 560 90 0 0 la_oenb[62]
+port 506 nsew signal input
+flabel metal2 s 175789 -400 175845 240 0 FreeSans 560 90 0 0 la_oenb[63]
+port 507 nsew signal input
+flabel metal2 s 177562 -400 177618 240 0 FreeSans 560 90 0 0 la_oenb[64]
+port 508 nsew signal input
+flabel metal2 s 179335 -400 179391 240 0 FreeSans 560 90 0 0 la_oenb[65]
+port 509 nsew signal input
+flabel metal2 s 181108 -400 181164 240 0 FreeSans 560 90 0 0 la_oenb[66]
+port 510 nsew signal input
+flabel metal2 s 182881 -400 182937 240 0 FreeSans 560 90 0 0 la_oenb[67]
+port 511 nsew signal input
+flabel metal2 s 184654 -400 184710 240 0 FreeSans 560 90 0 0 la_oenb[68]
+port 512 nsew signal input
+flabel metal2 s 186427 -400 186483 240 0 FreeSans 560 90 0 0 la_oenb[69]
+port 513 nsew signal input
+flabel metal2 s 74728 -400 74784 240 0 FreeSans 560 90 0 0 la_oenb[6]
+port 514 nsew signal input
+flabel metal2 s 188200 -400 188256 240 0 FreeSans 560 90 0 0 la_oenb[70]
+port 515 nsew signal input
+flabel metal2 s 189973 -400 190029 240 0 FreeSans 560 90 0 0 la_oenb[71]
+port 516 nsew signal input
+flabel metal2 s 191746 -400 191802 240 0 FreeSans 560 90 0 0 la_oenb[72]
+port 517 nsew signal input
+flabel metal2 s 193519 -400 193575 240 0 FreeSans 560 90 0 0 la_oenb[73]
+port 518 nsew signal input
+flabel metal2 s 195292 -400 195348 240 0 FreeSans 560 90 0 0 la_oenb[74]
+port 519 nsew signal input
+flabel metal2 s 197065 -400 197121 240 0 FreeSans 560 90 0 0 la_oenb[75]
+port 520 nsew signal input
+flabel metal2 s 198838 -400 198894 240 0 FreeSans 560 90 0 0 la_oenb[76]
+port 521 nsew signal input
+flabel metal2 s 200611 -400 200667 240 0 FreeSans 560 90 0 0 la_oenb[77]
+port 522 nsew signal input
+flabel metal2 s 202384 -400 202440 240 0 FreeSans 560 90 0 0 la_oenb[78]
+port 523 nsew signal input
+flabel metal2 s 204157 -400 204213 240 0 FreeSans 560 90 0 0 la_oenb[79]
+port 524 nsew signal input
+flabel metal2 s 76501 -400 76557 240 0 FreeSans 560 90 0 0 la_oenb[7]
+port 525 nsew signal input
+flabel metal2 s 205930 -400 205986 240 0 FreeSans 560 90 0 0 la_oenb[80]
+port 526 nsew signal input
+flabel metal2 s 207703 -400 207759 240 0 FreeSans 560 90 0 0 la_oenb[81]
+port 527 nsew signal input
+flabel metal2 s 209476 -400 209532 240 0 FreeSans 560 90 0 0 la_oenb[82]
+port 528 nsew signal input
+flabel metal2 s 211249 -400 211305 240 0 FreeSans 560 90 0 0 la_oenb[83]
+port 529 nsew signal input
+flabel metal2 s 213022 -400 213078 240 0 FreeSans 560 90 0 0 la_oenb[84]
+port 530 nsew signal input
+flabel metal2 s 214795 -400 214851 240 0 FreeSans 560 90 0 0 la_oenb[85]
+port 531 nsew signal input
+flabel metal2 s 216568 -400 216624 240 0 FreeSans 560 90 0 0 la_oenb[86]
+port 532 nsew signal input
+flabel metal2 s 218341 -400 218397 240 0 FreeSans 560 90 0 0 la_oenb[87]
+port 533 nsew signal input
+flabel metal2 s 220114 -400 220170 240 0 FreeSans 560 90 0 0 la_oenb[88]
+port 534 nsew signal input
+flabel metal2 s 221887 -400 221943 240 0 FreeSans 560 90 0 0 la_oenb[89]
+port 535 nsew signal input
+flabel metal2 s 78274 -400 78330 240 0 FreeSans 560 90 0 0 la_oenb[8]
+port 536 nsew signal input
+flabel metal2 s 223660 -400 223716 240 0 FreeSans 560 90 0 0 la_oenb[90]
+port 537 nsew signal input
+flabel metal2 s 225433 -400 225489 240 0 FreeSans 560 90 0 0 la_oenb[91]
+port 538 nsew signal input
+flabel metal2 s 227206 -400 227262 240 0 FreeSans 560 90 0 0 la_oenb[92]
+port 539 nsew signal input
+flabel metal2 s 228979 -400 229035 240 0 FreeSans 560 90 0 0 la_oenb[93]
+port 540 nsew signal input
+flabel metal2 s 230752 -400 230808 240 0 FreeSans 560 90 0 0 la_oenb[94]
+port 541 nsew signal input
+flabel metal2 s 232525 -400 232581 240 0 FreeSans 560 90 0 0 la_oenb[95]
+port 542 nsew signal input
+flabel metal2 s 234298 -400 234354 240 0 FreeSans 560 90 0 0 la_oenb[96]
+port 543 nsew signal input
+flabel metal2 s 236071 -400 236127 240 0 FreeSans 560 90 0 0 la_oenb[97]
+port 544 nsew signal input
+flabel metal2 s 237844 -400 237900 240 0 FreeSans 560 90 0 0 la_oenb[98]
+port 545 nsew signal input
+flabel metal2 s 239617 -400 239673 240 0 FreeSans 560 90 0 0 la_oenb[99]
+port 546 nsew signal input
+flabel metal2 s 80047 -400 80103 240 0 FreeSans 560 90 0 0 la_oenb[9]
+port 547 nsew signal input
+flabel metal2 s 289852 -400 289908 240 0 FreeSans 560 90 0 0 user_clock2
+port 548 nsew signal input
+flabel metal2 s 290443 -400 290499 240 0 FreeSans 560 90 0 0 user_irq[0]
+port 549 nsew signal tristate
+flabel metal2 s 291034 -400 291090 240 0 FreeSans 560 90 0 0 user_irq[1]
+port 550 nsew signal tristate
+flabel metal2 s 291625 -400 291681 240 0 FreeSans 560 90 0 0 user_irq[2]
+port 551 nsew signal tristate
+flabel metal3 s 291170 319892 292400 322292 0 FreeSans 560 0 0 0 vccd1
+port 552 nsew signal bidirectional
+flabel metal3 s 291170 314892 292400 317292 0 FreeSans 560 0 0 0 vccd1
+port 553 nsew signal bidirectional
+flabel metal3 s 0 321921 830 324321 0 FreeSans 560 0 0 0 vccd2
+port 554 nsew signal bidirectional
+flabel metal3 s 0 316921 830 319321 0 FreeSans 560 0 0 0 vccd2
+port 555 nsew signal bidirectional
+flabel metal3 s 291170 270281 292400 272681 0 FreeSans 560 0 0 0 vdda1
+port 556 nsew signal bidirectional
+flabel metal3 s 291170 275281 292400 277681 0 FreeSans 560 0 0 0 vdda1
+port 557 nsew signal bidirectional
+flabel metal3 s 291170 117615 292400 120015 0 FreeSans 560 0 0 0 vdda1
+port 558 nsew signal bidirectional
+flabel metal3 s 291170 112615 292400 115015 0 FreeSans 560 0 0 0 vdda1
+port 559 nsew signal bidirectional
+flabel metal3 s 0 102444 830 104844 0 FreeSans 560 0 0 0 vdda2
+port 560 nsew signal bidirectional
+flabel metal3 s 0 107444 830 109844 0 FreeSans 560 0 0 0 vdda2
+port 561 nsew signal bidirectional
+flabel metal3 s 260297 351170 262697 352400 0 FreeSans 960 180 0 0 vssa1
+port 562 nsew signal bidirectional
+flabel metal3 s 255297 351170 257697 352400 0 FreeSans 960 180 0 0 vssa1
+port 563 nsew signal bidirectional
+flabel metal3 s 291170 73415 292400 75815 0 FreeSans 560 0 0 0 vssa1
+port 564 nsew signal bidirectional
+flabel metal3 s 291170 68415 292400 70815 0 FreeSans 560 0 0 0 vssa1
+port 565 nsew signal bidirectional
+flabel metal3 s 0 279721 830 282121 0 FreeSans 560 0 0 0 vssa2
+port 566 nsew signal bidirectional
+flabel metal3 s 0 274721 830 277121 0 FreeSans 560 0 0 0 vssa2
+port 567 nsew signal bidirectional
+flabel metal3 s 291170 95715 292400 98115 0 FreeSans 560 0 0 0 vssd1
+port 568 nsew signal bidirectional
+flabel metal3 s 291170 90715 292400 93115 0 FreeSans 560 0 0 0 vssd1
+port 569 nsew signal bidirectional
+flabel metal3 s 0 86444 830 88844 0 FreeSans 560 0 0 0 vssd2
+port 570 nsew signal bidirectional
+flabel metal3 s 0 81444 830 83844 0 FreeSans 560 0 0 0 vssd2
+port 571 nsew signal bidirectional
+flabel metal2 s 262 -400 318 240 0 FreeSans 560 90 0 0 wb_clk_i
+port 572 nsew signal input
+flabel metal2 s 853 -400 909 240 0 FreeSans 560 90 0 0 wb_rst_i
+port 573 nsew signal input
+flabel metal2 s 1444 -400 1500 240 0 FreeSans 560 90 0 0 wbs_ack_o
+port 574 nsew signal tristate
+flabel metal2 s 3808 -400 3864 240 0 FreeSans 560 90 0 0 wbs_adr_i[0]
+port 575 nsew signal input
+flabel metal2 s 23902 -400 23958 240 0 FreeSans 560 90 0 0 wbs_adr_i[10]
+port 576 nsew signal input
+flabel metal2 s 25675 -400 25731 240 0 FreeSans 560 90 0 0 wbs_adr_i[11]
+port 577 nsew signal input
+flabel metal2 s 27448 -400 27504 240 0 FreeSans 560 90 0 0 wbs_adr_i[12]
+port 578 nsew signal input
+flabel metal2 s 29221 -400 29277 240 0 FreeSans 560 90 0 0 wbs_adr_i[13]
+port 579 nsew signal input
+flabel metal2 s 30994 -400 31050 240 0 FreeSans 560 90 0 0 wbs_adr_i[14]
+port 580 nsew signal input
+flabel metal2 s 32767 -400 32823 240 0 FreeSans 560 90 0 0 wbs_adr_i[15]
+port 581 nsew signal input
+flabel metal2 s 34540 -400 34596 240 0 FreeSans 560 90 0 0 wbs_adr_i[16]
+port 582 nsew signal input
+flabel metal2 s 36313 -400 36369 240 0 FreeSans 560 90 0 0 wbs_adr_i[17]
+port 583 nsew signal input
+flabel metal2 s 38086 -400 38142 240 0 FreeSans 560 90 0 0 wbs_adr_i[18]
+port 584 nsew signal input
+flabel metal2 s 39859 -400 39915 240 0 FreeSans 560 90 0 0 wbs_adr_i[19]
+port 585 nsew signal input
+flabel metal2 s 6172 -400 6228 240 0 FreeSans 560 90 0 0 wbs_adr_i[1]
+port 586 nsew signal input
+flabel metal2 s 41632 -400 41688 240 0 FreeSans 560 90 0 0 wbs_adr_i[20]
+port 587 nsew signal input
+flabel metal2 s 43405 -400 43461 240 0 FreeSans 560 90 0 0 wbs_adr_i[21]
+port 588 nsew signal input
+flabel metal2 s 45178 -400 45234 240 0 FreeSans 560 90 0 0 wbs_adr_i[22]
+port 589 nsew signal input
+flabel metal2 s 46951 -400 47007 240 0 FreeSans 560 90 0 0 wbs_adr_i[23]
+port 590 nsew signal input
+flabel metal2 s 48724 -400 48780 240 0 FreeSans 560 90 0 0 wbs_adr_i[24]
+port 591 nsew signal input
+flabel metal2 s 50497 -400 50553 240 0 FreeSans 560 90 0 0 wbs_adr_i[25]
+port 592 nsew signal input
+flabel metal2 s 52270 -400 52326 240 0 FreeSans 560 90 0 0 wbs_adr_i[26]
+port 593 nsew signal input
+flabel metal2 s 54043 -400 54099 240 0 FreeSans 560 90 0 0 wbs_adr_i[27]
+port 594 nsew signal input
+flabel metal2 s 55816 -400 55872 240 0 FreeSans 560 90 0 0 wbs_adr_i[28]
+port 595 nsew signal input
+flabel metal2 s 57589 -400 57645 240 0 FreeSans 560 90 0 0 wbs_adr_i[29]
+port 596 nsew signal input
+flabel metal2 s 8536 -400 8592 240 0 FreeSans 560 90 0 0 wbs_adr_i[2]
+port 597 nsew signal input
+flabel metal2 s 59362 -400 59418 240 0 FreeSans 560 90 0 0 wbs_adr_i[30]
+port 598 nsew signal input
+flabel metal2 s 61135 -400 61191 240 0 FreeSans 560 90 0 0 wbs_adr_i[31]
+port 599 nsew signal input
+flabel metal2 s 10900 -400 10956 240 0 FreeSans 560 90 0 0 wbs_adr_i[3]
+port 600 nsew signal input
+flabel metal2 s 13264 -400 13320 240 0 FreeSans 560 90 0 0 wbs_adr_i[4]
+port 601 nsew signal input
+flabel metal2 s 15037 -400 15093 240 0 FreeSans 560 90 0 0 wbs_adr_i[5]
+port 602 nsew signal input
+flabel metal2 s 16810 -400 16866 240 0 FreeSans 560 90 0 0 wbs_adr_i[6]
+port 603 nsew signal input
+flabel metal2 s 18583 -400 18639 240 0 FreeSans 560 90 0 0 wbs_adr_i[7]
+port 604 nsew signal input
+flabel metal2 s 20356 -400 20412 240 0 FreeSans 560 90 0 0 wbs_adr_i[8]
+port 605 nsew signal input
+flabel metal2 s 22129 -400 22185 240 0 FreeSans 560 90 0 0 wbs_adr_i[9]
+port 606 nsew signal input
+flabel metal2 s 2035 -400 2091 240 0 FreeSans 560 90 0 0 wbs_cyc_i
+port 607 nsew signal input
+flabel metal2 s 4399 -400 4455 240 0 FreeSans 560 90 0 0 wbs_dat_i[0]
+port 608 nsew signal input
+flabel metal2 s 24493 -400 24549 240 0 FreeSans 560 90 0 0 wbs_dat_i[10]
+port 609 nsew signal input
+flabel metal2 s 26266 -400 26322 240 0 FreeSans 560 90 0 0 wbs_dat_i[11]
+port 610 nsew signal input
+flabel metal2 s 28039 -400 28095 240 0 FreeSans 560 90 0 0 wbs_dat_i[12]
+port 611 nsew signal input
+flabel metal2 s 29812 -400 29868 240 0 FreeSans 560 90 0 0 wbs_dat_i[13]
+port 612 nsew signal input
+flabel metal2 s 31585 -400 31641 240 0 FreeSans 560 90 0 0 wbs_dat_i[14]
+port 613 nsew signal input
+flabel metal2 s 33358 -400 33414 240 0 FreeSans 560 90 0 0 wbs_dat_i[15]
+port 614 nsew signal input
+flabel metal2 s 35131 -400 35187 240 0 FreeSans 560 90 0 0 wbs_dat_i[16]
+port 615 nsew signal input
+flabel metal2 s 36904 -400 36960 240 0 FreeSans 560 90 0 0 wbs_dat_i[17]
+port 616 nsew signal input
+flabel metal2 s 38677 -400 38733 240 0 FreeSans 560 90 0 0 wbs_dat_i[18]
+port 617 nsew signal input
+flabel metal2 s 40450 -400 40506 240 0 FreeSans 560 90 0 0 wbs_dat_i[19]
+port 618 nsew signal input
+flabel metal2 s 6763 -400 6819 240 0 FreeSans 560 90 0 0 wbs_dat_i[1]
+port 619 nsew signal input
+flabel metal2 s 42223 -400 42279 240 0 FreeSans 560 90 0 0 wbs_dat_i[20]
+port 620 nsew signal input
+flabel metal2 s 43996 -400 44052 240 0 FreeSans 560 90 0 0 wbs_dat_i[21]
+port 621 nsew signal input
+flabel metal2 s 45769 -400 45825 240 0 FreeSans 560 90 0 0 wbs_dat_i[22]
+port 622 nsew signal input
+flabel metal2 s 47542 -400 47598 240 0 FreeSans 560 90 0 0 wbs_dat_i[23]
+port 623 nsew signal input
+flabel metal2 s 49315 -400 49371 240 0 FreeSans 560 90 0 0 wbs_dat_i[24]
+port 624 nsew signal input
+flabel metal2 s 51088 -400 51144 240 0 FreeSans 560 90 0 0 wbs_dat_i[25]
+port 625 nsew signal input
+flabel metal2 s 52861 -400 52917 240 0 FreeSans 560 90 0 0 wbs_dat_i[26]
+port 626 nsew signal input
+flabel metal2 s 54634 -400 54690 240 0 FreeSans 560 90 0 0 wbs_dat_i[27]
+port 627 nsew signal input
+flabel metal2 s 56407 -400 56463 240 0 FreeSans 560 90 0 0 wbs_dat_i[28]
+port 628 nsew signal input
+flabel metal2 s 58180 -400 58236 240 0 FreeSans 560 90 0 0 wbs_dat_i[29]
+port 629 nsew signal input
+flabel metal2 s 9127 -400 9183 240 0 FreeSans 560 90 0 0 wbs_dat_i[2]
+port 630 nsew signal input
+flabel metal2 s 59953 -400 60009 240 0 FreeSans 560 90 0 0 wbs_dat_i[30]
+port 631 nsew signal input
+flabel metal2 s 61726 -400 61782 240 0 FreeSans 560 90 0 0 wbs_dat_i[31]
+port 632 nsew signal input
+flabel metal2 s 11491 -400 11547 240 0 FreeSans 560 90 0 0 wbs_dat_i[3]
+port 633 nsew signal input
+flabel metal2 s 13855 -400 13911 240 0 FreeSans 560 90 0 0 wbs_dat_i[4]
+port 634 nsew signal input
+flabel metal2 s 15628 -400 15684 240 0 FreeSans 560 90 0 0 wbs_dat_i[5]
+port 635 nsew signal input
+flabel metal2 s 17401 -400 17457 240 0 FreeSans 560 90 0 0 wbs_dat_i[6]
+port 636 nsew signal input
+flabel metal2 s 19174 -400 19230 240 0 FreeSans 560 90 0 0 wbs_dat_i[7]
+port 637 nsew signal input
+flabel metal2 s 20947 -400 21003 240 0 FreeSans 560 90 0 0 wbs_dat_i[8]
+port 638 nsew signal input
+flabel metal2 s 22720 -400 22776 240 0 FreeSans 560 90 0 0 wbs_dat_i[9]
+port 639 nsew signal input
+flabel metal2 s 4990 -400 5046 240 0 FreeSans 560 90 0 0 wbs_dat_o[0]
+port 640 nsew signal tristate
+flabel metal2 s 25084 -400 25140 240 0 FreeSans 560 90 0 0 wbs_dat_o[10]
+port 641 nsew signal tristate
+flabel metal2 s 26857 -400 26913 240 0 FreeSans 560 90 0 0 wbs_dat_o[11]
+port 642 nsew signal tristate
+flabel metal2 s 28630 -400 28686 240 0 FreeSans 560 90 0 0 wbs_dat_o[12]
+port 643 nsew signal tristate
+flabel metal2 s 30403 -400 30459 240 0 FreeSans 560 90 0 0 wbs_dat_o[13]
+port 644 nsew signal tristate
+flabel metal2 s 32176 -400 32232 240 0 FreeSans 560 90 0 0 wbs_dat_o[14]
+port 645 nsew signal tristate
+flabel metal2 s 33949 -400 34005 240 0 FreeSans 560 90 0 0 wbs_dat_o[15]
+port 646 nsew signal tristate
+flabel metal2 s 35722 -400 35778 240 0 FreeSans 560 90 0 0 wbs_dat_o[16]
+port 647 nsew signal tristate
+flabel metal2 s 37495 -400 37551 240 0 FreeSans 560 90 0 0 wbs_dat_o[17]
+port 648 nsew signal tristate
+flabel metal2 s 39268 -400 39324 240 0 FreeSans 560 90 0 0 wbs_dat_o[18]
+port 649 nsew signal tristate
+flabel metal2 s 41041 -400 41097 240 0 FreeSans 560 90 0 0 wbs_dat_o[19]
+port 650 nsew signal tristate
+flabel metal2 s 7354 -400 7410 240 0 FreeSans 560 90 0 0 wbs_dat_o[1]
+port 651 nsew signal tristate
+flabel metal2 s 42814 -400 42870 240 0 FreeSans 560 90 0 0 wbs_dat_o[20]
+port 652 nsew signal tristate
+flabel metal2 s 44587 -400 44643 240 0 FreeSans 560 90 0 0 wbs_dat_o[21]
+port 653 nsew signal tristate
+flabel metal2 s 46360 -400 46416 240 0 FreeSans 560 90 0 0 wbs_dat_o[22]
+port 654 nsew signal tristate
+flabel metal2 s 48133 -400 48189 240 0 FreeSans 560 90 0 0 wbs_dat_o[23]
+port 655 nsew signal tristate
+flabel metal2 s 49906 -400 49962 240 0 FreeSans 560 90 0 0 wbs_dat_o[24]
+port 656 nsew signal tristate
+flabel metal2 s 51679 -400 51735 240 0 FreeSans 560 90 0 0 wbs_dat_o[25]
+port 657 nsew signal tristate
+flabel metal2 s 53452 -400 53508 240 0 FreeSans 560 90 0 0 wbs_dat_o[26]
+port 658 nsew signal tristate
+flabel metal2 s 55225 -400 55281 240 0 FreeSans 560 90 0 0 wbs_dat_o[27]
+port 659 nsew signal tristate
+flabel metal2 s 56998 -400 57054 240 0 FreeSans 560 90 0 0 wbs_dat_o[28]
+port 660 nsew signal tristate
+flabel metal2 s 58771 -400 58827 240 0 FreeSans 560 90 0 0 wbs_dat_o[29]
+port 661 nsew signal tristate
+flabel metal2 s 9718 -400 9774 240 0 FreeSans 560 90 0 0 wbs_dat_o[2]
+port 662 nsew signal tristate
+flabel metal2 s 60544 -400 60600 240 0 FreeSans 560 90 0 0 wbs_dat_o[30]
+port 663 nsew signal tristate
+flabel metal2 s 62317 -400 62373 240 0 FreeSans 560 90 0 0 wbs_dat_o[31]
+port 664 nsew signal tristate
+flabel metal2 s 12082 -400 12138 240 0 FreeSans 560 90 0 0 wbs_dat_o[3]
+port 665 nsew signal tristate
+flabel metal2 s 14446 -400 14502 240 0 FreeSans 560 90 0 0 wbs_dat_o[4]
+port 666 nsew signal tristate
+flabel metal2 s 16219 -400 16275 240 0 FreeSans 560 90 0 0 wbs_dat_o[5]
+port 667 nsew signal tristate
+flabel metal2 s 17992 -400 18048 240 0 FreeSans 560 90 0 0 wbs_dat_o[6]
+port 668 nsew signal tristate
+flabel metal2 s 19765 -400 19821 240 0 FreeSans 560 90 0 0 wbs_dat_o[7]
+port 669 nsew signal tristate
+flabel metal2 s 21538 -400 21594 240 0 FreeSans 560 90 0 0 wbs_dat_o[8]
+port 670 nsew signal tristate
+flabel metal2 s 23311 -400 23367 240 0 FreeSans 560 90 0 0 wbs_dat_o[9]
+port 671 nsew signal tristate
+flabel metal2 s 5581 -400 5637 240 0 FreeSans 560 90 0 0 wbs_sel_i[0]
+port 672 nsew signal input
+flabel metal2 s 7945 -400 8001 240 0 FreeSans 560 90 0 0 wbs_sel_i[1]
+port 673 nsew signal input
+flabel metal2 s 10309 -400 10365 240 0 FreeSans 560 90 0 0 wbs_sel_i[2]
+port 674 nsew signal input
+flabel metal2 s 12673 -400 12729 240 0 FreeSans 560 90 0 0 wbs_sel_i[3]
+port 675 nsew signal input
+flabel metal2 s 2626 -400 2682 240 0 FreeSans 560 90 0 0 wbs_stb_i
+port 676 nsew signal input
+flabel metal2 s 3217 -400 3273 240 0 FreeSans 560 90 0 0 wbs_we_i
+port 677 nsew signal input
+<< properties >>
+string FIXED_BBOX 0 0 292000 352000
+<< end >>
diff --git a/mag/user_analog_project_wrapper.spice b/mag/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..2779d8f
--- /dev/null
+++ b/mag/user_analog_project_wrapper.spice
@@ -0,0 +1,122 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt sky130_fd_pr__res_xhigh_po_0p35_HDW2JU a_n35_1860# a_n35_n2292# VSUBS
+X0 a_n35_n2292# a_n35_1860# VSUBS sky130_fd_pr__res_xhigh_po w=350000u l=1.86e+07u
+.ends
+
+.subckt detV2 din db do GND
+XR bot_cin do GND sky130_fd_pr__res_xhigh_po_0p35_HDW2JU
+X0 din bot_cin sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X1 do GND sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X2 GND db bot_cin GND sky130_fd_pr__nfet_01v8 w=2.25e+07u l=150000u
+.ends
+
+.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
++ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
++ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
++ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
++ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
++ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
++ io_analog[1] io_analog[2] io_analog[3] io_analog[7] io_analog[8] io_analog[9] io_analog[4]
++ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
++ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
++ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
++ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
++ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
++ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
++ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
++ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
++ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
++ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
++ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
++ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
++ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
++ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
++ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
++ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
++ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
++ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
++ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
++ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
++ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
++ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
++ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
++ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
++ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
++ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
++ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
++ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
++ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
++ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
++ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
++ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
++ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
++ wbs_stb_i wbs_we_i
+XdetV2_0 io_analog[3] io_analog[1] io_analog[2] vssa1 detV2
+.ends
+
diff --git a/mag/user_analog_project_wrapper_empty.mag b/mag/user_analog_project_wrapper_empty.mag
new file mode 100644
index 0000000..02dbe79
--- /dev/null
+++ b/mag/user_analog_project_wrapper_empty.mag
@@ -0,0 +1,2091 @@
+magic
+tech sky130A
+timestamp 1632839657
+<< checkpaint >>
+rect -680 351370 292680 352680
+rect -680 630 630 351370
+rect 291370 630 292680 351370
+rect -680 -680 292680 630
+<< metal2 >>
+rect 262 -400 318 240
+rect 853 -400 909 240
+rect 1444 -400 1500 240
+rect 2035 -400 2091 240
+rect 2626 -400 2682 240
+rect 3217 -400 3273 240
+rect 3808 -400 3864 240
+rect 4399 -400 4455 240
+rect 4990 -400 5046 240
+rect 5581 -400 5637 240
+rect 6172 -400 6228 240
+rect 6763 -400 6819 240
+rect 7354 -400 7410 240
+rect 7945 -400 8001 240
+rect 8536 -400 8592 240
+rect 9127 -400 9183 240
+rect 9718 -400 9774 240
+rect 10309 -400 10365 240
+rect 10900 -400 10956 240
+rect 11491 -400 11547 240
+rect 12082 -400 12138 240
+rect 12673 -400 12729 240
+rect 13264 -400 13320 240
+rect 13855 -400 13911 240
+rect 14446 -400 14502 240
+rect 15037 -400 15093 240
+rect 15628 -400 15684 240
+rect 16219 -400 16275 240
+rect 16810 -400 16866 240
+rect 17401 -400 17457 240
+rect 17992 -400 18048 240
+rect 18583 -400 18639 240
+rect 19174 -400 19230 240
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+rect 292000 0 292050 352000
+rect -50 -50 292050 0
+<< labels >>
+flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0]
+port 0 nsew signal bidirectional
+flabel metal3 s -400 190932 240 190988 0 FreeSans 560 0 0 0 gpio_analog[10]
+port 1 nsew signal bidirectional
+flabel metal3 s -400 169321 240 169377 0 FreeSans 560 0 0 0 gpio_analog[11]
+port 2 nsew signal bidirectional
+flabel metal3 s -400 147710 240 147766 0 FreeSans 560 0 0 0 gpio_analog[12]
+port 3 nsew signal bidirectional
+flabel metal3 s -400 126199 240 126255 0 FreeSans 560 0 0 0 gpio_analog[13]
+port 4 nsew signal bidirectional
+flabel metal3 s -400 62388 240 62444 0 FreeSans 560 0 0 0 gpio_analog[14]
+port 5 nsew signal bidirectional
+flabel metal3 s -400 40777 240 40833 0 FreeSans 560 0 0 0 gpio_analog[15]
+port 6 nsew signal bidirectional
+flabel metal3 s -400 19166 240 19222 0 FreeSans 560 0 0 0 gpio_analog[16]
+port 7 nsew signal bidirectional
+flabel metal3 s -400 8455 240 8511 0 FreeSans 560 0 0 0 gpio_analog[17]
+port 8 nsew signal bidirectional
+flabel metal3 s 291760 156826 292400 156882 0 FreeSans 560 0 0 0 gpio_analog[1]
+port 9 nsew signal bidirectional
+flabel metal3 s 291760 179437 292400 179493 0 FreeSans 560 0 0 0 gpio_analog[2]
+port 10 nsew signal bidirectional
+flabel metal3 s 291760 202648 292400 202704 0 FreeSans 560 0 0 0 gpio_analog[3]
+port 11 nsew signal bidirectional
+flabel metal3 s 291760 224859 292400 224915 0 FreeSans 560 0 0 0 gpio_analog[4]
+port 12 nsew signal bidirectional
+flabel metal3 s 291760 247070 292400 247126 0 FreeSans 560 0 0 0 gpio_analog[5]
+port 13 nsew signal bidirectional
+flabel metal3 s 291760 291781 292400 291837 0 FreeSans 560 0 0 0 gpio_analog[6]
+port 14 nsew signal bidirectional
+flabel metal3 s -400 255765 240 255821 0 FreeSans 560 0 0 0 gpio_analog[7]
+port 15 nsew signal bidirectional
+flabel metal3 s -400 234154 240 234210 0 FreeSans 560 0 0 0 gpio_analog[8]
+port 16 nsew signal bidirectional
+flabel metal3 s -400 212543 240 212599 0 FreeSans 560 0 0 0 gpio_analog[9]
+port 17 nsew signal bidirectional
+flabel metal3 s 291760 135206 292400 135262 0 FreeSans 560 0 0 0 gpio_noesd[0]
+port 18 nsew signal bidirectional
+flabel metal3 s -400 190341 240 190397 0 FreeSans 560 0 0 0 gpio_noesd[10]
+port 19 nsew signal bidirectional
+flabel metal3 s -400 168730 240 168786 0 FreeSans 560 0 0 0 gpio_noesd[11]
+port 20 nsew signal bidirectional
+flabel metal3 s -400 147119 240 147175 0 FreeSans 560 0 0 0 gpio_noesd[12]
+port 21 nsew signal bidirectional
+flabel metal3 s -400 125608 240 125664 0 FreeSans 560 0 0 0 gpio_noesd[13]
+port 22 nsew signal bidirectional
+flabel metal3 s -400 61797 240 61853 0 FreeSans 560 0 0 0 gpio_noesd[14]
+port 23 nsew signal bidirectional
+flabel metal3 s -400 40186 240 40242 0 FreeSans 560 0 0 0 gpio_noesd[15]
+port 24 nsew signal bidirectional
+flabel metal3 s -400 18575 240 18631 0 FreeSans 560 0 0 0 gpio_noesd[16]
+port 25 nsew signal bidirectional
+flabel metal3 s -400 7864 240 7920 0 FreeSans 560 0 0 0 gpio_noesd[17]
+port 26 nsew signal bidirectional
+flabel metal3 s 291760 157417 292400 157473 0 FreeSans 560 0 0 0 gpio_noesd[1]
+port 27 nsew signal bidirectional
+flabel metal3 s 291760 180028 292400 180084 0 FreeSans 560 0 0 0 gpio_noesd[2]
+port 28 nsew signal bidirectional
+flabel metal3 s 291760 203239 292400 203295 0 FreeSans 560 0 0 0 gpio_noesd[3]
+port 29 nsew signal bidirectional
+flabel metal3 s 291760 225450 292400 225506 0 FreeSans 560 0 0 0 gpio_noesd[4]
+port 30 nsew signal bidirectional
+flabel metal3 s 291760 247661 292400 247717 0 FreeSans 560 0 0 0 gpio_noesd[5]
+port 31 nsew signal bidirectional
+flabel metal3 s 291760 292372 292400 292428 0 FreeSans 560 0 0 0 gpio_noesd[6]
+port 32 nsew signal bidirectional
+flabel metal3 s -400 255174 240 255230 0 FreeSans 560 0 0 0 gpio_noesd[7]
+port 33 nsew signal bidirectional
+flabel metal3 s -400 233563 240 233619 0 FreeSans 560 0 0 0 gpio_noesd[8]
+port 34 nsew signal bidirectional
+flabel metal3 s -400 211952 240 212008 0 FreeSans 560 0 0 0 gpio_noesd[9]
+port 35 nsew signal bidirectional
+flabel metal3 s 291150 338992 292400 341492 0 FreeSans 560 0 0 0 io_analog[0]
+port 36 nsew signal bidirectional
+flabel metal3 s 0 340121 850 342621 0 FreeSans 560 0 0 0 io_analog[10]
+port 37 nsew signal bidirectional
+flabel metal3 s 283297 351150 285797 352400 0 FreeSans 960 180 0 0 io_analog[1]
+port 38 nsew signal bidirectional
+flabel metal3 s 232697 351150 235197 352400 0 FreeSans 960 180 0 0 io_analog[2]
+port 39 nsew signal bidirectional
+flabel metal3 s 206697 351150 209197 352400 0 FreeSans 960 180 0 0 io_analog[3]
+port 40 nsew signal bidirectional
+flabel metal3 s 164647 351150 167147 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal4 s 164647 351150 167147 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal5 s 164647 351150 167147 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 41 nsew signal bidirectional
+flabel metal3 s 113797 351150 116297 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal4 s 113797 351150 116297 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal5 s 113797 351150 116297 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 42 nsew signal bidirectional
+flabel metal3 s 87947 351150 90447 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal4 s 87947 351150 90447 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal5 s 87947 351150 90447 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 43 nsew signal bidirectional
+flabel metal3 s 60097 351150 62597 352400 0 FreeSans 960 180 0 0 io_analog[7]
+port 44 nsew signal bidirectional
+flabel metal3 s 34097 351150 36597 352400 0 FreeSans 960 180 0 0 io_analog[8]
+port 45 nsew signal bidirectional
+flabel metal3 s 8097 351150 10597 352400 0 FreeSans 960 180 0 0 io_analog[9]
+port 46 nsew signal bidirectional
+flabel metal3 s 159497 351150 161997 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal4 s 159497 351150 161997 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal5 s 159497 351150 161997 352400 0 FreeSans 960 180 0 0 io_analog[4]
+port 47 nsew signal bidirectional
+flabel metal3 s 108647 351150 111147 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal4 s 108647 351150 111147 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal5 s 108647 351150 111147 352400 0 FreeSans 960 180 0 0 io_analog[5]
+port 48 nsew signal bidirectional
+flabel metal3 s 82797 351150 85297 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal4 s 82797 351150 85297 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal5 s 82797 351150 85297 352400 0 FreeSans 960 180 0 0 io_analog[6]
+port 49 nsew signal bidirectional
+flabel metal3 s 163397 351150 164497 352400 0 FreeSans 960 180 0 0 io_clamp_high[0]
+port 50 nsew signal bidirectional
+flabel metal3 s 112547 351150 113647 352400 0 FreeSans 960 180 0 0 io_clamp_high[1]
+port 51 nsew signal bidirectional
+flabel metal3 s 86697 351150 87797 352400 0 FreeSans 960 180 0 0 io_clamp_high[2]
+port 52 nsew signal bidirectional
+flabel metal3 s 162147 351150 163247 352400 0 FreeSans 960 180 0 0 io_clamp_low[0]
+port 53 nsew signal bidirectional
+flabel metal3 s 111297 351150 112397 352400 0 FreeSans 960 180 0 0 io_clamp_low[1]
+port 54 nsew signal bidirectional
+flabel metal3 s 85447 351150 86547 352400 0 FreeSans 960 180 0 0 io_clamp_low[2]
+port 55 nsew signal bidirectional
+flabel metal3 s 291760 1363 292400 1419 0 FreeSans 560 0 0 0 io_in[0]
+port 56 nsew signal input
+flabel metal3 s 291760 204421 292400 204477 0 FreeSans 560 0 0 0 io_in[10]
+port 57 nsew signal input
+flabel metal3 s 291760 226632 292400 226688 0 FreeSans 560 0 0 0 io_in[11]
+port 58 nsew signal input
+flabel metal3 s 291760 248843 292400 248899 0 FreeSans 560 0 0 0 io_in[12]
+port 59 nsew signal input
+flabel metal3 s 291760 293554 292400 293610 0 FreeSans 560 0 0 0 io_in[13]
+port 60 nsew signal input
+flabel metal3 s -400 253992 240 254048 0 FreeSans 560 0 0 0 io_in[14]
+port 61 nsew signal input
+flabel metal3 s -400 232381 240 232437 0 FreeSans 560 0 0 0 io_in[15]
+port 62 nsew signal input
+flabel metal3 s -400 210770 240 210826 0 FreeSans 560 0 0 0 io_in[16]
+port 63 nsew signal input
+flabel metal3 s -400 189159 240 189215 0 FreeSans 560 0 0 0 io_in[17]
+port 64 nsew signal input
+flabel metal3 s -400 167548 240 167604 0 FreeSans 560 0 0 0 io_in[18]
+port 65 nsew signal input
+flabel metal3 s -400 145937 240 145993 0 FreeSans 560 0 0 0 io_in[19]
+port 66 nsew signal input
+flabel metal3 s 291760 3727 292400 3783 0 FreeSans 560 0 0 0 io_in[1]
+port 67 nsew signal input
+flabel metal3 s -400 124426 240 124482 0 FreeSans 560 0 0 0 io_in[20]
+port 68 nsew signal input
+flabel metal3 s -400 60615 240 60671 0 FreeSans 560 0 0 0 io_in[21]
+port 69 nsew signal input
+flabel metal3 s -400 39004 240 39060 0 FreeSans 560 0 0 0 io_in[22]
+port 70 nsew signal input
+flabel metal3 s -400 17393 240 17449 0 FreeSans 560 0 0 0 io_in[23]
+port 71 nsew signal input
+flabel metal3 s -400 6682 240 6738 0 FreeSans 560 0 0 0 io_in[24]
+port 72 nsew signal input
+flabel metal3 s -400 4318 240 4374 0 FreeSans 560 0 0 0 io_in[25]
+port 73 nsew signal input
+flabel metal3 s -400 1954 240 2010 0 FreeSans 560 0 0 0 io_in[26]
+port 74 nsew signal input
+flabel metal3 s 291760 6091 292400 6147 0 FreeSans 560 0 0 0 io_in[2]
+port 75 nsew signal input
+flabel metal3 s 291760 8455 292400 8511 0 FreeSans 560 0 0 0 io_in[3]
+port 76 nsew signal input
+flabel metal3 s 291760 10819 292400 10875 0 FreeSans 560 0 0 0 io_in[4]
+port 77 nsew signal input
+flabel metal3 s 291760 24048 292400 24104 0 FreeSans 560 0 0 0 io_in[5]
+port 78 nsew signal input
+flabel metal3 s 291760 46377 292400 46433 0 FreeSans 560 0 0 0 io_in[6]
+port 79 nsew signal input
+flabel metal3 s 291760 136388 292400 136444 0 FreeSans 560 0 0 0 io_in[7]
+port 80 nsew signal input
+flabel metal3 s 291760 158599 292400 158655 0 FreeSans 560 0 0 0 io_in[8]
+port 81 nsew signal input
+flabel metal3 s 291760 181210 292400 181266 0 FreeSans 560 0 0 0 io_in[9]
+port 82 nsew signal input
+flabel metal3 s 291760 772 292400 828 0 FreeSans 560 0 0 0 io_in_3v3[0]
+port 83 nsew signal input
+flabel metal3 s 291760 203830 292400 203886 0 FreeSans 560 0 0 0 io_in_3v3[10]
+port 84 nsew signal input
+flabel metal3 s 291760 226041 292400 226097 0 FreeSans 560 0 0 0 io_in_3v3[11]
+port 85 nsew signal input
+flabel metal3 s 291760 248252 292400 248308 0 FreeSans 560 0 0 0 io_in_3v3[12]
+port 86 nsew signal input
+flabel metal3 s 291760 292963 292400 293019 0 FreeSans 560 0 0 0 io_in_3v3[13]
+port 87 nsew signal input
+flabel metal3 s -400 254583 240 254639 0 FreeSans 560 0 0 0 io_in_3v3[14]
+port 88 nsew signal input
+flabel metal3 s -400 232972 240 233028 0 FreeSans 560 0 0 0 io_in_3v3[15]
+port 89 nsew signal input
+flabel metal3 s -400 211361 240 211417 0 FreeSans 560 0 0 0 io_in_3v3[16]
+port 90 nsew signal input
+flabel metal3 s -400 189750 240 189806 0 FreeSans 560 0 0 0 io_in_3v3[17]
+port 91 nsew signal input
+flabel metal3 s -400 168139 240 168195 0 FreeSans 560 0 0 0 io_in_3v3[18]
+port 92 nsew signal input
+flabel metal3 s -400 146528 240 146584 0 FreeSans 560 0 0 0 io_in_3v3[19]
+port 93 nsew signal input
+flabel metal3 s 291760 3136 292400 3192 0 FreeSans 560 0 0 0 io_in_3v3[1]
+port 94 nsew signal input
+flabel metal3 s -400 125017 240 125073 0 FreeSans 560 0 0 0 io_in_3v3[20]
+port 95 nsew signal input
+flabel metal3 s -400 61206 240 61262 0 FreeSans 560 0 0 0 io_in_3v3[21]
+port 96 nsew signal input
+flabel metal3 s -400 39595 240 39651 0 FreeSans 560 0 0 0 io_in_3v3[22]
+port 97 nsew signal input
+flabel metal3 s -400 17984 240 18040 0 FreeSans 560 0 0 0 io_in_3v3[23]
+port 98 nsew signal input
+flabel metal3 s -400 7273 240 7329 0 FreeSans 560 0 0 0 io_in_3v3[24]
+port 99 nsew signal input
+flabel metal3 s -400 4909 240 4965 0 FreeSans 560 0 0 0 io_in_3v3[25]
+port 100 nsew signal input
+flabel metal3 s -400 2545 240 2601 0 FreeSans 560 0 0 0 io_in_3v3[26]
+port 101 nsew signal input
+flabel metal3 s 291760 5500 292400 5556 0 FreeSans 560 0 0 0 io_in_3v3[2]
+port 102 nsew signal input
+flabel metal3 s 291760 7864 292400 7920 0 FreeSans 560 0 0 0 io_in_3v3[3]
+port 103 nsew signal input
+flabel metal3 s 291760 10228 292400 10284 0 FreeSans 560 0 0 0 io_in_3v3[4]
+port 104 nsew signal input
+flabel metal3 s 291760 23457 292400 23513 0 FreeSans 560 0 0 0 io_in_3v3[5]
+port 105 nsew signal input
+flabel metal3 s 291760 45786 292400 45842 0 FreeSans 560 0 0 0 io_in_3v3[6]
+port 106 nsew signal input
+flabel metal3 s 291760 135797 292400 135853 0 FreeSans 560 0 0 0 io_in_3v3[7]
+port 107 nsew signal input
+flabel metal3 s 291760 158008 292400 158064 0 FreeSans 560 0 0 0 io_in_3v3[8]
+port 108 nsew signal input
+flabel metal3 s 291760 180619 292400 180675 0 FreeSans 560 0 0 0 io_in_3v3[9]
+port 109 nsew signal input
+flabel metal3 s 291760 2545 292400 2601 0 FreeSans 560 0 0 0 io_oeb[0]
+port 110 nsew signal tristate
+flabel metal3 s 291760 205603 292400 205659 0 FreeSans 560 0 0 0 io_oeb[10]
+port 111 nsew signal tristate
+flabel metal3 s 291760 227814 292400 227870 0 FreeSans 560 0 0 0 io_oeb[11]
+port 112 nsew signal tristate
+flabel metal3 s 291760 250025 292400 250081 0 FreeSans 560 0 0 0 io_oeb[12]
+port 113 nsew signal tristate
+flabel metal3 s 291760 294736 292400 294792 0 FreeSans 560 0 0 0 io_oeb[13]
+port 114 nsew signal tristate
+flabel metal3 s -400 252810 240 252866 0 FreeSans 560 0 0 0 io_oeb[14]
+port 115 nsew signal tristate
+flabel metal3 s -400 231199 240 231255 0 FreeSans 560 0 0 0 io_oeb[15]
+port 116 nsew signal tristate
+flabel metal3 s -400 209588 240 209644 0 FreeSans 560 0 0 0 io_oeb[16]
+port 117 nsew signal tristate
+flabel metal3 s -400 187977 240 188033 0 FreeSans 560 0 0 0 io_oeb[17]
+port 118 nsew signal tristate
+flabel metal3 s -400 166366 240 166422 0 FreeSans 560 0 0 0 io_oeb[18]
+port 119 nsew signal tristate
+flabel metal3 s -400 144755 240 144811 0 FreeSans 560 0 0 0 io_oeb[19]
+port 120 nsew signal tristate
+flabel metal3 s 291760 4909 292400 4965 0 FreeSans 560 0 0 0 io_oeb[1]
+port 121 nsew signal tristate
+flabel metal3 s -400 123244 240 123300 0 FreeSans 560 0 0 0 io_oeb[20]
+port 122 nsew signal tristate
+flabel metal3 s -400 59433 240 59489 0 FreeSans 560 0 0 0 io_oeb[21]
+port 123 nsew signal tristate
+flabel metal3 s -400 37822 240 37878 0 FreeSans 560 0 0 0 io_oeb[22]
+port 124 nsew signal tristate
+flabel metal3 s -400 16211 240 16267 0 FreeSans 560 0 0 0 io_oeb[23]
+port 125 nsew signal tristate
+flabel metal3 s -400 5500 240 5556 0 FreeSans 560 0 0 0 io_oeb[24]
+port 126 nsew signal tristate
+flabel metal3 s -400 3136 240 3192 0 FreeSans 560 0 0 0 io_oeb[25]
+port 127 nsew signal tristate
+flabel metal3 s -400 772 240 828 0 FreeSans 560 0 0 0 io_oeb[26]
+port 128 nsew signal tristate
+flabel metal3 s 291760 7273 292400 7329 0 FreeSans 560 0 0 0 io_oeb[2]
+port 129 nsew signal tristate
+flabel metal3 s 291760 9637 292400 9693 0 FreeSans 560 0 0 0 io_oeb[3]
+port 130 nsew signal tristate
+flabel metal3 s 291760 12001 292400 12057 0 FreeSans 560 0 0 0 io_oeb[4]
+port 131 nsew signal tristate
+flabel metal3 s 291760 25230 292400 25286 0 FreeSans 560 0 0 0 io_oeb[5]
+port 132 nsew signal tristate
+flabel metal3 s 291760 47559 292400 47615 0 FreeSans 560 0 0 0 io_oeb[6]
+port 133 nsew signal tristate
+flabel metal3 s 291760 137570 292400 137626 0 FreeSans 560 0 0 0 io_oeb[7]
+port 134 nsew signal tristate
+flabel metal3 s 291760 159781 292400 159837 0 FreeSans 560 0 0 0 io_oeb[8]
+port 135 nsew signal tristate
+flabel metal3 s 291760 182392 292400 182448 0 FreeSans 560 0 0 0 io_oeb[9]
+port 136 nsew signal tristate
+flabel metal3 s 291760 1954 292400 2010 0 FreeSans 560 0 0 0 io_out[0]
+port 137 nsew signal tristate
+flabel metal3 s 291760 205012 292400 205068 0 FreeSans 560 0 0 0 io_out[10]
+port 138 nsew signal tristate
+flabel metal3 s 291760 227223 292400 227279 0 FreeSans 560 0 0 0 io_out[11]
+port 139 nsew signal tristate
+flabel metal3 s 291760 249434 292400 249490 0 FreeSans 560 0 0 0 io_out[12]
+port 140 nsew signal tristate
+flabel metal3 s 291760 294145 292400 294201 0 FreeSans 560 0 0 0 io_out[13]
+port 141 nsew signal tristate
+flabel metal3 s -400 253401 240 253457 0 FreeSans 560 0 0 0 io_out[14]
+port 142 nsew signal tristate
+flabel metal3 s -400 231790 240 231846 0 FreeSans 560 0 0 0 io_out[15]
+port 143 nsew signal tristate
+flabel metal3 s -400 210179 240 210235 0 FreeSans 560 0 0 0 io_out[16]
+port 144 nsew signal tristate
+flabel metal3 s -400 188568 240 188624 0 FreeSans 560 0 0 0 io_out[17]
+port 145 nsew signal tristate
+flabel metal3 s -400 166957 240 167013 0 FreeSans 560 0 0 0 io_out[18]
+port 146 nsew signal tristate
+flabel metal3 s -400 145346 240 145402 0 FreeSans 560 0 0 0 io_out[19]
+port 147 nsew signal tristate
+flabel metal3 s 291760 4318 292400 4374 0 FreeSans 560 0 0 0 io_out[1]
+port 148 nsew signal tristate
+flabel metal3 s -400 123835 240 123891 0 FreeSans 560 0 0 0 io_out[20]
+port 149 nsew signal tristate
+flabel metal3 s -400 60024 240 60080 0 FreeSans 560 0 0 0 io_out[21]
+port 150 nsew signal tristate
+flabel metal3 s -400 38413 240 38469 0 FreeSans 560 0 0 0 io_out[22]
+port 151 nsew signal tristate
+flabel metal3 s -400 16802 240 16858 0 FreeSans 560 0 0 0 io_out[23]
+port 152 nsew signal tristate
+flabel metal3 s -400 6091 240 6147 0 FreeSans 560 0 0 0 io_out[24]
+port 153 nsew signal tristate
+flabel metal3 s -400 3727 240 3783 0 FreeSans 560 0 0 0 io_out[25]
+port 154 nsew signal tristate
+flabel metal3 s -400 1363 240 1419 0 FreeSans 560 0 0 0 io_out[26]
+port 155 nsew signal tristate
+flabel metal3 s 291760 6682 292400 6738 0 FreeSans 560 0 0 0 io_out[2]
+port 156 nsew signal tristate
+flabel metal3 s 291760 9046 292400 9102 0 FreeSans 560 0 0 0 io_out[3]
+port 157 nsew signal tristate
+flabel metal3 s 291760 11410 292400 11466 0 FreeSans 560 0 0 0 io_out[4]
+port 158 nsew signal tristate
+flabel metal3 s 291760 24639 292400 24695 0 FreeSans 560 0 0 0 io_out[5]
+port 159 nsew signal tristate
+flabel metal3 s 291760 46968 292400 47024 0 FreeSans 560 0 0 0 io_out[6]
+port 160 nsew signal tristate
+flabel metal3 s 291760 136979 292400 137035 0 FreeSans 560 0 0 0 io_out[7]
+port 161 nsew signal tristate
+flabel metal3 s 291760 159190 292400 159246 0 FreeSans 560 0 0 0 io_out[8]
+port 162 nsew signal tristate
+flabel metal3 s 291760 181801 292400 181857 0 FreeSans 560 0 0 0 io_out[9]
+port 163 nsew signal tristate
+flabel metal2 s 62908 -400 62964 240 0 FreeSans 560 90 0 0 la_data_in[0]
+port 164 nsew signal input
+flabel metal2 s 240208 -400 240264 240 0 FreeSans 560 90 0 0 la_data_in[100]
+port 165 nsew signal input
+flabel metal2 s 241981 -400 242037 240 0 FreeSans 560 90 0 0 la_data_in[101]
+port 166 nsew signal input
+flabel metal2 s 243754 -400 243810 240 0 FreeSans 560 90 0 0 la_data_in[102]
+port 167 nsew signal input
+flabel metal2 s 245527 -400 245583 240 0 FreeSans 560 90 0 0 la_data_in[103]
+port 168 nsew signal input
+flabel metal2 s 247300 -400 247356 240 0 FreeSans 560 90 0 0 la_data_in[104]
+port 169 nsew signal input
+flabel metal2 s 249073 -400 249129 240 0 FreeSans 560 90 0 0 la_data_in[105]
+port 170 nsew signal input
+flabel metal2 s 250846 -400 250902 240 0 FreeSans 560 90 0 0 la_data_in[106]
+port 171 nsew signal input
+flabel metal2 s 252619 -400 252675 240 0 FreeSans 560 90 0 0 la_data_in[107]
+port 172 nsew signal input
+flabel metal2 s 254392 -400 254448 240 0 FreeSans 560 90 0 0 la_data_in[108]
+port 173 nsew signal input
+flabel metal2 s 256165 -400 256221 240 0 FreeSans 560 90 0 0 la_data_in[109]
+port 174 nsew signal input
+flabel metal2 s 80638 -400 80694 240 0 FreeSans 560 90 0 0 la_data_in[10]
+port 175 nsew signal input
+flabel metal2 s 257938 -400 257994 240 0 FreeSans 560 90 0 0 la_data_in[110]
+port 176 nsew signal input
+flabel metal2 s 259711 -400 259767 240 0 FreeSans 560 90 0 0 la_data_in[111]
+port 177 nsew signal input
+flabel metal2 s 261484 -400 261540 240 0 FreeSans 560 90 0 0 la_data_in[112]
+port 178 nsew signal input
+flabel metal2 s 263257 -400 263313 240 0 FreeSans 560 90 0 0 la_data_in[113]
+port 179 nsew signal input
+flabel metal2 s 265030 -400 265086 240 0 FreeSans 560 90 0 0 la_data_in[114]
+port 180 nsew signal input
+flabel metal2 s 266803 -400 266859 240 0 FreeSans 560 90 0 0 la_data_in[115]
+port 181 nsew signal input
+flabel metal2 s 268576 -400 268632 240 0 FreeSans 560 90 0 0 la_data_in[116]
+port 182 nsew signal input
+flabel metal2 s 270349 -400 270405 240 0 FreeSans 560 90 0 0 la_data_in[117]
+port 183 nsew signal input
+flabel metal2 s 272122 -400 272178 240 0 FreeSans 560 90 0 0 la_data_in[118]
+port 184 nsew signal input
+flabel metal2 s 273895 -400 273951 240 0 FreeSans 560 90 0 0 la_data_in[119]
+port 185 nsew signal input
+flabel metal2 s 82411 -400 82467 240 0 FreeSans 560 90 0 0 la_data_in[11]
+port 186 nsew signal input
+flabel metal2 s 275668 -400 275724 240 0 FreeSans 560 90 0 0 la_data_in[120]
+port 187 nsew signal input
+flabel metal2 s 277441 -400 277497 240 0 FreeSans 560 90 0 0 la_data_in[121]
+port 188 nsew signal input
+flabel metal2 s 279214 -400 279270 240 0 FreeSans 560 90 0 0 la_data_in[122]
+port 189 nsew signal input
+flabel metal2 s 280987 -400 281043 240 0 FreeSans 560 90 0 0 la_data_in[123]
+port 190 nsew signal input
+flabel metal2 s 282760 -400 282816 240 0 FreeSans 560 90 0 0 la_data_in[124]
+port 191 nsew signal input
+flabel metal2 s 284533 -400 284589 240 0 FreeSans 560 90 0 0 la_data_in[125]
+port 192 nsew signal input
+flabel metal2 s 286306 -400 286362 240 0 FreeSans 560 90 0 0 la_data_in[126]
+port 193 nsew signal input
+flabel metal2 s 288079 -400 288135 240 0 FreeSans 560 90 0 0 la_data_in[127]
+port 194 nsew signal input
+flabel metal2 s 84184 -400 84240 240 0 FreeSans 560 90 0 0 la_data_in[12]
+port 195 nsew signal input
+flabel metal2 s 85957 -400 86013 240 0 FreeSans 560 90 0 0 la_data_in[13]
+port 196 nsew signal input
+flabel metal2 s 87730 -400 87786 240 0 FreeSans 560 90 0 0 la_data_in[14]
+port 197 nsew signal input
+flabel metal2 s 89503 -400 89559 240 0 FreeSans 560 90 0 0 la_data_in[15]
+port 198 nsew signal input
+flabel metal2 s 91276 -400 91332 240 0 FreeSans 560 90 0 0 la_data_in[16]
+port 199 nsew signal input
+flabel metal2 s 93049 -400 93105 240 0 FreeSans 560 90 0 0 la_data_in[17]
+port 200 nsew signal input
+flabel metal2 s 94822 -400 94878 240 0 FreeSans 560 90 0 0 la_data_in[18]
+port 201 nsew signal input
+flabel metal2 s 96595 -400 96651 240 0 FreeSans 560 90 0 0 la_data_in[19]
+port 202 nsew signal input
+flabel metal2 s 64681 -400 64737 240 0 FreeSans 560 90 0 0 la_data_in[1]
+port 203 nsew signal input
+flabel metal2 s 98368 -400 98424 240 0 FreeSans 560 90 0 0 la_data_in[20]
+port 204 nsew signal input
+flabel metal2 s 100141 -400 100197 240 0 FreeSans 560 90 0 0 la_data_in[21]
+port 205 nsew signal input
+flabel metal2 s 101914 -400 101970 240 0 FreeSans 560 90 0 0 la_data_in[22]
+port 206 nsew signal input
+flabel metal2 s 103687 -400 103743 240 0 FreeSans 560 90 0 0 la_data_in[23]
+port 207 nsew signal input
+flabel metal2 s 105460 -400 105516 240 0 FreeSans 560 90 0 0 la_data_in[24]
+port 208 nsew signal input
+flabel metal2 s 107233 -400 107289 240 0 FreeSans 560 90 0 0 la_data_in[25]
+port 209 nsew signal input
+flabel metal2 s 109006 -400 109062 240 0 FreeSans 560 90 0 0 la_data_in[26]
+port 210 nsew signal input
+flabel metal2 s 110779 -400 110835 240 0 FreeSans 560 90 0 0 la_data_in[27]
+port 211 nsew signal input
+flabel metal2 s 112552 -400 112608 240 0 FreeSans 560 90 0 0 la_data_in[28]
+port 212 nsew signal input
+flabel metal2 s 114325 -400 114381 240 0 FreeSans 560 90 0 0 la_data_in[29]
+port 213 nsew signal input
+flabel metal2 s 66454 -400 66510 240 0 FreeSans 560 90 0 0 la_data_in[2]
+port 214 nsew signal input
+flabel metal2 s 116098 -400 116154 240 0 FreeSans 560 90 0 0 la_data_in[30]
+port 215 nsew signal input
+flabel metal2 s 117871 -400 117927 240 0 FreeSans 560 90 0 0 la_data_in[31]
+port 216 nsew signal input
+flabel metal2 s 119644 -400 119700 240 0 FreeSans 560 90 0 0 la_data_in[32]
+port 217 nsew signal input
+flabel metal2 s 121417 -400 121473 240 0 FreeSans 560 90 0 0 la_data_in[33]
+port 218 nsew signal input
+flabel metal2 s 123190 -400 123246 240 0 FreeSans 560 90 0 0 la_data_in[34]
+port 219 nsew signal input
+flabel metal2 s 124963 -400 125019 240 0 FreeSans 560 90 0 0 la_data_in[35]
+port 220 nsew signal input
+flabel metal2 s 126736 -400 126792 240 0 FreeSans 560 90 0 0 la_data_in[36]
+port 221 nsew signal input
+flabel metal2 s 128509 -400 128565 240 0 FreeSans 560 90 0 0 la_data_in[37]
+port 222 nsew signal input
+flabel metal2 s 130282 -400 130338 240 0 FreeSans 560 90 0 0 la_data_in[38]
+port 223 nsew signal input
+flabel metal2 s 132055 -400 132111 240 0 FreeSans 560 90 0 0 la_data_in[39]
+port 224 nsew signal input
+flabel metal2 s 68227 -400 68283 240 0 FreeSans 560 90 0 0 la_data_in[3]
+port 225 nsew signal input
+flabel metal2 s 133828 -400 133884 240 0 FreeSans 560 90 0 0 la_data_in[40]
+port 226 nsew signal input
+flabel metal2 s 135601 -400 135657 240 0 FreeSans 560 90 0 0 la_data_in[41]
+port 227 nsew signal input
+flabel metal2 s 137374 -400 137430 240 0 FreeSans 560 90 0 0 la_data_in[42]
+port 228 nsew signal input
+flabel metal2 s 139147 -400 139203 240 0 FreeSans 560 90 0 0 la_data_in[43]
+port 229 nsew signal input
+flabel metal2 s 140920 -400 140976 240 0 FreeSans 560 90 0 0 la_data_in[44]
+port 230 nsew signal input
+flabel metal2 s 142693 -400 142749 240 0 FreeSans 560 90 0 0 la_data_in[45]
+port 231 nsew signal input
+flabel metal2 s 144466 -400 144522 240 0 FreeSans 560 90 0 0 la_data_in[46]
+port 232 nsew signal input
+flabel metal2 s 146239 -400 146295 240 0 FreeSans 560 90 0 0 la_data_in[47]
+port 233 nsew signal input
+flabel metal2 s 148012 -400 148068 240 0 FreeSans 560 90 0 0 la_data_in[48]
+port 234 nsew signal input
+flabel metal2 s 149785 -400 149841 240 0 FreeSans 560 90 0 0 la_data_in[49]
+port 235 nsew signal input
+flabel metal2 s 70000 -400 70056 240 0 FreeSans 560 90 0 0 la_data_in[4]
+port 236 nsew signal input
+flabel metal2 s 151558 -400 151614 240 0 FreeSans 560 90 0 0 la_data_in[50]
+port 237 nsew signal input
+flabel metal2 s 153331 -400 153387 240 0 FreeSans 560 90 0 0 la_data_in[51]
+port 238 nsew signal input
+flabel metal2 s 155104 -400 155160 240 0 FreeSans 560 90 0 0 la_data_in[52]
+port 239 nsew signal input
+flabel metal2 s 156877 -400 156933 240 0 FreeSans 560 90 0 0 la_data_in[53]
+port 240 nsew signal input
+flabel metal2 s 158650 -400 158706 240 0 FreeSans 560 90 0 0 la_data_in[54]
+port 241 nsew signal input
+flabel metal2 s 160423 -400 160479 240 0 FreeSans 560 90 0 0 la_data_in[55]
+port 242 nsew signal input
+flabel metal2 s 162196 -400 162252 240 0 FreeSans 560 90 0 0 la_data_in[56]
+port 243 nsew signal input
+flabel metal2 s 163969 -400 164025 240 0 FreeSans 560 90 0 0 la_data_in[57]
+port 244 nsew signal input
+flabel metal2 s 165742 -400 165798 240 0 FreeSans 560 90 0 0 la_data_in[58]
+port 245 nsew signal input
+flabel metal2 s 167515 -400 167571 240 0 FreeSans 560 90 0 0 la_data_in[59]
+port 246 nsew signal input
+flabel metal2 s 71773 -400 71829 240 0 FreeSans 560 90 0 0 la_data_in[5]
+port 247 nsew signal input
+flabel metal2 s 169288 -400 169344 240 0 FreeSans 560 90 0 0 la_data_in[60]
+port 248 nsew signal input
+flabel metal2 s 171061 -400 171117 240 0 FreeSans 560 90 0 0 la_data_in[61]
+port 249 nsew signal input
+flabel metal2 s 172834 -400 172890 240 0 FreeSans 560 90 0 0 la_data_in[62]
+port 250 nsew signal input
+flabel metal2 s 174607 -400 174663 240 0 FreeSans 560 90 0 0 la_data_in[63]
+port 251 nsew signal input
+flabel metal2 s 176380 -400 176436 240 0 FreeSans 560 90 0 0 la_data_in[64]
+port 252 nsew signal input
+flabel metal2 s 178153 -400 178209 240 0 FreeSans 560 90 0 0 la_data_in[65]
+port 253 nsew signal input
+flabel metal2 s 179926 -400 179982 240 0 FreeSans 560 90 0 0 la_data_in[66]
+port 254 nsew signal input
+flabel metal2 s 181699 -400 181755 240 0 FreeSans 560 90 0 0 la_data_in[67]
+port 255 nsew signal input
+flabel metal2 s 183472 -400 183528 240 0 FreeSans 560 90 0 0 la_data_in[68]
+port 256 nsew signal input
+flabel metal2 s 185245 -400 185301 240 0 FreeSans 560 90 0 0 la_data_in[69]
+port 257 nsew signal input
+flabel metal2 s 73546 -400 73602 240 0 FreeSans 560 90 0 0 la_data_in[6]
+port 258 nsew signal input
+flabel metal2 s 187018 -400 187074 240 0 FreeSans 560 90 0 0 la_data_in[70]
+port 259 nsew signal input
+flabel metal2 s 188791 -400 188847 240 0 FreeSans 560 90 0 0 la_data_in[71]
+port 260 nsew signal input
+flabel metal2 s 190564 -400 190620 240 0 FreeSans 560 90 0 0 la_data_in[72]
+port 261 nsew signal input
+flabel metal2 s 192337 -400 192393 240 0 FreeSans 560 90 0 0 la_data_in[73]
+port 262 nsew signal input
+flabel metal2 s 194110 -400 194166 240 0 FreeSans 560 90 0 0 la_data_in[74]
+port 263 nsew signal input
+flabel metal2 s 195883 -400 195939 240 0 FreeSans 560 90 0 0 la_data_in[75]
+port 264 nsew signal input
+flabel metal2 s 197656 -400 197712 240 0 FreeSans 560 90 0 0 la_data_in[76]
+port 265 nsew signal input
+flabel metal2 s 199429 -400 199485 240 0 FreeSans 560 90 0 0 la_data_in[77]
+port 266 nsew signal input
+flabel metal2 s 201202 -400 201258 240 0 FreeSans 560 90 0 0 la_data_in[78]
+port 267 nsew signal input
+flabel metal2 s 202975 -400 203031 240 0 FreeSans 560 90 0 0 la_data_in[79]
+port 268 nsew signal input
+flabel metal2 s 75319 -400 75375 240 0 FreeSans 560 90 0 0 la_data_in[7]
+port 269 nsew signal input
+flabel metal2 s 204748 -400 204804 240 0 FreeSans 560 90 0 0 la_data_in[80]
+port 270 nsew signal input
+flabel metal2 s 206521 -400 206577 240 0 FreeSans 560 90 0 0 la_data_in[81]
+port 271 nsew signal input
+flabel metal2 s 208294 -400 208350 240 0 FreeSans 560 90 0 0 la_data_in[82]
+port 272 nsew signal input
+flabel metal2 s 210067 -400 210123 240 0 FreeSans 560 90 0 0 la_data_in[83]
+port 273 nsew signal input
+flabel metal2 s 211840 -400 211896 240 0 FreeSans 560 90 0 0 la_data_in[84]
+port 274 nsew signal input
+flabel metal2 s 213613 -400 213669 240 0 FreeSans 560 90 0 0 la_data_in[85]
+port 275 nsew signal input
+flabel metal2 s 215386 -400 215442 240 0 FreeSans 560 90 0 0 la_data_in[86]
+port 276 nsew signal input
+flabel metal2 s 217159 -400 217215 240 0 FreeSans 560 90 0 0 la_data_in[87]
+port 277 nsew signal input
+flabel metal2 s 218932 -400 218988 240 0 FreeSans 560 90 0 0 la_data_in[88]
+port 278 nsew signal input
+flabel metal2 s 220705 -400 220761 240 0 FreeSans 560 90 0 0 la_data_in[89]
+port 279 nsew signal input
+flabel metal2 s 77092 -400 77148 240 0 FreeSans 560 90 0 0 la_data_in[8]
+port 280 nsew signal input
+flabel metal2 s 222478 -400 222534 240 0 FreeSans 560 90 0 0 la_data_in[90]
+port 281 nsew signal input
+flabel metal2 s 224251 -400 224307 240 0 FreeSans 560 90 0 0 la_data_in[91]
+port 282 nsew signal input
+flabel metal2 s 226024 -400 226080 240 0 FreeSans 560 90 0 0 la_data_in[92]
+port 283 nsew signal input
+flabel metal2 s 227797 -400 227853 240 0 FreeSans 560 90 0 0 la_data_in[93]
+port 284 nsew signal input
+flabel metal2 s 229570 -400 229626 240 0 FreeSans 560 90 0 0 la_data_in[94]
+port 285 nsew signal input
+flabel metal2 s 231343 -400 231399 240 0 FreeSans 560 90 0 0 la_data_in[95]
+port 286 nsew signal input
+flabel metal2 s 233116 -400 233172 240 0 FreeSans 560 90 0 0 la_data_in[96]
+port 287 nsew signal input
+flabel metal2 s 234889 -400 234945 240 0 FreeSans 560 90 0 0 la_data_in[97]
+port 288 nsew signal input
+flabel metal2 s 236662 -400 236718 240 0 FreeSans 560 90 0 0 la_data_in[98]
+port 289 nsew signal input
+flabel metal2 s 238435 -400 238491 240 0 FreeSans 560 90 0 0 la_data_in[99]
+port 290 nsew signal input
+flabel metal2 s 78865 -400 78921 240 0 FreeSans 560 90 0 0 la_data_in[9]
+port 291 nsew signal input
+flabel metal2 s 63499 -400 63555 240 0 FreeSans 560 90 0 0 la_data_out[0]
+port 292 nsew signal tristate
+flabel metal2 s 240799 -400 240855 240 0 FreeSans 560 90 0 0 la_data_out[100]
+port 293 nsew signal tristate
+flabel metal2 s 242572 -400 242628 240 0 FreeSans 560 90 0 0 la_data_out[101]
+port 294 nsew signal tristate
+flabel metal2 s 244345 -400 244401 240 0 FreeSans 560 90 0 0 la_data_out[102]
+port 295 nsew signal tristate
+flabel metal2 s 246118 -400 246174 240 0 FreeSans 560 90 0 0 la_data_out[103]
+port 296 nsew signal tristate
+flabel metal2 s 247891 -400 247947 240 0 FreeSans 560 90 0 0 la_data_out[104]
+port 297 nsew signal tristate
+flabel metal2 s 249664 -400 249720 240 0 FreeSans 560 90 0 0 la_data_out[105]
+port 298 nsew signal tristate
+flabel metal2 s 251437 -400 251493 240 0 FreeSans 560 90 0 0 la_data_out[106]
+port 299 nsew signal tristate
+flabel metal2 s 253210 -400 253266 240 0 FreeSans 560 90 0 0 la_data_out[107]
+port 300 nsew signal tristate
+flabel metal2 s 254983 -400 255039 240 0 FreeSans 560 90 0 0 la_data_out[108]
+port 301 nsew signal tristate
+flabel metal2 s 256756 -400 256812 240 0 FreeSans 560 90 0 0 la_data_out[109]
+port 302 nsew signal tristate
+flabel metal2 s 81229 -400 81285 240 0 FreeSans 560 90 0 0 la_data_out[10]
+port 303 nsew signal tristate
+flabel metal2 s 258529 -400 258585 240 0 FreeSans 560 90 0 0 la_data_out[110]
+port 304 nsew signal tristate
+flabel metal2 s 260302 -400 260358 240 0 FreeSans 560 90 0 0 la_data_out[111]
+port 305 nsew signal tristate
+flabel metal2 s 262075 -400 262131 240 0 FreeSans 560 90 0 0 la_data_out[112]
+port 306 nsew signal tristate
+flabel metal2 s 263848 -400 263904 240 0 FreeSans 560 90 0 0 la_data_out[113]
+port 307 nsew signal tristate
+flabel metal2 s 265621 -400 265677 240 0 FreeSans 560 90 0 0 la_data_out[114]
+port 308 nsew signal tristate
+flabel metal2 s 267394 -400 267450 240 0 FreeSans 560 90 0 0 la_data_out[115]
+port 309 nsew signal tristate
+flabel metal2 s 269167 -400 269223 240 0 FreeSans 560 90 0 0 la_data_out[116]
+port 310 nsew signal tristate
+flabel metal2 s 270940 -400 270996 240 0 FreeSans 560 90 0 0 la_data_out[117]
+port 311 nsew signal tristate
+flabel metal2 s 272713 -400 272769 240 0 FreeSans 560 90 0 0 la_data_out[118]
+port 312 nsew signal tristate
+flabel metal2 s 274486 -400 274542 240 0 FreeSans 560 90 0 0 la_data_out[119]
+port 313 nsew signal tristate
+flabel metal2 s 83002 -400 83058 240 0 FreeSans 560 90 0 0 la_data_out[11]
+port 314 nsew signal tristate
+flabel metal2 s 276259 -400 276315 240 0 FreeSans 560 90 0 0 la_data_out[120]
+port 315 nsew signal tristate
+flabel metal2 s 278032 -400 278088 240 0 FreeSans 560 90 0 0 la_data_out[121]
+port 316 nsew signal tristate
+flabel metal2 s 279805 -400 279861 240 0 FreeSans 560 90 0 0 la_data_out[122]
+port 317 nsew signal tristate
+flabel metal2 s 281578 -400 281634 240 0 FreeSans 560 90 0 0 la_data_out[123]
+port 318 nsew signal tristate
+flabel metal2 s 283351 -400 283407 240 0 FreeSans 560 90 0 0 la_data_out[124]
+port 319 nsew signal tristate
+flabel metal2 s 285124 -400 285180 240 0 FreeSans 560 90 0 0 la_data_out[125]
+port 320 nsew signal tristate
+flabel metal2 s 286897 -400 286953 240 0 FreeSans 560 90 0 0 la_data_out[126]
+port 321 nsew signal tristate
+flabel metal2 s 288670 -400 288726 240 0 FreeSans 560 90 0 0 la_data_out[127]
+port 322 nsew signal tristate
+flabel metal2 s 84775 -400 84831 240 0 FreeSans 560 90 0 0 la_data_out[12]
+port 323 nsew signal tristate
+flabel metal2 s 86548 -400 86604 240 0 FreeSans 560 90 0 0 la_data_out[13]
+port 324 nsew signal tristate
+flabel metal2 s 88321 -400 88377 240 0 FreeSans 560 90 0 0 la_data_out[14]
+port 325 nsew signal tristate
+flabel metal2 s 90094 -400 90150 240 0 FreeSans 560 90 0 0 la_data_out[15]
+port 326 nsew signal tristate
+flabel metal2 s 91867 -400 91923 240 0 FreeSans 560 90 0 0 la_data_out[16]
+port 327 nsew signal tristate
+flabel metal2 s 93640 -400 93696 240 0 FreeSans 560 90 0 0 la_data_out[17]
+port 328 nsew signal tristate
+flabel metal2 s 95413 -400 95469 240 0 FreeSans 560 90 0 0 la_data_out[18]
+port 329 nsew signal tristate
+flabel metal2 s 97186 -400 97242 240 0 FreeSans 560 90 0 0 la_data_out[19]
+port 330 nsew signal tristate
+flabel metal2 s 65272 -400 65328 240 0 FreeSans 560 90 0 0 la_data_out[1]
+port 331 nsew signal tristate
+flabel metal2 s 98959 -400 99015 240 0 FreeSans 560 90 0 0 la_data_out[20]
+port 332 nsew signal tristate
+flabel metal2 s 100732 -400 100788 240 0 FreeSans 560 90 0 0 la_data_out[21]
+port 333 nsew signal tristate
+flabel metal2 s 102505 -400 102561 240 0 FreeSans 560 90 0 0 la_data_out[22]
+port 334 nsew signal tristate
+flabel metal2 s 104278 -400 104334 240 0 FreeSans 560 90 0 0 la_data_out[23]
+port 335 nsew signal tristate
+flabel metal2 s 106051 -400 106107 240 0 FreeSans 560 90 0 0 la_data_out[24]
+port 336 nsew signal tristate
+flabel metal2 s 107824 -400 107880 240 0 FreeSans 560 90 0 0 la_data_out[25]
+port 337 nsew signal tristate
+flabel metal2 s 109597 -400 109653 240 0 FreeSans 560 90 0 0 la_data_out[26]
+port 338 nsew signal tristate
+flabel metal2 s 111370 -400 111426 240 0 FreeSans 560 90 0 0 la_data_out[27]
+port 339 nsew signal tristate
+flabel metal2 s 113143 -400 113199 240 0 FreeSans 560 90 0 0 la_data_out[28]
+port 340 nsew signal tristate
+flabel metal2 s 114916 -400 114972 240 0 FreeSans 560 90 0 0 la_data_out[29]
+port 341 nsew signal tristate
+flabel metal2 s 67045 -400 67101 240 0 FreeSans 560 90 0 0 la_data_out[2]
+port 342 nsew signal tristate
+flabel metal2 s 116689 -400 116745 240 0 FreeSans 560 90 0 0 la_data_out[30]
+port 343 nsew signal tristate
+flabel metal2 s 118462 -400 118518 240 0 FreeSans 560 90 0 0 la_data_out[31]
+port 344 nsew signal tristate
+flabel metal2 s 120235 -400 120291 240 0 FreeSans 560 90 0 0 la_data_out[32]
+port 345 nsew signal tristate
+flabel metal2 s 122008 -400 122064 240 0 FreeSans 560 90 0 0 la_data_out[33]
+port 346 nsew signal tristate
+flabel metal2 s 123781 -400 123837 240 0 FreeSans 560 90 0 0 la_data_out[34]
+port 347 nsew signal tristate
+flabel metal2 s 125554 -400 125610 240 0 FreeSans 560 90 0 0 la_data_out[35]
+port 348 nsew signal tristate
+flabel metal2 s 127327 -400 127383 240 0 FreeSans 560 90 0 0 la_data_out[36]
+port 349 nsew signal tristate
+flabel metal2 s 129100 -400 129156 240 0 FreeSans 560 90 0 0 la_data_out[37]
+port 350 nsew signal tristate
+flabel metal2 s 130873 -400 130929 240 0 FreeSans 560 90 0 0 la_data_out[38]
+port 351 nsew signal tristate
+flabel metal2 s 132646 -400 132702 240 0 FreeSans 560 90 0 0 la_data_out[39]
+port 352 nsew signal tristate
+flabel metal2 s 68818 -400 68874 240 0 FreeSans 560 90 0 0 la_data_out[3]
+port 353 nsew signal tristate
+flabel metal2 s 134419 -400 134475 240 0 FreeSans 560 90 0 0 la_data_out[40]
+port 354 nsew signal tristate
+flabel metal2 s 136192 -400 136248 240 0 FreeSans 560 90 0 0 la_data_out[41]
+port 355 nsew signal tristate
+flabel metal2 s 137965 -400 138021 240 0 FreeSans 560 90 0 0 la_data_out[42]
+port 356 nsew signal tristate
+flabel metal2 s 139738 -400 139794 240 0 FreeSans 560 90 0 0 la_data_out[43]
+port 357 nsew signal tristate
+flabel metal2 s 141511 -400 141567 240 0 FreeSans 560 90 0 0 la_data_out[44]
+port 358 nsew signal tristate
+flabel metal2 s 143284 -400 143340 240 0 FreeSans 560 90 0 0 la_data_out[45]
+port 359 nsew signal tristate
+flabel metal2 s 145057 -400 145113 240 0 FreeSans 560 90 0 0 la_data_out[46]
+port 360 nsew signal tristate
+flabel metal2 s 146830 -400 146886 240 0 FreeSans 560 90 0 0 la_data_out[47]
+port 361 nsew signal tristate
+flabel metal2 s 148603 -400 148659 240 0 FreeSans 560 90 0 0 la_data_out[48]
+port 362 nsew signal tristate
+flabel metal2 s 150376 -400 150432 240 0 FreeSans 560 90 0 0 la_data_out[49]
+port 363 nsew signal tristate
+flabel metal2 s 70591 -400 70647 240 0 FreeSans 560 90 0 0 la_data_out[4]
+port 364 nsew signal tristate
+flabel metal2 s 152149 -400 152205 240 0 FreeSans 560 90 0 0 la_data_out[50]
+port 365 nsew signal tristate
+flabel metal2 s 153922 -400 153978 240 0 FreeSans 560 90 0 0 la_data_out[51]
+port 366 nsew signal tristate
+flabel metal2 s 155695 -400 155751 240 0 FreeSans 560 90 0 0 la_data_out[52]
+port 367 nsew signal tristate
+flabel metal2 s 157468 -400 157524 240 0 FreeSans 560 90 0 0 la_data_out[53]
+port 368 nsew signal tristate
+flabel metal2 s 159241 -400 159297 240 0 FreeSans 560 90 0 0 la_data_out[54]
+port 369 nsew signal tristate
+flabel metal2 s 161014 -400 161070 240 0 FreeSans 560 90 0 0 la_data_out[55]
+port 370 nsew signal tristate
+flabel metal2 s 162787 -400 162843 240 0 FreeSans 560 90 0 0 la_data_out[56]
+port 371 nsew signal tristate
+flabel metal2 s 164560 -400 164616 240 0 FreeSans 560 90 0 0 la_data_out[57]
+port 372 nsew signal tristate
+flabel metal2 s 166333 -400 166389 240 0 FreeSans 560 90 0 0 la_data_out[58]
+port 373 nsew signal tristate
+flabel metal2 s 168106 -400 168162 240 0 FreeSans 560 90 0 0 la_data_out[59]
+port 374 nsew signal tristate
+flabel metal2 s 72364 -400 72420 240 0 FreeSans 560 90 0 0 la_data_out[5]
+port 375 nsew signal tristate
+flabel metal2 s 169879 -400 169935 240 0 FreeSans 560 90 0 0 la_data_out[60]
+port 376 nsew signal tristate
+flabel metal2 s 171652 -400 171708 240 0 FreeSans 560 90 0 0 la_data_out[61]
+port 377 nsew signal tristate
+flabel metal2 s 173425 -400 173481 240 0 FreeSans 560 90 0 0 la_data_out[62]
+port 378 nsew signal tristate
+flabel metal2 s 175198 -400 175254 240 0 FreeSans 560 90 0 0 la_data_out[63]
+port 379 nsew signal tristate
+flabel metal2 s 176971 -400 177027 240 0 FreeSans 560 90 0 0 la_data_out[64]
+port 380 nsew signal tristate
+flabel metal2 s 178744 -400 178800 240 0 FreeSans 560 90 0 0 la_data_out[65]
+port 381 nsew signal tristate
+flabel metal2 s 180517 -400 180573 240 0 FreeSans 560 90 0 0 la_data_out[66]
+port 382 nsew signal tristate
+flabel metal2 s 182290 -400 182346 240 0 FreeSans 560 90 0 0 la_data_out[67]
+port 383 nsew signal tristate
+flabel metal2 s 184063 -400 184119 240 0 FreeSans 560 90 0 0 la_data_out[68]
+port 384 nsew signal tristate
+flabel metal2 s 185836 -400 185892 240 0 FreeSans 560 90 0 0 la_data_out[69]
+port 385 nsew signal tristate
+flabel metal2 s 74137 -400 74193 240 0 FreeSans 560 90 0 0 la_data_out[6]
+port 386 nsew signal tristate
+flabel metal2 s 187609 -400 187665 240 0 FreeSans 560 90 0 0 la_data_out[70]
+port 387 nsew signal tristate
+flabel metal2 s 189382 -400 189438 240 0 FreeSans 560 90 0 0 la_data_out[71]
+port 388 nsew signal tristate
+flabel metal2 s 191155 -400 191211 240 0 FreeSans 560 90 0 0 la_data_out[72]
+port 389 nsew signal tristate
+flabel metal2 s 192928 -400 192984 240 0 FreeSans 560 90 0 0 la_data_out[73]
+port 390 nsew signal tristate
+flabel metal2 s 194701 -400 194757 240 0 FreeSans 560 90 0 0 la_data_out[74]
+port 391 nsew signal tristate
+flabel metal2 s 196474 -400 196530 240 0 FreeSans 560 90 0 0 la_data_out[75]
+port 392 nsew signal tristate
+flabel metal2 s 198247 -400 198303 240 0 FreeSans 560 90 0 0 la_data_out[76]
+port 393 nsew signal tristate
+flabel metal2 s 200020 -400 200076 240 0 FreeSans 560 90 0 0 la_data_out[77]
+port 394 nsew signal tristate
+flabel metal2 s 201793 -400 201849 240 0 FreeSans 560 90 0 0 la_data_out[78]
+port 395 nsew signal tristate
+flabel metal2 s 203566 -400 203622 240 0 FreeSans 560 90 0 0 la_data_out[79]
+port 396 nsew signal tristate
+flabel metal2 s 75910 -400 75966 240 0 FreeSans 560 90 0 0 la_data_out[7]
+port 397 nsew signal tristate
+flabel metal2 s 205339 -400 205395 240 0 FreeSans 560 90 0 0 la_data_out[80]
+port 398 nsew signal tristate
+flabel metal2 s 207112 -400 207168 240 0 FreeSans 560 90 0 0 la_data_out[81]
+port 399 nsew signal tristate
+flabel metal2 s 208885 -400 208941 240 0 FreeSans 560 90 0 0 la_data_out[82]
+port 400 nsew signal tristate
+flabel metal2 s 210658 -400 210714 240 0 FreeSans 560 90 0 0 la_data_out[83]
+port 401 nsew signal tristate
+flabel metal2 s 212431 -400 212487 240 0 FreeSans 560 90 0 0 la_data_out[84]
+port 402 nsew signal tristate
+flabel metal2 s 214204 -400 214260 240 0 FreeSans 560 90 0 0 la_data_out[85]
+port 403 nsew signal tristate
+flabel metal2 s 215977 -400 216033 240 0 FreeSans 560 90 0 0 la_data_out[86]
+port 404 nsew signal tristate
+flabel metal2 s 217750 -400 217806 240 0 FreeSans 560 90 0 0 la_data_out[87]
+port 405 nsew signal tristate
+flabel metal2 s 219523 -400 219579 240 0 FreeSans 560 90 0 0 la_data_out[88]
+port 406 nsew signal tristate
+flabel metal2 s 221296 -400 221352 240 0 FreeSans 560 90 0 0 la_data_out[89]
+port 407 nsew signal tristate
+flabel metal2 s 77683 -400 77739 240 0 FreeSans 560 90 0 0 la_data_out[8]
+port 408 nsew signal tristate
+flabel metal2 s 223069 -400 223125 240 0 FreeSans 560 90 0 0 la_data_out[90]
+port 409 nsew signal tristate
+flabel metal2 s 224842 -400 224898 240 0 FreeSans 560 90 0 0 la_data_out[91]
+port 410 nsew signal tristate
+flabel metal2 s 226615 -400 226671 240 0 FreeSans 560 90 0 0 la_data_out[92]
+port 411 nsew signal tristate
+flabel metal2 s 228388 -400 228444 240 0 FreeSans 560 90 0 0 la_data_out[93]
+port 412 nsew signal tristate
+flabel metal2 s 230161 -400 230217 240 0 FreeSans 560 90 0 0 la_data_out[94]
+port 413 nsew signal tristate
+flabel metal2 s 231934 -400 231990 240 0 FreeSans 560 90 0 0 la_data_out[95]
+port 414 nsew signal tristate
+flabel metal2 s 233707 -400 233763 240 0 FreeSans 560 90 0 0 la_data_out[96]
+port 415 nsew signal tristate
+flabel metal2 s 235480 -400 235536 240 0 FreeSans 560 90 0 0 la_data_out[97]
+port 416 nsew signal tristate
+flabel metal2 s 237253 -400 237309 240 0 FreeSans 560 90 0 0 la_data_out[98]
+port 417 nsew signal tristate
+flabel metal2 s 239026 -400 239082 240 0 FreeSans 560 90 0 0 la_data_out[99]
+port 418 nsew signal tristate
+flabel metal2 s 79456 -400 79512 240 0 FreeSans 560 90 0 0 la_data_out[9]
+port 419 nsew signal tristate
+flabel metal2 s 64090 -400 64146 240 0 FreeSans 560 90 0 0 la_oenb[0]
+port 420 nsew signal input
+flabel metal2 s 241390 -400 241446 240 0 FreeSans 560 90 0 0 la_oenb[100]
+port 421 nsew signal input
+flabel metal2 s 243163 -400 243219 240 0 FreeSans 560 90 0 0 la_oenb[101]
+port 422 nsew signal input
+flabel metal2 s 244936 -400 244992 240 0 FreeSans 560 90 0 0 la_oenb[102]
+port 423 nsew signal input
+flabel metal2 s 246709 -400 246765 240 0 FreeSans 560 90 0 0 la_oenb[103]
+port 424 nsew signal input
+flabel metal2 s 248482 -400 248538 240 0 FreeSans 560 90 0 0 la_oenb[104]
+port 425 nsew signal input
+flabel metal2 s 250255 -400 250311 240 0 FreeSans 560 90 0 0 la_oenb[105]
+port 426 nsew signal input
+flabel metal2 s 252028 -400 252084 240 0 FreeSans 560 90 0 0 la_oenb[106]
+port 427 nsew signal input
+flabel metal2 s 253801 -400 253857 240 0 FreeSans 560 90 0 0 la_oenb[107]
+port 428 nsew signal input
+flabel metal2 s 255574 -400 255630 240 0 FreeSans 560 90 0 0 la_oenb[108]
+port 429 nsew signal input
+flabel metal2 s 257347 -400 257403 240 0 FreeSans 560 90 0 0 la_oenb[109]
+port 430 nsew signal input
+flabel metal2 s 81820 -400 81876 240 0 FreeSans 560 90 0 0 la_oenb[10]
+port 431 nsew signal input
+flabel metal2 s 259120 -400 259176 240 0 FreeSans 560 90 0 0 la_oenb[110]
+port 432 nsew signal input
+flabel metal2 s 260893 -400 260949 240 0 FreeSans 560 90 0 0 la_oenb[111]
+port 433 nsew signal input
+flabel metal2 s 262666 -400 262722 240 0 FreeSans 560 90 0 0 la_oenb[112]
+port 434 nsew signal input
+flabel metal2 s 264439 -400 264495 240 0 FreeSans 560 90 0 0 la_oenb[113]
+port 435 nsew signal input
+flabel metal2 s 266212 -400 266268 240 0 FreeSans 560 90 0 0 la_oenb[114]
+port 436 nsew signal input
+flabel metal2 s 267985 -400 268041 240 0 FreeSans 560 90 0 0 la_oenb[115]
+port 437 nsew signal input
+flabel metal2 s 269758 -400 269814 240 0 FreeSans 560 90 0 0 la_oenb[116]
+port 438 nsew signal input
+flabel metal2 s 271531 -400 271587 240 0 FreeSans 560 90 0 0 la_oenb[117]
+port 439 nsew signal input
+flabel metal2 s 273304 -400 273360 240 0 FreeSans 560 90 0 0 la_oenb[118]
+port 440 nsew signal input
+flabel metal2 s 275077 -400 275133 240 0 FreeSans 560 90 0 0 la_oenb[119]
+port 441 nsew signal input
+flabel metal2 s 83593 -400 83649 240 0 FreeSans 560 90 0 0 la_oenb[11]
+port 442 nsew signal input
+flabel metal2 s 276850 -400 276906 240 0 FreeSans 560 90 0 0 la_oenb[120]
+port 443 nsew signal input
+flabel metal2 s 278623 -400 278679 240 0 FreeSans 560 90 0 0 la_oenb[121]
+port 444 nsew signal input
+flabel metal2 s 280396 -400 280452 240 0 FreeSans 560 90 0 0 la_oenb[122]
+port 445 nsew signal input
+flabel metal2 s 282169 -400 282225 240 0 FreeSans 560 90 0 0 la_oenb[123]
+port 446 nsew signal input
+flabel metal2 s 283942 -400 283998 240 0 FreeSans 560 90 0 0 la_oenb[124]
+port 447 nsew signal input
+flabel metal2 s 285715 -400 285771 240 0 FreeSans 560 90 0 0 la_oenb[125]
+port 448 nsew signal input
+flabel metal2 s 287488 -400 287544 240 0 FreeSans 560 90 0 0 la_oenb[126]
+port 449 nsew signal input
+flabel metal2 s 289261 -400 289317 240 0 FreeSans 560 90 0 0 la_oenb[127]
+port 450 nsew signal input
+flabel metal2 s 85366 -400 85422 240 0 FreeSans 560 90 0 0 la_oenb[12]
+port 451 nsew signal input
+flabel metal2 s 87139 -400 87195 240 0 FreeSans 560 90 0 0 la_oenb[13]
+port 452 nsew signal input
+flabel metal2 s 88912 -400 88968 240 0 FreeSans 560 90 0 0 la_oenb[14]
+port 453 nsew signal input
+flabel metal2 s 90685 -400 90741 240 0 FreeSans 560 90 0 0 la_oenb[15]
+port 454 nsew signal input
+flabel metal2 s 92458 -400 92514 240 0 FreeSans 560 90 0 0 la_oenb[16]
+port 455 nsew signal input
+flabel metal2 s 94231 -400 94287 240 0 FreeSans 560 90 0 0 la_oenb[17]
+port 456 nsew signal input
+flabel metal2 s 96004 -400 96060 240 0 FreeSans 560 90 0 0 la_oenb[18]
+port 457 nsew signal input
+flabel metal2 s 97777 -400 97833 240 0 FreeSans 560 90 0 0 la_oenb[19]
+port 458 nsew signal input
+flabel metal2 s 65863 -400 65919 240 0 FreeSans 560 90 0 0 la_oenb[1]
+port 459 nsew signal input
+flabel metal2 s 99550 -400 99606 240 0 FreeSans 560 90 0 0 la_oenb[20]
+port 460 nsew signal input
+flabel metal2 s 101323 -400 101379 240 0 FreeSans 560 90 0 0 la_oenb[21]
+port 461 nsew signal input
+flabel metal2 s 103096 -400 103152 240 0 FreeSans 560 90 0 0 la_oenb[22]
+port 462 nsew signal input
+flabel metal2 s 104869 -400 104925 240 0 FreeSans 560 90 0 0 la_oenb[23]
+port 463 nsew signal input
+flabel metal2 s 106642 -400 106698 240 0 FreeSans 560 90 0 0 la_oenb[24]
+port 464 nsew signal input
+flabel metal2 s 108415 -400 108471 240 0 FreeSans 560 90 0 0 la_oenb[25]
+port 465 nsew signal input
+flabel metal2 s 110188 -400 110244 240 0 FreeSans 560 90 0 0 la_oenb[26]
+port 466 nsew signal input
+flabel metal2 s 111961 -400 112017 240 0 FreeSans 560 90 0 0 la_oenb[27]
+port 467 nsew signal input
+flabel metal2 s 113734 -400 113790 240 0 FreeSans 560 90 0 0 la_oenb[28]
+port 468 nsew signal input
+flabel metal2 s 115507 -400 115563 240 0 FreeSans 560 90 0 0 la_oenb[29]
+port 469 nsew signal input
+flabel metal2 s 67636 -400 67692 240 0 FreeSans 560 90 0 0 la_oenb[2]
+port 470 nsew signal input
+flabel metal2 s 117280 -400 117336 240 0 FreeSans 560 90 0 0 la_oenb[30]
+port 471 nsew signal input
+flabel metal2 s 119053 -400 119109 240 0 FreeSans 560 90 0 0 la_oenb[31]
+port 472 nsew signal input
+flabel metal2 s 120826 -400 120882 240 0 FreeSans 560 90 0 0 la_oenb[32]
+port 473 nsew signal input
+flabel metal2 s 122599 -400 122655 240 0 FreeSans 560 90 0 0 la_oenb[33]
+port 474 nsew signal input
+flabel metal2 s 124372 -400 124428 240 0 FreeSans 560 90 0 0 la_oenb[34]
+port 475 nsew signal input
+flabel metal2 s 126145 -400 126201 240 0 FreeSans 560 90 0 0 la_oenb[35]
+port 476 nsew signal input
+flabel metal2 s 127918 -400 127974 240 0 FreeSans 560 90 0 0 la_oenb[36]
+port 477 nsew signal input
+flabel metal2 s 129691 -400 129747 240 0 FreeSans 560 90 0 0 la_oenb[37]
+port 478 nsew signal input
+flabel metal2 s 131464 -400 131520 240 0 FreeSans 560 90 0 0 la_oenb[38]
+port 479 nsew signal input
+flabel metal2 s 133237 -400 133293 240 0 FreeSans 560 90 0 0 la_oenb[39]
+port 480 nsew signal input
+flabel metal2 s 69409 -400 69465 240 0 FreeSans 560 90 0 0 la_oenb[3]
+port 481 nsew signal input
+flabel metal2 s 135010 -400 135066 240 0 FreeSans 560 90 0 0 la_oenb[40]
+port 482 nsew signal input
+flabel metal2 s 136783 -400 136839 240 0 FreeSans 560 90 0 0 la_oenb[41]
+port 483 nsew signal input
+flabel metal2 s 138556 -400 138612 240 0 FreeSans 560 90 0 0 la_oenb[42]
+port 484 nsew signal input
+flabel metal2 s 140329 -400 140385 240 0 FreeSans 560 90 0 0 la_oenb[43]
+port 485 nsew signal input
+flabel metal2 s 142102 -400 142158 240 0 FreeSans 560 90 0 0 la_oenb[44]
+port 486 nsew signal input
+flabel metal2 s 143875 -400 143931 240 0 FreeSans 560 90 0 0 la_oenb[45]
+port 487 nsew signal input
+flabel metal2 s 145648 -400 145704 240 0 FreeSans 560 90 0 0 la_oenb[46]
+port 488 nsew signal input
+flabel metal2 s 147421 -400 147477 240 0 FreeSans 560 90 0 0 la_oenb[47]
+port 489 nsew signal input
+flabel metal2 s 149194 -400 149250 240 0 FreeSans 560 90 0 0 la_oenb[48]
+port 490 nsew signal input
+flabel metal2 s 150967 -400 151023 240 0 FreeSans 560 90 0 0 la_oenb[49]
+port 491 nsew signal input
+flabel metal2 s 71182 -400 71238 240 0 FreeSans 560 90 0 0 la_oenb[4]
+port 492 nsew signal input
+flabel metal2 s 152740 -400 152796 240 0 FreeSans 560 90 0 0 la_oenb[50]
+port 493 nsew signal input
+flabel metal2 s 154513 -400 154569 240 0 FreeSans 560 90 0 0 la_oenb[51]
+port 494 nsew signal input
+flabel metal2 s 156286 -400 156342 240 0 FreeSans 560 90 0 0 la_oenb[52]
+port 495 nsew signal input
+flabel metal2 s 158059 -400 158115 240 0 FreeSans 560 90 0 0 la_oenb[53]
+port 496 nsew signal input
+flabel metal2 s 159832 -400 159888 240 0 FreeSans 560 90 0 0 la_oenb[54]
+port 497 nsew signal input
+flabel metal2 s 161605 -400 161661 240 0 FreeSans 560 90 0 0 la_oenb[55]
+port 498 nsew signal input
+flabel metal2 s 163378 -400 163434 240 0 FreeSans 560 90 0 0 la_oenb[56]
+port 499 nsew signal input
+flabel metal2 s 165151 -400 165207 240 0 FreeSans 560 90 0 0 la_oenb[57]
+port 500 nsew signal input
+flabel metal2 s 166924 -400 166980 240 0 FreeSans 560 90 0 0 la_oenb[58]
+port 501 nsew signal input
+flabel metal2 s 168697 -400 168753 240 0 FreeSans 560 90 0 0 la_oenb[59]
+port 502 nsew signal input
+flabel metal2 s 72955 -400 73011 240 0 FreeSans 560 90 0 0 la_oenb[5]
+port 503 nsew signal input
+flabel metal2 s 170470 -400 170526 240 0 FreeSans 560 90 0 0 la_oenb[60]
+port 504 nsew signal input
+flabel metal2 s 172243 -400 172299 240 0 FreeSans 560 90 0 0 la_oenb[61]
+port 505 nsew signal input
+flabel metal2 s 174016 -400 174072 240 0 FreeSans 560 90 0 0 la_oenb[62]
+port 506 nsew signal input
+flabel metal2 s 175789 -400 175845 240 0 FreeSans 560 90 0 0 la_oenb[63]
+port 507 nsew signal input
+flabel metal2 s 177562 -400 177618 240 0 FreeSans 560 90 0 0 la_oenb[64]
+port 508 nsew signal input
+flabel metal2 s 179335 -400 179391 240 0 FreeSans 560 90 0 0 la_oenb[65]
+port 509 nsew signal input
+flabel metal2 s 181108 -400 181164 240 0 FreeSans 560 90 0 0 la_oenb[66]
+port 510 nsew signal input
+flabel metal2 s 182881 -400 182937 240 0 FreeSans 560 90 0 0 la_oenb[67]
+port 511 nsew signal input
+flabel metal2 s 184654 -400 184710 240 0 FreeSans 560 90 0 0 la_oenb[68]
+port 512 nsew signal input
+flabel metal2 s 186427 -400 186483 240 0 FreeSans 560 90 0 0 la_oenb[69]
+port 513 nsew signal input
+flabel metal2 s 74728 -400 74784 240 0 FreeSans 560 90 0 0 la_oenb[6]
+port 514 nsew signal input
+flabel metal2 s 188200 -400 188256 240 0 FreeSans 560 90 0 0 la_oenb[70]
+port 515 nsew signal input
+flabel metal2 s 189973 -400 190029 240 0 FreeSans 560 90 0 0 la_oenb[71]
+port 516 nsew signal input
+flabel metal2 s 191746 -400 191802 240 0 FreeSans 560 90 0 0 la_oenb[72]
+port 517 nsew signal input
+flabel metal2 s 193519 -400 193575 240 0 FreeSans 560 90 0 0 la_oenb[73]
+port 518 nsew signal input
+flabel metal2 s 195292 -400 195348 240 0 FreeSans 560 90 0 0 la_oenb[74]
+port 519 nsew signal input
+flabel metal2 s 197065 -400 197121 240 0 FreeSans 560 90 0 0 la_oenb[75]
+port 520 nsew signal input
+flabel metal2 s 198838 -400 198894 240 0 FreeSans 560 90 0 0 la_oenb[76]
+port 521 nsew signal input
+flabel metal2 s 200611 -400 200667 240 0 FreeSans 560 90 0 0 la_oenb[77]
+port 522 nsew signal input
+flabel metal2 s 202384 -400 202440 240 0 FreeSans 560 90 0 0 la_oenb[78]
+port 523 nsew signal input
+flabel metal2 s 204157 -400 204213 240 0 FreeSans 560 90 0 0 la_oenb[79]
+port 524 nsew signal input
+flabel metal2 s 76501 -400 76557 240 0 FreeSans 560 90 0 0 la_oenb[7]
+port 525 nsew signal input
+flabel metal2 s 205930 -400 205986 240 0 FreeSans 560 90 0 0 la_oenb[80]
+port 526 nsew signal input
+flabel metal2 s 207703 -400 207759 240 0 FreeSans 560 90 0 0 la_oenb[81]
+port 527 nsew signal input
+flabel metal2 s 209476 -400 209532 240 0 FreeSans 560 90 0 0 la_oenb[82]
+port 528 nsew signal input
+flabel metal2 s 211249 -400 211305 240 0 FreeSans 560 90 0 0 la_oenb[83]
+port 529 nsew signal input
+flabel metal2 s 213022 -400 213078 240 0 FreeSans 560 90 0 0 la_oenb[84]
+port 530 nsew signal input
+flabel metal2 s 214795 -400 214851 240 0 FreeSans 560 90 0 0 la_oenb[85]
+port 531 nsew signal input
+flabel metal2 s 216568 -400 216624 240 0 FreeSans 560 90 0 0 la_oenb[86]
+port 532 nsew signal input
+flabel metal2 s 218341 -400 218397 240 0 FreeSans 560 90 0 0 la_oenb[87]
+port 533 nsew signal input
+flabel metal2 s 220114 -400 220170 240 0 FreeSans 560 90 0 0 la_oenb[88]
+port 534 nsew signal input
+flabel metal2 s 221887 -400 221943 240 0 FreeSans 560 90 0 0 la_oenb[89]
+port 535 nsew signal input
+flabel metal2 s 78274 -400 78330 240 0 FreeSans 560 90 0 0 la_oenb[8]
+port 536 nsew signal input
+flabel metal2 s 223660 -400 223716 240 0 FreeSans 560 90 0 0 la_oenb[90]
+port 537 nsew signal input
+flabel metal2 s 225433 -400 225489 240 0 FreeSans 560 90 0 0 la_oenb[91]
+port 538 nsew signal input
+flabel metal2 s 227206 -400 227262 240 0 FreeSans 560 90 0 0 la_oenb[92]
+port 539 nsew signal input
+flabel metal2 s 228979 -400 229035 240 0 FreeSans 560 90 0 0 la_oenb[93]
+port 540 nsew signal input
+flabel metal2 s 230752 -400 230808 240 0 FreeSans 560 90 0 0 la_oenb[94]
+port 541 nsew signal input
+flabel metal2 s 232525 -400 232581 240 0 FreeSans 560 90 0 0 la_oenb[95]
+port 542 nsew signal input
+flabel metal2 s 234298 -400 234354 240 0 FreeSans 560 90 0 0 la_oenb[96]
+port 543 nsew signal input
+flabel metal2 s 236071 -400 236127 240 0 FreeSans 560 90 0 0 la_oenb[97]
+port 544 nsew signal input
+flabel metal2 s 237844 -400 237900 240 0 FreeSans 560 90 0 0 la_oenb[98]
+port 545 nsew signal input
+flabel metal2 s 239617 -400 239673 240 0 FreeSans 560 90 0 0 la_oenb[99]
+port 546 nsew signal input
+flabel metal2 s 80047 -400 80103 240 0 FreeSans 560 90 0 0 la_oenb[9]
+port 547 nsew signal input
+flabel metal2 s 289852 -400 289908 240 0 FreeSans 560 90 0 0 user_clock2
+port 548 nsew signal input
+flabel metal2 s 290443 -400 290499 240 0 FreeSans 560 90 0 0 user_irq[0]
+port 549 nsew signal tristate
+flabel metal2 s 291034 -400 291090 240 0 FreeSans 560 90 0 0 user_irq[1]
+port 550 nsew signal tristate
+flabel metal2 s 291625 -400 291681 240 0 FreeSans 560 90 0 0 user_irq[2]
+port 551 nsew signal tristate
+flabel metal3 s 291170 319892 292400 322292 0 FreeSans 560 0 0 0 vccd1
+port 552 nsew signal bidirectional
+flabel metal3 s 291170 314892 292400 317292 0 FreeSans 560 0 0 0 vccd1
+port 553 nsew signal bidirectional
+flabel metal3 s 0 321921 830 324321 0 FreeSans 560 0 0 0 vccd2
+port 554 nsew signal bidirectional
+flabel metal3 s 0 316921 830 319321 0 FreeSans 560 0 0 0 vccd2
+port 555 nsew signal bidirectional
+flabel metal3 s 291170 270281 292400 272681 0 FreeSans 560 0 0 0 vdda1
+port 556 nsew signal bidirectional
+flabel metal3 s 291170 275281 292400 277681 0 FreeSans 560 0 0 0 vdda1
+port 557 nsew signal bidirectional
+flabel metal3 s 291170 117615 292400 120015 0 FreeSans 560 0 0 0 vdda1
+port 558 nsew signal bidirectional
+flabel metal3 s 291170 112615 292400 115015 0 FreeSans 560 0 0 0 vdda1
+port 559 nsew signal bidirectional
+flabel metal3 s 0 102444 830 104844 0 FreeSans 560 0 0 0 vdda2
+port 560 nsew signal bidirectional
+flabel metal3 s 0 107444 830 109844 0 FreeSans 560 0 0 0 vdda2
+port 561 nsew signal bidirectional
+flabel metal3 s 260297 351170 262697 352400 0 FreeSans 960 180 0 0 vssa1
+port 562 nsew signal bidirectional
+flabel metal3 s 255297 351170 257697 352400 0 FreeSans 960 180 0 0 vssa1
+port 563 nsew signal bidirectional
+flabel metal3 s 291170 73415 292400 75815 0 FreeSans 560 0 0 0 vssa1
+port 564 nsew signal bidirectional
+flabel metal3 s 291170 68415 292400 70815 0 FreeSans 560 0 0 0 vssa1
+port 565 nsew signal bidirectional
+flabel metal3 s 0 279721 830 282121 0 FreeSans 560 0 0 0 vssa2
+port 566 nsew signal bidirectional
+flabel metal3 s 0 274721 830 277121 0 FreeSans 560 0 0 0 vssa2
+port 567 nsew signal bidirectional
+flabel metal3 s 291170 95715 292400 98115 0 FreeSans 560 0 0 0 vssd1
+port 568 nsew signal bidirectional
+flabel metal3 s 291170 90715 292400 93115 0 FreeSans 560 0 0 0 vssd1
+port 569 nsew signal bidirectional
+flabel metal3 s 0 86444 830 88844 0 FreeSans 560 0 0 0 vssd2
+port 570 nsew signal bidirectional
+flabel metal3 s 0 81444 830 83844 0 FreeSans 560 0 0 0 vssd2
+port 571 nsew signal bidirectional
+flabel metal2 s 262 -400 318 240 0 FreeSans 560 90 0 0 wb_clk_i
+port 572 nsew signal input
+flabel metal2 s 853 -400 909 240 0 FreeSans 560 90 0 0 wb_rst_i
+port 573 nsew signal input
+flabel metal2 s 1444 -400 1500 240 0 FreeSans 560 90 0 0 wbs_ack_o
+port 574 nsew signal tristate
+flabel metal2 s 3808 -400 3864 240 0 FreeSans 560 90 0 0 wbs_adr_i[0]
+port 575 nsew signal input
+flabel metal2 s 23902 -400 23958 240 0 FreeSans 560 90 0 0 wbs_adr_i[10]
+port 576 nsew signal input
+flabel metal2 s 25675 -400 25731 240 0 FreeSans 560 90 0 0 wbs_adr_i[11]
+port 577 nsew signal input
+flabel metal2 s 27448 -400 27504 240 0 FreeSans 560 90 0 0 wbs_adr_i[12]
+port 578 nsew signal input
+flabel metal2 s 29221 -400 29277 240 0 FreeSans 560 90 0 0 wbs_adr_i[13]
+port 579 nsew signal input
+flabel metal2 s 30994 -400 31050 240 0 FreeSans 560 90 0 0 wbs_adr_i[14]
+port 580 nsew signal input
+flabel metal2 s 32767 -400 32823 240 0 FreeSans 560 90 0 0 wbs_adr_i[15]
+port 581 nsew signal input
+flabel metal2 s 34540 -400 34596 240 0 FreeSans 560 90 0 0 wbs_adr_i[16]
+port 582 nsew signal input
+flabel metal2 s 36313 -400 36369 240 0 FreeSans 560 90 0 0 wbs_adr_i[17]
+port 583 nsew signal input
+flabel metal2 s 38086 -400 38142 240 0 FreeSans 560 90 0 0 wbs_adr_i[18]
+port 584 nsew signal input
+flabel metal2 s 39859 -400 39915 240 0 FreeSans 560 90 0 0 wbs_adr_i[19]
+port 585 nsew signal input
+flabel metal2 s 6172 -400 6228 240 0 FreeSans 560 90 0 0 wbs_adr_i[1]
+port 586 nsew signal input
+flabel metal2 s 41632 -400 41688 240 0 FreeSans 560 90 0 0 wbs_adr_i[20]
+port 587 nsew signal input
+flabel metal2 s 43405 -400 43461 240 0 FreeSans 560 90 0 0 wbs_adr_i[21]
+port 588 nsew signal input
+flabel metal2 s 45178 -400 45234 240 0 FreeSans 560 90 0 0 wbs_adr_i[22]
+port 589 nsew signal input
+flabel metal2 s 46951 -400 47007 240 0 FreeSans 560 90 0 0 wbs_adr_i[23]
+port 590 nsew signal input
+flabel metal2 s 48724 -400 48780 240 0 FreeSans 560 90 0 0 wbs_adr_i[24]
+port 591 nsew signal input
+flabel metal2 s 50497 -400 50553 240 0 FreeSans 560 90 0 0 wbs_adr_i[25]
+port 592 nsew signal input
+flabel metal2 s 52270 -400 52326 240 0 FreeSans 560 90 0 0 wbs_adr_i[26]
+port 593 nsew signal input
+flabel metal2 s 54043 -400 54099 240 0 FreeSans 560 90 0 0 wbs_adr_i[27]
+port 594 nsew signal input
+flabel metal2 s 55816 -400 55872 240 0 FreeSans 560 90 0 0 wbs_adr_i[28]
+port 595 nsew signal input
+flabel metal2 s 57589 -400 57645 240 0 FreeSans 560 90 0 0 wbs_adr_i[29]
+port 596 nsew signal input
+flabel metal2 s 8536 -400 8592 240 0 FreeSans 560 90 0 0 wbs_adr_i[2]
+port 597 nsew signal input
+flabel metal2 s 59362 -400 59418 240 0 FreeSans 560 90 0 0 wbs_adr_i[30]
+port 598 nsew signal input
+flabel metal2 s 61135 -400 61191 240 0 FreeSans 560 90 0 0 wbs_adr_i[31]
+port 599 nsew signal input
+flabel metal2 s 10900 -400 10956 240 0 FreeSans 560 90 0 0 wbs_adr_i[3]
+port 600 nsew signal input
+flabel metal2 s 13264 -400 13320 240 0 FreeSans 560 90 0 0 wbs_adr_i[4]
+port 601 nsew signal input
+flabel metal2 s 15037 -400 15093 240 0 FreeSans 560 90 0 0 wbs_adr_i[5]
+port 602 nsew signal input
+flabel metal2 s 16810 -400 16866 240 0 FreeSans 560 90 0 0 wbs_adr_i[6]
+port 603 nsew signal input
+flabel metal2 s 18583 -400 18639 240 0 FreeSans 560 90 0 0 wbs_adr_i[7]
+port 604 nsew signal input
+flabel metal2 s 20356 -400 20412 240 0 FreeSans 560 90 0 0 wbs_adr_i[8]
+port 605 nsew signal input
+flabel metal2 s 22129 -400 22185 240 0 FreeSans 560 90 0 0 wbs_adr_i[9]
+port 606 nsew signal input
+flabel metal2 s 2035 -400 2091 240 0 FreeSans 560 90 0 0 wbs_cyc_i
+port 607 nsew signal input
+flabel metal2 s 4399 -400 4455 240 0 FreeSans 560 90 0 0 wbs_dat_i[0]
+port 608 nsew signal input
+flabel metal2 s 24493 -400 24549 240 0 FreeSans 560 90 0 0 wbs_dat_i[10]
+port 609 nsew signal input
+flabel metal2 s 26266 -400 26322 240 0 FreeSans 560 90 0 0 wbs_dat_i[11]
+port 610 nsew signal input
+flabel metal2 s 28039 -400 28095 240 0 FreeSans 560 90 0 0 wbs_dat_i[12]
+port 611 nsew signal input
+flabel metal2 s 29812 -400 29868 240 0 FreeSans 560 90 0 0 wbs_dat_i[13]
+port 612 nsew signal input
+flabel metal2 s 31585 -400 31641 240 0 FreeSans 560 90 0 0 wbs_dat_i[14]
+port 613 nsew signal input
+flabel metal2 s 33358 -400 33414 240 0 FreeSans 560 90 0 0 wbs_dat_i[15]
+port 614 nsew signal input
+flabel metal2 s 35131 -400 35187 240 0 FreeSans 560 90 0 0 wbs_dat_i[16]
+port 615 nsew signal input
+flabel metal2 s 36904 -400 36960 240 0 FreeSans 560 90 0 0 wbs_dat_i[17]
+port 616 nsew signal input
+flabel metal2 s 38677 -400 38733 240 0 FreeSans 560 90 0 0 wbs_dat_i[18]
+port 617 nsew signal input
+flabel metal2 s 40450 -400 40506 240 0 FreeSans 560 90 0 0 wbs_dat_i[19]
+port 618 nsew signal input
+flabel metal2 s 6763 -400 6819 240 0 FreeSans 560 90 0 0 wbs_dat_i[1]
+port 619 nsew signal input
+flabel metal2 s 42223 -400 42279 240 0 FreeSans 560 90 0 0 wbs_dat_i[20]
+port 620 nsew signal input
+flabel metal2 s 43996 -400 44052 240 0 FreeSans 560 90 0 0 wbs_dat_i[21]
+port 621 nsew signal input
+flabel metal2 s 45769 -400 45825 240 0 FreeSans 560 90 0 0 wbs_dat_i[22]
+port 622 nsew signal input
+flabel metal2 s 47542 -400 47598 240 0 FreeSans 560 90 0 0 wbs_dat_i[23]
+port 623 nsew signal input
+flabel metal2 s 49315 -400 49371 240 0 FreeSans 560 90 0 0 wbs_dat_i[24]
+port 624 nsew signal input
+flabel metal2 s 51088 -400 51144 240 0 FreeSans 560 90 0 0 wbs_dat_i[25]
+port 625 nsew signal input
+flabel metal2 s 52861 -400 52917 240 0 FreeSans 560 90 0 0 wbs_dat_i[26]
+port 626 nsew signal input
+flabel metal2 s 54634 -400 54690 240 0 FreeSans 560 90 0 0 wbs_dat_i[27]
+port 627 nsew signal input
+flabel metal2 s 56407 -400 56463 240 0 FreeSans 560 90 0 0 wbs_dat_i[28]
+port 628 nsew signal input
+flabel metal2 s 58180 -400 58236 240 0 FreeSans 560 90 0 0 wbs_dat_i[29]
+port 629 nsew signal input
+flabel metal2 s 9127 -400 9183 240 0 FreeSans 560 90 0 0 wbs_dat_i[2]
+port 630 nsew signal input
+flabel metal2 s 59953 -400 60009 240 0 FreeSans 560 90 0 0 wbs_dat_i[30]
+port 631 nsew signal input
+flabel metal2 s 61726 -400 61782 240 0 FreeSans 560 90 0 0 wbs_dat_i[31]
+port 632 nsew signal input
+flabel metal2 s 11491 -400 11547 240 0 FreeSans 560 90 0 0 wbs_dat_i[3]
+port 633 nsew signal input
+flabel metal2 s 13855 -400 13911 240 0 FreeSans 560 90 0 0 wbs_dat_i[4]
+port 634 nsew signal input
+flabel metal2 s 15628 -400 15684 240 0 FreeSans 560 90 0 0 wbs_dat_i[5]
+port 635 nsew signal input
+flabel metal2 s 17401 -400 17457 240 0 FreeSans 560 90 0 0 wbs_dat_i[6]
+port 636 nsew signal input
+flabel metal2 s 19174 -400 19230 240 0 FreeSans 560 90 0 0 wbs_dat_i[7]
+port 637 nsew signal input
+flabel metal2 s 20947 -400 21003 240 0 FreeSans 560 90 0 0 wbs_dat_i[8]
+port 638 nsew signal input
+flabel metal2 s 22720 -400 22776 240 0 FreeSans 560 90 0 0 wbs_dat_i[9]
+port 639 nsew signal input
+flabel metal2 s 4990 -400 5046 240 0 FreeSans 560 90 0 0 wbs_dat_o[0]
+port 640 nsew signal tristate
+flabel metal2 s 25084 -400 25140 240 0 FreeSans 560 90 0 0 wbs_dat_o[10]
+port 641 nsew signal tristate
+flabel metal2 s 26857 -400 26913 240 0 FreeSans 560 90 0 0 wbs_dat_o[11]
+port 642 nsew signal tristate
+flabel metal2 s 28630 -400 28686 240 0 FreeSans 560 90 0 0 wbs_dat_o[12]
+port 643 nsew signal tristate
+flabel metal2 s 30403 -400 30459 240 0 FreeSans 560 90 0 0 wbs_dat_o[13]
+port 644 nsew signal tristate
+flabel metal2 s 32176 -400 32232 240 0 FreeSans 560 90 0 0 wbs_dat_o[14]
+port 645 nsew signal tristate
+flabel metal2 s 33949 -400 34005 240 0 FreeSans 560 90 0 0 wbs_dat_o[15]
+port 646 nsew signal tristate
+flabel metal2 s 35722 -400 35778 240 0 FreeSans 560 90 0 0 wbs_dat_o[16]
+port 647 nsew signal tristate
+flabel metal2 s 37495 -400 37551 240 0 FreeSans 560 90 0 0 wbs_dat_o[17]
+port 648 nsew signal tristate
+flabel metal2 s 39268 -400 39324 240 0 FreeSans 560 90 0 0 wbs_dat_o[18]
+port 649 nsew signal tristate
+flabel metal2 s 41041 -400 41097 240 0 FreeSans 560 90 0 0 wbs_dat_o[19]
+port 650 nsew signal tristate
+flabel metal2 s 7354 -400 7410 240 0 FreeSans 560 90 0 0 wbs_dat_o[1]
+port 651 nsew signal tristate
+flabel metal2 s 42814 -400 42870 240 0 FreeSans 560 90 0 0 wbs_dat_o[20]
+port 652 nsew signal tristate
+flabel metal2 s 44587 -400 44643 240 0 FreeSans 560 90 0 0 wbs_dat_o[21]
+port 653 nsew signal tristate
+flabel metal2 s 46360 -400 46416 240 0 FreeSans 560 90 0 0 wbs_dat_o[22]
+port 654 nsew signal tristate
+flabel metal2 s 48133 -400 48189 240 0 FreeSans 560 90 0 0 wbs_dat_o[23]
+port 655 nsew signal tristate
+flabel metal2 s 49906 -400 49962 240 0 FreeSans 560 90 0 0 wbs_dat_o[24]
+port 656 nsew signal tristate
+flabel metal2 s 51679 -400 51735 240 0 FreeSans 560 90 0 0 wbs_dat_o[25]
+port 657 nsew signal tristate
+flabel metal2 s 53452 -400 53508 240 0 FreeSans 560 90 0 0 wbs_dat_o[26]
+port 658 nsew signal tristate
+flabel metal2 s 55225 -400 55281 240 0 FreeSans 560 90 0 0 wbs_dat_o[27]
+port 659 nsew signal tristate
+flabel metal2 s 56998 -400 57054 240 0 FreeSans 560 90 0 0 wbs_dat_o[28]
+port 660 nsew signal tristate
+flabel metal2 s 58771 -400 58827 240 0 FreeSans 560 90 0 0 wbs_dat_o[29]
+port 661 nsew signal tristate
+flabel metal2 s 9718 -400 9774 240 0 FreeSans 560 90 0 0 wbs_dat_o[2]
+port 662 nsew signal tristate
+flabel metal2 s 60544 -400 60600 240 0 FreeSans 560 90 0 0 wbs_dat_o[30]
+port 663 nsew signal tristate
+flabel metal2 s 62317 -400 62373 240 0 FreeSans 560 90 0 0 wbs_dat_o[31]
+port 664 nsew signal tristate
+flabel metal2 s 12082 -400 12138 240 0 FreeSans 560 90 0 0 wbs_dat_o[3]
+port 665 nsew signal tristate
+flabel metal2 s 14446 -400 14502 240 0 FreeSans 560 90 0 0 wbs_dat_o[4]
+port 666 nsew signal tristate
+flabel metal2 s 16219 -400 16275 240 0 FreeSans 560 90 0 0 wbs_dat_o[5]
+port 667 nsew signal tristate
+flabel metal2 s 17992 -400 18048 240 0 FreeSans 560 90 0 0 wbs_dat_o[6]
+port 668 nsew signal tristate
+flabel metal2 s 19765 -400 19821 240 0 FreeSans 560 90 0 0 wbs_dat_o[7]
+port 669 nsew signal tristate
+flabel metal2 s 21538 -400 21594 240 0 FreeSans 560 90 0 0 wbs_dat_o[8]
+port 670 nsew signal tristate
+flabel metal2 s 23311 -400 23367 240 0 FreeSans 560 90 0 0 wbs_dat_o[9]
+port 671 nsew signal tristate
+flabel metal2 s 5581 -400 5637 240 0 FreeSans 560 90 0 0 wbs_sel_i[0]
+port 672 nsew signal input
+flabel metal2 s 7945 -400 8001 240 0 FreeSans 560 90 0 0 wbs_sel_i[1]
+port 673 nsew signal input
+flabel metal2 s 10309 -400 10365 240 0 FreeSans 560 90 0 0 wbs_sel_i[2]
+port 674 nsew signal input
+flabel metal2 s 12673 -400 12729 240 0 FreeSans 560 90 0 0 wbs_sel_i[3]
+port 675 nsew signal input
+flabel metal2 s 2626 -400 2682 240 0 FreeSans 560 90 0 0 wbs_stb_i
+port 676 nsew signal input
+flabel metal2 s 3217 -400 3273 240 0 FreeSans 560 90 0 0 wbs_we_i
+port 677 nsew signal input
+<< properties >>
+string FIXED_BBOX 0 0 292000 352000
+<< end >>
diff --git a/netgen/comp.out b/netgen/comp.out
new file mode 100644
index 0000000..317638b
--- /dev/null
+++ b/netgen/comp.out
@@ -0,0 +1,2009 @@
+Flattening unmatched subcell sky130_fd_pr__res_xhigh_po_0p35_HDW2JU in circuit detV2 (0)(1 instance)
+Flattening unmatched subcell detV2 in circuit user_analog_project_wrapper (0)(1 instance)
+Flattening unmatched subcell detector in circuit user_analog_project_wrapper (1)(1 instance)
+Equate elements:  no current cell.
+Equate elements:  no current cell.
+Equate elements:  no current cell.
+
+Cell user_analog_project_wrapper disconnected node: gpio_analog[0]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[10]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[11]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[12]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[13]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[14]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[15]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[16]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[17]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[1]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[2]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[3]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[4]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[5]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[6]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[7]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[8]
+Cell user_analog_project_wrapper disconnected node: gpio_analog[9]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[0]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[10]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[11]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[12]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[13]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[14]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[15]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[16]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[17]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[1]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[2]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[3]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[4]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[5]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[6]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[7]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[8]
+Cell user_analog_project_wrapper disconnected node: gpio_noesd[9]
+Cell user_analog_project_wrapper disconnected node: io_analog[0]
+Cell user_analog_project_wrapper disconnected node: io_analog[10]
+Cell user_analog_project_wrapper disconnected node: io_analog[7]
+Cell user_analog_project_wrapper disconnected node: io_analog[8]
+Cell user_analog_project_wrapper disconnected node: io_analog[9]
+Cell user_analog_project_wrapper disconnected node: io_analog[4]
+Cell user_analog_project_wrapper disconnected node: io_analog[5]
+Cell user_analog_project_wrapper disconnected node: io_analog[6]
+Cell user_analog_project_wrapper disconnected node: io_clamp_high[0]
+Cell user_analog_project_wrapper disconnected node: io_clamp_high[1]
+Cell user_analog_project_wrapper disconnected node: io_clamp_high[2]
+Cell user_analog_project_wrapper disconnected node: io_clamp_low[0]
+Cell user_analog_project_wrapper disconnected node: io_clamp_low[1]
+Cell user_analog_project_wrapper disconnected node: io_clamp_low[2]
+Cell user_analog_project_wrapper disconnected node: io_in[0]
+Cell user_analog_project_wrapper disconnected node: io_in[10]
+Cell user_analog_project_wrapper disconnected node: io_in[11]
+Cell user_analog_project_wrapper disconnected node: io_in[12]
+Cell user_analog_project_wrapper disconnected node: io_in[13]
+Cell user_analog_project_wrapper disconnected node: io_in[14]
+Cell user_analog_project_wrapper disconnected node: io_in[15]
+Cell user_analog_project_wrapper disconnected node: io_in[16]
+Cell user_analog_project_wrapper disconnected node: io_in[17]
+Cell user_analog_project_wrapper disconnected node: io_in[18]
+Cell user_analog_project_wrapper disconnected node: io_in[19]
+Cell user_analog_project_wrapper disconnected node: io_in[1]
+Cell user_analog_project_wrapper disconnected node: io_in[20]
+Cell user_analog_project_wrapper disconnected node: io_in[21]
+Cell user_analog_project_wrapper disconnected node: io_in[22]
+Cell user_analog_project_wrapper disconnected node: io_in[23]
+Cell user_analog_project_wrapper disconnected node: io_in[24]
+Cell user_analog_project_wrapper disconnected node: io_in[25]
+Cell user_analog_project_wrapper disconnected node: io_in[26]
+Cell user_analog_project_wrapper disconnected node: io_in[2]
+Cell user_analog_project_wrapper disconnected node: io_in[3]
+Cell user_analog_project_wrapper disconnected node: io_in[4]
+Cell user_analog_project_wrapper disconnected node: io_in[5]
+Cell user_analog_project_wrapper disconnected node: io_in[6]
+Cell user_analog_project_wrapper disconnected node: io_in[7]
+Cell user_analog_project_wrapper disconnected node: io_in[8]
+Cell user_analog_project_wrapper disconnected node: io_in[9]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[0]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[10]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[11]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[12]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[13]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[14]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[15]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[16]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[17]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[18]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[19]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[1]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[20]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[21]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[22]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[23]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[24]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[25]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[26]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[2]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[3]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[4]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[5]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[6]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[7]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[8]
+Cell user_analog_project_wrapper disconnected node: io_in_3v3[9]
+Cell user_analog_project_wrapper disconnected node: io_oeb[0]
+Cell user_analog_project_wrapper disconnected node: io_oeb[10]
+Cell user_analog_project_wrapper disconnected node: io_oeb[11]
+Cell user_analog_project_wrapper disconnected node: io_oeb[12]
+Cell user_analog_project_wrapper disconnected node: io_oeb[13]
+Cell user_analog_project_wrapper disconnected node: io_oeb[14]
+Cell user_analog_project_wrapper disconnected node: io_oeb[15]
+Cell user_analog_project_wrapper disconnected node: io_oeb[16]
+Cell user_analog_project_wrapper disconnected node: io_oeb[17]
+Cell user_analog_project_wrapper disconnected node: io_oeb[18]
+Cell user_analog_project_wrapper disconnected node: io_oeb[19]
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+
+Cell user_analog_project_wrapper disconnected node: vdda1
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+Cell user_analog_project_wrapper disconnected node: io_analog[7]
+Cell user_analog_project_wrapper disconnected node: io_analog[6]
+Cell user_analog_project_wrapper disconnected node: io_analog[5]
+Cell user_analog_project_wrapper disconnected node: io_analog[4]
+Cell user_analog_project_wrapper disconnected node: io_analog[0]
+Cell user_analog_project_wrapper disconnected node: io_clamp_high[2]
+Cell user_analog_project_wrapper disconnected node: io_clamp_high[1]
+Cell user_analog_project_wrapper disconnected node: io_clamp_high[0]
+Cell user_analog_project_wrapper disconnected node: io_clamp_low[2]
+Cell user_analog_project_wrapper disconnected node: io_clamp_low[1]
+Cell user_analog_project_wrapper disconnected node: io_clamp_low[0]
+Cell user_analog_project_wrapper disconnected node: user_irq[2]
+Cell user_analog_project_wrapper disconnected node: user_irq[1]
+Cell user_analog_project_wrapper disconnected node: user_irq[0]
+Cell user_analog_project_wrapper disconnected node: la_oenb[127]
+Cell user_analog_project_wrapper disconnected node: la_oenb[126]
+Cell user_analog_project_wrapper disconnected node: la_oenb[125]
+Cell user_analog_project_wrapper disconnected node: la_oenb[124]
+Cell user_analog_project_wrapper disconnected node: la_oenb[123]
+Cell user_analog_project_wrapper disconnected node: la_oenb[122]
+Cell user_analog_project_wrapper disconnected node: la_oenb[121]
+Cell user_analog_project_wrapper disconnected node: la_oenb[120]
+Cell user_analog_project_wrapper disconnected node: la_oenb[119]
+Cell user_analog_project_wrapper disconnected node: la_oenb[118]
+Cell user_analog_project_wrapper disconnected node: la_oenb[117]
+Cell user_analog_project_wrapper disconnected node: la_oenb[116]
+Cell user_analog_project_wrapper disconnected node: la_oenb[115]
+Cell user_analog_project_wrapper disconnected node: la_oenb[114]
+Cell user_analog_project_wrapper disconnected node: la_oenb[113]
+Cell user_analog_project_wrapper disconnected node: la_oenb[112]
+Cell user_analog_project_wrapper disconnected node: la_oenb[111]
+Cell user_analog_project_wrapper disconnected node: la_oenb[110]
+Cell user_analog_project_wrapper disconnected node: la_oenb[109]
+Cell user_analog_project_wrapper disconnected node: la_oenb[108]
+Cell user_analog_project_wrapper disconnected node: la_oenb[107]
+Cell user_analog_project_wrapper disconnected node: la_oenb[106]
+Cell user_analog_project_wrapper disconnected node: la_oenb[105]
+Cell user_analog_project_wrapper disconnected node: la_oenb[104]
+Cell user_analog_project_wrapper disconnected node: la_oenb[103]
+Cell user_analog_project_wrapper disconnected node: la_oenb[102]
+Cell user_analog_project_wrapper disconnected node: la_oenb[101]
+Cell user_analog_project_wrapper disconnected node: la_oenb[100]
+Cell user_analog_project_wrapper disconnected node: la_oenb[99]
+Cell user_analog_project_wrapper disconnected node: la_oenb[98]
+Cell user_analog_project_wrapper disconnected node: la_oenb[97]
+Cell user_analog_project_wrapper disconnected node: la_oenb[96]
+Cell user_analog_project_wrapper disconnected node: la_oenb[95]
+Cell user_analog_project_wrapper disconnected node: la_oenb[94]
+Cell user_analog_project_wrapper disconnected node: la_oenb[93]
+Cell user_analog_project_wrapper disconnected node: la_oenb[92]
+Cell user_analog_project_wrapper disconnected node: la_oenb[91]
+Cell user_analog_project_wrapper disconnected node: la_oenb[90]
+Cell user_analog_project_wrapper disconnected node: la_oenb[89]
+Cell user_analog_project_wrapper disconnected node: la_oenb[88]
+Cell user_analog_project_wrapper disconnected node: la_oenb[87]
+Cell user_analog_project_wrapper disconnected node: la_oenb[86]
+Cell user_analog_project_wrapper disconnected node: la_oenb[85]
+Cell user_analog_project_wrapper disconnected node: la_oenb[84]
+Cell user_analog_project_wrapper disconnected node: la_oenb[83]
+Cell user_analog_project_wrapper disconnected node: la_oenb[82]
+Cell user_analog_project_wrapper disconnected node: la_oenb[81]
+Cell user_analog_project_wrapper disconnected node: la_oenb[80]
+Cell user_analog_project_wrapper disconnected node: la_oenb[79]
+Cell user_analog_project_wrapper disconnected node: la_oenb[78]
+Cell user_analog_project_wrapper disconnected node: la_oenb[77]
+Cell user_analog_project_wrapper disconnected node: la_oenb[76]
+Cell user_analog_project_wrapper disconnected node: la_oenb[75]
+Cell user_analog_project_wrapper disconnected node: la_oenb[74]
+Cell user_analog_project_wrapper disconnected node: la_oenb[73]
+Cell user_analog_project_wrapper disconnected node: la_oenb[72]
+Cell user_analog_project_wrapper disconnected node: la_oenb[71]
+Cell user_analog_project_wrapper disconnected node: la_oenb[70]
+Cell user_analog_project_wrapper disconnected node: la_oenb[69]
+Cell user_analog_project_wrapper disconnected node: la_oenb[68]
+Cell user_analog_project_wrapper disconnected node: la_oenb[67]
+Cell user_analog_project_wrapper disconnected node: la_oenb[66]
+Cell user_analog_project_wrapper disconnected node: la_oenb[65]
+Cell user_analog_project_wrapper disconnected node: la_oenb[64]
+Cell user_analog_project_wrapper disconnected node: la_oenb[63]
+Cell user_analog_project_wrapper disconnected node: la_oenb[62]
+Cell user_analog_project_wrapper disconnected node: la_oenb[61]
+Cell user_analog_project_wrapper disconnected node: la_oenb[60]
+Cell user_analog_project_wrapper disconnected node: la_oenb[59]
+Cell user_analog_project_wrapper disconnected node: la_oenb[58]
+Cell user_analog_project_wrapper disconnected node: la_oenb[57]
+Cell user_analog_project_wrapper disconnected node: la_oenb[56]
+Cell user_analog_project_wrapper disconnected node: la_oenb[55]
+Cell user_analog_project_wrapper disconnected node: la_oenb[54]
+Cell user_analog_project_wrapper disconnected node: la_oenb[53]
+Cell user_analog_project_wrapper disconnected node: la_oenb[52]
+Cell user_analog_project_wrapper disconnected node: la_oenb[51]
+Cell user_analog_project_wrapper disconnected node: la_oenb[50]
+Cell user_analog_project_wrapper disconnected node: la_oenb[49]
+Cell user_analog_project_wrapper disconnected node: la_oenb[48]
+Cell user_analog_project_wrapper disconnected node: la_oenb[47]
+Cell user_analog_project_wrapper disconnected node: la_oenb[46]
+Cell user_analog_project_wrapper disconnected node: la_oenb[45]
+Cell user_analog_project_wrapper disconnected node: la_oenb[44]
+Cell user_analog_project_wrapper disconnected node: la_oenb[43]
+Cell user_analog_project_wrapper disconnected node: la_oenb[42]
+Cell user_analog_project_wrapper disconnected node: la_oenb[41]
+Cell user_analog_project_wrapper disconnected node: la_oenb[40]
+Cell user_analog_project_wrapper disconnected node: la_oenb[39]
+Cell user_analog_project_wrapper disconnected node: la_oenb[38]
+Cell user_analog_project_wrapper disconnected node: la_oenb[37]
+Cell user_analog_project_wrapper disconnected node: la_oenb[36]
+Cell user_analog_project_wrapper disconnected node: la_oenb[35]
+Cell user_analog_project_wrapper disconnected node: la_oenb[34]
+Cell user_analog_project_wrapper disconnected node: la_oenb[33]
+Cell user_analog_project_wrapper disconnected node: la_oenb[32]
+Cell user_analog_project_wrapper disconnected node: la_oenb[31]
+Cell user_analog_project_wrapper disconnected node: la_oenb[30]
+Cell user_analog_project_wrapper disconnected node: la_oenb[29]
+Cell user_analog_project_wrapper disconnected node: la_oenb[28]
+Cell user_analog_project_wrapper disconnected node: la_oenb[27]
+Cell user_analog_project_wrapper disconnected node: la_oenb[26]
+Cell user_analog_project_wrapper disconnected node: la_oenb[25]
+Cell user_analog_project_wrapper disconnected node: la_oenb[24]
+Cell user_analog_project_wrapper disconnected node: la_oenb[23]
+Cell user_analog_project_wrapper disconnected node: la_oenb[22]
+Cell user_analog_project_wrapper disconnected node: la_oenb[21]
+Cell user_analog_project_wrapper disconnected node: la_oenb[20]
+Cell user_analog_project_wrapper disconnected node: la_oenb[19]
+Cell user_analog_project_wrapper disconnected node: la_oenb[18]
+Cell user_analog_project_wrapper disconnected node: la_oenb[17]
+Cell user_analog_project_wrapper disconnected node: la_oenb[16]
+Cell user_analog_project_wrapper disconnected node: la_oenb[15]
+Cell user_analog_project_wrapper disconnected node: la_oenb[14]
+Cell user_analog_project_wrapper disconnected node: la_oenb[13]
+Cell user_analog_project_wrapper disconnected node: la_oenb[12]
+Cell user_analog_project_wrapper disconnected node: la_oenb[11]
+Cell user_analog_project_wrapper disconnected node: la_oenb[10]
+Cell user_analog_project_wrapper disconnected node: la_oenb[9]
+Cell user_analog_project_wrapper disconnected node: la_oenb[8]
+Cell user_analog_project_wrapper disconnected node: la_oenb[7]
+Cell user_analog_project_wrapper disconnected node: la_oenb[6]
+Cell user_analog_project_wrapper disconnected node: la_oenb[5]
+Cell user_analog_project_wrapper disconnected node: la_oenb[4]
+Cell user_analog_project_wrapper disconnected node: la_oenb[3]
+Cell user_analog_project_wrapper disconnected node: la_oenb[2]
+Cell user_analog_project_wrapper disconnected node: la_oenb[1]
+Cell user_analog_project_wrapper disconnected node: la_oenb[0]
+
+Subcircuit summary:
+Circuit 1: user_analog_project_wrapper     |Circuit 2: user_analog_project_wrapper     
+-------------------------------------------|-------------------------------------------
+sky130_fd_pr__res_xhigh_po (1)             |sky130_fd_pr__res_xhigh_po (1)             
+sky130_fd_pr__cap_mim_m3_1 (2)             |sky130_fd_pr__cap_mim_m3_1 (2)             
+sky130_fd_pr__nfet_01v8 (1)                |sky130_fd_pr__nfet_01v8 (1)                
+Number of devices: 4                       |Number of devices: 4                       
+Number of nets: 5                          |Number of nets: 5                          
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: user_analog_project_wrapper     |Circuit 2: user_analog_project_wrapper     
+-------------------------------------------|-------------------------------------------
+vssa1                                      |vssa1                                      
+io_analog[2]                               |io_analog[2]                               
+io_analog[3]                               |io_analog[3]                               
+io_analog[1]                               |io_analog[1]                               
+gpio_analog[0]                             |gpio_analog[0]                             
+gpio_analog[10]                            |gpio_analog[10]                            
+gpio_analog[11]                            |gpio_analog[11]                            
+gpio_analog[12]                            |gpio_analog[12]                            
+gpio_analog[13]                            |gpio_analog[13]                            
+gpio_analog[14]                            |gpio_analog[14]                            
+gpio_analog[15]                            |gpio_analog[15]                            
+gpio_analog[16]                            |gpio_analog[16]                            
+gpio_analog[17]                            |gpio_analog[17]                            
+gpio_analog[1]                             |gpio_analog[1]                             
+gpio_analog[2]                             |gpio_analog[2]                             
+gpio_analog[3]                             |gpio_analog[3]                             
+gpio_analog[4]                             |gpio_analog[4]                             
+gpio_analog[5]                             |gpio_analog[5]                             
+gpio_analog[6]                             |gpio_analog[6]                             
+gpio_analog[7]                             |gpio_analog[7]                             
+gpio_analog[8]                             |gpio_analog[8]                             
+gpio_analog[9]                             |gpio_analog[9]                             
+gpio_noesd[0]                              |gpio_noesd[0]                              
+gpio_noesd[10]                             |gpio_noesd[10]                             
+gpio_noesd[11]                             |gpio_noesd[11]                             
+gpio_noesd[12]                             |gpio_noesd[12]                             
+gpio_noesd[13]                             |gpio_noesd[13]                             
+gpio_noesd[14]                             |gpio_noesd[14]                             
+gpio_noesd[15]                             |gpio_noesd[15]                             
+gpio_noesd[16]                             |gpio_noesd[16]                             
+gpio_noesd[17]                             |gpio_noesd[17]                             
+gpio_noesd[1]                              |gpio_noesd[1]                              
+gpio_noesd[2]                              |gpio_noesd[2]                              
+gpio_noesd[3]                              |gpio_noesd[3]                              
+gpio_noesd[4]                              |gpio_noesd[4]                              
+gpio_noesd[5]                              |gpio_noesd[5]                              
+gpio_noesd[6]                              |gpio_noesd[6]                              
+gpio_noesd[7]                              |gpio_noesd[7]                              
+gpio_noesd[8]                              |gpio_noesd[8]                              
+gpio_noesd[9]                              |gpio_noesd[9]                              
+io_analog[0]                               |io_analog[0]                               
+io_analog[10]                              |io_analog[10]                              
+io_analog[7]                               |io_analog[7]                               
+io_analog[8]                               |io_analog[8]                               
+io_analog[9]                               |io_analog[9]                               
+io_analog[4]                               |io_analog[4]                               
+io_analog[5]                               |io_analog[5]                               
+io_analog[6]                               |io_analog[6]                               
+io_clamp_high[0]                           |io_clamp_high[0]                           
+io_clamp_high[1]                           |io_clamp_high[1]                           
+io_clamp_high[2]                           |io_clamp_high[2]                           
+io_clamp_low[0]                            |io_clamp_low[0]                            
+io_clamp_low[1]                            |io_clamp_low[1]                            
+io_clamp_low[2]                            |io_clamp_low[2]                            
+io_in[0]                                   |io_in[0]                                   
+io_in[10]                                  |io_in[10]                                  
+io_in[11]                                  |io_in[11]                                  
+io_in[12]                                  |io_in[12]                                  
+io_in[13]                                  |io_in[13]                                  
+io_in[14]                                  |io_in[14]                                  
+io_in[15]                                  |io_in[15]                                  
+io_in[16]                                  |io_in[16]                                  
+io_in[17]                                  |io_in[17]                                  
+io_in[18]                                  |io_in[18]                                  
+io_in[19]                                  |io_in[19]                                  
+io_in[1]                                   |io_in[1]                                   
+io_in[20]                                  |io_in[20]                                  
+io_in[21]                                  |io_in[21]                                  
+io_in[22]                                  |io_in[22]                                  
+io_in[23]                                  |io_in[23]                                  
+io_in[24]                                  |io_in[24]                                  
+io_in[25]                                  |io_in[25]                                  
+io_in[26]                                  |io_in[26]                                  
+io_in[2]                                   |io_in[2]                                   
+io_in[3]                                   |io_in[3]                                   
+io_in[4]                                   |io_in[4]                                   
+io_in[5]                                   |io_in[5]                                   
+io_in[6]                                   |io_in[6]                                   
+io_in[7]                                   |io_in[7]                                   
+io_in[8]                                   |io_in[8]                                   
+io_in[9]                                   |io_in[9]                                   
+io_in_3v3[0]                               |io_in_3v3[0]                               
+io_in_3v3[10]                              |io_in_3v3[10]                              
+io_in_3v3[11]                              |io_in_3v3[11]                              
+io_in_3v3[12]                              |io_in_3v3[12]                              
+io_in_3v3[13]                              |io_in_3v3[13]                              
+io_in_3v3[14]                              |io_in_3v3[14]                              
+io_in_3v3[15]                              |io_in_3v3[15]                              
+io_in_3v3[16]                              |io_in_3v3[16]                              
+io_in_3v3[17]                              |io_in_3v3[17]                              
+io_in_3v3[18]                              |io_in_3v3[18]                              
+io_in_3v3[19]                              |io_in_3v3[19]                              
+io_in_3v3[1]                               |io_in_3v3[1]                               
+io_in_3v3[20]                              |io_in_3v3[20]                              
+io_in_3v3[21]                              |io_in_3v3[21]                              
+io_in_3v3[22]                              |io_in_3v3[22]                              
+io_in_3v3[23]                              |io_in_3v3[23]                              
+io_in_3v3[24]                              |io_in_3v3[24]                              
+io_in_3v3[25]                              |io_in_3v3[25]                              
+io_in_3v3[26]                              |io_in_3v3[26]                              
+io_in_3v3[2]                               |io_in_3v3[2]                               
+io_in_3v3[3]                               |io_in_3v3[3]                               
+io_in_3v3[4]                               |io_in_3v3[4]                               
+io_in_3v3[5]                               |io_in_3v3[5]                               
+io_in_3v3[6]                               |io_in_3v3[6]                               
+io_in_3v3[7]                               |io_in_3v3[7]                               
+io_in_3v3[8]                               |io_in_3v3[8]                               
+io_in_3v3[9]                               |io_in_3v3[9]                               
+io_oeb[0]                                  |io_oeb[0]                                  
+io_oeb[10]                                 |io_oeb[10]                                 
+io_oeb[11]                                 |io_oeb[11]                                 
+io_oeb[12]                                 |io_oeb[12]                                 
+io_oeb[13]                                 |io_oeb[13]                                 
+io_oeb[14]                                 |io_oeb[14]                                 
+io_oeb[15]                                 |io_oeb[15]                                 
+io_oeb[16]                                 |io_oeb[16]                                 
+io_oeb[17]                                 |io_oeb[17]                                 
+io_oeb[18]                                 |io_oeb[18]                                 
+io_oeb[19]                                 |io_oeb[19]                                 
+io_oeb[1]                                  |io_oeb[1]                                  
+io_oeb[20]                                 |io_oeb[20]                                 
+io_oeb[21]                                 |io_oeb[21]                                 
+io_oeb[22]                                 |io_oeb[22]                                 
+io_oeb[23]                                 |io_oeb[23]                                 
+io_oeb[24]                                 |io_oeb[24]                                 
+io_oeb[25]                                 |io_oeb[25]                                 
+io_oeb[26]                                 |io_oeb[26]                                 
+io_oeb[2]                                  |io_oeb[2]                                  
+io_oeb[3]                                  |io_oeb[3]                                  
+io_oeb[4]                                  |io_oeb[4]                                  
+io_oeb[5]                                  |io_oeb[5]                                  
+io_oeb[6]                                  |io_oeb[6]                                  
+io_oeb[7]                                  |io_oeb[7]                                  
+io_oeb[8]                                  |io_oeb[8]                                  
+io_oeb[9]                                  |io_oeb[9]                                  
+io_out[0]                                  |io_out[0]                                  
+io_out[10]                                 |io_out[10]                                 
+io_out[11]                                 |io_out[11]                                 
+io_out[12]                                 |io_out[12]                                 
+io_out[13]                                 |io_out[13]                                 
+io_out[14]                                 |io_out[14]                                 
+io_out[15]                                 |io_out[15]                                 
+io_out[16]                                 |io_out[16]                                 
+io_out[17]                                 |io_out[17]                                 
+io_out[18]                                 |io_out[18]                                 
+io_out[19]                                 |io_out[19]                                 
+io_out[1]                                  |io_out[1]                                  
+io_out[20]                                 |io_out[20]                                 
+io_out[21]                                 |io_out[21]                                 
+io_out[22]                                 |io_out[22]                                 
+io_out[23]                                 |io_out[23]                                 
+io_out[24]                                 |io_out[24]                                 
+io_out[25]                                 |io_out[25]                                 
+io_out[26]                                 |io_out[26]                                 
+io_out[2]                                  |io_out[2]                                  
+io_out[3]                                  |io_out[3]                                  
+io_out[4]                                  |io_out[4]                                  
+io_out[5]                                  |io_out[5]                                  
+io_out[6]                                  |io_out[6]                                  
+io_out[7]                                  |io_out[7]                                  
+io_out[8]                                  |io_out[8]                                  
+io_out[9]                                  |io_out[9]                                  
+la_data_in[0]                              |la_data_in[0]                              
+la_data_in[100]                            |la_data_in[100]                            
+la_data_in[101]                            |la_data_in[101]                            
+la_data_in[102]                            |la_data_in[102]                            
+la_data_in[103]                            |la_data_in[103]                            
+la_data_in[104]                            |la_data_in[104]                            
+la_data_in[105]                            |la_data_in[105]                            
+la_data_in[106]                            |la_data_in[106]                            
+la_data_in[107]                            |la_data_in[107]                            
+la_data_in[108]                            |la_data_in[108]                            
+la_data_in[109]                            |la_data_in[109]                            
+la_data_in[10]                             |la_data_in[10]                             
+la_data_in[110]                            |la_data_in[110]                            
+la_data_in[111]                            |la_data_in[111]                            
+la_data_in[112]                            |la_data_in[112]                            
+la_data_in[113]                            |la_data_in[113]                            
+la_data_in[114]                            |la_data_in[114]                            
+la_data_in[115]                            |la_data_in[115]                            
+la_data_in[116]                            |la_data_in[116]                            
+la_data_in[117]                            |la_data_in[117]                            
+la_data_in[118]                            |la_data_in[118]                            
+la_data_in[119]                            |la_data_in[119]                            
+la_data_in[11]                             |la_data_in[11]                             
+la_data_in[120]                            |la_data_in[120]                            
+la_data_in[121]                            |la_data_in[121]                            
+la_data_in[122]                            |la_data_in[122]                            
+la_data_in[123]                            |la_data_in[123]                            
+la_data_in[124]                            |la_data_in[124]                            
+la_data_in[125]                            |la_data_in[125]                            
+la_data_in[126]                            |la_data_in[126]                            
+la_data_in[127]                            |la_data_in[127]                            
+la_data_in[12]                             |la_data_in[12]                             
+la_data_in[13]                             |la_data_in[13]                             
+la_data_in[14]                             |la_data_in[14]                             
+la_data_in[15]                             |la_data_in[15]                             
+la_data_in[16]                             |la_data_in[16]                             
+la_data_in[17]                             |la_data_in[17]                             
+la_data_in[18]                             |la_data_in[18]                             
+la_data_in[19]                             |la_data_in[19]                             
+la_data_in[1]                              |la_data_in[1]                              
+la_data_in[20]                             |la_data_in[20]                             
+la_data_in[21]                             |la_data_in[21]                             
+la_data_in[22]                             |la_data_in[22]                             
+la_data_in[23]                             |la_data_in[23]                             
+la_data_in[24]                             |la_data_in[24]                             
+la_data_in[25]                             |la_data_in[25]                             
+la_data_in[26]                             |la_data_in[26]                             
+la_data_in[27]                             |la_data_in[27]                             
+la_data_in[28]                             |la_data_in[28]                             
+la_data_in[29]                             |la_data_in[29]                             
+la_data_in[2]                              |la_data_in[2]                              
+la_data_in[30]                             |la_data_in[30]                             
+la_data_in[31]                             |la_data_in[31]                             
+la_data_in[32]                             |la_data_in[32]                             
+la_data_in[33]                             |la_data_in[33]                             
+la_data_in[34]                             |la_data_in[34]                             
+la_data_in[35]                             |la_data_in[35]                             
+la_data_in[36]                             |la_data_in[36]                             
+la_data_in[37]                             |la_data_in[37]                             
+la_data_in[38]                             |la_data_in[38]                             
+la_data_in[39]                             |la_data_in[39]                             
+la_data_in[3]                              |la_data_in[3]                              
+la_data_in[40]                             |la_data_in[40]                             
+la_data_in[41]                             |la_data_in[41]                             
+la_data_in[42]                             |la_data_in[42]                             
+la_data_in[43]                             |la_data_in[43]                             
+la_data_in[44]                             |la_data_in[44]                             
+la_data_in[45]                             |la_data_in[45]                             
+la_data_in[46]                             |la_data_in[46]                             
+la_data_in[47]                             |la_data_in[47]                             
+la_data_in[48]                             |la_data_in[48]                             
+la_data_in[49]                             |la_data_in[49]                             
+la_data_in[4]                              |la_data_in[4]                              
+la_data_in[50]                             |la_data_in[50]                             
+la_data_in[51]                             |la_data_in[51]                             
+la_data_in[52]                             |la_data_in[52]                             
+la_data_in[53]                             |la_data_in[53]                             
+la_data_in[54]                             |la_data_in[54]                             
+la_data_in[55]                             |la_data_in[55]                             
+la_data_in[56]                             |la_data_in[56]                             
+la_data_in[57]                             |la_data_in[57]                             
+la_data_in[58]                             |la_data_in[58]                             
+la_data_in[59]                             |la_data_in[59]                             
+la_data_in[5]                              |la_data_in[5]                              
+la_data_in[60]                             |la_data_in[60]                             
+la_data_in[61]                             |la_data_in[61]                             
+la_data_in[62]                             |la_data_in[62]                             
+la_data_in[63]                             |la_data_in[63]                             
+la_data_in[64]                             |la_data_in[64]                             
+la_data_in[65]                             |la_data_in[65]                             
+la_data_in[66]                             |la_data_in[66]                             
+la_data_in[67]                             |la_data_in[67]                             
+la_data_in[68]                             |la_data_in[68]                             
+la_data_in[69]                             |la_data_in[69]                             
+la_data_in[6]                              |la_data_in[6]                              
+la_data_in[70]                             |la_data_in[70]                             
+la_data_in[71]                             |la_data_in[71]                             
+la_data_in[72]                             |la_data_in[72]                             
+la_data_in[73]                             |la_data_in[73]                             
+la_data_in[74]                             |la_data_in[74]                             
+la_data_in[75]                             |la_data_in[75]                             
+la_data_in[76]                             |la_data_in[76]                             
+la_data_in[77]                             |la_data_in[77]                             
+la_data_in[78]                             |la_data_in[78]                             
+la_data_in[79]                             |la_data_in[79]                             
+la_data_in[7]                              |la_data_in[7]                              
+la_data_in[80]                             |la_data_in[80]                             
+la_data_in[81]                             |la_data_in[81]                             
+la_data_in[82]                             |la_data_in[82]                             
+la_data_in[83]                             |la_data_in[83]                             
+la_data_in[84]                             |la_data_in[84]                             
+la_data_in[85]                             |la_data_in[85]                             
+la_data_in[86]                             |la_data_in[86]                             
+la_data_in[87]                             |la_data_in[87]                             
+la_data_in[88]                             |la_data_in[88]                             
+la_data_in[89]                             |la_data_in[89]                             
+la_data_in[8]                              |la_data_in[8]                              
+la_data_in[90]                             |la_data_in[90]                             
+la_data_in[91]                             |la_data_in[91]                             
+la_data_in[92]                             |la_data_in[92]                             
+la_data_in[93]                             |la_data_in[93]                             
+la_data_in[94]                             |la_data_in[94]                             
+la_data_in[95]                             |la_data_in[95]                             
+la_data_in[96]                             |la_data_in[96]                             
+la_data_in[97]                             |la_data_in[97]                             
+la_data_in[98]                             |la_data_in[98]                             
+la_data_in[99]                             |la_data_in[99]                             
+la_data_in[9]                              |la_data_in[9]                              
+la_data_out[0]                             |la_data_out[0]                             
+la_data_out[100]                           |la_data_out[100]                           
+la_data_out[101]                           |la_data_out[101]                           
+la_data_out[102]                           |la_data_out[102]                           
+la_data_out[103]                           |la_data_out[103]                           
+la_data_out[104]                           |la_data_out[104]                           
+la_data_out[105]                           |la_data_out[105]                           
+la_data_out[106]                           |la_data_out[106]                           
+la_data_out[107]                           |la_data_out[107]                           
+la_data_out[108]                           |la_data_out[108]                           
+la_data_out[109]                           |la_data_out[109]                           
+la_data_out[10]                            |la_data_out[10]                            
+la_data_out[110]                           |la_data_out[110]                           
+la_data_out[111]                           |la_data_out[111]                           
+la_data_out[112]                           |la_data_out[112]                           
+la_data_out[113]                           |la_data_out[113]                           
+la_data_out[114]                           |la_data_out[114]                           
+la_data_out[115]                           |la_data_out[115]                           
+la_data_out[116]                           |la_data_out[116]                           
+la_data_out[117]                           |la_data_out[117]                           
+la_data_out[118]                           |la_data_out[118]                           
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+la_data_out[120]                           |la_data_out[120]                           
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+la_data_out[122]                           |la_data_out[122]                           
+la_data_out[123]                           |la_data_out[123]                           
+la_data_out[124]                           |la_data_out[124]                           
+la_data_out[125]                           |la_data_out[125]                           
+la_data_out[126]                           |la_data_out[126]                           
+la_data_out[127]                           |la_data_out[127]                           
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+la_data_out[13]                            |la_data_out[13]                            
+la_data_out[14]                            |la_data_out[14]                            
+la_data_out[15]                            |la_data_out[15]                            
+la_data_out[16]                            |la_data_out[16]                            
+la_data_out[17]                            |la_data_out[17]                            
+la_data_out[18]                            |la_data_out[18]                            
+la_data_out[19]                            |la_data_out[19]                            
+la_data_out[1]                             |la_data_out[1]                             
+la_data_out[20]                            |la_data_out[20]                            
+la_data_out[21]                            |la_data_out[21]                            
+la_data_out[22]                            |la_data_out[22]                            
+la_data_out[23]                            |la_data_out[23]                            
+la_data_out[24]                            |la_data_out[24]                            
+la_data_out[25]                            |la_data_out[25]                            
+la_data_out[26]                            |la_data_out[26]                            
+la_data_out[27]                            |la_data_out[27]                            
+la_data_out[28]                            |la_data_out[28]                            
+la_data_out[29]                            |la_data_out[29]                            
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+la_data_out[30]                            |la_data_out[30]                            
+la_data_out[31]                            |la_data_out[31]                            
+la_data_out[32]                            |la_data_out[32]                            
+la_data_out[33]                            |la_data_out[33]                            
+la_data_out[34]                            |la_data_out[34]                            
+la_data_out[35]                            |la_data_out[35]                            
+la_data_out[36]                            |la_data_out[36]                            
+la_data_out[37]                            |la_data_out[37]                            
+la_data_out[38]                            |la_data_out[38]                            
+la_data_out[39]                            |la_data_out[39]                            
+la_data_out[3]                             |la_data_out[3]                             
+la_data_out[40]                            |la_data_out[40]                            
+la_data_out[41]                            |la_data_out[41]                            
+la_data_out[42]                            |la_data_out[42]                            
+la_data_out[43]                            |la_data_out[43]                            
+la_data_out[44]                            |la_data_out[44]                            
+la_data_out[45]                            |la_data_out[45]                            
+la_data_out[46]                            |la_data_out[46]                            
+la_data_out[47]                            |la_data_out[47]                            
+la_data_out[48]                            |la_data_out[48]                            
+la_data_out[49]                            |la_data_out[49]                            
+la_data_out[4]                             |la_data_out[4]                             
+la_data_out[50]                            |la_data_out[50]                            
+la_data_out[51]                            |la_data_out[51]                            
+la_data_out[52]                            |la_data_out[52]                            
+la_data_out[53]                            |la_data_out[53]                            
+la_data_out[54]                            |la_data_out[54]                            
+la_data_out[55]                            |la_data_out[55]                            
+la_data_out[56]                            |la_data_out[56]                            
+la_data_out[57]                            |la_data_out[57]                            
+la_data_out[58]                            |la_data_out[58]                            
+la_data_out[59]                            |la_data_out[59]                            
+la_data_out[5]                             |la_data_out[5]                             
+la_data_out[60]                            |la_data_out[60]                            
+la_data_out[61]                            |la_data_out[61]                            
+la_data_out[62]                            |la_data_out[62]                            
+la_data_out[63]                            |la_data_out[63]                            
+la_data_out[64]                            |la_data_out[64]                            
+la_data_out[65]                            |la_data_out[65]                            
+la_data_out[66]                            |la_data_out[66]                            
+la_data_out[67]                            |la_data_out[67]                            
+la_data_out[68]                            |la_data_out[68]                            
+la_data_out[69]                            |la_data_out[69]                            
+la_data_out[6]                             |la_data_out[6]                             
+la_data_out[70]                            |la_data_out[70]                            
+la_data_out[71]                            |la_data_out[71]                            
+la_data_out[72]                            |la_data_out[72]                            
+la_data_out[73]                            |la_data_out[73]                            
+la_data_out[74]                            |la_data_out[74]                            
+la_data_out[75]                            |la_data_out[75]                            
+la_data_out[76]                            |la_data_out[76]                            
+la_data_out[77]                            |la_data_out[77]                            
+la_data_out[78]                            |la_data_out[78]                            
+la_data_out[79]                            |la_data_out[79]                            
+la_data_out[7]                             |la_data_out[7]                             
+la_data_out[80]                            |la_data_out[80]                            
+la_data_out[81]                            |la_data_out[81]                            
+la_data_out[82]                            |la_data_out[82]                            
+la_data_out[83]                            |la_data_out[83]                            
+la_data_out[84]                            |la_data_out[84]                            
+la_data_out[85]                            |la_data_out[85]                            
+la_data_out[86]                            |la_data_out[86]                            
+la_data_out[87]                            |la_data_out[87]                            
+la_data_out[88]                            |la_data_out[88]                            
+la_data_out[89]                            |la_data_out[89]                            
+la_data_out[8]                             |la_data_out[8]                             
+la_data_out[90]                            |la_data_out[90]                            
+la_data_out[91]                            |la_data_out[91]                            
+la_data_out[92]                            |la_data_out[92]                            
+la_data_out[93]                            |la_data_out[93]                            
+la_data_out[94]                            |la_data_out[94]                            
+la_data_out[95]                            |la_data_out[95]                            
+la_data_out[96]                            |la_data_out[96]                            
+la_data_out[97]                            |la_data_out[97]                            
+la_data_out[98]                            |la_data_out[98]                            
+la_data_out[99]                            |la_data_out[99]                            
+la_data_out[9]                             |la_data_out[9]                             
+la_oenb[0]                                 |la_oenb[0]                                 
+la_oenb[100]                               |la_oenb[100]                               
+la_oenb[101]                               |la_oenb[101]                               
+la_oenb[102]                               |la_oenb[102]                               
+la_oenb[103]                               |la_oenb[103]                               
+la_oenb[104]                               |la_oenb[104]                               
+la_oenb[105]                               |la_oenb[105]                               
+la_oenb[106]                               |la_oenb[106]                               
+la_oenb[107]                               |la_oenb[107]                               
+la_oenb[108]                               |la_oenb[108]                               
+la_oenb[109]                               |la_oenb[109]                               
+la_oenb[10]                                |la_oenb[10]                                
+la_oenb[110]                               |la_oenb[110]                               
+la_oenb[111]                               |la_oenb[111]                               
+la_oenb[112]                               |la_oenb[112]                               
+la_oenb[113]                               |la_oenb[113]                               
+la_oenb[114]                               |la_oenb[114]                               
+la_oenb[115]                               |la_oenb[115]                               
+la_oenb[116]                               |la_oenb[116]                               
+la_oenb[117]                               |la_oenb[117]                               
+la_oenb[118]                               |la_oenb[118]                               
+la_oenb[119]                               |la_oenb[119]                               
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+la_oenb[120]                               |la_oenb[120]                               
+la_oenb[121]                               |la_oenb[121]                               
+la_oenb[122]                               |la_oenb[122]                               
+la_oenb[123]                               |la_oenb[123]                               
+la_oenb[124]                               |la_oenb[124]                               
+la_oenb[125]                               |la_oenb[125]                               
+la_oenb[126]                               |la_oenb[126]                               
+la_oenb[127]                               |la_oenb[127]                               
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+la_oenb[14]                                |la_oenb[14]                                
+la_oenb[15]                                |la_oenb[15]                                
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+la_oenb[17]                                |la_oenb[17]                                
+la_oenb[18]                                |la_oenb[18]                                
+la_oenb[19]                                |la_oenb[19]                                
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+la_oenb[20]                                |la_oenb[20]                                
+la_oenb[21]                                |la_oenb[21]                                
+la_oenb[22]                                |la_oenb[22]                                
+la_oenb[23]                                |la_oenb[23]                                
+la_oenb[24]                                |la_oenb[24]                                
+la_oenb[25]                                |la_oenb[25]                                
+la_oenb[26]                                |la_oenb[26]                                
+la_oenb[27]                                |la_oenb[27]                                
+la_oenb[28]                                |la_oenb[28]                                
+la_oenb[29]                                |la_oenb[29]                                
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+la_oenb[30]                                |la_oenb[30]                                
+la_oenb[31]                                |la_oenb[31]                                
+la_oenb[32]                                |la_oenb[32]                                
+la_oenb[33]                                |la_oenb[33]                                
+la_oenb[34]                                |la_oenb[34]                                
+la_oenb[35]                                |la_oenb[35]                                
+la_oenb[36]                                |la_oenb[36]                                
+la_oenb[37]                                |la_oenb[37]                                
+la_oenb[38]                                |la_oenb[38]                                
+la_oenb[39]                                |la_oenb[39]                                
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+la_oenb[40]                                |la_oenb[40]                                
+la_oenb[41]                                |la_oenb[41]                                
+la_oenb[42]                                |la_oenb[42]                                
+la_oenb[43]                                |la_oenb[43]                                
+la_oenb[44]                                |la_oenb[44]                                
+la_oenb[45]                                |la_oenb[45]                                
+la_oenb[46]                                |la_oenb[46]                                
+la_oenb[47]                                |la_oenb[47]                                
+la_oenb[48]                                |la_oenb[48]                                
+la_oenb[49]                                |la_oenb[49]                                
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+la_oenb[50]                                |la_oenb[50]                                
+la_oenb[51]                                |la_oenb[51]                                
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+la_oenb[53]                                |la_oenb[53]                                
+la_oenb[54]                                |la_oenb[54]                                
+la_oenb[55]                                |la_oenb[55]                                
+la_oenb[56]                                |la_oenb[56]                                
+la_oenb[57]                                |la_oenb[57]                                
+la_oenb[58]                                |la_oenb[58]                                
+la_oenb[59]                                |la_oenb[59]                                
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+la_oenb[60]                                |la_oenb[60]                                
+la_oenb[61]                                |la_oenb[61]                                
+la_oenb[62]                                |la_oenb[62]                                
+la_oenb[63]                                |la_oenb[63]                                
+la_oenb[64]                                |la_oenb[64]                                
+la_oenb[65]                                |la_oenb[65]                                
+la_oenb[66]                                |la_oenb[66]                                
+la_oenb[67]                                |la_oenb[67]                                
+la_oenb[68]                                |la_oenb[68]                                
+la_oenb[69]                                |la_oenb[69]                                
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+la_oenb[70]                                |la_oenb[70]                                
+la_oenb[71]                                |la_oenb[71]                                
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+la_oenb[73]                                |la_oenb[73]                                
+la_oenb[74]                                |la_oenb[74]                                
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+la_oenb[76]                                |la_oenb[76]                                
+la_oenb[77]                                |la_oenb[77]                                
+la_oenb[78]                                |la_oenb[78]                                
+la_oenb[79]                                |la_oenb[79]                                
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+la_oenb[80]                                |la_oenb[80]                                
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+la_oenb[82]                                |la_oenb[82]                                
+la_oenb[83]                                |la_oenb[83]                                
+la_oenb[84]                                |la_oenb[84]                                
+la_oenb[85]                                |la_oenb[85]                                
+la_oenb[86]                                |la_oenb[86]                                
+la_oenb[87]                                |la_oenb[87]                                
+la_oenb[88]                                |la_oenb[88]                                
+la_oenb[89]                                |la_oenb[89]                                
+la_oenb[8]                                 |la_oenb[8]                                 
+la_oenb[90]                                |la_oenb[90]                                
+la_oenb[91]                                |la_oenb[91]                                
+la_oenb[92]                                |la_oenb[92]                                
+la_oenb[93]                                |la_oenb[93]                                
+la_oenb[94]                                |la_oenb[94]                                
+la_oenb[95]                                |la_oenb[95]                                
+la_oenb[96]                                |la_oenb[96]                                
+la_oenb[97]                                |la_oenb[97]                                
+la_oenb[98]                                |la_oenb[98]                                
+la_oenb[99]                                |la_oenb[99]                                
+la_oenb[9]                                 |la_oenb[9]                                 
+user_clock2                                |user_clock2                                
+user_irq[0]                                |user_irq[0]                                
+user_irq[1]                                |user_irq[1]                                
+user_irq[2]                                |user_irq[2]                                
+vccd1                                      |vccd1                                      
+vccd2                                      |vccd2                                      
+vdda1                                      |vdda1                                      
+vdda2                                      |vdda2                                      
+vssa2                                      |vssa2                                      
+vssd1                                      |vssd1                                      
+vssd2                                      |vssd2                                      
+wb_clk_i                                   |wb_clk_i                                   
+wb_rst_i                                   |wb_rst_i                                   
+wbs_ack_o                                  |wbs_ack_o                                  
+wbs_adr_i[0]                               |wbs_adr_i[0]                               
+wbs_adr_i[10]                              |wbs_adr_i[10]                              
+wbs_adr_i[11]                              |wbs_adr_i[11]                              
+wbs_adr_i[12]                              |wbs_adr_i[12]                              
+wbs_adr_i[13]                              |wbs_adr_i[13]                              
+wbs_adr_i[14]                              |wbs_adr_i[14]                              
+wbs_adr_i[15]                              |wbs_adr_i[15]                              
+wbs_adr_i[16]                              |wbs_adr_i[16]                              
+wbs_adr_i[17]                              |wbs_adr_i[17]                              
+wbs_adr_i[18]                              |wbs_adr_i[18]                              
+wbs_adr_i[19]                              |wbs_adr_i[19]                              
+wbs_adr_i[1]                               |wbs_adr_i[1]                               
+wbs_adr_i[20]                              |wbs_adr_i[20]                              
+wbs_adr_i[21]                              |wbs_adr_i[21]                              
+wbs_adr_i[22]                              |wbs_adr_i[22]                              
+wbs_adr_i[23]                              |wbs_adr_i[23]                              
+wbs_adr_i[24]                              |wbs_adr_i[24]                              
+wbs_adr_i[25]                              |wbs_adr_i[25]                              
+wbs_adr_i[26]                              |wbs_adr_i[26]                              
+wbs_adr_i[27]                              |wbs_adr_i[27]                              
+wbs_adr_i[28]                              |wbs_adr_i[28]                              
+wbs_adr_i[29]                              |wbs_adr_i[29]                              
+wbs_adr_i[2]                               |wbs_adr_i[2]                               
+wbs_adr_i[30]                              |wbs_adr_i[30]                              
+wbs_adr_i[31]                              |wbs_adr_i[31]                              
+wbs_adr_i[3]                               |wbs_adr_i[3]                               
+wbs_adr_i[4]                               |wbs_adr_i[4]                               
+wbs_adr_i[5]                               |wbs_adr_i[5]                               
+wbs_adr_i[6]                               |wbs_adr_i[6]                               
+wbs_adr_i[7]                               |wbs_adr_i[7]                               
+wbs_adr_i[8]                               |wbs_adr_i[8]                               
+wbs_adr_i[9]                               |wbs_adr_i[9]                               
+wbs_cyc_i                                  |wbs_cyc_i                                  
+wbs_dat_i[0]                               |wbs_dat_i[0]                               
+wbs_dat_i[10]                              |wbs_dat_i[10]                              
+wbs_dat_i[11]                              |wbs_dat_i[11]                              
+wbs_dat_i[12]                              |wbs_dat_i[12]                              
+wbs_dat_i[13]                              |wbs_dat_i[13]                              
+wbs_dat_i[14]                              |wbs_dat_i[14]                              
+wbs_dat_i[15]                              |wbs_dat_i[15]                              
+wbs_dat_i[16]                              |wbs_dat_i[16]                              
+wbs_dat_i[17]                              |wbs_dat_i[17]                              
+wbs_dat_i[18]                              |wbs_dat_i[18]                              
+wbs_dat_i[19]                              |wbs_dat_i[19]                              
+wbs_dat_i[1]                               |wbs_dat_i[1]                               
+wbs_dat_i[20]                              |wbs_dat_i[20]                              
+wbs_dat_i[21]                              |wbs_dat_i[21]                              
+wbs_dat_i[22]                              |wbs_dat_i[22]                              
+wbs_dat_i[23]                              |wbs_dat_i[23]                              
+wbs_dat_i[24]                              |wbs_dat_i[24]                              
+wbs_dat_i[25]                              |wbs_dat_i[25]                              
+wbs_dat_i[26]                              |wbs_dat_i[26]                              
+wbs_dat_i[27]                              |wbs_dat_i[27]                              
+wbs_dat_i[28]                              |wbs_dat_i[28]                              
+wbs_dat_i[29]                              |wbs_dat_i[29]                              
+wbs_dat_i[2]                               |wbs_dat_i[2]                               
+wbs_dat_i[30]                              |wbs_dat_i[30]                              
+wbs_dat_i[31]                              |wbs_dat_i[31]                              
+wbs_dat_i[3]                               |wbs_dat_i[3]                               
+wbs_dat_i[4]                               |wbs_dat_i[4]                               
+wbs_dat_i[5]                               |wbs_dat_i[5]                               
+wbs_dat_i[6]                               |wbs_dat_i[6]                               
+wbs_dat_i[7]                               |wbs_dat_i[7]                               
+wbs_dat_i[8]                               |wbs_dat_i[8]                               
+wbs_dat_i[9]                               |wbs_dat_i[9]                               
+wbs_dat_o[0]                               |wbs_dat_o[0]                               
+wbs_dat_o[10]                              |wbs_dat_o[10]                              
+wbs_dat_o[11]                              |wbs_dat_o[11]                              
+wbs_dat_o[12]                              |wbs_dat_o[12]                              
+wbs_dat_o[13]                              |wbs_dat_o[13]                              
+wbs_dat_o[14]                              |wbs_dat_o[14]                              
+wbs_dat_o[15]                              |wbs_dat_o[15]                              
+wbs_dat_o[16]                              |wbs_dat_o[16]                              
+wbs_dat_o[17]                              |wbs_dat_o[17]                              
+wbs_dat_o[18]                              |wbs_dat_o[18]                              
+wbs_dat_o[19]                              |wbs_dat_o[19]                              
+wbs_dat_o[1]                               |wbs_dat_o[1]                               
+wbs_dat_o[20]                              |wbs_dat_o[20]                              
+wbs_dat_o[21]                              |wbs_dat_o[21]                              
+wbs_dat_o[22]                              |wbs_dat_o[22]                              
+wbs_dat_o[23]                              |wbs_dat_o[23]                              
+wbs_dat_o[24]                              |wbs_dat_o[24]                              
+wbs_dat_o[25]                              |wbs_dat_o[25]                              
+wbs_dat_o[26]                              |wbs_dat_o[26]                              
+wbs_dat_o[27]                              |wbs_dat_o[27]                              
+wbs_dat_o[28]                              |wbs_dat_o[28]                              
+wbs_dat_o[29]                              |wbs_dat_o[29]                              
+wbs_dat_o[2]                               |wbs_dat_o[2]                               
+wbs_dat_o[30]                              |wbs_dat_o[30]                              
+wbs_dat_o[31]                              |wbs_dat_o[31]                              
+wbs_dat_o[3]                               |wbs_dat_o[3]                               
+wbs_dat_o[4]                               |wbs_dat_o[4]                               
+wbs_dat_o[5]                               |wbs_dat_o[5]                               
+wbs_dat_o[6]                               |wbs_dat_o[6]                               
+wbs_dat_o[7]                               |wbs_dat_o[7]                               
+wbs_dat_o[8]                               |wbs_dat_o[8]                               
+wbs_dat_o[9]                               |wbs_dat_o[9]                               
+wbs_sel_i[0]                               |wbs_sel_i[0]                               
+wbs_sel_i[1]                               |wbs_sel_i[1]                               
+wbs_sel_i[2]                               |wbs_sel_i[2]                               
+wbs_sel_i[3]                               |wbs_sel_i[3]                               
+wbs_stb_i                                  |wbs_stb_i                                  
+wbs_we_i                                   |wbs_we_i                                   
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes user_analog_project_wrapper and user_analog_project_wrapper are equivalent.
+Circuits match uniquely.
diff --git a/netgen/det.out b/netgen/det.out
new file mode 100644
index 0000000..86633eb
--- /dev/null
+++ b/netgen/det.out
@@ -0,0 +1,61 @@
+Flattening unmatched subcell sky130_fd_pr__res_xhigh_po_0p35_HDW2JU in circuit detV2 (1)(1 instance)
+Warning: Equate pins:  cell sky130_fd_pr__res_xhigh_po has no definition, treated as a black box.
+Warning: Equate pins:  cell sky130_fd_pr__res_xhigh_po has no definition, treated as a black box.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_pr__res_xhigh_po      |Circuit 2: sky130_fd_pr__res_xhigh_po      
+-------------------------------------------|-------------------------------------------
+1                                          |1                                          
+2                                          |2                                          
+3                                          |3                                          
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_pr__res_xhigh_po and sky130_fd_pr__res_xhigh_po are equivalent.
+Warning: Equate pins:  cell sky130_fd_pr__nfet_01v8 has no definition, treated as a black box.
+Warning: Equate pins:  cell sky130_fd_pr__nfet_01v8 has no definition, treated as a black box.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_pr__nfet_01v8         |Circuit 2: sky130_fd_pr__nfet_01v8         
+-------------------------------------------|-------------------------------------------
+1                                          |1                                          
+2                                          |2                                          
+3                                          |3                                          
+4                                          |4                                          
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_pr__nfet_01v8 and sky130_fd_pr__nfet_01v8 are equivalent.
+Warning: Equate pins:  cell sky130_fd_pr__cap_mim_m3_1 has no definition, treated as a black box.
+Warning: Equate pins:  cell sky130_fd_pr__cap_mim_m3_1 has no definition, treated as a black box.
+
+Subcircuit pins:
+Circuit 1: sky130_fd_pr__cap_mim_m3_1      |Circuit 2: sky130_fd_pr__cap_mim_m3_1      
+-------------------------------------------|-------------------------------------------
+1                                          |1                                          
+2                                          |2                                          
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes sky130_fd_pr__cap_mim_m3_1 and sky130_fd_pr__cap_mim_m3_1 are equivalent.
+
+Subcircuit summary:
+Circuit 1: detector                        |Circuit 2: detV2                           
+-------------------------------------------|-------------------------------------------
+sky130_fd_pr__nfet_01v8 (1)                |sky130_fd_pr__nfet_01v8 (1)                
+sky130_fd_pr__cap_mim_m3_1 (2)             |sky130_fd_pr__cap_mim_m3_1 (2)             
+sky130_fd_pr__res_xhigh_po (1)             |sky130_fd_pr__res_xhigh_po (1)             
+Number of devices: 4                       |Number of devices: 4                       
+Number of nets: 5                          |Number of nets: 5                          
+---------------------------------------------------------------------------------------
+Circuits match uniquely.
+Netlists match uniquely.
+
+Subcircuit pins:
+Circuit 1: detector                        |Circuit 2: detV2                           
+-------------------------------------------|-------------------------------------------
+do                                         |do                                         
+gnd                                        |GND                                        
+din                                        |din                                        
+dB                                         |db                                         
+---------------------------------------------------------------------------------------
+Cell pin lists are equivalent.
+Device classes detector and detV2 are equivalent.
+Circuits match uniquely.
diff --git a/netgen/detV2.spice b/netgen/detV2.spice
new file mode 100644
index 0000000..f5fc238
--- /dev/null
+++ b/netgen/detV2.spice
@@ -0,0 +1,13 @@
+* NGSPICE file created from detV2.ext - technology: sky130A
+
+.subckt sky130_fd_pr__res_xhigh_po_0p35_HDW2JU a_n35_1860# a_n35_n2292# VSUBS
+X0 a_n35_n2292# a_n35_1860# VSUBS sky130_fd_pr__res_xhigh_po w=350000u l=1.86e+07u
+.ends
+
+.subckt detV2 din db do GND
+XR bot_cin do GND sky130_fd_pr__res_xhigh_po_0p35_HDW2JU
+X0 din bot_cin sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X1 do GND sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X2 GND db bot_cin GND sky130_fd_pr__nfet_01v8 w=2.25e+07u l=150000u
+.ends
+
diff --git a/netgen/run_lvs_por.sh b/netgen/run_lvs_por.sh
new file mode 100755
index 0000000..2872a32
--- /dev/null
+++ b/netgen/run_lvs_por.sh
@@ -0,0 +1,24 @@
+#!/bin/sh
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# SPDX-License-Identifier: Apache-2.0
+
+#--------------------------------------------------------------------------------
+# Run LVS on the example_por layout
+#
+# NOTE:  By specifying the testbench for the schematic-side netlist, the proper
+# includes used by the testbench simulation are picked up.  Otherwise, the LVS
+# itself compares just the simple_por subcircuit from the testbench.
+#--------------------------------------------------------------------------------
+netgen -batch lvs "../xschem/detector.spice detector" "detV2.spice detV2"
diff --git a/netgen/run_lvs_wrapper_verilog.sh b/netgen/run_lvs_wrapper_verilog.sh
new file mode 100755
index 0000000..e54f6f6
--- /dev/null
+++ b/netgen/run_lvs_wrapper_verilog.sh
@@ -0,0 +1,22 @@
+#!/bin/sh
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# SPDX-License-Identifier: Apache-2.0
+
+#--------------------------------------------------------------------------------
+# Run LVS on the user_analog_project_wrapper layout, comparing against the
+# top-level verilog module.
+#
+#--------------------------------------------------------------------------------
+netgen -batch lvs "user_analog_project_wrapper.spice user_analog_project_wrapper" "../verilog/rtl/user_analog_project_wrapper.v user_analog_project_wrapper" /usr/share/pdk/sky130A/libs.tech/netgen/sky130A_setup.tcl comp.out
diff --git a/netgen/run_lvs_wrapper_xschem.sh b/netgen/run_lvs_wrapper_xschem.sh
new file mode 100755
index 0000000..0ee626d
--- /dev/null
+++ b/netgen/run_lvs_wrapper_xschem.sh
@@ -0,0 +1,22 @@
+#!/bin/sh
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# SPDX-License-Identifier: Apache-2.0
+
+#--------------------------------------------------------------------------------
+# Run LVS on the user_analog_project_wrapper layout, comparing against the
+# top-level xschem subcircuit from the wrapper testbench.
+#
+#--------------------------------------------------------------------------------
+netgen -batch lvs "user_analog_project_wrapper.spice user_analog_project_wrapper" "../xschem/user_analog_project_wrapper.spice user_analog_project_wrapper" 
diff --git a/netgen/setup.tcl b/netgen/setup.tcl
new file mode 100644
index 0000000..41e9151
--- /dev/null
+++ b/netgen/setup.tcl
@@ -0,0 +1,333 @@
+#---------------------------------------------------------------
+# Setup file for netgen LVS
+# SkyWater sky130A
+#---------------------------------------------------------------
+permute default
+property default
+property parallel none
+
+#---------------------------------------------------------------
+# For the following, get the cell lists from
+# circuit1 and circuit2.
+#---------------------------------------------------------------
+
+set cells1 [cells list -all -circuit1]
+set cells2 [cells list -all -circuit2]
+
+# NOTE:  In accordance with the LVS manager GUI, the schematic is
+# always circuit2, so some items like property "par1" only need to
+# be specified for circuit2.
+
+#-------------------------------------------
+# Resistors (except metal)
+#-------------------------------------------
+
+set devices {}
+lappend devices sky130_fd_pr__res_iso_pw
+lappend devices sky130_fd_pr__res_generic_po
+lappend devices sky130_fd_pr__res_high_po_0p35
+lappend devices sky130_fd_pr__res_high_po_0p69
+lappend devices sky130_fd_pr__res_high_po_1p41
+lappend devices sky130_fd_pr__res_high_po_2p85
+lappend devices sky130_fd_pr__res_high_po_5p73
+lappend devices sky130_fd_pr__res_high_po
+lappend devices sky130_fd_pr__res_xhigh_po_0p35
+lappend devices sky130_fd_pr__res_xhigh_po_0p69
+lappend devices sky130_fd_pr__res_xhigh_po_1p41
+lappend devices sky130_fd_pr__res_xhigh_po_2p85
+lappend devices sky130_fd_pr__res_xhigh_po_5p73
+lappend devices sky130_fd_pr__res_xhigh_po
+lappend devices sky130_fd_pr__res_generic_nd
+lappend devices sky130_fd_pr__res_generic_pd
+lappend devices mrdn_hv mrdp_hv
+
+foreach dev $devices {
+    if {[lsearch $cells1 $dev] >= 0} {
+	permute "-circuit1 $dev" 1 2
+	property "-circuit1 $dev" series enable
+	property "-circuit1 $dev" series {w critical}
+	property "-circuit1 $dev" series {l add}
+	property "-circuit1 $dev" parallel enable
+	property "-circuit1 $dev" parallel {l critical}
+	property "-circuit1 $dev" parallel {w add}
+	property "-circuit1 $dev" parallel {value par}
+	property "-circuit1 $dev" tolerance {l 0.01} {w 0.01}
+	# Ignore these properties
+	property "-circuit1 $dev" delete mult
+    }
+    if {[lsearch $cells2 $dev] >= 0} {
+	permute "-circuit2 $dev" 1 2
+	property "-circuit2 $dev" series enable
+	property "-circuit2 $dev" series {w critical}
+	property "-circuit2 $dev" series {l add}
+	property "-circuit2 $dev" parallel enable
+	property "-circuit2 $dev" parallel {l critical}
+	property "-circuit2 $dev" parallel {w add}
+	property "-circuit2 $dev" parallel {value par}
+	property "-circuit2 $dev" tolerance {l 0.01} {w 0.01}
+	# Ignore these properties
+	property "-circuit2 $dev" delete mult
+    }
+}
+
+#-------------------------------------------
+# MRM (metal) resistors
+#-------------------------------------------
+
+set devices {}
+lappend devices sky130_fd_pr__res_generic_l1
+lappend devices sky130_fd_pr__res_generic_m1
+lappend devices sky130_fd_pr__res_generic_m2
+lappend devices sky130_fd_pr__res_generic_m3
+lappend devices sky130_fd_pr__res_generic_m4
+lappend devices sky130_fd_pr__res_generic_m5
+
+foreach dev $devices {
+    if {[lsearch $cells1 $dev] >= 0} {
+	permute "-circuit1 $dev" 1 2
+	property "-circuit1 $dev" series enable
+	property "-circuit1 $dev" series {w critical}
+	property "-circuit1 $dev" series {l add}
+	property "-circuit1 $dev" parallel enable
+	property "-circuit1 $dev" parallel {l critical}
+	property "-circuit1 $dev" parallel {w add}
+	property "-circuit1 $dev" parallel {value par}
+	property "-circuit1 $dev" tolerance {l 0.01} {w 0.01}
+	# Ignore these properties
+	property "-circuit1 $dev" delete mult
+    }
+    if {[lsearch $cells2 $dev] >= 0} {
+	permute "-circuit2 $dev" 1 2
+	property "-circuit2 $dev" series enable
+	property "-circuit2 $dev" series {w critical}
+	property "-circuit2 $dev" series {l add}
+	property "-circuit2 $dev" parallel enable
+	property "-circuit2 $dev" parallel {l critical}
+	property "-circuit2 $dev" parallel {w add}
+	property "-circuit2 $dev" parallel {value par}
+	property "-circuit2 $dev" tolerance {l 0.01} {w 0.01}
+	# Ignore these properties
+	property "-circuit2 $dev" delete mult
+    }
+}
+
+#-------------------------------------------
+# (MOS) transistors
+#-------------------------------------------
+
+set devices {}
+lappend devices sky130_fd_pr__nfet_01v8
+lappend devices sky130_fd_pr__nfet_01v8_lvt
+lappend devices sky130_fd_bs_flash__special_sonosfet_star
+lappend devices sky130_fd_pr__nfet_g5v0d10v5
+lappend devices sky130_fd_pr__pfet_01v8
+lappend devices sky130_fd_pr__pfet_01v8_lvt
+lappend devices sky130_fd_pr__pfet_01v8_mvt
+lappend devices sky130_fd_pr__pfet_01v8_hvt
+lappend devices sky130_fd_pr__pfet_g5v0d10v5
+lappend devices sky130_fd_pr__special_pfet_pass
+lappend devices sky130_fd_pr__special_nfet_pass
+lappend devices sky130_fd_pr__special_nfet_latch
+lappend devices sky130_fd_pr__cap_var_lvt
+lappend devices sky130_fd_pr__cap_var_hvt
+lappend devices sky130_fd_pr__cap_var
+
+foreach dev $devices {
+    if {[lsearch $cells1 $dev] >= 0} {
+	permute "-circuit1 $dev" 1 3
+	property "-circuit1 $dev" parallel enable
+	property "-circuit1 $dev" parallel {l critical}
+	property "-circuit1 $dev" parallel {w add}
+	property "-circuit1 $dev" tolerance {w 0.01} {l 0.01}
+	# Ignore these properties
+	property "-circuit1 $dev" delete as ad ps pd mult sa sb sd nf nrd nrs
+    }
+    if {[lsearch $cells2 $dev] >= 0} {
+	permute "-circuit2 $dev" 1 3
+	property "-circuit2 $dev" parallel enable
+	property "-circuit2 $dev" parallel {l critical}
+	property "-circuit2 $dev" parallel {w add}
+	property "-circuit2 $dev" tolerance {w 0.01} {l 0.01}
+	# Ignore these properties
+	property "-circuit2 $dev" delete as ad ps pd mult sa sb sd nf nrd nrs
+    }
+}
+
+#-------------------------------------------
+# diodes
+#-------------------------------------------
+
+set devices {}
+lappend devices sky130_fd_pr__diode_pw2nd_05v5
+lappend devices sky130_fd_pr__diode_pw2nd_05v5_lvt
+lappend devices sky130_fd_pr__diode_pw2nd_05v5_nvt
+lappend devices sky130_fd_pr__diode_pd2nw_05v5
+lappend devices sky130_fd_pr__diode_pd2nw_05v5_lvt
+lappend devices sky130_fd_pr__diode_pd2nw_05v5_hvt
+lappend devices sky130_fd_pr__diode_pw2nd_11v0
+lappend devices sky130_fd_pr__diode_pd2nw_11v0
+
+foreach dev $devices {
+    if {[lsearch $cells1 $dev] >= 0} {
+	property "-circuit1 $dev" parallel enable
+	property "-circuit1 $dev" parallel {area add}
+	property "-circuit1 $dev" parallel {value add}
+	property "-circuit1 $dev" tolerance {area 0.02}
+	# Ignore these properties
+	property "-circuit1 $dev" delete mult perim
+    }
+    if {[lsearch $cells2 $dev] >= 0} {
+	property "-circuit2 $dev" parallel enable
+	property "-circuit2 $dev" parallel {area add}
+	property "-circuit2 $dev" parallel {value add}
+	property "-circuit2 $dev" tolerance {area 0.02}
+	# Ignore these properties
+	property "-circuit2 $dev" delete mult perim
+    }
+}
+
+#-------------------------------------------
+# capacitors
+# MiM capacitors
+#-------------------------------------------
+
+set devices {}
+lappend devices sky130_fd_pr__cap_mim_m3_1
+lappend devices sky130_fd_pr__cap_mim_m3_2
+
+foreach dev $devices {
+    if {[lsearch $cells1 $dev] >= 0} {
+	property "-circuit1 $dev" parallel enable
+	property "-circuit1 $dev" parallel {area add}
+	property "-circuit1 $dev" parallel {value add}
+	property "-circuit1 $dev" tolerance {l 0.01} {w 0.01}
+	# Ignore these properties
+	property "-circuit1 $dev" delete mult perim mf
+    }
+    if {[lsearch $cells2 $dev] >= 0} {
+	property "-circuit2 $dev" parallel enable
+	property "-circuit2 $dev" parallel {area add}
+	property "-circuit2 $dev" parallel {value add}
+	property "-circuit2 $dev" tolerance {l 0.01} {w 0.01}
+	# Ignore these properties
+	property "-circuit2 $dev" delete mult perim mf
+    }
+}
+
+#-------------------------------------------
+# Fixed-layout devices
+# bipolar transistors,
+# VPP capacitors
+#-------------------------------------------
+
+set devices {}
+lappend devices sky130_fd_pr__npn_05v5_W1p00L1p00
+lappend devices sky130_fd_pr__npn_05v5_W1p00L2p00
+lappend devices sky130_fd_pr__pnp_05v5_W0p68L0p68
+lappend devices sky130_fd_pr__pnp_05v5_W3p40L3p40
+
+lappend devices sky130_fd_pr__cap_vpp_11p5x11p7_lim5_shield
+lappend devices sky130_fd_pr__cap_vpp_11p5x11p7_m3_lim5_shield
+lappend devices sky130_fd_pr__cap_vpp_11p5x11p7_m4_shield
+lappend devices sky130_fd_pr__cap_vpp_11p5x11p7_pom4_shield
+lappend devices sky130_fd_pr__cap_vpp_4p4x4p6_m3_lim5_shield
+lappend devices sky130_fd_pr__cap_vpp_6p8x6p1_lim4_shield
+lappend devices sky130_fd_pr__cap_vpp_6p8x6p1_polym4_shield
+lappend devices sky130_fd_pr__cap_vpp_8p6x7p9_m3_lim5_shield
+lappend devices sky130_fd_pr__cap_vpp_11p5x11p7_m3_li_shield
+lappend devices sky130_fd_pr__cap_vpp_11p5x11p7_m3_shield
+lappend devices sky130_fd_pr__cap_vpp_1p8x1p8_li_shield
+lappend devices sky130_fd_pr__cap_vpp_1p8x1p8_m3_shield
+lappend devices sky130_fd_pr__cap_vpp_4p4x4p6_m3_li_shield
+lappend devices sky130_fd_pr__cap_vpp_4p4x4p6_m3_shield
+lappend devices sky130_fd_pr__cap_vpp_8p6x7p9_m3_li_shield
+lappend devices sky130_fd_pr__cap_vpp_8p6x7p9_m3_shield
+lappend devices sky130_fd_pr__ind_04_01
+lappend devices sky130_fd_pr__ind_04_02
+
+foreach dev $devices {
+    if {[lsearch $cells1 $dev] >= 0} {
+	property "-circuit1 $dev" parallel enable
+	# Ignore these properties
+	property "-circuit1 $dev" delete mult
+    }
+    if {[lsearch $cells2 $dev] >= 0} {
+	property "-circuit2 $dev" parallel enable
+	# Ignore these properties
+	property "-circuit2 $dev" delete mult
+    }
+}
+
+#---------------------------------------------------------------
+# Digital cells (ignore decap, fill, and tap cells)
+# Make a separate list for each supported library
+#---------------------------------------------------------------
+# e.g., ignore class "-circuit2 sky130_fc_sc_hd__decap_3"
+#---------------------------------------------------------------
+
+foreach cell $cells1 {
+    if {[regexp {sky130_fd_sc_[^_]+__decap_[[:digit:]]+} $cell match]} {
+        ignore class "-circuit1 $cell"
+    }
+    if {[regexp {sky130_fd_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
+        ignore class "-circuit1 $cell"
+    }
+}
+foreach cell $cells2 {
+    if {[regexp {sky130_fd_sc_[^_]+__decap_[[:digit:]]+} $cell match]} {
+        ignore class "-circuit2 $cell"
+    }
+    if {[regexp {sky130_fd_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
+        ignore class "-circuit2 $cell"
+    }
+}
+
+#---------------------------------------------------------------
+# Handle cells captured from Electric
+#
+# Find cells of the form "<library>__<cellname>" in the netlist
+# from Electric where the extracted layout netlist has only
+# "<cellname>".  Cross-check by ensuring that the full name
+# "<library>__<cellname>" does not exist in both cells, and that
+# the truncated name "<cellname>" does not exist in both cells.
+#---------------------------------------------------------------
+# e.g., hydra_spi_controller__hydra_spi_controller
+#---------------------------------------------------------------
+
+foreach cell $cells1 {
+    if {[regexp "(.+)__(.+)" $cell match library cellname]} {
+        if {([lsearch $cells2 $cell] < 0) && \
+                ([lsearch $cells2 $cellname] >= 0) && \
+                ([lsearch $cells1 $cellname] < 0)} {
+            equate classes "-circuit1 $cell" "-circuit2 $cellname"
+	    puts stdout "Matching pins of $cell in circuit 1 and $cellname in circuit 2"
+	    equate pins "-circuit1 $cell" "-circuit2 $cellname"
+        }
+    }
+}
+
+foreach cell $cells2 {
+    if {[regexp "(.+)__(.+)" $cell match library cellname]} {
+        if {([lsearch $cells1 $cell] < 0) && \
+                ([lsearch $cells1 $cellname] >= 0) && \
+                ([lsearch $cells2 $cellname] < 0)} {
+            equate classes "-circuit1 $cellname" "-circuit2 $cell"
+	    puts stdout "Matching pins of $cellname in circuit 1 and $cell in circuit 2"
+	    equate pins "-circuit1 $cellname" "-circuit2 $cell"
+        }
+    }
+}
+
+# Match pins on black-box cells if LVS is called with "-blackbox"
+if {[model blackbox]} {
+    foreach cell $cells1 {
+	if {[model "-circuit1 $cell"] == "blackbox"} {
+	    if {[lsearch $cells2 $cell] >= 0} {
+		puts stdout "Matching pins of $cell in circuits 1 and 2"
+		equate pins "-circuit1 $cell" "-circuit2 $cell"
+	    }
+	}
+    }
+}
+
+#---------------------------------------------------------------
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..2779d8f
--- /dev/null
+++ b/netgen/user_analog_project_wrapper.spice
@@ -0,0 +1,122 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt sky130_fd_pr__res_xhigh_po_0p35_HDW2JU a_n35_1860# a_n35_n2292# VSUBS
+X0 a_n35_n2292# a_n35_1860# VSUBS sky130_fd_pr__res_xhigh_po w=350000u l=1.86e+07u
+.ends
+
+.subckt detV2 din db do GND
+XR bot_cin do GND sky130_fd_pr__res_xhigh_po_0p35_HDW2JU
+X0 din bot_cin sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X1 do GND sky130_fd_pr__cap_mim_m3_1 l=8.7e+07u w=8.7e+07u
+X2 GND db bot_cin GND sky130_fd_pr__nfet_01v8 w=2.25e+07u l=150000u
+.ends
+
+.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
++ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
++ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
++ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
++ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
++ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
++ io_analog[1] io_analog[2] io_analog[3] io_analog[7] io_analog[8] io_analog[9] io_analog[4]
++ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
++ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
++ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
++ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
++ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
++ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
++ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
++ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
++ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
++ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
++ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
++ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
++ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
++ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
++ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
++ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
++ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
++ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
++ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
++ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
++ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
++ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
++ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
++ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
++ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
++ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
++ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
++ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
++ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
++ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
++ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
++ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
++ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
++ wbs_stb_i wbs_we_i
+XdetV2_0 io_analog[3] io_analog[1] io_analog[2] vssa1 detV2
+.ends
+
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/gds.info b/precheck_results/20_MAR_2022___22_53_12/logs/gds.info
new file mode 100644
index 0000000..e23d68e
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/gds.info
@@ -0,0 +1 @@
+user_analog_project_wrapper.gds: d27b57fff3ee1d7b22beec6f2a3928e4ed7754b9
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_beol_check.log b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_beol_check.log
new file mode 100644
index 0000000..e5b9486
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_beol_check.log
@@ -0,0 +1,992 @@
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:42: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:107
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+START: 67/44 (mcon)
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+Writing report database: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_beol_check.xml ..
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diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_beol_check.total b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_feol_check.log b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_feol_check.log
new file mode 100644
index 0000000..e1e32c0
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_feol_check.log
@@ -0,0 +1,780 @@
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:36: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
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diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_met_min_ca_density_check.log b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_met_min_ca_density_check.log
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+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:188
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:188
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:189
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"output" in: offgrid.lydrc:189
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:190
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:190
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:191
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:191
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:192
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"output" in: offgrid.lydrc:192
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:193
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:193
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:194
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:194
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:195
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"output" in: offgrid.lydrc:195
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:196
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:196
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:197
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:197
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:198
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"output" in: offgrid.lydrc:198
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:199
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:199
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:200
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:200
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:201
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"output" in: offgrid.lydrc:201
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"with_angle" in: offgrid.lydrc:202
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:202
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 524.00M
+"ongrid" in: offgrid.lydrc:203
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+"output" in: offgrid.lydrc:203
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 524.00M
+Writing report database: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 1.810s  Memory: 524.00M
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_offgrid_check.total b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..43fce49
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper, output to /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+  deep:true tiled:false threads:4
+--- #err|description, table for cell: user_analog_project_wrapper
+NO-Check ----        pwell:64/44/EMP   122/16/EMP    64/59/EMP    44/16/EMP     44/5/EMP
+         ----        nwell:64/20/EMP    64/16/EMP     64/5/EMP
+         ----         diff:65/20/dat    65/16/EMP     65/6/EMP
+         ----          tap:65/44/dat    65/48/EMP     65/5/EMP
+         ----         poly:66/20/dat    66/16/EMP     66/5/EMP
+         ----       licon1:66/44/dat    66/58/EMP
+         ----          li1:67/20/dat    67/16/EMP     67/5/EMP
+         ----         mcon:67/44/dat    67/48/EMP
+         ----         met1:68/20/dat    68/16/EMP     68/5/EMP
+         ----          via:68/44/dat    68/58/EMP
+         ----         met2:69/20/dat    69/16/EMP     69/5/dat
+         ----         via2:69/44/dat    69/58/EMP
+         ----         met3:70/20/dat    70/16/dat     70/5/dat
+         ----         via3:70/44/dat    70/48/EMP
+         ----         met4:71/20/dat    71/16/EMP     71/5/dat
+         ----         via4:71/44/EMP    71/48/EMP
+         ----         met5:72/20/dat    72/16/EMP     72/5/dat
+         ----          pad:76/20/EMP     76/5/EMP    76/16/EMP
+         ----          pnp:82/44/EMP    82/59/EMP
+         ----          npn:82/20/EMP     82/5/EMP
+         ----          rdl:74/20/EMP    74/16/EMP     74/5/EMP
+         ----     inductor:82/24/EMP    82/25/EMP
+       0 total error(s) among 0 error type(s), 33 checks, cell: user_analog_project_wrapper
+Writing report...
+VmPeak:	 1189372 kB
+VmHWM:	  231464 kB
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_zeroarea_check.log b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..5d192d3
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_no_zero_areas.gds
+VmPeak:	  537580 kB
+VmHWM:	  233420 kB
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/klayout_zeroarea_check.total b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/magic_drc_check.log b/precheck_results/20_MAR_2022___22_53_12/logs/magic_drc_check.log
new file mode 100644
index 0000000..cad1b57
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/magic_drc_check.log
@@ -0,0 +1,30 @@
+
+Magic 8.3 revision 265 - Compiled on Tue Feb  8 15:12:01 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130: scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    nnmos obsactive mvobsactive obsli1 obsm1 obsm2 obsm3 obsm4 obsm5 obsmrdl fillblock comment obscomment res0p35 res0p69 res1p41 res2p85 res5p73 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/wisla/mpw_precheck/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__res_xhigh_po_0p35_HDW2JU".
+Reading "detV2".
+Reading "user_analog_project_wrapper".
+[INFO]: Loading user_analog_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/magic_drc_check.total b/precheck_results/20_MAR_2022___22_53_12/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/pdks.info b/precheck_results/20_MAR_2022___22_53_12/logs/pdks.info
new file mode 100644
index 0000000..f6e2777
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 32cdb2097fd9a629c91e8ea33e1f6de08ab25946
+Skywater PDK f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/precheck.log b/precheck_results/20_MAR_2022___22_53_12/logs/precheck.log
new file mode 100644
index 0000000..6b8ad80
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/precheck.log
@@ -0,0 +1,59 @@
+2022-03-20 22:53:12 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog
+2022-03-20 22:53:12 - [INFO] - {{Project Type Info}} analog
+2022-03-20 22:53:12 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: d27b57fff3ee1d7b22beec6f2a3928e4ed7754b9
+2022-03-20 22:53:12 - [INFO] - {{Tools Info}} KLayout: v0.27.7 | Magic: v8.3.265
+2022-03-20 22:53:12 - [INFO] - {{PDKs Info}} Open PDKs: 32cdb2097fd9a629c91e8ea33e1f6de08ab25946 | Skywater PDK: f70d8ca46961ff92719d8870a18a076370b85f6c
+2022-03-20 22:53:12 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in '/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/logs'
+2022-03-20 22:53:12 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-03-20 22:53:12 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-03-20 22:53:13 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog.
+2022-03-20 22:53:13 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-03-20 22:53:14 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog.
+2022-03-20 22:53:15 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog.
+2022-03-20 22:53:15 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-03-20 22:53:15 - [INFO] - {{SPDX COMPLIANCE CHECK PASSED}} Project is compliant with the SPDX Standard
+2022-03-20 22:53:15 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-03-20 22:53:15 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-03-20 22:53:15 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-03-20 22:53:15 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-03-20 22:53:16 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-03-20 22:53:16 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-03-20 22:53:16 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-03-20 22:53:16 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
+2022-03-20 22:53:17 - [INFO] - HIERARCHY CHECK PASSED: Module user_analog_project_wrapper is instantiated in caravan. 
+2022-03-20 22:53:17 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravan contains at least 8 instances (68 instances). 
+2022-03-20 22:53:17 - [INFO] - MODELING CHECK PASSED: Netlist caravan is structural.
+2022-03-20 22:53:17 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_analog_project_wrapper are correctly connected in the top level netlist caravan.
+2022-03-20 22:53:17 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravan netlist passed all consistency checks.
+2022-03-20 22:53:17 - [INFO] - PORTS CHECK PASSED: Netlist user_analog_project_wrapper ports match the golden wrapper ports
+2022-03-20 22:53:17 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_analog_project_wrapper contains at least 1 instances (1 instances). 
+2022-03-20 22:53:17 - [INFO] - MODELING CHECK PASSED: Netlist user_analog_project_wrapper is structural.
+2022-03-20 22:53:17 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_analog_project_wrapper matches the provided structural netlist.
+2022-03-20 22:53:17 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_analog_project_wrapper netlist passed all consistency checks.
+2022-03-20 22:53:17 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-03-20 22:53:17 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 13: XOR
+2022-03-20 22:53:20 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 2, for more details view /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.xor.gds
+2022-03-20 22:53:20 - [WARNING] - {{XOR CHECK FAILED}} The GDS file has non-conforming geometries.
+2022-03-20 22:53:20 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
+2022-03-20 22:53:21 - [INFO] - 0 DRC violations
+2022-03-20 22:53:21 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 22:53:21 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 13: Klayout FEOL
+2022-03-20 22:53:24 - [INFO] - No DRC Violations found
+2022-03-20 22:53:24 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 22:53:24 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 13: Klayout BEOL
+2022-03-20 22:53:28 - [INFO] - No DRC Violations found
+2022-03-20 22:53:28 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 22:53:28 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 13: Klayout Offgrid
+2022-03-20 22:53:31 - [INFO] - No DRC Violations found
+2022-03-20 22:53:31 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 22:53:31 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density
+2022-03-20 22:53:32 - [INFO] - No DRC Violations found
+2022-03-20 22:53:32 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 22:53:32 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 13: Klayout Pin Label Purposes Overlapping Drawing
+2022-03-20 22:53:34 - [INFO] - No DRC Violations found
+2022-03-20 22:53:34 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 22:53:34 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 13: Klayout ZeroArea
+2022-03-20 22:53:35 - [INFO] - No DRC Violations found
+2022-03-20 22:53:35 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 22:53:35 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in '/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/logs'
+2022-03-20 22:53:35 - [CRITICAL] - {{FAILURE}} 1 Check(s) Failed: ['XOR'] !!!
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/tools.info b/precheck_results/20_MAR_2022___22_53_12/logs/tools.info
new file mode 100644
index 0000000..b904646
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.7
+Magic: 8.3.265
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/xor_check.log b/precheck_results/20_MAR_2022___22_53_12/logs/xor_check.log
new file mode 100644
index 0000000..dd2744d
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/xor_check.log
@@ -0,0 +1,162 @@
+Reading file /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/gds/user_analog_project_wrapper.gds for cell user_analog_project_wrapper
+dbu=0.001
+cell user_analog_project_wrapper dbu-bbox(ll;ur)=(-4000,-4000;2924000,3524030)
+cell user_analog_project_wrapper dbu-bbox(left,bottom,right,top)=(-4000,-4000,2924000,3524030)
+cell user_analog_project_wrapper dbu-size(width,height)=(2928000,3528030)
+cell user_analog_project_wrapper micron-bbox(left,bottom,right,top)=(-4.0,-4.0,2924.0,3524.03)
+cell user_analog_project_wrapper micron-size(width,height)=(2928.0,3528.03)
+Done.
+
+Magic 8.3 revision 265 - Compiled on Tue Feb  8 15:12:01 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130: scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    nnmos obsactive mvobsactive obsli1 obsm1 obsm2 obsm3 obsm4 obsm5 obsmrdl fillblock comment obscomment res0p35 res0p69 res1p41 res2p85 res5p73 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/wisla/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+The current style is "sky130".
+The CIF input styles are: sky130, vendorimport, waffleimport, rdlimport.
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__res_xhigh_po_0p35_HDW2JU".
+Reading "detV2".
+Reading "user_analog_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+
+Magic 8.3 revision 265 - Compiled on Tue Feb  8 15:12:01 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130: scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    nnmos obsactive mvobsactive obsli1 obsm1 obsm2 obsm3 obsm4 obsm5 obsmrdl fillblock comment obscomment res0p35 res0p69 res1p41 res2p85 res5p73 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/wisla/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+The current style is "sky130".
+The CIF input styles are: sky130, vendorimport, waffleimport, rdlimport.
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_analog_project_wrapper_empty
+Reading "user_analog_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+Reading /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_erased.gds ..
+Reading /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 494 (flat)  494 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 494 (flat)  494 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 185 (flat)  185 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 184 (flat)  184 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+XOR differences: 1
+"output" in: xor.rb.drc:43
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 6 (flat)  6 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 6 (flat)  6 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+XOR differences: 1
+"output" in: xor.rb.drc:43
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+Writing layout file: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.xor.gds ..
+Total elapsed: 0.110s  Memory: 521.00M
diff --git a/precheck_results/20_MAR_2022___22_53_12/logs/xor_check.total b/precheck_results/20_MAR_2022___22_53_12/logs/xor_check.total
new file mode 100644
index 0000000..d8263ee
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/logs/xor_check.total
@@ -0,0 +1 @@
+2
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_beol_check.xml b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..766c2e9
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_feol_check.xml b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..46dfa5b
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,363 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_met_min_ca_density_check.xml b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..77c069a
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_offgrid_check.xml b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..c1192d7
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/offgrid.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>dnwell_angle</name>
+   <description>x.3a : non 45 degree angle dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_angle</name>
+   <description>x.3a : non 45 degree angle nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_angle</name>
+   <description>x.3a : non 45 degree angle pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_angle</name>
+   <description>x.3a : non 45 degree angle pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_angle</name>
+   <description>x.3a : non 45 degree angle hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_angle</name>
+   <description>x.3a : non 45 degree angle hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_angle</name>
+   <description>x.3a : non 45 degree angle lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_angle</name>
+   <description>x.3a : non 45 degree angle ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2 : non 90 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2c : non 45 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2 : non 90 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2c : non 45 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_angle</name>
+   <description>x.3a : non 45 degree angle tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_angle</name>
+   <description>x.2 : non 90 degree angle poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_angle</name>
+   <description>x.3a : non 45 degree angle rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_angle</name>
+   <description>x.3a : non 45 degree angle npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_angle</name>
+   <description>x.3a : non 45 degree angle nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_angle</name>
+   <description>x.3a : non 45 degree angle psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_angle</name>
+   <description>x.2 : non 90 degree angle licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_angle</name>
+   <description>x.3a : non 45 degree angle li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_angle</name>
+   <description>x.2 : non 90 degree angle mcon</description>
+   <categories>
+   </categories>
+  </category>
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+   <description>x.1b : OFFGRID vertex on vpp</description>
+   <categories>
+   </categories>
+  </category>
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+   <name>vpp_angle</name>
+   <description>x.3a : non 45 degree angle vpp</description>
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+   </categories>
+  </category>
+  <category>
+   <name>m1_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m1</description>
+   <categories>
+   </categories>
+  </category>
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+   <categories>
+   </categories>
+  </category>
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+   <name>via_angle</name>
+   <description>x.2 : non 90 degree angle via</description>
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+   </categories>
+  </category>
+  <category>
+   <name>m2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m2</description>
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+   </categories>
+  </category>
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+   </categories>
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+   <categories>
+   </categories>
+  </category>
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+   <name>mf_angle</name>
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+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_angle</name>
+   <description>x.3a : non 45 degree angle hvi</description>
+   <categories>
+   </categories>
+  </category>
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+   <name>hvntm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_angle</name>
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+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_angle</name>
+   <description>x.3a : non 45 degree angle vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_angle</name>
+   <description>x.3a : non 45 degree angle uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_angle</name>
+   <description>x.3a : non 45 degree angle pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>areaid_re_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on areaid.re</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..52f5a1c
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_zeroarea_check.xml b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..bd39db2
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.drc.report b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..829b9d5
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_analog_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.rdb b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..8a882f3
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_analog_project_wrapper
+ 100
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.tcl b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.tcl
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.tr b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.tr
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.xml b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..7161d7c
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+    <categories/>
+    <cells>
+        <cell>
+            <name>user_analog_project_wrapper</name>
+        </cell>
+    </cells>
+    <items/>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.magic.drc.mag b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..fd2e99e
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,2232 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647816801
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+<< via2 >>
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+<< metal3 >>
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+<< via3 >>
+rect 405020 643397 406684 644661
+rect 545818 688360 549962 689624
+rect 467218 638948 468642 641092
+rect 434804 571187 436868 571191
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+rect 436864 565131 436868 571187
+rect 434804 565127 436868 565131
+<< metal4 >>
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+<< metal5 >>
+rect 165594 702300 170594 704800
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+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
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+use detV2  detV2_0
+timestamp 1647787158
+transform 1 0 481580 0 1 597004
+box -64974 -26942 -25500 -2992
+<< labels >>
+flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1400 0 0 0 gpio_analog[0]
+port 1 nsew
+flabel metal3 s -800 381864 480 381976 0 FreeSans 1400 0 0 0 gpio_analog[10]
+port 2 nsew
+flabel metal3 s -800 338642 480 338754 0 FreeSans 1400 0 0 0 gpio_analog[11]
+port 3 nsew
+flabel metal3 s -800 295420 480 295532 0 FreeSans 1400 0 0 0 gpio_analog[12]
+port 4 nsew
+flabel metal3 s -800 252398 480 252510 0 FreeSans 1400 0 0 0 gpio_analog[13]
+port 5 nsew
+flabel metal3 s -800 124776 480 124888 0 FreeSans 1400 0 0 0 gpio_analog[14]
+port 6 nsew
+flabel metal3 s -800 81554 480 81666 0 FreeSans 1400 0 0 0 gpio_analog[15]
+port 7 nsew
+flabel metal3 s -800 38332 480 38444 0 FreeSans 1400 0 0 0 gpio_analog[16]
+port 8 nsew
+flabel metal3 s -800 16910 480 17022 0 FreeSans 1400 0 0 0 gpio_analog[17]
+port 9 nsew
+flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1400 0 0 0 gpio_analog[1]
+port 10 nsew
+flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1400 0 0 0 gpio_analog[2]
+port 11 nsew
+flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1400 0 0 0 gpio_analog[3]
+port 12 nsew
+flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1400 0 0 0 gpio_analog[4]
+port 13 nsew
+flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1400 0 0 0 gpio_analog[5]
+port 14 nsew
+flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1400 0 0 0 gpio_analog[6]
+port 15 nsew
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+port 16 nsew
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+port 17 nsew
+flabel metal3 s -800 425086 480 425198 0 FreeSans 1400 0 0 0 gpio_analog[9]
+port 18 nsew
+flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1400 0 0 0 gpio_noesd[0]
+port 19 nsew
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+port 20 nsew
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+port 21 nsew
+flabel metal3 s -800 294238 480 294350 0 FreeSans 1400 0 0 0 gpio_noesd[12]
+port 22 nsew
+flabel metal3 s -800 251216 480 251328 0 FreeSans 1400 0 0 0 gpio_noesd[13]
+port 23 nsew
+flabel metal3 s -800 123594 480 123706 0 FreeSans 1400 0 0 0 gpio_noesd[14]
+port 24 nsew
+flabel metal3 s -800 80372 480 80484 0 FreeSans 1400 0 0 0 gpio_noesd[15]
+port 25 nsew
+flabel metal3 s -800 37150 480 37262 0 FreeSans 1400 0 0 0 gpio_noesd[16]
+port 26 nsew
+flabel metal3 s -800 15728 480 15840 0 FreeSans 1400 0 0 0 gpio_noesd[17]
+port 27 nsew
+flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1400 0 0 0 gpio_noesd[1]
+port 28 nsew
+flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1400 0 0 0 gpio_noesd[2]
+port 29 nsew
+flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1400 0 0 0 gpio_noesd[3]
+port 30 nsew
+flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1400 0 0 0 gpio_noesd[4]
+port 31 nsew
+flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1400 0 0 0 gpio_noesd[5]
+port 32 nsew
+flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1400 0 0 0 gpio_noesd[6]
+port 33 nsew
+flabel metal3 s -800 510348 480 510460 0 FreeSans 1400 0 0 0 gpio_noesd[7]
+port 34 nsew
+flabel metal3 s -800 467126 480 467238 0 FreeSans 1400 0 0 0 gpio_noesd[8]
+port 35 nsew
+flabel metal3 s -800 423904 480 424016 0 FreeSans 1400 0 0 0 gpio_noesd[9]
+port 36 nsew
+flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1400 0 0 0 io_analog[0]
+port 37 nsew
+flabel metal3 s 0 680242 1700 685242 0 FreeSans 1400 0 0 0 io_analog[10]
+port 38 nsew
+flabel metal3 s 566594 702300 571594 704800 0 FreeSans 2400 180 0 0 io_analog[1]
+port 39 nsew
+flabel metal3 s 465394 702300 470394 704800 0 FreeSans 2400 180 0 0 io_analog[2]
+port 40 nsew
+flabel metal3 s 413394 702300 418394 704800 0 FreeSans 2400 180 0 0 io_analog[3]
+port 41 nsew
+flabel metal3 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal4 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal5 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal3 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal4 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal5 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal3 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal4 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal5 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal3 s 120194 702300 125194 704800 0 FreeSans 2400 180 0 0 io_analog[7]
+port 45 nsew
+flabel metal3 s 68194 702300 73194 704800 0 FreeSans 2400 180 0 0 io_analog[8]
+port 46 nsew
+flabel metal3 s 16194 702300 21194 704800 0 FreeSans 2400 180 0 0 io_analog[9]
+port 47 nsew
+flabel metal3 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal4 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal5 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal3 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal4 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal5 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal3 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal4 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal5 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal3 s 326794 702300 328994 704800 0 FreeSans 2400 180 0 0 io_clamp_high[0]
+port 48 nsew
+flabel metal3 s 225094 702300 227294 704800 0 FreeSans 2400 180 0 0 io_clamp_high[1]
+port 49 nsew
+flabel metal3 s 173394 702300 175594 704800 0 FreeSans 2400 180 0 0 io_clamp_high[2]
+port 50 nsew
+flabel metal3 s 324294 702300 326494 704800 0 FreeSans 2400 180 0 0 io_clamp_low[0]
+port 51 nsew
+flabel metal3 s 222594 702300 224794 704800 0 FreeSans 2400 180 0 0 io_clamp_low[1]
+port 52 nsew
+flabel metal3 s 170894 702300 173094 704800 0 FreeSans 2400 180 0 0 io_clamp_low[2]
+port 53 nsew
+flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1400 0 0 0 io_in[0]
+port 54 nsew
+flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1400 0 0 0 io_in[10]
+port 55 nsew
+flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1400 0 0 0 io_in[11]
+port 56 nsew
+flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1400 0 0 0 io_in[12]
+port 57 nsew
+flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1400 0 0 0 io_in[13]
+port 58 nsew
+flabel metal3 s -800 507984 480 508096 0 FreeSans 1400 0 0 0 io_in[14]
+port 59 nsew
+flabel metal3 s -800 464762 480 464874 0 FreeSans 1400 0 0 0 io_in[15]
+port 60 nsew
+flabel metal3 s -800 421540 480 421652 0 FreeSans 1400 0 0 0 io_in[16]
+port 61 nsew
+flabel metal3 s -800 378318 480 378430 0 FreeSans 1400 0 0 0 io_in[17]
+port 62 nsew
+flabel metal3 s -800 335096 480 335208 0 FreeSans 1400 0 0 0 io_in[18]
+port 63 nsew
+flabel metal3 s -800 291874 480 291986 0 FreeSans 1400 0 0 0 io_in[19]
+port 64 nsew
+flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1400 0 0 0 io_in[1]
+port 65 nsew
+flabel metal3 s -800 248852 480 248964 0 FreeSans 1400 0 0 0 io_in[20]
+port 66 nsew
+flabel metal3 s -800 121230 480 121342 0 FreeSans 1400 0 0 0 io_in[21]
+port 67 nsew
+flabel metal3 s -800 78008 480 78120 0 FreeSans 1400 0 0 0 io_in[22]
+port 68 nsew
+flabel metal3 s -800 34786 480 34898 0 FreeSans 1400 0 0 0 io_in[23]
+port 69 nsew
+flabel metal3 s -800 13364 480 13476 0 FreeSans 1400 0 0 0 io_in[24]
+port 70 nsew
+flabel metal3 s -800 8636 480 8748 0 FreeSans 1400 0 0 0 io_in[25]
+port 71 nsew
+flabel metal3 s -800 3908 480 4020 0 FreeSans 1400 0 0 0 io_in[26]
+port 72 nsew
+flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1400 0 0 0 io_in[2]
+port 73 nsew
+flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1400 0 0 0 io_in[3]
+port 74 nsew
+flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1400 0 0 0 io_in[4]
+port 75 nsew
+flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1400 0 0 0 io_in[5]
+port 76 nsew
+flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1400 0 0 0 io_in[6]
+port 77 nsew
+flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1400 0 0 0 io_in[7]
+port 78 nsew
+flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1400 0 0 0 io_in[8]
+port 79 nsew
+flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1400 0 0 0 io_in[9]
+port 80 nsew
+flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1400 0 0 0 io_in_3v3[0]
+port 81 nsew
+flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1400 0 0 0 io_in_3v3[10]
+port 82 nsew
+flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1400 0 0 0 io_in_3v3[11]
+port 83 nsew
+flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1400 0 0 0 io_in_3v3[12]
+port 84 nsew
+flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1400 0 0 0 io_in_3v3[13]
+port 85 nsew
+flabel metal3 s -800 509166 480 509278 0 FreeSans 1400 0 0 0 io_in_3v3[14]
+port 86 nsew
+flabel metal3 s -800 465944 480 466056 0 FreeSans 1400 0 0 0 io_in_3v3[15]
+port 87 nsew
+flabel metal3 s -800 422722 480 422834 0 FreeSans 1400 0 0 0 io_in_3v3[16]
+port 88 nsew
+flabel metal3 s -800 379500 480 379612 0 FreeSans 1400 0 0 0 io_in_3v3[17]
+port 89 nsew
+flabel metal3 s -800 336278 480 336390 0 FreeSans 1400 0 0 0 io_in_3v3[18]
+port 90 nsew
+flabel metal3 s -800 293056 480 293168 0 FreeSans 1400 0 0 0 io_in_3v3[19]
+port 91 nsew
+flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1400 0 0 0 io_in_3v3[1]
+port 92 nsew
+flabel metal3 s -800 250034 480 250146 0 FreeSans 1400 0 0 0 io_in_3v3[20]
+port 93 nsew
+flabel metal3 s -800 122412 480 122524 0 FreeSans 1400 0 0 0 io_in_3v3[21]
+port 94 nsew
+flabel metal3 s -800 79190 480 79302 0 FreeSans 1400 0 0 0 io_in_3v3[22]
+port 95 nsew
+flabel metal3 s -800 35968 480 36080 0 FreeSans 1400 0 0 0 io_in_3v3[23]
+port 96 nsew
+flabel metal3 s -800 14546 480 14658 0 FreeSans 1400 0 0 0 io_in_3v3[24]
+port 97 nsew
+flabel metal3 s -800 9818 480 9930 0 FreeSans 1400 0 0 0 io_in_3v3[25]
+port 98 nsew
+flabel metal3 s -800 5090 480 5202 0 FreeSans 1400 0 0 0 io_in_3v3[26]
+port 99 nsew
+flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1400 0 0 0 io_in_3v3[2]
+port 100 nsew
+flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1400 0 0 0 io_in_3v3[3]
+port 101 nsew
+flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1400 0 0 0 io_in_3v3[4]
+port 102 nsew
+flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1400 0 0 0 io_in_3v3[5]
+port 103 nsew
+flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1400 0 0 0 io_in_3v3[6]
+port 104 nsew
+flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1400 0 0 0 io_in_3v3[7]
+port 105 nsew
+flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1400 0 0 0 io_in_3v3[8]
+port 106 nsew
+flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1400 0 0 0 io_in_3v3[9]
+port 107 nsew
+flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1400 0 0 0 io_oeb[0]
+port 108 nsew
+flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1400 0 0 0 io_oeb[10]
+port 109 nsew
+flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1400 0 0 0 io_oeb[11]
+port 110 nsew
+flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1400 0 0 0 io_oeb[12]
+port 111 nsew
+flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1400 0 0 0 io_oeb[13]
+port 112 nsew
+flabel metal3 s -800 505620 480 505732 0 FreeSans 1400 0 0 0 io_oeb[14]
+port 113 nsew
+flabel metal3 s -800 462398 480 462510 0 FreeSans 1400 0 0 0 io_oeb[15]
+port 114 nsew
+flabel metal3 s -800 419176 480 419288 0 FreeSans 1400 0 0 0 io_oeb[16]
+port 115 nsew
+flabel metal3 s -800 375954 480 376066 0 FreeSans 1400 0 0 0 io_oeb[17]
+port 116 nsew
+flabel metal3 s -800 332732 480 332844 0 FreeSans 1400 0 0 0 io_oeb[18]
+port 117 nsew
+flabel metal3 s -800 289510 480 289622 0 FreeSans 1400 0 0 0 io_oeb[19]
+port 118 nsew
+flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1400 0 0 0 io_oeb[1]
+port 119 nsew
+flabel metal3 s -800 246488 480 246600 0 FreeSans 1400 0 0 0 io_oeb[20]
+port 120 nsew
+flabel metal3 s -800 118866 480 118978 0 FreeSans 1400 0 0 0 io_oeb[21]
+port 121 nsew
+flabel metal3 s -800 75644 480 75756 0 FreeSans 1400 0 0 0 io_oeb[22]
+port 122 nsew
+flabel metal3 s -800 32422 480 32534 0 FreeSans 1400 0 0 0 io_oeb[23]
+port 123 nsew
+flabel metal3 s -800 11000 480 11112 0 FreeSans 1400 0 0 0 io_oeb[24]
+port 124 nsew
+flabel metal3 s -800 6272 480 6384 0 FreeSans 1400 0 0 0 io_oeb[25]
+port 125 nsew
+flabel metal3 s -800 1544 480 1656 0 FreeSans 1400 0 0 0 io_oeb[26]
+port 126 nsew
+flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1400 0 0 0 io_oeb[2]
+port 127 nsew
+flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1400 0 0 0 io_oeb[3]
+port 128 nsew
+flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1400 0 0 0 io_oeb[4]
+port 129 nsew
+flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1400 0 0 0 io_oeb[5]
+port 130 nsew
+flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1400 0 0 0 io_oeb[6]
+port 131 nsew
+flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1400 0 0 0 io_oeb[7]
+port 132 nsew
+flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1400 0 0 0 io_oeb[8]
+port 133 nsew
+flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1400 0 0 0 io_oeb[9]
+port 134 nsew
+flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1400 0 0 0 io_out[0]
+port 135 nsew
+flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1400 0 0 0 io_out[10]
+port 136 nsew
+flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1400 0 0 0 io_out[11]
+port 137 nsew
+flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1400 0 0 0 io_out[12]
+port 138 nsew
+flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1400 0 0 0 io_out[13]
+port 139 nsew
+flabel metal3 s -800 506802 480 506914 0 FreeSans 1400 0 0 0 io_out[14]
+port 140 nsew
+flabel metal3 s -800 463580 480 463692 0 FreeSans 1400 0 0 0 io_out[15]
+port 141 nsew
+flabel metal3 s -800 420358 480 420470 0 FreeSans 1400 0 0 0 io_out[16]
+port 142 nsew
+flabel metal3 s -800 377136 480 377248 0 FreeSans 1400 0 0 0 io_out[17]
+port 143 nsew
+flabel metal3 s -800 333914 480 334026 0 FreeSans 1400 0 0 0 io_out[18]
+port 144 nsew
+flabel metal3 s -800 290692 480 290804 0 FreeSans 1400 0 0 0 io_out[19]
+port 145 nsew
+flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1400 0 0 0 io_out[1]
+port 146 nsew
+flabel metal3 s -800 247670 480 247782 0 FreeSans 1400 0 0 0 io_out[20]
+port 147 nsew
+flabel metal3 s -800 120048 480 120160 0 FreeSans 1400 0 0 0 io_out[21]
+port 148 nsew
+flabel metal3 s -800 76826 480 76938 0 FreeSans 1400 0 0 0 io_out[22]
+port 149 nsew
+flabel metal3 s -800 33604 480 33716 0 FreeSans 1400 0 0 0 io_out[23]
+port 150 nsew
+flabel metal3 s -800 12182 480 12294 0 FreeSans 1400 0 0 0 io_out[24]
+port 151 nsew
+flabel metal3 s -800 7454 480 7566 0 FreeSans 1400 0 0 0 io_out[25]
+port 152 nsew
+flabel metal3 s -800 2726 480 2838 0 FreeSans 1400 0 0 0 io_out[26]
+port 153 nsew
+flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1400 0 0 0 io_out[2]
+port 154 nsew
+flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1400 0 0 0 io_out[3]
+port 155 nsew
+flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1400 0 0 0 io_out[4]
+port 156 nsew
+flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1400 0 0 0 io_out[5]
+port 157 nsew
+flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1400 0 0 0 io_out[6]
+port 158 nsew
+flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1400 0 0 0 io_out[7]
+port 159 nsew
+flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1400 0 0 0 io_out[8]
+port 160 nsew
+flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1400 0 0 0 io_out[9]
+port 161 nsew
+flabel metal2 s 125816 -800 125928 480 0 FreeSans 1400 90 0 0 la_data_in[0]
+port 162 nsew
+flabel metal2 s 480416 -800 480528 480 0 FreeSans 1400 90 0 0 la_data_in[100]
+port 163 nsew
+flabel metal2 s 483962 -800 484074 480 0 FreeSans 1400 90 0 0 la_data_in[101]
+port 164 nsew
+flabel metal2 s 487508 -800 487620 480 0 FreeSans 1400 90 0 0 la_data_in[102]
+port 165 nsew
+flabel metal2 s 491054 -800 491166 480 0 FreeSans 1400 90 0 0 la_data_in[103]
+port 166 nsew
+flabel metal2 s 494600 -800 494712 480 0 FreeSans 1400 90 0 0 la_data_in[104]
+port 167 nsew
+flabel metal2 s 498146 -800 498258 480 0 FreeSans 1400 90 0 0 la_data_in[105]
+port 168 nsew
+flabel metal2 s 501692 -800 501804 480 0 FreeSans 1400 90 0 0 la_data_in[106]
+port 169 nsew
+flabel metal2 s 505238 -800 505350 480 0 FreeSans 1400 90 0 0 la_data_in[107]
+port 170 nsew
+flabel metal2 s 508784 -800 508896 480 0 FreeSans 1400 90 0 0 la_data_in[108]
+port 171 nsew
+flabel metal2 s 512330 -800 512442 480 0 FreeSans 1400 90 0 0 la_data_in[109]
+port 172 nsew
+flabel metal2 s 161276 -800 161388 480 0 FreeSans 1400 90 0 0 la_data_in[10]
+port 173 nsew
+flabel metal2 s 515876 -800 515988 480 0 FreeSans 1400 90 0 0 la_data_in[110]
+port 174 nsew
+flabel metal2 s 519422 -800 519534 480 0 FreeSans 1400 90 0 0 la_data_in[111]
+port 175 nsew
+flabel metal2 s 522968 -800 523080 480 0 FreeSans 1400 90 0 0 la_data_in[112]
+port 176 nsew
+flabel metal2 s 526514 -800 526626 480 0 FreeSans 1400 90 0 0 la_data_in[113]
+port 177 nsew
+flabel metal2 s 530060 -800 530172 480 0 FreeSans 1400 90 0 0 la_data_in[114]
+port 178 nsew
+flabel metal2 s 533606 -800 533718 480 0 FreeSans 1400 90 0 0 la_data_in[115]
+port 179 nsew
+flabel metal2 s 537152 -800 537264 480 0 FreeSans 1400 90 0 0 la_data_in[116]
+port 180 nsew
+flabel metal2 s 540698 -800 540810 480 0 FreeSans 1400 90 0 0 la_data_in[117]
+port 181 nsew
+flabel metal2 s 544244 -800 544356 480 0 FreeSans 1400 90 0 0 la_data_in[118]
+port 182 nsew
+flabel metal2 s 547790 -800 547902 480 0 FreeSans 1400 90 0 0 la_data_in[119]
+port 183 nsew
+flabel metal2 s 164822 -800 164934 480 0 FreeSans 1400 90 0 0 la_data_in[11]
+port 184 nsew
+flabel metal2 s 551336 -800 551448 480 0 FreeSans 1400 90 0 0 la_data_in[120]
+port 185 nsew
+flabel metal2 s 554882 -800 554994 480 0 FreeSans 1400 90 0 0 la_data_in[121]
+port 186 nsew
+flabel metal2 s 558428 -800 558540 480 0 FreeSans 1400 90 0 0 la_data_in[122]
+port 187 nsew
+flabel metal2 s 561974 -800 562086 480 0 FreeSans 1400 90 0 0 la_data_in[123]
+port 188 nsew
+flabel metal2 s 565520 -800 565632 480 0 FreeSans 1400 90 0 0 la_data_in[124]
+port 189 nsew
+flabel metal2 s 569066 -800 569178 480 0 FreeSans 1400 90 0 0 la_data_in[125]
+port 190 nsew
+flabel metal2 s 572612 -800 572724 480 0 FreeSans 1400 90 0 0 la_data_in[126]
+port 191 nsew
+flabel metal2 s 576158 -800 576270 480 0 FreeSans 1400 90 0 0 la_data_in[127]
+port 192 nsew
+flabel metal2 s 168368 -800 168480 480 0 FreeSans 1400 90 0 0 la_data_in[12]
+port 193 nsew
+flabel metal2 s 171914 -800 172026 480 0 FreeSans 1400 90 0 0 la_data_in[13]
+port 194 nsew
+flabel metal2 s 175460 -800 175572 480 0 FreeSans 1400 90 0 0 la_data_in[14]
+port 195 nsew
+flabel metal2 s 179006 -800 179118 480 0 FreeSans 1400 90 0 0 la_data_in[15]
+port 196 nsew
+flabel metal2 s 182552 -800 182664 480 0 FreeSans 1400 90 0 0 la_data_in[16]
+port 197 nsew
+flabel metal2 s 186098 -800 186210 480 0 FreeSans 1400 90 0 0 la_data_in[17]
+port 198 nsew
+flabel metal2 s 189644 -800 189756 480 0 FreeSans 1400 90 0 0 la_data_in[18]
+port 199 nsew
+flabel metal2 s 193190 -800 193302 480 0 FreeSans 1400 90 0 0 la_data_in[19]
+port 200 nsew
+flabel metal2 s 129362 -800 129474 480 0 FreeSans 1400 90 0 0 la_data_in[1]
+port 201 nsew
+flabel metal2 s 196736 -800 196848 480 0 FreeSans 1400 90 0 0 la_data_in[20]
+port 202 nsew
+flabel metal2 s 200282 -800 200394 480 0 FreeSans 1400 90 0 0 la_data_in[21]
+port 203 nsew
+flabel metal2 s 203828 -800 203940 480 0 FreeSans 1400 90 0 0 la_data_in[22]
+port 204 nsew
+flabel metal2 s 207374 -800 207486 480 0 FreeSans 1400 90 0 0 la_data_in[23]
+port 205 nsew
+flabel metal2 s 210920 -800 211032 480 0 FreeSans 1400 90 0 0 la_data_in[24]
+port 206 nsew
+flabel metal2 s 214466 -800 214578 480 0 FreeSans 1400 90 0 0 la_data_in[25]
+port 207 nsew
+flabel metal2 s 218012 -800 218124 480 0 FreeSans 1400 90 0 0 la_data_in[26]
+port 208 nsew
+flabel metal2 s 221558 -800 221670 480 0 FreeSans 1400 90 0 0 la_data_in[27]
+port 209 nsew
+flabel metal2 s 225104 -800 225216 480 0 FreeSans 1400 90 0 0 la_data_in[28]
+port 210 nsew
+flabel metal2 s 228650 -800 228762 480 0 FreeSans 1400 90 0 0 la_data_in[29]
+port 211 nsew
+flabel metal2 s 132908 -800 133020 480 0 FreeSans 1400 90 0 0 la_data_in[2]
+port 212 nsew
+flabel metal2 s 232196 -800 232308 480 0 FreeSans 1400 90 0 0 la_data_in[30]
+port 213 nsew
+flabel metal2 s 235742 -800 235854 480 0 FreeSans 1400 90 0 0 la_data_in[31]
+port 214 nsew
+flabel metal2 s 239288 -800 239400 480 0 FreeSans 1400 90 0 0 la_data_in[32]
+port 215 nsew
+flabel metal2 s 242834 -800 242946 480 0 FreeSans 1400 90 0 0 la_data_in[33]
+port 216 nsew
+flabel metal2 s 246380 -800 246492 480 0 FreeSans 1400 90 0 0 la_data_in[34]
+port 217 nsew
+flabel metal2 s 249926 -800 250038 480 0 FreeSans 1400 90 0 0 la_data_in[35]
+port 218 nsew
+flabel metal2 s 253472 -800 253584 480 0 FreeSans 1400 90 0 0 la_data_in[36]
+port 219 nsew
+flabel metal2 s 257018 -800 257130 480 0 FreeSans 1400 90 0 0 la_data_in[37]
+port 220 nsew
+flabel metal2 s 260564 -800 260676 480 0 FreeSans 1400 90 0 0 la_data_in[38]
+port 221 nsew
+flabel metal2 s 264110 -800 264222 480 0 FreeSans 1400 90 0 0 la_data_in[39]
+port 222 nsew
+flabel metal2 s 136454 -800 136566 480 0 FreeSans 1400 90 0 0 la_data_in[3]
+port 223 nsew
+flabel metal2 s 267656 -800 267768 480 0 FreeSans 1400 90 0 0 la_data_in[40]
+port 224 nsew
+flabel metal2 s 271202 -800 271314 480 0 FreeSans 1400 90 0 0 la_data_in[41]
+port 225 nsew
+flabel metal2 s 274748 -800 274860 480 0 FreeSans 1400 90 0 0 la_data_in[42]
+port 226 nsew
+flabel metal2 s 278294 -800 278406 480 0 FreeSans 1400 90 0 0 la_data_in[43]
+port 227 nsew
+flabel metal2 s 281840 -800 281952 480 0 FreeSans 1400 90 0 0 la_data_in[44]
+port 228 nsew
+flabel metal2 s 285386 -800 285498 480 0 FreeSans 1400 90 0 0 la_data_in[45]
+port 229 nsew
+flabel metal2 s 288932 -800 289044 480 0 FreeSans 1400 90 0 0 la_data_in[46]
+port 230 nsew
+flabel metal2 s 292478 -800 292590 480 0 FreeSans 1400 90 0 0 la_data_in[47]
+port 231 nsew
+flabel metal2 s 296024 -800 296136 480 0 FreeSans 1400 90 0 0 la_data_in[48]
+port 232 nsew
+flabel metal2 s 299570 -800 299682 480 0 FreeSans 1400 90 0 0 la_data_in[49]
+port 233 nsew
+flabel metal2 s 140000 -800 140112 480 0 FreeSans 1400 90 0 0 la_data_in[4]
+port 234 nsew
+flabel metal2 s 303116 -800 303228 480 0 FreeSans 1400 90 0 0 la_data_in[50]
+port 235 nsew
+flabel metal2 s 306662 -800 306774 480 0 FreeSans 1400 90 0 0 la_data_in[51]
+port 236 nsew
+flabel metal2 s 310208 -800 310320 480 0 FreeSans 1400 90 0 0 la_data_in[52]
+port 237 nsew
+flabel metal2 s 313754 -800 313866 480 0 FreeSans 1400 90 0 0 la_data_in[53]
+port 238 nsew
+flabel metal2 s 317300 -800 317412 480 0 FreeSans 1400 90 0 0 la_data_in[54]
+port 239 nsew
+flabel metal2 s 320846 -800 320958 480 0 FreeSans 1400 90 0 0 la_data_in[55]
+port 240 nsew
+flabel metal2 s 324392 -800 324504 480 0 FreeSans 1400 90 0 0 la_data_in[56]
+port 241 nsew
+flabel metal2 s 327938 -800 328050 480 0 FreeSans 1400 90 0 0 la_data_in[57]
+port 242 nsew
+flabel metal2 s 331484 -800 331596 480 0 FreeSans 1400 90 0 0 la_data_in[58]
+port 243 nsew
+flabel metal2 s 335030 -800 335142 480 0 FreeSans 1400 90 0 0 la_data_in[59]
+port 244 nsew
+flabel metal2 s 143546 -800 143658 480 0 FreeSans 1400 90 0 0 la_data_in[5]
+port 245 nsew
+flabel metal2 s 338576 -800 338688 480 0 FreeSans 1400 90 0 0 la_data_in[60]
+port 246 nsew
+flabel metal2 s 342122 -800 342234 480 0 FreeSans 1400 90 0 0 la_data_in[61]
+port 247 nsew
+flabel metal2 s 345668 -800 345780 480 0 FreeSans 1400 90 0 0 la_data_in[62]
+port 248 nsew
+flabel metal2 s 349214 -800 349326 480 0 FreeSans 1400 90 0 0 la_data_in[63]
+port 249 nsew
+flabel metal2 s 352760 -800 352872 480 0 FreeSans 1400 90 0 0 la_data_in[64]
+port 250 nsew
+flabel metal2 s 356306 -800 356418 480 0 FreeSans 1400 90 0 0 la_data_in[65]
+port 251 nsew
+flabel metal2 s 359852 -800 359964 480 0 FreeSans 1400 90 0 0 la_data_in[66]
+port 252 nsew
+flabel metal2 s 363398 -800 363510 480 0 FreeSans 1400 90 0 0 la_data_in[67]
+port 253 nsew
+flabel metal2 s 366944 -800 367056 480 0 FreeSans 1400 90 0 0 la_data_in[68]
+port 254 nsew
+flabel metal2 s 370490 -800 370602 480 0 FreeSans 1400 90 0 0 la_data_in[69]
+port 255 nsew
+flabel metal2 s 147092 -800 147204 480 0 FreeSans 1400 90 0 0 la_data_in[6]
+port 256 nsew
+flabel metal2 s 374036 -800 374148 480 0 FreeSans 1400 90 0 0 la_data_in[70]
+port 257 nsew
+flabel metal2 s 377582 -800 377694 480 0 FreeSans 1400 90 0 0 la_data_in[71]
+port 258 nsew
+flabel metal2 s 381128 -800 381240 480 0 FreeSans 1400 90 0 0 la_data_in[72]
+port 259 nsew
+flabel metal2 s 384674 -800 384786 480 0 FreeSans 1400 90 0 0 la_data_in[73]
+port 260 nsew
+flabel metal2 s 388220 -800 388332 480 0 FreeSans 1400 90 0 0 la_data_in[74]
+port 261 nsew
+flabel metal2 s 391766 -800 391878 480 0 FreeSans 1400 90 0 0 la_data_in[75]
+port 262 nsew
+flabel metal2 s 395312 -800 395424 480 0 FreeSans 1400 90 0 0 la_data_in[76]
+port 263 nsew
+flabel metal2 s 398858 -800 398970 480 0 FreeSans 1400 90 0 0 la_data_in[77]
+port 264 nsew
+flabel metal2 s 402404 -800 402516 480 0 FreeSans 1400 90 0 0 la_data_in[78]
+port 265 nsew
+flabel metal2 s 405950 -800 406062 480 0 FreeSans 1400 90 0 0 la_data_in[79]
+port 266 nsew
+flabel metal2 s 150638 -800 150750 480 0 FreeSans 1400 90 0 0 la_data_in[7]
+port 267 nsew
+flabel metal2 s 409496 -800 409608 480 0 FreeSans 1400 90 0 0 la_data_in[80]
+port 268 nsew
+flabel metal2 s 413042 -800 413154 480 0 FreeSans 1400 90 0 0 la_data_in[81]
+port 269 nsew
+flabel metal2 s 416588 -800 416700 480 0 FreeSans 1400 90 0 0 la_data_in[82]
+port 270 nsew
+flabel metal2 s 420134 -800 420246 480 0 FreeSans 1400 90 0 0 la_data_in[83]
+port 271 nsew
+flabel metal2 s 423680 -800 423792 480 0 FreeSans 1400 90 0 0 la_data_in[84]
+port 272 nsew
+flabel metal2 s 427226 -800 427338 480 0 FreeSans 1400 90 0 0 la_data_in[85]
+port 273 nsew
+flabel metal2 s 430772 -800 430884 480 0 FreeSans 1400 90 0 0 la_data_in[86]
+port 274 nsew
+flabel metal2 s 434318 -800 434430 480 0 FreeSans 1400 90 0 0 la_data_in[87]
+port 275 nsew
+flabel metal2 s 437864 -800 437976 480 0 FreeSans 1400 90 0 0 la_data_in[88]
+port 276 nsew
+flabel metal2 s 441410 -800 441522 480 0 FreeSans 1400 90 0 0 la_data_in[89]
+port 277 nsew
+flabel metal2 s 154184 -800 154296 480 0 FreeSans 1400 90 0 0 la_data_in[8]
+port 278 nsew
+flabel metal2 s 444956 -800 445068 480 0 FreeSans 1400 90 0 0 la_data_in[90]
+port 279 nsew
+flabel metal2 s 448502 -800 448614 480 0 FreeSans 1400 90 0 0 la_data_in[91]
+port 280 nsew
+flabel metal2 s 452048 -800 452160 480 0 FreeSans 1400 90 0 0 la_data_in[92]
+port 281 nsew
+flabel metal2 s 455594 -800 455706 480 0 FreeSans 1400 90 0 0 la_data_in[93]
+port 282 nsew
+flabel metal2 s 459140 -800 459252 480 0 FreeSans 1400 90 0 0 la_data_in[94]
+port 283 nsew
+flabel metal2 s 462686 -800 462798 480 0 FreeSans 1400 90 0 0 la_data_in[95]
+port 284 nsew
+flabel metal2 s 466232 -800 466344 480 0 FreeSans 1400 90 0 0 la_data_in[96]
+port 285 nsew
+flabel metal2 s 469778 -800 469890 480 0 FreeSans 1400 90 0 0 la_data_in[97]
+port 286 nsew
+flabel metal2 s 473324 -800 473436 480 0 FreeSans 1400 90 0 0 la_data_in[98]
+port 287 nsew
+flabel metal2 s 476870 -800 476982 480 0 FreeSans 1400 90 0 0 la_data_in[99]
+port 288 nsew
+flabel metal2 s 157730 -800 157842 480 0 FreeSans 1400 90 0 0 la_data_in[9]
+port 289 nsew
+flabel metal2 s 126998 -800 127110 480 0 FreeSans 1400 90 0 0 la_data_out[0]
+port 290 nsew
+flabel metal2 s 481598 -800 481710 480 0 FreeSans 1400 90 0 0 la_data_out[100]
+port 291 nsew
+flabel metal2 s 485144 -800 485256 480 0 FreeSans 1400 90 0 0 la_data_out[101]
+port 292 nsew
+flabel metal2 s 488690 -800 488802 480 0 FreeSans 1400 90 0 0 la_data_out[102]
+port 293 nsew
+flabel metal2 s 492236 -800 492348 480 0 FreeSans 1400 90 0 0 la_data_out[103]
+port 294 nsew
+flabel metal2 s 495782 -800 495894 480 0 FreeSans 1400 90 0 0 la_data_out[104]
+port 295 nsew
+flabel metal2 s 499328 -800 499440 480 0 FreeSans 1400 90 0 0 la_data_out[105]
+port 296 nsew
+flabel metal2 s 502874 -800 502986 480 0 FreeSans 1400 90 0 0 la_data_out[106]
+port 297 nsew
+flabel metal2 s 506420 -800 506532 480 0 FreeSans 1400 90 0 0 la_data_out[107]
+port 298 nsew
+flabel metal2 s 509966 -800 510078 480 0 FreeSans 1400 90 0 0 la_data_out[108]
+port 299 nsew
+flabel metal2 s 513512 -800 513624 480 0 FreeSans 1400 90 0 0 la_data_out[109]
+port 300 nsew
+flabel metal2 s 162458 -800 162570 480 0 FreeSans 1400 90 0 0 la_data_out[10]
+port 301 nsew
+flabel metal2 s 517058 -800 517170 480 0 FreeSans 1400 90 0 0 la_data_out[110]
+port 302 nsew
+flabel metal2 s 520604 -800 520716 480 0 FreeSans 1400 90 0 0 la_data_out[111]
+port 303 nsew
+flabel metal2 s 524150 -800 524262 480 0 FreeSans 1400 90 0 0 la_data_out[112]
+port 304 nsew
+flabel metal2 s 527696 -800 527808 480 0 FreeSans 1400 90 0 0 la_data_out[113]
+port 305 nsew
+flabel metal2 s 531242 -800 531354 480 0 FreeSans 1400 90 0 0 la_data_out[114]
+port 306 nsew
+flabel metal2 s 534788 -800 534900 480 0 FreeSans 1400 90 0 0 la_data_out[115]
+port 307 nsew
+flabel metal2 s 538334 -800 538446 480 0 FreeSans 1400 90 0 0 la_data_out[116]
+port 308 nsew
+flabel metal2 s 541880 -800 541992 480 0 FreeSans 1400 90 0 0 la_data_out[117]
+port 309 nsew
+flabel metal2 s 545426 -800 545538 480 0 FreeSans 1400 90 0 0 la_data_out[118]
+port 310 nsew
+flabel metal2 s 548972 -800 549084 480 0 FreeSans 1400 90 0 0 la_data_out[119]
+port 311 nsew
+flabel metal2 s 166004 -800 166116 480 0 FreeSans 1400 90 0 0 la_data_out[11]
+port 312 nsew
+flabel metal2 s 552518 -800 552630 480 0 FreeSans 1400 90 0 0 la_data_out[120]
+port 313 nsew
+flabel metal2 s 556064 -800 556176 480 0 FreeSans 1400 90 0 0 la_data_out[121]
+port 314 nsew
+flabel metal2 s 559610 -800 559722 480 0 FreeSans 1400 90 0 0 la_data_out[122]
+port 315 nsew
+flabel metal2 s 563156 -800 563268 480 0 FreeSans 1400 90 0 0 la_data_out[123]
+port 316 nsew
+flabel metal2 s 566702 -800 566814 480 0 FreeSans 1400 90 0 0 la_data_out[124]
+port 317 nsew
+flabel metal2 s 570248 -800 570360 480 0 FreeSans 1400 90 0 0 la_data_out[125]
+port 318 nsew
+flabel metal2 s 573794 -800 573906 480 0 FreeSans 1400 90 0 0 la_data_out[126]
+port 319 nsew
+flabel metal2 s 577340 -800 577452 480 0 FreeSans 1400 90 0 0 la_data_out[127]
+port 320 nsew
+flabel metal2 s 169550 -800 169662 480 0 FreeSans 1400 90 0 0 la_data_out[12]
+port 321 nsew
+flabel metal2 s 173096 -800 173208 480 0 FreeSans 1400 90 0 0 la_data_out[13]
+port 322 nsew
+flabel metal2 s 176642 -800 176754 480 0 FreeSans 1400 90 0 0 la_data_out[14]
+port 323 nsew
+flabel metal2 s 180188 -800 180300 480 0 FreeSans 1400 90 0 0 la_data_out[15]
+port 324 nsew
+flabel metal2 s 183734 -800 183846 480 0 FreeSans 1400 90 0 0 la_data_out[16]
+port 325 nsew
+flabel metal2 s 187280 -800 187392 480 0 FreeSans 1400 90 0 0 la_data_out[17]
+port 326 nsew
+flabel metal2 s 190826 -800 190938 480 0 FreeSans 1400 90 0 0 la_data_out[18]
+port 327 nsew
+flabel metal2 s 194372 -800 194484 480 0 FreeSans 1400 90 0 0 la_data_out[19]
+port 328 nsew
+flabel metal2 s 130544 -800 130656 480 0 FreeSans 1400 90 0 0 la_data_out[1]
+port 329 nsew
+flabel metal2 s 197918 -800 198030 480 0 FreeSans 1400 90 0 0 la_data_out[20]
+port 330 nsew
+flabel metal2 s 201464 -800 201576 480 0 FreeSans 1400 90 0 0 la_data_out[21]
+port 331 nsew
+flabel metal2 s 205010 -800 205122 480 0 FreeSans 1400 90 0 0 la_data_out[22]
+port 332 nsew
+flabel metal2 s 208556 -800 208668 480 0 FreeSans 1400 90 0 0 la_data_out[23]
+port 333 nsew
+flabel metal2 s 212102 -800 212214 480 0 FreeSans 1400 90 0 0 la_data_out[24]
+port 334 nsew
+flabel metal2 s 215648 -800 215760 480 0 FreeSans 1400 90 0 0 la_data_out[25]
+port 335 nsew
+flabel metal2 s 219194 -800 219306 480 0 FreeSans 1400 90 0 0 la_data_out[26]
+port 336 nsew
+flabel metal2 s 222740 -800 222852 480 0 FreeSans 1400 90 0 0 la_data_out[27]
+port 337 nsew
+flabel metal2 s 226286 -800 226398 480 0 FreeSans 1400 90 0 0 la_data_out[28]
+port 338 nsew
+flabel metal2 s 229832 -800 229944 480 0 FreeSans 1400 90 0 0 la_data_out[29]
+port 339 nsew
+flabel metal2 s 134090 -800 134202 480 0 FreeSans 1400 90 0 0 la_data_out[2]
+port 340 nsew
+flabel metal2 s 233378 -800 233490 480 0 FreeSans 1400 90 0 0 la_data_out[30]
+port 341 nsew
+flabel metal2 s 236924 -800 237036 480 0 FreeSans 1400 90 0 0 la_data_out[31]
+port 342 nsew
+flabel metal2 s 240470 -800 240582 480 0 FreeSans 1400 90 0 0 la_data_out[32]
+port 343 nsew
+flabel metal2 s 244016 -800 244128 480 0 FreeSans 1400 90 0 0 la_data_out[33]
+port 344 nsew
+flabel metal2 s 247562 -800 247674 480 0 FreeSans 1400 90 0 0 la_data_out[34]
+port 345 nsew
+flabel metal2 s 251108 -800 251220 480 0 FreeSans 1400 90 0 0 la_data_out[35]
+port 346 nsew
+flabel metal2 s 254654 -800 254766 480 0 FreeSans 1400 90 0 0 la_data_out[36]
+port 347 nsew
+flabel metal2 s 258200 -800 258312 480 0 FreeSans 1400 90 0 0 la_data_out[37]
+port 348 nsew
+flabel metal2 s 261746 -800 261858 480 0 FreeSans 1400 90 0 0 la_data_out[38]
+port 349 nsew
+flabel metal2 s 265292 -800 265404 480 0 FreeSans 1400 90 0 0 la_data_out[39]
+port 350 nsew
+flabel metal2 s 137636 -800 137748 480 0 FreeSans 1400 90 0 0 la_data_out[3]
+port 351 nsew
+flabel metal2 s 268838 -800 268950 480 0 FreeSans 1400 90 0 0 la_data_out[40]
+port 352 nsew
+flabel metal2 s 272384 -800 272496 480 0 FreeSans 1400 90 0 0 la_data_out[41]
+port 353 nsew
+flabel metal2 s 275930 -800 276042 480 0 FreeSans 1400 90 0 0 la_data_out[42]
+port 354 nsew
+flabel metal2 s 279476 -800 279588 480 0 FreeSans 1400 90 0 0 la_data_out[43]
+port 355 nsew
+flabel metal2 s 283022 -800 283134 480 0 FreeSans 1400 90 0 0 la_data_out[44]
+port 356 nsew
+flabel metal2 s 286568 -800 286680 480 0 FreeSans 1400 90 0 0 la_data_out[45]
+port 357 nsew
+flabel metal2 s 290114 -800 290226 480 0 FreeSans 1400 90 0 0 la_data_out[46]
+port 358 nsew
+flabel metal2 s 293660 -800 293772 480 0 FreeSans 1400 90 0 0 la_data_out[47]
+port 359 nsew
+flabel metal2 s 297206 -800 297318 480 0 FreeSans 1400 90 0 0 la_data_out[48]
+port 360 nsew
+flabel metal2 s 300752 -800 300864 480 0 FreeSans 1400 90 0 0 la_data_out[49]
+port 361 nsew
+flabel metal2 s 141182 -800 141294 480 0 FreeSans 1400 90 0 0 la_data_out[4]
+port 362 nsew
+flabel metal2 s 304298 -800 304410 480 0 FreeSans 1400 90 0 0 la_data_out[50]
+port 363 nsew
+flabel metal2 s 307844 -800 307956 480 0 FreeSans 1400 90 0 0 la_data_out[51]
+port 364 nsew
+flabel metal2 s 311390 -800 311502 480 0 FreeSans 1400 90 0 0 la_data_out[52]
+port 365 nsew
+flabel metal2 s 314936 -800 315048 480 0 FreeSans 1400 90 0 0 la_data_out[53]
+port 366 nsew
+flabel metal2 s 318482 -800 318594 480 0 FreeSans 1400 90 0 0 la_data_out[54]
+port 367 nsew
+flabel metal2 s 322028 -800 322140 480 0 FreeSans 1400 90 0 0 la_data_out[55]
+port 368 nsew
+flabel metal2 s 325574 -800 325686 480 0 FreeSans 1400 90 0 0 la_data_out[56]
+port 369 nsew
+flabel metal2 s 329120 -800 329232 480 0 FreeSans 1400 90 0 0 la_data_out[57]
+port 370 nsew
+flabel metal2 s 332666 -800 332778 480 0 FreeSans 1400 90 0 0 la_data_out[58]
+port 371 nsew
+flabel metal2 s 336212 -800 336324 480 0 FreeSans 1400 90 0 0 la_data_out[59]
+port 372 nsew
+flabel metal2 s 144728 -800 144840 480 0 FreeSans 1400 90 0 0 la_data_out[5]
+port 373 nsew
+flabel metal2 s 339758 -800 339870 480 0 FreeSans 1400 90 0 0 la_data_out[60]
+port 374 nsew
+flabel metal2 s 343304 -800 343416 480 0 FreeSans 1400 90 0 0 la_data_out[61]
+port 375 nsew
+flabel metal2 s 346850 -800 346962 480 0 FreeSans 1400 90 0 0 la_data_out[62]
+port 376 nsew
+flabel metal2 s 350396 -800 350508 480 0 FreeSans 1400 90 0 0 la_data_out[63]
+port 377 nsew
+flabel metal2 s 353942 -800 354054 480 0 FreeSans 1400 90 0 0 la_data_out[64]
+port 378 nsew
+flabel metal2 s 357488 -800 357600 480 0 FreeSans 1400 90 0 0 la_data_out[65]
+port 379 nsew
+flabel metal2 s 361034 -800 361146 480 0 FreeSans 1400 90 0 0 la_data_out[66]
+port 380 nsew
+flabel metal2 s 364580 -800 364692 480 0 FreeSans 1400 90 0 0 la_data_out[67]
+port 381 nsew
+flabel metal2 s 368126 -800 368238 480 0 FreeSans 1400 90 0 0 la_data_out[68]
+port 382 nsew
+flabel metal2 s 371672 -800 371784 480 0 FreeSans 1400 90 0 0 la_data_out[69]
+port 383 nsew
+flabel metal2 s 148274 -800 148386 480 0 FreeSans 1400 90 0 0 la_data_out[6]
+port 384 nsew
+flabel metal2 s 375218 -800 375330 480 0 FreeSans 1400 90 0 0 la_data_out[70]
+port 385 nsew
+flabel metal2 s 378764 -800 378876 480 0 FreeSans 1400 90 0 0 la_data_out[71]
+port 386 nsew
+flabel metal2 s 382310 -800 382422 480 0 FreeSans 1400 90 0 0 la_data_out[72]
+port 387 nsew
+flabel metal2 s 385856 -800 385968 480 0 FreeSans 1400 90 0 0 la_data_out[73]
+port 388 nsew
+flabel metal2 s 389402 -800 389514 480 0 FreeSans 1400 90 0 0 la_data_out[74]
+port 389 nsew
+flabel metal2 s 392948 -800 393060 480 0 FreeSans 1400 90 0 0 la_data_out[75]
+port 390 nsew
+flabel metal2 s 396494 -800 396606 480 0 FreeSans 1400 90 0 0 la_data_out[76]
+port 391 nsew
+flabel metal2 s 400040 -800 400152 480 0 FreeSans 1400 90 0 0 la_data_out[77]
+port 392 nsew
+flabel metal2 s 403586 -800 403698 480 0 FreeSans 1400 90 0 0 la_data_out[78]
+port 393 nsew
+flabel metal2 s 407132 -800 407244 480 0 FreeSans 1400 90 0 0 la_data_out[79]
+port 394 nsew
+flabel metal2 s 151820 -800 151932 480 0 FreeSans 1400 90 0 0 la_data_out[7]
+port 395 nsew
+flabel metal2 s 410678 -800 410790 480 0 FreeSans 1400 90 0 0 la_data_out[80]
+port 396 nsew
+flabel metal2 s 414224 -800 414336 480 0 FreeSans 1400 90 0 0 la_data_out[81]
+port 397 nsew
+flabel metal2 s 417770 -800 417882 480 0 FreeSans 1400 90 0 0 la_data_out[82]
+port 398 nsew
+flabel metal2 s 421316 -800 421428 480 0 FreeSans 1400 90 0 0 la_data_out[83]
+port 399 nsew
+flabel metal2 s 424862 -800 424974 480 0 FreeSans 1400 90 0 0 la_data_out[84]
+port 400 nsew
+flabel metal2 s 428408 -800 428520 480 0 FreeSans 1400 90 0 0 la_data_out[85]
+port 401 nsew
+flabel metal2 s 431954 -800 432066 480 0 FreeSans 1400 90 0 0 la_data_out[86]
+port 402 nsew
+flabel metal2 s 435500 -800 435612 480 0 FreeSans 1400 90 0 0 la_data_out[87]
+port 403 nsew
+flabel metal2 s 439046 -800 439158 480 0 FreeSans 1400 90 0 0 la_data_out[88]
+port 404 nsew
+flabel metal2 s 442592 -800 442704 480 0 FreeSans 1400 90 0 0 la_data_out[89]
+port 405 nsew
+flabel metal2 s 155366 -800 155478 480 0 FreeSans 1400 90 0 0 la_data_out[8]
+port 406 nsew
+flabel metal2 s 446138 -800 446250 480 0 FreeSans 1400 90 0 0 la_data_out[90]
+port 407 nsew
+flabel metal2 s 449684 -800 449796 480 0 FreeSans 1400 90 0 0 la_data_out[91]
+port 408 nsew
+flabel metal2 s 453230 -800 453342 480 0 FreeSans 1400 90 0 0 la_data_out[92]
+port 409 nsew
+flabel metal2 s 456776 -800 456888 480 0 FreeSans 1400 90 0 0 la_data_out[93]
+port 410 nsew
+flabel metal2 s 460322 -800 460434 480 0 FreeSans 1400 90 0 0 la_data_out[94]
+port 411 nsew
+flabel metal2 s 463868 -800 463980 480 0 FreeSans 1400 90 0 0 la_data_out[95]
+port 412 nsew
+flabel metal2 s 467414 -800 467526 480 0 FreeSans 1400 90 0 0 la_data_out[96]
+port 413 nsew
+flabel metal2 s 470960 -800 471072 480 0 FreeSans 1400 90 0 0 la_data_out[97]
+port 414 nsew
+flabel metal2 s 474506 -800 474618 480 0 FreeSans 1400 90 0 0 la_data_out[98]
+port 415 nsew
+flabel metal2 s 478052 -800 478164 480 0 FreeSans 1400 90 0 0 la_data_out[99]
+port 416 nsew
+flabel metal2 s 158912 -800 159024 480 0 FreeSans 1400 90 0 0 la_data_out[9]
+port 417 nsew
+flabel metal2 s 128180 -800 128292 480 0 FreeSans 1400 90 0 0 la_oenb[0]
+port 418 nsew
+flabel metal2 s 482780 -800 482892 480 0 FreeSans 1400 90 0 0 la_oenb[100]
+port 419 nsew
+flabel metal2 s 486326 -800 486438 480 0 FreeSans 1400 90 0 0 la_oenb[101]
+port 420 nsew
+flabel metal2 s 489872 -800 489984 480 0 FreeSans 1400 90 0 0 la_oenb[102]
+port 421 nsew
+flabel metal2 s 493418 -800 493530 480 0 FreeSans 1400 90 0 0 la_oenb[103]
+port 422 nsew
+flabel metal2 s 496964 -800 497076 480 0 FreeSans 1400 90 0 0 la_oenb[104]
+port 423 nsew
+flabel metal2 s 500510 -800 500622 480 0 FreeSans 1400 90 0 0 la_oenb[105]
+port 424 nsew
+flabel metal2 s 504056 -800 504168 480 0 FreeSans 1400 90 0 0 la_oenb[106]
+port 425 nsew
+flabel metal2 s 507602 -800 507714 480 0 FreeSans 1400 90 0 0 la_oenb[107]
+port 426 nsew
+flabel metal2 s 511148 -800 511260 480 0 FreeSans 1400 90 0 0 la_oenb[108]
+port 427 nsew
+flabel metal2 s 514694 -800 514806 480 0 FreeSans 1400 90 0 0 la_oenb[109]
+port 428 nsew
+flabel metal2 s 163640 -800 163752 480 0 FreeSans 1400 90 0 0 la_oenb[10]
+port 429 nsew
+flabel metal2 s 518240 -800 518352 480 0 FreeSans 1400 90 0 0 la_oenb[110]
+port 430 nsew
+flabel metal2 s 521786 -800 521898 480 0 FreeSans 1400 90 0 0 la_oenb[111]
+port 431 nsew
+flabel metal2 s 525332 -800 525444 480 0 FreeSans 1400 90 0 0 la_oenb[112]
+port 432 nsew
+flabel metal2 s 528878 -800 528990 480 0 FreeSans 1400 90 0 0 la_oenb[113]
+port 433 nsew
+flabel metal2 s 532424 -800 532536 480 0 FreeSans 1400 90 0 0 la_oenb[114]
+port 434 nsew
+flabel metal2 s 535970 -800 536082 480 0 FreeSans 1400 90 0 0 la_oenb[115]
+port 435 nsew
+flabel metal2 s 539516 -800 539628 480 0 FreeSans 1400 90 0 0 la_oenb[116]
+port 436 nsew
+flabel metal2 s 543062 -800 543174 480 0 FreeSans 1400 90 0 0 la_oenb[117]
+port 437 nsew
+flabel metal2 s 546608 -800 546720 480 0 FreeSans 1400 90 0 0 la_oenb[118]
+port 438 nsew
+flabel metal2 s 550154 -800 550266 480 0 FreeSans 1400 90 0 0 la_oenb[119]
+port 439 nsew
+flabel metal2 s 167186 -800 167298 480 0 FreeSans 1400 90 0 0 la_oenb[11]
+port 440 nsew
+flabel metal2 s 553700 -800 553812 480 0 FreeSans 1400 90 0 0 la_oenb[120]
+port 441 nsew
+flabel metal2 s 557246 -800 557358 480 0 FreeSans 1400 90 0 0 la_oenb[121]
+port 442 nsew
+flabel metal2 s 560792 -800 560904 480 0 FreeSans 1400 90 0 0 la_oenb[122]
+port 443 nsew
+flabel metal2 s 564338 -800 564450 480 0 FreeSans 1400 90 0 0 la_oenb[123]
+port 444 nsew
+flabel metal2 s 567884 -800 567996 480 0 FreeSans 1400 90 0 0 la_oenb[124]
+port 445 nsew
+flabel metal2 s 571430 -800 571542 480 0 FreeSans 1400 90 0 0 la_oenb[125]
+port 446 nsew
+flabel metal2 s 574976 -800 575088 480 0 FreeSans 1400 90 0 0 la_oenb[126]
+port 447 nsew
+flabel metal2 s 578522 -800 578634 480 0 FreeSans 1400 90 0 0 la_oenb[127]
+port 448 nsew
+flabel metal2 s 170732 -800 170844 480 0 FreeSans 1400 90 0 0 la_oenb[12]
+port 449 nsew
+flabel metal2 s 174278 -800 174390 480 0 FreeSans 1400 90 0 0 la_oenb[13]
+port 450 nsew
+flabel metal2 s 177824 -800 177936 480 0 FreeSans 1400 90 0 0 la_oenb[14]
+port 451 nsew
+flabel metal2 s 181370 -800 181482 480 0 FreeSans 1400 90 0 0 la_oenb[15]
+port 452 nsew
+flabel metal2 s 184916 -800 185028 480 0 FreeSans 1400 90 0 0 la_oenb[16]
+port 453 nsew
+flabel metal2 s 188462 -800 188574 480 0 FreeSans 1400 90 0 0 la_oenb[17]
+port 454 nsew
+flabel metal2 s 192008 -800 192120 480 0 FreeSans 1400 90 0 0 la_oenb[18]
+port 455 nsew
+flabel metal2 s 195554 -800 195666 480 0 FreeSans 1400 90 0 0 la_oenb[19]
+port 456 nsew
+flabel metal2 s 131726 -800 131838 480 0 FreeSans 1400 90 0 0 la_oenb[1]
+port 457 nsew
+flabel metal2 s 199100 -800 199212 480 0 FreeSans 1400 90 0 0 la_oenb[20]
+port 458 nsew
+flabel metal2 s 202646 -800 202758 480 0 FreeSans 1400 90 0 0 la_oenb[21]
+port 459 nsew
+flabel metal2 s 206192 -800 206304 480 0 FreeSans 1400 90 0 0 la_oenb[22]
+port 460 nsew
+flabel metal2 s 209738 -800 209850 480 0 FreeSans 1400 90 0 0 la_oenb[23]
+port 461 nsew
+flabel metal2 s 213284 -800 213396 480 0 FreeSans 1400 90 0 0 la_oenb[24]
+port 462 nsew
+flabel metal2 s 216830 -800 216942 480 0 FreeSans 1400 90 0 0 la_oenb[25]
+port 463 nsew
+flabel metal2 s 220376 -800 220488 480 0 FreeSans 1400 90 0 0 la_oenb[26]
+port 464 nsew
+flabel metal2 s 223922 -800 224034 480 0 FreeSans 1400 90 0 0 la_oenb[27]
+port 465 nsew
+flabel metal2 s 227468 -800 227580 480 0 FreeSans 1400 90 0 0 la_oenb[28]
+port 466 nsew
+flabel metal2 s 231014 -800 231126 480 0 FreeSans 1400 90 0 0 la_oenb[29]
+port 467 nsew
+flabel metal2 s 135272 -800 135384 480 0 FreeSans 1400 90 0 0 la_oenb[2]
+port 468 nsew
+flabel metal2 s 234560 -800 234672 480 0 FreeSans 1400 90 0 0 la_oenb[30]
+port 469 nsew
+flabel metal2 s 238106 -800 238218 480 0 FreeSans 1400 90 0 0 la_oenb[31]
+port 470 nsew
+flabel metal2 s 241652 -800 241764 480 0 FreeSans 1400 90 0 0 la_oenb[32]
+port 471 nsew
+flabel metal2 s 245198 -800 245310 480 0 FreeSans 1400 90 0 0 la_oenb[33]
+port 472 nsew
+flabel metal2 s 248744 -800 248856 480 0 FreeSans 1400 90 0 0 la_oenb[34]
+port 473 nsew
+flabel metal2 s 252290 -800 252402 480 0 FreeSans 1400 90 0 0 la_oenb[35]
+port 474 nsew
+flabel metal2 s 255836 -800 255948 480 0 FreeSans 1400 90 0 0 la_oenb[36]
+port 475 nsew
+flabel metal2 s 259382 -800 259494 480 0 FreeSans 1400 90 0 0 la_oenb[37]
+port 476 nsew
+flabel metal2 s 262928 -800 263040 480 0 FreeSans 1400 90 0 0 la_oenb[38]
+port 477 nsew
+flabel metal2 s 266474 -800 266586 480 0 FreeSans 1400 90 0 0 la_oenb[39]
+port 478 nsew
+flabel metal2 s 138818 -800 138930 480 0 FreeSans 1400 90 0 0 la_oenb[3]
+port 479 nsew
+flabel metal2 s 270020 -800 270132 480 0 FreeSans 1400 90 0 0 la_oenb[40]
+port 480 nsew
+flabel metal2 s 273566 -800 273678 480 0 FreeSans 1400 90 0 0 la_oenb[41]
+port 481 nsew
+flabel metal2 s 277112 -800 277224 480 0 FreeSans 1400 90 0 0 la_oenb[42]
+port 482 nsew
+flabel metal2 s 280658 -800 280770 480 0 FreeSans 1400 90 0 0 la_oenb[43]
+port 483 nsew
+flabel metal2 s 284204 -800 284316 480 0 FreeSans 1400 90 0 0 la_oenb[44]
+port 484 nsew
+flabel metal2 s 287750 -800 287862 480 0 FreeSans 1400 90 0 0 la_oenb[45]
+port 485 nsew
+flabel metal2 s 291296 -800 291408 480 0 FreeSans 1400 90 0 0 la_oenb[46]
+port 486 nsew
+flabel metal2 s 294842 -800 294954 480 0 FreeSans 1400 90 0 0 la_oenb[47]
+port 487 nsew
+flabel metal2 s 298388 -800 298500 480 0 FreeSans 1400 90 0 0 la_oenb[48]
+port 488 nsew
+flabel metal2 s 301934 -800 302046 480 0 FreeSans 1400 90 0 0 la_oenb[49]
+port 489 nsew
+flabel metal2 s 142364 -800 142476 480 0 FreeSans 1400 90 0 0 la_oenb[4]
+port 490 nsew
+flabel metal2 s 305480 -800 305592 480 0 FreeSans 1400 90 0 0 la_oenb[50]
+port 491 nsew
+flabel metal2 s 309026 -800 309138 480 0 FreeSans 1400 90 0 0 la_oenb[51]
+port 492 nsew
+flabel metal2 s 312572 -800 312684 480 0 FreeSans 1400 90 0 0 la_oenb[52]
+port 493 nsew
+flabel metal2 s 316118 -800 316230 480 0 FreeSans 1400 90 0 0 la_oenb[53]
+port 494 nsew
+flabel metal2 s 319664 -800 319776 480 0 FreeSans 1400 90 0 0 la_oenb[54]
+port 495 nsew
+flabel metal2 s 323210 -800 323322 480 0 FreeSans 1400 90 0 0 la_oenb[55]
+port 496 nsew
+flabel metal2 s 326756 -800 326868 480 0 FreeSans 1400 90 0 0 la_oenb[56]
+port 497 nsew
+flabel metal2 s 330302 -800 330414 480 0 FreeSans 1400 90 0 0 la_oenb[57]
+port 498 nsew
+flabel metal2 s 333848 -800 333960 480 0 FreeSans 1400 90 0 0 la_oenb[58]
+port 499 nsew
+flabel metal2 s 337394 -800 337506 480 0 FreeSans 1400 90 0 0 la_oenb[59]
+port 500 nsew
+flabel metal2 s 145910 -800 146022 480 0 FreeSans 1400 90 0 0 la_oenb[5]
+port 501 nsew
+flabel metal2 s 340940 -800 341052 480 0 FreeSans 1400 90 0 0 la_oenb[60]
+port 502 nsew
+flabel metal2 s 344486 -800 344598 480 0 FreeSans 1400 90 0 0 la_oenb[61]
+port 503 nsew
+flabel metal2 s 348032 -800 348144 480 0 FreeSans 1400 90 0 0 la_oenb[62]
+port 504 nsew
+flabel metal2 s 351578 -800 351690 480 0 FreeSans 1400 90 0 0 la_oenb[63]
+port 505 nsew
+flabel metal2 s 355124 -800 355236 480 0 FreeSans 1400 90 0 0 la_oenb[64]
+port 506 nsew
+flabel metal2 s 358670 -800 358782 480 0 FreeSans 1400 90 0 0 la_oenb[65]
+port 507 nsew
+flabel metal2 s 362216 -800 362328 480 0 FreeSans 1400 90 0 0 la_oenb[66]
+port 508 nsew
+flabel metal2 s 365762 -800 365874 480 0 FreeSans 1400 90 0 0 la_oenb[67]
+port 509 nsew
+flabel metal2 s 369308 -800 369420 480 0 FreeSans 1400 90 0 0 la_oenb[68]
+port 510 nsew
+flabel metal2 s 372854 -800 372966 480 0 FreeSans 1400 90 0 0 la_oenb[69]
+port 511 nsew
+flabel metal2 s 149456 -800 149568 480 0 FreeSans 1400 90 0 0 la_oenb[6]
+port 512 nsew
+flabel metal2 s 376400 -800 376512 480 0 FreeSans 1400 90 0 0 la_oenb[70]
+port 513 nsew
+flabel metal2 s 379946 -800 380058 480 0 FreeSans 1400 90 0 0 la_oenb[71]
+port 514 nsew
+flabel metal2 s 383492 -800 383604 480 0 FreeSans 1400 90 0 0 la_oenb[72]
+port 515 nsew
+flabel metal2 s 387038 -800 387150 480 0 FreeSans 1400 90 0 0 la_oenb[73]
+port 516 nsew
+flabel metal2 s 390584 -800 390696 480 0 FreeSans 1400 90 0 0 la_oenb[74]
+port 517 nsew
+flabel metal2 s 394130 -800 394242 480 0 FreeSans 1400 90 0 0 la_oenb[75]
+port 518 nsew
+flabel metal2 s 397676 -800 397788 480 0 FreeSans 1400 90 0 0 la_oenb[76]
+port 519 nsew
+flabel metal2 s 401222 -800 401334 480 0 FreeSans 1400 90 0 0 la_oenb[77]
+port 520 nsew
+flabel metal2 s 404768 -800 404880 480 0 FreeSans 1400 90 0 0 la_oenb[78]
+port 521 nsew
+flabel metal2 s 408314 -800 408426 480 0 FreeSans 1400 90 0 0 la_oenb[79]
+port 522 nsew
+flabel metal2 s 153002 -800 153114 480 0 FreeSans 1400 90 0 0 la_oenb[7]
+port 523 nsew
+flabel metal2 s 411860 -800 411972 480 0 FreeSans 1400 90 0 0 la_oenb[80]
+port 524 nsew
+flabel metal2 s 415406 -800 415518 480 0 FreeSans 1400 90 0 0 la_oenb[81]
+port 525 nsew
+flabel metal2 s 418952 -800 419064 480 0 FreeSans 1400 90 0 0 la_oenb[82]
+port 526 nsew
+flabel metal2 s 422498 -800 422610 480 0 FreeSans 1400 90 0 0 la_oenb[83]
+port 527 nsew
+flabel metal2 s 426044 -800 426156 480 0 FreeSans 1400 90 0 0 la_oenb[84]
+port 528 nsew
+flabel metal2 s 429590 -800 429702 480 0 FreeSans 1400 90 0 0 la_oenb[85]
+port 529 nsew
+flabel metal2 s 433136 -800 433248 480 0 FreeSans 1400 90 0 0 la_oenb[86]
+port 530 nsew
+flabel metal2 s 436682 -800 436794 480 0 FreeSans 1400 90 0 0 la_oenb[87]
+port 531 nsew
+flabel metal2 s 440228 -800 440340 480 0 FreeSans 1400 90 0 0 la_oenb[88]
+port 532 nsew
+flabel metal2 s 443774 -800 443886 480 0 FreeSans 1400 90 0 0 la_oenb[89]
+port 533 nsew
+flabel metal2 s 156548 -800 156660 480 0 FreeSans 1400 90 0 0 la_oenb[8]
+port 534 nsew
+flabel metal2 s 447320 -800 447432 480 0 FreeSans 1400 90 0 0 la_oenb[90]
+port 535 nsew
+flabel metal2 s 450866 -800 450978 480 0 FreeSans 1400 90 0 0 la_oenb[91]
+port 536 nsew
+flabel metal2 s 454412 -800 454524 480 0 FreeSans 1400 90 0 0 la_oenb[92]
+port 537 nsew
+flabel metal2 s 457958 -800 458070 480 0 FreeSans 1400 90 0 0 la_oenb[93]
+port 538 nsew
+flabel metal2 s 461504 -800 461616 480 0 FreeSans 1400 90 0 0 la_oenb[94]
+port 539 nsew
+flabel metal2 s 465050 -800 465162 480 0 FreeSans 1400 90 0 0 la_oenb[95]
+port 540 nsew
+flabel metal2 s 468596 -800 468708 480 0 FreeSans 1400 90 0 0 la_oenb[96]
+port 541 nsew
+flabel metal2 s 472142 -800 472254 480 0 FreeSans 1400 90 0 0 la_oenb[97]
+port 542 nsew
+flabel metal2 s 475688 -800 475800 480 0 FreeSans 1400 90 0 0 la_oenb[98]
+port 543 nsew
+flabel metal2 s 479234 -800 479346 480 0 FreeSans 1400 90 0 0 la_oenb[99]
+port 544 nsew
+flabel metal2 s 160094 -800 160206 480 0 FreeSans 1400 90 0 0 la_oenb[9]
+port 545 nsew
+flabel metal2 s 579704 -800 579816 480 0 FreeSans 1400 90 0 0 user_clock2
+port 546 nsew
+flabel metal2 s 580886 -800 580998 480 0 FreeSans 1400 90 0 0 user_irq[0]
+port 547 nsew
+flabel metal2 s 582068 -800 582180 480 0 FreeSans 1400 90 0 0 user_irq[1]
+port 548 nsew
+flabel metal2 s 583250 -800 583362 480 0 FreeSans 1400 90 0 0 user_irq[2]
+port 549 nsew
+flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1400 0 0 0 vccd1
+port 550 nsew
+flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1400 0 0 0 vccd1
+port 550 nsew
+flabel metal3 s 0 643842 1660 648642 0 FreeSans 1400 0 0 0 vccd2
+port 551 nsew
+flabel metal3 s 0 633842 1660 638642 0 FreeSans 1400 0 0 0 vccd2
+port 551 nsew
+flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 0 204888 1660 209688 0 FreeSans 1400 0 0 0 vdda2
+port 553 nsew
+flabel metal3 s 0 214888 1660 219688 0 FreeSans 1400 0 0 0 vdda2
+port 553 nsew
+flabel metal3 s 520594 702340 525394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 554 nsew
+flabel metal3 s 510594 702340 515394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 554 nsew
+flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1400 0 0 0 vssa1
+port 554 nsew
+flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1400 0 0 0 vssa1
+port 554 nsew
+flabel metal3 s 0 559442 1660 564242 0 FreeSans 1400 0 0 0 vssa2
+port 555 nsew
+flabel metal3 s 0 549442 1660 554242 0 FreeSans 1400 0 0 0 vssa2
+port 555 nsew
+flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1400 0 0 0 vssd1
+port 556 nsew
+flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1400 0 0 0 vssd1
+port 556 nsew
+flabel metal3 s 0 172888 1660 177688 0 FreeSans 1400 0 0 0 vssd2
+port 557 nsew
+flabel metal3 s 0 162888 1660 167688 0 FreeSans 1400 0 0 0 vssd2
+port 557 nsew
+flabel metal2 s 524 -800 636 480 0 FreeSans 1400 90 0 0 wb_clk_i
+port 558 nsew
+flabel metal2 s 1706 -800 1818 480 0 FreeSans 1400 90 0 0 wb_rst_i
+port 559 nsew
+flabel metal2 s 2888 -800 3000 480 0 FreeSans 1400 90 0 0 wbs_ack_o
+port 560 nsew
+flabel metal2 s 7616 -800 7728 480 0 FreeSans 1400 90 0 0 wbs_adr_i[0]
+port 561 nsew
+flabel metal2 s 47804 -800 47916 480 0 FreeSans 1400 90 0 0 wbs_adr_i[10]
+port 562 nsew
+flabel metal2 s 51350 -800 51462 480 0 FreeSans 1400 90 0 0 wbs_adr_i[11]
+port 563 nsew
+flabel metal2 s 54896 -800 55008 480 0 FreeSans 1400 90 0 0 wbs_adr_i[12]
+port 564 nsew
+flabel metal2 s 58442 -800 58554 480 0 FreeSans 1400 90 0 0 wbs_adr_i[13]
+port 565 nsew
+flabel metal2 s 61988 -800 62100 480 0 FreeSans 1400 90 0 0 wbs_adr_i[14]
+port 566 nsew
+flabel metal2 s 65534 -800 65646 480 0 FreeSans 1400 90 0 0 wbs_adr_i[15]
+port 567 nsew
+flabel metal2 s 69080 -800 69192 480 0 FreeSans 1400 90 0 0 wbs_adr_i[16]
+port 568 nsew
+flabel metal2 s 72626 -800 72738 480 0 FreeSans 1400 90 0 0 wbs_adr_i[17]
+port 569 nsew
+flabel metal2 s 76172 -800 76284 480 0 FreeSans 1400 90 0 0 wbs_adr_i[18]
+port 570 nsew
+flabel metal2 s 79718 -800 79830 480 0 FreeSans 1400 90 0 0 wbs_adr_i[19]
+port 571 nsew
+flabel metal2 s 12344 -800 12456 480 0 FreeSans 1400 90 0 0 wbs_adr_i[1]
+port 572 nsew
+flabel metal2 s 83264 -800 83376 480 0 FreeSans 1400 90 0 0 wbs_adr_i[20]
+port 573 nsew
+flabel metal2 s 86810 -800 86922 480 0 FreeSans 1400 90 0 0 wbs_adr_i[21]
+port 574 nsew
+flabel metal2 s 90356 -800 90468 480 0 FreeSans 1400 90 0 0 wbs_adr_i[22]
+port 575 nsew
+flabel metal2 s 93902 -800 94014 480 0 FreeSans 1400 90 0 0 wbs_adr_i[23]
+port 576 nsew
+flabel metal2 s 97448 -800 97560 480 0 FreeSans 1400 90 0 0 wbs_adr_i[24]
+port 577 nsew
+flabel metal2 s 100994 -800 101106 480 0 FreeSans 1400 90 0 0 wbs_adr_i[25]
+port 578 nsew
+flabel metal2 s 104540 -800 104652 480 0 FreeSans 1400 90 0 0 wbs_adr_i[26]
+port 579 nsew
+flabel metal2 s 108086 -800 108198 480 0 FreeSans 1400 90 0 0 wbs_adr_i[27]
+port 580 nsew
+flabel metal2 s 111632 -800 111744 480 0 FreeSans 1400 90 0 0 wbs_adr_i[28]
+port 581 nsew
+flabel metal2 s 115178 -800 115290 480 0 FreeSans 1400 90 0 0 wbs_adr_i[29]
+port 582 nsew
+flabel metal2 s 17072 -800 17184 480 0 FreeSans 1400 90 0 0 wbs_adr_i[2]
+port 583 nsew
+flabel metal2 s 118724 -800 118836 480 0 FreeSans 1400 90 0 0 wbs_adr_i[30]
+port 584 nsew
+flabel metal2 s 122270 -800 122382 480 0 FreeSans 1400 90 0 0 wbs_adr_i[31]
+port 585 nsew
+flabel metal2 s 21800 -800 21912 480 0 FreeSans 1400 90 0 0 wbs_adr_i[3]
+port 586 nsew
+flabel metal2 s 26528 -800 26640 480 0 FreeSans 1400 90 0 0 wbs_adr_i[4]
+port 587 nsew
+flabel metal2 s 30074 -800 30186 480 0 FreeSans 1400 90 0 0 wbs_adr_i[5]
+port 588 nsew
+flabel metal2 s 33620 -800 33732 480 0 FreeSans 1400 90 0 0 wbs_adr_i[6]
+port 589 nsew
+flabel metal2 s 37166 -800 37278 480 0 FreeSans 1400 90 0 0 wbs_adr_i[7]
+port 590 nsew
+flabel metal2 s 40712 -800 40824 480 0 FreeSans 1400 90 0 0 wbs_adr_i[8]
+port 591 nsew
+flabel metal2 s 44258 -800 44370 480 0 FreeSans 1400 90 0 0 wbs_adr_i[9]
+port 592 nsew
+flabel metal2 s 4070 -800 4182 480 0 FreeSans 1400 90 0 0 wbs_cyc_i
+port 593 nsew
+flabel metal2 s 8798 -800 8910 480 0 FreeSans 1400 90 0 0 wbs_dat_i[0]
+port 594 nsew
+flabel metal2 s 48986 -800 49098 480 0 FreeSans 1400 90 0 0 wbs_dat_i[10]
+port 595 nsew
+flabel metal2 s 52532 -800 52644 480 0 FreeSans 1400 90 0 0 wbs_dat_i[11]
+port 596 nsew
+flabel metal2 s 56078 -800 56190 480 0 FreeSans 1400 90 0 0 wbs_dat_i[12]
+port 597 nsew
+flabel metal2 s 59624 -800 59736 480 0 FreeSans 1400 90 0 0 wbs_dat_i[13]
+port 598 nsew
+flabel metal2 s 63170 -800 63282 480 0 FreeSans 1400 90 0 0 wbs_dat_i[14]
+port 599 nsew
+flabel metal2 s 66716 -800 66828 480 0 FreeSans 1400 90 0 0 wbs_dat_i[15]
+port 600 nsew
+flabel metal2 s 70262 -800 70374 480 0 FreeSans 1400 90 0 0 wbs_dat_i[16]
+port 601 nsew
+flabel metal2 s 73808 -800 73920 480 0 FreeSans 1400 90 0 0 wbs_dat_i[17]
+port 602 nsew
+flabel metal2 s 77354 -800 77466 480 0 FreeSans 1400 90 0 0 wbs_dat_i[18]
+port 603 nsew
+flabel metal2 s 80900 -800 81012 480 0 FreeSans 1400 90 0 0 wbs_dat_i[19]
+port 604 nsew
+flabel metal2 s 13526 -800 13638 480 0 FreeSans 1400 90 0 0 wbs_dat_i[1]
+port 605 nsew
+flabel metal2 s 84446 -800 84558 480 0 FreeSans 1400 90 0 0 wbs_dat_i[20]
+port 606 nsew
+flabel metal2 s 87992 -800 88104 480 0 FreeSans 1400 90 0 0 wbs_dat_i[21]
+port 607 nsew
+flabel metal2 s 91538 -800 91650 480 0 FreeSans 1400 90 0 0 wbs_dat_i[22]
+port 608 nsew
+flabel metal2 s 95084 -800 95196 480 0 FreeSans 1400 90 0 0 wbs_dat_i[23]
+port 609 nsew
+flabel metal2 s 98630 -800 98742 480 0 FreeSans 1400 90 0 0 wbs_dat_i[24]
+port 610 nsew
+flabel metal2 s 102176 -800 102288 480 0 FreeSans 1400 90 0 0 wbs_dat_i[25]
+port 611 nsew
+flabel metal2 s 105722 -800 105834 480 0 FreeSans 1400 90 0 0 wbs_dat_i[26]
+port 612 nsew
+flabel metal2 s 109268 -800 109380 480 0 FreeSans 1400 90 0 0 wbs_dat_i[27]
+port 613 nsew
+flabel metal2 s 112814 -800 112926 480 0 FreeSans 1400 90 0 0 wbs_dat_i[28]
+port 614 nsew
+flabel metal2 s 116360 -800 116472 480 0 FreeSans 1400 90 0 0 wbs_dat_i[29]
+port 615 nsew
+flabel metal2 s 18254 -800 18366 480 0 FreeSans 1400 90 0 0 wbs_dat_i[2]
+port 616 nsew
+flabel metal2 s 119906 -800 120018 480 0 FreeSans 1400 90 0 0 wbs_dat_i[30]
+port 617 nsew
+flabel metal2 s 123452 -800 123564 480 0 FreeSans 1400 90 0 0 wbs_dat_i[31]
+port 618 nsew
+flabel metal2 s 22982 -800 23094 480 0 FreeSans 1400 90 0 0 wbs_dat_i[3]
+port 619 nsew
+flabel metal2 s 27710 -800 27822 480 0 FreeSans 1400 90 0 0 wbs_dat_i[4]
+port 620 nsew
+flabel metal2 s 31256 -800 31368 480 0 FreeSans 1400 90 0 0 wbs_dat_i[5]
+port 621 nsew
+flabel metal2 s 34802 -800 34914 480 0 FreeSans 1400 90 0 0 wbs_dat_i[6]
+port 622 nsew
+flabel metal2 s 38348 -800 38460 480 0 FreeSans 1400 90 0 0 wbs_dat_i[7]
+port 623 nsew
+flabel metal2 s 41894 -800 42006 480 0 FreeSans 1400 90 0 0 wbs_dat_i[8]
+port 624 nsew
+flabel metal2 s 45440 -800 45552 480 0 FreeSans 1400 90 0 0 wbs_dat_i[9]
+port 625 nsew
+flabel metal2 s 9980 -800 10092 480 0 FreeSans 1400 90 0 0 wbs_dat_o[0]
+port 626 nsew
+flabel metal2 s 50168 -800 50280 480 0 FreeSans 1400 90 0 0 wbs_dat_o[10]
+port 627 nsew
+flabel metal2 s 53714 -800 53826 480 0 FreeSans 1400 90 0 0 wbs_dat_o[11]
+port 628 nsew
+flabel metal2 s 57260 -800 57372 480 0 FreeSans 1400 90 0 0 wbs_dat_o[12]
+port 629 nsew
+flabel metal2 s 60806 -800 60918 480 0 FreeSans 1400 90 0 0 wbs_dat_o[13]
+port 630 nsew
+flabel metal2 s 64352 -800 64464 480 0 FreeSans 1400 90 0 0 wbs_dat_o[14]
+port 631 nsew
+flabel metal2 s 67898 -800 68010 480 0 FreeSans 1400 90 0 0 wbs_dat_o[15]
+port 632 nsew
+flabel metal2 s 71444 -800 71556 480 0 FreeSans 1400 90 0 0 wbs_dat_o[16]
+port 633 nsew
+flabel metal2 s 74990 -800 75102 480 0 FreeSans 1400 90 0 0 wbs_dat_o[17]
+port 634 nsew
+flabel metal2 s 78536 -800 78648 480 0 FreeSans 1400 90 0 0 wbs_dat_o[18]
+port 635 nsew
+flabel metal2 s 82082 -800 82194 480 0 FreeSans 1400 90 0 0 wbs_dat_o[19]
+port 636 nsew
+flabel metal2 s 14708 -800 14820 480 0 FreeSans 1400 90 0 0 wbs_dat_o[1]
+port 637 nsew
+flabel metal2 s 85628 -800 85740 480 0 FreeSans 1400 90 0 0 wbs_dat_o[20]
+port 638 nsew
+flabel metal2 s 89174 -800 89286 480 0 FreeSans 1400 90 0 0 wbs_dat_o[21]
+port 639 nsew
+flabel metal2 s 92720 -800 92832 480 0 FreeSans 1400 90 0 0 wbs_dat_o[22]
+port 640 nsew
+flabel metal2 s 96266 -800 96378 480 0 FreeSans 1400 90 0 0 wbs_dat_o[23]
+port 641 nsew
+flabel metal2 s 99812 -800 99924 480 0 FreeSans 1400 90 0 0 wbs_dat_o[24]
+port 642 nsew
+flabel metal2 s 103358 -800 103470 480 0 FreeSans 1400 90 0 0 wbs_dat_o[25]
+port 643 nsew
+flabel metal2 s 106904 -800 107016 480 0 FreeSans 1400 90 0 0 wbs_dat_o[26]
+port 644 nsew
+flabel metal2 s 110450 -800 110562 480 0 FreeSans 1400 90 0 0 wbs_dat_o[27]
+port 645 nsew
+flabel metal2 s 113996 -800 114108 480 0 FreeSans 1400 90 0 0 wbs_dat_o[28]
+port 646 nsew
+flabel metal2 s 117542 -800 117654 480 0 FreeSans 1400 90 0 0 wbs_dat_o[29]
+port 647 nsew
+flabel metal2 s 19436 -800 19548 480 0 FreeSans 1400 90 0 0 wbs_dat_o[2]
+port 648 nsew
+flabel metal2 s 121088 -800 121200 480 0 FreeSans 1400 90 0 0 wbs_dat_o[30]
+port 649 nsew
+flabel metal2 s 124634 -800 124746 480 0 FreeSans 1400 90 0 0 wbs_dat_o[31]
+port 650 nsew
+flabel metal2 s 24164 -800 24276 480 0 FreeSans 1400 90 0 0 wbs_dat_o[3]
+port 651 nsew
+flabel metal2 s 28892 -800 29004 480 0 FreeSans 1400 90 0 0 wbs_dat_o[4]
+port 652 nsew
+flabel metal2 s 32438 -800 32550 480 0 FreeSans 1400 90 0 0 wbs_dat_o[5]
+port 653 nsew
+flabel metal2 s 35984 -800 36096 480 0 FreeSans 1400 90 0 0 wbs_dat_o[6]
+port 654 nsew
+flabel metal2 s 39530 -800 39642 480 0 FreeSans 1400 90 0 0 wbs_dat_o[7]
+port 655 nsew
+flabel metal2 s 43076 -800 43188 480 0 FreeSans 1400 90 0 0 wbs_dat_o[8]
+port 656 nsew
+flabel metal2 s 46622 -800 46734 480 0 FreeSans 1400 90 0 0 wbs_dat_o[9]
+port 657 nsew
+flabel metal2 s 11162 -800 11274 480 0 FreeSans 1400 90 0 0 wbs_sel_i[0]
+port 658 nsew
+flabel metal2 s 15890 -800 16002 480 0 FreeSans 1400 90 0 0 wbs_sel_i[1]
+port 659 nsew
+flabel metal2 s 20618 -800 20730 480 0 FreeSans 1400 90 0 0 wbs_sel_i[2]
+port 660 nsew
+flabel metal2 s 25346 -800 25458 480 0 FreeSans 1400 90 0 0 wbs_sel_i[3]
+port 661 nsew
+flabel metal2 s 5252 -800 5364 480 0 FreeSans 1400 90 0 0 wbs_stb_i
+port 662 nsew
+flabel metal2 s 6434 -800 6546 480 0 FreeSans 1400 90 0 0 wbs_we_i
+port 663 nsew
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.xor.gds b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.xor.gds
new file mode 100644
index 0000000..11ece12
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper.xor.gds
Binary files differ
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_empty_erased.gds b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..4901f18
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_erased.gds b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_erased.gds
new file mode 100644
index 0000000..c1bc3db
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_erased.gds
Binary files differ
diff --git a/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_no_zero_areas.gds b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_no_zero_areas.gds
new file mode 100644
index 0000000..b049d20
--- /dev/null
+++ b/precheck_results/20_MAR_2022___22_53_12/outputs/user_analog_project_wrapper_no_zero_areas.gds
Binary files differ
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/gds.info b/precheck_results/20_MAR_2022___23_50_15/logs/gds.info
new file mode 100644
index 0000000..e900a95
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/gds.info
@@ -0,0 +1 @@
+user_analog_project_wrapper.gds: 735270981d74439718d4bcd35809d560d980b7ca
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_beol_check.log b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_beol_check.log
new file mode 100644
index 0000000..85aa46f
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_beol_check.log
@@ -0,0 +1,992 @@
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:42: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:107
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+Writing report database: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_beol_check.xml ..
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diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_beol_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_feol_check.log b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_feol_check.log
new file mode 100644
index 0000000..4e2d0d1
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_feol_check.log
@@ -0,0 +1,780 @@
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:36: warning: already initialized constant DRC::DRCEngine::FEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
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diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_feol_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_feol_check.total
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diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_met_min_ca_density_check.log b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_met_min_ca_density_check.log
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diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_met_min_ca_density_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_met_min_ca_density_check.total
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+Writing report database: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 1.730s  Memory: 523.00M
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_offgrid_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..63474e2
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper, output to /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+  deep:true tiled:false threads:4
+--- #err|description, table for cell: user_analog_project_wrapper
+NO-Check ----        pwell:64/44/EMP   122/16/EMP    64/59/EMP    44/16/EMP     44/5/EMP
+         ----        nwell:64/20/EMP    64/16/EMP     64/5/EMP
+         ----         diff:65/20/dat    65/16/EMP     65/6/EMP
+         ----          tap:65/44/dat    65/48/EMP     65/5/EMP
+         ----         poly:66/20/dat    66/16/EMP     66/5/EMP
+         ----       licon1:66/44/dat    66/58/EMP
+         ----          li1:67/20/dat    67/16/EMP     67/5/EMP
+         ----         mcon:67/44/dat    67/48/EMP
+         ----         met1:68/20/dat    68/16/EMP     68/5/EMP
+         ----          via:68/44/dat    68/58/EMP
+         ----         met2:69/20/dat    69/16/EMP     69/5/dat
+         ----         via2:69/44/dat    69/58/EMP
+         ----         met3:70/20/dat    70/16/dat     70/5/dat
+         ----         via3:70/44/dat    70/48/EMP
+         ----         met4:71/20/dat    71/16/EMP     71/5/dat
+         ----         via4:71/44/EMP    71/48/EMP
+         ----         met5:72/20/dat    72/16/EMP     72/5/dat
+         ----          pad:76/20/EMP     76/5/EMP    76/16/EMP
+         ----          pnp:82/44/EMP    82/59/EMP
+         ----          npn:82/20/EMP     82/5/EMP
+         ----          rdl:74/20/EMP    74/16/EMP     74/5/EMP
+         ----     inductor:82/24/EMP    82/25/EMP
+       0 total error(s) among 0 error type(s), 33 checks, cell: user_analog_project_wrapper
+Writing report...
+VmPeak:	 1123828 kB
+VmHWM:	  231260 kB
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_zeroarea_check.log b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..535cc03
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_no_zero_areas.gds
+VmPeak:	  536012 kB
+VmHWM:	  231884 kB
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/klayout_zeroarea_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/magic_drc_check.log b/precheck_results/20_MAR_2022___23_50_15/logs/magic_drc_check.log
new file mode 100644
index 0000000..6a4ba35
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/magic_drc_check.log
@@ -0,0 +1,30 @@
+
+Magic 8.3 revision 265 - Compiled on Tue Feb  8 15:12:01 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130: scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    nnmos obsactive mvobsactive obsli1 obsm1 obsm2 obsm3 obsm4 obsm5 obsmrdl fillblock comment obscomment res0p35 res0p69 res1p41 res2p85 res5p73 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/wisla/mpw_precheck/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__res_xhigh_po_0p35_HDW2JU".
+Reading "detV2".
+Reading "user_analog_project_wrapper".
+[INFO]: Loading user_analog_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+No errors found.
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/magic_drc_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/pdks.info b/precheck_results/20_MAR_2022___23_50_15/logs/pdks.info
new file mode 100644
index 0000000..f6e2777
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 32cdb2097fd9a629c91e8ea33e1f6de08ab25946
+Skywater PDK f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/precheck.log b/precheck_results/20_MAR_2022___23_50_15/logs/precheck.log
new file mode 100644
index 0000000..1dc8c23
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/precheck.log
@@ -0,0 +1,59 @@
+2022-03-20 23:50:15 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog
+2022-03-20 23:50:15 - [INFO] - {{Project Type Info}} analog
+2022-03-20 23:50:15 - [INFO] - {{Project GDS Info}} user_analog_project_wrapper: 735270981d74439718d4bcd35809d560d980b7ca
+2022-03-20 23:50:15 - [INFO] - {{Tools Info}} KLayout: v0.27.7 | Magic: v8.3.265
+2022-03-20 23:50:15 - [INFO] - {{PDKs Info}} Open PDKs: 32cdb2097fd9a629c91e8ea33e1f6de08ab25946 | Skywater PDK: f70d8ca46961ff92719d8870a18a076370b85f6c
+2022-03-20 23:50:15 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in '/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/logs'
+2022-03-20 23:50:15 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-03-20 23:50:15 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-03-20 23:50:16 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog.
+2022-03-20 23:50:16 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-03-20 23:50:17 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog.
+2022-03-20 23:50:18 - [INFO] - An approved LICENSE (Apache-2.0) was found in /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog.
+2022-03-20 23:50:18 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-03-20 23:50:18 - [INFO] - {{SPDX COMPLIANCE CHECK PASSED}} Project is compliant with the SPDX Standard
+2022-03-20 23:50:18 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-03-20 23:50:18 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-03-20 23:50:18 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-03-20 23:50:18 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-03-20 23:50:19 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-03-20 23:50:19 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-03-20 23:50:19 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-03-20 23:50:19 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
+2022-03-20 23:50:20 - [INFO] - HIERARCHY CHECK PASSED: Module user_analog_project_wrapper is instantiated in caravan. 
+2022-03-20 23:50:20 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravan contains at least 8 instances (68 instances). 
+2022-03-20 23:50:20 - [INFO] - MODELING CHECK PASSED: Netlist caravan is structural.
+2022-03-20 23:50:20 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_analog_project_wrapper are correctly connected in the top level netlist caravan.
+2022-03-20 23:50:20 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravan netlist passed all consistency checks.
+2022-03-20 23:50:20 - [INFO] - PORTS CHECK PASSED: Netlist user_analog_project_wrapper ports match the golden wrapper ports
+2022-03-20 23:50:20 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_analog_project_wrapper contains at least 1 instances (1 instances). 
+2022-03-20 23:50:20 - [INFO] - MODELING CHECK PASSED: Netlist user_analog_project_wrapper is structural.
+2022-03-20 23:50:20 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_analog_project_wrapper matches the provided structural netlist.
+2022-03-20 23:50:20 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_analog_project_wrapper netlist passed all consistency checks.
+2022-03-20 23:50:20 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-03-20 23:50:20 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 13: XOR
+2022-03-20 23:50:23 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.xor.gds
+2022-03-20 23:50:23 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-03-20 23:50:23 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
+2022-03-20 23:50:24 - [INFO] - 0 DRC violations
+2022-03-20 23:50:24 - [INFO] - {{MAGIC DRC CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 23:50:24 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 13: Klayout FEOL
+2022-03-20 23:50:27 - [INFO] - No DRC Violations found
+2022-03-20 23:50:27 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 23:50:27 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 13: Klayout BEOL
+2022-03-20 23:50:31 - [INFO] - No DRC Violations found
+2022-03-20 23:50:31 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 23:50:31 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 13: Klayout Offgrid
+2022-03-20 23:50:33 - [INFO] - No DRC Violations found
+2022-03-20 23:50:33 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 23:50:33 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density
+2022-03-20 23:50:35 - [INFO] - No DRC Violations found
+2022-03-20 23:50:35 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 23:50:35 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 13: Klayout Pin Label Purposes Overlapping Drawing
+2022-03-20 23:50:36 - [INFO] - No DRC Violations found
+2022-03-20 23:50:36 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 23:50:36 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 13: Klayout ZeroArea
+2022-03-20 23:50:38 - [INFO] - No DRC Violations found
+2022-03-20 23:50:38 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_analog_project_wrapper.gds, has no DRC violations.
+2022-03-20 23:50:38 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in '/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/logs'
+2022-03-20 23:50:38 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/tools.info b/precheck_results/20_MAR_2022___23_50_15/logs/tools.info
new file mode 100644
index 0000000..b904646
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.7
+Magic: 8.3.265
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/xor_check.log b/precheck_results/20_MAR_2022___23_50_15/logs/xor_check.log
new file mode 100644
index 0000000..52ffbad
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/xor_check.log
@@ -0,0 +1,162 @@
+Reading file /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/gds/user_analog_project_wrapper.gds for cell user_analog_project_wrapper
+dbu=0.001
+cell user_analog_project_wrapper dbu-bbox(ll;ur)=(-4000,-4000;2924000,3524000)
+cell user_analog_project_wrapper dbu-bbox(left,bottom,right,top)=(-4000,-4000,2924000,3524000)
+cell user_analog_project_wrapper dbu-size(width,height)=(2928000,3528000)
+cell user_analog_project_wrapper micron-bbox(left,bottom,right,top)=(-4.0,-4.0,2924.0,3524.0)
+cell user_analog_project_wrapper micron-size(width,height)=(2928.0,3528.0)
+Done.
+
+Magic 8.3 revision 265 - Compiled on Tue Feb  8 15:12:01 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130: scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    nnmos obsactive mvobsactive obsli1 obsm1 obsm2 obsm3 obsm4 obsm5 obsmrdl fillblock comment obscomment res0p35 res0p69 res1p41 res2p85 res5p73 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/wisla/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+The current style is "sky130".
+The CIF input styles are: sky130, vendorimport, waffleimport, rdlimport.
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_analog_project_wrapper
+Reading "sky130_fd_pr__res_xhigh_po_0p35_HDW2JU".
+Reading "detV2".
+Reading "user_analog_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+
+Magic 8.3 revision 265 - Compiled on Tue Feb  8 15:12:01 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130: scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    nnmos obsactive mvobsactive obsli1 obsm1 obsm2 obsm3 obsm4 obsm5 obsmrdl fillblock comment obscomment res0p35 res0p69 res1p41 res2p85 res5p73 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/home/wisla/mpw_precheck/checks/xor_check/erase_box.tcl" from command line.
+"sky130(vendor)" is not one of the CIF input styles Magic knows.
+The current style is "sky130".
+The CIF input styles are: sky130, vendorimport, waffleimport, rdlimport.
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_analog_project_wrapper_empty
+Reading "user_analog_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+Reading /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_erased.gds ..
+Reading /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 494 (flat)  494 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 494 (flat)  494 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 184 (flat)  184 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 184 (flat)  184 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 6 (flat)  6 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 6 (flat)  6 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 521.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 521.00M
+Writing layout file: /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.xor.gds ..
+Total elapsed: 0.110s  Memory: 521.00M
diff --git a/precheck_results/20_MAR_2022___23_50_15/logs/xor_check.total b/precheck_results/20_MAR_2022___23_50_15/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_beol_check.xml b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..766c2e9
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_feol_check.xml b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..46dfa5b
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,363 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_met_min_ca_density_check.xml b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..77c069a
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_offgrid_check.xml b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..c1192d7
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/offgrid.lydrc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>dnwell_angle</name>
+   <description>x.3a : non 45 degree angle dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_angle</name>
+   <description>x.3a : non 45 degree angle nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_angle</name>
+   <description>x.3a : non 45 degree angle pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_angle</name>
+   <description>x.3a : non 45 degree angle pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_angle</name>
+   <description>x.3a : non 45 degree angle hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_angle</name>
+   <description>x.3a : non 45 degree angle hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_angle</name>
+   <description>x.3a : non 45 degree angle lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_angle</name>
+   <description>x.3a : non 45 degree angle ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2 : non 90 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2c : non 45 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2 : non 90 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2c : non 45 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_angle</name>
+   <description>x.3a : non 45 degree angle tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_angle</name>
+   <description>x.2 : non 90 degree angle poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_angle</name>
+   <description>x.3a : non 45 degree angle rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_angle</name>
+   <description>x.3a : non 45 degree angle npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_angle</name>
+   <description>x.3a : non 45 degree angle nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_angle</name>
+   <description>x.3a : non 45 degree angle psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_angle</name>
+   <description>x.2 : non 90 degree angle licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_angle</name>
+   <description>x.3a : non 45 degree angle li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_angle</name>
+   <description>x.2 : non 90 degree angle mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_angle</name>
+   <description>x.3a : non 45 degree angle vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_angle</name>
+   <description>x.3a : non 45 degree angle m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_angle</name>
+   <description>x.2 : non 90 degree angle via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_angle</name>
+   <description>x.3a : non 45 degree angle m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_angle</name>
+   <description>x.2 : non 90 degree angle via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_angle</name>
+   <description>x.3a : non 45 degree angle m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_angle</name>
+   <description>x.2 : non 90 degree angle via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_angle</name>
+   <description>x.3a : non 45 degree angle nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_angle</name>
+   <description>x.3a : non 45 degree angle m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_angle</name>
+   <description>x.2 : non 90 degree angle via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_angle</name>
+   <description>x.3a : non 45 degree angle m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_angle</name>
+   <description>x.3a : non 45 degree angle pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_angle</name>
+   <description>x.2 : non 90 degree angle mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_angle</name>
+   <description>x.3a : non 45 degree angle hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_angle</name>
+   <description>x.3a : non 45 degree angle hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_angle</name>
+   <description>x.3a : non 45 degree angle vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_angle</name>
+   <description>x.3a : non 45 degree angle uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_angle</name>
+   <description>x.3a : non 45 degree angle pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>areaid_re_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on areaid.re</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..52f5a1c
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/gds/user_analog_project_wrapper.gds, topcell=user_analog_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_zeroarea_check.xml b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..bd39db2
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/home/wisla/mpw_precheck/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_analog_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_analog_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.drc.report b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..829b9d5
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,5 @@
+user_analog_project_wrapper
+----------------------------------------
+[INFO]: COUNT: 0
+[INFO]: Should be divided by 3 or 4
+
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.rdb b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..8a882f3
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,2 @@
+$user_analog_project_wrapper
+ 100
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.tcl b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.tcl
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.tr b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.tr
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.xml b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..7161d7c
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,10 @@
+<?xml version="1.0" ?>
+<report-database>
+    <categories/>
+    <cells>
+        <cell>
+            <name>user_analog_project_wrapper</name>
+        </cell>
+    </cells>
+    <items/>
+</report-database>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.magic.drc.mag b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.magic.drc.mag
new file mode 100644
index 0000000..2c2d44f
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,2207 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1647820224
+<< checkpaint >>
+rect -4732 -4732 588732 708732
+<< locali >>
+rect 442020 542442 444020 554994
+rect 442002 541994 444020 542442
+rect 442002 541765 444016 541994
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+rect 443583 540579 444016 541765
+rect 442002 539980 444016 540579
+<< viali >>
+rect 442325 540579 443583 541765
+<< metal1 >>
+rect 511014 678467 515022 679048
+rect 442008 677996 444008 678240
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+rect 442002 541765 444016 542442
+rect 442002 540579 442325 541765
+rect 443583 540579 444016 541765
+rect 442002 539980 444016 540579
+<< via1 >>
+rect 511949 676495 514049 678467
+rect 442352 540602 443556 541742
+<< metal2 >>
+rect 511014 678469 515022 679048
+rect 511014 676493 511931 678469
+rect 514067 676493 515022 678469
+rect 511014 675962 515022 676493
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+rect 329294 702300 334294 704800
+rect 499990 668678 501990 669004
+rect 414996 667139 416990 668038
+rect 414996 664995 415507 667139
+rect 416531 664995 416990 667139
+rect 414996 663978 416990 664995
+rect 499990 667334 500323 668678
+rect 501667 667334 501990 668678
+rect 414994 548238 416994 663978
+rect 467006 649288 469006 650004
+rect 467006 646584 467490 649288
+rect 468434 647988 469006 649288
+rect 468434 646584 469010 647988
+rect 467006 646004 469010 646584
+rect 467010 579988 469004 646004
+rect 499990 610278 501990 667334
+rect 499990 609004 501996 610278
+rect 414994 547982 417044 548238
+rect 427434 547982 429434 555982
+rect 414994 545982 429434 547982
+rect 450004 547988 452004 555988
+rect 467010 547988 469010 579988
+rect 499996 556056 501996 609004
+rect 499996 551970 502018 556056
+rect 450004 545988 469010 547988
+rect 466008 545980 467016 545988
+rect 500018 542558 502018 551970
+rect 442002 541994 444016 542442
+rect 500016 542056 502018 542558
+rect 500016 541996 502000 542056
+rect 461000 541994 502000 541996
+rect 442002 541764 502000 541994
+rect 442002 540580 442322 541764
+rect 443586 540580 502000 541764
+rect 442002 539996 502000 540580
+rect 442002 539994 462020 539996
+rect 442002 539980 444016 539994
+<< metal5 >>
+rect 165594 702300 170594 704800
+rect 175894 702300 180894 704800
+rect 217294 702300 222294 704800
+rect 227594 702300 232594 704800
+rect 318994 702300 323994 704800
+rect 329294 702300 334294 704800
+use detV2  detV2_0
+timestamp 1647787158
+transform 1 0 488900 0 1 581290
+box -64974 -26942 -25500 -2992
+<< labels >>
+flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1400 0 0 0 gpio_analog[0]
+port 1 nsew
+flabel metal3 s -800 381864 480 381976 0 FreeSans 1400 0 0 0 gpio_analog[10]
+port 2 nsew
+flabel metal3 s -800 338642 480 338754 0 FreeSans 1400 0 0 0 gpio_analog[11]
+port 3 nsew
+flabel metal3 s -800 295420 480 295532 0 FreeSans 1400 0 0 0 gpio_analog[12]
+port 4 nsew
+flabel metal3 s -800 252398 480 252510 0 FreeSans 1400 0 0 0 gpio_analog[13]
+port 5 nsew
+flabel metal3 s -800 124776 480 124888 0 FreeSans 1400 0 0 0 gpio_analog[14]
+port 6 nsew
+flabel metal3 s -800 81554 480 81666 0 FreeSans 1400 0 0 0 gpio_analog[15]
+port 7 nsew
+flabel metal3 s -800 38332 480 38444 0 FreeSans 1400 0 0 0 gpio_analog[16]
+port 8 nsew
+flabel metal3 s -800 16910 480 17022 0 FreeSans 1400 0 0 0 gpio_analog[17]
+port 9 nsew
+flabel metal3 s 583520 313652 584800 313764 0 FreeSans 1400 0 0 0 gpio_analog[1]
+port 10 nsew
+flabel metal3 s 583520 358874 584800 358986 0 FreeSans 1400 0 0 0 gpio_analog[2]
+port 11 nsew
+flabel metal3 s 583520 405296 584800 405408 0 FreeSans 1400 0 0 0 gpio_analog[3]
+port 12 nsew
+flabel metal3 s 583520 449718 584800 449830 0 FreeSans 1400 0 0 0 gpio_analog[4]
+port 13 nsew
+flabel metal3 s 583520 494140 584800 494252 0 FreeSans 1400 0 0 0 gpio_analog[5]
+port 14 nsew
+flabel metal3 s 583520 583562 584800 583674 0 FreeSans 1400 0 0 0 gpio_analog[6]
+port 15 nsew
+flabel metal3 s -800 511530 480 511642 0 FreeSans 1400 0 0 0 gpio_analog[7]
+port 16 nsew
+flabel metal3 s -800 468308 480 468420 0 FreeSans 1400 0 0 0 gpio_analog[8]
+port 17 nsew
+flabel metal3 s -800 425086 480 425198 0 FreeSans 1400 0 0 0 gpio_analog[9]
+port 18 nsew
+flabel metal3 s 583520 270412 584800 270524 0 FreeSans 1400 0 0 0 gpio_noesd[0]
+port 19 nsew
+flabel metal3 s -800 380682 480 380794 0 FreeSans 1400 0 0 0 gpio_noesd[10]
+port 20 nsew
+flabel metal3 s -800 337460 480 337572 0 FreeSans 1400 0 0 0 gpio_noesd[11]
+port 21 nsew
+flabel metal3 s -800 294238 480 294350 0 FreeSans 1400 0 0 0 gpio_noesd[12]
+port 22 nsew
+flabel metal3 s -800 251216 480 251328 0 FreeSans 1400 0 0 0 gpio_noesd[13]
+port 23 nsew
+flabel metal3 s -800 123594 480 123706 0 FreeSans 1400 0 0 0 gpio_noesd[14]
+port 24 nsew
+flabel metal3 s -800 80372 480 80484 0 FreeSans 1400 0 0 0 gpio_noesd[15]
+port 25 nsew
+flabel metal3 s -800 37150 480 37262 0 FreeSans 1400 0 0 0 gpio_noesd[16]
+port 26 nsew
+flabel metal3 s -800 15728 480 15840 0 FreeSans 1400 0 0 0 gpio_noesd[17]
+port 27 nsew
+flabel metal3 s 583520 314834 584800 314946 0 FreeSans 1400 0 0 0 gpio_noesd[1]
+port 28 nsew
+flabel metal3 s 583520 360056 584800 360168 0 FreeSans 1400 0 0 0 gpio_noesd[2]
+port 29 nsew
+flabel metal3 s 583520 406478 584800 406590 0 FreeSans 1400 0 0 0 gpio_noesd[3]
+port 30 nsew
+flabel metal3 s 583520 450900 584800 451012 0 FreeSans 1400 0 0 0 gpio_noesd[4]
+port 31 nsew
+flabel metal3 s 583520 495322 584800 495434 0 FreeSans 1400 0 0 0 gpio_noesd[5]
+port 32 nsew
+flabel metal3 s 583520 584744 584800 584856 0 FreeSans 1400 0 0 0 gpio_noesd[6]
+port 33 nsew
+flabel metal3 s -800 510348 480 510460 0 FreeSans 1400 0 0 0 gpio_noesd[7]
+port 34 nsew
+flabel metal3 s -800 467126 480 467238 0 FreeSans 1400 0 0 0 gpio_noesd[8]
+port 35 nsew
+flabel metal3 s -800 423904 480 424016 0 FreeSans 1400 0 0 0 gpio_noesd[9]
+port 36 nsew
+flabel metal3 s 582300 677984 584800 682984 0 FreeSans 1400 0 0 0 io_analog[0]
+port 37 nsew
+flabel metal3 s 0 680242 1700 685242 0 FreeSans 1400 0 0 0 io_analog[10]
+port 38 nsew
+flabel metal3 s 566594 702300 571594 704800 0 FreeSans 2400 180 0 0 io_analog[1]
+port 39 nsew
+flabel metal3 s 465394 702300 470394 704800 0 FreeSans 2400 180 0 0 io_analog[2]
+port 40 nsew
+flabel metal3 s 413394 702300 418394 704800 0 FreeSans 2400 180 0 0 io_analog[3]
+port 41 nsew
+flabel metal3 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal4 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal5 s 329294 702300 334294 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal3 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal4 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal5 s 227594 702300 232594 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal3 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal4 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal5 s 175894 702300 180894 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal3 s 120194 702300 125194 704800 0 FreeSans 2400 180 0 0 io_analog[7]
+port 45 nsew
+flabel metal3 s 68194 702300 73194 704800 0 FreeSans 2400 180 0 0 io_analog[8]
+port 46 nsew
+flabel metal3 s 16194 702300 21194 704800 0 FreeSans 2400 180 0 0 io_analog[9]
+port 47 nsew
+flabel metal3 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal4 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal5 s 318994 702300 323994 704800 0 FreeSans 2400 180 0 0 io_analog[4]
+port 42 nsew
+flabel metal3 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal4 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal5 s 217294 702300 222294 704800 0 FreeSans 2400 180 0 0 io_analog[5]
+port 43 nsew
+flabel metal3 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal4 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal5 s 165594 702300 170594 704800 0 FreeSans 2400 180 0 0 io_analog[6]
+port 44 nsew
+flabel metal3 s 326794 702300 328994 704800 0 FreeSans 2400 180 0 0 io_clamp_high[0]
+port 48 nsew
+flabel metal3 s 225094 702300 227294 704800 0 FreeSans 2400 180 0 0 io_clamp_high[1]
+port 49 nsew
+flabel metal3 s 173394 702300 175594 704800 0 FreeSans 2400 180 0 0 io_clamp_high[2]
+port 50 nsew
+flabel metal3 s 324294 702300 326494 704800 0 FreeSans 2400 180 0 0 io_clamp_low[0]
+port 51 nsew
+flabel metal3 s 222594 702300 224794 704800 0 FreeSans 2400 180 0 0 io_clamp_low[1]
+port 52 nsew
+flabel metal3 s 170894 702300 173094 704800 0 FreeSans 2400 180 0 0 io_clamp_low[2]
+port 53 nsew
+flabel metal3 s 583520 2726 584800 2838 0 FreeSans 1400 0 0 0 io_in[0]
+port 54 nsew
+flabel metal3 s 583520 408842 584800 408954 0 FreeSans 1400 0 0 0 io_in[10]
+port 55 nsew
+flabel metal3 s 583520 453264 584800 453376 0 FreeSans 1400 0 0 0 io_in[11]
+port 56 nsew
+flabel metal3 s 583520 497686 584800 497798 0 FreeSans 1400 0 0 0 io_in[12]
+port 57 nsew
+flabel metal3 s 583520 587108 584800 587220 0 FreeSans 1400 0 0 0 io_in[13]
+port 58 nsew
+flabel metal3 s -800 507984 480 508096 0 FreeSans 1400 0 0 0 io_in[14]
+port 59 nsew
+flabel metal3 s -800 464762 480 464874 0 FreeSans 1400 0 0 0 io_in[15]
+port 60 nsew
+flabel metal3 s -800 421540 480 421652 0 FreeSans 1400 0 0 0 io_in[16]
+port 61 nsew
+flabel metal3 s -800 378318 480 378430 0 FreeSans 1400 0 0 0 io_in[17]
+port 62 nsew
+flabel metal3 s -800 335096 480 335208 0 FreeSans 1400 0 0 0 io_in[18]
+port 63 nsew
+flabel metal3 s -800 291874 480 291986 0 FreeSans 1400 0 0 0 io_in[19]
+port 64 nsew
+flabel metal3 s 583520 7454 584800 7566 0 FreeSans 1400 0 0 0 io_in[1]
+port 65 nsew
+flabel metal3 s -800 248852 480 248964 0 FreeSans 1400 0 0 0 io_in[20]
+port 66 nsew
+flabel metal3 s -800 121230 480 121342 0 FreeSans 1400 0 0 0 io_in[21]
+port 67 nsew
+flabel metal3 s -800 78008 480 78120 0 FreeSans 1400 0 0 0 io_in[22]
+port 68 nsew
+flabel metal3 s -800 34786 480 34898 0 FreeSans 1400 0 0 0 io_in[23]
+port 69 nsew
+flabel metal3 s -800 13364 480 13476 0 FreeSans 1400 0 0 0 io_in[24]
+port 70 nsew
+flabel metal3 s -800 8636 480 8748 0 FreeSans 1400 0 0 0 io_in[25]
+port 71 nsew
+flabel metal3 s -800 3908 480 4020 0 FreeSans 1400 0 0 0 io_in[26]
+port 72 nsew
+flabel metal3 s 583520 12182 584800 12294 0 FreeSans 1400 0 0 0 io_in[2]
+port 73 nsew
+flabel metal3 s 583520 16910 584800 17022 0 FreeSans 1400 0 0 0 io_in[3]
+port 74 nsew
+flabel metal3 s 583520 21638 584800 21750 0 FreeSans 1400 0 0 0 io_in[4]
+port 75 nsew
+flabel metal3 s 583520 48096 584800 48208 0 FreeSans 1400 0 0 0 io_in[5]
+port 76 nsew
+flabel metal3 s 583520 92754 584800 92866 0 FreeSans 1400 0 0 0 io_in[6]
+port 77 nsew
+flabel metal3 s 583520 272776 584800 272888 0 FreeSans 1400 0 0 0 io_in[7]
+port 78 nsew
+flabel metal3 s 583520 317198 584800 317310 0 FreeSans 1400 0 0 0 io_in[8]
+port 79 nsew
+flabel metal3 s 583520 362420 584800 362532 0 FreeSans 1400 0 0 0 io_in[9]
+port 80 nsew
+flabel metal3 s 583520 1544 584800 1656 0 FreeSans 1400 0 0 0 io_in_3v3[0]
+port 81 nsew
+flabel metal3 s 583520 407660 584800 407772 0 FreeSans 1400 0 0 0 io_in_3v3[10]
+port 82 nsew
+flabel metal3 s 583520 452082 584800 452194 0 FreeSans 1400 0 0 0 io_in_3v3[11]
+port 83 nsew
+flabel metal3 s 583520 496504 584800 496616 0 FreeSans 1400 0 0 0 io_in_3v3[12]
+port 84 nsew
+flabel metal3 s 583520 585926 584800 586038 0 FreeSans 1400 0 0 0 io_in_3v3[13]
+port 85 nsew
+flabel metal3 s -800 509166 480 509278 0 FreeSans 1400 0 0 0 io_in_3v3[14]
+port 86 nsew
+flabel metal3 s -800 465944 480 466056 0 FreeSans 1400 0 0 0 io_in_3v3[15]
+port 87 nsew
+flabel metal3 s -800 422722 480 422834 0 FreeSans 1400 0 0 0 io_in_3v3[16]
+port 88 nsew
+flabel metal3 s -800 379500 480 379612 0 FreeSans 1400 0 0 0 io_in_3v3[17]
+port 89 nsew
+flabel metal3 s -800 336278 480 336390 0 FreeSans 1400 0 0 0 io_in_3v3[18]
+port 90 nsew
+flabel metal3 s -800 293056 480 293168 0 FreeSans 1400 0 0 0 io_in_3v3[19]
+port 91 nsew
+flabel metal3 s 583520 6272 584800 6384 0 FreeSans 1400 0 0 0 io_in_3v3[1]
+port 92 nsew
+flabel metal3 s -800 250034 480 250146 0 FreeSans 1400 0 0 0 io_in_3v3[20]
+port 93 nsew
+flabel metal3 s -800 122412 480 122524 0 FreeSans 1400 0 0 0 io_in_3v3[21]
+port 94 nsew
+flabel metal3 s -800 79190 480 79302 0 FreeSans 1400 0 0 0 io_in_3v3[22]
+port 95 nsew
+flabel metal3 s -800 35968 480 36080 0 FreeSans 1400 0 0 0 io_in_3v3[23]
+port 96 nsew
+flabel metal3 s -800 14546 480 14658 0 FreeSans 1400 0 0 0 io_in_3v3[24]
+port 97 nsew
+flabel metal3 s -800 9818 480 9930 0 FreeSans 1400 0 0 0 io_in_3v3[25]
+port 98 nsew
+flabel metal3 s -800 5090 480 5202 0 FreeSans 1400 0 0 0 io_in_3v3[26]
+port 99 nsew
+flabel metal3 s 583520 11000 584800 11112 0 FreeSans 1400 0 0 0 io_in_3v3[2]
+port 100 nsew
+flabel metal3 s 583520 15728 584800 15840 0 FreeSans 1400 0 0 0 io_in_3v3[3]
+port 101 nsew
+flabel metal3 s 583520 20456 584800 20568 0 FreeSans 1400 0 0 0 io_in_3v3[4]
+port 102 nsew
+flabel metal3 s 583520 46914 584800 47026 0 FreeSans 1400 0 0 0 io_in_3v3[5]
+port 103 nsew
+flabel metal3 s 583520 91572 584800 91684 0 FreeSans 1400 0 0 0 io_in_3v3[6]
+port 104 nsew
+flabel metal3 s 583520 271594 584800 271706 0 FreeSans 1400 0 0 0 io_in_3v3[7]
+port 105 nsew
+flabel metal3 s 583520 316016 584800 316128 0 FreeSans 1400 0 0 0 io_in_3v3[8]
+port 106 nsew
+flabel metal3 s 583520 361238 584800 361350 0 FreeSans 1400 0 0 0 io_in_3v3[9]
+port 107 nsew
+flabel metal3 s 583520 5090 584800 5202 0 FreeSans 1400 0 0 0 io_oeb[0]
+port 108 nsew
+flabel metal3 s 583520 411206 584800 411318 0 FreeSans 1400 0 0 0 io_oeb[10]
+port 109 nsew
+flabel metal3 s 583520 455628 584800 455740 0 FreeSans 1400 0 0 0 io_oeb[11]
+port 110 nsew
+flabel metal3 s 583520 500050 584800 500162 0 FreeSans 1400 0 0 0 io_oeb[12]
+port 111 nsew
+flabel metal3 s 583520 589472 584800 589584 0 FreeSans 1400 0 0 0 io_oeb[13]
+port 112 nsew
+flabel metal3 s -800 505620 480 505732 0 FreeSans 1400 0 0 0 io_oeb[14]
+port 113 nsew
+flabel metal3 s -800 462398 480 462510 0 FreeSans 1400 0 0 0 io_oeb[15]
+port 114 nsew
+flabel metal3 s -800 419176 480 419288 0 FreeSans 1400 0 0 0 io_oeb[16]
+port 115 nsew
+flabel metal3 s -800 375954 480 376066 0 FreeSans 1400 0 0 0 io_oeb[17]
+port 116 nsew
+flabel metal3 s -800 332732 480 332844 0 FreeSans 1400 0 0 0 io_oeb[18]
+port 117 nsew
+flabel metal3 s -800 289510 480 289622 0 FreeSans 1400 0 0 0 io_oeb[19]
+port 118 nsew
+flabel metal3 s 583520 9818 584800 9930 0 FreeSans 1400 0 0 0 io_oeb[1]
+port 119 nsew
+flabel metal3 s -800 246488 480 246600 0 FreeSans 1400 0 0 0 io_oeb[20]
+port 120 nsew
+flabel metal3 s -800 118866 480 118978 0 FreeSans 1400 0 0 0 io_oeb[21]
+port 121 nsew
+flabel metal3 s -800 75644 480 75756 0 FreeSans 1400 0 0 0 io_oeb[22]
+port 122 nsew
+flabel metal3 s -800 32422 480 32534 0 FreeSans 1400 0 0 0 io_oeb[23]
+port 123 nsew
+flabel metal3 s -800 11000 480 11112 0 FreeSans 1400 0 0 0 io_oeb[24]
+port 124 nsew
+flabel metal3 s -800 6272 480 6384 0 FreeSans 1400 0 0 0 io_oeb[25]
+port 125 nsew
+flabel metal3 s -800 1544 480 1656 0 FreeSans 1400 0 0 0 io_oeb[26]
+port 126 nsew
+flabel metal3 s 583520 14546 584800 14658 0 FreeSans 1400 0 0 0 io_oeb[2]
+port 127 nsew
+flabel metal3 s 583520 19274 584800 19386 0 FreeSans 1400 0 0 0 io_oeb[3]
+port 128 nsew
+flabel metal3 s 583520 24002 584800 24114 0 FreeSans 1400 0 0 0 io_oeb[4]
+port 129 nsew
+flabel metal3 s 583520 50460 584800 50572 0 FreeSans 1400 0 0 0 io_oeb[5]
+port 130 nsew
+flabel metal3 s 583520 95118 584800 95230 0 FreeSans 1400 0 0 0 io_oeb[6]
+port 131 nsew
+flabel metal3 s 583520 275140 584800 275252 0 FreeSans 1400 0 0 0 io_oeb[7]
+port 132 nsew
+flabel metal3 s 583520 319562 584800 319674 0 FreeSans 1400 0 0 0 io_oeb[8]
+port 133 nsew
+flabel metal3 s 583520 364784 584800 364896 0 FreeSans 1400 0 0 0 io_oeb[9]
+port 134 nsew
+flabel metal3 s 583520 3908 584800 4020 0 FreeSans 1400 0 0 0 io_out[0]
+port 135 nsew
+flabel metal3 s 583520 410024 584800 410136 0 FreeSans 1400 0 0 0 io_out[10]
+port 136 nsew
+flabel metal3 s 583520 454446 584800 454558 0 FreeSans 1400 0 0 0 io_out[11]
+port 137 nsew
+flabel metal3 s 583520 498868 584800 498980 0 FreeSans 1400 0 0 0 io_out[12]
+port 138 nsew
+flabel metal3 s 583520 588290 584800 588402 0 FreeSans 1400 0 0 0 io_out[13]
+port 139 nsew
+flabel metal3 s -800 506802 480 506914 0 FreeSans 1400 0 0 0 io_out[14]
+port 140 nsew
+flabel metal3 s -800 463580 480 463692 0 FreeSans 1400 0 0 0 io_out[15]
+port 141 nsew
+flabel metal3 s -800 420358 480 420470 0 FreeSans 1400 0 0 0 io_out[16]
+port 142 nsew
+flabel metal3 s -800 377136 480 377248 0 FreeSans 1400 0 0 0 io_out[17]
+port 143 nsew
+flabel metal3 s -800 333914 480 334026 0 FreeSans 1400 0 0 0 io_out[18]
+port 144 nsew
+flabel metal3 s -800 290692 480 290804 0 FreeSans 1400 0 0 0 io_out[19]
+port 145 nsew
+flabel metal3 s 583520 8636 584800 8748 0 FreeSans 1400 0 0 0 io_out[1]
+port 146 nsew
+flabel metal3 s -800 247670 480 247782 0 FreeSans 1400 0 0 0 io_out[20]
+port 147 nsew
+flabel metal3 s -800 120048 480 120160 0 FreeSans 1400 0 0 0 io_out[21]
+port 148 nsew
+flabel metal3 s -800 76826 480 76938 0 FreeSans 1400 0 0 0 io_out[22]
+port 149 nsew
+flabel metal3 s -800 33604 480 33716 0 FreeSans 1400 0 0 0 io_out[23]
+port 150 nsew
+flabel metal3 s -800 12182 480 12294 0 FreeSans 1400 0 0 0 io_out[24]
+port 151 nsew
+flabel metal3 s -800 7454 480 7566 0 FreeSans 1400 0 0 0 io_out[25]
+port 152 nsew
+flabel metal3 s -800 2726 480 2838 0 FreeSans 1400 0 0 0 io_out[26]
+port 153 nsew
+flabel metal3 s 583520 13364 584800 13476 0 FreeSans 1400 0 0 0 io_out[2]
+port 154 nsew
+flabel metal3 s 583520 18092 584800 18204 0 FreeSans 1400 0 0 0 io_out[3]
+port 155 nsew
+flabel metal3 s 583520 22820 584800 22932 0 FreeSans 1400 0 0 0 io_out[4]
+port 156 nsew
+flabel metal3 s 583520 49278 584800 49390 0 FreeSans 1400 0 0 0 io_out[5]
+port 157 nsew
+flabel metal3 s 583520 93936 584800 94048 0 FreeSans 1400 0 0 0 io_out[6]
+port 158 nsew
+flabel metal3 s 583520 273958 584800 274070 0 FreeSans 1400 0 0 0 io_out[7]
+port 159 nsew
+flabel metal3 s 583520 318380 584800 318492 0 FreeSans 1400 0 0 0 io_out[8]
+port 160 nsew
+flabel metal3 s 583520 363602 584800 363714 0 FreeSans 1400 0 0 0 io_out[9]
+port 161 nsew
+flabel metal2 s 125816 -800 125928 480 0 FreeSans 1400 90 0 0 la_data_in[0]
+port 162 nsew
+flabel metal2 s 480416 -800 480528 480 0 FreeSans 1400 90 0 0 la_data_in[100]
+port 163 nsew
+flabel metal2 s 483962 -800 484074 480 0 FreeSans 1400 90 0 0 la_data_in[101]
+port 164 nsew
+flabel metal2 s 487508 -800 487620 480 0 FreeSans 1400 90 0 0 la_data_in[102]
+port 165 nsew
+flabel metal2 s 491054 -800 491166 480 0 FreeSans 1400 90 0 0 la_data_in[103]
+port 166 nsew
+flabel metal2 s 494600 -800 494712 480 0 FreeSans 1400 90 0 0 la_data_in[104]
+port 167 nsew
+flabel metal2 s 498146 -800 498258 480 0 FreeSans 1400 90 0 0 la_data_in[105]
+port 168 nsew
+flabel metal2 s 501692 -800 501804 480 0 FreeSans 1400 90 0 0 la_data_in[106]
+port 169 nsew
+flabel metal2 s 505238 -800 505350 480 0 FreeSans 1400 90 0 0 la_data_in[107]
+port 170 nsew
+flabel metal2 s 508784 -800 508896 480 0 FreeSans 1400 90 0 0 la_data_in[108]
+port 171 nsew
+flabel metal2 s 512330 -800 512442 480 0 FreeSans 1400 90 0 0 la_data_in[109]
+port 172 nsew
+flabel metal2 s 161276 -800 161388 480 0 FreeSans 1400 90 0 0 la_data_in[10]
+port 173 nsew
+flabel metal2 s 515876 -800 515988 480 0 FreeSans 1400 90 0 0 la_data_in[110]
+port 174 nsew
+flabel metal2 s 519422 -800 519534 480 0 FreeSans 1400 90 0 0 la_data_in[111]
+port 175 nsew
+flabel metal2 s 522968 -800 523080 480 0 FreeSans 1400 90 0 0 la_data_in[112]
+port 176 nsew
+flabel metal2 s 526514 -800 526626 480 0 FreeSans 1400 90 0 0 la_data_in[113]
+port 177 nsew
+flabel metal2 s 530060 -800 530172 480 0 FreeSans 1400 90 0 0 la_data_in[114]
+port 178 nsew
+flabel metal2 s 533606 -800 533718 480 0 FreeSans 1400 90 0 0 la_data_in[115]
+port 179 nsew
+flabel metal2 s 537152 -800 537264 480 0 FreeSans 1400 90 0 0 la_data_in[116]
+port 180 nsew
+flabel metal2 s 540698 -800 540810 480 0 FreeSans 1400 90 0 0 la_data_in[117]
+port 181 nsew
+flabel metal2 s 544244 -800 544356 480 0 FreeSans 1400 90 0 0 la_data_in[118]
+port 182 nsew
+flabel metal2 s 547790 -800 547902 480 0 FreeSans 1400 90 0 0 la_data_in[119]
+port 183 nsew
+flabel metal2 s 164822 -800 164934 480 0 FreeSans 1400 90 0 0 la_data_in[11]
+port 184 nsew
+flabel metal2 s 551336 -800 551448 480 0 FreeSans 1400 90 0 0 la_data_in[120]
+port 185 nsew
+flabel metal2 s 554882 -800 554994 480 0 FreeSans 1400 90 0 0 la_data_in[121]
+port 186 nsew
+flabel metal2 s 558428 -800 558540 480 0 FreeSans 1400 90 0 0 la_data_in[122]
+port 187 nsew
+flabel metal2 s 561974 -800 562086 480 0 FreeSans 1400 90 0 0 la_data_in[123]
+port 188 nsew
+flabel metal2 s 565520 -800 565632 480 0 FreeSans 1400 90 0 0 la_data_in[124]
+port 189 nsew
+flabel metal2 s 569066 -800 569178 480 0 FreeSans 1400 90 0 0 la_data_in[125]
+port 190 nsew
+flabel metal2 s 572612 -800 572724 480 0 FreeSans 1400 90 0 0 la_data_in[126]
+port 191 nsew
+flabel metal2 s 576158 -800 576270 480 0 FreeSans 1400 90 0 0 la_data_in[127]
+port 192 nsew
+flabel metal2 s 168368 -800 168480 480 0 FreeSans 1400 90 0 0 la_data_in[12]
+port 193 nsew
+flabel metal2 s 171914 -800 172026 480 0 FreeSans 1400 90 0 0 la_data_in[13]
+port 194 nsew
+flabel metal2 s 175460 -800 175572 480 0 FreeSans 1400 90 0 0 la_data_in[14]
+port 195 nsew
+flabel metal2 s 179006 -800 179118 480 0 FreeSans 1400 90 0 0 la_data_in[15]
+port 196 nsew
+flabel metal2 s 182552 -800 182664 480 0 FreeSans 1400 90 0 0 la_data_in[16]
+port 197 nsew
+flabel metal2 s 186098 -800 186210 480 0 FreeSans 1400 90 0 0 la_data_in[17]
+port 198 nsew
+flabel metal2 s 189644 -800 189756 480 0 FreeSans 1400 90 0 0 la_data_in[18]
+port 199 nsew
+flabel metal2 s 193190 -800 193302 480 0 FreeSans 1400 90 0 0 la_data_in[19]
+port 200 nsew
+flabel metal2 s 129362 -800 129474 480 0 FreeSans 1400 90 0 0 la_data_in[1]
+port 201 nsew
+flabel metal2 s 196736 -800 196848 480 0 FreeSans 1400 90 0 0 la_data_in[20]
+port 202 nsew
+flabel metal2 s 200282 -800 200394 480 0 FreeSans 1400 90 0 0 la_data_in[21]
+port 203 nsew
+flabel metal2 s 203828 -800 203940 480 0 FreeSans 1400 90 0 0 la_data_in[22]
+port 204 nsew
+flabel metal2 s 207374 -800 207486 480 0 FreeSans 1400 90 0 0 la_data_in[23]
+port 205 nsew
+flabel metal2 s 210920 -800 211032 480 0 FreeSans 1400 90 0 0 la_data_in[24]
+port 206 nsew
+flabel metal2 s 214466 -800 214578 480 0 FreeSans 1400 90 0 0 la_data_in[25]
+port 207 nsew
+flabel metal2 s 218012 -800 218124 480 0 FreeSans 1400 90 0 0 la_data_in[26]
+port 208 nsew
+flabel metal2 s 221558 -800 221670 480 0 FreeSans 1400 90 0 0 la_data_in[27]
+port 209 nsew
+flabel metal2 s 225104 -800 225216 480 0 FreeSans 1400 90 0 0 la_data_in[28]
+port 210 nsew
+flabel metal2 s 228650 -800 228762 480 0 FreeSans 1400 90 0 0 la_data_in[29]
+port 211 nsew
+flabel metal2 s 132908 -800 133020 480 0 FreeSans 1400 90 0 0 la_data_in[2]
+port 212 nsew
+flabel metal2 s 232196 -800 232308 480 0 FreeSans 1400 90 0 0 la_data_in[30]
+port 213 nsew
+flabel metal2 s 235742 -800 235854 480 0 FreeSans 1400 90 0 0 la_data_in[31]
+port 214 nsew
+flabel metal2 s 239288 -800 239400 480 0 FreeSans 1400 90 0 0 la_data_in[32]
+port 215 nsew
+flabel metal2 s 242834 -800 242946 480 0 FreeSans 1400 90 0 0 la_data_in[33]
+port 216 nsew
+flabel metal2 s 246380 -800 246492 480 0 FreeSans 1400 90 0 0 la_data_in[34]
+port 217 nsew
+flabel metal2 s 249926 -800 250038 480 0 FreeSans 1400 90 0 0 la_data_in[35]
+port 218 nsew
+flabel metal2 s 253472 -800 253584 480 0 FreeSans 1400 90 0 0 la_data_in[36]
+port 219 nsew
+flabel metal2 s 257018 -800 257130 480 0 FreeSans 1400 90 0 0 la_data_in[37]
+port 220 nsew
+flabel metal2 s 260564 -800 260676 480 0 FreeSans 1400 90 0 0 la_data_in[38]
+port 221 nsew
+flabel metal2 s 264110 -800 264222 480 0 FreeSans 1400 90 0 0 la_data_in[39]
+port 222 nsew
+flabel metal2 s 136454 -800 136566 480 0 FreeSans 1400 90 0 0 la_data_in[3]
+port 223 nsew
+flabel metal2 s 267656 -800 267768 480 0 FreeSans 1400 90 0 0 la_data_in[40]
+port 224 nsew
+flabel metal2 s 271202 -800 271314 480 0 FreeSans 1400 90 0 0 la_data_in[41]
+port 225 nsew
+flabel metal2 s 274748 -800 274860 480 0 FreeSans 1400 90 0 0 la_data_in[42]
+port 226 nsew
+flabel metal2 s 278294 -800 278406 480 0 FreeSans 1400 90 0 0 la_data_in[43]
+port 227 nsew
+flabel metal2 s 281840 -800 281952 480 0 FreeSans 1400 90 0 0 la_data_in[44]
+port 228 nsew
+flabel metal2 s 285386 -800 285498 480 0 FreeSans 1400 90 0 0 la_data_in[45]
+port 229 nsew
+flabel metal2 s 288932 -800 289044 480 0 FreeSans 1400 90 0 0 la_data_in[46]
+port 230 nsew
+flabel metal2 s 292478 -800 292590 480 0 FreeSans 1400 90 0 0 la_data_in[47]
+port 231 nsew
+flabel metal2 s 296024 -800 296136 480 0 FreeSans 1400 90 0 0 la_data_in[48]
+port 232 nsew
+flabel metal2 s 299570 -800 299682 480 0 FreeSans 1400 90 0 0 la_data_in[49]
+port 233 nsew
+flabel metal2 s 140000 -800 140112 480 0 FreeSans 1400 90 0 0 la_data_in[4]
+port 234 nsew
+flabel metal2 s 303116 -800 303228 480 0 FreeSans 1400 90 0 0 la_data_in[50]
+port 235 nsew
+flabel metal2 s 306662 -800 306774 480 0 FreeSans 1400 90 0 0 la_data_in[51]
+port 236 nsew
+flabel metal2 s 310208 -800 310320 480 0 FreeSans 1400 90 0 0 la_data_in[52]
+port 237 nsew
+flabel metal2 s 313754 -800 313866 480 0 FreeSans 1400 90 0 0 la_data_in[53]
+port 238 nsew
+flabel metal2 s 317300 -800 317412 480 0 FreeSans 1400 90 0 0 la_data_in[54]
+port 239 nsew
+flabel metal2 s 320846 -800 320958 480 0 FreeSans 1400 90 0 0 la_data_in[55]
+port 240 nsew
+flabel metal2 s 324392 -800 324504 480 0 FreeSans 1400 90 0 0 la_data_in[56]
+port 241 nsew
+flabel metal2 s 327938 -800 328050 480 0 FreeSans 1400 90 0 0 la_data_in[57]
+port 242 nsew
+flabel metal2 s 331484 -800 331596 480 0 FreeSans 1400 90 0 0 la_data_in[58]
+port 243 nsew
+flabel metal2 s 335030 -800 335142 480 0 FreeSans 1400 90 0 0 la_data_in[59]
+port 244 nsew
+flabel metal2 s 143546 -800 143658 480 0 FreeSans 1400 90 0 0 la_data_in[5]
+port 245 nsew
+flabel metal2 s 338576 -800 338688 480 0 FreeSans 1400 90 0 0 la_data_in[60]
+port 246 nsew
+flabel metal2 s 342122 -800 342234 480 0 FreeSans 1400 90 0 0 la_data_in[61]
+port 247 nsew
+flabel metal2 s 345668 -800 345780 480 0 FreeSans 1400 90 0 0 la_data_in[62]
+port 248 nsew
+flabel metal2 s 349214 -800 349326 480 0 FreeSans 1400 90 0 0 la_data_in[63]
+port 249 nsew
+flabel metal2 s 352760 -800 352872 480 0 FreeSans 1400 90 0 0 la_data_in[64]
+port 250 nsew
+flabel metal2 s 356306 -800 356418 480 0 FreeSans 1400 90 0 0 la_data_in[65]
+port 251 nsew
+flabel metal2 s 359852 -800 359964 480 0 FreeSans 1400 90 0 0 la_data_in[66]
+port 252 nsew
+flabel metal2 s 363398 -800 363510 480 0 FreeSans 1400 90 0 0 la_data_in[67]
+port 253 nsew
+flabel metal2 s 366944 -800 367056 480 0 FreeSans 1400 90 0 0 la_data_in[68]
+port 254 nsew
+flabel metal2 s 370490 -800 370602 480 0 FreeSans 1400 90 0 0 la_data_in[69]
+port 255 nsew
+flabel metal2 s 147092 -800 147204 480 0 FreeSans 1400 90 0 0 la_data_in[6]
+port 256 nsew
+flabel metal2 s 374036 -800 374148 480 0 FreeSans 1400 90 0 0 la_data_in[70]
+port 257 nsew
+flabel metal2 s 377582 -800 377694 480 0 FreeSans 1400 90 0 0 la_data_in[71]
+port 258 nsew
+flabel metal2 s 381128 -800 381240 480 0 FreeSans 1400 90 0 0 la_data_in[72]
+port 259 nsew
+flabel metal2 s 384674 -800 384786 480 0 FreeSans 1400 90 0 0 la_data_in[73]
+port 260 nsew
+flabel metal2 s 388220 -800 388332 480 0 FreeSans 1400 90 0 0 la_data_in[74]
+port 261 nsew
+flabel metal2 s 391766 -800 391878 480 0 FreeSans 1400 90 0 0 la_data_in[75]
+port 262 nsew
+flabel metal2 s 395312 -800 395424 480 0 FreeSans 1400 90 0 0 la_data_in[76]
+port 263 nsew
+flabel metal2 s 398858 -800 398970 480 0 FreeSans 1400 90 0 0 la_data_in[77]
+port 264 nsew
+flabel metal2 s 402404 -800 402516 480 0 FreeSans 1400 90 0 0 la_data_in[78]
+port 265 nsew
+flabel metal2 s 405950 -800 406062 480 0 FreeSans 1400 90 0 0 la_data_in[79]
+port 266 nsew
+flabel metal2 s 150638 -800 150750 480 0 FreeSans 1400 90 0 0 la_data_in[7]
+port 267 nsew
+flabel metal2 s 409496 -800 409608 480 0 FreeSans 1400 90 0 0 la_data_in[80]
+port 268 nsew
+flabel metal2 s 413042 -800 413154 480 0 FreeSans 1400 90 0 0 la_data_in[81]
+port 269 nsew
+flabel metal2 s 416588 -800 416700 480 0 FreeSans 1400 90 0 0 la_data_in[82]
+port 270 nsew
+flabel metal2 s 420134 -800 420246 480 0 FreeSans 1400 90 0 0 la_data_in[83]
+port 271 nsew
+flabel metal2 s 423680 -800 423792 480 0 FreeSans 1400 90 0 0 la_data_in[84]
+port 272 nsew
+flabel metal2 s 427226 -800 427338 480 0 FreeSans 1400 90 0 0 la_data_in[85]
+port 273 nsew
+flabel metal2 s 430772 -800 430884 480 0 FreeSans 1400 90 0 0 la_data_in[86]
+port 274 nsew
+flabel metal2 s 434318 -800 434430 480 0 FreeSans 1400 90 0 0 la_data_in[87]
+port 275 nsew
+flabel metal2 s 437864 -800 437976 480 0 FreeSans 1400 90 0 0 la_data_in[88]
+port 276 nsew
+flabel metal2 s 441410 -800 441522 480 0 FreeSans 1400 90 0 0 la_data_in[89]
+port 277 nsew
+flabel metal2 s 154184 -800 154296 480 0 FreeSans 1400 90 0 0 la_data_in[8]
+port 278 nsew
+flabel metal2 s 444956 -800 445068 480 0 FreeSans 1400 90 0 0 la_data_in[90]
+port 279 nsew
+flabel metal2 s 448502 -800 448614 480 0 FreeSans 1400 90 0 0 la_data_in[91]
+port 280 nsew
+flabel metal2 s 452048 -800 452160 480 0 FreeSans 1400 90 0 0 la_data_in[92]
+port 281 nsew
+flabel metal2 s 455594 -800 455706 480 0 FreeSans 1400 90 0 0 la_data_in[93]
+port 282 nsew
+flabel metal2 s 459140 -800 459252 480 0 FreeSans 1400 90 0 0 la_data_in[94]
+port 283 nsew
+flabel metal2 s 462686 -800 462798 480 0 FreeSans 1400 90 0 0 la_data_in[95]
+port 284 nsew
+flabel metal2 s 466232 -800 466344 480 0 FreeSans 1400 90 0 0 la_data_in[96]
+port 285 nsew
+flabel metal2 s 469778 -800 469890 480 0 FreeSans 1400 90 0 0 la_data_in[97]
+port 286 nsew
+flabel metal2 s 473324 -800 473436 480 0 FreeSans 1400 90 0 0 la_data_in[98]
+port 287 nsew
+flabel metal2 s 476870 -800 476982 480 0 FreeSans 1400 90 0 0 la_data_in[99]
+port 288 nsew
+flabel metal2 s 157730 -800 157842 480 0 FreeSans 1400 90 0 0 la_data_in[9]
+port 289 nsew
+flabel metal2 s 126998 -800 127110 480 0 FreeSans 1400 90 0 0 la_data_out[0]
+port 290 nsew
+flabel metal2 s 481598 -800 481710 480 0 FreeSans 1400 90 0 0 la_data_out[100]
+port 291 nsew
+flabel metal2 s 485144 -800 485256 480 0 FreeSans 1400 90 0 0 la_data_out[101]
+port 292 nsew
+flabel metal2 s 488690 -800 488802 480 0 FreeSans 1400 90 0 0 la_data_out[102]
+port 293 nsew
+flabel metal2 s 492236 -800 492348 480 0 FreeSans 1400 90 0 0 la_data_out[103]
+port 294 nsew
+flabel metal2 s 495782 -800 495894 480 0 FreeSans 1400 90 0 0 la_data_out[104]
+port 295 nsew
+flabel metal2 s 499328 -800 499440 480 0 FreeSans 1400 90 0 0 la_data_out[105]
+port 296 nsew
+flabel metal2 s 502874 -800 502986 480 0 FreeSans 1400 90 0 0 la_data_out[106]
+port 297 nsew
+flabel metal2 s 506420 -800 506532 480 0 FreeSans 1400 90 0 0 la_data_out[107]
+port 298 nsew
+flabel metal2 s 509966 -800 510078 480 0 FreeSans 1400 90 0 0 la_data_out[108]
+port 299 nsew
+flabel metal2 s 513512 -800 513624 480 0 FreeSans 1400 90 0 0 la_data_out[109]
+port 300 nsew
+flabel metal2 s 162458 -800 162570 480 0 FreeSans 1400 90 0 0 la_data_out[10]
+port 301 nsew
+flabel metal2 s 517058 -800 517170 480 0 FreeSans 1400 90 0 0 la_data_out[110]
+port 302 nsew
+flabel metal2 s 520604 -800 520716 480 0 FreeSans 1400 90 0 0 la_data_out[111]
+port 303 nsew
+flabel metal2 s 524150 -800 524262 480 0 FreeSans 1400 90 0 0 la_data_out[112]
+port 304 nsew
+flabel metal2 s 527696 -800 527808 480 0 FreeSans 1400 90 0 0 la_data_out[113]
+port 305 nsew
+flabel metal2 s 531242 -800 531354 480 0 FreeSans 1400 90 0 0 la_data_out[114]
+port 306 nsew
+flabel metal2 s 534788 -800 534900 480 0 FreeSans 1400 90 0 0 la_data_out[115]
+port 307 nsew
+flabel metal2 s 538334 -800 538446 480 0 FreeSans 1400 90 0 0 la_data_out[116]
+port 308 nsew
+flabel metal2 s 541880 -800 541992 480 0 FreeSans 1400 90 0 0 la_data_out[117]
+port 309 nsew
+flabel metal2 s 545426 -800 545538 480 0 FreeSans 1400 90 0 0 la_data_out[118]
+port 310 nsew
+flabel metal2 s 548972 -800 549084 480 0 FreeSans 1400 90 0 0 la_data_out[119]
+port 311 nsew
+flabel metal2 s 166004 -800 166116 480 0 FreeSans 1400 90 0 0 la_data_out[11]
+port 312 nsew
+flabel metal2 s 552518 -800 552630 480 0 FreeSans 1400 90 0 0 la_data_out[120]
+port 313 nsew
+flabel metal2 s 556064 -800 556176 480 0 FreeSans 1400 90 0 0 la_data_out[121]
+port 314 nsew
+flabel metal2 s 559610 -800 559722 480 0 FreeSans 1400 90 0 0 la_data_out[122]
+port 315 nsew
+flabel metal2 s 563156 -800 563268 480 0 FreeSans 1400 90 0 0 la_data_out[123]
+port 316 nsew
+flabel metal2 s 566702 -800 566814 480 0 FreeSans 1400 90 0 0 la_data_out[124]
+port 317 nsew
+flabel metal2 s 570248 -800 570360 480 0 FreeSans 1400 90 0 0 la_data_out[125]
+port 318 nsew
+flabel metal2 s 573794 -800 573906 480 0 FreeSans 1400 90 0 0 la_data_out[126]
+port 319 nsew
+flabel metal2 s 577340 -800 577452 480 0 FreeSans 1400 90 0 0 la_data_out[127]
+port 320 nsew
+flabel metal2 s 169550 -800 169662 480 0 FreeSans 1400 90 0 0 la_data_out[12]
+port 321 nsew
+flabel metal2 s 173096 -800 173208 480 0 FreeSans 1400 90 0 0 la_data_out[13]
+port 322 nsew
+flabel metal2 s 176642 -800 176754 480 0 FreeSans 1400 90 0 0 la_data_out[14]
+port 323 nsew
+flabel metal2 s 180188 -800 180300 480 0 FreeSans 1400 90 0 0 la_data_out[15]
+port 324 nsew
+flabel metal2 s 183734 -800 183846 480 0 FreeSans 1400 90 0 0 la_data_out[16]
+port 325 nsew
+flabel metal2 s 187280 -800 187392 480 0 FreeSans 1400 90 0 0 la_data_out[17]
+port 326 nsew
+flabel metal2 s 190826 -800 190938 480 0 FreeSans 1400 90 0 0 la_data_out[18]
+port 327 nsew
+flabel metal2 s 194372 -800 194484 480 0 FreeSans 1400 90 0 0 la_data_out[19]
+port 328 nsew
+flabel metal2 s 130544 -800 130656 480 0 FreeSans 1400 90 0 0 la_data_out[1]
+port 329 nsew
+flabel metal2 s 197918 -800 198030 480 0 FreeSans 1400 90 0 0 la_data_out[20]
+port 330 nsew
+flabel metal2 s 201464 -800 201576 480 0 FreeSans 1400 90 0 0 la_data_out[21]
+port 331 nsew
+flabel metal2 s 205010 -800 205122 480 0 FreeSans 1400 90 0 0 la_data_out[22]
+port 332 nsew
+flabel metal2 s 208556 -800 208668 480 0 FreeSans 1400 90 0 0 la_data_out[23]
+port 333 nsew
+flabel metal2 s 212102 -800 212214 480 0 FreeSans 1400 90 0 0 la_data_out[24]
+port 334 nsew
+flabel metal2 s 215648 -800 215760 480 0 FreeSans 1400 90 0 0 la_data_out[25]
+port 335 nsew
+flabel metal2 s 219194 -800 219306 480 0 FreeSans 1400 90 0 0 la_data_out[26]
+port 336 nsew
+flabel metal2 s 222740 -800 222852 480 0 FreeSans 1400 90 0 0 la_data_out[27]
+port 337 nsew
+flabel metal2 s 226286 -800 226398 480 0 FreeSans 1400 90 0 0 la_data_out[28]
+port 338 nsew
+flabel metal2 s 229832 -800 229944 480 0 FreeSans 1400 90 0 0 la_data_out[29]
+port 339 nsew
+flabel metal2 s 134090 -800 134202 480 0 FreeSans 1400 90 0 0 la_data_out[2]
+port 340 nsew
+flabel metal2 s 233378 -800 233490 480 0 FreeSans 1400 90 0 0 la_data_out[30]
+port 341 nsew
+flabel metal2 s 236924 -800 237036 480 0 FreeSans 1400 90 0 0 la_data_out[31]
+port 342 nsew
+flabel metal2 s 240470 -800 240582 480 0 FreeSans 1400 90 0 0 la_data_out[32]
+port 343 nsew
+flabel metal2 s 244016 -800 244128 480 0 FreeSans 1400 90 0 0 la_data_out[33]
+port 344 nsew
+flabel metal2 s 247562 -800 247674 480 0 FreeSans 1400 90 0 0 la_data_out[34]
+port 345 nsew
+flabel metal2 s 251108 -800 251220 480 0 FreeSans 1400 90 0 0 la_data_out[35]
+port 346 nsew
+flabel metal2 s 254654 -800 254766 480 0 FreeSans 1400 90 0 0 la_data_out[36]
+port 347 nsew
+flabel metal2 s 258200 -800 258312 480 0 FreeSans 1400 90 0 0 la_data_out[37]
+port 348 nsew
+flabel metal2 s 261746 -800 261858 480 0 FreeSans 1400 90 0 0 la_data_out[38]
+port 349 nsew
+flabel metal2 s 265292 -800 265404 480 0 FreeSans 1400 90 0 0 la_data_out[39]
+port 350 nsew
+flabel metal2 s 137636 -800 137748 480 0 FreeSans 1400 90 0 0 la_data_out[3]
+port 351 nsew
+flabel metal2 s 268838 -800 268950 480 0 FreeSans 1400 90 0 0 la_data_out[40]
+port 352 nsew
+flabel metal2 s 272384 -800 272496 480 0 FreeSans 1400 90 0 0 la_data_out[41]
+port 353 nsew
+flabel metal2 s 275930 -800 276042 480 0 FreeSans 1400 90 0 0 la_data_out[42]
+port 354 nsew
+flabel metal2 s 279476 -800 279588 480 0 FreeSans 1400 90 0 0 la_data_out[43]
+port 355 nsew
+flabel metal2 s 283022 -800 283134 480 0 FreeSans 1400 90 0 0 la_data_out[44]
+port 356 nsew
+flabel metal2 s 286568 -800 286680 480 0 FreeSans 1400 90 0 0 la_data_out[45]
+port 357 nsew
+flabel metal2 s 290114 -800 290226 480 0 FreeSans 1400 90 0 0 la_data_out[46]
+port 358 nsew
+flabel metal2 s 293660 -800 293772 480 0 FreeSans 1400 90 0 0 la_data_out[47]
+port 359 nsew
+flabel metal2 s 297206 -800 297318 480 0 FreeSans 1400 90 0 0 la_data_out[48]
+port 360 nsew
+flabel metal2 s 300752 -800 300864 480 0 FreeSans 1400 90 0 0 la_data_out[49]
+port 361 nsew
+flabel metal2 s 141182 -800 141294 480 0 FreeSans 1400 90 0 0 la_data_out[4]
+port 362 nsew
+flabel metal2 s 304298 -800 304410 480 0 FreeSans 1400 90 0 0 la_data_out[50]
+port 363 nsew
+flabel metal2 s 307844 -800 307956 480 0 FreeSans 1400 90 0 0 la_data_out[51]
+port 364 nsew
+flabel metal2 s 311390 -800 311502 480 0 FreeSans 1400 90 0 0 la_data_out[52]
+port 365 nsew
+flabel metal2 s 314936 -800 315048 480 0 FreeSans 1400 90 0 0 la_data_out[53]
+port 366 nsew
+flabel metal2 s 318482 -800 318594 480 0 FreeSans 1400 90 0 0 la_data_out[54]
+port 367 nsew
+flabel metal2 s 322028 -800 322140 480 0 FreeSans 1400 90 0 0 la_data_out[55]
+port 368 nsew
+flabel metal2 s 325574 -800 325686 480 0 FreeSans 1400 90 0 0 la_data_out[56]
+port 369 nsew
+flabel metal2 s 329120 -800 329232 480 0 FreeSans 1400 90 0 0 la_data_out[57]
+port 370 nsew
+flabel metal2 s 332666 -800 332778 480 0 FreeSans 1400 90 0 0 la_data_out[58]
+port 371 nsew
+flabel metal2 s 336212 -800 336324 480 0 FreeSans 1400 90 0 0 la_data_out[59]
+port 372 nsew
+flabel metal2 s 144728 -800 144840 480 0 FreeSans 1400 90 0 0 la_data_out[5]
+port 373 nsew
+flabel metal2 s 339758 -800 339870 480 0 FreeSans 1400 90 0 0 la_data_out[60]
+port 374 nsew
+flabel metal2 s 343304 -800 343416 480 0 FreeSans 1400 90 0 0 la_data_out[61]
+port 375 nsew
+flabel metal2 s 346850 -800 346962 480 0 FreeSans 1400 90 0 0 la_data_out[62]
+port 376 nsew
+flabel metal2 s 350396 -800 350508 480 0 FreeSans 1400 90 0 0 la_data_out[63]
+port 377 nsew
+flabel metal2 s 353942 -800 354054 480 0 FreeSans 1400 90 0 0 la_data_out[64]
+port 378 nsew
+flabel metal2 s 357488 -800 357600 480 0 FreeSans 1400 90 0 0 la_data_out[65]
+port 379 nsew
+flabel metal2 s 361034 -800 361146 480 0 FreeSans 1400 90 0 0 la_data_out[66]
+port 380 nsew
+flabel metal2 s 364580 -800 364692 480 0 FreeSans 1400 90 0 0 la_data_out[67]
+port 381 nsew
+flabel metal2 s 368126 -800 368238 480 0 FreeSans 1400 90 0 0 la_data_out[68]
+port 382 nsew
+flabel metal2 s 371672 -800 371784 480 0 FreeSans 1400 90 0 0 la_data_out[69]
+port 383 nsew
+flabel metal2 s 148274 -800 148386 480 0 FreeSans 1400 90 0 0 la_data_out[6]
+port 384 nsew
+flabel metal2 s 375218 -800 375330 480 0 FreeSans 1400 90 0 0 la_data_out[70]
+port 385 nsew
+flabel metal2 s 378764 -800 378876 480 0 FreeSans 1400 90 0 0 la_data_out[71]
+port 386 nsew
+flabel metal2 s 382310 -800 382422 480 0 FreeSans 1400 90 0 0 la_data_out[72]
+port 387 nsew
+flabel metal2 s 385856 -800 385968 480 0 FreeSans 1400 90 0 0 la_data_out[73]
+port 388 nsew
+flabel metal2 s 389402 -800 389514 480 0 FreeSans 1400 90 0 0 la_data_out[74]
+port 389 nsew
+flabel metal2 s 392948 -800 393060 480 0 FreeSans 1400 90 0 0 la_data_out[75]
+port 390 nsew
+flabel metal2 s 396494 -800 396606 480 0 FreeSans 1400 90 0 0 la_data_out[76]
+port 391 nsew
+flabel metal2 s 400040 -800 400152 480 0 FreeSans 1400 90 0 0 la_data_out[77]
+port 392 nsew
+flabel metal2 s 403586 -800 403698 480 0 FreeSans 1400 90 0 0 la_data_out[78]
+port 393 nsew
+flabel metal2 s 407132 -800 407244 480 0 FreeSans 1400 90 0 0 la_data_out[79]
+port 394 nsew
+flabel metal2 s 151820 -800 151932 480 0 FreeSans 1400 90 0 0 la_data_out[7]
+port 395 nsew
+flabel metal2 s 410678 -800 410790 480 0 FreeSans 1400 90 0 0 la_data_out[80]
+port 396 nsew
+flabel metal2 s 414224 -800 414336 480 0 FreeSans 1400 90 0 0 la_data_out[81]
+port 397 nsew
+flabel metal2 s 417770 -800 417882 480 0 FreeSans 1400 90 0 0 la_data_out[82]
+port 398 nsew
+flabel metal2 s 421316 -800 421428 480 0 FreeSans 1400 90 0 0 la_data_out[83]
+port 399 nsew
+flabel metal2 s 424862 -800 424974 480 0 FreeSans 1400 90 0 0 la_data_out[84]
+port 400 nsew
+flabel metal2 s 428408 -800 428520 480 0 FreeSans 1400 90 0 0 la_data_out[85]
+port 401 nsew
+flabel metal2 s 431954 -800 432066 480 0 FreeSans 1400 90 0 0 la_data_out[86]
+port 402 nsew
+flabel metal2 s 435500 -800 435612 480 0 FreeSans 1400 90 0 0 la_data_out[87]
+port 403 nsew
+flabel metal2 s 439046 -800 439158 480 0 FreeSans 1400 90 0 0 la_data_out[88]
+port 404 nsew
+flabel metal2 s 442592 -800 442704 480 0 FreeSans 1400 90 0 0 la_data_out[89]
+port 405 nsew
+flabel metal2 s 155366 -800 155478 480 0 FreeSans 1400 90 0 0 la_data_out[8]
+port 406 nsew
+flabel metal2 s 446138 -800 446250 480 0 FreeSans 1400 90 0 0 la_data_out[90]
+port 407 nsew
+flabel metal2 s 449684 -800 449796 480 0 FreeSans 1400 90 0 0 la_data_out[91]
+port 408 nsew
+flabel metal2 s 453230 -800 453342 480 0 FreeSans 1400 90 0 0 la_data_out[92]
+port 409 nsew
+flabel metal2 s 456776 -800 456888 480 0 FreeSans 1400 90 0 0 la_data_out[93]
+port 410 nsew
+flabel metal2 s 460322 -800 460434 480 0 FreeSans 1400 90 0 0 la_data_out[94]
+port 411 nsew
+flabel metal2 s 463868 -800 463980 480 0 FreeSans 1400 90 0 0 la_data_out[95]
+port 412 nsew
+flabel metal2 s 467414 -800 467526 480 0 FreeSans 1400 90 0 0 la_data_out[96]
+port 413 nsew
+flabel metal2 s 470960 -800 471072 480 0 FreeSans 1400 90 0 0 la_data_out[97]
+port 414 nsew
+flabel metal2 s 474506 -800 474618 480 0 FreeSans 1400 90 0 0 la_data_out[98]
+port 415 nsew
+flabel metal2 s 478052 -800 478164 480 0 FreeSans 1400 90 0 0 la_data_out[99]
+port 416 nsew
+flabel metal2 s 158912 -800 159024 480 0 FreeSans 1400 90 0 0 la_data_out[9]
+port 417 nsew
+flabel metal2 s 128180 -800 128292 480 0 FreeSans 1400 90 0 0 la_oenb[0]
+port 418 nsew
+flabel metal2 s 482780 -800 482892 480 0 FreeSans 1400 90 0 0 la_oenb[100]
+port 419 nsew
+flabel metal2 s 486326 -800 486438 480 0 FreeSans 1400 90 0 0 la_oenb[101]
+port 420 nsew
+flabel metal2 s 489872 -800 489984 480 0 FreeSans 1400 90 0 0 la_oenb[102]
+port 421 nsew
+flabel metal2 s 493418 -800 493530 480 0 FreeSans 1400 90 0 0 la_oenb[103]
+port 422 nsew
+flabel metal2 s 496964 -800 497076 480 0 FreeSans 1400 90 0 0 la_oenb[104]
+port 423 nsew
+flabel metal2 s 500510 -800 500622 480 0 FreeSans 1400 90 0 0 la_oenb[105]
+port 424 nsew
+flabel metal2 s 504056 -800 504168 480 0 FreeSans 1400 90 0 0 la_oenb[106]
+port 425 nsew
+flabel metal2 s 507602 -800 507714 480 0 FreeSans 1400 90 0 0 la_oenb[107]
+port 426 nsew
+flabel metal2 s 511148 -800 511260 480 0 FreeSans 1400 90 0 0 la_oenb[108]
+port 427 nsew
+flabel metal2 s 514694 -800 514806 480 0 FreeSans 1400 90 0 0 la_oenb[109]
+port 428 nsew
+flabel metal2 s 163640 -800 163752 480 0 FreeSans 1400 90 0 0 la_oenb[10]
+port 429 nsew
+flabel metal2 s 518240 -800 518352 480 0 FreeSans 1400 90 0 0 la_oenb[110]
+port 430 nsew
+flabel metal2 s 521786 -800 521898 480 0 FreeSans 1400 90 0 0 la_oenb[111]
+port 431 nsew
+flabel metal2 s 525332 -800 525444 480 0 FreeSans 1400 90 0 0 la_oenb[112]
+port 432 nsew
+flabel metal2 s 528878 -800 528990 480 0 FreeSans 1400 90 0 0 la_oenb[113]
+port 433 nsew
+flabel metal2 s 532424 -800 532536 480 0 FreeSans 1400 90 0 0 la_oenb[114]
+port 434 nsew
+flabel metal2 s 535970 -800 536082 480 0 FreeSans 1400 90 0 0 la_oenb[115]
+port 435 nsew
+flabel metal2 s 539516 -800 539628 480 0 FreeSans 1400 90 0 0 la_oenb[116]
+port 436 nsew
+flabel metal2 s 543062 -800 543174 480 0 FreeSans 1400 90 0 0 la_oenb[117]
+port 437 nsew
+flabel metal2 s 546608 -800 546720 480 0 FreeSans 1400 90 0 0 la_oenb[118]
+port 438 nsew
+flabel metal2 s 550154 -800 550266 480 0 FreeSans 1400 90 0 0 la_oenb[119]
+port 439 nsew
+flabel metal2 s 167186 -800 167298 480 0 FreeSans 1400 90 0 0 la_oenb[11]
+port 440 nsew
+flabel metal2 s 553700 -800 553812 480 0 FreeSans 1400 90 0 0 la_oenb[120]
+port 441 nsew
+flabel metal2 s 557246 -800 557358 480 0 FreeSans 1400 90 0 0 la_oenb[121]
+port 442 nsew
+flabel metal2 s 560792 -800 560904 480 0 FreeSans 1400 90 0 0 la_oenb[122]
+port 443 nsew
+flabel metal2 s 564338 -800 564450 480 0 FreeSans 1400 90 0 0 la_oenb[123]
+port 444 nsew
+flabel metal2 s 567884 -800 567996 480 0 FreeSans 1400 90 0 0 la_oenb[124]
+port 445 nsew
+flabel metal2 s 571430 -800 571542 480 0 FreeSans 1400 90 0 0 la_oenb[125]
+port 446 nsew
+flabel metal2 s 574976 -800 575088 480 0 FreeSans 1400 90 0 0 la_oenb[126]
+port 447 nsew
+flabel metal2 s 578522 -800 578634 480 0 FreeSans 1400 90 0 0 la_oenb[127]
+port 448 nsew
+flabel metal2 s 170732 -800 170844 480 0 FreeSans 1400 90 0 0 la_oenb[12]
+port 449 nsew
+flabel metal2 s 174278 -800 174390 480 0 FreeSans 1400 90 0 0 la_oenb[13]
+port 450 nsew
+flabel metal2 s 177824 -800 177936 480 0 FreeSans 1400 90 0 0 la_oenb[14]
+port 451 nsew
+flabel metal2 s 181370 -800 181482 480 0 FreeSans 1400 90 0 0 la_oenb[15]
+port 452 nsew
+flabel metal2 s 184916 -800 185028 480 0 FreeSans 1400 90 0 0 la_oenb[16]
+port 453 nsew
+flabel metal2 s 188462 -800 188574 480 0 FreeSans 1400 90 0 0 la_oenb[17]
+port 454 nsew
+flabel metal2 s 192008 -800 192120 480 0 FreeSans 1400 90 0 0 la_oenb[18]
+port 455 nsew
+flabel metal2 s 195554 -800 195666 480 0 FreeSans 1400 90 0 0 la_oenb[19]
+port 456 nsew
+flabel metal2 s 131726 -800 131838 480 0 FreeSans 1400 90 0 0 la_oenb[1]
+port 457 nsew
+flabel metal2 s 199100 -800 199212 480 0 FreeSans 1400 90 0 0 la_oenb[20]
+port 458 nsew
+flabel metal2 s 202646 -800 202758 480 0 FreeSans 1400 90 0 0 la_oenb[21]
+port 459 nsew
+flabel metal2 s 206192 -800 206304 480 0 FreeSans 1400 90 0 0 la_oenb[22]
+port 460 nsew
+flabel metal2 s 209738 -800 209850 480 0 FreeSans 1400 90 0 0 la_oenb[23]
+port 461 nsew
+flabel metal2 s 213284 -800 213396 480 0 FreeSans 1400 90 0 0 la_oenb[24]
+port 462 nsew
+flabel metal2 s 216830 -800 216942 480 0 FreeSans 1400 90 0 0 la_oenb[25]
+port 463 nsew
+flabel metal2 s 220376 -800 220488 480 0 FreeSans 1400 90 0 0 la_oenb[26]
+port 464 nsew
+flabel metal2 s 223922 -800 224034 480 0 FreeSans 1400 90 0 0 la_oenb[27]
+port 465 nsew
+flabel metal2 s 227468 -800 227580 480 0 FreeSans 1400 90 0 0 la_oenb[28]
+port 466 nsew
+flabel metal2 s 231014 -800 231126 480 0 FreeSans 1400 90 0 0 la_oenb[29]
+port 467 nsew
+flabel metal2 s 135272 -800 135384 480 0 FreeSans 1400 90 0 0 la_oenb[2]
+port 468 nsew
+flabel metal2 s 234560 -800 234672 480 0 FreeSans 1400 90 0 0 la_oenb[30]
+port 469 nsew
+flabel metal2 s 238106 -800 238218 480 0 FreeSans 1400 90 0 0 la_oenb[31]
+port 470 nsew
+flabel metal2 s 241652 -800 241764 480 0 FreeSans 1400 90 0 0 la_oenb[32]
+port 471 nsew
+flabel metal2 s 245198 -800 245310 480 0 FreeSans 1400 90 0 0 la_oenb[33]
+port 472 nsew
+flabel metal2 s 248744 -800 248856 480 0 FreeSans 1400 90 0 0 la_oenb[34]
+port 473 nsew
+flabel metal2 s 252290 -800 252402 480 0 FreeSans 1400 90 0 0 la_oenb[35]
+port 474 nsew
+flabel metal2 s 255836 -800 255948 480 0 FreeSans 1400 90 0 0 la_oenb[36]
+port 475 nsew
+flabel metal2 s 259382 -800 259494 480 0 FreeSans 1400 90 0 0 la_oenb[37]
+port 476 nsew
+flabel metal2 s 262928 -800 263040 480 0 FreeSans 1400 90 0 0 la_oenb[38]
+port 477 nsew
+flabel metal2 s 266474 -800 266586 480 0 FreeSans 1400 90 0 0 la_oenb[39]
+port 478 nsew
+flabel metal2 s 138818 -800 138930 480 0 FreeSans 1400 90 0 0 la_oenb[3]
+port 479 nsew
+flabel metal2 s 270020 -800 270132 480 0 FreeSans 1400 90 0 0 la_oenb[40]
+port 480 nsew
+flabel metal2 s 273566 -800 273678 480 0 FreeSans 1400 90 0 0 la_oenb[41]
+port 481 nsew
+flabel metal2 s 277112 -800 277224 480 0 FreeSans 1400 90 0 0 la_oenb[42]
+port 482 nsew
+flabel metal2 s 280658 -800 280770 480 0 FreeSans 1400 90 0 0 la_oenb[43]
+port 483 nsew
+flabel metal2 s 284204 -800 284316 480 0 FreeSans 1400 90 0 0 la_oenb[44]
+port 484 nsew
+flabel metal2 s 287750 -800 287862 480 0 FreeSans 1400 90 0 0 la_oenb[45]
+port 485 nsew
+flabel metal2 s 291296 -800 291408 480 0 FreeSans 1400 90 0 0 la_oenb[46]
+port 486 nsew
+flabel metal2 s 294842 -800 294954 480 0 FreeSans 1400 90 0 0 la_oenb[47]
+port 487 nsew
+flabel metal2 s 298388 -800 298500 480 0 FreeSans 1400 90 0 0 la_oenb[48]
+port 488 nsew
+flabel metal2 s 301934 -800 302046 480 0 FreeSans 1400 90 0 0 la_oenb[49]
+port 489 nsew
+flabel metal2 s 142364 -800 142476 480 0 FreeSans 1400 90 0 0 la_oenb[4]
+port 490 nsew
+flabel metal2 s 305480 -800 305592 480 0 FreeSans 1400 90 0 0 la_oenb[50]
+port 491 nsew
+flabel metal2 s 309026 -800 309138 480 0 FreeSans 1400 90 0 0 la_oenb[51]
+port 492 nsew
+flabel metal2 s 312572 -800 312684 480 0 FreeSans 1400 90 0 0 la_oenb[52]
+port 493 nsew
+flabel metal2 s 316118 -800 316230 480 0 FreeSans 1400 90 0 0 la_oenb[53]
+port 494 nsew
+flabel metal2 s 319664 -800 319776 480 0 FreeSans 1400 90 0 0 la_oenb[54]
+port 495 nsew
+flabel metal2 s 323210 -800 323322 480 0 FreeSans 1400 90 0 0 la_oenb[55]
+port 496 nsew
+flabel metal2 s 326756 -800 326868 480 0 FreeSans 1400 90 0 0 la_oenb[56]
+port 497 nsew
+flabel metal2 s 330302 -800 330414 480 0 FreeSans 1400 90 0 0 la_oenb[57]
+port 498 nsew
+flabel metal2 s 333848 -800 333960 480 0 FreeSans 1400 90 0 0 la_oenb[58]
+port 499 nsew
+flabel metal2 s 337394 -800 337506 480 0 FreeSans 1400 90 0 0 la_oenb[59]
+port 500 nsew
+flabel metal2 s 145910 -800 146022 480 0 FreeSans 1400 90 0 0 la_oenb[5]
+port 501 nsew
+flabel metal2 s 340940 -800 341052 480 0 FreeSans 1400 90 0 0 la_oenb[60]
+port 502 nsew
+flabel metal2 s 344486 -800 344598 480 0 FreeSans 1400 90 0 0 la_oenb[61]
+port 503 nsew
+flabel metal2 s 348032 -800 348144 480 0 FreeSans 1400 90 0 0 la_oenb[62]
+port 504 nsew
+flabel metal2 s 351578 -800 351690 480 0 FreeSans 1400 90 0 0 la_oenb[63]
+port 505 nsew
+flabel metal2 s 355124 -800 355236 480 0 FreeSans 1400 90 0 0 la_oenb[64]
+port 506 nsew
+flabel metal2 s 358670 -800 358782 480 0 FreeSans 1400 90 0 0 la_oenb[65]
+port 507 nsew
+flabel metal2 s 362216 -800 362328 480 0 FreeSans 1400 90 0 0 la_oenb[66]
+port 508 nsew
+flabel metal2 s 365762 -800 365874 480 0 FreeSans 1400 90 0 0 la_oenb[67]
+port 509 nsew
+flabel metal2 s 369308 -800 369420 480 0 FreeSans 1400 90 0 0 la_oenb[68]
+port 510 nsew
+flabel metal2 s 372854 -800 372966 480 0 FreeSans 1400 90 0 0 la_oenb[69]
+port 511 nsew
+flabel metal2 s 149456 -800 149568 480 0 FreeSans 1400 90 0 0 la_oenb[6]
+port 512 nsew
+flabel metal2 s 376400 -800 376512 480 0 FreeSans 1400 90 0 0 la_oenb[70]
+port 513 nsew
+flabel metal2 s 379946 -800 380058 480 0 FreeSans 1400 90 0 0 la_oenb[71]
+port 514 nsew
+flabel metal2 s 383492 -800 383604 480 0 FreeSans 1400 90 0 0 la_oenb[72]
+port 515 nsew
+flabel metal2 s 387038 -800 387150 480 0 FreeSans 1400 90 0 0 la_oenb[73]
+port 516 nsew
+flabel metal2 s 390584 -800 390696 480 0 FreeSans 1400 90 0 0 la_oenb[74]
+port 517 nsew
+flabel metal2 s 394130 -800 394242 480 0 FreeSans 1400 90 0 0 la_oenb[75]
+port 518 nsew
+flabel metal2 s 397676 -800 397788 480 0 FreeSans 1400 90 0 0 la_oenb[76]
+port 519 nsew
+flabel metal2 s 401222 -800 401334 480 0 FreeSans 1400 90 0 0 la_oenb[77]
+port 520 nsew
+flabel metal2 s 404768 -800 404880 480 0 FreeSans 1400 90 0 0 la_oenb[78]
+port 521 nsew
+flabel metal2 s 408314 -800 408426 480 0 FreeSans 1400 90 0 0 la_oenb[79]
+port 522 nsew
+flabel metal2 s 153002 -800 153114 480 0 FreeSans 1400 90 0 0 la_oenb[7]
+port 523 nsew
+flabel metal2 s 411860 -800 411972 480 0 FreeSans 1400 90 0 0 la_oenb[80]
+port 524 nsew
+flabel metal2 s 415406 -800 415518 480 0 FreeSans 1400 90 0 0 la_oenb[81]
+port 525 nsew
+flabel metal2 s 418952 -800 419064 480 0 FreeSans 1400 90 0 0 la_oenb[82]
+port 526 nsew
+flabel metal2 s 422498 -800 422610 480 0 FreeSans 1400 90 0 0 la_oenb[83]
+port 527 nsew
+flabel metal2 s 426044 -800 426156 480 0 FreeSans 1400 90 0 0 la_oenb[84]
+port 528 nsew
+flabel metal2 s 429590 -800 429702 480 0 FreeSans 1400 90 0 0 la_oenb[85]
+port 529 nsew
+flabel metal2 s 433136 -800 433248 480 0 FreeSans 1400 90 0 0 la_oenb[86]
+port 530 nsew
+flabel metal2 s 436682 -800 436794 480 0 FreeSans 1400 90 0 0 la_oenb[87]
+port 531 nsew
+flabel metal2 s 440228 -800 440340 480 0 FreeSans 1400 90 0 0 la_oenb[88]
+port 532 nsew
+flabel metal2 s 443774 -800 443886 480 0 FreeSans 1400 90 0 0 la_oenb[89]
+port 533 nsew
+flabel metal2 s 156548 -800 156660 480 0 FreeSans 1400 90 0 0 la_oenb[8]
+port 534 nsew
+flabel metal2 s 447320 -800 447432 480 0 FreeSans 1400 90 0 0 la_oenb[90]
+port 535 nsew
+flabel metal2 s 450866 -800 450978 480 0 FreeSans 1400 90 0 0 la_oenb[91]
+port 536 nsew
+flabel metal2 s 454412 -800 454524 480 0 FreeSans 1400 90 0 0 la_oenb[92]
+port 537 nsew
+flabel metal2 s 457958 -800 458070 480 0 FreeSans 1400 90 0 0 la_oenb[93]
+port 538 nsew
+flabel metal2 s 461504 -800 461616 480 0 FreeSans 1400 90 0 0 la_oenb[94]
+port 539 nsew
+flabel metal2 s 465050 -800 465162 480 0 FreeSans 1400 90 0 0 la_oenb[95]
+port 540 nsew
+flabel metal2 s 468596 -800 468708 480 0 FreeSans 1400 90 0 0 la_oenb[96]
+port 541 nsew
+flabel metal2 s 472142 -800 472254 480 0 FreeSans 1400 90 0 0 la_oenb[97]
+port 542 nsew
+flabel metal2 s 475688 -800 475800 480 0 FreeSans 1400 90 0 0 la_oenb[98]
+port 543 nsew
+flabel metal2 s 479234 -800 479346 480 0 FreeSans 1400 90 0 0 la_oenb[99]
+port 544 nsew
+flabel metal2 s 160094 -800 160206 480 0 FreeSans 1400 90 0 0 la_oenb[9]
+port 545 nsew
+flabel metal2 s 579704 -800 579816 480 0 FreeSans 1400 90 0 0 user_clock2
+port 546 nsew
+flabel metal2 s 580886 -800 580998 480 0 FreeSans 1400 90 0 0 user_irq[0]
+port 547 nsew
+flabel metal2 s 582068 -800 582180 480 0 FreeSans 1400 90 0 0 user_irq[1]
+port 548 nsew
+flabel metal2 s 583250 -800 583362 480 0 FreeSans 1400 90 0 0 user_irq[2]
+port 549 nsew
+flabel metal3 s 582340 639784 584800 644584 0 FreeSans 1400 0 0 0 vccd1
+port 550 nsew
+flabel metal3 s 582340 629784 584800 634584 0 FreeSans 1400 0 0 0 vccd1
+port 550 nsew
+flabel metal3 s 0 643842 1660 648642 0 FreeSans 1400 0 0 0 vccd2
+port 551 nsew
+flabel metal3 s 0 633842 1660 638642 0 FreeSans 1400 0 0 0 vccd2
+port 551 nsew
+flabel metal3 s 582340 540562 584800 545362 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 582340 550562 584800 555362 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 582340 235230 584800 240030 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 582340 225230 584800 230030 0 FreeSans 1400 0 0 0 vdda1
+port 552 nsew
+flabel metal3 s 0 204888 1660 209688 0 FreeSans 1400 0 0 0 vdda2
+port 553 nsew
+flabel metal3 s 0 214888 1660 219688 0 FreeSans 1400 0 0 0 vdda2
+port 553 nsew
+flabel metal3 s 520594 702340 525394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 554 nsew
+flabel metal3 s 510594 702340 515394 704800 0 FreeSans 2400 180 0 0 vssa1
+port 554 nsew
+flabel metal3 s 582340 146830 584800 151630 0 FreeSans 1400 0 0 0 vssa1
+port 554 nsew
+flabel metal3 s 582340 136830 584800 141630 0 FreeSans 1400 0 0 0 vssa1
+port 554 nsew
+flabel metal3 s 0 559442 1660 564242 0 FreeSans 1400 0 0 0 vssa2
+port 555 nsew
+flabel metal3 s 0 549442 1660 554242 0 FreeSans 1400 0 0 0 vssa2
+port 555 nsew
+flabel metal3 s 582340 191430 584800 196230 0 FreeSans 1400 0 0 0 vssd1
+port 556 nsew
+flabel metal3 s 582340 181430 584800 186230 0 FreeSans 1400 0 0 0 vssd1
+port 556 nsew
+flabel metal3 s 0 172888 1660 177688 0 FreeSans 1400 0 0 0 vssd2
+port 557 nsew
+flabel metal3 s 0 162888 1660 167688 0 FreeSans 1400 0 0 0 vssd2
+port 557 nsew
+flabel metal2 s 524 -800 636 480 0 FreeSans 1400 90 0 0 wb_clk_i
+port 558 nsew
+flabel metal2 s 1706 -800 1818 480 0 FreeSans 1400 90 0 0 wb_rst_i
+port 559 nsew
+flabel metal2 s 2888 -800 3000 480 0 FreeSans 1400 90 0 0 wbs_ack_o
+port 560 nsew
+flabel metal2 s 7616 -800 7728 480 0 FreeSans 1400 90 0 0 wbs_adr_i[0]
+port 561 nsew
+flabel metal2 s 47804 -800 47916 480 0 FreeSans 1400 90 0 0 wbs_adr_i[10]
+port 562 nsew
+flabel metal2 s 51350 -800 51462 480 0 FreeSans 1400 90 0 0 wbs_adr_i[11]
+port 563 nsew
+flabel metal2 s 54896 -800 55008 480 0 FreeSans 1400 90 0 0 wbs_adr_i[12]
+port 564 nsew
+flabel metal2 s 58442 -800 58554 480 0 FreeSans 1400 90 0 0 wbs_adr_i[13]
+port 565 nsew
+flabel metal2 s 61988 -800 62100 480 0 FreeSans 1400 90 0 0 wbs_adr_i[14]
+port 566 nsew
+flabel metal2 s 65534 -800 65646 480 0 FreeSans 1400 90 0 0 wbs_adr_i[15]
+port 567 nsew
+flabel metal2 s 69080 -800 69192 480 0 FreeSans 1400 90 0 0 wbs_adr_i[16]
+port 568 nsew
+flabel metal2 s 72626 -800 72738 480 0 FreeSans 1400 90 0 0 wbs_adr_i[17]
+port 569 nsew
+flabel metal2 s 76172 -800 76284 480 0 FreeSans 1400 90 0 0 wbs_adr_i[18]
+port 570 nsew
+flabel metal2 s 79718 -800 79830 480 0 FreeSans 1400 90 0 0 wbs_adr_i[19]
+port 571 nsew
+flabel metal2 s 12344 -800 12456 480 0 FreeSans 1400 90 0 0 wbs_adr_i[1]
+port 572 nsew
+flabel metal2 s 83264 -800 83376 480 0 FreeSans 1400 90 0 0 wbs_adr_i[20]
+port 573 nsew
+flabel metal2 s 86810 -800 86922 480 0 FreeSans 1400 90 0 0 wbs_adr_i[21]
+port 574 nsew
+flabel metal2 s 90356 -800 90468 480 0 FreeSans 1400 90 0 0 wbs_adr_i[22]
+port 575 nsew
+flabel metal2 s 93902 -800 94014 480 0 FreeSans 1400 90 0 0 wbs_adr_i[23]
+port 576 nsew
+flabel metal2 s 97448 -800 97560 480 0 FreeSans 1400 90 0 0 wbs_adr_i[24]
+port 577 nsew
+flabel metal2 s 100994 -800 101106 480 0 FreeSans 1400 90 0 0 wbs_adr_i[25]
+port 578 nsew
+flabel metal2 s 104540 -800 104652 480 0 FreeSans 1400 90 0 0 wbs_adr_i[26]
+port 579 nsew
+flabel metal2 s 108086 -800 108198 480 0 FreeSans 1400 90 0 0 wbs_adr_i[27]
+port 580 nsew
+flabel metal2 s 111632 -800 111744 480 0 FreeSans 1400 90 0 0 wbs_adr_i[28]
+port 581 nsew
+flabel metal2 s 115178 -800 115290 480 0 FreeSans 1400 90 0 0 wbs_adr_i[29]
+port 582 nsew
+flabel metal2 s 17072 -800 17184 480 0 FreeSans 1400 90 0 0 wbs_adr_i[2]
+port 583 nsew
+flabel metal2 s 118724 -800 118836 480 0 FreeSans 1400 90 0 0 wbs_adr_i[30]
+port 584 nsew
+flabel metal2 s 122270 -800 122382 480 0 FreeSans 1400 90 0 0 wbs_adr_i[31]
+port 585 nsew
+flabel metal2 s 21800 -800 21912 480 0 FreeSans 1400 90 0 0 wbs_adr_i[3]
+port 586 nsew
+flabel metal2 s 26528 -800 26640 480 0 FreeSans 1400 90 0 0 wbs_adr_i[4]
+port 587 nsew
+flabel metal2 s 30074 -800 30186 480 0 FreeSans 1400 90 0 0 wbs_adr_i[5]
+port 588 nsew
+flabel metal2 s 33620 -800 33732 480 0 FreeSans 1400 90 0 0 wbs_adr_i[6]
+port 589 nsew
+flabel metal2 s 37166 -800 37278 480 0 FreeSans 1400 90 0 0 wbs_adr_i[7]
+port 590 nsew
+flabel metal2 s 40712 -800 40824 480 0 FreeSans 1400 90 0 0 wbs_adr_i[8]
+port 591 nsew
+flabel metal2 s 44258 -800 44370 480 0 FreeSans 1400 90 0 0 wbs_adr_i[9]
+port 592 nsew
+flabel metal2 s 4070 -800 4182 480 0 FreeSans 1400 90 0 0 wbs_cyc_i
+port 593 nsew
+flabel metal2 s 8798 -800 8910 480 0 FreeSans 1400 90 0 0 wbs_dat_i[0]
+port 594 nsew
+flabel metal2 s 48986 -800 49098 480 0 FreeSans 1400 90 0 0 wbs_dat_i[10]
+port 595 nsew
+flabel metal2 s 52532 -800 52644 480 0 FreeSans 1400 90 0 0 wbs_dat_i[11]
+port 596 nsew
+flabel metal2 s 56078 -800 56190 480 0 FreeSans 1400 90 0 0 wbs_dat_i[12]
+port 597 nsew
+flabel metal2 s 59624 -800 59736 480 0 FreeSans 1400 90 0 0 wbs_dat_i[13]
+port 598 nsew
+flabel metal2 s 63170 -800 63282 480 0 FreeSans 1400 90 0 0 wbs_dat_i[14]
+port 599 nsew
+flabel metal2 s 66716 -800 66828 480 0 FreeSans 1400 90 0 0 wbs_dat_i[15]
+port 600 nsew
+flabel metal2 s 70262 -800 70374 480 0 FreeSans 1400 90 0 0 wbs_dat_i[16]
+port 601 nsew
+flabel metal2 s 73808 -800 73920 480 0 FreeSans 1400 90 0 0 wbs_dat_i[17]
+port 602 nsew
+flabel metal2 s 77354 -800 77466 480 0 FreeSans 1400 90 0 0 wbs_dat_i[18]
+port 603 nsew
+flabel metal2 s 80900 -800 81012 480 0 FreeSans 1400 90 0 0 wbs_dat_i[19]
+port 604 nsew
+flabel metal2 s 13526 -800 13638 480 0 FreeSans 1400 90 0 0 wbs_dat_i[1]
+port 605 nsew
+flabel metal2 s 84446 -800 84558 480 0 FreeSans 1400 90 0 0 wbs_dat_i[20]
+port 606 nsew
+flabel metal2 s 87992 -800 88104 480 0 FreeSans 1400 90 0 0 wbs_dat_i[21]
+port 607 nsew
+flabel metal2 s 91538 -800 91650 480 0 FreeSans 1400 90 0 0 wbs_dat_i[22]
+port 608 nsew
+flabel metal2 s 95084 -800 95196 480 0 FreeSans 1400 90 0 0 wbs_dat_i[23]
+port 609 nsew
+flabel metal2 s 98630 -800 98742 480 0 FreeSans 1400 90 0 0 wbs_dat_i[24]
+port 610 nsew
+flabel metal2 s 102176 -800 102288 480 0 FreeSans 1400 90 0 0 wbs_dat_i[25]
+port 611 nsew
+flabel metal2 s 105722 -800 105834 480 0 FreeSans 1400 90 0 0 wbs_dat_i[26]
+port 612 nsew
+flabel metal2 s 109268 -800 109380 480 0 FreeSans 1400 90 0 0 wbs_dat_i[27]
+port 613 nsew
+flabel metal2 s 112814 -800 112926 480 0 FreeSans 1400 90 0 0 wbs_dat_i[28]
+port 614 nsew
+flabel metal2 s 116360 -800 116472 480 0 FreeSans 1400 90 0 0 wbs_dat_i[29]
+port 615 nsew
+flabel metal2 s 18254 -800 18366 480 0 FreeSans 1400 90 0 0 wbs_dat_i[2]
+port 616 nsew
+flabel metal2 s 119906 -800 120018 480 0 FreeSans 1400 90 0 0 wbs_dat_i[30]
+port 617 nsew
+flabel metal2 s 123452 -800 123564 480 0 FreeSans 1400 90 0 0 wbs_dat_i[31]
+port 618 nsew
+flabel metal2 s 22982 -800 23094 480 0 FreeSans 1400 90 0 0 wbs_dat_i[3]
+port 619 nsew
+flabel metal2 s 27710 -800 27822 480 0 FreeSans 1400 90 0 0 wbs_dat_i[4]
+port 620 nsew
+flabel metal2 s 31256 -800 31368 480 0 FreeSans 1400 90 0 0 wbs_dat_i[5]
+port 621 nsew
+flabel metal2 s 34802 -800 34914 480 0 FreeSans 1400 90 0 0 wbs_dat_i[6]
+port 622 nsew
+flabel metal2 s 38348 -800 38460 480 0 FreeSans 1400 90 0 0 wbs_dat_i[7]
+port 623 nsew
+flabel metal2 s 41894 -800 42006 480 0 FreeSans 1400 90 0 0 wbs_dat_i[8]
+port 624 nsew
+flabel metal2 s 45440 -800 45552 480 0 FreeSans 1400 90 0 0 wbs_dat_i[9]
+port 625 nsew
+flabel metal2 s 9980 -800 10092 480 0 FreeSans 1400 90 0 0 wbs_dat_o[0]
+port 626 nsew
+flabel metal2 s 50168 -800 50280 480 0 FreeSans 1400 90 0 0 wbs_dat_o[10]
+port 627 nsew
+flabel metal2 s 53714 -800 53826 480 0 FreeSans 1400 90 0 0 wbs_dat_o[11]
+port 628 nsew
+flabel metal2 s 57260 -800 57372 480 0 FreeSans 1400 90 0 0 wbs_dat_o[12]
+port 629 nsew
+flabel metal2 s 60806 -800 60918 480 0 FreeSans 1400 90 0 0 wbs_dat_o[13]
+port 630 nsew
+flabel metal2 s 64352 -800 64464 480 0 FreeSans 1400 90 0 0 wbs_dat_o[14]
+port 631 nsew
+flabel metal2 s 67898 -800 68010 480 0 FreeSans 1400 90 0 0 wbs_dat_o[15]
+port 632 nsew
+flabel metal2 s 71444 -800 71556 480 0 FreeSans 1400 90 0 0 wbs_dat_o[16]
+port 633 nsew
+flabel metal2 s 74990 -800 75102 480 0 FreeSans 1400 90 0 0 wbs_dat_o[17]
+port 634 nsew
+flabel metal2 s 78536 -800 78648 480 0 FreeSans 1400 90 0 0 wbs_dat_o[18]
+port 635 nsew
+flabel metal2 s 82082 -800 82194 480 0 FreeSans 1400 90 0 0 wbs_dat_o[19]
+port 636 nsew
+flabel metal2 s 14708 -800 14820 480 0 FreeSans 1400 90 0 0 wbs_dat_o[1]
+port 637 nsew
+flabel metal2 s 85628 -800 85740 480 0 FreeSans 1400 90 0 0 wbs_dat_o[20]
+port 638 nsew
+flabel metal2 s 89174 -800 89286 480 0 FreeSans 1400 90 0 0 wbs_dat_o[21]
+port 639 nsew
+flabel metal2 s 92720 -800 92832 480 0 FreeSans 1400 90 0 0 wbs_dat_o[22]
+port 640 nsew
+flabel metal2 s 96266 -800 96378 480 0 FreeSans 1400 90 0 0 wbs_dat_o[23]
+port 641 nsew
+flabel metal2 s 99812 -800 99924 480 0 FreeSans 1400 90 0 0 wbs_dat_o[24]
+port 642 nsew
+flabel metal2 s 103358 -800 103470 480 0 FreeSans 1400 90 0 0 wbs_dat_o[25]
+port 643 nsew
+flabel metal2 s 106904 -800 107016 480 0 FreeSans 1400 90 0 0 wbs_dat_o[26]
+port 644 nsew
+flabel metal2 s 110450 -800 110562 480 0 FreeSans 1400 90 0 0 wbs_dat_o[27]
+port 645 nsew
+flabel metal2 s 113996 -800 114108 480 0 FreeSans 1400 90 0 0 wbs_dat_o[28]
+port 646 nsew
+flabel metal2 s 117542 -800 117654 480 0 FreeSans 1400 90 0 0 wbs_dat_o[29]
+port 647 nsew
+flabel metal2 s 19436 -800 19548 480 0 FreeSans 1400 90 0 0 wbs_dat_o[2]
+port 648 nsew
+flabel metal2 s 121088 -800 121200 480 0 FreeSans 1400 90 0 0 wbs_dat_o[30]
+port 649 nsew
+flabel metal2 s 124634 -800 124746 480 0 FreeSans 1400 90 0 0 wbs_dat_o[31]
+port 650 nsew
+flabel metal2 s 24164 -800 24276 480 0 FreeSans 1400 90 0 0 wbs_dat_o[3]
+port 651 nsew
+flabel metal2 s 28892 -800 29004 480 0 FreeSans 1400 90 0 0 wbs_dat_o[4]
+port 652 nsew
+flabel metal2 s 32438 -800 32550 480 0 FreeSans 1400 90 0 0 wbs_dat_o[5]
+port 653 nsew
+flabel metal2 s 35984 -800 36096 480 0 FreeSans 1400 90 0 0 wbs_dat_o[6]
+port 654 nsew
+flabel metal2 s 39530 -800 39642 480 0 FreeSans 1400 90 0 0 wbs_dat_o[7]
+port 655 nsew
+flabel metal2 s 43076 -800 43188 480 0 FreeSans 1400 90 0 0 wbs_dat_o[8]
+port 656 nsew
+flabel metal2 s 46622 -800 46734 480 0 FreeSans 1400 90 0 0 wbs_dat_o[9]
+port 657 nsew
+flabel metal2 s 11162 -800 11274 480 0 FreeSans 1400 90 0 0 wbs_sel_i[0]
+port 658 nsew
+flabel metal2 s 15890 -800 16002 480 0 FreeSans 1400 90 0 0 wbs_sel_i[1]
+port 659 nsew
+flabel metal2 s 20618 -800 20730 480 0 FreeSans 1400 90 0 0 wbs_sel_i[2]
+port 660 nsew
+flabel metal2 s 25346 -800 25458 480 0 FreeSans 1400 90 0 0 wbs_sel_i[3]
+port 661 nsew
+flabel metal2 s 5252 -800 5364 480 0 FreeSans 1400 90 0 0 wbs_stb_i
+port 662 nsew
+flabel metal2 s 6434 -800 6546 480 0 FreeSans 1400 90 0 0 wbs_we_i
+port 663 nsew
+<< properties >>
+string FIXED_BBOX 0 0 584000 704000
+<< end >>
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.xor.gds b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.xor.gds
new file mode 100644
index 0000000..3183d07
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper.xor.gds
Binary files differ
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_empty_erased.gds b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..a7df704
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_erased.gds b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_erased.gds
new file mode 100644
index 0000000..a7df704
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_erased.gds
Binary files differ
diff --git a/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_no_zero_areas.gds b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_no_zero_areas.gds
new file mode 100644
index 0000000..672d9a4
--- /dev/null
+++ b/precheck_results/20_MAR_2022___23_50_15/outputs/user_analog_project_wrapper_no_zero_areas.gds
Binary files differ
diff --git a/xschem/.spiceinit b/xschem/.spiceinit
new file mode 100644
index 0000000..e6a73aa
--- /dev/null
+++ b/xschem/.spiceinit
@@ -0,0 +1,5 @@
+* ngspice initialization for sky130
+* assert BSIM compatibility mode with "nf" vs. "W"
+set ngbehavior=hsa
+* "nomodcheck" speeds up loading time
+set ng_nomodcheck
diff --git a/xschem/analog_wrapper_tb.sch b/xschem/analog_wrapper_tb.sch
new file mode 100644
index 0000000..57d89aa
--- /dev/null
+++ b/xschem/analog_wrapper_tb.sch
@@ -0,0 +1,81 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 590 -290 590 -250 { lab=#net1}
+N 300 -250 430 -250 { lab=GND}
+N 510 -250 510 -150 { lab=GND}
+N 690 -190 690 -150 { lab=#net2}
+N 590 -190 590 -150 { lab=GND}
+N 300 -210 400 -210 { lab=#net3}
+N 690 -270 690 -250 { lab=#net4}
+N 300 10 450 10 { lab=io_analog[10:0]}
+N 850 -270 850 0 { lab=io_analog[3]}
+N 780 -270 850 -270 { lab=io_analog[3]}
+N 780 -270 780 -250 { lab=io_analog[3]}
+N 300 30 470 30 { lab=#net5}
+N 300 50 410 50 { lab=#net6}
+N 530 10 660 10 { lab=io_analog[10:0]}
+N 430 -250 510 -250 { lab=GND}
+N 400 -210 480 -210 { lab=#net3}
+N 460 10 530 10 { lab=io_analog[10:0]}
+N 670 0 850 -0 { lab=io_analog[3]}
+N 300 -270 400 -270 { lab=#net7}
+N 300 -230 400 -230 { lab=#net8}
+N 300 -190 400 -190 { lab=#net9}
+N 300 -190 400 -190 { lab=#net9}
+N 300 -170 400 -170 { lab=#net10}
+N 290 -150 390 -150 { lab=#net11}
+N 290 -130 390 -130 { lab=#net12}
+N 290 -110 390 -110 { lab=#net13}
+N 300 -90 400 -90 { lab=#net14}
+N 300 -10 400 -10 { lab=#net15}
+N 300 70 400 70 { lab=#net16}
+N -60 -290 -0 -290 { lab=#net17}
+N -60 -270 0 -270 { lab=#net18}
+N -60 -250 0 -250 { lab=#net19}
+N -60 -230 0 -230 { lab=#net20}
+N -60 -210 0 -210 { lab=#net21}
+N -60 -210 0 -210 { lab=#net21}
+N -60 -190 0 -190 { lab=#net22}
+N -60 -190 0 -190 { lab=#net22}
+N -60 -170 0 -170 { lab=#net23}
+N -60 -150 0 -150 { lab=#net24}
+N -60 -130 0 -130 { lab=#net25}
+N -60 -110 0 -110 { lab=#net26}
+N -60 -90 0 -90 { lab=#net27}
+N -60 -70 0 -70 { lab=#net28}
+N -60 -50 0 -50 { lab=#net29}
+N 300 -70 400 -70 {
+lab=#net30}
+N 300 -50 400 -50 {
+lab=#net31}
+N 300 -30 400 -30 {
+lab=#net32}
+N 450 10 460 10 {
+lab=io_analog[10:0]}
+N 510 -150 590 -150 {
+lab=GND}
+N 510 -150 510 -130 {
+lab=GND}
+N 590 -290 620 -290 {}
+N 620 -290 620 10 {}
+C {user_analog_project_wrapper.sym} 150 -110 0 0 {name=x1}
+C {devices/vsource.sym} 590 -220 0 0 {name=V1 value=1}
+C {devices/vsource.sym} 690 -220 0 0 {name=V2 value="PWL(0.0 0 300u 0 5.3 1.8)"}
+C {devices/vsource.sym} 780 -220 0 0 {name=V3 value="PWL(0.0 0 100u 0 5m 3.3)"}
+C {devices/bus_connect.sym} 660 10 1 1 {name=l1 lab=io_analog[3]}
+C {devices/gnd.sym} 510 -130 0 0 {name=l2 lab=GND}
+C {devices/lab_pin.sym} 570 10 0 0 {name=l12 sig_type=std_logic lab=io_analog[10:0]}
+C {devices/code.sym} 920 -130 0 0 {name=TT_MODELS only_toplevel=false
+format="tcleval(@value )" value=".lib \\\\$::SKYWATER_MODELS\\\\/sky130.lib.spice tt
+.include \\\\$::PDKPATH\\\\/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice"}
+C {devices/code_shown.sym} 1100 -130 0 0 {name=s1
+only_toplevel=false
+value=".control
+tran 10u 20m
+plot V(\\"io_out[11]\\") V(\\"io_out[12]\\") V(\\"io_out[15]\\") V(\\"io_out[16]\\")
++ V(\\"gpio_analog[3]\\") V(\\"gpio_analog[7]\\")
+.endc"}
diff --git a/xschem/analog_wrapper_tb.spice b/xschem/analog_wrapper_tb.spice
new file mode 100644
index 0000000..523a509
--- /dev/null
+++ b/xschem/analog_wrapper_tb.spice
@@ -0,0 +1,283 @@
+**.subckt analog_wrapper_tb
+x1 net1 net6 GND net7 net2 net8 net9 net10 net16 net17 net18 net19 net20 net21[3] net21[2] net21[1]
++ net21[0] net22[31] net22[30] net22[29] net22[28] net22[27] net22[26] net22[25] net22[24] net22[23] net22[22]
++ net22[21] net22[20] net22[19] net22[18] net22[17] net22[16] net22[15] net22[14] net22[13] net22[12] net22[11]
++ net22[10] net22[9] net22[8] net22[7] net22[6] net22[5] net22[4] net22[3] net22[2] net22[1] net22[0] net23[31]
++ net23[30] net23[29] net23[28] net23[27] net23[26] net23[25] net23[24] net23[23] net23[22] net23[21] net23[20]
++ net23[19] net23[18] net23[17] net23[16] net23[15] net23[14] net23[13] net23[12] net23[11] net23[10] net23[9]
++ net23[8] net23[7] net23[6] net23[5] net23[4] net23[3] net23[2] net23[1] net23[0] net11 net12[31] net12[30]
++ net12[29] net12[28] net12[27] net12[26] net12[25] net12[24] net12[23] net12[22] net12[21] net12[20] net12[19]
++ net12[18] net12[17] net12[16] net12[15] net12[14] net12[13] net12[12] net12[11] net12[10] net12[9] net12[8]
++ net12[7] net12[6] net12[5] net12[4] net12[3] net12[2] net12[1] net12[0] net24[127] net24[126] net24[125]
++ net24[124] net24[123] net24[122] net24[121] net24[120] net24[119] net24[118] net24[117] net24[116] net24[115]
++ net24[114] net24[113] net24[112] net24[111] net24[110] net24[109] net24[108] net24[107] net24[106] net24[105]
++ net24[104] net24[103] net24[102] net24[101] net24[100] net24[99] net24[98] net24[97] net24[96] net24[95]
++ net24[94] net24[93] net24[92] net24[91] net24[90] net24[89] net24[88] net24[87] net24[86] net24[85] net24[84]
++ net24[83] net24[82] net24[81] net24[80] net24[79] net24[78] net24[77] net24[76] net24[75] net24[74] net24[73]
++ net24[72] net24[71] net24[70] net24[69] net24[68] net24[67] net24[66] net24[65] net24[64] net24[63] net24[62]
++ net24[61] net24[60] net24[59] net24[58] net24[57] net24[56] net24[55] net24[54] net24[53] net24[52] net24[51]
++ net24[50] net24[49] net24[48] net24[47] net24[46] net24[45] net24[44] net24[43] net24[42] net24[41] net24[40]
++ net24[39] net24[38] net24[37] net24[36] net24[35] net24[34] net24[33] net24[32] net24[31] net24[30] net24[29]
++ net24[28] net24[27] net24[26] net24[25] net24[24] net24[23] net24[22] net24[21] net24[20] net24[19] net24[18]
++ net24[17] net24[16] net24[15] net24[14] net24[13] net24[12] net24[11] net24[10] net24[9] net24[8] net24[7]
++ net24[6] net24[5] net24[4] net24[3] net24[2] net24[1] net24[0] net13[127] net13[126] net13[125] net13[124]
++ net13[123] net13[122] net13[121] net13[120] net13[119] net13[118] net13[117] net13[116] net13[115] net13[114]
++ net13[113] net13[112] net13[111] net13[110] net13[109] net13[108] net13[107] net13[106] net13[105] net13[104]
++ net13[103] net13[102] net13[101] net13[100] net13[99] net13[98] net13[97] net13[96] net13[95] net13[94]
++ net13[93] net13[92] net13[91] net13[90] net13[89] net13[88] net13[87] net13[86] net13[85] net13[84] net13[83]
++ net13[82] net13[81] net13[80] net13[79] net13[78] net13[77] net13[76] net13[75] net13[74] net13[73] net13[72]
++ net13[71] net13[70] net13[69] net13[68] net13[67] net13[66] net13[65] net13[64] net13[63] net13[62] net13[61]
++ net13[60] net13[59] net13[58] net13[57] net13[56] net13[55] net13[54] net13[53] net13[52] net13[51] net13[50]
++ net13[49] net13[48] net13[47] net13[46] net13[45] net13[44] net13[43] net13[42] net13[41] net13[40] net13[39]
++ net13[38] net13[37] net13[36] net13[35] net13[34] net13[33] net13[32] net13[31] net13[30] net13[29] net13[28]
++ net13[27] net13[26] net13[25] net13[24] net13[23] net13[22] net13[21] net13[20] net13[19] net13[18] net13[17]
++ net13[16] net13[15] net13[14] net13[13] net13[12] net13[11] net13[10] net13[9] net13[8] net13[7] net13[6]
++ net13[5] net13[4] net13[3] net13[2] net13[1] net13[0] net25[127] net25[126] net25[125] net25[124] net25[123]
++ net25[122] net25[121] net25[120] net25[119] net25[118] net25[117] net25[116] net25[115] net25[114] net25[113]
++ net25[112] net25[111] net25[110] net25[109] net25[108] net25[107] net25[106] net25[105] net25[104] net25[103]
++ net25[102] net25[101] net25[100] net25[99] net25[98] net25[97] net25[96] net25[95] net25[94] net25[93]
++ net25[92] net25[91] net25[90] net25[89] net25[88] net25[87] net25[86] net25[85] net25[84] net25[83] net25[82]
++ net25[81] net25[80] net25[79] net25[78] net25[77] net25[76] net25[75] net25[74] net25[73] net25[72] net25[71]
++ net25[70] net25[69] net25[68] net25[67] net25[66] net25[65] net25[64] net25[63] net25[62] net25[61] net25[60]
++ net25[59] net25[58] net25[57] net25[56] net25[55] net25[54] net25[53] net25[52] net25[51] net25[50] net25[49]
++ net25[48] net25[47] net25[46] net25[45] net25[44] net25[43] net25[42] net25[41] net25[40] net25[39] net25[38]
++ net25[37] net25[36] net25[35] net25[34] net25[33] net25[32] net25[31] net25[30] net25[29] net25[28] net25[27]
++ net25[26] net25[25] net25[24] net25[23] net25[22] net25[21] net25[20] net25[19] net25[18] net25[17] net25[16]
++ net25[15] net25[14] net25[13] net25[12] net25[11] net25[10] net25[9] net25[8] net25[7] net25[6] net25[5]
++ net25[4] net25[3] net25[2] net25[1] net25[0] net26[26] net26[25] net26[24] net26[23] net26[22] net26[21]
++ net26[20] net26[19] net26[18] net26[17] net26[16] net26[15] net26[14] net26[13] net26[12] net26[11] net26[10]
++ net26[9] net26[8] net26[7] net26[6] net26[5] net26[4] net26[3] net26[2] net26[1] net26[0] net27[26]
++ net27[25] net27[24] net27[23] net27[22] net27[21] net27[20] net27[19] net27[18] net27[17] net27[16] net27[15]
++ net27[14] net27[13] net27[12] net27[11] net27[10] net27[9] net27[8] net27[7] net27[6] net27[5] net27[4]
++ net27[3] net27[2] net27[1] net27[0] net29[26] net29[25] net29[24] net29[23] net29[22] net29[21] net29[20]
++ net29[19] net29[18] net29[17] net29[16] net29[15] net29[14] net29[13] net29[12] net29[11] net29[10] net29[9]
++ net29[8] net29[7] net29[6] net29[5] net29[4] net29[3] net29[2] net29[1] net29[0] net30[26] net30[25]
++ net30[24] net30[23] net30[22] net30[21] net30[20] net30[19] net30[18] net30[17] net30[16] net30[15] net30[14]
++ net30[13] net30[12] net30[11] net30[10] net30[9] net30[8] net30[7] net30[6] net30[5] net30[4] net30[3]
++ net30[2] net30[1] net30[0] net31[17] net31[16] net31[15] net31[14] net31[13] net31[12] net31[11] net31[10]
++ net31[9] net31[8] net31[7] net31[6] net31[5] net31[4] net31[3] net31[2] net31[1] net31[0] net14[17]
++ net14[16] net14[15] net14[14] net14[13] net14[12] net14[11] net14[10] net14[9] net14[8] net14[7] net14[6]
++ net14[5] net14[4] net14[3] net14[2] net14[1] net14[0] net3[10] net3[9] net3[8] net3[7] net3[6] net3[5]
++ net3[4] net3[3] net3[2] net3[1] net3[0] net4[2] net4[1] net4[0] net5[2] net5[1] net5[0] net28 net15[2]
++ net15[1] net15[0] user_analog_project_wrapper
+V1 net1 GND PWL(0.0 0 400u 0 5.4m 3.3)
+V2 net2 GND PWL(0.0 0 300u 0 5.3 1.8)
+V3 io_analog[4] GND PWL(0.0 0 100u 0 5m 3.3)
+**** begin user architecture code
+.lib /usr/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt
+.include /usr/share/pdk/sky130A/libs.ref/sky130_fd_sc_hvl/spice/sky130_fd_sc_hvl.spice
+
+.control
+tran 10u 20m
+plot V("io_out[11]") V("io_out[12]") V("io_out[15]") V("io_out[16]")  V("gpio_analog[3]")
++ V("gpio_analog[7]")
+.endc
+
+**** end user architecture code
+**.ends
+
+* expanding   symbol:  user_analog_project_wrapper.sym # of pins=32
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/user_analog_project_wrapper.sch
+.subckt user_analog_project_wrapper  vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
++ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
++ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
++ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
++ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
++ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
++ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
++ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
++ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
++ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
++ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
++ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
++ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
++ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
++ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
++ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
++ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
++ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
++ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
++ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
++ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
++ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
++ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
++ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
++ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
++ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
++ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
++ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
++ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
++ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
++ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
++ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
++ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
++ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
++ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
++ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
++ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
++ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
++ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
++ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
++ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
++ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
++ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
++ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
++ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
++ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
++ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
++ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
++ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
++ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
++ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0]
++ la_oenb[127] la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120]
++ la_oenb[119] la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112]
++ la_oenb[111] la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104]
++ la_oenb[103] la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95]
++ la_oenb[94] la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86]
++ la_oenb[85] la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77]
++ la_oenb[76] la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68]
++ la_oenb[67] la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59]
++ la_oenb[58] la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50]
++ la_oenb[49] la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41]
++ la_oenb[40] la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32]
++ la_oenb[31] la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23]
++ la_oenb[22] la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14]
++ la_oenb[13] la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5]
++ la_oenb[4] la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0] io_in[26] io_in[25] io_in[24] io_in[23] io_in[22]
++ io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15] io_in[14] io_in[13] io_in[12] io_in[11]
++ io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4] io_in[3] io_in[2] io_in[1] io_in[0]
++ io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22] io_in_3v3[21] io_in_3v3[20] io_in_3v3[19]
++ io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14] io_in_3v3[13] io_in_3v3[12] io_in_3v3[11]
++ io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6] io_in_3v3[5] io_in_3v3[4] io_in_3v3[3]
++ io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] io_out[26] io_out[25] io_out[24] io_out[23] io_out[22] io_out[21]
++ io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15] io_out[14] io_out[13] io_out[12] io_out[11]
++ io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5] io_out[4] io_out[3] io_out[2] io_out[1] io_out[0]
++ io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22] io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17]
++ io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12] io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7]
++ io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2] io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16]
++ gpio_analog[15] gpio_analog[14] gpio_analog[13] gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9]
++ gpio_analog[8] gpio_analog[7] gpio_analog[6] gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2]
++ gpio_analog[1] gpio_analog[0] gpio_noesd[17] gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13]
++ gpio_noesd[12] gpio_noesd[11] gpio_noesd[10] gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5]
++ gpio_noesd[4] gpio_noesd[3] gpio_noesd[2] gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8]
++ io_analog[7] io_analog[6] io_analog[5] io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0]
++ io_clamp_high[2] io_clamp_high[1] io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_clock2
++ user_irq[2] user_irq[1] user_irq[0]
+*.iopin vdda1
+*.iopin vdda2
+*.iopin vssa1
+*.iopin vssa2
+*.iopin vccd1
+*.iopin vccd2
+*.iopin vssd1
+*.iopin vssd2
+*.ipin wb_clk_i
+*.ipin wb_rst_i
+*.ipin wbs_stb_i
+*.ipin wbs_cyc_i
+*.ipin wbs_we_i
+*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
+*.ipin
+*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
+*.ipin
+*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
+*.opin wbs_ack_o
+*.opin
+*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
+*.ipin
+*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
+*.opin
+*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
+*.ipin
+*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
+*.ipin
+*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
+*.ipin user_clock2
+*.opin
+*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
+*.opin
+*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
+*.iopin
+*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
+*.iopin
+*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
+*.iopin
+*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
+*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
+*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
+*.opin user_irq[2],user_irq[1],user_irq[0]
+*.ipin
+*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
+x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
+x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
+R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R8 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=0.56 L=0.49 m=1
+R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=0.56 L=0.31 m=1
+R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=0.56 L=0.58 m=1
+R12 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=0.56 L=0.6 m=1
+.ends
+
+
+* expanding   symbol:  example_por.sym # of pins=6
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
+.subckt example_por  vdd3v3 vdd1v8 porb_h porb_l por_l vss
+*.iopin vdd3v3
+*.iopin vss
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+*.iopin vdd1v8
+XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
+XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
+XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1 
+XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
+XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1 
+XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
+XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1 
+XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
+x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
+x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
+x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
+x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
+.ends
+
+.GLOBAL GND
+** flattened .save nodes
+.end
diff --git a/xschem/bsim4v5.out b/xschem/bsim4v5.out
new file mode 100644
index 0000000..c71cf6e
--- /dev/null
+++ b/xschem/bsim4v5.out
@@ -0,0 +1,5 @@
+BSIM4v5: Berkeley Short Channel IGFET Model-4
+Developed by Xuemei (Jane) Xi, Mohan Dunga, Prof. Ali Niknejad and Prof. Chenming Hu in 2003.
+
+++++++++++ BSIM4v5 PARAMETER CHECKING BELOW ++++++++++
+Model = xdet.xm1:sky130_fd_pr__nfet_01v8__model.8
diff --git a/xschem/detector.sch b/xschem/detector.sch
new file mode 100644
index 0000000..3df1cf7
--- /dev/null
+++ b/xschem/detector.sch
@@ -0,0 +1,50 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 130 90 130 110 { lab=gnd}
+N 130 110 130 140 { lab=gnd}
+N 130 60 220 60 { lab=gnd}
+N 220 60 220 120 { lab=gnd}
+N 130 120 220 120 { lab=gnd}
+N 130 -10 130 30 { lab=#net1}
+N 350 110 350 140 { lab=gnd}
+N 350 -10 350 50 { lab=do}
+N -50 -10 -10 -10 { lab=din}
+N 350 -10 410 -10 { lab=do}
+N 50 60 90 60 { lab=dB}
+N 130 140 350 140 { lab=gnd}
+N 240 140 240 160 { lab=gnd}
+N 50 -10 130 -10 { lab=#net1}
+N 130 -10 200 -10 { lab=#net1}
+N 260 -10 350 -10 { lab=do}
+N 230 10 230 80 { lab=gnd}
+N 220 80 230 80 { lab=gnd}
+C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/nfet_01v8.sym} 110 60 0 0 {name=M1
+L=0.15
+W=22.5
+nf=1 
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'" 
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'" 
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {/edatools/opentools/xschem/xschem_library/devices/ipin.sym} -50 -10 0 0 {name=p1 lab=din}
+C {/edatools/opentools/xschem/xschem_library/devices/ipin.sym} 60 60 0 0 {name=p3 lab=dB}
+C {/edatools/opentools/xschem/xschem_library/devices/opin.sym} 410 -10 0 0 {name=p2 lab=do}
+C {/edatools/opentools/xschem/xschem_library/devices/iopin.sym} 240 150 1 0 {name=p4 lab=gnd}
+C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/cap_mim_m3_1.sym} 350 80 0 0 {name=C1 model=cap_mim_m3_1 W=87 L=87 MF=1 spiceprefix=X}
+C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/cap_mim_m3_1.sym} 20 -10 3 0 {name=C2 model=cap_mim_m3_1 W=87 L=87 MF=1 spiceprefix=X}
+C {/home/wisla/sky130_skel/xschem_sky130/sky130_fd_pr/res_xhigh_po.sym} 230 -10 3 0 {name=R2
+W=0.35
+L=18.6
+model=res_xhigh_po
+spiceprefix=X
+mult=1}
diff --git a/xschem/detector.spice b/xschem/detector.spice
new file mode 100644
index 0000000..667fdb1
--- /dev/null
+++ b/xschem/detector.spice
@@ -0,0 +1,12 @@
+** sch_path:
+*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/xschem/detector.sch
+.subckt detector din dB do gnd
+*.PININFO din:I dB:I do:O gnd:B
+XM1 net1 dB gnd gnd sky130_fd_pr__nfet_01v8 L=0.15 W=22.5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XC1 do gnd sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
+XC2 din net1 sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
+XR2 do net1 gnd sky130_fd_pr__res_xhigh_po W=0.35 L=18.6 mult=1 m=1
+.ends
+.end
diff --git a/xschem/detector.sym b/xschem/detector.sym
new file mode 100644
index 0000000..1acfd42
--- /dev/null
+++ b/xschem/detector.sym
@@ -0,0 +1,32 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=X1"}
+V {}
+S {}
+E {}
+L 4 130 20 130 40 {}
+L 4 130 40 150 30 {}
+L 4 130 20 150 30 {}
+L 4 150 20 150 40 {}
+L 4 150 30 160 30 {}
+L 4 120 30 130 30 {}
+L 4 90 20 110 20 {}
+L 4 90 40 110 40 {}
+L 4 140 50 140 60 {}
+L 4 170 30 180 30 {}
+B 5 87.5 17.5 92.5 22.5 {name=din
+dir=in}
+B 5 87.5 37.5 92.5 42.5 {name=dB
+dir=in}
+B 5 137.5 57.5 142.5 62.5 {name=ground
+dir=inout}
+B 5 177.5 27.5 182.5 32.5 {name=do
+dir=out}
+P 4 5 110 10 170 10 170 50 110 50 110 10 {}
+T {@name} 110 -5 0 0 0.2 0.2 {}
+T {din} 95 10 0 0 0.1 0.1 {}
+T {db} 90 30 0 0 0.1 0.1 {}
+T {do} 172.5 20 0 0 0.1 0.1 {}
+T {gnd} 145 55 0 0 0.1 0.1 {}
diff --git a/xschem/detector_tb.spice b/xschem/detector_tb.spice
new file mode 100644
index 0000000..b65dbd9
--- /dev/null
+++ b/xschem/detector_tb.spice
@@ -0,0 +1,15 @@
+*************************************************************************************
+.TITLE TEST BENCH DETECTOR
+
+.LIB /edatools/pdks/skywater-pdk/libraries/sky130_fd_pr_ngspice/latest/models/sky130.lib.spice tt
+.INCLUDE /home/wisla/sky130_skel/Myschematics/Receptor/askMod.spice
+.INCLUDE /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/xschem/detector.spice
+
+* CALL SUBCIRCUIT
+Xdet din db do GND detectorPassivo
+Xask din GND askMod
+Vb db GND 1
+
+.TRAN 1p 250n
+.GLOBAL GND
+.END
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
new file mode 100644
index 0000000..56c2b6e
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.sch
@@ -0,0 +1,59 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 3630 -360 3730 -360 { lab=io_analog[3]}
+N 3850 -270 3850 -180 {
+lab=vssa1}
+N 3770 -180 3850 -180 {
+lab=vssa1}
+N 3630 -250 3730 -250 { lab=io_analog[1]}
+N 3730 -310 3800 -310 {
+lab=io_analog[3]}
+N 3730 -360 3730 -310 {
+lab=io_analog[3]}
+N 3730 -290 3800 -290 {
+lab=io_analog[1]}
+N 3730 -290 3730 -250 {
+lab=io_analog[1]}
+N 3890 -300 4020 -300 {
+lab=io_analog[2]}
+C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1}
+C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2}
+C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1}
+C {devices/iopin.sym} 3240 -380 0 0 {name=p4 lab=vssa2}
+C {devices/iopin.sym} 3240 -350 0 0 {name=p5 lab=vccd1}
+C {devices/iopin.sym} 3240 -320 0 0 {name=p6 lab=vccd2}
+C {devices/iopin.sym} 3240 -290 0 0 {name=p7 lab=vssd1}
+C {devices/iopin.sym} 3240 -260 0 0 {name=p8 lab=vssd2}
+C {devices/ipin.sym} 3290 -190 0 0 {name=p9 lab=wb_clk_i}
+C {devices/ipin.sym} 3290 -160 0 0 {name=p10 lab=wb_rst_i}
+C {devices/ipin.sym} 3290 -130 0 0 {name=p11 lab=wbs_stb_i}
+C {devices/ipin.sym} 3290 -100 0 0 {name=p12 lab=wbs_cyc_i}
+C {devices/ipin.sym} 3290 -70 0 0 {name=p13 lab=wbs_we_i}
+C {devices/ipin.sym} 3290 -40 0 0 {name=p14 lab=wbs_sel_i[3:0]}
+C {devices/ipin.sym} 3290 -10 0 0 {name=p15 lab=wbs_dat_i[31:0]}
+C {devices/ipin.sym} 3290 20 0 0 {name=p16 lab=wbs_adr_i[31:0]}
+C {devices/opin.sym} 3280 80 0 0 {name=p17 lab=wbs_ack_o}
+C {devices/opin.sym} 3280 110 0 0 {name=p18 lab=wbs_dat_o[31:0]}
+C {devices/ipin.sym} 3290 150 0 0 {name=p19 lab=la_data_in[127:0]}
+C {devices/opin.sym} 3280 180 0 0 {name=p20 lab=la_data_out[127:0]}
+C {devices/ipin.sym} 3290 260 0 0 {name=p21 lab=io_in[26:0]}
+C {devices/ipin.sym} 3290 290 0 0 {name=p22 lab=io_in_3v3[26:0]}
+C {devices/ipin.sym} 3280 570 0 0 {name=p23 lab=user_clock2}
+C {devices/opin.sym} 3280 320 0 0 {name=p24 lab=io_out[26:0]}
+C {devices/opin.sym} 3280 350 0 0 {name=p25 lab=io_oeb[26:0]}
+C {devices/iopin.sym} 3250 410 0 0 {name=p26 lab=gpio_analog[17:0]}
+C {devices/iopin.sym} 3250 440 0 0 {name=p27 lab=gpio_noesd[17:0]}
+C {devices/iopin.sym} 3250 470 0 0 {name=p29 lab=io_analog[10:0]}
+C {devices/iopin.sym} 3250 500 0 0 {name=p30 lab=io_clamp_high[2:0]}
+C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]}
+C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]}
+C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]}
+C {devices/lab_pin.sym} 3630 -360 0 0 {name=l1 sig_type=std_logic lab=io_analog[3]}
+C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4020 -300 0 1 {name=l3 sig_type=std_logic lab=io_analog[2]}
+C {devices/lab_pin.sym} 3630 -250 0 0 {name=l4 sig_type=std_logic lab=io_analog[1]}
+C {detector.sym} 3710 -330 0 0 {name=Xdet}
diff --git a/xschem/user_analog_project_wrapper.spice b/xschem/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..03af33c
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.spice
@@ -0,0 +1,111 @@
+** sch_path:
+*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/xschem/user_analog_project_wrapper.sch
+.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
++ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
++ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
++ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
++ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
++ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
++ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
++ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
++ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
++ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
++ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
++ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
++ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
++ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
++ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
++ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
++ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
++ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
++ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
++ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
++ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
++ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
++ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
++ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
++ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
++ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
++ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
++ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
++ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
++ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
++ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
++ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
++ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
++ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
++ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
++ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
++ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
++ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
++ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
++ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
++ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
++ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
++ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
++ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
++ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
++ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
++ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
++ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
++ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
++ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
++ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0] io_in[26]
++ io_in[25] io_in[24] io_in[23] io_in[22] io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15]
++ io_in[14] io_in[13] io_in[12] io_in[11] io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4]
++ io_in[3] io_in[2] io_in[1] io_in[0] io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22]
++ io_in_3v3[21] io_in_3v3[20] io_in_3v3[19] io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14]
++ io_in_3v3[13] io_in_3v3[12] io_in_3v3[11] io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6]
++ io_in_3v3[5] io_in_3v3[4] io_in_3v3[3] io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] user_clock2 io_out[26] io_out[25]
++ io_out[24] io_out[23] io_out[22] io_out[21] io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15]
++ io_out[14] io_out[13] io_out[12] io_out[11] io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5]
++ io_out[4] io_out[3] io_out[2] io_out[1] io_out[0] io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22]
++ io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17] io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12]
++ io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7] io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2]
++ io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16] gpio_analog[15] gpio_analog[14] gpio_analog[13]
++ gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9] gpio_analog[8] gpio_analog[7] gpio_analog[6]
++ gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2] gpio_analog[1] gpio_analog[0] gpio_noesd[17]
++ gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13] gpio_noesd[12] gpio_noesd[11] gpio_noesd[10]
++ gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5] gpio_noesd[4] gpio_noesd[3] gpio_noesd[2]
++ gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8] io_analog[7] io_analog[6] io_analog[5]
++ io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0] io_clamp_high[2] io_clamp_high[1]
++ io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_irq[2] user_irq[1] user_irq[0] la_oenb[127]
++ la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120] la_oenb[119]
++ la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112] la_oenb[111]
++ la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104] la_oenb[103]
++ la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95] la_oenb[94]
++ la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86] la_oenb[85]
++ la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77] la_oenb[76]
++ la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68] la_oenb[67]
++ la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59] la_oenb[58]
++ la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50] la_oenb[49]
++ la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41] la_oenb[40]
++ la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32] la_oenb[31]
++ la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23] la_oenb[22]
++ la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14] la_oenb[13]
++ la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5] la_oenb[4]
++ la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0]
+*.PININFO vdda1:B vdda2:B vssa1:B vssa2:B vccd1:B vccd2:B vssd1:B vssd2:B wb_clk_i:I wb_rst_i:I
+*+ wbs_stb_i:I wbs_cyc_i:I wbs_we_i:I wbs_sel_i[3:0]:I wbs_dat_i[31:0]:I wbs_adr_i[31:0]:I wbs_ack_o:O
+*+ wbs_dat_o[31:0]:O la_data_in[127:0]:I la_data_out[127:0]:O io_in[26:0]:I io_in_3v3[26:0]:I user_clock2:I
+*+ io_out[26:0]:O io_oeb[26:0]:O gpio_analog[17:0]:B gpio_noesd[17:0]:B io_analog[10:0]:B io_clamp_high[2:0]:B
+*+ io_clamp_low[2:0]:B user_irq[2:0]:O la_oenb[127:0]:I
+Xdet io_analog[3] io_analog[1] io_analog[2] vssa1 detector
+.ends
+
+* expanding   symbol:  detector.sym # of pins=4
+** sym_path:
+*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/xschem/detector.sym
+** sch_path:
+*+ /home/wisla/sky130_skel/Myschematics/Receptor/my_chip/caravel_user_project_analog/xschem/detector.sch
+.subckt detector  din dB do gnd
+*.PININFO din:I dB:I do:O gnd:B
+XM1 net1 dB gnd gnd sky130_fd_pr__nfet_01v8 L=0.15 W=22.5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XC1 do gnd sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
+XC2 din net1 sky130_fd_pr__cap_mim_m3_1 W=87 L=87 MF=1 m=1
+XR2 do net1 gnd sky130_fd_pr__res_xhigh_po W=0.35 L=18.6 mult=1 m=1
+.ends
+.global gnd
+.end
diff --git a/xschem/user_analog_project_wrapper.sym b/xschem/user_analog_project_wrapper.sym
new file mode 100644
index 0000000..a561ba9
--- /dev/null
+++ b/xschem/user_analog_project_wrapper.sym
@@ -0,0 +1,111 @@
+v {xschem version=2.9.9 file_version=1.2 }
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -190 130 -190 {}
+L 4 -130 190 130 190 {}
+L 4 -130 -190 -130 190 {}
+L 4 130 -190 130 190 {}
+L 4 -150 -180 -130 -180 {}
+L 4 -150 -160 -130 -160 {}
+L 4 -150 -140 -130 -140 {}
+L 4 -150 -120 -130 -120 {}
+L 4 -150 -100 -130 -100 {}
+L 4 -150 -80 -130 -80 {}
+L 4 -150 -60 -130 -60 {}
+L 4 -150 -40 -130 -40 {}
+L 4 130 -20 150 -20 {}
+L 4 130 0 150 0 {}
+L 4 -150 -20 -130 -20 {}
+L 4 130 20 150 20 {}
+L 4 -150 0 -130 0 {}
+L 4 -150 20 -130 20 {}
+L 4 -150 40 -130 40 {}
+L 4 130 40 150 40 {}
+L 4 130 60 150 60 {}
+L 4 -150 60 -130 60 {}
+L 4 130 180 150 180 {}
+L 7 130 -180 150 -180 {}
+L 7 130 -160 150 -160 {}
+L 7 130 -140 150 -140 {}
+L 7 130 -120 150 -120 {}
+L 7 130 -100 150 -100 {}
+L 7 130 -80 150 -80 {}
+L 7 130 -60 150 -60 {}
+L 7 130 -40 150 -40 {}
+L 7 130 80 150 80 {}
+L 7 130 100 150 100 {}
+L 7 130 120 150 120 {}
+L 7 130 140 150 140 {}
+L 7 130 160 150 160 {}
+B 5 147.5 -182.5 152.5 -177.5 {name=vdda1 dir=inout }
+B 5 147.5 -162.5 152.5 -157.5 {name=vdda2 dir=inout }
+B 5 147.5 -142.5 152.5 -137.5 {name=vssa1 dir=inout }
+B 5 147.5 -122.5 152.5 -117.5 {name=vssa2 dir=inout }
+B 5 147.5 -102.5 152.5 -97.5 {name=vccd1 dir=inout }
+B 5 147.5 -82.5 152.5 -77.5 {name=vccd2 dir=inout }
+B 5 147.5 -62.5 152.5 -57.5 {name=vssd1 dir=inout }
+B 5 147.5 -42.5 152.5 -37.5 {name=vssd2 dir=inout }
+B 5 -152.5 -182.5 -147.5 -177.5 {name=wb_clk_i dir=in }
+B 5 -152.5 -162.5 -147.5 -157.5 {name=wb_rst_i dir=in }
+B 5 -152.5 -142.5 -147.5 -137.5 {name=wbs_stb_i dir=in }
+B 5 -152.5 -122.5 -147.5 -117.5 {name=wbs_cyc_i dir=in }
+B 5 -152.5 -102.5 -147.5 -97.5 {name=wbs_we_i dir=in }
+B 5 -152.5 -82.5 -147.5 -77.5 {name=wbs_sel_i[3:0] dir=in }
+B 5 -152.5 -62.5 -147.5 -57.5 {name=wbs_dat_i[31:0] dir=in }
+B 5 -152.5 -42.5 -147.5 -37.5 {name=wbs_adr_i[31:0] dir=in }
+B 5 147.5 -22.5 152.5 -17.5 {name=wbs_ack_o dir=out }
+B 5 147.5 -2.5 152.5 2.5 {name=wbs_dat_o[31:0] dir=out }
+B 5 -152.5 -22.5 -147.5 -17.5 {name=la_data_in[127:0] dir=in }
+B 5 147.5 17.5 152.5 22.5 {name=la_data_out[127:0] dir=out }
+B 5 -152.5 -2.5 -147.5 2.5 {name=la_oenb[127:0] dir=in }
+B 5 -152.5 17.5 -147.5 22.5 {name=io_in[26:0] dir=in }
+B 5 -152.5 37.5 -147.5 42.5 {name=io_in_3v3[26:0] dir=in }
+B 5 147.5 37.5 152.5 42.5 {name=io_out[26:0] dir=out }
+B 5 147.5 57.5 152.5 62.5 {name=io_oeb[26:0] dir=out }
+B 5 147.5 77.5 152.5 82.5 {name=gpio_analog[17:0] dir=inout }
+B 5 147.5 97.5 152.5 102.5 {name=gpio_noesd[17:0] dir=inout }
+B 5 147.5 117.5 152.5 122.5 {name=io_analog[10:0] dir=inout }
+B 5 147.5 137.5 152.5 142.5 {name=io_clamp_high[2:0] dir=inout }
+B 5 147.5 157.5 152.5 162.5 {name=io_clamp_low[2:0] dir=inout }
+B 5 -152.5 57.5 -147.5 62.5 {name=user_clock2 dir=in }
+B 5 147.5 177.5 152.5 182.5 {name=user_irq[2:0] dir=out }
+T {@symname} -119.5 114 0 0 0.3 0.3 {}
+T {@name} 135 -202 0 0 0.2 0.2 {}
+T {vdda1} 125 -184 0 1 0.2 0.2 {}
+T {vdda2} 125 -164 0 1 0.2 0.2 {}
+T {vssa1} 125 -144 0 1 0.2 0.2 {}
+T {vssa2} 125 -124 0 1 0.2 0.2 {}
+T {vccd1} 125 -104 0 1 0.2 0.2 {}
+T {vccd2} 125 -84 0 1 0.2 0.2 {}
+T {vssd1} 125 -64 0 1 0.2 0.2 {}
+T {vssd2} 125 -44 0 1 0.2 0.2 {}
+T {wb_clk_i} -125 -184 0 0 0.2 0.2 {}
+T {wb_rst_i} -125 -164 0 0 0.2 0.2 {}
+T {wbs_stb_i} -125 -144 0 0 0.2 0.2 {}
+T {wbs_cyc_i} -125 -124 0 0 0.2 0.2 {}
+T {wbs_we_i} -125 -104 0 0 0.2 0.2 {}
+T {wbs_sel_i[3:0]} -125 -84 0 0 0.2 0.2 {}
+T {wbs_dat_i[31:0]} -125 -64 0 0 0.2 0.2 {}
+T {wbs_adr_i[31:0]} -125 -44 0 0 0.2 0.2 {}
+T {wbs_ack_o} 125 -24 0 1 0.2 0.2 {}
+T {wbs_dat_o[31:0]} 125 -4 0 1 0.2 0.2 {}
+T {la_data_in[127:0]} -125 -24 0 0 0.2 0.2 {}
+T {la_data_out[127:0]} 125 16 0 1 0.2 0.2 {}
+T {la_oenb[127:0]} -125 -4 0 0 0.2 0.2 {}
+T {io_in[26:0]} -125 16 0 0 0.2 0.2 {}
+T {io_in_3v3[26:0]} -125 36 0 0 0.2 0.2 {}
+T {io_out[26:0]} 125 36 0 1 0.2 0.2 {}
+T {io_oeb[26:0]} 125 56 0 1 0.2 0.2 {}
+T {gpio_analog[17:0]} 125 76 0 1 0.2 0.2 {}
+T {gpio_noesd[17:0]} 125 96 0 1 0.2 0.2 {}
+T {io_analog[10:0]} 125 116 0 1 0.2 0.2 {}
+T {io_clamp_high[2:0]} 125 136 0 1 0.2 0.2 {}
+T {io_clamp_low[2:0]} 125 156 0 1 0.2 0.2 {}
+T {user_clock2} -125 56 0 0 0.2 0.2 {}
+T {user_irq[2:0]} 125 176 0 1 0.2 0.2 {}
diff --git a/xschem/xschemrc b/xschem/xschemrc
new file mode 100644
index 0000000..7caf96e
--- /dev/null
+++ b/xschem/xschemrc
@@ -0,0 +1,322 @@
+#### xschemrc system configuration file
+
+#### values may be overridden by user's ~/.xschem/xschemrc configuration file
+#### or by project-local ./xschemrc
+
+###########################################################################
+#### XSCHEM INSTALLATION DIRECTORY: XSCHEM_SHAREDIR
+###########################################################################
+#### Normally there is no reason to set this variable if using standard
+#### installation. Location of files is set at compile time but may be overridden
+#### with following line:
+# set XSCHEM_SHAREDIR $env(HOME)/share/xschem
+
+###########################################################################
+#### XSCHEM SYSTEM-WIDE DESIGN LIBRARY PATHS: XSCHEM_LIBRARY_PATH
+###########################################################################
+#### If unset xschem starts with XSCHEM_LIBRARY_PATH set to the default, typically:
+# /home/schippes/.xschem/xschem_library
+# /home/schippes/share/xschem/xschem_library/devices
+# /home/schippes/share/doc/xschem/examples
+# /home/schippes/share/doc/xschem/ngspice
+# /home/schippes/share/doc/xschem/logic
+# /home/schippes/share/doc/xschem/xschem_simulator
+# /home/schippes/share/doc/xschem/binto7seg
+# /home/schippes/share/doc/xschem/pcb
+# /home/schippes/share/doc/xschem/rom8k
+
+#### Flush any previous definition
+set XSCHEM_LIBRARY_PATH {}
+#### include devices/*.sym
+append XSCHEM_LIBRARY_PATH ${XSCHEM_SHAREDIR}/xschem_library
+#### include skywater libraries. Here i use [pwd]. This works if i start xschem from here.
+append XSCHEM_LIBRARY_PATH :$env(PWD)
+# append XSCHEM_LIBRARY_PATH :/mnt/sda7/home/schippes/pdks/sky130A/libs.tech/xschem
+#### add ~/.xschem/xschem_library (USER_CONF_DIR is normally ~/.xschem)
+append XSCHEM_LIBRARY_PATH :$USER_CONF_DIR/xschem_library 
+
+###########################################################################
+#### SET CUSTOM COLORS FOR XSCHEM LIBRARIES MATCHING CERTAIN PATTERNS
+###########################################################################
+#### each line contains a dircolor(pattern) followed by a color
+#### color can be an ordinary name (grey, brown, blue) or a hex code {#77aaff}
+#### hex code must be enclosed in braces
+array unset dircolor
+set dircolor(sky130_fd_pr$) blue
+set dircolor(sky130_tests$) blue
+set dircolor(xschem_sky130$) blue
+set dircolor(xschem_library$) red
+set dircolor(devices$) red
+
+###########################################################################
+#### WINDOW TO OPEN ON STARTUP: XSCHEM_START_WINDOW
+###########################################################################
+#### Start without a design if no filename given on command line:
+#### To avoid absolute paths, use a path that is relative to one of the
+#### XSCHEM_LIBRARY_PATH directories. Default: empty
+set XSCHEM_START_WINDOW {sky130_tests/top.sch}
+
+###########################################################################
+#### DIRECTORY WHERE SIMULATIONS, NETLIST AND SIMULATOR OUTPUTS ARE PLACED
+###########################################################################
+#### If unset $USER_CONF_DIR/simulations is assumed (normally ~/.xschem/simulations) 
+# set netlist_dir $env(HOME)/.xschem/simulations
+
+###########################################################################
+#### NETLIST AND HIERARCHICAL PRINT EXCLUDE PATTERNS
+###########################################################################
+#### xschem_libs is a list of patterns of cells to exclude from netlisting.
+#### Matching is done as regular expression on full cell path
+#### Example:
+#### set xschem_libs { {/cmoslib/} {/analoglib/.*pass} buffer }
+#### in this case all schematic cells of directory cmoslib and cells containing
+#### /analoglib/...pass and buffer will be excluded from netlisting
+#### default value: empty
+# set xschem_libs {}
+#### noprint_libs is a list with same rules as for xschem_libs. This
+#### variable controls hierarchical print
+#### default value: empty
+# set noprint_libs {}
+
+###########################################################################
+#### CHANGE DEFAULT [] WITH SOME OTHER CHARACTERS FOR BUSSED SIGNALS 
+#### IN SPICE NETLISTS (EXAMPLE: DATA[7] --> DATA<7>) 
+###########################################################################
+#### default: empty (use xschem default, [ ])
+# set bus_replacement_char {<>}
+#### for XSPICE: replace square brackets as the are used for XSPICE vector nodes.
+# set bus_replacement_char {__} 
+
+###########################################################################
+#### SOME DEFAULT BEHAVIOR
+###########################################################################
+#### Allowed values:  spice, verilog, vhdl, tedax, default: spice
+# set netlist_type spice
+
+#### Some netlisting options (these are the defaults)
+# set hspice_netlist 1
+# set verilog_2001 1
+
+#### to use a fixed line with set change_lw to 0 and set some value to line_width
+#### these are the defaults
+# set line_width 0
+# set change_lw 1
+
+#### allow color postscript and svg exports. Default: 1, enable color
+# set color_ps 1
+
+#### initial size of xschem window you can specify also position with (wxh+x+y)
+#### this is the default:
+# set initial_geometry {900x600}
+
+#### if set to 0, when zooming out allow the viewport do drift toward the mouse position,
+#### allowing to move away by zooming / unzooming with mouse wheel
+#### default setting: 0
+# set unzoom_nodrift 0
+
+#### if set to 1 allow to place multiple components with same name.
+#### Warning: this is normally not allowed in any simulation netlist.
+#### default: 0, do not allow place multiple elements with same name (refdes)
+# set disable_unique_names 0
+
+#### if set to 1 continue drawing lines / wires after click
+#### default: 0
+# set persistent_command 1
+
+#### if set to 1 a wire is inserted when separating components that are
+#### connected by pins. Default: not enabled (0)
+# set connect_by_kissing 1
+
+#### if set to 1 automatically join/trim wires while editing
+#### this may slow down on rally big designs. Can be disabled via menu 
+#### default: 0
+# set autotrim_wires 0
+
+#### set widget scaling (mainly for font display), this is useful on 4K displays
+#### default: unset (tk uses its default) > 1.0 ==> bigger 
+# set tk_scaling 1.7
+
+#### disable some symbol layers. Default: none, all layers are visible.
+# set enable_layer(5) 0 ;# example to disable pin red boxes
+
+#### enable to scale grid point size as done with lines at close zoom, default: 0
+# set big_grid_points 0
+
+###########################################################################
+#### EXPORT FORMAT TRANSLATORS, PNG AND PDF
+###########################################################################
+#### command to translate xpm to png; (assumes command takes source 
+#### and dest file as arguments, example: gm convert plot.xpm plot.png)
+#### default: {gm convert}
+# set to_png {gm convert}
+
+#### command to translate ps to pdf; (assumes command takes source
+#### and dest file as arguments, example: ps2pdf plot.ps plot.pdf)
+#### default: ps2pdf
+# set to_pdf ps2pdf
+set to_pdf {ps2pdf -dAutoRotatePages=/None}
+
+###########################################################################
+#### UNDO: SAVE ON DISK OR KEEP IN MEMORY
+###########################################################################
+#### Alloved: 'disk'or 'memory'. 
+#### Saving undo on disk is safer but slower on extremely big schematics.
+#### In most cases you won't notice any delay. Undo on disk allows previous
+#### state recovery in case of crashes. In-memory undo is extremely fast
+#### but should a crash occur everything is lost.
+#### It is highly recommended to keep undo on disk.
+#### Default: disk
+# set undo_type disk
+
+###########################################################################
+#### CUSTOM GRID / SNAP VALUE SETTINGS
+###########################################################################
+#### Warning: changing these values will likely break compatibility
+#### with existing symbol libraries. Defaults: grid 20, snap 10.
+# set grid 20
+# set snap 10
+
+###########################################################################
+#### CUSTOM COLORS  MAY BE DEFINED HERE
+###########################################################################
+#  set cadlayers 22
+#  set light_colors {
+#   "#ffffff" "#0044ee" "#aaaaaa" "#222222" "#229900"
+#   "#bb2200" "#00ccee" "#ff0000" "#888800" "#00aaaa"
+#   "#880088" "#00ff00" "#0000cc" "#666600" "#557755"
+#   "#aa2222" "#7ccc40" "#00ffcc" "#ce0097" "#d2d46b"
+#   "#ef6158" "#fdb200" }
+
+#  set dark_colors {
+#   "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00"
+#   "#bb2200" "#00ccee" "#ff0000" "#ffff00" "#ffffff"
+#   "#ff00ff" "#00ff00" "#0000cc" "#aaaa00" "#aaccaa"
+#   "#ff7777" "#bfff81" "#00ffcc" "#ce0097" "#d2d46b"
+#   "#ef6158" "#fdb200" }
+
+###########################################################################
+#### CAIRO STUFF
+###########################################################################
+#### Scale all fonts by this number
+# set cairo_font_scale 1.0
+
+#### default for following two is 0.85 (xscale) and 0.88 (yscale) to 
+#### match cairo font spacing
+# set nocairo_font_xscale 1.0
+#### set nocairo_font_yscale 1.0
+
+#### Scale line spacing by this number
+# set cairo_font_line_spacing 1.0
+
+#### Specify a font
+# set cairo_font_name {Sans-Serif}
+# set svg_font_name {Sans-Serif}
+
+#### Lift up text by some zoom-corrected pixels for
+#### better compatibility wrt no cairo version.
+#### Useful values in the range [-1, 3]
+# set cairo_vert_correct 0
+# set nocairo_vert_correct 0
+
+###########################################################################
+#### KEYBINDINGS
+###########################################################################
+#### General format for specifying a replacement for a keybind
+#### Replace Ctrl-d with Escape (so you wont kill the program)
+# set replace_key(Control-d) Escape
+
+#### swap w and W keybinds; Always specify Shift for capital letters
+# set replace_key(Shift-W) w
+# set replace_key(w) Shift-W
+
+###########################################################################
+#### TERMINAL
+###########################################################################
+#### default for linux: xterm
+# set terminal {xterm -geometry 100x35 -fn 9x15 -bg black -fg white -cr white -ms white }
+#### lxterminal is not OK since it will not inherit env vars: 
+#### In order to reduce memory usage and increase the performance, all instances
+#### of the lxterminal are sharing a single process. LXTerminal is part of LXDE
+
+###########################################################################
+#### EDITOR
+###########################################################################
+#### editor must not detach from launching shell (-f mandatory for gvim)
+#### default for linux: gvim -f
+# set editor {gvim -f -geometry 90x28}
+# set editor { xterm -geometry 100x40 -e nano }
+# set editor { xterm -geometry 100x40 -e pico }
+
+#### For Windows
+# set editor {notepad.exe}
+
+###########################################################################
+#### SHOW ERC INFO WINDOW (erc errors, warnings etc)
+###########################################################################
+#### default: 0 (can be enabled by menu)
+# set show_infowindow 0
+
+###########################################################################
+#### CONFIGURE COMPUTER FARM JOB REDIRECTORS FOR SIMULATIONS
+###########################################################################
+#### RTDA NC
+# set computerfarm {nc run -Il}
+#### LSF BSUB
+# set computerfarm {bsub -Is}
+
+###########################################################################
+#### TCP CONNECTION WITH GAW
+###########################################################################
+#### set gaw address for socket connection: {host port}
+#### default: set to localhost, port 2020
+# set gaw_tcp_address {localhost 2020}
+
+###########################################################################
+#### XSCHEM LISTEN TO TCP PORT
+###########################################################################
+#### set xschem listening port; default: not enabled
+# set xschem_listen_port 2021
+
+###########################################################################
+#### BESPICE WAVE SOCKET CONNECTION
+###########################################################################
+#### set bespice wave listening port; default: not enabled
+set bespice_listen_port 2022
+
+###########################################################################
+#### TCL FILES TO LOAD AT STARTUP
+###########################################################################
+#### list of tcl files to preload.
+# lappend tcl_files ${XSCHEM_SHAREDIR}/change_index.tcl
+lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl
+
+###########################################################################
+#### XSCHEM TOOLBAR
+###########################################################################
+#### default: not enabled.
+set toolbar_visible 1
+# set toolbar_horiz   1
+
+###########################################################################
+#### TABBED WINDOWS
+###########################################################################
+# default: not enabled. Interface can be changed runtime if only one window 
+# or tab is open.
+set tabbed_interface 1
+
+###########################################################################
+#### SKYWATER PDK SPECIFIC VARIABLES
+###########################################################################
+
+## (spice patched) skywater-pdk install
+# set SKYWATER_MODELS ~/skywater-pdk/libraries/sky130_fd_pr_ngspice/latest
+# set SKYWATER_STDCELLS ~/skywater-pdk/libraries/sky130_fd_sc_hd/latest
+
+## opencircuitdesign pdks install. You need to change these to point to your open_pdks installation
+# set SKYWATER_MODELS /usr/local/share/pdk/sky130A/libs.tech/ngspice
+# set SKYWATER_STDCELLS /usr/local/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/spice
+##set SKYWATER_MODELS $env(HOME)/share/pdk/sky130A/libs.tech/ngspice
+##set SKYWATER_STDCELLS $env(HOME)/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/spice
+
+set SKYWATER_MODELS /edatools/pdks/skywater-pdk/libraries/sky130_fd_pr_ngspice/latest
+set SKYWATER_STDCELLS /edatools/pdks/skywater-pdk/libraries/sky130_fd_sc_hd/latest
\ No newline at end of file