diff --git a/mpw_precheck/logs/gds.info b/mpw_precheck/logs/gds.info
new file mode 100644
index 0000000..be8dd6b
--- /dev/null
+++ b/mpw_precheck/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: 06fcf8c086944995966d6e861ab72b76c0bf8a58
\ No newline at end of file
diff --git a/mpw_precheck/logs/git.info b/mpw_precheck/logs/git.info
new file mode 100644
index 0000000..4f627a4
--- /dev/null
+++ b/mpw_precheck/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/SerdarUnal132/openram_openmpw.git
+Branch: main
+Commit: c2fabbd9fae639d26341eaeb7b57edb46fc052c5
diff --git a/mpw_precheck/logs/klayout_beol_check.log b/mpw_precheck/logs/klayout_beol_check.log
new file mode 100644
index 0000000..be2dd30
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.log
@@ -0,0 +1,992 @@
+/opt/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:42: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:112
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+    Elapsed: 0.330s  Memory: 1235.00M
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+Writing report database: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/reports/klayout_beol_check.xml ..
+Total elapsed: 2100.010s  Memory: 6710.00M
diff --git a/mpw_precheck/logs/klayout_beol_check.total b/mpw_precheck/logs/klayout_beol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_beol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_feol_check.log b/mpw_precheck/logs/klayout_feol_check.log
new file mode 100644
index 0000000..2e63c47
--- /dev/null
+++ b/mpw_precheck/logs/klayout_feol_check.log
@@ -0,0 +1,789 @@
+/opt/checks/tech-files/sky130A_mr.drc:36: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
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+Writing report database: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/reports/klayout_feol_check.xml ..
+Total elapsed: 353.980s  Memory: 2137.00M
diff --git a/mpw_precheck/logs/klayout_feol_check.total b/mpw_precheck/logs/klayout_feol_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_feol_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.log b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
new file mode 100644
index 0000000..3480201
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.log
@@ -0,0 +1,79 @@
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+Writing report database: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/reports/klayout_met_min_ca_density_check.xml ..
+Total elapsed: 134.510s  Memory: 1820.00M
diff --git a/mpw_precheck/logs/klayout_met_min_ca_density_check.total b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_met_min_ca_density_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_offgrid_check.log b/mpw_precheck/logs/klayout_offgrid_check.log
new file mode 100644
index 0000000..168bf61
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.log
@@ -0,0 +1,755 @@
+/opt/checks/tech-files/sky130A_mr.drc:38: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/checks/tech-files/sky130A_mr.drc:28: warning: previous definition of FEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:44: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/checks/tech-files/sky130A_mr.drc:29: warning: previous definition of BEOL was here
+/opt/checks/tech-files/sky130A_mr.drc:48: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/checks/tech-files/sky130A_mr.drc:30: warning: previous definition of OFFGRID was here
+/opt/checks/tech-files/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/checks/tech-files/sky130A_mr.drc:31: warning: previous definition of SEAL was here
+/opt/checks/tech-files/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/checks/tech-files/sky130A_mr.drc:32: warning: previous definition of FLOATING_MET was here
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+"output" in: sky130A_mr.drc:741
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:742
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 1.730s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:742
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:743
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.130s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:743
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:744
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.450s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:744
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:745
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:745
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:746
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.840s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:746
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:747
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.020s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:747
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:748
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.550s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:748
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:749
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.020s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:749
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:750
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.460s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:750
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:751
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:751
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:752
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.450s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:752
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:753
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:753
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:754
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.450s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:754
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:755
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:755
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.110s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:756
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.450s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:756
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:757
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:757
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:758
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.450s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:758
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:759
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:759
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.110s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:760
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.460s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:760
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:761
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:761
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:762
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.460s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:762
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.110s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:763
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:763
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:764
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.450s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:764
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"with_angle" in: sky130A_mr.drc:765
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:765
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.120s  Memory: 5398.00M
+"ongrid" in: sky130A_mr.drc:766
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.450s  Memory: 5398.00M
+"output" in: sky130A_mr.drc:766
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.110s  Memory: 5398.00M
+Writing report database: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/reports/klayout_offgrid_check.xml ..
+Total elapsed: 434.500s  Memory: 5082.00M
diff --git a/mpw_precheck/logs/klayout_offgrid_check.total b/mpw_precheck/logs/klayout_offgrid_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_offgrid_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
new file mode 100644
index 0000000..c390296
--- /dev/null
+++ b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.log
@@ -0,0 +1,29 @@
+Running pin_label_purposes_overlapping_drawing.rb.drc on file=/root/openram_test_design/gds/user_project_wrapper.gds, topcell=user_project_wrapper, output to /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
+  deep:true tiled:false threads:8
+--- #err|description, table for cell: user_project_wrapper
+NO-Check ----        pwell:64/44/EMP   122/16/dat    64/59/EMP    44/16/EMP     44/5/EMP
+         ----        nwell:64/20/dat    64/16/dat     64/5/EMP
+         ----         diff:65/20/dat    65/16/EMP     65/6/EMP
+         ----          tap:65/44/dat    65/48/EMP     65/5/EMP
+         ----         poly:66/20/dat    66/16/EMP     66/5/EMP
+         ----       licon1:66/44/dat    66/58/EMP
+         ----          li1:67/20/dat    67/16/dat     67/5/EMP
+         ----         mcon:67/44/dat    67/48/EMP
+         ----         met1:68/20/dat    68/16/dat     68/5/dat
+         ----          via:68/44/dat    68/58/EMP
+         ----         met2:69/20/dat    69/16/dat     69/5/dat
+         ----         via2:69/44/dat    69/58/EMP
+         ----         met3:70/20/dat    70/16/dat     70/5/dat
+         ----         via3:70/44/dat    70/48/EMP
+         ----         met4:71/20/dat    71/16/dat     71/5/dat
+         ----         via4:71/44/dat    71/48/EMP
+         ----         met5:72/20/dat    72/16/dat     72/5/EMP
+         ----          pad:76/20/EMP     76/5/EMP    76/16/EMP
+         ----          pnp:82/44/EMP    82/59/EMP
+         ----          npn:82/20/EMP     82/5/EMP
+         ----          rdl:74/20/EMP    74/16/EMP     74/5/EMP
+         ----     inductor:82/24/EMP    82/25/EMP
+       0 total error(s) among 0 error type(s), 33 checks, cell: user_project_wrapper
+Writing report...
+VmPeak:	 3001192 kB
+VmHWM:	 1560616 kB
diff --git a/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_pin_label_purposes_overlapping_drawing_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/klayout_zeroarea_check.log b/mpw_precheck/logs/klayout_zeroarea_check.log
new file mode 100644
index 0000000..d38f511
--- /dev/null
+++ b/mpw_precheck/logs/klayout_zeroarea_check.log
@@ -0,0 +1,4 @@
+0 zero-area shapes
+writing to /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/user_project_wrapper_no_zero_areas.gds
+VmPeak:	 1966780 kB
+VmHWM:	 1666828 kB
diff --git a/mpw_precheck/logs/klayout_zeroarea_check.total b/mpw_precheck/logs/klayout_zeroarea_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/klayout_zeroarea_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/magic_drc_check.log b/mpw_precheck/logs/magic_drc_check.log
new file mode 100644
index 0000000..b7a4eeb
--- /dev/null
+++ b/mpw_precheck/logs/magic_drc_check.log
@@ -0,0 +1,433 @@
+
+Magic 8.3 revision 274 - Compiled on Fri Mar  4 22:53:06 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    mvobsactive ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/drc_checks/magic/magic_drc_check.tcl" from command line.
+Detected an SRAM module
+Pre-loading a maglef of the SRAM block: sky130_sram_2kbyte_1rw1r_32x512_8
+Scaled magic input cell sky130_sram_2kbyte_1rw1r_32x512_8 geometry by factor of 2
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_project_wrapper
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_12".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_11".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_15".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_28".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_29".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_13".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_14".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv".
+Reading "sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sli_dactive".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w0_550_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_22".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_21".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_23".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w2_880_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_17".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_20".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_7".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_19".
+Reading "sky130_fd_bd_sram__openram_dp_cell".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 85144): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 88920): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 93112): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 94488): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 94744): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_fd_bd_sram__openram_dp_cell_replica".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 112868): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 116644): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 120836): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 122212): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 122468): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_fd_bd_sram__openram_dp_cell_dummy".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 139310): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 143086): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 147278): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 148142): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 148398): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 154794): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 155498): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 156458): Unknown layer/datatype in boundary, layer=22 type=21
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_0".
+Reading "sky130_fd_bd_sram__openram_write_driver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_1".
+Reading "sky130_fd_bd_sram__openram_sense_amp".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_24".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_25".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_26".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_27".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode3x8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m14_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m14_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m41_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m41_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m15_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m15_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m42_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m42_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_15".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dactive".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m24_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m24_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_3".
+Reading "sky130_fd_bd_sram__openram_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_bitcell_array".
+    5000 uses
+    10000 uses
+    15000 uses
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_column".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_column_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dummy_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_9".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_write_driver_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_write_mask_and_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_sense_amp_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_decoder".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_18".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_19".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_20".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_7".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_9".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_10".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_5".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_11".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_12".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_13".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_14".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_bitcell_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_data".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_data_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_address".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_address_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_6".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_delay_chain".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_32".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_33".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_bank".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_r".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_5".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_rw".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_data_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_addr_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wmask_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_addr_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_38".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_39".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s18_2".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8".
+Warning:  cell sky130_sram_2kbyte_1rw1r_32x512_8 already existed before reading GDS!
+Using pre-existing cell definition
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s15_2".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__clkdlybuf4s25_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "user_project_wrapper".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
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+    155000 uses
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+    210000 uses
+    215000 uses
+    220000 uses
+    225000 uses
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+    235000 uses
+    240000 uses
+    245000 uses
+    250000 uses
+    255000 uses
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+    265000 uses
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+    275000 uses
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+    300000 uses
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+    375000 uses
+    380000 uses
+    385000 uses
+    390000 uses
+    395000 uses
+    400000 uses
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+    415000 uses
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+    425000 uses
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+    435000 uses
+    440000 uses
+    445000 uses
+    450000 uses
+    455000 uses
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+    465000 uses
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+    475000 uses
+    480000 uses
+    485000 uses
+    490000 uses
+    495000 uses
+    500000 uses
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+    510000 uses
+    515000 uses
+    520000 uses
+    525000 uses
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+    540000 uses
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+    550000 uses
+    555000 uses
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+    565000 uses
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+    575000 uses
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+    590000 uses
+    595000 uses
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+    610000 uses
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+    635000 uses
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+    645000 uses
+    650000 uses
+    655000 uses
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+    665000 uses
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+    675000 uses
+    680000 uses
+    685000 uses
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+    695000 uses
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+    705000 uses
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+    790000 uses
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+    820000 uses
+    825000 uses
+    830000 uses
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+    840000 uses
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+    850000 uses
+    855000 uses
+    860000 uses
+    865000 uses
+    870000 uses
+    875000 uses
+    880000 uses
+    885000 uses
+    890000 uses
+    895000 uses
+[INFO]: Loading user_project_wrapper
+
+DRC style is now "drc(full)"
+Loading DRC CIF style.
+[INFO]: COUNT: 117
+[INFO]: Should be divided by 3 or 4
+[INFO]: DRC Checking DONE (/mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/reports/magic_drc_check.drc.report)
+[INFO]: Saving mag view with DRC errors(/mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/user_project_wrapper.magic.drc.mag)
+[INFO]: Saved
diff --git a/mpw_precheck/logs/magic_drc_check.total b/mpw_precheck/logs/magic_drc_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/magic_drc_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/logs/pdks.info b/mpw_precheck/logs/pdks.info
new file mode 100644
index 0000000..19f87e1
--- /dev/null
+++ b/mpw_precheck/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs 27ecf1c16911f7dd4428ffab96f62c1fb876ea70
+Skywater PDK c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
\ No newline at end of file
diff --git a/mpw_precheck/logs/precheck.log b/mpw_precheck/logs/precheck.log
new file mode 100644
index 0000000..d27338c
--- /dev/null
+++ b/mpw_precheck/logs/precheck.log
@@ -0,0 +1,66 @@
+2022-05-28 14:58:50 - [INFO] - {{Project Git Info}} Repository: https://github.com/SerdarUnal132/openram_openmpw.git | Branch: main | Commit: c2fabbd9fae639d26341eaeb7b57edb46fc052c5
+2022-05-28 14:58:50 - [INFO] - {{EXTRACTING FILES}} Extracting compressed files in: openram_test_design
+2022-05-28 14:58:51 - [INFO] - {{Project Type Info}} digital
+2022-05-28 14:58:51 - [INFO] - {{Project GDS Info}} user_project_wrapper: 06fcf8c086944995966d6e861ab72b76c0bf8a58
+2022-05-28 14:58:51 - [INFO] - {{Tools Info}} KLayout: v0.27.8 | Magic: v8.3.274
+2022-05-28 14:58:51 - [INFO] - {{PDKs Info}} Open PDKs: 27ecf1c16911f7dd4428ffab96f62c1fb876ea70 | Skywater PDK: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb
+2022-05-28 14:58:51 - [INFO] - {{START}} Precheck Started, the full log 'precheck.log' will be located in 'openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/logs'
+2022-05-28 14:58:51 - [INFO] - {{PRECHECK SEQUENCE}} Precheck will run the following checks: [License, Makefile, Default, Documentation, Consistency, XOR, Magic DRC, Klayout FEOL, Klayout BEOL, Klayout Offgrid, Klayout Metal Minimum Clear Area Density, Klayout Pin Label Purposes Overlapping Drawing, Klayout ZeroArea]
+2022-05-28 14:58:51 - [INFO] - {{STEP UPDATE}} Executing Check 1 of 13: License
+2022-05-28 14:58:52 - [INFO] - An approved LICENSE (Apache-2.0) was found in openram_test_design.
+2022-05-28 14:58:52 - [INFO] - {{MAIN LICENSE CHECK PASSED}} An approved LICENSE was found in project root.
+2022-05-28 14:58:53 - [INFO] - An approved LICENSE (Apache-2.0) was found in openram_test_design.
+2022-05-28 14:58:53 - [INFO] - {{SUBMODULES LICENSE CHECK PASSED}} No prohibited LICENSE file(s) was found in project submodules
+2022-05-28 14:58:53 - [ERROR] - SPDX COMPLIANCE SYMLINK FILE NOT FOUND in openram_test_design/openlane/Makefile
+2022-05-28 14:58:53 - [WARNING] - {{SPDX COMPLIANCE CHECK FAILED}} Found 128 non-compliant file(s) with the SPDX Standard.
+2022-05-28 14:58:53 - [INFO] - SPDX COMPLIANCE: NON-COMPLIANT FILE(S) PREVIEW: ['openram_test_design/Makefile', 'openram_test_design/docs/Makefile', 'openram_test_design/docs/environment.yml', 'openram_test_design/docs/source/conf.py', 'openram_test_design/docs/source/index.rst', 'openram_test_design/docs/source/quickstart.rst', 'openram_test_design/openlane/user_project_wrapper/base.sdc', 'openram_test_design/openlane/user_project_wrapper/config.json', 'openram_test_design/openlane/user_project_wrapper/config.tcl', 'openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/config.tcl', 'openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/runtime.yaml', 'openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/logs/signoff/37-user_project_wrapper.gds.json', 'openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/reports/manufacturability.rpt', 'openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/reports/cts/12-cts_sta.clock_skew.rpt', 'openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/reports/cts/12-cts_sta.max.rpt']
+2022-05-28 14:58:53 - [INFO] - For the full SPDX compliance report check: openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/logs/spdx_compliance_report.log
+2022-05-28 14:58:53 - [INFO] - {{STEP UPDATE}} Executing Check 2 of 13: Makefile
+2022-05-28 14:58:53 - [INFO] - {{MAKEFILE CHECK PASSED}} Makefile valid.
+2022-05-28 14:58:53 - [INFO] - {{STEP UPDATE}} Executing Check 3 of 13: Default
+2022-05-28 14:58:53 - [INFO] - {{README DEFAULT CHECK PASSED}} Project 'README.md' was modified and is not identical to the default 'README.md'
+2022-05-28 14:58:54 - [INFO] - {{CONTENT DEFAULT CHECK PASSED}} Project 'gds' was modified and is not identical to the default 'gds'
+2022-05-28 14:58:54 - [INFO] - {{STEP UPDATE}} Executing Check 4 of 13: Documentation
+2022-05-28 14:58:54 - [INFO] - {{DOCUMENTATION CHECK PASSED}} Project documentation is appropriate.
+2022-05-28 14:58:54 - [INFO] - {{STEP UPDATE}} Executing Check 5 of 13: Consistency
+2022-05-28 14:59:07 - [INFO] - HIERARCHY CHECK PASSED: Module user_project_wrapper is instantiated in caravel. 
+2022-05-28 14:59:07 - [INFO] - COMPLEXITY CHECK PASSED: Netlist caravel contains at least 8 instances (90 instances). 
+2022-05-28 14:59:07 - [INFO] - MODELING CHECK PASSED: Netlist caravel is structural.
+2022-05-28 14:59:07 - [INFO] - SUBMODULE HOOKS CHECK PASSED: All module ports for user_project_wrapper are correctly connected in the top level netlist caravel.
+2022-05-28 14:59:07 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in caravel are connected to power
+2022-05-28 14:59:07 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} caravel netlist passed all consistency checks.
+2022-05-28 14:59:07 - [INFO] - PORTS CHECK PASSED: Netlist user_project_wrapper ports match the golden wrapper ports
+2022-05-28 14:59:07 - [INFO] - COMPLEXITY CHECK PASSED: Netlist user_project_wrapper contains at least 1 instances (2277 instances). 
+2022-05-28 14:59:07 - [INFO] - MODELING CHECK PASSED: Netlist user_project_wrapper is structural.
+2022-05-28 14:59:07 - [INFO] - LAYOUT CHECK PASSED: The GDS layout for user_project_wrapper matches the provided structural netlist.
+2022-05-28 14:59:07 - [INFO] - POWER CONNECTIONS CHECK PASSED: All instances in user_project_wrapper are connected to power
+2022-05-28 14:59:07 - [INFO] - PORT TYPES CHECK PASSED: Netlist user_project_wrapper port types match the golden wrapper port types.
+2022-05-28 14:59:07 - [INFO] - {{NETLIST CONSISTENCY CHECK PASSED}} user_project_wrapper netlist passed all consistency checks.
+2022-05-28 14:59:08 - [INFO] - {{CONSISTENCY CHECK PASSED}} The user netlist and the top netlist are valid.
+2022-05-28 14:59:08 - [INFO] - {{STEP UPDATE}} Executing Check 6 of 13: XOR
+2022-05-28 15:01:34 - [INFO] - {{XOR CHECK UPDATE}} Total XOR differences: 0, for more details view openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/user_project_wrapper.xor.gds
+2022-05-28 15:01:34 - [INFO] - {{XOR CHECK PASSED}} The GDS file has no XOR violations.
+2022-05-28 15:01:34 - [INFO] - {{STEP UPDATE}} Executing Check 7 of 13: Magic DRC
+2022-05-28 15:29:36 - [ERROR] - Violation Message "Metal3 > 3um spacing to unrelated m3 < 0.4um (met3.3d) "found 117 Times.
+2022-05-28 15:29:36 - [ERROR] - 117 DRC violations
+2022-05-28 15:29:36 - [WARNING] - {{MAGIC DRC CHECK FAILED}} The GDS file, user_project_wrapper.gds, has DRC violations.
+2022-05-28 15:29:36 - [INFO] - {{STEP UPDATE}} Executing Check 8 of 13: Klayout FEOL
+2022-05-28 15:35:30 - [INFO] - No DRC Violations found
+2022-05-28 15:35:30 - [INFO] - {{Klayout FEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-05-28 15:35:30 - [INFO] - {{STEP UPDATE}} Executing Check 9 of 13: Klayout BEOL
+2022-05-28 16:10:04 - [INFO] - No DRC Violations found
+2022-05-28 16:10:04 - [INFO] - {{Klayout BEOL CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-05-28 16:10:04 - [INFO] - {{STEP UPDATE}} Executing Check 10 of 13: Klayout Offgrid
+2022-05-28 16:17:21 - [INFO] - No DRC Violations found
+2022-05-28 16:17:21 - [INFO] - {{Klayout Offgrid CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-05-28 16:17:21 - [INFO] - {{STEP UPDATE}} Executing Check 11 of 13: Klayout Metal Minimum Clear Area Density
+2022-05-28 16:19:38 - [INFO] - No DRC Violations found
+2022-05-28 16:19:38 - [INFO] - {{Klayout Metal Minimum Clear Area Density CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-05-28 16:19:38 - [INFO] - {{STEP UPDATE}} Executing Check 12 of 13: Klayout Pin Label Purposes Overlapping Drawing
+2022-05-28 16:20:54 - [INFO] - No DRC Violations found
+2022-05-28 16:20:54 - [INFO] - {{Klayout Pin Label Purposes Overlapping Drawing CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-05-28 16:20:54 - [INFO] - {{STEP UPDATE}} Executing Check 13 of 13: Klayout ZeroArea
+2022-05-28 16:21:08 - [INFO] - No DRC Violations found
+2022-05-28 16:21:08 - [INFO] - {{Klayout ZeroArea CHECK PASSED}} The GDS file, user_project_wrapper.gds, has no DRC violations.
+2022-05-28 16:21:08 - [INFO] - {{FINISH}} Executing Finished, the full log 'precheck.log' can be found in 'openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/logs'
+2022-05-28 16:21:08 - [INFO] - {{SUCCESS}} All Checks Passed !!!
diff --git a/mpw_precheck/logs/spdx_compliance_report.log b/mpw_precheck/logs/spdx_compliance_report.log
new file mode 100644
index 0000000..f619e9b
--- /dev/null
+++ b/mpw_precheck/logs/spdx_compliance_report.log
@@ -0,0 +1,128 @@
+/root/openram_test_design/Makefile
+/root/openram_test_design/docs/Makefile
+/root/openram_test_design/docs/environment.yml
+/root/openram_test_design/docs/source/conf.py
+/root/openram_test_design/docs/source/index.rst
+/root/openram_test_design/docs/source/quickstart.rst
+/root/openram_test_design/openlane/user_project_wrapper/base.sdc
+/root/openram_test_design/openlane/user_project_wrapper/config.json
+/root/openram_test_design/openlane/user_project_wrapper/config.tcl
+/root/openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/config.tcl
+/root/openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/runtime.yaml
+/root/openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/logs/signoff/37-user_project_wrapper.gds.json
+/root/openram_test_design/openlane/user_project_wrapper/runs/user_project_wrapper/reports/manufacturability.rpt
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+/root/openram_test_design/spef/user_project_wrapper.spef
+/root/openram_test_design/verilog/dv/Makefile
+/root/openram_test_design/verilog/dv/register_map.h
+/root/openram_test_design/verilog/dv/io_ports/Makefile
+/root/openram_test_design/verilog/dv/io_ports/io_ports.c
+/root/openram_test_design/verilog/dv/io_ports/io_ports_tb.v
+/root/openram_test_design/verilog/dv/la_test1/Makefile
+/root/openram_test_design/verilog/dv/la_test1/la_test1.c
+/root/openram_test_design/verilog/dv/la_test1/la_test1_tb.v
+/root/openram_test_design/verilog/dv/la_test2/Makefile
+/root/openram_test_design/verilog/dv/la_test2/la_test2.c
+/root/openram_test_design/verilog/dv/la_test2/la_test2_tb.v
+/root/openram_test_design/verilog/dv/mprj_stimulus/Makefile
+/root/openram_test_design/verilog/dv/mprj_stimulus/mprj_stimulus.c
+/root/openram_test_design/verilog/dv/mprj_stimulus/mprj_stimulus_tb.v
+/root/openram_test_design/verilog/dv/wb_port/Makefile
+/root/openram_test_design/verilog/dv/wb_port/wb_port.c
+/root/openram_test_design/verilog/dv/wb_port/wb_port_tb.v
+/root/openram_test_design/verilog/includes/includes.gl+sdf.caravel_user_project
+/root/openram_test_design/verilog/includes/includes.gl.caravel_user_project
+/root/openram_test_design/verilog/includes/includes.rtl.caravel_user_project
+/root/openram_test_design/verilog/rtl/uprj_netlists.v
+/root/openram_test_design/verilog/rtl/user_project_wrapper.v
diff --git a/mpw_precheck/logs/tools.info b/mpw_precheck/logs/tools.info
new file mode 100644
index 0000000..9b2230a
--- /dev/null
+++ b/mpw_precheck/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.8
+Magic: 8.3.274
\ No newline at end of file
diff --git a/mpw_precheck/logs/xor_check.log b/mpw_precheck/logs/xor_check.log
new file mode 100644
index 0000000..687beee
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.log
@@ -0,0 +1,586 @@
+Reading file /root/openram_test_design/gds/user_project_wrapper.gds for cell user_project_wrapper
+dbu=0.001
+cell user_project_wrapper dbu-bbox(ll;ur)=(-43630,-38270;2963250,3557950)
+cell user_project_wrapper dbu-bbox(left,bottom,right,top)=(-43630,-38270,2963250,3557950)
+cell user_project_wrapper dbu-size(width,height)=(3006880,3596220)
+cell user_project_wrapper micron-bbox(left,bottom,right,top)=(-43.63,-38.27,2963.25,3557.9500000000003)
+cell user_project_wrapper micron-size(width,height)=(3006.88,3596.2200000000003)
+Done.
+
+Magic 8.3 revision 274 - Compiled on Fri Mar  4 22:53:06 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    mvobsactive ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 6.0
+Library name: user_project_wrapper
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_12".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_11".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_15".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_28".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_29".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_13".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_14".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv".
+Reading "sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sli_dactive".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w0_550_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_22".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_21".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_23".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w2_880_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_17".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_20".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_7".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_19".
+Reading "sky130_fd_bd_sram__openram_dp_cell".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 85144): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 88920): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 93112): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 94488): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell" (byte position 94744): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_fd_bd_sram__openram_dp_cell_replica".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 112868): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 116644): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 120836): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 122212): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_replica" (byte position 122468): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_fd_bd_sram__openram_dp_cell_dummy".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 139310): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 143086): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 147278): Unknown layer/datatype in boundary, layer=22 type=21
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 148142): Unknown layer/datatype in boundary, layer=22 type=22
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_dummy" (byte position 148398): Unknown layer/datatype in boundary, layer=235 type=0
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 154794): Unknown layer/datatype in boundary, layer=33 type=42
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 155498): Unknown layer/datatype in boundary, layer=33 type=43
+Error while reading cell "sky130_fd_bd_sram__openram_dp_cell_cap_row" (byte position 156458): Unknown layer/datatype in boundary, layer=22 type=21
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_0".
+Reading "sky130_fd_bd_sram__openram_write_driver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_1".
+Reading "sky130_fd_bd_sram__openram_sense_amp".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_24".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_25".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_26".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_27".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode3x8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m14_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m14_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m41_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m41_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m15_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m15_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m42_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m42_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_15".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dactive".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m24_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m24_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_3".
+Reading "sky130_fd_bd_sram__openram_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_bitcell_array".
+    5000 uses
+    10000 uses
+    15000 uses
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_column".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_column_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dummy_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_9".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_write_driver_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_write_mask_and_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_sense_amp_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_decoder".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_18".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_19".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_20".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_7".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_9".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_10".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_5".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_11".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_12".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_13".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_14".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_bitcell_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_data".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_data_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_address".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_address_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_6".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_delay_chain".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_32".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_33".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_bank".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_r".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_5".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_rw".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_data_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_addr_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wmask_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_addr_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_38".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_39".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s18_2".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8".
+    5000 uses
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s15_2".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__clkdlybuf4s25_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "user_project_wrapper".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
+    130000 uses
+    135000 uses
+    140000 uses
+    145000 uses
+    150000 uses
+    155000 uses
+    160000 uses
+    165000 uses
+    170000 uses
+    175000 uses
+    180000 uses
+    185000 uses
+    190000 uses
+    195000 uses
+    200000 uses
+    205000 uses
+    210000 uses
+    215000 uses
+    220000 uses
+    225000 uses
+    230000 uses
+    235000 uses
+    240000 uses
+    245000 uses
+    250000 uses
+    255000 uses
+    260000 uses
+    265000 uses
+    270000 uses
+    275000 uses
+    280000 uses
+    285000 uses
+    290000 uses
+    295000 uses
+    300000 uses
+    305000 uses
+    310000 uses
+    315000 uses
+    320000 uses
+    325000 uses
+    330000 uses
+    335000 uses
+    340000 uses
+    345000 uses
+    350000 uses
+    355000 uses
+    360000 uses
+    365000 uses
+    370000 uses
+    375000 uses
+    380000 uses
+    385000 uses
+    390000 uses
+    395000 uses
+    400000 uses
+    405000 uses
+    410000 uses
+    415000 uses
+    420000 uses
+    425000 uses
+    430000 uses
+    435000 uses
+    440000 uses
+    445000 uses
+    450000 uses
+    455000 uses
+    460000 uses
+    465000 uses
+    470000 uses
+    475000 uses
+    480000 uses
+    485000 uses
+    490000 uses
+    495000 uses
+    500000 uses
+    505000 uses
+    510000 uses
+    515000 uses
+    520000 uses
+    525000 uses
+    530000 uses
+    535000 uses
+    540000 uses
+    545000 uses
+    550000 uses
+    555000 uses
+    560000 uses
+    565000 uses
+    570000 uses
+    575000 uses
+    580000 uses
+    585000 uses
+    590000 uses
+    595000 uses
+    600000 uses
+    605000 uses
+    610000 uses
+    615000 uses
+    620000 uses
+    625000 uses
+    630000 uses
+    635000 uses
+    640000 uses
+    645000 uses
+    650000 uses
+    655000 uses
+    660000 uses
+    665000 uses
+    670000 uses
+    675000 uses
+    680000 uses
+    685000 uses
+    690000 uses
+    695000 uses
+    700000 uses
+    705000 uses
+    710000 uses
+    715000 uses
+    720000 uses
+    725000 uses
+    730000 uses
+    735000 uses
+    740000 uses
+    745000 uses
+    750000 uses
+    755000 uses
+    760000 uses
+    765000 uses
+    770000 uses
+    775000 uses
+    780000 uses
+    785000 uses
+    790000 uses
+    795000 uses
+    800000 uses
+    805000 uses
+    810000 uses
+    815000 uses
+    820000 uses
+    825000 uses
+    830000 uses
+    835000 uses
+    840000 uses
+    845000 uses
+    850000 uses
+    855000 uses
+    860000 uses
+    865000 uses
+    870000 uses
+    875000 uses
+    880000 uses
+    885000 uses
+    890000 uses
+    895000 uses
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+
+Magic 8.3 revision 274 - Compiled on Fri Mar  4 22:53:06 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    mvobsactive ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/checks/xor_check/erase_box.tcl" from command line.
+CIF input style is now "sky130(vendor)"
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: user_project_wrapper
+Reading "user_project_wrapper".
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.880 x 3520.000  (-42.880,  0.000), ( 0.000,  3520.000)  150937.594
+lambda:   4288.00 x 352000.00  (-4288.00,  0.00 ), (  0.00,  352000.00)  1509376000.00
+internal:   8576 x 704000  ( -8576,  0    ), (     0,  704000)  6037504000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  42.500 x 3520.000  ( 2920.000,  0.000), ( 2962.500,  3520.000)  149600.000
+lambda:   4250.00 x 352000.00  ( 292000.00,  0.00 ), ( 296250.00,  352000.00)  1496000000.00
+internal:   8500 x 704000  ( 584000,  0    ), ( 592500,  704000)  5984000000
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.530  (-42.880, -37.530), ( 2962.500,  0.000)  112791.906
+lambda:   300538.00 x 3753.00  (-4288.00, -3753.00), ( 296250.00,  0.00 )  1127919104.00
+internal: 601076 x 7506    ( -8576, -7506 ), ( 592500,  0    )  4511676456
+Root cell box:
+           width x height  (   llx,  lly  ), (   urx,  ury  )  area (units^2)
+
+microns:  3005.380 x 37.210  (-42.880,  3520.000), ( 2962.500,  3557.210)  111830.188
+lambda:   300538.00 x 3721.00  (-4288.00,  352000.00), ( 296250.00,  355721.00)  1118301952.00
+internal: 601076 x 7442    ( -8576,  704000), ( 592500,  711442)  4473207592
+   Generating output for cell xor_target
+Reading /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/user_project_wrapper_erased.gds ..
+Reading /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/user_project_wrapper_empty_erased.gds ..
+--- Running XOR for 69/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 530 (flat)  530 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 530 (flat)  530 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+--- Running XOR for 70/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 107 (flat)  107 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 107 (flat)  107 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+--- Running XOR for 71/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+--- Running XOR for 71/44 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 116 (flat)  116 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 116 (flat)  116 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+--- Running XOR for 72/20 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 16 (flat)  16 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+--- Running XOR for 81/14 ---
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"input" in: xor.rb.drc:39
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+"^" in: xor.rb.drc:39
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 523.00M
+XOR differences: 0
+"output" in: xor.rb.drc:43
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 523.00M
+Writing layout file: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/user_project_wrapper.xor.gds ..
+Total elapsed: 0.110s  Memory: 523.00M
diff --git a/mpw_precheck/logs/xor_check.total b/mpw_precheck/logs/xor_check.total
new file mode 100644
index 0000000..c227083
--- /dev/null
+++ b/mpw_precheck/logs/xor_check.total
@@ -0,0 +1 @@
+0
\ No newline at end of file
diff --git a/mpw_precheck/outputs/reports/klayout_beol_check.xml b/mpw_precheck/outputs/reports/klayout_beol_check.xml
new file mode 100644
index 0000000..5ffd971
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_beol_check.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_feol_check.xml b/mpw_precheck/outputs/reports/klayout_feol_check.xml
new file mode 100644
index 0000000..987027f
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_feol_check.xml
@@ -0,0 +1,363 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
new file mode 100644
index 0000000..698a39a
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_met_min_ca_density_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/met_min_ca_density.lydrc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_offgrid_check.xml b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
new file mode 100644
index 0000000..95ebbc9
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_offgrid_check.xml
@@ -0,0 +1,483 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/tech-files/sky130A_mr.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>dnwell_angle</name>
+   <description>x.3a : non 45 degree angle dnwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell_angle</name>
+   <description>x.3a : non 45 degree angle nwell</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwbm_angle</name>
+   <description>x.3a : non 45 degree angle pwbm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwde_angle</name>
+   <description>x.3a : non 45 degree angle pwde</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp_angle</name>
+   <description>x.3a : non 45 degree angle hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr_angle</name>
+   <description>x.3a : non 45 degree angle hvtr</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn_angle</name>
+   <description>x.3a : non 45 degree angle lvtn</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm_angle</name>
+   <description>x.3a : non 45 degree angle ncm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2 : non 90 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>diff_angle</name>
+   <description>x.2c : non 45 degree angle diff</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2 : non 90 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tap_angle</name>
+   <description>x.2c : non 45 degree angle tap</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm_angle</name>
+   <description>x.3a : non 45 degree angle tunm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly_angle</name>
+   <description>x.2 : non 90 degree angle poly</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm_angle</name>
+   <description>x.3a : non 45 degree angle rpm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc_angle</name>
+   <description>x.3a : non 45 degree angle npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsdm_angle</name>
+   <description>x.3a : non 45 degree angle nsdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psdm_angle</name>
+   <description>x.3a : non 45 degree angle psdm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon_angle</name>
+   <description>x.2 : non 90 degree angle licon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li_angle</name>
+   <description>x.3a : non 45 degree angle li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct_angle</name>
+   <description>x.2 : non 90 degree angle mcon</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vpp_angle</name>
+   <description>x.3a : non 45 degree angle vpp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1_angle</name>
+   <description>x.3a : non 45 degree angle m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via_angle</name>
+   <description>x.2 : non 90 degree angle via</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2_angle</name>
+   <description>x.3a : non 45 degree angle m2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2_angle</name>
+   <description>x.2 : non 90 degree angle via2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3_angle</name>
+   <description>x.3a : non 45 degree angle m3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3_angle</name>
+   <description>x.2 : non 90 degree angle via3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsm_angle</name>
+   <description>x.3a : non 45 degree angle nsm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4_angle</name>
+   <description>x.3a : non 45 degree angle m4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4_angle</name>
+   <description>x.2 : non 90 degree angle via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5_angle</name>
+   <description>x.3a : non 45 degree angle m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad_angle</name>
+   <description>x.3a : non 45 degree angle pad</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>mf_angle</name>
+   <description>x.2 : non 90 degree angle mf</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi_angle</name>
+   <description>x.3a : non 45 degree angle hvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm_angle</name>
+   <description>x.3a : non 45 degree angle hvntm</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>vhvi_angle</name>
+   <description>x.3a : non 45 degree angle vhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>uhvi_angle</name>
+   <description>x.3a : non 45 degree angle uhvi</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pwell_rs_angle</name>
+   <description>x.3a : non 45 degree angle pwell_rs</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>areaid_re_OFFGRID</name>
+   <description>x.1b : OFFGRID vertex on areaid.re</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml b/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
new file mode 100644
index 0000000..929ee71
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_pin_label_purposes_overlapping_drawing_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>pin_label_purposes_overlapping_drawing.rb.drc, input=/root/openram_test_design/gds/user_project_wrapper.gds, topcell=user_project_wrapper</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/pin_label_purposes_overlapping_drawing.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml b/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml
new file mode 100644
index 0000000..7f95f69
--- /dev/null
+++ b/mpw_precheck/outputs/reports/klayout_zeroarea_check.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>zero area check</description>
+ <original-file/>
+ <generator>drc: script='/opt/checks/drc_checks/klayout/zeroarea.rb.drc'</generator>
+ <top-cell>user_project_wrapper</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>user_project_wrapper</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/mpw_precheck/outputs/reports/magic_drc_check.drc.report b/mpw_precheck/outputs/reports/magic_drc_check.drc.report
new file mode 100644
index 0000000..42c208e
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.drc.report
@@ -0,0 +1,125 @@
+user_project_wrapper
+----------------------------------------
+Metal3 > 3um spacing to unrelated m3 < 0.4um (met3.3d)
+----------------------------------------
+ 590.220 556.040 590.310 556.050
+ 590.220 555.760 590.310 556.040
+ 590.220 555.750 590.310 555.760
+ 590.220 554.860 590.310 555.750
+ 590.220 554.860 590.310 555.260
+ 590.220 548.920 590.310 549.320
+ 590.220 539.720 590.310 539.730
+ 590.220 539.440 590.310 539.720
+ 590.220 539.430 590.310 539.440
+ 590.220 539.220 590.310 539.430
+ 590.220 547.890 590.310 549.320
+ 590.220 547.590 590.310 547.890
+ 590.220 539.440 590.310 539.620
+ 590.220 539.430 590.310 539.440
+ 590.220 539.220 590.310 539.430
+ 590.220 533.280 590.310 533.680
+ 590.220 532.250 590.310 533.680
+ 590.220 532.240 590.310 532.250
+ 590.220 531.960 590.310 532.240
+ 590.220 531.950 590.310 531.960
+ 590.220 513.200 590.310 513.210
+ 590.220 512.920 590.310 513.200
+ 590.220 512.910 590.310 512.920
+ 590.220 511.340 590.310 512.910
+ 590.220 511.340 590.310 511.740
+ 590.220 412.560 590.310 412.570
+ 590.220 412.280 590.310 412.560
+ 590.220 412.270 590.310 412.280
+ 590.220 412.060 590.310 412.270
+ 590.220 412.280 590.310 412.460
+ 590.220 412.270 590.310 412.280
+ 590.220 412.060 590.310 412.270
+ 590.220 1253.680 590.310 1254.080
+ 590.220 1251.690 590.310 1254.080
+ 590.220 1251.680 590.310 1251.690
+ 590.220 1251.400 590.310 1251.680
+ 590.220 1251.390 590.310 1251.400
+ 590.220 1238.040 590.310 1238.440
+ 590.220 1236.050 590.310 1238.440
+ 590.220 1236.040 590.310 1236.050
+ 590.220 1235.760 590.310 1236.040
+ 590.220 1235.750 590.310 1235.760
+ 590.220 1233.280 590.310 1233.680
+ 590.220 1231.290 590.310 1233.680
+ 590.220 1231.280 590.310 1231.290
+ 590.220 1231.000 590.310 1231.280
+ 590.220 1230.990 590.310 1231.000
+ 590.220 1224.440 590.310 1224.840
+ 590.220 1222.450 590.310 1224.840
+ 590.220 1222.440 590.310 1222.450
+ 590.220 1222.160 590.310 1222.440
+ 590.220 1222.150 590.310 1222.160
+ 590.220 1219.000 590.310 1219.400
+ 590.220 1217.010 590.310 1219.400
+ 590.220 1217.000 590.310 1217.010
+ 590.220 1216.720 590.310 1217.000
+ 590.220 1216.710 590.310 1216.720
+ 590.220 1210.160 590.310 1210.560
+ 590.220 1208.170 590.310 1210.560
+ 590.220 1208.160 590.310 1208.170
+ 590.220 1207.880 590.310 1208.160
+ 590.220 1207.870 590.310 1207.880
+ 590.220 1109.520 590.310 1109.920
+ 590.220 1107.530 590.310 1109.920
+ 590.220 1107.520 590.310 1107.530
+ 590.220 1107.240 590.310 1107.520
+ 590.220 1107.230 590.310 1107.240
+ 2312.790 467.140 2312.880 467.540
+ 2312.790 468.320 2312.880 468.330
+ 2312.790 468.040 2312.880 468.320
+ 2312.790 468.030 2312.880 468.040
+ 2312.790 467.140 2312.880 468.030
+ 2312.790 458.980 2312.880 459.380
+ 2312.790 461.520 2312.880 461.530
+ 2312.790 461.240 2312.880 461.520
+ 2312.790 461.230 2312.880 461.240
+ 2312.790 458.980 2312.880 461.230
+ 2312.790 452.180 2312.880 452.580
+ 2312.790 454.720 2312.880 454.730
+ 2312.790 454.440 2312.880 454.720
+ 2312.790 454.430 2312.880 454.440
+ 2312.790 452.180 2312.880 454.430
+ 2312.790 444.700 2312.880 445.100
+ 2312.790 447.240 2312.880 447.250
+ 2312.790 446.960 2312.880 447.240
+ 2312.790 446.950 2312.880 446.960
+ 2312.790 444.700 2312.880 446.950
+ 2312.790 438.580 2312.880 438.980
+ 2312.790 441.120 2312.880 441.130
+ 2312.790 440.840 2312.880 441.120
+ 2312.790 440.830 2312.880 440.840
+ 2312.790 438.580 2312.880 440.830
+ 2312.790 766.340 2312.880 766.740
+ 2312.790 768.880 2312.880 768.890
+ 2312.790 768.600 2312.880 768.880
+ 2312.790 768.575 2312.880 768.600
+ 2312.790 766.340 2312.880 768.575
+ 2312.790 1151.000 2312.880 1151.400
+ 2312.790 1149.010 2312.880 1151.400
+ 2312.790 1149.000 2312.880 1149.010
+ 2312.790 1148.720 2312.880 1149.000
+ 2312.790 1148.710 2312.880 1148.720
+ 2312.790 1143.520 2312.880 1143.920
+ 2312.790 1141.530 2312.880 1143.920
+ 2312.790 1141.520 2312.880 1141.530
+ 2312.790 1141.240 2312.880 1141.520
+ 2312.790 1141.230 2312.880 1141.240
+ 2312.790 1137.400 2312.880 1137.800
+ 2312.790 1135.410 2312.880 1137.800
+ 2312.790 1135.400 2312.880 1135.410
+ 2312.790 1135.120 2312.880 1135.400
+ 2312.790 1135.110 2312.880 1135.120
+ 2312.790 1466.340 2312.880 1466.740
+ 2312.790 1469.280 2312.880 1469.290
+ 2312.790 1469.000 2312.880 1469.280
+ 2312.790 1468.975 2312.880 1469.000
+ 2312.790 1466.340 2312.880 1468.975
+----------------------------------------
+[INFO]: COUNT: 117
+[INFO]: Should be divided by 3 or 4
+
diff --git a/mpw_precheck/outputs/reports/magic_drc_check.rdb b/mpw_precheck/outputs/reports/magic_drc_check.rdb
new file mode 100644
index 0000000..feca2d4
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.rdb
@@ -0,0 +1,590 @@
+$user_project_wrapper
+ 100
+r_0_met3.3d
+Rule File Pathname: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/mpw_precheck/ac6d093a-ca4c-4cea-a0c6-db83aaac01d6/outputs/reports/magic_drc_check.drc.report
+met3.3d: Metal3 > 3um spacing to unrelated m3 < 0.4um 
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diff --git a/mpw_precheck/outputs/reports/magic_drc_check.tcl b/mpw_precheck/outputs/reports/magic_drc_check.tcl
new file mode 100644
index 0000000..e54b9d5
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.tcl
@@ -0,0 +1,117 @@
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diff --git a/mpw_precheck/outputs/reports/magic_drc_check.tr b/mpw_precheck/outputs/reports/magic_drc_check.tr
new file mode 100644
index 0000000..b91d151
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.tr
@@ -0,0 +1,351 @@
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 556.040 ) - ( 590.310, 556.050 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 555.760 ) - ( 590.310, 556.040 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 555.750 ) - ( 590.310, 555.760 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 554.860 ) - ( 590.310, 555.750 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 554.860 ) - ( 590.310, 555.260 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 548.920 ) - ( 590.310, 549.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 539.720 ) - ( 590.310, 539.730 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 539.440 ) - ( 590.310, 539.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 539.430 ) - ( 590.310, 539.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 539.220 ) - ( 590.310, 539.430 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 547.890 ) - ( 590.310, 549.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 547.590 ) - ( 590.310, 547.890 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 539.440 ) - ( 590.310, 539.620 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 539.430 ) - ( 590.310, 539.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 539.220 ) - ( 590.310, 539.430 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 533.280 ) - ( 590.310, 533.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 532.250 ) - ( 590.310, 533.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 532.240 ) - ( 590.310, 532.250 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 531.960 ) - ( 590.310, 532.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 531.950 ) - ( 590.310, 531.960 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 513.200 ) - ( 590.310, 513.210 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 512.920 ) - ( 590.310, 513.200 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 512.910 ) - ( 590.310, 512.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 511.340 ) - ( 590.310, 512.910 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 511.340 ) - ( 590.310, 511.740 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 412.560 ) - ( 590.310, 412.570 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 412.280 ) - ( 590.310, 412.560 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 412.270 ) - ( 590.310, 412.280 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 412.060 ) - ( 590.310, 412.270 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 412.280 ) - ( 590.310, 412.460 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 412.270 ) - ( 590.310, 412.280 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 412.060 ) - ( 590.310, 412.270 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1253.680 ) - ( 590.310, 1254.080 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1251.690 ) - ( 590.310, 1254.080 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1251.680 ) - ( 590.310, 1251.690 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1251.400 ) - ( 590.310, 1251.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1251.390 ) - ( 590.310, 1251.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1238.040 ) - ( 590.310, 1238.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1236.050 ) - ( 590.310, 1238.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1236.040 ) - ( 590.310, 1236.050 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1235.760 ) - ( 590.310, 1236.040 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1235.750 ) - ( 590.310, 1235.760 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1233.280 ) - ( 590.310, 1233.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1231.290 ) - ( 590.310, 1233.680 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1231.280 ) - ( 590.310, 1231.290 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1231.000 ) - ( 590.310, 1231.280 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1230.990 ) - ( 590.310, 1231.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1224.440 ) - ( 590.310, 1224.840 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1222.450 ) - ( 590.310, 1224.840 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1222.440 ) - ( 590.310, 1222.450 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1222.160 ) - ( 590.310, 1222.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1222.150 ) - ( 590.310, 1222.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1219.000 ) - ( 590.310, 1219.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1217.010 ) - ( 590.310, 1219.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1217.000 ) - ( 590.310, 1217.010 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1216.720 ) - ( 590.310, 1217.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1216.710 ) - ( 590.310, 1216.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1210.160 ) - ( 590.310, 1210.560 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1208.170 ) - ( 590.310, 1210.560 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1208.160 ) - ( 590.310, 1208.170 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1207.880 ) - ( 590.310, 1208.160 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1207.870 ) - ( 590.310, 1207.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1109.520 ) - ( 590.310, 1109.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1107.530 ) - ( 590.310, 1109.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1107.520 ) - ( 590.310, 1107.530 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1107.240 ) - ( 590.310, 1107.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 590.220, 1107.230 ) - ( 590.310, 1107.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 467.140 ) - ( 2312.880, 467.540 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 468.320 ) - ( 2312.880, 468.330 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 468.040 ) - ( 2312.880, 468.320 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 468.030 ) - ( 2312.880, 468.040 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 467.140 ) - ( 2312.880, 468.030 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 458.980 ) - ( 2312.880, 459.380 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 461.520 ) - ( 2312.880, 461.530 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 461.240 ) - ( 2312.880, 461.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 461.230 ) - ( 2312.880, 461.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 458.980 ) - ( 2312.880, 461.230 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 452.180 ) - ( 2312.880, 452.580 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 454.720 ) - ( 2312.880, 454.730 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 454.440 ) - ( 2312.880, 454.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 454.430 ) - ( 2312.880, 454.440 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 452.180 ) - ( 2312.880, 454.430 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 444.700 ) - ( 2312.880, 445.100 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 447.240 ) - ( 2312.880, 447.250 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 446.960 ) - ( 2312.880, 447.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 446.950 ) - ( 2312.880, 446.960 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 444.700 ) - ( 2312.880, 446.950 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 438.580 ) - ( 2312.880, 438.980 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 441.120 ) - ( 2312.880, 441.130 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 440.840 ) - ( 2312.880, 441.120 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 440.830 ) - ( 2312.880, 440.840 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 438.580 ) - ( 2312.880, 440.830 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 766.340 ) - ( 2312.880, 766.740 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 768.880 ) - ( 2312.880, 768.890 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 768.600 ) - ( 2312.880, 768.880 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 768.575 ) - ( 2312.880, 768.600 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 766.340 ) - ( 2312.880, 768.575 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1151.000 ) - ( 2312.880, 1151.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1149.010 ) - ( 2312.880, 1151.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1149.000 ) - ( 2312.880, 1149.010 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1148.720 ) - ( 2312.880, 1149.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1148.710 ) - ( 2312.880, 1148.720 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1143.520 ) - ( 2312.880, 1143.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1141.530 ) - ( 2312.880, 1143.920 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1141.520 ) - ( 2312.880, 1141.530 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1141.240 ) - ( 2312.880, 1141.520 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1141.230 ) - ( 2312.880, 1141.240 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1137.400 ) - ( 2312.880, 1137.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1135.410 ) - ( 2312.880, 1137.800 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1135.400 ) - ( 2312.880, 1135.410 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1135.120 ) - ( 2312.880, 1135.400 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1135.110 ) - ( 2312.880, 1135.120 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1466.340 ) - ( 2312.880, 1466.740 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1469.280 ) - ( 2312.880, 1469.290 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1469.000 ) - ( 2312.880, 1469.280 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1468.975 ) - ( 2312.880, 1469.000 ) on Layer met3
+  violation type: Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d
+    srcs: N/A N/A
+    bbox = ( 2312.790, 1466.340 ) - ( 2312.880, 1468.975 ) on Layer met3
diff --git a/mpw_precheck/outputs/reports/magic_drc_check.xml b/mpw_precheck/outputs/reports/magic_drc_check.xml
new file mode 100644
index 0000000..e45dcce
--- /dev/null
+++ b/mpw_precheck/outputs/reports/magic_drc_check.xml
@@ -0,0 +1,1302 @@
+<?xml version="1.0" ?>
+<report-database>
+    <categories>
+        <category>
+            <name>Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d</name>
+        </category>
+    </categories>
+    <cells>
+        <cell>
+            <name>user_project_wrapper</name>
+        </cell>
+    </cells>
+    <items>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,556.040;590.310,556.050)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,555.760;590.310,556.040)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,555.750;590.310,555.760)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,554.860;590.310,555.750)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,554.860;590.310,555.260)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
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+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,548.920;590.310,549.320)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,539.720;590.310,539.730)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+            <values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,547.890;590.310,549.320)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,547.590;590.310,547.890)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+            <values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+            <values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,533.280;590.310,533.680)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,532.250;590.310,533.680)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (590.220,532.240;590.310,532.250)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
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+            <cell>user_project_wrapper</cell>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
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+            <values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+            <values>
+                <value>box: (590.220,512.910;590.310,512.920)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
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+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+        <item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
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+                <value>text: 'Between N/A N/A'</value>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+        <item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
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+                <value>text: 'Between N/A N/A'</value>
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+        <item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
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+        <item>
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+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
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+            <values>
+                <value>box: (2312.790,441.120;2312.880,441.130)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,440.840;2312.880,441.120)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,440.830;2312.880,440.840)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,438.580;2312.880,440.830)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,766.340;2312.880,766.740)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,768.880;2312.880,768.890)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,768.600;2312.880,768.880)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,768.575;2312.880,768.600)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,766.340;2312.880,768.575)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1151.000;2312.880,1151.400)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1149.010;2312.880,1151.400)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1149.000;2312.880,1149.010)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1148.720;2312.880,1149.000)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1148.710;2312.880,1148.720)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1143.520;2312.880,1143.920)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1141.530;2312.880,1143.920)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1141.520;2312.880,1141.530)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1141.240;2312.880,1141.520)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1141.230;2312.880,1141.240)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1137.400;2312.880,1137.800)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1135.410;2312.880,1137.800)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1135.400;2312.880,1135.410)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1135.120;2312.880,1135.400)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1135.110;2312.880,1135.120)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1466.340;2312.880,1466.740)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1469.280;2312.880,1469.290)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1469.000;2312.880,1469.280)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1468.975;2312.880,1469.000)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+        <item>
+            <category>'Metal3_gt_3um_spacing_to_unrelated_m3_lt_0dot4um_met3dot3d'</category>
+            <cell>user_project_wrapper</cell>
+            <visited>false</visited>
+            <multiplicity>1</multiplicity>
+            <values>
+                <value>box: (2312.790,1466.340;2312.880,1468.975)</value>
+                <value>text: 'On layer met3'</value>
+                <value>text: 'Between N/A N/A'</value>
+            </values>
+        </item>
+    </items>
+</report-database>
diff --git a/mpw_precheck/outputs/user_project_wrapper.filtered.v b/mpw_precheck/outputs/user_project_wrapper.filtered.v
new file mode 100644
index 0000000..533bb72
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.filtered.v
@@ -0,0 +1,16892 @@
+module user_project_wrapper (user_clock2,
+    vccd1,
+    vccd2,
+    vdda1,
+    vdda2,
+    vssa1,
+    vssa2,
+    vssd1,
+    vssd2,
+    wb_clk_i,
+    wb_rst_i,
+    wbs_ack_o,
+    wbs_cyc_i,
+    wbs_stb_i,
+    wbs_we_i,
+    analog_io,
+    io_in,
+    io_oeb,
+    io_out,
+    la_data_in,
+    la_data_out,
+    la_oenb,
+    user_irq,
+    wbs_adr_i,
+    wbs_dat_i,
+    wbs_dat_o,
+    wbs_sel_i);
+ input user_clock2;
+ input vccd1;
+ input vccd2;
+ input vdda1;
+ input vdda2;
+ input vssa1;
+ input vssa2;
+ input vssd1;
+ input vssd2;
+ input wb_clk_i;
+ input wb_rst_i;
+ output wbs_ack_o;
+ input wbs_cyc_i;
+ input wbs_stb_i;
+ input wbs_we_i;
+ inout [28:0] analog_io;
+ input [37:0] io_in;
+ output [37:0] io_oeb;
+ output [37:0] io_out;
+ input [127:0] la_data_in;
+ output [127:0] la_data_out;
+ input [127:0] la_oenb;
+ output [2:0] user_irq;
+ input [31:0] wbs_adr_i;
+ input [31:0] wbs_dat_i;
+ output [31:0] wbs_dat_o;
+ input [3:0] wbs_sel_i;
+
+ wire net2008;
+ wire net1965;
+ wire net1966;
+ wire net1967;
+ wire net1968;
+ wire net1969;
+ wire net1970;
+ wire net1971;
+ wire net1972;
+ wire net1973;
+ wire net1974;
+ wire net2009;
+ wire net1975;
+ wire net1976;
+ wire net1977;
+ wire net1978;
+ wire net1979;
+ wire net1980;
+ wire net1981;
+ wire net1982;
+ wire net1983;
+ wire net1984;
+ wire net2010;
+ wire net1985;
+ wire net1986;
+ wire net1987;
+ wire net1988;
+ wire net1989;
+ wire net1990;
+ wire net1991;
+ wire net1850;
+ wire net2011;
+ wire net2012;
+ wire net1960;
+ wire net1961;
+ wire net1962;
+ wire net1963;
+ wire net1964;
+ wire net1851;
+ wire net1861;
+ wire net1862;
+ wire net1863;
+ wire net1864;
+ wire net1865;
+ wire net1866;
+ wire net1867;
+ wire net1868;
+ wire net1869;
+ wire net1870;
+ wire net1852;
+ wire net1871;
+ wire net1872;
+ wire net1873;
+ wire net1874;
+ wire net1875;
+ wire net1876;
+ wire net1877;
+ wire net1878;
+ wire net1879;
+ wire net1880;
+ wire net1853;
+ wire net1881;
+ wire net1882;
+ wire net1883;
+ wire net1884;
+ wire net1885;
+ wire net1886;
+ wire net1887;
+ wire net1888;
+ wire net1854;
+ wire net1855;
+ wire net1856;
+ wire net1857;
+ wire net1858;
+ wire net1859;
+ wire net1860;
+ wire net1925;
+ wire net1926;
+ wire net1927;
+ wire net1928;
+ wire net1929;
+ wire net1930;
+ wire net1931;
+ wire net1932;
+ wire net1933;
+ wire net1934;
+ wire net1935;
+ wire net1936;
+ wire net1937;
+ wire net1938;
+ wire net1939;
+ wire net1940;
+ wire net1941;
+ wire net1942;
+ wire net1943;
+ wire net1944;
+ wire net1945;
+ wire net1946;
+ wire net1947;
+ wire net1948;
+ wire net1949;
+ wire net1950;
+ wire net1951;
+ wire net1952;
+ wire net1889;
+ wire net1890;
+ wire net1891;
+ wire net1892;
+ wire net1893;
+ wire net1894;
+ wire net1895;
+ wire net1896;
+ wire net1897;
+ wire net1898;
+ wire net1899;
+ wire net1900;
+ wire net1901;
+ wire net1902;
+ wire net1903;
+ wire net1904;
+ wire net1905;
+ wire net1906;
+ wire net1907;
+ wire net1908;
+ wire net1909;
+ wire net1910;
+ wire net1911;
+ wire net1912;
+ wire net1913;
+ wire net1914;
+ wire net1915;
+ wire net1916;
+ wire net1917;
+ wire net1918;
+ wire net1919;
+ wire net1920;
+ wire net1921;
+ wire net1922;
+ wire net1923;
+ wire net1924;
+ wire net1953;
+ wire net1954;
+ wire net1955;
+ wire _000_;
+ wire _001_;
+ wire _002_;
+ wire _003_;
+ wire _004_;
+ wire _005_;
+ wire _006_;
+ wire _007_;
+ wire _008_;
+ wire _009_;
+ wire _010_;
+ wire _011_;
+ wire _012_;
+ wire _013_;
+ wire _014_;
+ wire _015_;
+ wire _016_;
+ wire _017_;
+ wire _018_;
+ wire _019_;
+ wire _020_;
+ wire _021_;
+ wire _022_;
+ wire _023_;
+ wire _024_;
+ wire _025_;
+ wire _026_;
+ wire _027_;
+ wire _028_;
+ wire _029_;
+ wire _030_;
+ wire _031_;
+ wire _032_;
+ wire _033_;
+ wire _034_;
+ wire _035_;
+ wire _036_;
+ wire _037_;
+ wire _038_;
+ wire _039_;
+ wire _040_;
+ wire _041_;
+ wire _042_;
+ wire _043_;
+ wire _044_;
+ wire _045_;
+ wire _046_;
+ wire _047_;
+ wire _048_;
+ wire _049_;
+ wire _050_;
+ wire _051_;
+ wire _052_;
+ wire _053_;
+ wire _054_;
+ wire _055_;
+ wire _056_;
+ wire _057_;
+ wire _058_;
+ wire _059_;
+ wire _060_;
+ wire _061_;
+ wire _062_;
+ wire _063_;
+ wire _064_;
+ wire _065_;
+ wire _066_;
+ wire _067_;
+ wire _068_;
+ wire _069_;
+ wire _070_;
+ wire _071_;
+ wire _072_;
+ wire _073_;
+ wire _074_;
+ wire _075_;
+ wire _076_;
+ wire _077_;
+ wire _078_;
+ wire _079_;
+ wire _080_;
+ wire _081_;
+ wire _082_;
+ wire _083_;
+ wire _084_;
+ wire _085_;
+ wire _086_;
+ wire _087_;
+ wire _088_;
+ wire _089_;
+ wire _090_;
+ wire _091_;
+ wire _092_;
+ wire _093_;
+ wire _094_;
+ wire _095_;
+ wire _096_;
+ wire _097_;
+ wire _098_;
+ wire _099_;
+ wire _100_;
+ wire _101_;
+ wire _102_;
+ wire _103_;
+ wire _104_;
+ wire _105_;
+ wire _106_;
+ wire _107_;
+ wire _108_;
+ wire _109_;
+ wire _110_;
+ wire _111_;
+ wire _112_;
+ wire _113_;
+ wire _114_;
+ wire _115_;
+ wire _116_;
+ wire _117_;
+ wire _118_;
+ wire _119_;
+ wire _120_;
+ wire _121_;
+ wire _122_;
+ wire _123_;
+ wire _124_;
+ wire _125_;
+ wire _126_;
+ wire _127_;
+ wire _128_;
+ wire _129_;
+ wire clk;
+ wire clknet_0_clk;
+ wire clknet_1_0_0_clk;
+ wire clknet_1_0_1_clk;
+ wire clknet_1_0_2_clk;
+ wire clknet_1_0_3_clk;
+ wire clknet_1_1_0_clk;
+ wire clknet_1_1_1_clk;
+ wire clknet_1_1_2_clk;
+ wire clknet_1_1_3_clk;
+ wire net1;
+ wire net10;
+ wire net100;
+ wire net1000;
+ wire net1001;
+ wire net1002;
+ wire net1003;
+ wire net1004;
+ wire net1005;
+ wire net1006;
+ wire net1007;
+ wire net1008;
+ wire net1009;
+ wire net101;
+ wire net1010;
+ wire net1011;
+ wire net1012;
+ wire net1013;
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+ wire \sram0_dout0[0][10] ;
+ wire \sram0_dout0[0][11] ;
+ wire \sram0_dout0[0][12] ;
+ wire \sram0_dout0[0][13] ;
+ wire \sram0_dout0[0][14] ;
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+ wire \sram0_dout0[0][17] ;
+ wire \sram0_dout0[0][18] ;
+ wire \sram0_dout0[0][19] ;
+ wire \sram0_dout0[0][1] ;
+ wire \sram0_dout0[0][20] ;
+ wire \sram0_dout0[0][21] ;
+ wire \sram0_dout0[0][22] ;
+ wire \sram0_dout0[0][23] ;
+ wire \sram0_dout0[0][24] ;
+ wire \sram0_dout0[0][25] ;
+ wire \sram0_dout0[0][26] ;
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+ wire \sram0_dout0[0][30] ;
+ wire \sram0_dout0[0][31] ;
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+ wire \sram0_dout0[0][5] ;
+ wire \sram0_dout0[0][6] ;
+ wire \sram0_dout0[0][7] ;
+ wire \sram0_dout0[0][8] ;
+ wire \sram0_dout0[0][9] ;
+ wire \sram0_dout0[1][0] ;
+ wire \sram0_dout0[1][10] ;
+ wire \sram0_dout0[1][11] ;
+ wire \sram0_dout0[1][12] ;
+ wire \sram0_dout0[1][13] ;
+ wire \sram0_dout0[1][14] ;
+ wire \sram0_dout0[1][15] ;
+ wire \sram0_dout0[1][16] ;
+ wire \sram0_dout0[1][17] ;
+ wire \sram0_dout0[1][18] ;
+ wire \sram0_dout0[1][19] ;
+ wire \sram0_dout0[1][1] ;
+ wire \sram0_dout0[1][20] ;
+ wire \sram0_dout0[1][21] ;
+ wire \sram0_dout0[1][22] ;
+ wire \sram0_dout0[1][23] ;
+ wire \sram0_dout0[1][24] ;
+ wire \sram0_dout0[1][25] ;
+ wire \sram0_dout0[1][26] ;
+ wire \sram0_dout0[1][27] ;
+ wire \sram0_dout0[1][28] ;
+ wire \sram0_dout0[1][29] ;
+ wire \sram0_dout0[1][2] ;
+ wire \sram0_dout0[1][30] ;
+ wire \sram0_dout0[1][31] ;
+ wire \sram0_dout0[1][3] ;
+ wire \sram0_dout0[1][4] ;
+ wire \sram0_dout0[1][5] ;
+ wire \sram0_dout0[1][6] ;
+ wire \sram0_dout0[1][7] ;
+ wire \sram0_dout0[1][8] ;
+ wire \sram0_dout0[1][9] ;
+ wire \sram0_dout0[2][0] ;
+ wire \sram0_dout0[2][10] ;
+ wire \sram0_dout0[2][11] ;
+ wire \sram0_dout0[2][12] ;
+ wire \sram0_dout0[2][13] ;
+ wire \sram0_dout0[2][14] ;
+ wire \sram0_dout0[2][15] ;
+ wire \sram0_dout0[2][16] ;
+ wire \sram0_dout0[2][17] ;
+ wire \sram0_dout0[2][18] ;
+ wire \sram0_dout0[2][19] ;
+ wire \sram0_dout0[2][1] ;
+ wire \sram0_dout0[2][20] ;
+ wire \sram0_dout0[2][21] ;
+ wire \sram0_dout0[2][22] ;
+ wire \sram0_dout0[2][23] ;
+ wire \sram0_dout0[2][24] ;
+ wire \sram0_dout0[2][25] ;
+ wire \sram0_dout0[2][26] ;
+ wire \sram0_dout0[2][27] ;
+ wire \sram0_dout0[2][28] ;
+ wire \sram0_dout0[2][29] ;
+ wire \sram0_dout0[2][2] ;
+ wire \sram0_dout0[2][30] ;
+ wire \sram0_dout0[2][31] ;
+ wire \sram0_dout0[2][3] ;
+ wire \sram0_dout0[2][4] ;
+ wire \sram0_dout0[2][5] ;
+ wire \sram0_dout0[2][6] ;
+ wire \sram0_dout0[2][7] ;
+ wire \sram0_dout0[2][8] ;
+ wire \sram0_dout0[2][9] ;
+ wire \sram0_dout0[3][0] ;
+ wire \sram0_dout0[3][10] ;
+ wire \sram0_dout0[3][11] ;
+ wire \sram0_dout0[3][12] ;
+ wire \sram0_dout0[3][13] ;
+ wire \sram0_dout0[3][14] ;
+ wire \sram0_dout0[3][15] ;
+ wire \sram0_dout0[3][16] ;
+ wire \sram0_dout0[3][17] ;
+ wire \sram0_dout0[3][18] ;
+ wire \sram0_dout0[3][19] ;
+ wire \sram0_dout0[3][1] ;
+ wire \sram0_dout0[3][20] ;
+ wire \sram0_dout0[3][21] ;
+ wire \sram0_dout0[3][22] ;
+ wire \sram0_dout0[3][23] ;
+ wire \sram0_dout0[3][24] ;
+ wire \sram0_dout0[3][25] ;
+ wire \sram0_dout0[3][26] ;
+ wire \sram0_dout0[3][27] ;
+ wire \sram0_dout0[3][28] ;
+ wire \sram0_dout0[3][29] ;
+ wire \sram0_dout0[3][2] ;
+ wire \sram0_dout0[3][30] ;
+ wire \sram0_dout0[3][31] ;
+ wire \sram0_dout0[3][3] ;
+ wire \sram0_dout0[3][4] ;
+ wire \sram0_dout0[3][5] ;
+ wire \sram0_dout0[3][6] ;
+ wire \sram0_dout0[3][7] ;
+ wire \sram0_dout0[3][8] ;
+ wire \sram0_dout0[3][9] ;
+ wire \sram0_dout1[0][0] ;
+ wire \sram0_dout1[0][10] ;
+ wire \sram0_dout1[0][11] ;
+ wire \sram0_dout1[0][12] ;
+ wire \sram0_dout1[0][13] ;
+ wire \sram0_dout1[0][14] ;
+ wire \sram0_dout1[0][15] ;
+ wire \sram0_dout1[0][16] ;
+ wire \sram0_dout1[0][17] ;
+ wire \sram0_dout1[0][18] ;
+ wire \sram0_dout1[0][19] ;
+ wire \sram0_dout1[0][1] ;
+ wire \sram0_dout1[0][20] ;
+ wire \sram0_dout1[0][21] ;
+ wire \sram0_dout1[0][22] ;
+ wire \sram0_dout1[0][23] ;
+ wire \sram0_dout1[0][24] ;
+ wire \sram0_dout1[0][25] ;
+ wire \sram0_dout1[0][26] ;
+ wire \sram0_dout1[0][27] ;
+ wire \sram0_dout1[0][28] ;
+ wire \sram0_dout1[0][29] ;
+ wire \sram0_dout1[0][2] ;
+ wire \sram0_dout1[0][30] ;
+ wire \sram0_dout1[0][31] ;
+ wire \sram0_dout1[0][3] ;
+ wire \sram0_dout1[0][4] ;
+ wire \sram0_dout1[0][5] ;
+ wire \sram0_dout1[0][6] ;
+ wire \sram0_dout1[0][7] ;
+ wire \sram0_dout1[0][8] ;
+ wire \sram0_dout1[0][9] ;
+ wire \sram0_dout1[1][0] ;
+ wire \sram0_dout1[1][10] ;
+ wire \sram0_dout1[1][11] ;
+ wire \sram0_dout1[1][12] ;
+ wire \sram0_dout1[1][13] ;
+ wire \sram0_dout1[1][14] ;
+ wire \sram0_dout1[1][15] ;
+ wire \sram0_dout1[1][16] ;
+ wire \sram0_dout1[1][17] ;
+ wire \sram0_dout1[1][18] ;
+ wire \sram0_dout1[1][19] ;
+ wire \sram0_dout1[1][1] ;
+ wire \sram0_dout1[1][20] ;
+ wire \sram0_dout1[1][21] ;
+ wire \sram0_dout1[1][22] ;
+ wire \sram0_dout1[1][23] ;
+ wire \sram0_dout1[1][24] ;
+ wire \sram0_dout1[1][25] ;
+ wire \sram0_dout1[1][26] ;
+ wire \sram0_dout1[1][27] ;
+ wire \sram0_dout1[1][28] ;
+ wire \sram0_dout1[1][29] ;
+ wire \sram0_dout1[1][2] ;
+ wire \sram0_dout1[1][30] ;
+ wire \sram0_dout1[1][31] ;
+ wire \sram0_dout1[1][3] ;
+ wire \sram0_dout1[1][4] ;
+ wire \sram0_dout1[1][5] ;
+ wire \sram0_dout1[1][6] ;
+ wire \sram0_dout1[1][7] ;
+ wire \sram0_dout1[1][8] ;
+ wire \sram0_dout1[1][9] ;
+ wire \sram0_dout1[2][0] ;
+ wire \sram0_dout1[2][10] ;
+ wire \sram0_dout1[2][11] ;
+ wire \sram0_dout1[2][12] ;
+ wire \sram0_dout1[2][13] ;
+ wire \sram0_dout1[2][14] ;
+ wire \sram0_dout1[2][15] ;
+ wire \sram0_dout1[2][16] ;
+ wire \sram0_dout1[2][17] ;
+ wire \sram0_dout1[2][18] ;
+ wire \sram0_dout1[2][19] ;
+ wire \sram0_dout1[2][1] ;
+ wire \sram0_dout1[2][20] ;
+ wire \sram0_dout1[2][21] ;
+ wire \sram0_dout1[2][22] ;
+ wire \sram0_dout1[2][23] ;
+ wire \sram0_dout1[2][24] ;
+ wire \sram0_dout1[2][25] ;
+ wire \sram0_dout1[2][26] ;
+ wire \sram0_dout1[2][27] ;
+ wire \sram0_dout1[2][28] ;
+ wire \sram0_dout1[2][29] ;
+ wire \sram0_dout1[2][2] ;
+ wire \sram0_dout1[2][30] ;
+ wire \sram0_dout1[2][31] ;
+ wire \sram0_dout1[2][3] ;
+ wire \sram0_dout1[2][4] ;
+ wire \sram0_dout1[2][5] ;
+ wire \sram0_dout1[2][6] ;
+ wire \sram0_dout1[2][7] ;
+ wire \sram0_dout1[2][8] ;
+ wire \sram0_dout1[2][9] ;
+ wire \sram0_dout1[3][0] ;
+ wire \sram0_dout1[3][10] ;
+ wire \sram0_dout1[3][11] ;
+ wire \sram0_dout1[3][12] ;
+ wire \sram0_dout1[3][13] ;
+ wire \sram0_dout1[3][14] ;
+ wire \sram0_dout1[3][15] ;
+ wire \sram0_dout1[3][16] ;
+ wire \sram0_dout1[3][17] ;
+ wire \sram0_dout1[3][18] ;
+ wire \sram0_dout1[3][19] ;
+ wire \sram0_dout1[3][1] ;
+ wire \sram0_dout1[3][20] ;
+ wire \sram0_dout1[3][21] ;
+ wire \sram0_dout1[3][22] ;
+ wire \sram0_dout1[3][23] ;
+ wire \sram0_dout1[3][24] ;
+ wire \sram0_dout1[3][25] ;
+ wire \sram0_dout1[3][26] ;
+ wire \sram0_dout1[3][27] ;
+ wire \sram0_dout1[3][28] ;
+ wire \sram0_dout1[3][29] ;
+ wire \sram0_dout1[3][2] ;
+ wire \sram0_dout1[3][30] ;
+ wire \sram0_dout1[3][31] ;
+ wire \sram0_dout1[3][3] ;
+ wire \sram0_dout1[3][4] ;
+ wire \sram0_dout1[3][5] ;
+ wire \sram0_dout1[3][6] ;
+ wire \sram0_dout1[3][7] ;
+ wire \sram0_dout1[3][8] ;
+ wire \sram0_dout1[3][9] ;
+ sky130_sram_2kbyte_1rw1r_32x512_8 SRAM0 (.csb0(net197),
+    .csb1(net196),
+    .web0(net1956),
+    .clk0(net2022),
+    .clk1(net2028),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({net502,
+    net1226,
+    net1255,
+    net1283,
+    net1311,
+    net1339,
+    net1367,
+    net1401,
+    net455}),
+    .addr1({net497,
+    net1221,
+    net1250,
+    net1279,
+    net1306,
+    net1334,
+    net1362,
+    net1378,
+    net431}),
+    .din0({net679,
+    net698,
+    net743,
+    net762,
+    net781,
+    net800,
+    net819,
+    net839,
+    net859,
+    net879,
+    net899,
+    net919,
+    net971,
+    net991,
+    net1011,
+    net1032,
+    net1053,
+    net1074,
+    net1095,
+    net1116,
+    net1137,
+    net1161,
+    net525,
+    net547,
+    net569,
+    net591,
+    net613,
+    net635,
+    net657,
+    net717,
+    net948,
+    net1196}),
+    .dout0({\sram0_dout0[0][31] ,
+    \sram0_dout0[0][30] ,
+    \sram0_dout0[0][29] ,
+    \sram0_dout0[0][28] ,
+    \sram0_dout0[0][27] ,
+    \sram0_dout0[0][26] ,
+    \sram0_dout0[0][25] ,
+    \sram0_dout0[0][24] ,
+    \sram0_dout0[0][23] ,
+    \sram0_dout0[0][22] ,
+    \sram0_dout0[0][21] ,
+    \sram0_dout0[0][20] ,
+    \sram0_dout0[0][19] ,
+    \sram0_dout0[0][18] ,
+    \sram0_dout0[0][17] ,
+    \sram0_dout0[0][16] ,
+    \sram0_dout0[0][15] ,
+    \sram0_dout0[0][14] ,
+    \sram0_dout0[0][13] ,
+    \sram0_dout0[0][12] ,
+    \sram0_dout0[0][11] ,
+    \sram0_dout0[0][10] ,
+    \sram0_dout0[0][9] ,
+    \sram0_dout0[0][8] ,
+    \sram0_dout0[0][7] ,
+    \sram0_dout0[0][6] ,
+    \sram0_dout0[0][5] ,
+    \sram0_dout0[0][4] ,
+    \sram0_dout0[0][3] ,
+    \sram0_dout0[0][2] ,
+    \sram0_dout0[0][1] ,
+    \sram0_dout0[0][0] }),
+    .dout1({\sram0_dout1[0][31] ,
+    \sram0_dout1[0][30] ,
+    \sram0_dout1[0][29] ,
+    \sram0_dout1[0][28] ,
+    \sram0_dout1[0][27] ,
+    \sram0_dout1[0][26] ,
+    \sram0_dout1[0][25] ,
+    \sram0_dout1[0][24] ,
+    \sram0_dout1[0][23] ,
+    \sram0_dout1[0][22] ,
+    \sram0_dout1[0][21] ,
+    \sram0_dout1[0][20] ,
+    \sram0_dout1[0][19] ,
+    \sram0_dout1[0][18] ,
+    \sram0_dout1[0][17] ,
+    \sram0_dout1[0][16] ,
+    \sram0_dout1[0][15] ,
+    \sram0_dout1[0][14] ,
+    \sram0_dout1[0][13] ,
+    \sram0_dout1[0][12] ,
+    \sram0_dout1[0][11] ,
+    \sram0_dout1[0][10] ,
+    \sram0_dout1[0][9] ,
+    \sram0_dout1[0][8] ,
+    \sram0_dout1[0][7] ,
+    \sram0_dout1[0][6] ,
+    \sram0_dout1[0][5] ,
+    \sram0_dout1[0][4] ,
+    \sram0_dout1[0][3] ,
+    \sram0_dout1[0][2] ,
+    \sram0_dout1[0][1] ,
+    \sram0_dout1[0][0] }),
+    .wmask0({net1995,
+    net1994,
+    net1993,
+    net1992}));
+ sky130_fd_sc_hd__conb_1 SRAM0_1956 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1956));
+ sky130_fd_sc_hd__conb_1 SRAM0_1992 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1992));
+ sky130_fd_sc_hd__conb_1 SRAM0_1993 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1993));
+ sky130_fd_sc_hd__conb_1 SRAM0_1994 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1994));
+ sky130_fd_sc_hd__conb_1 SRAM0_1995 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1995));
+ sky130_sram_2kbyte_1rw1r_32x512_8 SRAM1 (.csb0(net330),
+    .csb1(net323),
+    .web0(net1957),
+    .clk0(net2033),
+    .clk1(net2031),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({net493,
+    net1217,
+    net1247,
+    net1275,
+    net1303,
+    net1331,
+    net1359,
+    net1396,
+    net449}),
+    .addr1({net489,
+    net1213,
+    net1243,
+    net1271,
+    net1299,
+    net1327,
+    net1355,
+    net1390,
+    net443}),
+    .din0({net685,
+    net704,
+    net750,
+    net769,
+    net788,
+    net807,
+    net826,
+    net846,
+    net866,
+    net886,
+    net906,
+    net926,
+    net978,
+    net998,
+    net1018,
+    net1039,
+    net1060,
+    net1081,
+    net1103,
+    net1124,
+    net1145,
+    net1169,
+    net533,
+    net555,
+    net577,
+    net599,
+    net621,
+    net643,
+    net665,
+    net725,
+    net956,
+    net1190}),
+    .dout0({\sram0_dout0[1][31] ,
+    \sram0_dout0[1][30] ,
+    \sram0_dout0[1][29] ,
+    \sram0_dout0[1][28] ,
+    \sram0_dout0[1][27] ,
+    \sram0_dout0[1][26] ,
+    \sram0_dout0[1][25] ,
+    \sram0_dout0[1][24] ,
+    \sram0_dout0[1][23] ,
+    \sram0_dout0[1][22] ,
+    \sram0_dout0[1][21] ,
+    \sram0_dout0[1][20] ,
+    \sram0_dout0[1][19] ,
+    \sram0_dout0[1][18] ,
+    \sram0_dout0[1][17] ,
+    \sram0_dout0[1][16] ,
+    \sram0_dout0[1][15] ,
+    \sram0_dout0[1][14] ,
+    \sram0_dout0[1][13] ,
+    \sram0_dout0[1][12] ,
+    \sram0_dout0[1][11] ,
+    \sram0_dout0[1][10] ,
+    \sram0_dout0[1][9] ,
+    \sram0_dout0[1][8] ,
+    \sram0_dout0[1][7] ,
+    \sram0_dout0[1][6] ,
+    \sram0_dout0[1][5] ,
+    \sram0_dout0[1][4] ,
+    \sram0_dout0[1][3] ,
+    \sram0_dout0[1][2] ,
+    \sram0_dout0[1][1] ,
+    \sram0_dout0[1][0] }),
+    .dout1({\sram0_dout1[1][31] ,
+    \sram0_dout1[1][30] ,
+    \sram0_dout1[1][29] ,
+    \sram0_dout1[1][28] ,
+    \sram0_dout1[1][27] ,
+    \sram0_dout1[1][26] ,
+    \sram0_dout1[1][25] ,
+    \sram0_dout1[1][24] ,
+    \sram0_dout1[1][23] ,
+    \sram0_dout1[1][22] ,
+    \sram0_dout1[1][21] ,
+    \sram0_dout1[1][20] ,
+    \sram0_dout1[1][19] ,
+    \sram0_dout1[1][18] ,
+    \sram0_dout1[1][17] ,
+    \sram0_dout1[1][16] ,
+    \sram0_dout1[1][15] ,
+    \sram0_dout1[1][14] ,
+    \sram0_dout1[1][13] ,
+    \sram0_dout1[1][12] ,
+    \sram0_dout1[1][11] ,
+    \sram0_dout1[1][10] ,
+    \sram0_dout1[1][9] ,
+    \sram0_dout1[1][8] ,
+    \sram0_dout1[1][7] ,
+    \sram0_dout1[1][6] ,
+    \sram0_dout1[1][5] ,
+    \sram0_dout1[1][4] ,
+    \sram0_dout1[1][3] ,
+    \sram0_dout1[1][2] ,
+    \sram0_dout1[1][1] ,
+    \sram0_dout1[1][0] }),
+    .wmask0({net1999,
+    net1998,
+    net1997,
+    net1996}));
+ sky130_fd_sc_hd__conb_1 SRAM1_1957 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1957));
+ sky130_fd_sc_hd__conb_1 SRAM1_1996 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1996));
+ sky130_fd_sc_hd__conb_1 SRAM1_1997 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1997));
+ sky130_fd_sc_hd__conb_1 SRAM1_1998 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1998));
+ sky130_fd_sc_hd__conb_1 SRAM1_1999 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1999));
+ sky130_sram_2kbyte_1rw1r_32x512_8 SRAM2 (.csb0(net320),
+    .csb1(net316),
+    .web0(net1958),
+    .clk0(net2020),
+    .clk1(net2026),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({net477,
+    net1201,
+    net1231,
+    net1260,
+    net1288,
+    net1316,
+    net1344,
+    net1372,
+    net425}),
+    .addr1({net483,
+    net1207,
+    net1236,
+    net1265,
+    net1293,
+    net1321,
+    net1349,
+    net1375,
+    net428}),
+    .din0({net676,
+    net695,
+    net740,
+    net759,
+    net778,
+    net797,
+    net816,
+    net836,
+    net856,
+    net876,
+    net896,
+    net916,
+    net968,
+    net988,
+    net1008,
+    net1029,
+    net1050,
+    net1071,
+    net1092,
+    net1113,
+    net1134,
+    net1158,
+    net522,
+    net544,
+    net566,
+    net588,
+    net610,
+    net632,
+    net654,
+    net714,
+    net945,
+    net1179}),
+    .dout0({\sram0_dout0[2][31] ,
+    \sram0_dout0[2][30] ,
+    \sram0_dout0[2][29] ,
+    \sram0_dout0[2][28] ,
+    \sram0_dout0[2][27] ,
+    \sram0_dout0[2][26] ,
+    \sram0_dout0[2][25] ,
+    \sram0_dout0[2][24] ,
+    \sram0_dout0[2][23] ,
+    \sram0_dout0[2][22] ,
+    \sram0_dout0[2][21] ,
+    \sram0_dout0[2][20] ,
+    \sram0_dout0[2][19] ,
+    \sram0_dout0[2][18] ,
+    \sram0_dout0[2][17] ,
+    \sram0_dout0[2][16] ,
+    \sram0_dout0[2][15] ,
+    \sram0_dout0[2][14] ,
+    \sram0_dout0[2][13] ,
+    \sram0_dout0[2][12] ,
+    \sram0_dout0[2][11] ,
+    \sram0_dout0[2][10] ,
+    \sram0_dout0[2][9] ,
+    \sram0_dout0[2][8] ,
+    \sram0_dout0[2][7] ,
+    \sram0_dout0[2][6] ,
+    \sram0_dout0[2][5] ,
+    \sram0_dout0[2][4] ,
+    \sram0_dout0[2][3] ,
+    \sram0_dout0[2][2] ,
+    \sram0_dout0[2][1] ,
+    \sram0_dout0[2][0] }),
+    .dout1({\sram0_dout1[2][31] ,
+    \sram0_dout1[2][30] ,
+    \sram0_dout1[2][29] ,
+    \sram0_dout1[2][28] ,
+    \sram0_dout1[2][27] ,
+    \sram0_dout1[2][26] ,
+    \sram0_dout1[2][25] ,
+    \sram0_dout1[2][24] ,
+    \sram0_dout1[2][23] ,
+    \sram0_dout1[2][22] ,
+    \sram0_dout1[2][21] ,
+    \sram0_dout1[2][20] ,
+    \sram0_dout1[2][19] ,
+    \sram0_dout1[2][18] ,
+    \sram0_dout1[2][17] ,
+    \sram0_dout1[2][16] ,
+    \sram0_dout1[2][15] ,
+    \sram0_dout1[2][14] ,
+    \sram0_dout1[2][13] ,
+    \sram0_dout1[2][12] ,
+    \sram0_dout1[2][11] ,
+    \sram0_dout1[2][10] ,
+    \sram0_dout1[2][9] ,
+    \sram0_dout1[2][8] ,
+    \sram0_dout1[2][7] ,
+    \sram0_dout1[2][6] ,
+    \sram0_dout1[2][5] ,
+    \sram0_dout1[2][4] ,
+    \sram0_dout1[2][3] ,
+    \sram0_dout1[2][2] ,
+    \sram0_dout1[2][1] ,
+    \sram0_dout1[2][0] }),
+    .wmask0({net2003,
+    net2002,
+    net2001,
+    net2000}));
+ sky130_fd_sc_hd__conb_1 SRAM2_1958 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1958));
+ sky130_fd_sc_hd__conb_1 SRAM2_2000 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2000));
+ sky130_fd_sc_hd__conb_1 SRAM2_2001 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2001));
+ sky130_fd_sc_hd__conb_1 SRAM2_2002 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2002));
+ sky130_fd_sc_hd__conb_1 SRAM2_2003 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2003));
+ sky130_sram_2kbyte_1rw1r_32x512_8 SRAM3 (.csb0(net193),
+    .csb1(net184),
+    .web0(net1959),
+    .clk0(net2035),
+    .clk1(net2029),
+    .vccd1(vccd1),
+    .vssd1(vssd1),
+    .addr0({net480,
+    net1204,
+    net1234,
+    net1263,
+    net1291,
+    net1319,
+    net1347,
+    net1384,
+    net437}),
+    .addr1({net486,
+    net1210,
+    net1240,
+    net1268,
+    net1296,
+    net1324,
+    net1352,
+    net1387,
+    net440}),
+    .din0({net682,
+    net701,
+    net747,
+    net766,
+    net785,
+    net804,
+    net823,
+    net843,
+    net863,
+    net883,
+    net903,
+    net923,
+    net975,
+    net995,
+    net1015,
+    net1036,
+    net1057,
+    net1078,
+    net1100,
+    net1121,
+    net1142,
+    net1166,
+    net530,
+    net552,
+    net574,
+    net596,
+    net618,
+    net640,
+    net662,
+    net722,
+    net953,
+    net1187}),
+    .dout0({\sram0_dout0[3][31] ,
+    \sram0_dout0[3][30] ,
+    \sram0_dout0[3][29] ,
+    \sram0_dout0[3][28] ,
+    \sram0_dout0[3][27] ,
+    \sram0_dout0[3][26] ,
+    \sram0_dout0[3][25] ,
+    \sram0_dout0[3][24] ,
+    \sram0_dout0[3][23] ,
+    \sram0_dout0[3][22] ,
+    \sram0_dout0[3][21] ,
+    \sram0_dout0[3][20] ,
+    \sram0_dout0[3][19] ,
+    \sram0_dout0[3][18] ,
+    \sram0_dout0[3][17] ,
+    \sram0_dout0[3][16] ,
+    \sram0_dout0[3][15] ,
+    \sram0_dout0[3][14] ,
+    \sram0_dout0[3][13] ,
+    \sram0_dout0[3][12] ,
+    \sram0_dout0[3][11] ,
+    \sram0_dout0[3][10] ,
+    \sram0_dout0[3][9] ,
+    \sram0_dout0[3][8] ,
+    \sram0_dout0[3][7] ,
+    \sram0_dout0[3][6] ,
+    \sram0_dout0[3][5] ,
+    \sram0_dout0[3][4] ,
+    \sram0_dout0[3][3] ,
+    \sram0_dout0[3][2] ,
+    \sram0_dout0[3][1] ,
+    \sram0_dout0[3][0] }),
+    .dout1({\sram0_dout1[3][31] ,
+    \sram0_dout1[3][30] ,
+    \sram0_dout1[3][29] ,
+    \sram0_dout1[3][28] ,
+    \sram0_dout1[3][27] ,
+    \sram0_dout1[3][26] ,
+    \sram0_dout1[3][25] ,
+    \sram0_dout1[3][24] ,
+    \sram0_dout1[3][23] ,
+    \sram0_dout1[3][22] ,
+    \sram0_dout1[3][21] ,
+    \sram0_dout1[3][20] ,
+    \sram0_dout1[3][19] ,
+    \sram0_dout1[3][18] ,
+    \sram0_dout1[3][17] ,
+    \sram0_dout1[3][16] ,
+    \sram0_dout1[3][15] ,
+    \sram0_dout1[3][14] ,
+    \sram0_dout1[3][13] ,
+    \sram0_dout1[3][12] ,
+    \sram0_dout1[3][11] ,
+    \sram0_dout1[3][10] ,
+    \sram0_dout1[3][9] ,
+    \sram0_dout1[3][8] ,
+    \sram0_dout1[3][7] ,
+    \sram0_dout1[3][6] ,
+    \sram0_dout1[3][5] ,
+    \sram0_dout1[3][4] ,
+    \sram0_dout1[3][3] ,
+    \sram0_dout1[3][2] ,
+    \sram0_dout1[3][1] ,
+    \sram0_dout1[3][0] }),
+    .wmask0({net2007,
+    net2006,
+    net2005,
+    net2004}));
+ sky130_fd_sc_hd__conb_1 SRAM3_1959 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1959));
+ sky130_fd_sc_hd__conb_1 SRAM3_2004 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2004));
+ sky130_fd_sc_hd__conb_1 SRAM3_2005 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2005));
+ sky130_fd_sc_hd__conb_1 SRAM3_2006 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2006));
+ sky130_fd_sc_hd__conb_1 SRAM3_2007 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2007));
+ sky130_fd_sc_hd__clkinv_2 _150_ (.A(net507),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .Y(_009_));
+ sky130_fd_sc_hd__nand3b_1 _151_ (.A_N(net406),
+    .B(net17),
+    .C(net50),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .Y(_010_));
+ sky130_fd_sc_hd__clkdlybuf4s18_2 _152_ (.A(net396),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_011_));
+ sky130_fd_sc_hd__or2_1 _153_ (.A(net468),
+    .B(net460),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_012_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _154_ (.A(_012_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_013_));
+ sky130_fd_sc_hd__or3_1 _155_ (.A(_009_),
+    .B(_011_),
+    .C(_013_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_014_));
+ sky130_fd_sc_hd__buf_6 _156_ (.A(_014_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_000_));
+ sky130_fd_sc_hd__or3_1 _157_ (.A(net507),
+    .B(_011_),
+    .C(_013_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_015_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _158_ (.A(_015_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_004_));
+ sky130_fd_sc_hd__inv_2 _159_ (.A(net468),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .Y(_016_));
+ sky130_fd_sc_hd__clkbuf_4 _160_ (.A(_016_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_017_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _161_ (.A(_017_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_018_));
+ sky130_fd_sc_hd__or4_1 _162_ (.A(_009_),
+    .B(_018_),
+    .C(net460),
+    .D(net396),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_019_));
+ sky130_fd_sc_hd__buf_6 _163_ (.A(_019_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_001_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _164_ (.A(_017_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_020_));
+ sky130_fd_sc_hd__or4_1 _165_ (.A(net507),
+    .B(_020_),
+    .C(net460),
+    .D(net396),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_021_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _166_ (.A(_021_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_005_));
+ sky130_fd_sc_hd__inv_2 _167_ (.A(net460),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .Y(_022_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _168_ (.A(_022_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_023_));
+ sky130_fd_sc_hd__or4_1 _169_ (.A(_009_),
+    .B(net468),
+    .C(_023_),
+    .D(net397),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_024_));
+ sky130_fd_sc_hd__clkbuf_4 _170_ (.A(_024_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_002_));
+ sky130_fd_sc_hd__or4_1 _171_ (.A(net508),
+    .B(net468),
+    .C(_023_),
+    .D(net396),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_025_));
+ sky130_fd_sc_hd__buf_6 _172_ (.A(_025_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_006_));
+ sky130_fd_sc_hd__and2_1 _173_ (.A(net469),
+    .B(net461),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_026_));
+ sky130_fd_sc_hd__clkbuf_4 _174_ (.A(_026_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_027_));
+ sky130_fd_sc_hd__or3b_1 _175_ (.A(_009_),
+    .B(_011_),
+    .C_N(_027_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_028_));
+ sky130_fd_sc_hd__clkbuf_4 _176_ (.A(_028_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_003_));
+ sky130_fd_sc_hd__or3b_1 _177_ (.A(net507),
+    .B(_011_),
+    .C_N(_027_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_029_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _178_ (.A(_029_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_007_));
+ sky130_fd_sc_hd__mux2_2 _179_ (.A0(net1407),
+    .A1(wb_clk_i),
+    .S(net936),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_030_));
+ sky130_fd_sc_hd__buf_1 _180_ (.A(net2013),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clk));
+ sky130_fd_sc_hd__clkbuf_4 _181_ (.A(_012_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_031_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _182_ (.A(_031_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_032_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _183_ (.A(_020_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_033_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _184_ (.A(_023_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_034_));
+ sky130_fd_sc_hd__o21a_1 _185_ (.A1(_033_),
+    .A2(net1846),
+    .B1(_034_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_035_));
+ sky130_fd_sc_hd__clkbuf_4 _186_ (.A(_016_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_036_));
+ sky130_fd_sc_hd__clkbuf_4 _187_ (.A(net419),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_037_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _188_ (.A(_027_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_038_));
+ sky130_fd_sc_hd__a22o_1 _189_ (.A1(net415),
+    .A2(net1703),
+    .B1(_038_),
+    .B2(net1634),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_039_));
+ sky130_fd_sc_hd__o22a_1 _190_ (.A1(\sram0_dout1[0][0] ),
+    .A2(_032_),
+    .B1(net395),
+    .B2(_039_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net52));
+ sky130_fd_sc_hd__o21a_1 _191_ (.A1(_033_),
+    .A2(net1797),
+    .B1(_034_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_040_));
+ sky130_fd_sc_hd__a22o_1 _192_ (.A1(net415),
+    .A2(net1681),
+    .B1(_038_),
+    .B2(net1557),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_041_));
+ sky130_fd_sc_hd__o22a_1 _193_ (.A1(\sram0_dout1[0][1] ),
+    .A2(_032_),
+    .B1(net394),
+    .B2(_041_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net63));
+ sky130_fd_sc_hd__o21a_1 _194_ (.A1(_033_),
+    .A2(net1743),
+    .B1(_034_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_042_));
+ sky130_fd_sc_hd__a22o_1 _195_ (.A1(net415),
+    .A2(net1659),
+    .B1(_038_),
+    .B2(net1480),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_043_));
+ sky130_fd_sc_hd__o22a_1 _196_ (.A1(\sram0_dout1[0][2] ),
+    .A2(_032_),
+    .B1(net393),
+    .B2(_043_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net74));
+ sky130_fd_sc_hd__o21a_1 _197_ (.A1(_033_),
+    .A2(net1729),
+    .B1(_034_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_044_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _198_ (.A(net418),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_045_));
+ sky130_fd_sc_hd__a22o_1 _199_ (.A1(_045_),
+    .A2(net1653),
+    .B1(_038_),
+    .B2(net1458),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_046_));
+ sky130_fd_sc_hd__o22a_1 _200_ (.A1(\sram0_dout1[0][3] ),
+    .A2(_032_),
+    .B1(net392),
+    .B2(_046_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net85));
+ sky130_fd_sc_hd__o21a_1 _201_ (.A1(_033_),
+    .A2(net1725),
+    .B1(_034_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_047_));
+ sky130_fd_sc_hd__a22o_1 _202_ (.A1(_045_),
+    .A2(net1651),
+    .B1(_038_),
+    .B2(net1451),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_048_));
+ sky130_fd_sc_hd__o22a_1 _203_ (.A1(\sram0_dout1[0][4] ),
+    .A2(_032_),
+    .B1(net391),
+    .B2(_048_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net96));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _204_ (.A(_031_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_049_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _205_ (.A(_020_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_050_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _206_ (.A(_022_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_051_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _207_ (.A(_051_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_052_));
+ sky130_fd_sc_hd__o21a_1 _208_ (.A1(_050_),
+    .A2(net1721),
+    .B1(_052_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_053_));
+ sky130_fd_sc_hd__clkbuf_4 _209_ (.A(_026_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_054_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _210_ (.A(_054_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_055_));
+ sky130_fd_sc_hd__a22o_1 _211_ (.A1(_045_),
+    .A2(net1649),
+    .B1(_055_),
+    .B2(net1444),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_056_));
+ sky130_fd_sc_hd__o22a_1 _212_ (.A1(\sram0_dout1[0][5] ),
+    .A2(_049_),
+    .B1(net390),
+    .B2(_056_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net107));
+ sky130_fd_sc_hd__o21a_1 _213_ (.A1(_050_),
+    .A2(net1717),
+    .B1(_052_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_057_));
+ sky130_fd_sc_hd__a22o_1 _214_ (.A1(_045_),
+    .A2(net1647),
+    .B1(_055_),
+    .B2(net1437),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_058_));
+ sky130_fd_sc_hd__o22a_1 _215_ (.A1(\sram0_dout1[0][6] ),
+    .A2(_049_),
+    .B1(net389),
+    .B2(_058_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net112));
+ sky130_fd_sc_hd__o21a_1 _216_ (.A1(_050_),
+    .A2(net1713),
+    .B1(_052_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_059_));
+ sky130_fd_sc_hd__a22o_1 _217_ (.A1(_045_),
+    .A2(net1645),
+    .B1(_055_),
+    .B2(net1430),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_060_));
+ sky130_fd_sc_hd__o22a_1 _218_ (.A1(\sram0_dout1[0][7] ),
+    .A2(_049_),
+    .B1(net388),
+    .B2(_060_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net113));
+ sky130_fd_sc_hd__o21a_1 _219_ (.A1(_050_),
+    .A2(net1709),
+    .B1(_052_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_061_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _220_ (.A(net418),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_062_));
+ sky130_fd_sc_hd__a22o_1 _221_ (.A1(_062_),
+    .A2(net1643),
+    .B1(_055_),
+    .B2(net1423),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_063_));
+ sky130_fd_sc_hd__o22a_2 _222_ (.A1(\sram0_dout1[0][8] ),
+    .A2(_049_),
+    .B1(net387),
+    .B2(_063_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net114));
+ sky130_fd_sc_hd__o21a_1 _223_ (.A1(_050_),
+    .A2(net1705),
+    .B1(_052_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_064_));
+ sky130_fd_sc_hd__a22o_1 _224_ (.A1(_062_),
+    .A2(net1641),
+    .B1(_055_),
+    .B2(net1416),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_065_));
+ sky130_fd_sc_hd__o22a_1 _225_ (.A1(\sram0_dout1[0][9] ),
+    .A2(_049_),
+    .B1(net386),
+    .B2(_065_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net115));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _226_ (.A(_031_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_066_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _227_ (.A(_020_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_067_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _228_ (.A(_051_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_068_));
+ sky130_fd_sc_hd__o21a_1 _229_ (.A1(_067_),
+    .A2(net1842),
+    .B1(_068_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_069_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _230_ (.A(_054_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_070_));
+ sky130_fd_sc_hd__a22o_1 _231_ (.A1(_062_),
+    .A2(net1701),
+    .B1(_070_),
+    .B2(net1627),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_071_));
+ sky130_fd_sc_hd__o22a_1 _232_ (.A1(\sram0_dout1[0][10] ),
+    .A2(_066_),
+    .B1(net385),
+    .B2(_071_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net53));
+ sky130_fd_sc_hd__o21a_1 _233_ (.A1(_067_),
+    .A2(net1838),
+    .B1(_068_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_072_));
+ sky130_fd_sc_hd__a22o_1 _234_ (.A1(_062_),
+    .A2(net1699),
+    .B1(_070_),
+    .B2(net1620),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_073_));
+ sky130_fd_sc_hd__o22a_1 _235_ (.A1(\sram0_dout1[0][11] ),
+    .A2(_066_),
+    .B1(net384),
+    .B2(_073_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net54));
+ sky130_fd_sc_hd__o21a_1 _236_ (.A1(_067_),
+    .A2(net1834),
+    .B1(_068_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_074_));
+ sky130_fd_sc_hd__a22o_1 _237_ (.A1(_062_),
+    .A2(net1697),
+    .B1(_070_),
+    .B2(net1613),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_075_));
+ sky130_fd_sc_hd__o22a_1 _238_ (.A1(\sram0_dout1[0][12] ),
+    .A2(_066_),
+    .B1(net383),
+    .B2(_075_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net55));
+ sky130_fd_sc_hd__o21a_1 _239_ (.A1(_067_),
+    .A2(net1830),
+    .B1(_068_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_076_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _240_ (.A(net420),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_077_));
+ sky130_fd_sc_hd__a22o_2 _241_ (.A1(_077_),
+    .A2(net1695),
+    .B1(_070_),
+    .B2(net1606),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_078_));
+ sky130_fd_sc_hd__o22a_1 _242_ (.A1(\sram0_dout1[0][13] ),
+    .A2(_066_),
+    .B1(_076_),
+    .B2(_078_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net56));
+ sky130_fd_sc_hd__o21a_1 _243_ (.A1(_067_),
+    .A2(net1826),
+    .B1(_068_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_079_));
+ sky130_fd_sc_hd__a22o_2 _244_ (.A1(_077_),
+    .A2(net1693),
+    .B1(_070_),
+    .B2(net1599),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_080_));
+ sky130_fd_sc_hd__o22a_1 _245_ (.A1(\sram0_dout1[0][14] ),
+    .A2(_066_),
+    .B1(_079_),
+    .B2(_080_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net57));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _246_ (.A(_013_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_081_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _247_ (.A(_020_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_082_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _248_ (.A(_051_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_083_));
+ sky130_fd_sc_hd__o21a_1 _249_ (.A1(_082_),
+    .A2(net1821),
+    .B1(_083_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_084_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _250_ (.A(_054_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_085_));
+ sky130_fd_sc_hd__a22o_1 _251_ (.A1(_077_),
+    .A2(net1691),
+    .B1(_085_),
+    .B2(net1592),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_086_));
+ sky130_fd_sc_hd__o22a_1 _252_ (.A1(\sram0_dout1[0][15] ),
+    .A2(_081_),
+    .B1(_084_),
+    .B2(_086_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net58));
+ sky130_fd_sc_hd__o21a_1 _253_ (.A1(_082_),
+    .A2(net1816),
+    .B1(_083_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_087_));
+ sky130_fd_sc_hd__a22o_1 _254_ (.A1(_077_),
+    .A2(net1689),
+    .B1(_085_),
+    .B2(net1585),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_088_));
+ sky130_fd_sc_hd__o22a_1 _255_ (.A1(\sram0_dout1[0][16] ),
+    .A2(_081_),
+    .B1(_087_),
+    .B2(_088_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net59));
+ sky130_fd_sc_hd__o21a_1 _256_ (.A1(_082_),
+    .A2(net1811),
+    .B1(_083_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_089_));
+ sky130_fd_sc_hd__a22o_1 _257_ (.A1(_077_),
+    .A2(net1687),
+    .B1(_085_),
+    .B2(net1578),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_090_));
+ sky130_fd_sc_hd__o22a_1 _258_ (.A1(\sram0_dout1[0][17] ),
+    .A2(_081_),
+    .B1(_089_),
+    .B2(_090_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net60));
+ sky130_fd_sc_hd__o21a_1 _259_ (.A1(_082_),
+    .A2(net1806),
+    .B1(_083_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_091_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _260_ (.A(net420),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_092_));
+ sky130_fd_sc_hd__a22o_1 _261_ (.A1(_092_),
+    .A2(net1685),
+    .B1(_085_),
+    .B2(net1571),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_093_));
+ sky130_fd_sc_hd__o22a_1 _262_ (.A1(\sram0_dout1[0][18] ),
+    .A2(_081_),
+    .B1(_091_),
+    .B2(_093_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net61));
+ sky130_fd_sc_hd__o21a_1 _263_ (.A1(_082_),
+    .A2(net1801),
+    .B1(_083_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_094_));
+ sky130_fd_sc_hd__a22o_1 _264_ (.A1(_092_),
+    .A2(net1683),
+    .B1(_085_),
+    .B2(net1564),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_095_));
+ sky130_fd_sc_hd__o22a_1 _265_ (.A1(\sram0_dout1[0][19] ),
+    .A2(_081_),
+    .B1(_094_),
+    .B2(_095_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net62));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _266_ (.A(_013_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_096_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _267_ (.A(net419),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_097_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _268_ (.A(_051_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_098_));
+ sky130_fd_sc_hd__o21a_1 _269_ (.A1(_097_),
+    .A2(net1792),
+    .B1(_098_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_099_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _270_ (.A(_054_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_100_));
+ sky130_fd_sc_hd__a22o_1 _271_ (.A1(_092_),
+    .A2(net1679),
+    .B1(_100_),
+    .B2(net1550),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_101_));
+ sky130_fd_sc_hd__o22a_1 _272_ (.A1(\sram0_dout1[0][20] ),
+    .A2(_096_),
+    .B1(_099_),
+    .B2(_101_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net64));
+ sky130_fd_sc_hd__o21a_1 _273_ (.A1(_097_),
+    .A2(net1787),
+    .B1(_098_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_102_));
+ sky130_fd_sc_hd__a22o_1 _274_ (.A1(_092_),
+    .A2(net1677),
+    .B1(_100_),
+    .B2(net1543),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_103_));
+ sky130_fd_sc_hd__o22a_1 _275_ (.A1(\sram0_dout1[0][21] ),
+    .A2(_096_),
+    .B1(_102_),
+    .B2(_103_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net65));
+ sky130_fd_sc_hd__o21a_1 _276_ (.A1(_097_),
+    .A2(net1782),
+    .B1(_098_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_104_));
+ sky130_fd_sc_hd__a22o_1 _277_ (.A1(_092_),
+    .A2(net1675),
+    .B1(_100_),
+    .B2(net1536),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_105_));
+ sky130_fd_sc_hd__o22a_1 _278_ (.A1(\sram0_dout1[0][22] ),
+    .A2(_096_),
+    .B1(_104_),
+    .B2(_105_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net66));
+ sky130_fd_sc_hd__o21a_1 _279_ (.A1(_097_),
+    .A2(net1777),
+    .B1(_098_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_106_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _280_ (.A(net420),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_107_));
+ sky130_fd_sc_hd__a22o_1 _281_ (.A1(_107_),
+    .A2(net1673),
+    .B1(_100_),
+    .B2(net1529),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_108_));
+ sky130_fd_sc_hd__o22a_1 _282_ (.A1(\sram0_dout1[0][23] ),
+    .A2(_096_),
+    .B1(_106_),
+    .B2(_108_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net67));
+ sky130_fd_sc_hd__o21a_1 _283_ (.A1(_097_),
+    .A2(net1772),
+    .B1(_098_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_109_));
+ sky130_fd_sc_hd__a22o_1 _284_ (.A1(_107_),
+    .A2(net1671),
+    .B1(_100_),
+    .B2(net1522),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_110_));
+ sky130_fd_sc_hd__o22a_1 _285_ (.A1(\sram0_dout1[0][24] ),
+    .A2(_096_),
+    .B1(_109_),
+    .B2(_110_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net68));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _286_ (.A(_013_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_111_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _287_ (.A(net419),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_112_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _288_ (.A(_051_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_113_));
+ sky130_fd_sc_hd__o21a_1 _289_ (.A1(_112_),
+    .A2(net1767),
+    .B1(_113_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_114_));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _290_ (.A(_054_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_115_));
+ sky130_fd_sc_hd__a22o_2 _291_ (.A1(_107_),
+    .A2(net1669),
+    .B1(_115_),
+    .B2(net1515),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_116_));
+ sky130_fd_sc_hd__o22a_1 _292_ (.A1(\sram0_dout1[0][25] ),
+    .A2(_111_),
+    .B1(_114_),
+    .B2(_116_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net69));
+ sky130_fd_sc_hd__o21a_1 _293_ (.A1(_112_),
+    .A2(net1762),
+    .B1(_113_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_117_));
+ sky130_fd_sc_hd__a22o_2 _294_ (.A1(_107_),
+    .A2(net1667),
+    .B1(_115_),
+    .B2(net1508),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_118_));
+ sky130_fd_sc_hd__o22a_1 _295_ (.A1(\sram0_dout1[0][26] ),
+    .A2(_111_),
+    .B1(_117_),
+    .B2(_118_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net70));
+ sky130_fd_sc_hd__o21a_1 _296_ (.A1(_112_),
+    .A2(net1757),
+    .B1(_113_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_119_));
+ sky130_fd_sc_hd__a22o_2 _297_ (.A1(_107_),
+    .A2(net1665),
+    .B1(_115_),
+    .B2(net1501),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_120_));
+ sky130_fd_sc_hd__o22a_1 _298_ (.A1(\sram0_dout1[0][27] ),
+    .A2(_111_),
+    .B1(_119_),
+    .B2(_120_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net71));
+ sky130_fd_sc_hd__o21a_1 _299_ (.A1(_112_),
+    .A2(net1752),
+    .B1(_113_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_121_));
+ sky130_fd_sc_hd__a22o_2 _300_ (.A1(net417),
+    .A2(net1663),
+    .B1(_115_),
+    .B2(net1494),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_122_));
+ sky130_fd_sc_hd__o22a_1 _301_ (.A1(\sram0_dout1[0][28] ),
+    .A2(_111_),
+    .B1(_121_),
+    .B2(_122_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net72));
+ sky130_fd_sc_hd__o21a_1 _302_ (.A1(_112_),
+    .A2(net1747),
+    .B1(_113_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_123_));
+ sky130_fd_sc_hd__a22o_2 _303_ (.A1(net417),
+    .A2(net1661),
+    .B1(_115_),
+    .B2(net1487),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_124_));
+ sky130_fd_sc_hd__o22a_1 _304_ (.A1(\sram0_dout1[0][29] ),
+    .A2(_111_),
+    .B1(_123_),
+    .B2(_124_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net73));
+ sky130_fd_sc_hd__o21a_1 _305_ (.A1(_037_),
+    .A2(net1738),
+    .B1(_023_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_125_));
+ sky130_fd_sc_hd__a22o_1 _306_ (.A1(net417),
+    .A2(net1657),
+    .B1(_027_),
+    .B2(net1473),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_126_));
+ sky130_fd_sc_hd__o22a_1 _307_ (.A1(\sram0_dout1[0][30] ),
+    .A2(_031_),
+    .B1(_125_),
+    .B2(_126_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net75));
+ sky130_fd_sc_hd__o21a_1 _308_ (.A1(_037_),
+    .A2(net1733),
+    .B1(_023_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_127_));
+ sky130_fd_sc_hd__a22o_1 _309_ (.A1(net417),
+    .A2(net1655),
+    .B1(_027_),
+    .B2(net1465),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_128_));
+ sky130_fd_sc_hd__o22a_1 _310_ (.A1(\sram0_dout1[0][31] ),
+    .A2(_031_),
+    .B1(_127_),
+    .B2(_128_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net76));
+ sky130_fd_sc_hd__mux2_2 _311_ (.A0(net1155),
+    .A1(net517),
+    .S(net737),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(_129_));
+ sky130_fd_sc_hd__nor2_1 _312_ (.A(_011_),
+    .B(net421),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .Y(_008_));
+ sky130_fd_sc_hd__dfxtp_1 _313_ (.CLK(net2024),
+    .D(net225),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .Q(net116));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _477_ (.A(net1182),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net77));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _478_ (.A(net961),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net78));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _479_ (.A(net730),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net79));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _480_ (.A(net670),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net80));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _481_ (.A(net648),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net81));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _482_ (.A(net626),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net82));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _483_ (.A(net603),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net83));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _484_ (.A(net581),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net84));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _485_ (.A(net559),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net86));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _486_ (.A(net537),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net87));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _487_ (.A(net1173),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net88));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _488_ (.A(net1149),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net89));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _489_ (.A(net1128),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net90));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _490_ (.A(net1107),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net91));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _491_ (.A(net1085),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net92));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _492_ (.A(net1064),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net93));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _493_ (.A(net1043),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net94));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _494_ (.A(net1022),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net95));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _495_ (.A(net1002),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net97));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _496_ (.A(net982),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net98));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _497_ (.A(net930),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net99));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _498_ (.A(net910),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net100));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _499_ (.A(net889),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net101));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _500_ (.A(net869),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net102));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _501_ (.A(net849),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net103));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _502_ (.A(net829),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net104));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _503_ (.A(net810),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net105));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _504_ (.A(net791),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net106));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _505_ (.A(net772),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net108));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _506_ (.A(net753),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net109));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _507_ (.A(net707),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net110));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _508_ (.A(net688),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net111));
+ sky130_fd_sc_hd__buf_4 _509_ (.A(net310),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net117));
+ sky130_fd_sc_hd__buf_4 _510_ (.A(net304),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net128));
+ sky130_fd_sc_hd__buf_4 _511_ (.A(net299),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net139));
+ sky130_fd_sc_hd__buf_4 _512_ (.A(net294),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net142));
+ sky130_fd_sc_hd__buf_4 _513_ (.A(net289),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net143));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _514_ (.A(net284),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net144));
+ sky130_fd_sc_hd__dlymetal6s2s_1 _515_ (.A(net279),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net145));
+ sky130_fd_sc_hd__clkbuf_4 _516_ (.A(net274),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net146));
+ sky130_fd_sc_hd__clkbuf_4 _517_ (.A(net270),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net147));
+ sky130_fd_sc_hd__clkbuf_4 _518_ (.A(net266),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net148));
+ sky130_fd_sc_hd__clkbuf_4 _519_ (.A(net262),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net118));
+ sky130_fd_sc_hd__clkbuf_4 _520_ (.A(net258),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net119));
+ sky130_fd_sc_hd__clkbuf_4 _521_ (.A(net254),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net120));
+ sky130_fd_sc_hd__buf_4 _522_ (.A(net250),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net121));
+ sky130_fd_sc_hd__clkbuf_4 _523_ (.A(net246),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net122));
+ sky130_fd_sc_hd__clkbuf_4 _524_ (.A(net242),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net123));
+ sky130_fd_sc_hd__clkbuf_4 _525_ (.A(net238),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net124));
+ sky130_fd_sc_hd__clkbuf_4 _526_ (.A(net234),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net125));
+ sky130_fd_sc_hd__clkbuf_4 _527_ (.A(net230),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net126));
+ sky130_fd_sc_hd__clkbuf_4 _528_ (.A(net226),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net127));
+ sky130_fd_sc_hd__clkbuf_4 _529_ (.A(net379),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net129));
+ sky130_fd_sc_hd__buf_4 _530_ (.A(net375),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net130));
+ sky130_fd_sc_hd__clkbuf_4 _531_ (.A(net371),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net131));
+ sky130_fd_sc_hd__clkbuf_4 _532_ (.A(net367),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net132));
+ sky130_fd_sc_hd__clkbuf_4 _533_ (.A(net363),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net133));
+ sky130_fd_sc_hd__buf_4 _534_ (.A(net359),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net134));
+ sky130_fd_sc_hd__clkbuf_4 _535_ (.A(net355),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net135));
+ sky130_fd_sc_hd__clkbuf_4 _536_ (.A(net351),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net136));
+ sky130_fd_sc_hd__clkbuf_4 _537_ (.A(net347),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net137));
+ sky130_fd_sc_hd__clkbuf_4 _538_ (.A(net343),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net138));
+ sky130_fd_sc_hd__clkbuf_4 _539_ (.A(net339),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net140));
+ sky130_fd_sc_hd__clkbuf_4 _540_ (.A(net335),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net141));
+ sky130_fd_sc_hd__clkbuf_16 clkbuf_0_clk (.A(net2014),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_0_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_0_0_clk (.A(clknet_0_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_0_0_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_0_1_clk (.A(clknet_1_0_0_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_0_1_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_0_2_clk (.A(clknet_1_0_1_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_0_2_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_0_3_clk (.A(clknet_1_0_2_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_0_3_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_1_0_clk (.A(clknet_0_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_1_0_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_1_1_clk (.A(clknet_1_1_0_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_1_1_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_1_2_clk (.A(clknet_1_1_1_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_1_2_clk));
+ sky130_fd_sc_hd__clkbuf_8 clkbuf_1_1_3_clk (.A(clknet_1_1_2_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(clknet_1_1_3_clk));
+ sky130_fd_sc_hd__dlymetal6s2s_1 input1 (.A(la_data_in[64]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1));
+ sky130_fd_sc_hd__clkbuf_4 input10 (.A(wbs_adr_i[3]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net10));
+ sky130_fd_sc_hd__clkbuf_4 input11 (.A(wbs_adr_i[4]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net11));
+ sky130_fd_sc_hd__clkbuf_4 input12 (.A(wbs_adr_i[5]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net12));
+ sky130_fd_sc_hd__clkbuf_4 input13 (.A(wbs_adr_i[6]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net13));
+ sky130_fd_sc_hd__clkbuf_4 input14 (.A(wbs_adr_i[7]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net14));
+ sky130_fd_sc_hd__dlymetal6s2s_1 input15 (.A(wbs_adr_i[8]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net15));
+ sky130_fd_sc_hd__clkbuf_4 input16 (.A(wbs_adr_i[9]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net16));
+ sky130_fd_sc_hd__clkdlybuf4s25_1 input17 (.A(wbs_cyc_i),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net17));
+ sky130_fd_sc_hd__buf_4 input18 (.A(wbs_dat_i[0]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net18));
+ sky130_fd_sc_hd__buf_4 input19 (.A(wbs_dat_i[10]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net19));
+ sky130_fd_sc_hd__buf_6 input2 (.A(la_data_in[65]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2));
+ sky130_fd_sc_hd__buf_4 input20 (.A(wbs_dat_i[11]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net20));
+ sky130_fd_sc_hd__buf_4 input21 (.A(wbs_dat_i[12]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net21));
+ sky130_fd_sc_hd__buf_4 input22 (.A(wbs_dat_i[13]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net22));
+ sky130_fd_sc_hd__clkbuf_4 input23 (.A(wbs_dat_i[14]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net23));
+ sky130_fd_sc_hd__clkbuf_4 input24 (.A(wbs_dat_i[15]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net24));
+ sky130_fd_sc_hd__clkbuf_4 input25 (.A(wbs_dat_i[16]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net25));
+ sky130_fd_sc_hd__clkbuf_4 input26 (.A(wbs_dat_i[17]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net26));
+ sky130_fd_sc_hd__buf_4 input27 (.A(wbs_dat_i[18]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net27));
+ sky130_fd_sc_hd__buf_4 input28 (.A(wbs_dat_i[19]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net28));
+ sky130_fd_sc_hd__clkbuf_4 input29 (.A(wbs_dat_i[1]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net29));
+ sky130_fd_sc_hd__dlymetal6s2s_1 input3 (.A(la_oenb[64]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net3));
+ sky130_fd_sc_hd__buf_4 input30 (.A(wbs_dat_i[20]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net30));
+ sky130_fd_sc_hd__clkbuf_4 input31 (.A(wbs_dat_i[21]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net31));
+ sky130_fd_sc_hd__clkbuf_4 input32 (.A(wbs_dat_i[22]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net32));
+ sky130_fd_sc_hd__clkbuf_4 input33 (.A(wbs_dat_i[23]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net33));
+ sky130_fd_sc_hd__clkbuf_4 input34 (.A(wbs_dat_i[24]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net34));
+ sky130_fd_sc_hd__clkbuf_4 input35 (.A(wbs_dat_i[25]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net35));
+ sky130_fd_sc_hd__buf_4 input36 (.A(wbs_dat_i[26]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net36));
+ sky130_fd_sc_hd__buf_4 input37 (.A(wbs_dat_i[27]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net37));
+ sky130_fd_sc_hd__buf_4 input38 (.A(wbs_dat_i[28]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net38));
+ sky130_fd_sc_hd__buf_4 input39 (.A(wbs_dat_i[29]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net39));
+ sky130_fd_sc_hd__buf_6 input4 (.A(la_oenb[65]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net4));
+ sky130_fd_sc_hd__clkbuf_4 input40 (.A(wbs_dat_i[2]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net40));
+ sky130_fd_sc_hd__clkbuf_4 input41 (.A(wbs_dat_i[30]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net41));
+ sky130_fd_sc_hd__clkbuf_4 input42 (.A(wbs_dat_i[31]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net42));
+ sky130_fd_sc_hd__buf_4 input43 (.A(wbs_dat_i[3]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net43));
+ sky130_fd_sc_hd__buf_4 input44 (.A(wbs_dat_i[4]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net44));
+ sky130_fd_sc_hd__clkbuf_4 input45 (.A(wbs_dat_i[5]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net45));
+ sky130_fd_sc_hd__clkbuf_4 input46 (.A(wbs_dat_i[6]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net46));
+ sky130_fd_sc_hd__clkbuf_4 input47 (.A(wbs_dat_i[7]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net47));
+ sky130_fd_sc_hd__clkbuf_4 input48 (.A(wbs_dat_i[8]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net48));
+ sky130_fd_sc_hd__clkbuf_4 input49 (.A(wbs_dat_i[9]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net49));
+ sky130_fd_sc_hd__buf_6 input5 (.A(wb_rst_i),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net5));
+ sky130_fd_sc_hd__clkdlybuf4s25_1 input50 (.A(wbs_stb_i),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net50));
+ sky130_fd_sc_hd__clkbuf_4 input51 (.A(wbs_we_i),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net51));
+ sky130_fd_sc_hd__clkbuf_4 input6 (.A(wbs_adr_i[10]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net6));
+ sky130_fd_sc_hd__dlymetal6s2s_1 input7 (.A(wbs_adr_i[11]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net7));
+ sky130_fd_sc_hd__buf_4 input8 (.A(wbs_adr_i[12]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net8));
+ sky130_fd_sc_hd__clkbuf_4 input9 (.A(wbs_adr_i[2]),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net9));
+ sky130_fd_sc_hd__clkbuf_4 output100 (.A(net100),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[53]));
+ sky130_fd_sc_hd__clkbuf_4 output101 (.A(net101),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[54]));
+ sky130_fd_sc_hd__clkbuf_4 output102 (.A(net102),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[55]));
+ sky130_fd_sc_hd__clkbuf_4 output103 (.A(net103),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[56]));
+ sky130_fd_sc_hd__clkbuf_4 output104 (.A(net104),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[57]));
+ sky130_fd_sc_hd__clkbuf_4 output105 (.A(net105),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[58]));
+ sky130_fd_sc_hd__clkbuf_4 output106 (.A(net106),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[59]));
+ sky130_fd_sc_hd__clkbuf_4 output107 (.A(net284),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[5]));
+ sky130_fd_sc_hd__clkbuf_4 output108 (.A(net108),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[60]));
+ sky130_fd_sc_hd__clkbuf_4 output109 (.A(net109),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[61]));
+ sky130_fd_sc_hd__clkbuf_4 output110 (.A(net110),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[62]));
+ sky130_fd_sc_hd__clkbuf_4 output111 (.A(net111),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[63]));
+ sky130_fd_sc_hd__clkbuf_4 output112 (.A(net279),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[6]));
+ sky130_fd_sc_hd__clkbuf_4 output113 (.A(net274),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[7]));
+ sky130_fd_sc_hd__clkbuf_4 output114 (.A(net270),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[8]));
+ sky130_fd_sc_hd__clkbuf_4 output115 (.A(net266),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[9]));
+ sky130_fd_sc_hd__clkbuf_4 output116 (.A(net406),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_ack_o));
+ sky130_fd_sc_hd__clkbuf_4 output117 (.A(net183),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[0]));
+ sky130_fd_sc_hd__clkbuf_4 output118 (.A(net167),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[10]));
+ sky130_fd_sc_hd__clkbuf_4 output119 (.A(net165),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[11]));
+ sky130_fd_sc_hd__clkbuf_4 output120 (.A(net163),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[12]));
+ sky130_fd_sc_hd__clkbuf_4 output121 (.A(net161),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[13]));
+ sky130_fd_sc_hd__clkbuf_4 output122 (.A(net159),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[14]));
+ sky130_fd_sc_hd__clkbuf_4 output123 (.A(net157),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[15]));
+ sky130_fd_sc_hd__clkbuf_4 output124 (.A(net155),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[16]));
+ sky130_fd_sc_hd__clkbuf_4 output125 (.A(net153),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[17]));
+ sky130_fd_sc_hd__clkbuf_4 output126 (.A(net151),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[18]));
+ sky130_fd_sc_hd__clkbuf_4 output127 (.A(net149),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[19]));
+ sky130_fd_sc_hd__clkbuf_4 output128 (.A(net182),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[1]));
+ sky130_fd_sc_hd__clkbuf_4 output129 (.A(net223),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[20]));
+ sky130_fd_sc_hd__clkbuf_4 output130 (.A(net221),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[21]));
+ sky130_fd_sc_hd__clkbuf_4 output131 (.A(net219),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[22]));
+ sky130_fd_sc_hd__clkbuf_4 output132 (.A(net217),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[23]));
+ sky130_fd_sc_hd__clkbuf_4 output133 (.A(net215),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[24]));
+ sky130_fd_sc_hd__clkbuf_4 output134 (.A(net213),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[25]));
+ sky130_fd_sc_hd__clkbuf_4 output135 (.A(net211),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[26]));
+ sky130_fd_sc_hd__clkbuf_4 output136 (.A(net209),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[27]));
+ sky130_fd_sc_hd__clkbuf_4 output137 (.A(net207),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[28]));
+ sky130_fd_sc_hd__clkbuf_4 output138 (.A(net205),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[29]));
+ sky130_fd_sc_hd__clkbuf_4 output139 (.A(net181),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[2]));
+ sky130_fd_sc_hd__clkbuf_4 output140 (.A(net203),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[30]));
+ sky130_fd_sc_hd__clkbuf_4 output141 (.A(net201),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[31]));
+ sky130_fd_sc_hd__clkbuf_4 output142 (.A(net180),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[3]));
+ sky130_fd_sc_hd__clkbuf_4 output143 (.A(net179),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[4]));
+ sky130_fd_sc_hd__clkbuf_4 output144 (.A(net177),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[5]));
+ sky130_fd_sc_hd__clkbuf_4 output145 (.A(net175),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[6]));
+ sky130_fd_sc_hd__clkbuf_4 output146 (.A(net173),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[7]));
+ sky130_fd_sc_hd__clkbuf_4 output147 (.A(net171),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[8]));
+ sky130_fd_sc_hd__clkbuf_4 output148 (.A(net169),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(wbs_dat_o[9]));
+ sky130_fd_sc_hd__clkbuf_4 output52 (.A(net311),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[0]));
+ sky130_fd_sc_hd__clkbuf_4 output53 (.A(net262),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[10]));
+ sky130_fd_sc_hd__clkbuf_4 output54 (.A(net258),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[11]));
+ sky130_fd_sc_hd__clkbuf_4 output55 (.A(net254),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[12]));
+ sky130_fd_sc_hd__clkbuf_4 output56 (.A(net250),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[13]));
+ sky130_fd_sc_hd__clkbuf_4 output57 (.A(net246),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[14]));
+ sky130_fd_sc_hd__clkbuf_4 output58 (.A(net242),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[15]));
+ sky130_fd_sc_hd__clkbuf_4 output59 (.A(net238),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[16]));
+ sky130_fd_sc_hd__clkbuf_4 output60 (.A(net234),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[17]));
+ sky130_fd_sc_hd__clkbuf_4 output61 (.A(net230),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[18]));
+ sky130_fd_sc_hd__clkbuf_4 output62 (.A(net226),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[19]));
+ sky130_fd_sc_hd__clkbuf_4 output63 (.A(net305),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[1]));
+ sky130_fd_sc_hd__clkbuf_4 output64 (.A(net379),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[20]));
+ sky130_fd_sc_hd__clkbuf_4 output65 (.A(net375),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[21]));
+ sky130_fd_sc_hd__clkbuf_4 output66 (.A(net371),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[22]));
+ sky130_fd_sc_hd__clkbuf_4 output67 (.A(net367),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[23]));
+ sky130_fd_sc_hd__clkbuf_4 output68 (.A(net363),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[24]));
+ sky130_fd_sc_hd__clkbuf_4 output69 (.A(net359),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[25]));
+ sky130_fd_sc_hd__clkbuf_4 output70 (.A(net355),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[26]));
+ sky130_fd_sc_hd__clkbuf_4 output71 (.A(net351),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[27]));
+ sky130_fd_sc_hd__clkbuf_4 output72 (.A(net347),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[28]));
+ sky130_fd_sc_hd__clkbuf_4 output73 (.A(net343),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[29]));
+ sky130_fd_sc_hd__clkbuf_4 output74 (.A(net300),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[2]));
+ sky130_fd_sc_hd__clkbuf_4 output75 (.A(net339),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[30]));
+ sky130_fd_sc_hd__clkbuf_4 output76 (.A(net335),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[31]));
+ sky130_fd_sc_hd__clkbuf_4 output77 (.A(net77),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[32]));
+ sky130_fd_sc_hd__clkbuf_4 output78 (.A(net78),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[33]));
+ sky130_fd_sc_hd__clkbuf_4 output79 (.A(net79),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[34]));
+ sky130_fd_sc_hd__clkbuf_4 output80 (.A(net80),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[35]));
+ sky130_fd_sc_hd__clkbuf_4 output81 (.A(net81),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[36]));
+ sky130_fd_sc_hd__clkbuf_4 output82 (.A(net82),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[37]));
+ sky130_fd_sc_hd__clkbuf_4 output83 (.A(net83),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[38]));
+ sky130_fd_sc_hd__clkbuf_4 output84 (.A(net84),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[39]));
+ sky130_fd_sc_hd__clkbuf_4 output85 (.A(net294),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[3]));
+ sky130_fd_sc_hd__clkbuf_4 output86 (.A(net86),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[40]));
+ sky130_fd_sc_hd__clkbuf_4 output87 (.A(net87),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[41]));
+ sky130_fd_sc_hd__clkbuf_4 output88 (.A(net88),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[42]));
+ sky130_fd_sc_hd__clkbuf_4 output89 (.A(net89),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[43]));
+ sky130_fd_sc_hd__clkbuf_4 output90 (.A(net90),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[44]));
+ sky130_fd_sc_hd__clkbuf_4 output91 (.A(net91),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[45]));
+ sky130_fd_sc_hd__clkbuf_4 output92 (.A(net92),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[46]));
+ sky130_fd_sc_hd__clkbuf_4 output93 (.A(net93),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[47]));
+ sky130_fd_sc_hd__clkbuf_4 output94 (.A(net94),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[48]));
+ sky130_fd_sc_hd__clkbuf_4 output95 (.A(net95),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[49]));
+ sky130_fd_sc_hd__clkbuf_4 output96 (.A(net289),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[4]));
+ sky130_fd_sc_hd__clkbuf_4 output97 (.A(net97),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[50]));
+ sky130_fd_sc_hd__clkbuf_4 output98 (.A(net98),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[51]));
+ sky130_fd_sc_hd__clkbuf_4 output99 (.A(net99),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(la_data_out[52]));
+ sky130_fd_sc_hd__buf_4 repeater1 (.A(_030_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2013));
+ sky130_fd_sc_hd__buf_4 repeater10 (.A(net2023),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2022));
+ sky130_fd_sc_hd__clkbuf_4 repeater1000 (.A(net1001),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1000));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1001 (.A(net1002),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1001));
+ sky130_fd_sc_hd__buf_4 repeater1002 (.A(net1003),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1002));
+ sky130_fd_sc_hd__buf_6 repeater1003 (.A(net1004),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1003));
+ sky130_fd_sc_hd__buf_6 repeater1004 (.A(net1005),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1004));
+ sky130_fd_sc_hd__buf_4 repeater1005 (.A(net1006),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1005));
+ sky130_fd_sc_hd__clkbuf_4 repeater1006 (.A(net1007),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1006));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1007 (.A(net27),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1007));
+ sky130_fd_sc_hd__clkbuf_4 repeater1008 (.A(net1009),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1008));
+ sky130_fd_sc_hd__clkbuf_4 repeater1009 (.A(net1010),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1009));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1010 (.A(net1011),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1010));
+ sky130_fd_sc_hd__buf_6 repeater1011 (.A(net1012),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1011));
+ sky130_fd_sc_hd__buf_6 repeater1012 (.A(net1013),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1012));
+ sky130_fd_sc_hd__buf_4 repeater1013 (.A(net1014),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1013));
+ sky130_fd_sc_hd__clkbuf_4 repeater1014 (.A(net1028),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1014));
+ sky130_fd_sc_hd__clkbuf_4 repeater1015 (.A(net1016),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1015));
+ sky130_fd_sc_hd__clkbuf_4 repeater1016 (.A(net1017),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1016));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1017 (.A(net1018),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1017));
+ sky130_fd_sc_hd__buf_6 repeater1018 (.A(net1019),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1018));
+ sky130_fd_sc_hd__buf_4 repeater1019 (.A(net1020),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1019));
+ sky130_fd_sc_hd__clkbuf_4 repeater1020 (.A(net1021),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1020));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1021 (.A(net1022),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1021));
+ sky130_fd_sc_hd__buf_4 repeater1022 (.A(net1023),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1022));
+ sky130_fd_sc_hd__buf_6 repeater1023 (.A(net1024),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1023));
+ sky130_fd_sc_hd__buf_6 repeater1024 (.A(net1025),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1024));
+ sky130_fd_sc_hd__buf_4 repeater1025 (.A(net1026),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1025));
+ sky130_fd_sc_hd__clkbuf_4 repeater1026 (.A(net1027),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1026));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1027 (.A(net26),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1027));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1028 (.A(net26),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1028));
+ sky130_fd_sc_hd__clkbuf_4 repeater1029 (.A(net1030),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1029));
+ sky130_fd_sc_hd__clkbuf_4 repeater1030 (.A(net1031),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1030));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1031 (.A(net1032),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1031));
+ sky130_fd_sc_hd__buf_6 repeater1032 (.A(net1033),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1032));
+ sky130_fd_sc_hd__buf_6 repeater1033 (.A(net1034),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1033));
+ sky130_fd_sc_hd__buf_4 repeater1034 (.A(net1035),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1034));
+ sky130_fd_sc_hd__clkbuf_4 repeater1035 (.A(net1049),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1035));
+ sky130_fd_sc_hd__clkbuf_4 repeater1036 (.A(net1037),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1036));
+ sky130_fd_sc_hd__clkbuf_4 repeater1037 (.A(net1038),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1037));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1038 (.A(net1039),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1038));
+ sky130_fd_sc_hd__buf_6 repeater1039 (.A(net1040),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1039));
+ sky130_fd_sc_hd__buf_4 repeater1040 (.A(net1041),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1040));
+ sky130_fd_sc_hd__clkbuf_4 repeater1041 (.A(net1042),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1041));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1042 (.A(net1043),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1042));
+ sky130_fd_sc_hd__buf_4 repeater1043 (.A(net1044),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1043));
+ sky130_fd_sc_hd__buf_6 repeater1044 (.A(net1045),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1044));
+ sky130_fd_sc_hd__buf_6 repeater1045 (.A(net1046),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1045));
+ sky130_fd_sc_hd__buf_4 repeater1046 (.A(net1047),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1046));
+ sky130_fd_sc_hd__clkbuf_4 repeater1047 (.A(net1048),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1047));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1048 (.A(net25),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1048));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1049 (.A(net25),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1049));
+ sky130_fd_sc_hd__clkbuf_4 repeater1050 (.A(net1051),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1050));
+ sky130_fd_sc_hd__clkbuf_4 repeater1051 (.A(net1052),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1051));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1052 (.A(net1053),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1052));
+ sky130_fd_sc_hd__buf_6 repeater1053 (.A(net1054),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1053));
+ sky130_fd_sc_hd__buf_6 repeater1054 (.A(net1055),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1054));
+ sky130_fd_sc_hd__buf_4 repeater1055 (.A(net1056),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1055));
+ sky130_fd_sc_hd__clkbuf_4 repeater1056 (.A(net1070),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1056));
+ sky130_fd_sc_hd__clkbuf_4 repeater1057 (.A(net1058),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1057));
+ sky130_fd_sc_hd__clkbuf_4 repeater1058 (.A(net1059),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1058));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1059 (.A(net1060),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1059));
+ sky130_fd_sc_hd__buf_6 repeater1060 (.A(net1061),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1060));
+ sky130_fd_sc_hd__buf_4 repeater1061 (.A(net1062),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1061));
+ sky130_fd_sc_hd__clkbuf_4 repeater1062 (.A(net1063),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1062));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1063 (.A(net1064),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1063));
+ sky130_fd_sc_hd__buf_4 repeater1064 (.A(net1065),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1064));
+ sky130_fd_sc_hd__buf_6 repeater1065 (.A(net1066),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1065));
+ sky130_fd_sc_hd__buf_6 repeater1066 (.A(net1067),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1066));
+ sky130_fd_sc_hd__buf_4 repeater1067 (.A(net1068),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1067));
+ sky130_fd_sc_hd__clkbuf_4 repeater1068 (.A(net1069),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1068));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1069 (.A(net24),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1069));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1070 (.A(net24),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1070));
+ sky130_fd_sc_hd__clkbuf_4 repeater1071 (.A(net1072),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1071));
+ sky130_fd_sc_hd__clkbuf_4 repeater1072 (.A(net1073),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1072));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1073 (.A(net1074),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1073));
+ sky130_fd_sc_hd__buf_6 repeater1074 (.A(net1075),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1074));
+ sky130_fd_sc_hd__buf_6 repeater1075 (.A(net1076),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1075));
+ sky130_fd_sc_hd__buf_4 repeater1076 (.A(net1077),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1076));
+ sky130_fd_sc_hd__clkbuf_4 repeater1077 (.A(net1091),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1077));
+ sky130_fd_sc_hd__clkbuf_4 repeater1078 (.A(net1079),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1078));
+ sky130_fd_sc_hd__clkbuf_4 repeater1079 (.A(net1080),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1079));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1080 (.A(net1081),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1080));
+ sky130_fd_sc_hd__buf_6 repeater1081 (.A(net1082),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1081));
+ sky130_fd_sc_hd__buf_4 repeater1082 (.A(net1083),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1082));
+ sky130_fd_sc_hd__clkbuf_4 repeater1083 (.A(net1084),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1083));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1084 (.A(net1085),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1084));
+ sky130_fd_sc_hd__buf_4 repeater1085 (.A(net1086),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1085));
+ sky130_fd_sc_hd__buf_6 repeater1086 (.A(net1087),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1086));
+ sky130_fd_sc_hd__buf_6 repeater1087 (.A(net1088),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1087));
+ sky130_fd_sc_hd__buf_4 repeater1088 (.A(net1089),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1088));
+ sky130_fd_sc_hd__clkbuf_4 repeater1089 (.A(net1090),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1089));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1090 (.A(net23),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1090));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1091 (.A(net23),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1091));
+ sky130_fd_sc_hd__clkbuf_4 repeater1092 (.A(net1093),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1092));
+ sky130_fd_sc_hd__clkbuf_4 repeater1093 (.A(net1094),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1093));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1094 (.A(net1095),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1094));
+ sky130_fd_sc_hd__buf_6 repeater1095 (.A(net1096),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1095));
+ sky130_fd_sc_hd__buf_6 repeater1096 (.A(net1097),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1096));
+ sky130_fd_sc_hd__buf_4 repeater1097 (.A(net1098),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1097));
+ sky130_fd_sc_hd__clkbuf_4 repeater1098 (.A(net1099),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1098));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1099 (.A(net22),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1099));
+ sky130_fd_sc_hd__buf_2 repeater11 (.A(net2024),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2023));
+ sky130_fd_sc_hd__clkbuf_4 repeater1100 (.A(net1101),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1100));
+ sky130_fd_sc_hd__clkbuf_4 repeater1101 (.A(net1102),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1101));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1102 (.A(net1103),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1102));
+ sky130_fd_sc_hd__buf_6 repeater1103 (.A(net1104),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1103));
+ sky130_fd_sc_hd__buf_4 repeater1104 (.A(net1105),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1104));
+ sky130_fd_sc_hd__clkbuf_4 repeater1105 (.A(net1106),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1105));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1106 (.A(net1107),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1106));
+ sky130_fd_sc_hd__buf_4 repeater1107 (.A(net1108),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1107));
+ sky130_fd_sc_hd__buf_6 repeater1108 (.A(net1109),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1108));
+ sky130_fd_sc_hd__buf_6 repeater1109 (.A(net1110),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1109));
+ sky130_fd_sc_hd__buf_4 repeater1110 (.A(net1111),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1110));
+ sky130_fd_sc_hd__clkbuf_4 repeater1111 (.A(net1112),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1111));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1112 (.A(net22),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1112));
+ sky130_fd_sc_hd__clkbuf_4 repeater1113 (.A(net1114),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1113));
+ sky130_fd_sc_hd__clkbuf_4 repeater1114 (.A(net1115),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1114));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1115 (.A(net1116),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1115));
+ sky130_fd_sc_hd__buf_6 repeater1116 (.A(net1117),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1116));
+ sky130_fd_sc_hd__buf_6 repeater1117 (.A(net1118),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1117));
+ sky130_fd_sc_hd__buf_4 repeater1118 (.A(net1119),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1118));
+ sky130_fd_sc_hd__clkbuf_4 repeater1119 (.A(net1120),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1119));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1120 (.A(net21),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1120));
+ sky130_fd_sc_hd__clkbuf_4 repeater1121 (.A(net1122),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1121));
+ sky130_fd_sc_hd__clkbuf_4 repeater1122 (.A(net1123),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1122));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1123 (.A(net1124),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1123));
+ sky130_fd_sc_hd__buf_6 repeater1124 (.A(net1125),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1124));
+ sky130_fd_sc_hd__buf_4 repeater1125 (.A(net1126),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1125));
+ sky130_fd_sc_hd__clkbuf_4 repeater1126 (.A(net1127),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1126));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1127 (.A(net1128),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1127));
+ sky130_fd_sc_hd__buf_4 repeater1128 (.A(net1129),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1128));
+ sky130_fd_sc_hd__buf_6 repeater1129 (.A(net1130),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1129));
+ sky130_fd_sc_hd__buf_6 repeater1130 (.A(net1131),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1130));
+ sky130_fd_sc_hd__buf_4 repeater1131 (.A(net1132),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1131));
+ sky130_fd_sc_hd__clkbuf_4 repeater1132 (.A(net1133),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1132));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1133 (.A(net21),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1133));
+ sky130_fd_sc_hd__clkbuf_4 repeater1134 (.A(net1135),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1134));
+ sky130_fd_sc_hd__clkbuf_4 repeater1135 (.A(net1136),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1135));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1136 (.A(net1137),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1136));
+ sky130_fd_sc_hd__buf_6 repeater1137 (.A(net1138),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1137));
+ sky130_fd_sc_hd__buf_6 repeater1138 (.A(net1139),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1138));
+ sky130_fd_sc_hd__buf_4 repeater1139 (.A(net1140),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1139));
+ sky130_fd_sc_hd__clkbuf_4 repeater1140 (.A(net1141),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1140));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1141 (.A(net20),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1141));
+ sky130_fd_sc_hd__clkbuf_4 repeater1142 (.A(net1143),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1142));
+ sky130_fd_sc_hd__clkbuf_4 repeater1143 (.A(net1144),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1143));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1144 (.A(net1145),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1144));
+ sky130_fd_sc_hd__buf_6 repeater1145 (.A(net1146),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1145));
+ sky130_fd_sc_hd__buf_6 repeater1146 (.A(net1147),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1146));
+ sky130_fd_sc_hd__buf_4 repeater1147 (.A(net1148),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1147));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1148 (.A(net1149),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1148));
+ sky130_fd_sc_hd__buf_4 repeater1149 (.A(net1150),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1149));
+ sky130_fd_sc_hd__buf_6 repeater1150 (.A(net1151),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1150));
+ sky130_fd_sc_hd__buf_6 repeater1151 (.A(net1152),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1151));
+ sky130_fd_sc_hd__buf_6 repeater1152 (.A(net1153),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1152));
+ sky130_fd_sc_hd__buf_4 repeater1153 (.A(net1154),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1153));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1154 (.A(net20),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1154));
+ sky130_fd_sc_hd__buf_6 repeater1155 (.A(net1156),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1155));
+ sky130_fd_sc_hd__buf_4 repeater1156 (.A(net1157),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1156));
+ sky130_fd_sc_hd__clkbuf_4 repeater1157 (.A(net2),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1157));
+ sky130_fd_sc_hd__clkbuf_4 repeater1158 (.A(net1159),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1158));
+ sky130_fd_sc_hd__clkbuf_4 repeater1159 (.A(net1160),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1159));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1160 (.A(net1161),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1160));
+ sky130_fd_sc_hd__buf_6 repeater1161 (.A(net1162),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1161));
+ sky130_fd_sc_hd__buf_6 repeater1162 (.A(net1163),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1162));
+ sky130_fd_sc_hd__buf_4 repeater1163 (.A(net1164),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1163));
+ sky130_fd_sc_hd__clkbuf_4 repeater1164 (.A(net1165),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1164));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1165 (.A(net19),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1165));
+ sky130_fd_sc_hd__clkbuf_4 repeater1166 (.A(net1167),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1166));
+ sky130_fd_sc_hd__clkbuf_4 repeater1167 (.A(net1168),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1167));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1168 (.A(net1169),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1168));
+ sky130_fd_sc_hd__buf_6 repeater1169 (.A(net1170),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1169));
+ sky130_fd_sc_hd__buf_6 repeater1170 (.A(net1171),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1170));
+ sky130_fd_sc_hd__buf_4 repeater1171 (.A(net1172),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1171));
+ sky130_fd_sc_hd__clkbuf_4 repeater1172 (.A(net1173),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1172));
+ sky130_fd_sc_hd__buf_4 repeater1173 (.A(net1174),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1173));
+ sky130_fd_sc_hd__buf_6 repeater1174 (.A(net1175),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1174));
+ sky130_fd_sc_hd__buf_6 repeater1175 (.A(net1176),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1175));
+ sky130_fd_sc_hd__buf_6 repeater1176 (.A(net1177),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1176));
+ sky130_fd_sc_hd__buf_4 repeater1177 (.A(net1178),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1177));
+ sky130_fd_sc_hd__clkbuf_4 repeater1178 (.A(net19),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1178));
+ sky130_fd_sc_hd__clkbuf_4 repeater1179 (.A(net1180),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1179));
+ sky130_fd_sc_hd__clkbuf_4 repeater1180 (.A(net1181),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1180));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1181 (.A(net1186),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1181));
+ sky130_fd_sc_hd__buf_6 repeater1182 (.A(net1183),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1182));
+ sky130_fd_sc_hd__buf_4 repeater1183 (.A(net1184),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1183));
+ sky130_fd_sc_hd__clkbuf_4 repeater1184 (.A(net1185),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1184));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1185 (.A(net1196),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1185));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1186 (.A(net1196),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1186));
+ sky130_fd_sc_hd__clkbuf_4 repeater1187 (.A(net1188),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1187));
+ sky130_fd_sc_hd__clkbuf_4 repeater1188 (.A(net1189),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1188));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1189 (.A(net1190),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1189));
+ sky130_fd_sc_hd__buf_6 repeater1190 (.A(net1191),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1190));
+ sky130_fd_sc_hd__buf_6 repeater1191 (.A(net1192),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1191));
+ sky130_fd_sc_hd__buf_6 repeater1192 (.A(net1193),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1192));
+ sky130_fd_sc_hd__buf_4 repeater1193 (.A(net1194),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1193));
+ sky130_fd_sc_hd__clkbuf_4 repeater1194 (.A(net1195),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1194));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1195 (.A(net1196),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1195));
+ sky130_fd_sc_hd__buf_6 repeater1196 (.A(net1197),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1196));
+ sky130_fd_sc_hd__buf_6 repeater1197 (.A(net1198),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1197));
+ sky130_fd_sc_hd__buf_6 repeater1198 (.A(net1199),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1198));
+ sky130_fd_sc_hd__buf_4 repeater1199 (.A(net1200),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1199));
+ sky130_fd_sc_hd__buf_2 repeater12 (.A(net2025),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2024));
+ sky130_fd_sc_hd__clkbuf_4 repeater1200 (.A(net18),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1200));
+ sky130_fd_sc_hd__clkbuf_4 repeater1201 (.A(net1202),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1201));
+ sky130_fd_sc_hd__clkbuf_4 repeater1202 (.A(net1203),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1202));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1203 (.A(net1226),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1203));
+ sky130_fd_sc_hd__clkbuf_4 repeater1204 (.A(net1205),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1204));
+ sky130_fd_sc_hd__clkbuf_4 repeater1205 (.A(net1206),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1205));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1206 (.A(net1207),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1206));
+ sky130_fd_sc_hd__buf_4 repeater1207 (.A(net1208),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1207));
+ sky130_fd_sc_hd__buf_4 repeater1208 (.A(net1209),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1208));
+ sky130_fd_sc_hd__clkbuf_4 repeater1209 (.A(net1221),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1209));
+ sky130_fd_sc_hd__clkbuf_4 repeater1210 (.A(net1211),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1210));
+ sky130_fd_sc_hd__clkbuf_4 repeater1211 (.A(net1212),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1211));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1212 (.A(net1213),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1212));
+ sky130_fd_sc_hd__buf_6 repeater1213 (.A(net1214),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1213));
+ sky130_fd_sc_hd__buf_6 repeater1214 (.A(net1215),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1214));
+ sky130_fd_sc_hd__buf_4 repeater1215 (.A(net1216),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1215));
+ sky130_fd_sc_hd__clkbuf_4 repeater1216 (.A(net1217),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1216));
+ sky130_fd_sc_hd__buf_6 repeater1217 (.A(net1218),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1217));
+ sky130_fd_sc_hd__buf_4 repeater1218 (.A(net1219),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1218));
+ sky130_fd_sc_hd__clkbuf_4 repeater1219 (.A(net1220),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1219));
+ sky130_fd_sc_hd__clkbuf_4 repeater1220 (.A(net1221),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1220));
+ sky130_fd_sc_hd__buf_6 repeater1221 (.A(net1222),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1221));
+ sky130_fd_sc_hd__buf_6 repeater1222 (.A(net1223),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1222));
+ sky130_fd_sc_hd__buf_4 repeater1223 (.A(net1224),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1223));
+ sky130_fd_sc_hd__clkbuf_4 repeater1224 (.A(net1225),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1224));
+ sky130_fd_sc_hd__clkbuf_4 repeater1225 (.A(net1226),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1225));
+ sky130_fd_sc_hd__buf_6 repeater1226 (.A(net1227),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1226));
+ sky130_fd_sc_hd__buf_6 repeater1227 (.A(net1228),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1227));
+ sky130_fd_sc_hd__buf_4 repeater1228 (.A(net1229),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1228));
+ sky130_fd_sc_hd__clkbuf_4 repeater1229 (.A(net1230),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1229));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1230 (.A(net16),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1230));
+ sky130_fd_sc_hd__clkbuf_4 repeater1231 (.A(net1232),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1231));
+ sky130_fd_sc_hd__clkbuf_4 repeater1232 (.A(net1233),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1232));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1233 (.A(net1254),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1233));
+ sky130_fd_sc_hd__clkbuf_4 repeater1234 (.A(net1235),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1234));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1235 (.A(net1236),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1235));
+ sky130_fd_sc_hd__buf_6 repeater1236 (.A(net1237),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1236));
+ sky130_fd_sc_hd__buf_4 repeater1237 (.A(net1238),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1237));
+ sky130_fd_sc_hd__clkbuf_4 repeater1238 (.A(net1239),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1238));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1239 (.A(net1250),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1239));
+ sky130_fd_sc_hd__clkbuf_4 repeater1240 (.A(net1241),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1240));
+ sky130_fd_sc_hd__clkbuf_4 repeater1241 (.A(net1242),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1241));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1242 (.A(net1243),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1242));
+ sky130_fd_sc_hd__buf_6 repeater1243 (.A(net1244),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1243));
+ sky130_fd_sc_hd__buf_6 repeater1244 (.A(net1245),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1244));
+ sky130_fd_sc_hd__buf_4 repeater1245 (.A(net1246),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1245));
+ sky130_fd_sc_hd__clkbuf_4 repeater1246 (.A(net1247),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1246));
+ sky130_fd_sc_hd__buf_4 repeater1247 (.A(net1248),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1247));
+ sky130_fd_sc_hd__clkbuf_4 repeater1248 (.A(net1249),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1248));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1249 (.A(net1250),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1249));
+ sky130_fd_sc_hd__buf_6 repeater1250 (.A(net1251),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1250));
+ sky130_fd_sc_hd__buf_4 repeater1251 (.A(net1252),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1251));
+ sky130_fd_sc_hd__clkbuf_4 repeater1252 (.A(net1253),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1252));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1253 (.A(net1255),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1253));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1254 (.A(net1255),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1254));
+ sky130_fd_sc_hd__buf_6 repeater1255 (.A(net1256),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1255));
+ sky130_fd_sc_hd__buf_6 repeater1256 (.A(net1257),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1256));
+ sky130_fd_sc_hd__buf_4 repeater1257 (.A(net1258),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1257));
+ sky130_fd_sc_hd__clkbuf_4 repeater1258 (.A(net1259),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1258));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1259 (.A(net15),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1259));
+ sky130_fd_sc_hd__clkbuf_4 repeater1260 (.A(net1261),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1260));
+ sky130_fd_sc_hd__clkbuf_4 repeater1261 (.A(net1262),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1261));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1262 (.A(net1283),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1262));
+ sky130_fd_sc_hd__clkbuf_4 repeater1263 (.A(net1264),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1263));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1264 (.A(net1265),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1264));
+ sky130_fd_sc_hd__buf_6 repeater1265 (.A(net1266),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1265));
+ sky130_fd_sc_hd__buf_4 repeater1266 (.A(net1267),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1266));
+ sky130_fd_sc_hd__clkbuf_4 repeater1267 (.A(net1278),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1267));
+ sky130_fd_sc_hd__clkbuf_4 repeater1268 (.A(net1269),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1268));
+ sky130_fd_sc_hd__clkbuf_4 repeater1269 (.A(net1270),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1269));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1270 (.A(net1271),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1270));
+ sky130_fd_sc_hd__buf_6 repeater1271 (.A(net1272),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1271));
+ sky130_fd_sc_hd__buf_6 repeater1272 (.A(net1273),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1272));
+ sky130_fd_sc_hd__buf_4 repeater1273 (.A(net1274),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1273));
+ sky130_fd_sc_hd__clkbuf_4 repeater1274 (.A(net1275),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1274));
+ sky130_fd_sc_hd__buf_4 repeater1275 (.A(net1276),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1275));
+ sky130_fd_sc_hd__clkbuf_4 repeater1276 (.A(net1277),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1276));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1277 (.A(net1279),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1277));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1278 (.A(net1279),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1278));
+ sky130_fd_sc_hd__buf_6 repeater1279 (.A(net1280),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1279));
+ sky130_fd_sc_hd__buf_4 repeater1280 (.A(net1281),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1280));
+ sky130_fd_sc_hd__clkbuf_4 repeater1281 (.A(net1282),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1281));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1282 (.A(net1283),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1282));
+ sky130_fd_sc_hd__buf_6 repeater1283 (.A(net1284),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1283));
+ sky130_fd_sc_hd__buf_6 repeater1284 (.A(net1285),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1284));
+ sky130_fd_sc_hd__buf_6 repeater1285 (.A(net1286),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1285));
+ sky130_fd_sc_hd__buf_4 repeater1286 (.A(net1287),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1286));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1287 (.A(net14),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1287));
+ sky130_fd_sc_hd__clkbuf_4 repeater1288 (.A(net1289),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1288));
+ sky130_fd_sc_hd__clkbuf_4 repeater1289 (.A(net1290),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1289));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1290 (.A(net1311),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1290));
+ sky130_fd_sc_hd__clkbuf_4 repeater1291 (.A(net1292),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1291));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1292 (.A(net1293),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1292));
+ sky130_fd_sc_hd__buf_6 repeater1293 (.A(net1294),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1293));
+ sky130_fd_sc_hd__buf_4 repeater1294 (.A(net1295),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1294));
+ sky130_fd_sc_hd__clkbuf_4 repeater1295 (.A(net1305),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1295));
+ sky130_fd_sc_hd__clkbuf_4 repeater1296 (.A(net1297),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1296));
+ sky130_fd_sc_hd__clkbuf_4 repeater1297 (.A(net1298),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1297));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1298 (.A(net1299),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1298));
+ sky130_fd_sc_hd__buf_6 repeater1299 (.A(net1300),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1299));
+ sky130_fd_sc_hd__clkbuf_2 repeater13 (.A(clknet_1_0_3_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2025));
+ sky130_fd_sc_hd__buf_4 repeater1300 (.A(net1301),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1300));
+ sky130_fd_sc_hd__clkbuf_4 repeater1301 (.A(net1302),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1301));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1302 (.A(net1303),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1302));
+ sky130_fd_sc_hd__buf_4 repeater1303 (.A(net1304),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1303));
+ sky130_fd_sc_hd__clkbuf_4 repeater1304 (.A(net1306),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1304));
+ sky130_fd_sc_hd__clkbuf_4 repeater1305 (.A(net1306),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1305));
+ sky130_fd_sc_hd__buf_6 repeater1306 (.A(net1307),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1306));
+ sky130_fd_sc_hd__buf_6 repeater1307 (.A(net1308),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1307));
+ sky130_fd_sc_hd__buf_4 repeater1308 (.A(net1309),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1308));
+ sky130_fd_sc_hd__clkbuf_4 repeater1309 (.A(net1310),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1309));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1310 (.A(net1311),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1310));
+ sky130_fd_sc_hd__buf_6 repeater1311 (.A(net1312),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1311));
+ sky130_fd_sc_hd__buf_6 repeater1312 (.A(net1313),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1312));
+ sky130_fd_sc_hd__buf_4 repeater1313 (.A(net1314),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1313));
+ sky130_fd_sc_hd__clkbuf_4 repeater1314 (.A(net1315),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1314));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1315 (.A(net13),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1315));
+ sky130_fd_sc_hd__clkbuf_4 repeater1316 (.A(net1317),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1316));
+ sky130_fd_sc_hd__clkbuf_4 repeater1317 (.A(net1318),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1317));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1318 (.A(net1339),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1318));
+ sky130_fd_sc_hd__clkbuf_4 repeater1319 (.A(net1320),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1319));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1320 (.A(net1321),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1320));
+ sky130_fd_sc_hd__buf_6 repeater1321 (.A(net1322),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1321));
+ sky130_fd_sc_hd__buf_4 repeater1322 (.A(net1323),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1322));
+ sky130_fd_sc_hd__clkbuf_4 repeater1323 (.A(net1333),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1323));
+ sky130_fd_sc_hd__clkbuf_4 repeater1324 (.A(net1325),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1324));
+ sky130_fd_sc_hd__clkbuf_4 repeater1325 (.A(net1326),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1325));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1326 (.A(net1327),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1326));
+ sky130_fd_sc_hd__buf_6 repeater1327 (.A(net1328),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1327));
+ sky130_fd_sc_hd__buf_4 repeater1328 (.A(net1329),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1328));
+ sky130_fd_sc_hd__clkbuf_4 repeater1329 (.A(net1330),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1329));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1330 (.A(net1331),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1330));
+ sky130_fd_sc_hd__buf_4 repeater1331 (.A(net1332),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1331));
+ sky130_fd_sc_hd__clkbuf_4 repeater1332 (.A(net1334),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1332));
+ sky130_fd_sc_hd__clkbuf_4 repeater1333 (.A(net1334),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1333));
+ sky130_fd_sc_hd__buf_6 repeater1334 (.A(net1335),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1334));
+ sky130_fd_sc_hd__buf_6 repeater1335 (.A(net1336),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1335));
+ sky130_fd_sc_hd__buf_4 repeater1336 (.A(net1337),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1336));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1337 (.A(net1338),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1337));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1338 (.A(net1339),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1338));
+ sky130_fd_sc_hd__buf_6 repeater1339 (.A(net1340),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1339));
+ sky130_fd_sc_hd__buf_6 repeater1340 (.A(net1341),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1340));
+ sky130_fd_sc_hd__buf_4 repeater1341 (.A(net1342),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1341));
+ sky130_fd_sc_hd__clkbuf_4 repeater1342 (.A(net1343),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1342));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1343 (.A(net12),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1343));
+ sky130_fd_sc_hd__clkbuf_4 repeater1344 (.A(net1345),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1344));
+ sky130_fd_sc_hd__clkbuf_4 repeater1345 (.A(net1346),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1345));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1346 (.A(net1366),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1346));
+ sky130_fd_sc_hd__clkbuf_4 repeater1347 (.A(net1348),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1347));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1348 (.A(net1349),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1348));
+ sky130_fd_sc_hd__buf_4 repeater1349 (.A(net1350),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1349));
+ sky130_fd_sc_hd__buf_4 repeater1350 (.A(net1351),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1350));
+ sky130_fd_sc_hd__clkbuf_4 repeater1351 (.A(net1361),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1351));
+ sky130_fd_sc_hd__clkbuf_4 repeater1352 (.A(net1353),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1352));
+ sky130_fd_sc_hd__clkbuf_4 repeater1353 (.A(net1354),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1353));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1354 (.A(net1355),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1354));
+ sky130_fd_sc_hd__buf_6 repeater1355 (.A(net1356),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1355));
+ sky130_fd_sc_hd__buf_4 repeater1356 (.A(net1357),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1356));
+ sky130_fd_sc_hd__clkbuf_4 repeater1357 (.A(net1358),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1357));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1358 (.A(net1359),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1358));
+ sky130_fd_sc_hd__clkbuf_4 repeater1359 (.A(net1360),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1359));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1360 (.A(net1362),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1360));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1361 (.A(net1362),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1361));
+ sky130_fd_sc_hd__buf_6 repeater1362 (.A(net1363),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1362));
+ sky130_fd_sc_hd__buf_4 repeater1363 (.A(net1364),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1363));
+ sky130_fd_sc_hd__clkbuf_4 repeater1364 (.A(net1365),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1364));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1365 (.A(net1367),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1365));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1366 (.A(net1367),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1366));
+ sky130_fd_sc_hd__buf_6 repeater1367 (.A(net1368),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1367));
+ sky130_fd_sc_hd__buf_6 repeater1368 (.A(net1369),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1368));
+ sky130_fd_sc_hd__buf_4 repeater1369 (.A(net1370),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1369));
+ sky130_fd_sc_hd__clkbuf_4 repeater1370 (.A(net1371),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1370));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1371 (.A(net11),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1371));
+ sky130_fd_sc_hd__clkbuf_4 repeater1372 (.A(net1373),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1372));
+ sky130_fd_sc_hd__clkbuf_4 repeater1373 (.A(net1374),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1373));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1374 (.A(net1383),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1374));
+ sky130_fd_sc_hd__clkbuf_4 repeater1375 (.A(net1376),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1375));
+ sky130_fd_sc_hd__clkbuf_4 repeater1376 (.A(net1377),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1376));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1377 (.A(net1378),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1377));
+ sky130_fd_sc_hd__buf_6 repeater1378 (.A(net1379),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1378));
+ sky130_fd_sc_hd__buf_6 repeater1379 (.A(net1380),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1379));
+ sky130_fd_sc_hd__buf_4 repeater1380 (.A(net1381),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1380));
+ sky130_fd_sc_hd__clkbuf_4 repeater1381 (.A(net1382),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1381));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1382 (.A(net1402),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1382));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1383 (.A(net1402),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1383));
+ sky130_fd_sc_hd__clkbuf_4 repeater1384 (.A(net1385),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1384));
+ sky130_fd_sc_hd__clkbuf_4 repeater1385 (.A(net1386),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1385));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1386 (.A(net1395),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1386));
+ sky130_fd_sc_hd__clkbuf_4 repeater1387 (.A(net1388),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1387));
+ sky130_fd_sc_hd__clkbuf_4 repeater1388 (.A(net1389),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1388));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1389 (.A(net1390),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1389));
+ sky130_fd_sc_hd__buf_6 repeater1390 (.A(net1391),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1390));
+ sky130_fd_sc_hd__buf_6 repeater1391 (.A(net1392),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1391));
+ sky130_fd_sc_hd__buf_4 repeater1392 (.A(net1393),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1392));
+ sky130_fd_sc_hd__clkbuf_4 repeater1393 (.A(net1394),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1393));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1394 (.A(net1396),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1394));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1395 (.A(net1396),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1395));
+ sky130_fd_sc_hd__buf_6 repeater1396 (.A(net1397),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1396));
+ sky130_fd_sc_hd__buf_6 repeater1397 (.A(net1398),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1397));
+ sky130_fd_sc_hd__buf_6 repeater1398 (.A(net1399),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1398));
+ sky130_fd_sc_hd__buf_4 repeater1399 (.A(net1400),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1399));
+ sky130_fd_sc_hd__buf_4 repeater14 (.A(net2027),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2026));
+ sky130_fd_sc_hd__clkbuf_4 repeater1400 (.A(net1401),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1400));
+ sky130_fd_sc_hd__clkbuf_4 repeater1401 (.A(net1402),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1401));
+ sky130_fd_sc_hd__buf_6 repeater1402 (.A(net1403),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1402));
+ sky130_fd_sc_hd__buf_6 repeater1403 (.A(net1404),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1403));
+ sky130_fd_sc_hd__buf_4 repeater1404 (.A(net1405),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1404));
+ sky130_fd_sc_hd__clkbuf_4 repeater1405 (.A(net1406),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1405));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1406 (.A(net10),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1406));
+ sky130_fd_sc_hd__buf_4 repeater1407 (.A(net1408),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1407));
+ sky130_fd_sc_hd__buf_4 repeater1408 (.A(net1409),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1408));
+ sky130_fd_sc_hd__buf_4 repeater1409 (.A(net1410),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1409));
+ sky130_fd_sc_hd__buf_6 repeater1410 (.A(net1411),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1410));
+ sky130_fd_sc_hd__buf_6 repeater1411 (.A(net1412),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1411));
+ sky130_fd_sc_hd__buf_6 repeater1412 (.A(net1413),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1412));
+ sky130_fd_sc_hd__buf_4 repeater1413 (.A(net1414),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1413));
+ sky130_fd_sc_hd__clkbuf_4 repeater1414 (.A(net1415),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1414));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1415 (.A(net1),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1415));
+ sky130_fd_sc_hd__buf_4 repeater1416 (.A(net1417),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1416));
+ sky130_fd_sc_hd__buf_4 repeater1417 (.A(net1418),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1417));
+ sky130_fd_sc_hd__buf_6 repeater1418 (.A(net1419),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1418));
+ sky130_fd_sc_hd__buf_6 repeater1419 (.A(net1420),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1419));
+ sky130_fd_sc_hd__buf_6 repeater1420 (.A(net1421),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1420));
+ sky130_fd_sc_hd__buf_4 repeater1421 (.A(net1422),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1421));
+ sky130_fd_sc_hd__clkbuf_4 repeater1422 (.A(\sram0_dout1[3][9] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1422));
+ sky130_fd_sc_hd__buf_4 repeater1423 (.A(net1424),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1423));
+ sky130_fd_sc_hd__buf_4 repeater1424 (.A(net1425),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1424));
+ sky130_fd_sc_hd__buf_6 repeater1425 (.A(net1426),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1425));
+ sky130_fd_sc_hd__buf_6 repeater1426 (.A(net1427),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1426));
+ sky130_fd_sc_hd__buf_6 repeater1427 (.A(net1428),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1427));
+ sky130_fd_sc_hd__buf_4 repeater1428 (.A(net1429),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1428));
+ sky130_fd_sc_hd__clkbuf_4 repeater1429 (.A(\sram0_dout1[3][8] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1429));
+ sky130_fd_sc_hd__buf_4 repeater1430 (.A(net1431),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1430));
+ sky130_fd_sc_hd__buf_4 repeater1431 (.A(net1432),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1431));
+ sky130_fd_sc_hd__buf_6 repeater1432 (.A(net1433),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1432));
+ sky130_fd_sc_hd__buf_6 repeater1433 (.A(net1434),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1433));
+ sky130_fd_sc_hd__buf_6 repeater1434 (.A(net1435),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1434));
+ sky130_fd_sc_hd__buf_4 repeater1435 (.A(net1436),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1435));
+ sky130_fd_sc_hd__clkbuf_4 repeater1436 (.A(\sram0_dout1[3][7] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1436));
+ sky130_fd_sc_hd__buf_4 repeater1437 (.A(net1438),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1437));
+ sky130_fd_sc_hd__buf_4 repeater1438 (.A(net1439),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1438));
+ sky130_fd_sc_hd__buf_6 repeater1439 (.A(net1440),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1439));
+ sky130_fd_sc_hd__buf_6 repeater1440 (.A(net1441),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1440));
+ sky130_fd_sc_hd__buf_6 repeater1441 (.A(net1442),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1441));
+ sky130_fd_sc_hd__buf_4 repeater1442 (.A(net1443),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1442));
+ sky130_fd_sc_hd__clkbuf_4 repeater1443 (.A(\sram0_dout1[3][6] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1443));
+ sky130_fd_sc_hd__buf_4 repeater1444 (.A(net1445),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1444));
+ sky130_fd_sc_hd__buf_4 repeater1445 (.A(net1446),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1445));
+ sky130_fd_sc_hd__buf_6 repeater1446 (.A(net1447),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1446));
+ sky130_fd_sc_hd__buf_6 repeater1447 (.A(net1448),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1447));
+ sky130_fd_sc_hd__buf_6 repeater1448 (.A(net1449),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1448));
+ sky130_fd_sc_hd__buf_4 repeater1449 (.A(net1450),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1449));
+ sky130_fd_sc_hd__clkbuf_4 repeater1450 (.A(\sram0_dout1[3][5] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1450));
+ sky130_fd_sc_hd__buf_4 repeater1451 (.A(net1452),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1451));
+ sky130_fd_sc_hd__buf_4 repeater1452 (.A(net1453),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1452));
+ sky130_fd_sc_hd__buf_6 repeater1453 (.A(net1454),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1453));
+ sky130_fd_sc_hd__buf_6 repeater1454 (.A(net1455),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1454));
+ sky130_fd_sc_hd__buf_6 repeater1455 (.A(net1456),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1455));
+ sky130_fd_sc_hd__buf_4 repeater1456 (.A(net1457),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1456));
+ sky130_fd_sc_hd__clkbuf_4 repeater1457 (.A(\sram0_dout1[3][4] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1457));
+ sky130_fd_sc_hd__buf_4 repeater1458 (.A(net1459),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1458));
+ sky130_fd_sc_hd__buf_4 repeater1459 (.A(net1460),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1459));
+ sky130_fd_sc_hd__buf_6 repeater1460 (.A(net1461),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1460));
+ sky130_fd_sc_hd__buf_6 repeater1461 (.A(net1462),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1461));
+ sky130_fd_sc_hd__buf_6 repeater1462 (.A(net1463),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1462));
+ sky130_fd_sc_hd__buf_4 repeater1463 (.A(net1464),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1463));
+ sky130_fd_sc_hd__clkbuf_4 repeater1464 (.A(\sram0_dout1[3][3] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1464));
+ sky130_fd_sc_hd__buf_4 repeater1465 (.A(net1466),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1465));
+ sky130_fd_sc_hd__buf_4 repeater1466 (.A(net1467),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1466));
+ sky130_fd_sc_hd__buf_6 repeater1467 (.A(net1468),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1467));
+ sky130_fd_sc_hd__buf_6 repeater1468 (.A(net1469),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1468));
+ sky130_fd_sc_hd__buf_6 repeater1469 (.A(net1470),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1469));
+ sky130_fd_sc_hd__buf_4 repeater1470 (.A(net1471),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1470));
+ sky130_fd_sc_hd__clkbuf_4 repeater1471 (.A(net1472),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1471));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1472 (.A(\sram0_dout1[3][31] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1472));
+ sky130_fd_sc_hd__buf_4 repeater1473 (.A(net1474),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1473));
+ sky130_fd_sc_hd__buf_4 repeater1474 (.A(net1475),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1474));
+ sky130_fd_sc_hd__buf_6 repeater1475 (.A(net1476),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1475));
+ sky130_fd_sc_hd__buf_6 repeater1476 (.A(net1477),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1476));
+ sky130_fd_sc_hd__buf_6 repeater1477 (.A(net1478),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1477));
+ sky130_fd_sc_hd__buf_4 repeater1478 (.A(net1479),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1478));
+ sky130_fd_sc_hd__clkbuf_4 repeater1479 (.A(\sram0_dout1[3][30] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1479));
+ sky130_fd_sc_hd__buf_4 repeater1480 (.A(net1481),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1480));
+ sky130_fd_sc_hd__buf_4 repeater1481 (.A(net1482),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1481));
+ sky130_fd_sc_hd__buf_6 repeater1482 (.A(net1483),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1482));
+ sky130_fd_sc_hd__buf_6 repeater1483 (.A(net1484),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1483));
+ sky130_fd_sc_hd__buf_6 repeater1484 (.A(net1485),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1484));
+ sky130_fd_sc_hd__buf_4 repeater1485 (.A(net1486),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1485));
+ sky130_fd_sc_hd__clkbuf_4 repeater1486 (.A(\sram0_dout1[3][2] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1486));
+ sky130_fd_sc_hd__buf_4 repeater1487 (.A(net1488),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1487));
+ sky130_fd_sc_hd__buf_4 repeater1488 (.A(net1489),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1488));
+ sky130_fd_sc_hd__buf_6 repeater1489 (.A(net1490),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1489));
+ sky130_fd_sc_hd__buf_4 repeater149 (.A(net150),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net149));
+ sky130_fd_sc_hd__buf_6 repeater1490 (.A(net1491),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1490));
+ sky130_fd_sc_hd__buf_6 repeater1491 (.A(net1492),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1491));
+ sky130_fd_sc_hd__buf_4 repeater1492 (.A(net1493),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1492));
+ sky130_fd_sc_hd__clkbuf_4 repeater1493 (.A(\sram0_dout1[3][29] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1493));
+ sky130_fd_sc_hd__buf_4 repeater1494 (.A(net1495),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1494));
+ sky130_fd_sc_hd__buf_4 repeater1495 (.A(net1496),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1495));
+ sky130_fd_sc_hd__buf_6 repeater1496 (.A(net1497),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1496));
+ sky130_fd_sc_hd__buf_6 repeater1497 (.A(net1498),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1497));
+ sky130_fd_sc_hd__buf_6 repeater1498 (.A(net1499),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1498));
+ sky130_fd_sc_hd__buf_4 repeater1499 (.A(net1500),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1499));
+ sky130_fd_sc_hd__buf_2 repeater15 (.A(clknet_1_0_3_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2027));
+ sky130_fd_sc_hd__clkbuf_4 repeater150 (.A(net127),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net150));
+ sky130_fd_sc_hd__clkbuf_4 repeater1500 (.A(\sram0_dout1[3][28] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1500));
+ sky130_fd_sc_hd__buf_4 repeater1501 (.A(net1502),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1501));
+ sky130_fd_sc_hd__buf_4 repeater1502 (.A(net1503),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1502));
+ sky130_fd_sc_hd__buf_6 repeater1503 (.A(net1504),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1503));
+ sky130_fd_sc_hd__buf_6 repeater1504 (.A(net1505),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1504));
+ sky130_fd_sc_hd__buf_6 repeater1505 (.A(net1506),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1505));
+ sky130_fd_sc_hd__buf_4 repeater1506 (.A(net1507),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1506));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1507 (.A(\sram0_dout1[3][27] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1507));
+ sky130_fd_sc_hd__buf_4 repeater1508 (.A(net1509),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1508));
+ sky130_fd_sc_hd__buf_4 repeater1509 (.A(net1510),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1509));
+ sky130_fd_sc_hd__buf_4 repeater151 (.A(net152),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net151));
+ sky130_fd_sc_hd__buf_6 repeater1510 (.A(net1511),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1510));
+ sky130_fd_sc_hd__buf_6 repeater1511 (.A(net1512),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1511));
+ sky130_fd_sc_hd__buf_4 repeater1512 (.A(net1513),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1512));
+ sky130_fd_sc_hd__clkbuf_4 repeater1513 (.A(net1514),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1513));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1514 (.A(\sram0_dout1[3][26] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1514));
+ sky130_fd_sc_hd__buf_4 repeater1515 (.A(net1516),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1515));
+ sky130_fd_sc_hd__buf_4 repeater1516 (.A(net1517),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1516));
+ sky130_fd_sc_hd__buf_6 repeater1517 (.A(net1518),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1517));
+ sky130_fd_sc_hd__buf_6 repeater1518 (.A(net1519),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1518));
+ sky130_fd_sc_hd__buf_4 repeater1519 (.A(net1520),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1519));
+ sky130_fd_sc_hd__clkbuf_4 repeater152 (.A(net126),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net152));
+ sky130_fd_sc_hd__clkbuf_4 repeater1520 (.A(net1521),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1520));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1521 (.A(\sram0_dout1[3][25] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1521));
+ sky130_fd_sc_hd__buf_4 repeater1522 (.A(net1523),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1522));
+ sky130_fd_sc_hd__buf_4 repeater1523 (.A(net1524),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1523));
+ sky130_fd_sc_hd__buf_6 repeater1524 (.A(net1525),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1524));
+ sky130_fd_sc_hd__buf_6 repeater1525 (.A(net1526),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1525));
+ sky130_fd_sc_hd__buf_6 repeater1526 (.A(net1527),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1526));
+ sky130_fd_sc_hd__buf_4 repeater1527 (.A(net1528),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1527));
+ sky130_fd_sc_hd__clkbuf_4 repeater1528 (.A(\sram0_dout1[3][24] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1528));
+ sky130_fd_sc_hd__buf_4 repeater1529 (.A(net1530),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1529));
+ sky130_fd_sc_hd__buf_4 repeater153 (.A(net154),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net153));
+ sky130_fd_sc_hd__buf_4 repeater1530 (.A(net1531),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1530));
+ sky130_fd_sc_hd__buf_6 repeater1531 (.A(net1532),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1531));
+ sky130_fd_sc_hd__buf_6 repeater1532 (.A(net1533),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1532));
+ sky130_fd_sc_hd__buf_6 repeater1533 (.A(net1534),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1533));
+ sky130_fd_sc_hd__buf_4 repeater1534 (.A(net1535),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1534));
+ sky130_fd_sc_hd__clkbuf_4 repeater1535 (.A(\sram0_dout1[3][23] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1535));
+ sky130_fd_sc_hd__buf_4 repeater1536 (.A(net1537),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1536));
+ sky130_fd_sc_hd__buf_4 repeater1537 (.A(net1538),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1537));
+ sky130_fd_sc_hd__buf_6 repeater1538 (.A(net1539),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1538));
+ sky130_fd_sc_hd__buf_6 repeater1539 (.A(net1540),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1539));
+ sky130_fd_sc_hd__clkbuf_4 repeater154 (.A(net125),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net154));
+ sky130_fd_sc_hd__buf_6 repeater1540 (.A(net1541),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1540));
+ sky130_fd_sc_hd__buf_4 repeater1541 (.A(net1542),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1541));
+ sky130_fd_sc_hd__clkbuf_4 repeater1542 (.A(\sram0_dout1[3][22] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1542));
+ sky130_fd_sc_hd__buf_4 repeater1543 (.A(net1544),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1543));
+ sky130_fd_sc_hd__buf_4 repeater1544 (.A(net1545),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1544));
+ sky130_fd_sc_hd__buf_6 repeater1545 (.A(net1546),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1545));
+ sky130_fd_sc_hd__buf_6 repeater1546 (.A(net1547),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1546));
+ sky130_fd_sc_hd__buf_6 repeater1547 (.A(net1548),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1547));
+ sky130_fd_sc_hd__buf_4 repeater1548 (.A(net1549),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1548));
+ sky130_fd_sc_hd__clkbuf_4 repeater1549 (.A(\sram0_dout1[3][21] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1549));
+ sky130_fd_sc_hd__buf_4 repeater155 (.A(net156),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net155));
+ sky130_fd_sc_hd__buf_4 repeater1550 (.A(net1551),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1550));
+ sky130_fd_sc_hd__buf_4 repeater1551 (.A(net1552),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1551));
+ sky130_fd_sc_hd__buf_6 repeater1552 (.A(net1553),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1552));
+ sky130_fd_sc_hd__buf_6 repeater1553 (.A(net1554),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1553));
+ sky130_fd_sc_hd__buf_6 repeater1554 (.A(net1555),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1554));
+ sky130_fd_sc_hd__buf_4 repeater1555 (.A(net1556),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1555));
+ sky130_fd_sc_hd__clkbuf_4 repeater1556 (.A(\sram0_dout1[3][20] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1556));
+ sky130_fd_sc_hd__buf_4 repeater1557 (.A(net1558),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1557));
+ sky130_fd_sc_hd__buf_4 repeater1558 (.A(net1559),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1558));
+ sky130_fd_sc_hd__buf_6 repeater1559 (.A(net1560),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1559));
+ sky130_fd_sc_hd__clkbuf_4 repeater156 (.A(net124),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net156));
+ sky130_fd_sc_hd__buf_6 repeater1560 (.A(net1561),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1560));
+ sky130_fd_sc_hd__buf_6 repeater1561 (.A(net1562),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1561));
+ sky130_fd_sc_hd__buf_4 repeater1562 (.A(net1563),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1562));
+ sky130_fd_sc_hd__clkbuf_4 repeater1563 (.A(\sram0_dout1[3][1] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1563));
+ sky130_fd_sc_hd__buf_4 repeater1564 (.A(net1565),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1564));
+ sky130_fd_sc_hd__buf_4 repeater1565 (.A(net1566),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1565));
+ sky130_fd_sc_hd__buf_6 repeater1566 (.A(net1567),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1566));
+ sky130_fd_sc_hd__buf_6 repeater1567 (.A(net1568),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1567));
+ sky130_fd_sc_hd__buf_6 repeater1568 (.A(net1569),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1568));
+ sky130_fd_sc_hd__buf_4 repeater1569 (.A(net1570),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1569));
+ sky130_fd_sc_hd__buf_4 repeater157 (.A(net158),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net157));
+ sky130_fd_sc_hd__clkbuf_4 repeater1570 (.A(\sram0_dout1[3][19] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1570));
+ sky130_fd_sc_hd__buf_4 repeater1571 (.A(net1572),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1571));
+ sky130_fd_sc_hd__buf_4 repeater1572 (.A(net1573),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1572));
+ sky130_fd_sc_hd__buf_6 repeater1573 (.A(net1574),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1573));
+ sky130_fd_sc_hd__buf_6 repeater1574 (.A(net1575),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1574));
+ sky130_fd_sc_hd__buf_6 repeater1575 (.A(net1576),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1575));
+ sky130_fd_sc_hd__buf_4 repeater1576 (.A(net1577),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1576));
+ sky130_fd_sc_hd__clkbuf_4 repeater1577 (.A(\sram0_dout1[3][18] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1577));
+ sky130_fd_sc_hd__buf_4 repeater1578 (.A(net1579),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1578));
+ sky130_fd_sc_hd__buf_4 repeater1579 (.A(net1580),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1579));
+ sky130_fd_sc_hd__clkbuf_4 repeater158 (.A(net123),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net158));
+ sky130_fd_sc_hd__buf_6 repeater1580 (.A(net1581),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1580));
+ sky130_fd_sc_hd__buf_6 repeater1581 (.A(net1582),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1581));
+ sky130_fd_sc_hd__buf_6 repeater1582 (.A(net1583),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1582));
+ sky130_fd_sc_hd__buf_4 repeater1583 (.A(net1584),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1583));
+ sky130_fd_sc_hd__clkbuf_4 repeater1584 (.A(\sram0_dout1[3][17] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1584));
+ sky130_fd_sc_hd__buf_4 repeater1585 (.A(net1586),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1585));
+ sky130_fd_sc_hd__buf_4 repeater1586 (.A(net1587),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1586));
+ sky130_fd_sc_hd__buf_6 repeater1587 (.A(net1588),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1587));
+ sky130_fd_sc_hd__buf_6 repeater1588 (.A(net1589),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1588));
+ sky130_fd_sc_hd__buf_6 repeater1589 (.A(net1590),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1589));
+ sky130_fd_sc_hd__buf_4 repeater159 (.A(net160),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net159));
+ sky130_fd_sc_hd__buf_4 repeater1590 (.A(net1591),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1590));
+ sky130_fd_sc_hd__clkbuf_4 repeater1591 (.A(\sram0_dout1[3][16] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1591));
+ sky130_fd_sc_hd__buf_4 repeater1592 (.A(net1593),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1592));
+ sky130_fd_sc_hd__buf_4 repeater1593 (.A(net1594),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1593));
+ sky130_fd_sc_hd__buf_6 repeater1594 (.A(net1595),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1594));
+ sky130_fd_sc_hd__buf_6 repeater1595 (.A(net1596),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1595));
+ sky130_fd_sc_hd__buf_6 repeater1596 (.A(net1597),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1596));
+ sky130_fd_sc_hd__buf_4 repeater1597 (.A(net1598),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1597));
+ sky130_fd_sc_hd__clkbuf_4 repeater1598 (.A(\sram0_dout1[3][15] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1598));
+ sky130_fd_sc_hd__buf_4 repeater1599 (.A(net1600),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1599));
+ sky130_fd_sc_hd__clkbuf_2 repeater16 (.A(clknet_1_0_3_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2028));
+ sky130_fd_sc_hd__clkbuf_4 repeater160 (.A(net122),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net160));
+ sky130_fd_sc_hd__buf_4 repeater1600 (.A(net1601),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1600));
+ sky130_fd_sc_hd__buf_6 repeater1601 (.A(net1602),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1601));
+ sky130_fd_sc_hd__buf_6 repeater1602 (.A(net1603),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1602));
+ sky130_fd_sc_hd__buf_6 repeater1603 (.A(net1604),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1603));
+ sky130_fd_sc_hd__buf_4 repeater1604 (.A(net1605),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1604));
+ sky130_fd_sc_hd__clkbuf_4 repeater1605 (.A(\sram0_dout1[3][14] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1605));
+ sky130_fd_sc_hd__buf_4 repeater1606 (.A(net1607),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1606));
+ sky130_fd_sc_hd__buf_4 repeater1607 (.A(net1608),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1607));
+ sky130_fd_sc_hd__buf_6 repeater1608 (.A(net1609),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1608));
+ sky130_fd_sc_hd__buf_6 repeater1609 (.A(net1610),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1609));
+ sky130_fd_sc_hd__buf_4 repeater161 (.A(net162),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net161));
+ sky130_fd_sc_hd__buf_6 repeater1610 (.A(net1611),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1610));
+ sky130_fd_sc_hd__buf_4 repeater1611 (.A(net1612),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1611));
+ sky130_fd_sc_hd__clkbuf_4 repeater1612 (.A(\sram0_dout1[3][13] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1612));
+ sky130_fd_sc_hd__buf_4 repeater1613 (.A(net1614),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1613));
+ sky130_fd_sc_hd__buf_4 repeater1614 (.A(net1615),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1614));
+ sky130_fd_sc_hd__buf_6 repeater1615 (.A(net1616),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1615));
+ sky130_fd_sc_hd__buf_6 repeater1616 (.A(net1617),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1616));
+ sky130_fd_sc_hd__buf_6 repeater1617 (.A(net1618),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1617));
+ sky130_fd_sc_hd__buf_4 repeater1618 (.A(net1619),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1618));
+ sky130_fd_sc_hd__clkbuf_4 repeater1619 (.A(\sram0_dout1[3][12] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1619));
+ sky130_fd_sc_hd__clkbuf_4 repeater162 (.A(net121),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net162));
+ sky130_fd_sc_hd__buf_4 repeater1620 (.A(net1621),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1620));
+ sky130_fd_sc_hd__buf_4 repeater1621 (.A(net1622),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1621));
+ sky130_fd_sc_hd__buf_6 repeater1622 (.A(net1623),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1622));
+ sky130_fd_sc_hd__buf_6 repeater1623 (.A(net1624),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1623));
+ sky130_fd_sc_hd__buf_6 repeater1624 (.A(net1625),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1624));
+ sky130_fd_sc_hd__buf_4 repeater1625 (.A(net1626),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1625));
+ sky130_fd_sc_hd__clkbuf_4 repeater1626 (.A(\sram0_dout1[3][11] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1626));
+ sky130_fd_sc_hd__buf_4 repeater1627 (.A(net1628),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1627));
+ sky130_fd_sc_hd__buf_4 repeater1628 (.A(net1629),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1628));
+ sky130_fd_sc_hd__buf_6 repeater1629 (.A(net1630),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1629));
+ sky130_fd_sc_hd__buf_4 repeater163 (.A(net164),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net163));
+ sky130_fd_sc_hd__buf_6 repeater1630 (.A(net1631),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1630));
+ sky130_fd_sc_hd__buf_6 repeater1631 (.A(net1632),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1631));
+ sky130_fd_sc_hd__buf_4 repeater1632 (.A(net1633),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1632));
+ sky130_fd_sc_hd__clkbuf_4 repeater1633 (.A(\sram0_dout1[3][10] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1633));
+ sky130_fd_sc_hd__buf_4 repeater1634 (.A(net1635),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1634));
+ sky130_fd_sc_hd__buf_4 repeater1635 (.A(net1636),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1635));
+ sky130_fd_sc_hd__buf_6 repeater1636 (.A(net1637),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1636));
+ sky130_fd_sc_hd__buf_6 repeater1637 (.A(net1638),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1637));
+ sky130_fd_sc_hd__buf_6 repeater1638 (.A(net1639),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1638));
+ sky130_fd_sc_hd__buf_4 repeater1639 (.A(net1640),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1639));
+ sky130_fd_sc_hd__clkbuf_4 repeater164 (.A(net120),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net164));
+ sky130_fd_sc_hd__clkbuf_4 repeater1640 (.A(\sram0_dout1[3][0] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1640));
+ sky130_fd_sc_hd__clkbuf_4 repeater1641 (.A(net1642),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1641));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1642 (.A(\sram0_dout1[2][9] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1642));
+ sky130_fd_sc_hd__clkbuf_4 repeater1643 (.A(net1644),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1643));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1644 (.A(\sram0_dout1[2][8] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1644));
+ sky130_fd_sc_hd__clkbuf_4 repeater1645 (.A(net1646),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1645));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1646 (.A(\sram0_dout1[2][7] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1646));
+ sky130_fd_sc_hd__clkbuf_4 repeater1647 (.A(net1648),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1647));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1648 (.A(\sram0_dout1[2][6] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1648));
+ sky130_fd_sc_hd__clkbuf_4 repeater1649 (.A(net1650),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1649));
+ sky130_fd_sc_hd__buf_4 repeater165 (.A(net166),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net165));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1650 (.A(\sram0_dout1[2][5] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1650));
+ sky130_fd_sc_hd__clkbuf_4 repeater1651 (.A(net1652),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1651));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1652 (.A(\sram0_dout1[2][4] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1652));
+ sky130_fd_sc_hd__clkbuf_4 repeater1653 (.A(net1654),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1653));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1654 (.A(\sram0_dout1[2][3] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1654));
+ sky130_fd_sc_hd__clkbuf_4 repeater1655 (.A(net1656),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1655));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1656 (.A(\sram0_dout1[2][31] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1656));
+ sky130_fd_sc_hd__clkbuf_4 repeater1657 (.A(net1658),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1657));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1658 (.A(\sram0_dout1[2][30] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1658));
+ sky130_fd_sc_hd__clkbuf_4 repeater1659 (.A(net1660),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1659));
+ sky130_fd_sc_hd__clkbuf_4 repeater166 (.A(net119),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net166));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1660 (.A(\sram0_dout1[2][2] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1660));
+ sky130_fd_sc_hd__clkbuf_4 repeater1661 (.A(net1662),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1661));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1662 (.A(\sram0_dout1[2][29] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1662));
+ sky130_fd_sc_hd__clkbuf_4 repeater1663 (.A(net1664),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1663));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1664 (.A(\sram0_dout1[2][28] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1664));
+ sky130_fd_sc_hd__clkbuf_4 repeater1665 (.A(net1666),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1665));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1666 (.A(\sram0_dout1[2][27] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1666));
+ sky130_fd_sc_hd__clkbuf_4 repeater1667 (.A(net1668),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1667));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1668 (.A(\sram0_dout1[2][26] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1668));
+ sky130_fd_sc_hd__clkbuf_4 repeater1669 (.A(net1670),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1669));
+ sky130_fd_sc_hd__clkbuf_4 repeater167 (.A(net168),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net167));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1670 (.A(\sram0_dout1[2][25] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1670));
+ sky130_fd_sc_hd__clkbuf_4 repeater1671 (.A(net1672),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1671));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1672 (.A(\sram0_dout1[2][24] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1672));
+ sky130_fd_sc_hd__clkbuf_4 repeater1673 (.A(net1674),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1673));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1674 (.A(\sram0_dout1[2][23] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1674));
+ sky130_fd_sc_hd__clkbuf_4 repeater1675 (.A(net1676),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1675));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1676 (.A(\sram0_dout1[2][22] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1676));
+ sky130_fd_sc_hd__clkbuf_4 repeater1677 (.A(net1678),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1677));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1678 (.A(\sram0_dout1[2][21] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1678));
+ sky130_fd_sc_hd__clkbuf_4 repeater1679 (.A(net1680),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1679));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater168 (.A(net118),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net168));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1680 (.A(\sram0_dout1[2][20] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1680));
+ sky130_fd_sc_hd__clkbuf_4 repeater1681 (.A(net1682),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1681));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1682 (.A(\sram0_dout1[2][1] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1682));
+ sky130_fd_sc_hd__clkbuf_4 repeater1683 (.A(net1684),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1683));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1684 (.A(\sram0_dout1[2][19] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1684));
+ sky130_fd_sc_hd__clkbuf_4 repeater1685 (.A(net1686),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1685));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1686 (.A(\sram0_dout1[2][18] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1686));
+ sky130_fd_sc_hd__clkbuf_4 repeater1687 (.A(net1688),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1687));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1688 (.A(\sram0_dout1[2][17] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1688));
+ sky130_fd_sc_hd__clkbuf_4 repeater1689 (.A(net1690),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1689));
+ sky130_fd_sc_hd__clkbuf_4 repeater169 (.A(net170),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net169));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1690 (.A(\sram0_dout1[2][16] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1690));
+ sky130_fd_sc_hd__clkbuf_4 repeater1691 (.A(net1692),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1691));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1692 (.A(\sram0_dout1[2][15] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1692));
+ sky130_fd_sc_hd__clkbuf_4 repeater1693 (.A(net1694),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1693));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1694 (.A(\sram0_dout1[2][14] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1694));
+ sky130_fd_sc_hd__clkbuf_4 repeater1695 (.A(net1696),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1695));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1696 (.A(\sram0_dout1[2][13] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1696));
+ sky130_fd_sc_hd__clkbuf_4 repeater1697 (.A(net1698),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1697));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1698 (.A(\sram0_dout1[2][12] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1698));
+ sky130_fd_sc_hd__clkbuf_4 repeater1699 (.A(net1700),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1699));
+ sky130_fd_sc_hd__buf_4 repeater17 (.A(net2030),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2029));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater170 (.A(net148),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net170));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1700 (.A(\sram0_dout1[2][11] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1700));
+ sky130_fd_sc_hd__clkbuf_4 repeater1701 (.A(net1702),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1701));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1702 (.A(\sram0_dout1[2][10] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1702));
+ sky130_fd_sc_hd__clkbuf_4 repeater1703 (.A(net1704),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1703));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1704 (.A(\sram0_dout1[2][0] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1704));
+ sky130_fd_sc_hd__buf_6 repeater1705 (.A(net1706),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1705));
+ sky130_fd_sc_hd__buf_4 repeater1706 (.A(net1707),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1706));
+ sky130_fd_sc_hd__clkbuf_4 repeater1707 (.A(net1708),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1707));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1708 (.A(\sram0_dout1[1][9] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1708));
+ sky130_fd_sc_hd__buf_6 repeater1709 (.A(net1710),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1709));
+ sky130_fd_sc_hd__buf_4 repeater171 (.A(net172),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net171));
+ sky130_fd_sc_hd__buf_4 repeater1710 (.A(net1711),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1710));
+ sky130_fd_sc_hd__clkbuf_4 repeater1711 (.A(net1712),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1711));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1712 (.A(\sram0_dout1[1][8] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1712));
+ sky130_fd_sc_hd__buf_6 repeater1713 (.A(net1714),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1713));
+ sky130_fd_sc_hd__buf_4 repeater1714 (.A(net1715),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1714));
+ sky130_fd_sc_hd__clkbuf_4 repeater1715 (.A(net1716),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1715));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1716 (.A(\sram0_dout1[1][7] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1716));
+ sky130_fd_sc_hd__buf_6 repeater1717 (.A(net1718),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1717));
+ sky130_fd_sc_hd__buf_4 repeater1718 (.A(net1719),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1718));
+ sky130_fd_sc_hd__clkbuf_4 repeater1719 (.A(net1720),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1719));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater172 (.A(net147),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net172));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1720 (.A(\sram0_dout1[1][6] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1720));
+ sky130_fd_sc_hd__buf_6 repeater1721 (.A(net1722),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1721));
+ sky130_fd_sc_hd__buf_4 repeater1722 (.A(net1723),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1722));
+ sky130_fd_sc_hd__clkbuf_4 repeater1723 (.A(net1724),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1723));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1724 (.A(\sram0_dout1[1][5] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1724));
+ sky130_fd_sc_hd__buf_6 repeater1725 (.A(net1726),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1725));
+ sky130_fd_sc_hd__buf_4 repeater1726 (.A(net1727),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1726));
+ sky130_fd_sc_hd__clkbuf_4 repeater1727 (.A(net1728),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1727));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1728 (.A(\sram0_dout1[1][4] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1728));
+ sky130_fd_sc_hd__buf_6 repeater1729 (.A(net1730),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1729));
+ sky130_fd_sc_hd__clkbuf_4 repeater173 (.A(net174),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net173));
+ sky130_fd_sc_hd__buf_4 repeater1730 (.A(net1731),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1730));
+ sky130_fd_sc_hd__clkbuf_4 repeater1731 (.A(net1732),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1731));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1732 (.A(\sram0_dout1[1][3] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1732));
+ sky130_fd_sc_hd__buf_6 repeater1733 (.A(net1734),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1733));
+ sky130_fd_sc_hd__buf_6 repeater1734 (.A(net1735),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1734));
+ sky130_fd_sc_hd__buf_6 repeater1735 (.A(net1736),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1735));
+ sky130_fd_sc_hd__buf_4 repeater1736 (.A(net1737),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1736));
+ sky130_fd_sc_hd__clkbuf_4 repeater1737 (.A(\sram0_dout1[1][31] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1737));
+ sky130_fd_sc_hd__buf_6 repeater1738 (.A(net1739),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1738));
+ sky130_fd_sc_hd__buf_6 repeater1739 (.A(net1740),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1739));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater174 (.A(net146),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net174));
+ sky130_fd_sc_hd__buf_6 repeater1740 (.A(net1741),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1740));
+ sky130_fd_sc_hd__buf_4 repeater1741 (.A(net1742),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1741));
+ sky130_fd_sc_hd__clkbuf_4 repeater1742 (.A(\sram0_dout1[1][30] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1742));
+ sky130_fd_sc_hd__buf_6 repeater1743 (.A(net1744),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1743));
+ sky130_fd_sc_hd__buf_4 repeater1744 (.A(net1745),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1744));
+ sky130_fd_sc_hd__clkbuf_4 repeater1745 (.A(net1746),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1745));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1746 (.A(\sram0_dout1[1][2] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1746));
+ sky130_fd_sc_hd__buf_6 repeater1747 (.A(net1748),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1747));
+ sky130_fd_sc_hd__buf_6 repeater1748 (.A(net1749),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1748));
+ sky130_fd_sc_hd__buf_6 repeater1749 (.A(net1750),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1749));
+ sky130_fd_sc_hd__clkbuf_4 repeater175 (.A(net176),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net175));
+ sky130_fd_sc_hd__buf_4 repeater1750 (.A(net1751),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1750));
+ sky130_fd_sc_hd__clkbuf_4 repeater1751 (.A(\sram0_dout1[1][29] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1751));
+ sky130_fd_sc_hd__buf_6 repeater1752 (.A(net1753),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1752));
+ sky130_fd_sc_hd__buf_6 repeater1753 (.A(net1754),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1753));
+ sky130_fd_sc_hd__buf_6 repeater1754 (.A(net1755),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1754));
+ sky130_fd_sc_hd__buf_4 repeater1755 (.A(net1756),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1755));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1756 (.A(\sram0_dout1[1][28] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1756));
+ sky130_fd_sc_hd__buf_6 repeater1757 (.A(net1758),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1757));
+ sky130_fd_sc_hd__buf_6 repeater1758 (.A(net1759),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1758));
+ sky130_fd_sc_hd__buf_4 repeater1759 (.A(net1760),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1759));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater176 (.A(net145),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net176));
+ sky130_fd_sc_hd__clkbuf_4 repeater1760 (.A(net1761),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1760));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1761 (.A(\sram0_dout1[1][27] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1761));
+ sky130_fd_sc_hd__buf_6 repeater1762 (.A(net1763),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1762));
+ sky130_fd_sc_hd__buf_6 repeater1763 (.A(net1764),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1763));
+ sky130_fd_sc_hd__buf_4 repeater1764 (.A(net1765),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1764));
+ sky130_fd_sc_hd__clkbuf_4 repeater1765 (.A(net1766),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1765));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1766 (.A(\sram0_dout1[1][26] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1766));
+ sky130_fd_sc_hd__buf_6 repeater1767 (.A(net1768),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1767));
+ sky130_fd_sc_hd__buf_6 repeater1768 (.A(net1769),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1768));
+ sky130_fd_sc_hd__buf_4 repeater1769 (.A(net1770),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1769));
+ sky130_fd_sc_hd__clkbuf_4 repeater177 (.A(net178),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net177));
+ sky130_fd_sc_hd__clkbuf_4 repeater1770 (.A(net1771),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1770));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1771 (.A(\sram0_dout1[1][25] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1771));
+ sky130_fd_sc_hd__buf_6 repeater1772 (.A(net1773),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1772));
+ sky130_fd_sc_hd__buf_6 repeater1773 (.A(net1774),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1773));
+ sky130_fd_sc_hd__buf_6 repeater1774 (.A(net1775),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1774));
+ sky130_fd_sc_hd__buf_4 repeater1775 (.A(net1776),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1775));
+ sky130_fd_sc_hd__clkbuf_4 repeater1776 (.A(\sram0_dout1[1][24] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1776));
+ sky130_fd_sc_hd__buf_6 repeater1777 (.A(net1778),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1777));
+ sky130_fd_sc_hd__buf_6 repeater1778 (.A(net1779),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1778));
+ sky130_fd_sc_hd__buf_6 repeater1779 (.A(net1780),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1779));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater178 (.A(net144),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net178));
+ sky130_fd_sc_hd__buf_4 repeater1780 (.A(net1781),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1780));
+ sky130_fd_sc_hd__clkbuf_4 repeater1781 (.A(\sram0_dout1[1][23] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1781));
+ sky130_fd_sc_hd__buf_6 repeater1782 (.A(net1783),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1782));
+ sky130_fd_sc_hd__buf_6 repeater1783 (.A(net1784),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1783));
+ sky130_fd_sc_hd__buf_6 repeater1784 (.A(net1785),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1784));
+ sky130_fd_sc_hd__buf_4 repeater1785 (.A(net1786),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1785));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1786 (.A(\sram0_dout1[1][22] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1786));
+ sky130_fd_sc_hd__buf_6 repeater1787 (.A(net1788),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1787));
+ sky130_fd_sc_hd__buf_6 repeater1788 (.A(net1789),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1788));
+ sky130_fd_sc_hd__buf_4 repeater1789 (.A(net1790),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1789));
+ sky130_fd_sc_hd__clkbuf_4 repeater179 (.A(net143),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net179));
+ sky130_fd_sc_hd__clkbuf_4 repeater1790 (.A(net1791),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1790));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1791 (.A(\sram0_dout1[1][21] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1791));
+ sky130_fd_sc_hd__buf_6 repeater1792 (.A(net1793),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1792));
+ sky130_fd_sc_hd__buf_6 repeater1793 (.A(net1794),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1793));
+ sky130_fd_sc_hd__buf_4 repeater1794 (.A(net1795),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1794));
+ sky130_fd_sc_hd__clkbuf_4 repeater1795 (.A(net1796),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1795));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1796 (.A(\sram0_dout1[1][20] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1796));
+ sky130_fd_sc_hd__buf_6 repeater1797 (.A(net1798),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1797));
+ sky130_fd_sc_hd__buf_4 repeater1798 (.A(net1799),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1798));
+ sky130_fd_sc_hd__clkbuf_4 repeater1799 (.A(net1800),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1799));
+ sky130_fd_sc_hd__buf_2 repeater18 (.A(net2031),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2030));
+ sky130_fd_sc_hd__clkbuf_4 repeater180 (.A(net142),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net180));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1800 (.A(\sram0_dout1[1][1] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1800));
+ sky130_fd_sc_hd__buf_6 repeater1801 (.A(net1802),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1801));
+ sky130_fd_sc_hd__buf_6 repeater1802 (.A(net1803),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1802));
+ sky130_fd_sc_hd__buf_4 repeater1803 (.A(net1804),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1803));
+ sky130_fd_sc_hd__clkbuf_4 repeater1804 (.A(net1805),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1804));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1805 (.A(\sram0_dout1[1][19] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1805));
+ sky130_fd_sc_hd__buf_6 repeater1806 (.A(net1807),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1806));
+ sky130_fd_sc_hd__buf_6 repeater1807 (.A(net1808),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1807));
+ sky130_fd_sc_hd__buf_4 repeater1808 (.A(net1809),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1808));
+ sky130_fd_sc_hd__clkbuf_4 repeater1809 (.A(net1810),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1809));
+ sky130_fd_sc_hd__clkbuf_4 repeater181 (.A(net139),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net181));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1810 (.A(\sram0_dout1[1][18] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1810));
+ sky130_fd_sc_hd__buf_6 repeater1811 (.A(net1812),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1811));
+ sky130_fd_sc_hd__buf_6 repeater1812 (.A(net1813),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1812));
+ sky130_fd_sc_hd__buf_4 repeater1813 (.A(net1814),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1813));
+ sky130_fd_sc_hd__clkbuf_4 repeater1814 (.A(net1815),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1814));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1815 (.A(\sram0_dout1[1][17] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1815));
+ sky130_fd_sc_hd__buf_6 repeater1816 (.A(net1817),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1816));
+ sky130_fd_sc_hd__buf_6 repeater1817 (.A(net1818),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1817));
+ sky130_fd_sc_hd__buf_4 repeater1818 (.A(net1819),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1818));
+ sky130_fd_sc_hd__clkbuf_4 repeater1819 (.A(net1820),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1819));
+ sky130_fd_sc_hd__clkbuf_4 repeater182 (.A(net128),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net182));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1820 (.A(\sram0_dout1[1][16] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1820));
+ sky130_fd_sc_hd__buf_6 repeater1821 (.A(net1822),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1821));
+ sky130_fd_sc_hd__buf_6 repeater1822 (.A(net1823),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1822));
+ sky130_fd_sc_hd__buf_4 repeater1823 (.A(net1824),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1823));
+ sky130_fd_sc_hd__clkbuf_4 repeater1824 (.A(net1825),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1824));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater1825 (.A(\sram0_dout1[1][15] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1825));
+ sky130_fd_sc_hd__buf_6 repeater1826 (.A(net1827),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1826));
+ sky130_fd_sc_hd__buf_6 repeater1827 (.A(net1828),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1827));
+ sky130_fd_sc_hd__buf_4 repeater1828 (.A(net1829),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1828));
+ sky130_fd_sc_hd__clkbuf_4 repeater1829 (.A(\sram0_dout1[1][14] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1829));
+ sky130_fd_sc_hd__clkbuf_4 repeater183 (.A(net117),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net183));
+ sky130_fd_sc_hd__buf_6 repeater1830 (.A(net1831),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1830));
+ sky130_fd_sc_hd__buf_6 repeater1831 (.A(net1832),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1831));
+ sky130_fd_sc_hd__buf_4 repeater1832 (.A(net1833),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1832));
+ sky130_fd_sc_hd__clkbuf_4 repeater1833 (.A(\sram0_dout1[1][13] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1833));
+ sky130_fd_sc_hd__buf_6 repeater1834 (.A(net1835),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1834));
+ sky130_fd_sc_hd__buf_6 repeater1835 (.A(net1836),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1835));
+ sky130_fd_sc_hd__buf_4 repeater1836 (.A(net1837),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1836));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1837 (.A(\sram0_dout1[1][12] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1837));
+ sky130_fd_sc_hd__buf_6 repeater1838 (.A(net1839),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1838));
+ sky130_fd_sc_hd__buf_4 repeater1839 (.A(net1840),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1839));
+ sky130_fd_sc_hd__buf_4 repeater184 (.A(net185),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net184));
+ sky130_fd_sc_hd__clkbuf_4 repeater1840 (.A(net1841),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1840));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1841 (.A(\sram0_dout1[1][11] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1841));
+ sky130_fd_sc_hd__buf_6 repeater1842 (.A(net1843),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1842));
+ sky130_fd_sc_hd__buf_4 repeater1843 (.A(net1844),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1843));
+ sky130_fd_sc_hd__clkbuf_4 repeater1844 (.A(net1845),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1844));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1845 (.A(\sram0_dout1[1][10] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1845));
+ sky130_fd_sc_hd__buf_6 repeater1846 (.A(net1847),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1846));
+ sky130_fd_sc_hd__buf_4 repeater1847 (.A(net1848),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1847));
+ sky130_fd_sc_hd__clkbuf_4 repeater1848 (.A(net1849),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1848));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater1849 (.A(\sram0_dout1[1][0] ),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net1849));
+ sky130_fd_sc_hd__buf_4 repeater185 (.A(net186),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net185));
+ sky130_fd_sc_hd__buf_4 repeater186 (.A(net187),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net186));
+ sky130_fd_sc_hd__buf_6 repeater187 (.A(net188),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net187));
+ sky130_fd_sc_hd__buf_6 repeater188 (.A(net189),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net188));
+ sky130_fd_sc_hd__buf_6 repeater189 (.A(net190),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net189));
+ sky130_fd_sc_hd__buf_6 repeater19 (.A(net2032),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2031));
+ sky130_fd_sc_hd__buf_4 repeater190 (.A(net191),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net190));
+ sky130_fd_sc_hd__clkbuf_4 repeater191 (.A(net192),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net191));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater192 (.A(_007_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net192));
+ sky130_fd_sc_hd__clkbuf_4 repeater193 (.A(net194),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net193));
+ sky130_fd_sc_hd__buf_4 repeater194 (.A(net195),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net194));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater195 (.A(_003_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net195));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater196 (.A(_004_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net196));
+ sky130_fd_sc_hd__buf_6 repeater197 (.A(net198),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net197));
+ sky130_fd_sc_hd__buf_4 repeater198 (.A(net199),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net198));
+ sky130_fd_sc_hd__clkbuf_4 repeater199 (.A(net200),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net199));
+ sky130_fd_sc_hd__buf_12 repeater2 (.A(net2015),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2014));
+ sky130_fd_sc_hd__buf_4 repeater20 (.A(net2036),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2032));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater200 (.A(_000_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net200));
+ sky130_fd_sc_hd__clkbuf_4 repeater201 (.A(net202),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net201));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater202 (.A(net141),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net202));
+ sky130_fd_sc_hd__clkbuf_4 repeater203 (.A(net204),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net203));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater204 (.A(net140),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net204));
+ sky130_fd_sc_hd__clkbuf_4 repeater205 (.A(net206),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net205));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater206 (.A(net138),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net206));
+ sky130_fd_sc_hd__clkbuf_4 repeater207 (.A(net208),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net207));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater208 (.A(net137),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net208));
+ sky130_fd_sc_hd__buf_4 repeater209 (.A(net210),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net209));
+ sky130_fd_sc_hd__buf_4 repeater21 (.A(net2034),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2033));
+ sky130_fd_sc_hd__clkbuf_4 repeater210 (.A(net136),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net210));
+ sky130_fd_sc_hd__buf_4 repeater211 (.A(net212),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net211));
+ sky130_fd_sc_hd__clkbuf_4 repeater212 (.A(net135),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net212));
+ sky130_fd_sc_hd__buf_4 repeater213 (.A(net214),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net213));
+ sky130_fd_sc_hd__clkbuf_4 repeater214 (.A(net134),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net214));
+ sky130_fd_sc_hd__buf_4 repeater215 (.A(net216),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net215));
+ sky130_fd_sc_hd__clkbuf_4 repeater216 (.A(net133),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net216));
+ sky130_fd_sc_hd__buf_4 repeater217 (.A(net218),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net217));
+ sky130_fd_sc_hd__clkbuf_4 repeater218 (.A(net132),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net218));
+ sky130_fd_sc_hd__buf_4 repeater219 (.A(net220),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net219));
+ sky130_fd_sc_hd__buf_2 repeater22 (.A(clknet_1_1_3_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2034));
+ sky130_fd_sc_hd__clkbuf_4 repeater220 (.A(net131),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net220));
+ sky130_fd_sc_hd__buf_4 repeater221 (.A(net222),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net221));
+ sky130_fd_sc_hd__clkbuf_4 repeater222 (.A(net130),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net222));
+ sky130_fd_sc_hd__buf_4 repeater223 (.A(net224),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net223));
+ sky130_fd_sc_hd__clkbuf_4 repeater224 (.A(net129),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net224));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater225 (.A(_008_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net225));
+ sky130_fd_sc_hd__buf_6 repeater226 (.A(net227),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net226));
+ sky130_fd_sc_hd__buf_4 repeater227 (.A(net228),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net227));
+ sky130_fd_sc_hd__clkbuf_4 repeater228 (.A(net229),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net228));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater229 (.A(net62),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net229));
+ sky130_fd_sc_hd__clkbuf_2 repeater23 (.A(clknet_1_1_3_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2035));
+ sky130_fd_sc_hd__buf_6 repeater230 (.A(net231),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net230));
+ sky130_fd_sc_hd__buf_4 repeater231 (.A(net232),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net231));
+ sky130_fd_sc_hd__clkbuf_4 repeater232 (.A(net233),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net232));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater233 (.A(net61),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net233));
+ sky130_fd_sc_hd__buf_6 repeater234 (.A(net235),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net234));
+ sky130_fd_sc_hd__buf_4 repeater235 (.A(net236),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net235));
+ sky130_fd_sc_hd__clkbuf_4 repeater236 (.A(net237),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net236));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater237 (.A(net60),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net237));
+ sky130_fd_sc_hd__buf_6 repeater238 (.A(net239),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net238));
+ sky130_fd_sc_hd__buf_6 repeater239 (.A(net240),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net239));
+ sky130_fd_sc_hd__clkbuf_2 repeater24 (.A(clknet_1_1_3_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2036));
+ sky130_fd_sc_hd__buf_4 repeater240 (.A(net241),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net240));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater241 (.A(net59),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net241));
+ sky130_fd_sc_hd__buf_6 repeater242 (.A(net243),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net242));
+ sky130_fd_sc_hd__buf_6 repeater243 (.A(net244),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net243));
+ sky130_fd_sc_hd__buf_4 repeater244 (.A(net245),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net244));
+ sky130_fd_sc_hd__clkbuf_4 repeater245 (.A(net58),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net245));
+ sky130_fd_sc_hd__buf_6 repeater246 (.A(net247),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net246));
+ sky130_fd_sc_hd__buf_4 repeater247 (.A(net248),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net247));
+ sky130_fd_sc_hd__clkbuf_4 repeater248 (.A(net249),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net248));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater249 (.A(net57),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net249));
+ sky130_fd_sc_hd__buf_6 repeater250 (.A(net251),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net250));
+ sky130_fd_sc_hd__buf_4 repeater251 (.A(net252),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net251));
+ sky130_fd_sc_hd__clkbuf_4 repeater252 (.A(net253),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net252));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater253 (.A(net56),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net253));
+ sky130_fd_sc_hd__buf_6 repeater254 (.A(net255),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net254));
+ sky130_fd_sc_hd__buf_6 repeater255 (.A(net256),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net255));
+ sky130_fd_sc_hd__buf_4 repeater256 (.A(net257),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net256));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater257 (.A(net55),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net257));
+ sky130_fd_sc_hd__buf_6 repeater258 (.A(net259),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net258));
+ sky130_fd_sc_hd__buf_6 repeater259 (.A(net260),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net259));
+ sky130_fd_sc_hd__buf_4 repeater260 (.A(net261),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net260));
+ sky130_fd_sc_hd__clkbuf_4 repeater261 (.A(net54),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net261));
+ sky130_fd_sc_hd__buf_6 repeater262 (.A(net263),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net262));
+ sky130_fd_sc_hd__buf_6 repeater263 (.A(net264),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net263));
+ sky130_fd_sc_hd__buf_4 repeater264 (.A(net265),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net264));
+ sky130_fd_sc_hd__clkbuf_4 repeater265 (.A(net53),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net265));
+ sky130_fd_sc_hd__buf_6 repeater266 (.A(net267),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net266));
+ sky130_fd_sc_hd__buf_6 repeater267 (.A(net268),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net267));
+ sky130_fd_sc_hd__buf_4 repeater268 (.A(net269),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net268));
+ sky130_fd_sc_hd__clkbuf_4 repeater269 (.A(net115),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net269));
+ sky130_fd_sc_hd__buf_6 repeater270 (.A(net271),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net270));
+ sky130_fd_sc_hd__buf_6 repeater271 (.A(net272),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net271));
+ sky130_fd_sc_hd__buf_4 repeater272 (.A(net273),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net272));
+ sky130_fd_sc_hd__clkbuf_4 repeater273 (.A(net114),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net273));
+ sky130_fd_sc_hd__buf_6 repeater274 (.A(net275),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net274));
+ sky130_fd_sc_hd__buf_6 repeater275 (.A(net276),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net275));
+ sky130_fd_sc_hd__buf_4 repeater276 (.A(net277),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net276));
+ sky130_fd_sc_hd__clkbuf_4 repeater277 (.A(net278),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net277));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater278 (.A(net113),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net278));
+ sky130_fd_sc_hd__buf_6 repeater279 (.A(net280),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net279));
+ sky130_fd_sc_hd__buf_6 repeater280 (.A(net281),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net280));
+ sky130_fd_sc_hd__buf_4 repeater281 (.A(net282),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net281));
+ sky130_fd_sc_hd__clkbuf_4 repeater282 (.A(net283),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net282));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater283 (.A(net112),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net283));
+ sky130_fd_sc_hd__buf_6 repeater284 (.A(net285),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net284));
+ sky130_fd_sc_hd__buf_6 repeater285 (.A(net286),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net285));
+ sky130_fd_sc_hd__buf_6 repeater286 (.A(net287),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net286));
+ sky130_fd_sc_hd__buf_4 repeater287 (.A(net288),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net287));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater288 (.A(net107),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net288));
+ sky130_fd_sc_hd__buf_6 repeater289 (.A(net290),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net289));
+ sky130_fd_sc_hd__buf_6 repeater290 (.A(net291),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net290));
+ sky130_fd_sc_hd__buf_6 repeater291 (.A(net292),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net291));
+ sky130_fd_sc_hd__buf_4 repeater292 (.A(net293),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net292));
+ sky130_fd_sc_hd__clkbuf_4 repeater293 (.A(net96),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net293));
+ sky130_fd_sc_hd__buf_6 repeater294 (.A(net295),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net294));
+ sky130_fd_sc_hd__buf_6 repeater295 (.A(net296),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net295));
+ sky130_fd_sc_hd__buf_6 repeater296 (.A(net297),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net296));
+ sky130_fd_sc_hd__buf_4 repeater297 (.A(net298),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net297));
+ sky130_fd_sc_hd__clkbuf_4 repeater298 (.A(net85),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net298));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater299 (.A(net300),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net299));
+ sky130_fd_sc_hd__buf_6 repeater3 (.A(net2016),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2015));
+ sky130_fd_sc_hd__buf_6 repeater300 (.A(net301),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net300));
+ sky130_fd_sc_hd__buf_6 repeater301 (.A(net302),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net301));
+ sky130_fd_sc_hd__buf_4 repeater302 (.A(net303),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net302));
+ sky130_fd_sc_hd__clkbuf_4 repeater303 (.A(net74),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net303));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater304 (.A(net305),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net304));
+ sky130_fd_sc_hd__buf_6 repeater305 (.A(net306),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net305));
+ sky130_fd_sc_hd__buf_6 repeater306 (.A(net307),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net306));
+ sky130_fd_sc_hd__buf_4 repeater307 (.A(net308),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net307));
+ sky130_fd_sc_hd__clkbuf_4 repeater308 (.A(net309),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net308));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater309 (.A(net63),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net309));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater310 (.A(net311),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net310));
+ sky130_fd_sc_hd__buf_6 repeater311 (.A(net312),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net311));
+ sky130_fd_sc_hd__buf_6 repeater312 (.A(net313),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net312));
+ sky130_fd_sc_hd__buf_4 repeater313 (.A(net314),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net313));
+ sky130_fd_sc_hd__clkbuf_4 repeater314 (.A(net315),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net314));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater315 (.A(net52),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net315));
+ sky130_fd_sc_hd__buf_6 repeater316 (.A(net317),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net316));
+ sky130_fd_sc_hd__buf_4 repeater317 (.A(net318),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net317));
+ sky130_fd_sc_hd__clkbuf_4 repeater318 (.A(net319),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net318));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater319 (.A(_006_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net319));
+ sky130_fd_sc_hd__clkbuf_4 repeater320 (.A(net321),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net320));
+ sky130_fd_sc_hd__clkbuf_4 repeater321 (.A(net322),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net321));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater322 (.A(_002_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net322));
+ sky130_fd_sc_hd__buf_4 repeater323 (.A(net324),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net323));
+ sky130_fd_sc_hd__buf_6 repeater324 (.A(net325),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net324));
+ sky130_fd_sc_hd__buf_6 repeater325 (.A(net326),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net325));
+ sky130_fd_sc_hd__buf_6 repeater326 (.A(net327),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net326));
+ sky130_fd_sc_hd__buf_4 repeater327 (.A(net328),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net327));
+ sky130_fd_sc_hd__clkbuf_4 repeater328 (.A(net329),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net328));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater329 (.A(_005_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net329));
+ sky130_fd_sc_hd__buf_6 repeater330 (.A(net331),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net330));
+ sky130_fd_sc_hd__buf_6 repeater331 (.A(net332),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net331));
+ sky130_fd_sc_hd__buf_4 repeater332 (.A(net333),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net332));
+ sky130_fd_sc_hd__clkbuf_4 repeater333 (.A(net334),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net333));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater334 (.A(_001_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net334));
+ sky130_fd_sc_hd__buf_6 repeater335 (.A(net336),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net335));
+ sky130_fd_sc_hd__buf_6 repeater336 (.A(net337),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net336));
+ sky130_fd_sc_hd__buf_4 repeater337 (.A(net338),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net337));
+ sky130_fd_sc_hd__clkbuf_4 repeater338 (.A(net76),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net338));
+ sky130_fd_sc_hd__buf_6 repeater339 (.A(net340),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net339));
+ sky130_fd_sc_hd__buf_6 repeater340 (.A(net341),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net340));
+ sky130_fd_sc_hd__buf_4 repeater341 (.A(net342),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net341));
+ sky130_fd_sc_hd__clkbuf_4 repeater342 (.A(net75),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net342));
+ sky130_fd_sc_hd__buf_6 repeater343 (.A(net344),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net343));
+ sky130_fd_sc_hd__buf_6 repeater344 (.A(net345),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net344));
+ sky130_fd_sc_hd__buf_4 repeater345 (.A(net346),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net345));
+ sky130_fd_sc_hd__clkbuf_4 repeater346 (.A(net73),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net346));
+ sky130_fd_sc_hd__buf_6 repeater347 (.A(net348),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net347));
+ sky130_fd_sc_hd__buf_6 repeater348 (.A(net349),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net348));
+ sky130_fd_sc_hd__buf_4 repeater349 (.A(net350),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net349));
+ sky130_fd_sc_hd__clkbuf_4 repeater350 (.A(net72),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net350));
+ sky130_fd_sc_hd__buf_6 repeater351 (.A(net352),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net351));
+ sky130_fd_sc_hd__buf_6 repeater352 (.A(net353),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net352));
+ sky130_fd_sc_hd__buf_4 repeater353 (.A(net354),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net353));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater354 (.A(net71),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net354));
+ sky130_fd_sc_hd__buf_6 repeater355 (.A(net356),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net355));
+ sky130_fd_sc_hd__buf_4 repeater356 (.A(net357),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net356));
+ sky130_fd_sc_hd__clkbuf_4 repeater357 (.A(net358),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net357));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater358 (.A(net70),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net358));
+ sky130_fd_sc_hd__buf_6 repeater359 (.A(net360),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net359));
+ sky130_fd_sc_hd__buf_4 repeater360 (.A(net361),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net360));
+ sky130_fd_sc_hd__clkbuf_4 repeater361 (.A(net362),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net361));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater362 (.A(net69),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net362));
+ sky130_fd_sc_hd__buf_6 repeater363 (.A(net364),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net363));
+ sky130_fd_sc_hd__buf_4 repeater364 (.A(net365),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net364));
+ sky130_fd_sc_hd__clkbuf_4 repeater365 (.A(net366),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net365));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater366 (.A(net68),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net366));
+ sky130_fd_sc_hd__buf_6 repeater367 (.A(net368),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net367));
+ sky130_fd_sc_hd__buf_4 repeater368 (.A(net369),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net368));
+ sky130_fd_sc_hd__clkbuf_4 repeater369 (.A(net370),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net369));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater370 (.A(net67),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net370));
+ sky130_fd_sc_hd__buf_6 repeater371 (.A(net372),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net371));
+ sky130_fd_sc_hd__buf_4 repeater372 (.A(net373),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net372));
+ sky130_fd_sc_hd__clkbuf_4 repeater373 (.A(net374),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net373));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater374 (.A(net66),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net374));
+ sky130_fd_sc_hd__buf_6 repeater375 (.A(net376),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net375));
+ sky130_fd_sc_hd__buf_4 repeater376 (.A(net377),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net376));
+ sky130_fd_sc_hd__clkbuf_4 repeater377 (.A(net378),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net377));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater378 (.A(net65),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net378));
+ sky130_fd_sc_hd__buf_6 repeater379 (.A(net380),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net379));
+ sky130_fd_sc_hd__buf_4 repeater380 (.A(net381),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net380));
+ sky130_fd_sc_hd__clkbuf_4 repeater381 (.A(net382),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net381));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater382 (.A(net64),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net382));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater383 (.A(_074_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net383));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater384 (.A(_072_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net384));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater385 (.A(_069_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net385));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater386 (.A(_064_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net386));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater387 (.A(_061_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net387));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater388 (.A(_059_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net388));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater389 (.A(_057_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net389));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater390 (.A(_053_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net390));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater391 (.A(_047_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net391));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater392 (.A(_044_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net392));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater393 (.A(_042_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net393));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater394 (.A(_040_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net394));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater395 (.A(_035_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net395));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater396 (.A(net397),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net396));
+ sky130_fd_sc_hd__buf_4 repeater397 (.A(net398),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net397));
+ sky130_fd_sc_hd__buf_4 repeater398 (.A(net399),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net398));
+ sky130_fd_sc_hd__buf_4 repeater399 (.A(net400),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net399));
+ sky130_fd_sc_hd__clkbuf_16 repeater4 (.A(net2017),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2016));
+ sky130_fd_sc_hd__buf_4 repeater400 (.A(net401),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net400));
+ sky130_fd_sc_hd__buf_6 repeater401 (.A(net402),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net401));
+ sky130_fd_sc_hd__buf_6 repeater402 (.A(net403),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net402));
+ sky130_fd_sc_hd__buf_4 repeater403 (.A(net404),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net403));
+ sky130_fd_sc_hd__clkbuf_4 repeater404 (.A(net405),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net404));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater405 (.A(_010_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net405));
+ sky130_fd_sc_hd__buf_4 repeater406 (.A(net407),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net406));
+ sky130_fd_sc_hd__buf_4 repeater407 (.A(net408),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net407));
+ sky130_fd_sc_hd__buf_4 repeater408 (.A(net409),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net408));
+ sky130_fd_sc_hd__buf_6 repeater409 (.A(net410),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net409));
+ sky130_fd_sc_hd__buf_6 repeater410 (.A(net411),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net410));
+ sky130_fd_sc_hd__buf_6 repeater411 (.A(net412),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net411));
+ sky130_fd_sc_hd__buf_4 repeater412 (.A(net413),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net412));
+ sky130_fd_sc_hd__clkbuf_4 repeater413 (.A(net414),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net413));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater414 (.A(net116),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net414));
+ sky130_fd_sc_hd__clkbuf_4 repeater415 (.A(net416),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net415));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater416 (.A(_037_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net416));
+ sky130_fd_sc_hd__clkbuf_4 repeater417 (.A(_018_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net417));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater418 (.A(_036_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net418));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater419 (.A(_036_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net419));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater420 (.A(_017_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net420));
+ sky130_fd_sc_hd__buf_6 repeater421 (.A(net422),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net421));
+ sky130_fd_sc_hd__buf_6 repeater422 (.A(net423),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net422));
+ sky130_fd_sc_hd__buf_4 repeater423 (.A(net424),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net423));
+ sky130_fd_sc_hd__clkbuf_4 repeater424 (.A(_129_),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net424));
+ sky130_fd_sc_hd__clkbuf_4 repeater425 (.A(net426),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net425));
+ sky130_fd_sc_hd__clkbuf_4 repeater426 (.A(net427),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net426));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater427 (.A(net436),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net427));
+ sky130_fd_sc_hd__clkbuf_4 repeater428 (.A(net429),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net428));
+ sky130_fd_sc_hd__clkbuf_4 repeater429 (.A(net430),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net429));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater430 (.A(net431),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net430));
+ sky130_fd_sc_hd__buf_6 repeater431 (.A(net432),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net431));
+ sky130_fd_sc_hd__buf_6 repeater432 (.A(net433),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net432));
+ sky130_fd_sc_hd__buf_4 repeater433 (.A(net434),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net433));
+ sky130_fd_sc_hd__clkbuf_4 repeater434 (.A(net435),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net434));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater435 (.A(net455),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net435));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater436 (.A(net455),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net436));
+ sky130_fd_sc_hd__clkbuf_4 repeater437 (.A(net438),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net437));
+ sky130_fd_sc_hd__clkbuf_4 repeater438 (.A(net439),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net438));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater439 (.A(net448),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net439));
+ sky130_fd_sc_hd__clkbuf_4 repeater440 (.A(net441),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net440));
+ sky130_fd_sc_hd__clkbuf_4 repeater441 (.A(net442),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net441));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater442 (.A(net443),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net442));
+ sky130_fd_sc_hd__buf_6 repeater443 (.A(net444),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net443));
+ sky130_fd_sc_hd__buf_6 repeater444 (.A(net445),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net444));
+ sky130_fd_sc_hd__buf_4 repeater445 (.A(net446),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net445));
+ sky130_fd_sc_hd__clkbuf_4 repeater446 (.A(net447),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net446));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater447 (.A(net449),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net447));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater448 (.A(net449),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net448));
+ sky130_fd_sc_hd__buf_6 repeater449 (.A(net450),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net449));
+ sky130_fd_sc_hd__buf_6 repeater450 (.A(net451),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net450));
+ sky130_fd_sc_hd__buf_6 repeater451 (.A(net452),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net451));
+ sky130_fd_sc_hd__buf_4 repeater452 (.A(net453),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net452));
+ sky130_fd_sc_hd__clkbuf_4 repeater453 (.A(net454),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net453));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater454 (.A(net455),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net454));
+ sky130_fd_sc_hd__buf_6 repeater455 (.A(net456),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net455));
+ sky130_fd_sc_hd__buf_6 repeater456 (.A(net457),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net456));
+ sky130_fd_sc_hd__buf_4 repeater457 (.A(net458),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net457));
+ sky130_fd_sc_hd__clkbuf_4 repeater458 (.A(net459),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net458));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater459 (.A(net9),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net459));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater460 (.A(net461),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net460));
+ sky130_fd_sc_hd__buf_4 repeater461 (.A(net462),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net461));
+ sky130_fd_sc_hd__buf_4 repeater462 (.A(net463),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net462));
+ sky130_fd_sc_hd__buf_6 repeater463 (.A(net464),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net463));
+ sky130_fd_sc_hd__buf_6 repeater464 (.A(net465),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net464));
+ sky130_fd_sc_hd__buf_6 repeater465 (.A(net466),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net465));
+ sky130_fd_sc_hd__buf_4 repeater466 (.A(net467),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net466));
+ sky130_fd_sc_hd__clkbuf_4 repeater467 (.A(net8),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net467));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater468 (.A(net469),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net468));
+ sky130_fd_sc_hd__buf_4 repeater469 (.A(net470),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net469));
+ sky130_fd_sc_hd__buf_4 repeater470 (.A(net471),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net470));
+ sky130_fd_sc_hd__buf_6 repeater471 (.A(net472),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net471));
+ sky130_fd_sc_hd__buf_6 repeater472 (.A(net473),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net472));
+ sky130_fd_sc_hd__buf_6 repeater473 (.A(net474),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net473));
+ sky130_fd_sc_hd__buf_4 repeater474 (.A(net475),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net474));
+ sky130_fd_sc_hd__clkbuf_4 repeater475 (.A(net476),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net475));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater476 (.A(net7),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net476));
+ sky130_fd_sc_hd__clkbuf_4 repeater477 (.A(net478),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net477));
+ sky130_fd_sc_hd__clkbuf_4 repeater478 (.A(net479),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net478));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater479 (.A(net502),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net479));
+ sky130_fd_sc_hd__clkbuf_4 repeater480 (.A(net481),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net480));
+ sky130_fd_sc_hd__clkbuf_4 repeater481 (.A(net482),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net481));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater482 (.A(net483),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net482));
+ sky130_fd_sc_hd__buf_6 repeater483 (.A(net484),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net483));
+ sky130_fd_sc_hd__buf_4 repeater484 (.A(net485),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net484));
+ sky130_fd_sc_hd__clkbuf_4 repeater485 (.A(net497),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net485));
+ sky130_fd_sc_hd__clkbuf_4 repeater486 (.A(net487),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net486));
+ sky130_fd_sc_hd__clkbuf_4 repeater487 (.A(net488),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net487));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater488 (.A(net489),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net488));
+ sky130_fd_sc_hd__buf_6 repeater489 (.A(net490),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net489));
+ sky130_fd_sc_hd__buf_6 repeater490 (.A(net491),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net490));
+ sky130_fd_sc_hd__buf_4 repeater491 (.A(net492),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net491));
+ sky130_fd_sc_hd__clkbuf_4 repeater492 (.A(net493),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net492));
+ sky130_fd_sc_hd__buf_6 repeater493 (.A(net494),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net493));
+ sky130_fd_sc_hd__buf_4 repeater494 (.A(net495),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net494));
+ sky130_fd_sc_hd__clkbuf_4 repeater495 (.A(net496),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net495));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater496 (.A(net497),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net496));
+ sky130_fd_sc_hd__buf_6 repeater497 (.A(net498),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net497));
+ sky130_fd_sc_hd__buf_6 repeater498 (.A(net499),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net498));
+ sky130_fd_sc_hd__buf_4 repeater499 (.A(net500),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net499));
+ sky130_fd_sc_hd__buf_6 repeater5 (.A(net2018),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2017));
+ sky130_fd_sc_hd__clkbuf_4 repeater500 (.A(net501),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net500));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater501 (.A(net502),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net501));
+ sky130_fd_sc_hd__buf_6 repeater502 (.A(net503),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net502));
+ sky130_fd_sc_hd__buf_6 repeater503 (.A(net504),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net503));
+ sky130_fd_sc_hd__buf_4 repeater504 (.A(net505),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net504));
+ sky130_fd_sc_hd__clkbuf_4 repeater505 (.A(net506),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net505));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater506 (.A(net6),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net506));
+ sky130_fd_sc_hd__clkdlybuf4s18_2 repeater507 (.A(net508),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net507));
+ sky130_fd_sc_hd__buf_4 repeater508 (.A(net509),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net508));
+ sky130_fd_sc_hd__buf_4 repeater509 (.A(net510),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net509));
+ sky130_fd_sc_hd__buf_4 repeater510 (.A(net511),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net510));
+ sky130_fd_sc_hd__buf_4 repeater511 (.A(net512),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net511));
+ sky130_fd_sc_hd__buf_6 repeater512 (.A(net513),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net512));
+ sky130_fd_sc_hd__buf_6 repeater513 (.A(net514),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net513));
+ sky130_fd_sc_hd__buf_4 repeater514 (.A(net515),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net514));
+ sky130_fd_sc_hd__clkbuf_4 repeater515 (.A(net516),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net515));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater516 (.A(net51),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net516));
+ sky130_fd_sc_hd__buf_6 repeater517 (.A(net518),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net517));
+ sky130_fd_sc_hd__buf_6 repeater518 (.A(net519),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net518));
+ sky130_fd_sc_hd__buf_4 repeater519 (.A(net520),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net519));
+ sky130_fd_sc_hd__clkbuf_4 repeater520 (.A(net521),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net520));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater521 (.A(net5),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net521));
+ sky130_fd_sc_hd__clkbuf_4 repeater522 (.A(net523),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net522));
+ sky130_fd_sc_hd__clkbuf_4 repeater523 (.A(net524),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net523));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater524 (.A(net525),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net524));
+ sky130_fd_sc_hd__buf_6 repeater525 (.A(net526),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net525));
+ sky130_fd_sc_hd__buf_6 repeater526 (.A(net527),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net526));
+ sky130_fd_sc_hd__buf_4 repeater527 (.A(net528),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net527));
+ sky130_fd_sc_hd__clkbuf_4 repeater528 (.A(net529),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net528));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater529 (.A(net49),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net529));
+ sky130_fd_sc_hd__clkbuf_4 repeater530 (.A(net531),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net530));
+ sky130_fd_sc_hd__clkbuf_4 repeater531 (.A(net532),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net531));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater532 (.A(net533),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net532));
+ sky130_fd_sc_hd__buf_6 repeater533 (.A(net534),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net533));
+ sky130_fd_sc_hd__buf_6 repeater534 (.A(net535),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net534));
+ sky130_fd_sc_hd__buf_4 repeater535 (.A(net536),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net535));
+ sky130_fd_sc_hd__clkbuf_4 repeater536 (.A(net537),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net536));
+ sky130_fd_sc_hd__buf_4 repeater537 (.A(net538),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net537));
+ sky130_fd_sc_hd__buf_6 repeater538 (.A(net539),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net538));
+ sky130_fd_sc_hd__buf_6 repeater539 (.A(net540),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net539));
+ sky130_fd_sc_hd__buf_6 repeater540 (.A(net541),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net540));
+ sky130_fd_sc_hd__buf_4 repeater541 (.A(net542),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net541));
+ sky130_fd_sc_hd__clkbuf_4 repeater542 (.A(net543),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net542));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater543 (.A(net49),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net543));
+ sky130_fd_sc_hd__clkbuf_4 repeater544 (.A(net545),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net544));
+ sky130_fd_sc_hd__clkbuf_4 repeater545 (.A(net546),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net545));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater546 (.A(net547),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net546));
+ sky130_fd_sc_hd__buf_6 repeater547 (.A(net548),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net547));
+ sky130_fd_sc_hd__buf_6 repeater548 (.A(net549),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net548));
+ sky130_fd_sc_hd__buf_4 repeater549 (.A(net550),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net549));
+ sky130_fd_sc_hd__clkbuf_4 repeater550 (.A(net551),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net550));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater551 (.A(net48),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net551));
+ sky130_fd_sc_hd__clkbuf_4 repeater552 (.A(net553),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net552));
+ sky130_fd_sc_hd__clkbuf_4 repeater553 (.A(net554),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net553));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater554 (.A(net555),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net554));
+ sky130_fd_sc_hd__buf_6 repeater555 (.A(net556),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net555));
+ sky130_fd_sc_hd__buf_6 repeater556 (.A(net557),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net556));
+ sky130_fd_sc_hd__buf_4 repeater557 (.A(net558),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net557));
+ sky130_fd_sc_hd__clkbuf_4 repeater558 (.A(net559),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net558));
+ sky130_fd_sc_hd__buf_4 repeater559 (.A(net560),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net559));
+ sky130_fd_sc_hd__buf_6 repeater560 (.A(net561),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net560));
+ sky130_fd_sc_hd__buf_6 repeater561 (.A(net562),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net561));
+ sky130_fd_sc_hd__buf_6 repeater562 (.A(net563),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net562));
+ sky130_fd_sc_hd__buf_4 repeater563 (.A(net564),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net563));
+ sky130_fd_sc_hd__clkbuf_4 repeater564 (.A(net565),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net564));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater565 (.A(net48),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net565));
+ sky130_fd_sc_hd__clkbuf_4 repeater566 (.A(net567),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net566));
+ sky130_fd_sc_hd__clkbuf_4 repeater567 (.A(net568),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net567));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater568 (.A(net569),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net568));
+ sky130_fd_sc_hd__buf_6 repeater569 (.A(net570),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net569));
+ sky130_fd_sc_hd__buf_6 repeater570 (.A(net571),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net570));
+ sky130_fd_sc_hd__buf_4 repeater571 (.A(net572),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net571));
+ sky130_fd_sc_hd__clkbuf_4 repeater572 (.A(net573),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net572));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater573 (.A(net47),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net573));
+ sky130_fd_sc_hd__clkbuf_4 repeater574 (.A(net575),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net574));
+ sky130_fd_sc_hd__clkbuf_4 repeater575 (.A(net576),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net575));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater576 (.A(net577),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net576));
+ sky130_fd_sc_hd__buf_6 repeater577 (.A(net578),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net577));
+ sky130_fd_sc_hd__buf_6 repeater578 (.A(net579),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net578));
+ sky130_fd_sc_hd__buf_4 repeater579 (.A(net580),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net579));
+ sky130_fd_sc_hd__clkbuf_4 repeater580 (.A(net581),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net580));
+ sky130_fd_sc_hd__buf_4 repeater581 (.A(net582),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net581));
+ sky130_fd_sc_hd__buf_6 repeater582 (.A(net583),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net582));
+ sky130_fd_sc_hd__buf_6 repeater583 (.A(net584),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net583));
+ sky130_fd_sc_hd__buf_6 repeater584 (.A(net585),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net584));
+ sky130_fd_sc_hd__buf_4 repeater585 (.A(net586),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net585));
+ sky130_fd_sc_hd__clkbuf_4 repeater586 (.A(net587),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net586));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater587 (.A(net47),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net587));
+ sky130_fd_sc_hd__clkbuf_4 repeater588 (.A(net589),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net588));
+ sky130_fd_sc_hd__clkbuf_4 repeater589 (.A(net590),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net589));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater590 (.A(net591),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net590));
+ sky130_fd_sc_hd__buf_6 repeater591 (.A(net592),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net591));
+ sky130_fd_sc_hd__buf_6 repeater592 (.A(net593),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net592));
+ sky130_fd_sc_hd__buf_4 repeater593 (.A(net594),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net593));
+ sky130_fd_sc_hd__clkbuf_4 repeater594 (.A(net595),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net594));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater595 (.A(net46),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net595));
+ sky130_fd_sc_hd__clkbuf_4 repeater596 (.A(net597),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net596));
+ sky130_fd_sc_hd__clkbuf_4 repeater597 (.A(net598),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net597));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater598 (.A(net599),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net598));
+ sky130_fd_sc_hd__buf_6 repeater599 (.A(net600),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net599));
+ sky130_fd_sc_hd__buf_4 repeater6 (.A(net2019),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2018));
+ sky130_fd_sc_hd__buf_6 repeater600 (.A(net601),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net600));
+ sky130_fd_sc_hd__buf_4 repeater601 (.A(net602),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net601));
+ sky130_fd_sc_hd__clkbuf_4 repeater602 (.A(net603),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net602));
+ sky130_fd_sc_hd__buf_4 repeater603 (.A(net604),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net603));
+ sky130_fd_sc_hd__buf_6 repeater604 (.A(net605),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net604));
+ sky130_fd_sc_hd__buf_6 repeater605 (.A(net606),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net605));
+ sky130_fd_sc_hd__buf_6 repeater606 (.A(net607),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net606));
+ sky130_fd_sc_hd__buf_4 repeater607 (.A(net608),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net607));
+ sky130_fd_sc_hd__clkbuf_4 repeater608 (.A(net609),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net608));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater609 (.A(net46),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net609));
+ sky130_fd_sc_hd__clkbuf_4 repeater610 (.A(net611),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net610));
+ sky130_fd_sc_hd__clkbuf_4 repeater611 (.A(net612),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net611));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater612 (.A(net613),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net612));
+ sky130_fd_sc_hd__buf_6 repeater613 (.A(net614),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net613));
+ sky130_fd_sc_hd__buf_6 repeater614 (.A(net615),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net614));
+ sky130_fd_sc_hd__buf_4 repeater615 (.A(net616),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net615));
+ sky130_fd_sc_hd__clkbuf_4 repeater616 (.A(net617),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net616));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater617 (.A(net45),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net617));
+ sky130_fd_sc_hd__clkbuf_4 repeater618 (.A(net619),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net618));
+ sky130_fd_sc_hd__clkbuf_4 repeater619 (.A(net620),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net619));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater620 (.A(net621),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net620));
+ sky130_fd_sc_hd__buf_6 repeater621 (.A(net622),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net621));
+ sky130_fd_sc_hd__buf_6 repeater622 (.A(net623),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net622));
+ sky130_fd_sc_hd__buf_4 repeater623 (.A(net624),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net623));
+ sky130_fd_sc_hd__clkbuf_4 repeater624 (.A(net625),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net624));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater625 (.A(net626),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net625));
+ sky130_fd_sc_hd__buf_6 repeater626 (.A(net627),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net626));
+ sky130_fd_sc_hd__buf_6 repeater627 (.A(net628),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net627));
+ sky130_fd_sc_hd__buf_6 repeater628 (.A(net629),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net628));
+ sky130_fd_sc_hd__buf_4 repeater629 (.A(net630),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net629));
+ sky130_fd_sc_hd__clkbuf_4 repeater630 (.A(net631),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net630));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater631 (.A(net45),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net631));
+ sky130_fd_sc_hd__clkbuf_4 repeater632 (.A(net633),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net632));
+ sky130_fd_sc_hd__clkbuf_4 repeater633 (.A(net634),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net633));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater634 (.A(net635),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net634));
+ sky130_fd_sc_hd__buf_6 repeater635 (.A(net636),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net635));
+ sky130_fd_sc_hd__buf_6 repeater636 (.A(net637),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net636));
+ sky130_fd_sc_hd__buf_4 repeater637 (.A(net638),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net637));
+ sky130_fd_sc_hd__clkbuf_4 repeater638 (.A(net639),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net638));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater639 (.A(net44),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net639));
+ sky130_fd_sc_hd__clkbuf_4 repeater640 (.A(net641),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net640));
+ sky130_fd_sc_hd__clkbuf_4 repeater641 (.A(net642),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net641));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater642 (.A(net643),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net642));
+ sky130_fd_sc_hd__buf_6 repeater643 (.A(net644),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net643));
+ sky130_fd_sc_hd__buf_6 repeater644 (.A(net645),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net644));
+ sky130_fd_sc_hd__buf_4 repeater645 (.A(net646),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net645));
+ sky130_fd_sc_hd__clkbuf_4 repeater646 (.A(net647),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net646));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater647 (.A(net648),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net647));
+ sky130_fd_sc_hd__buf_6 repeater648 (.A(net649),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net648));
+ sky130_fd_sc_hd__buf_6 repeater649 (.A(net650),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net649));
+ sky130_fd_sc_hd__buf_6 repeater650 (.A(net651),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net650));
+ sky130_fd_sc_hd__buf_4 repeater651 (.A(net652),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net651));
+ sky130_fd_sc_hd__clkbuf_4 repeater652 (.A(net653),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net652));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater653 (.A(net44),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net653));
+ sky130_fd_sc_hd__clkbuf_4 repeater654 (.A(net655),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net654));
+ sky130_fd_sc_hd__clkbuf_4 repeater655 (.A(net656),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net655));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater656 (.A(net657),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net656));
+ sky130_fd_sc_hd__buf_6 repeater657 (.A(net658),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net657));
+ sky130_fd_sc_hd__buf_6 repeater658 (.A(net659),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net658));
+ sky130_fd_sc_hd__buf_6 repeater659 (.A(net660),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net659));
+ sky130_fd_sc_hd__buf_4 repeater660 (.A(net661),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net660));
+ sky130_fd_sc_hd__clkbuf_4 repeater661 (.A(net43),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net661));
+ sky130_fd_sc_hd__clkbuf_4 repeater662 (.A(net663),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net662));
+ sky130_fd_sc_hd__clkbuf_4 repeater663 (.A(net664),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net663));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater664 (.A(net665),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net664));
+ sky130_fd_sc_hd__buf_6 repeater665 (.A(net666),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net665));
+ sky130_fd_sc_hd__buf_6 repeater666 (.A(net667),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net666));
+ sky130_fd_sc_hd__buf_4 repeater667 (.A(net668),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net667));
+ sky130_fd_sc_hd__clkbuf_4 repeater668 (.A(net669),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net668));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater669 (.A(net670),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net669));
+ sky130_fd_sc_hd__buf_6 repeater670 (.A(net671),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net670));
+ sky130_fd_sc_hd__buf_6 repeater671 (.A(net672),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net671));
+ sky130_fd_sc_hd__buf_6 repeater672 (.A(net673),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net672));
+ sky130_fd_sc_hd__buf_4 repeater673 (.A(net674),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net673));
+ sky130_fd_sc_hd__clkbuf_4 repeater674 (.A(net675),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net674));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater675 (.A(net43),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net675));
+ sky130_fd_sc_hd__clkbuf_4 repeater676 (.A(net677),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net676));
+ sky130_fd_sc_hd__clkbuf_4 repeater677 (.A(net678),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net677));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater678 (.A(net679),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net678));
+ sky130_fd_sc_hd__buf_6 repeater679 (.A(net680),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net679));
+ sky130_fd_sc_hd__buf_4 repeater680 (.A(net681),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net680));
+ sky130_fd_sc_hd__clkbuf_4 repeater681 (.A(net694),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net681));
+ sky130_fd_sc_hd__clkbuf_4 repeater682 (.A(net683),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net682));
+ sky130_fd_sc_hd__clkbuf_4 repeater683 (.A(net684),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net683));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater684 (.A(net685),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net684));
+ sky130_fd_sc_hd__buf_4 repeater685 (.A(net686),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net685));
+ sky130_fd_sc_hd__clkbuf_4 repeater686 (.A(net687),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net686));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater687 (.A(net688),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net687));
+ sky130_fd_sc_hd__buf_4 repeater688 (.A(net689),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net688));
+ sky130_fd_sc_hd__buf_6 repeater689 (.A(net690),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net689));
+ sky130_fd_sc_hd__buf_6 repeater690 (.A(net691),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net690));
+ sky130_fd_sc_hd__buf_4 repeater691 (.A(net692),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net691));
+ sky130_fd_sc_hd__clkbuf_4 repeater692 (.A(net693),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net692));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater693 (.A(net42),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net693));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater694 (.A(net42),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net694));
+ sky130_fd_sc_hd__clkbuf_4 repeater695 (.A(net696),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net695));
+ sky130_fd_sc_hd__clkbuf_4 repeater696 (.A(net697),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net696));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater697 (.A(net698),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net697));
+ sky130_fd_sc_hd__buf_6 repeater698 (.A(net699),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net698));
+ sky130_fd_sc_hd__buf_4 repeater699 (.A(net700),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net699));
+ sky130_fd_sc_hd__buf_2 repeater7 (.A(clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2019));
+ sky130_fd_sc_hd__clkbuf_4 repeater700 (.A(net713),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net700));
+ sky130_fd_sc_hd__clkbuf_4 repeater701 (.A(net702),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net701));
+ sky130_fd_sc_hd__clkbuf_4 repeater702 (.A(net703),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net702));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater703 (.A(net704),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net703));
+ sky130_fd_sc_hd__buf_4 repeater704 (.A(net705),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net704));
+ sky130_fd_sc_hd__clkbuf_4 repeater705 (.A(net706),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net705));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater706 (.A(net707),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net706));
+ sky130_fd_sc_hd__buf_4 repeater707 (.A(net708),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net707));
+ sky130_fd_sc_hd__buf_6 repeater708 (.A(net709),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net708));
+ sky130_fd_sc_hd__buf_6 repeater709 (.A(net710),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net709));
+ sky130_fd_sc_hd__buf_4 repeater710 (.A(net711),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net710));
+ sky130_fd_sc_hd__clkbuf_4 repeater711 (.A(net712),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net711));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater712 (.A(net41),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net712));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater713 (.A(net41),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net713));
+ sky130_fd_sc_hd__clkbuf_4 repeater714 (.A(net715),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net714));
+ sky130_fd_sc_hd__clkbuf_4 repeater715 (.A(net716),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net715));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater716 (.A(net717),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net716));
+ sky130_fd_sc_hd__buf_6 repeater717 (.A(net718),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net717));
+ sky130_fd_sc_hd__buf_6 repeater718 (.A(net719),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net718));
+ sky130_fd_sc_hd__buf_6 repeater719 (.A(net720),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net719));
+ sky130_fd_sc_hd__buf_4 repeater720 (.A(net721),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net720));
+ sky130_fd_sc_hd__clkbuf_4 repeater721 (.A(net736),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net721));
+ sky130_fd_sc_hd__clkbuf_4 repeater722 (.A(net723),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net722));
+ sky130_fd_sc_hd__clkbuf_4 repeater723 (.A(net724),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net723));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater724 (.A(net725),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net724));
+ sky130_fd_sc_hd__buf_6 repeater725 (.A(net726),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net725));
+ sky130_fd_sc_hd__buf_6 repeater726 (.A(net727),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net726));
+ sky130_fd_sc_hd__buf_4 repeater727 (.A(net728),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net727));
+ sky130_fd_sc_hd__clkbuf_4 repeater728 (.A(net729),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net728));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater729 (.A(net730),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net729));
+ sky130_fd_sc_hd__buf_4 repeater730 (.A(net731),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net730));
+ sky130_fd_sc_hd__buf_6 repeater731 (.A(net732),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net731));
+ sky130_fd_sc_hd__buf_6 repeater732 (.A(net733),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net732));
+ sky130_fd_sc_hd__buf_4 repeater733 (.A(net734),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net733));
+ sky130_fd_sc_hd__clkbuf_4 repeater734 (.A(net735),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net734));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater735 (.A(net40),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net735));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater736 (.A(net40),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net736));
+ sky130_fd_sc_hd__buf_6 repeater737 (.A(net738),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net737));
+ sky130_fd_sc_hd__buf_4 repeater738 (.A(net739),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net738));
+ sky130_fd_sc_hd__clkbuf_4 repeater739 (.A(net4),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net739));
+ sky130_fd_sc_hd__clkbuf_4 repeater740 (.A(net741),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net740));
+ sky130_fd_sc_hd__clkbuf_4 repeater741 (.A(net742),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net741));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater742 (.A(net743),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net742));
+ sky130_fd_sc_hd__buf_6 repeater743 (.A(net744),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net743));
+ sky130_fd_sc_hd__buf_4 repeater744 (.A(net745),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net744));
+ sky130_fd_sc_hd__clkbuf_4 repeater745 (.A(net746),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net745));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater746 (.A(net39),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net746));
+ sky130_fd_sc_hd__clkbuf_4 repeater747 (.A(net748),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net747));
+ sky130_fd_sc_hd__clkbuf_4 repeater748 (.A(net749),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net748));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater749 (.A(net750),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net749));
+ sky130_fd_sc_hd__buf_4 repeater750 (.A(net751),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net750));
+ sky130_fd_sc_hd__clkbuf_4 repeater751 (.A(net752),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net751));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater752 (.A(net753),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net752));
+ sky130_fd_sc_hd__buf_4 repeater753 (.A(net754),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net753));
+ sky130_fd_sc_hd__buf_6 repeater754 (.A(net755),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net754));
+ sky130_fd_sc_hd__buf_6 repeater755 (.A(net756),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net755));
+ sky130_fd_sc_hd__buf_4 repeater756 (.A(net757),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net756));
+ sky130_fd_sc_hd__clkbuf_4 repeater757 (.A(net758),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net757));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater758 (.A(net39),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net758));
+ sky130_fd_sc_hd__clkbuf_4 repeater759 (.A(net760),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net759));
+ sky130_fd_sc_hd__clkbuf_4 repeater760 (.A(net761),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net760));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater761 (.A(net762),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net761));
+ sky130_fd_sc_hd__buf_6 repeater762 (.A(net763),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net762));
+ sky130_fd_sc_hd__buf_4 repeater763 (.A(net764),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net763));
+ sky130_fd_sc_hd__clkbuf_4 repeater764 (.A(net765),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net764));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater765 (.A(net38),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net765));
+ sky130_fd_sc_hd__clkbuf_4 repeater766 (.A(net767),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net766));
+ sky130_fd_sc_hd__clkbuf_4 repeater767 (.A(net768),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net767));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater768 (.A(net769),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net768));
+ sky130_fd_sc_hd__buf_4 repeater769 (.A(net770),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net769));
+ sky130_fd_sc_hd__clkbuf_4 repeater770 (.A(net771),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net770));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater771 (.A(net772),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net771));
+ sky130_fd_sc_hd__buf_4 repeater772 (.A(net773),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net772));
+ sky130_fd_sc_hd__buf_6 repeater773 (.A(net774),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net773));
+ sky130_fd_sc_hd__buf_6 repeater774 (.A(net775),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net774));
+ sky130_fd_sc_hd__buf_4 repeater775 (.A(net776),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net775));
+ sky130_fd_sc_hd__clkbuf_4 repeater776 (.A(net777),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net776));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater777 (.A(net38),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net777));
+ sky130_fd_sc_hd__clkbuf_4 repeater778 (.A(net779),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net778));
+ sky130_fd_sc_hd__clkbuf_4 repeater779 (.A(net780),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net779));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater780 (.A(net781),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net780));
+ sky130_fd_sc_hd__buf_6 repeater781 (.A(net782),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net781));
+ sky130_fd_sc_hd__buf_4 repeater782 (.A(net783),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net782));
+ sky130_fd_sc_hd__clkbuf_4 repeater783 (.A(net784),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net783));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater784 (.A(net37),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net784));
+ sky130_fd_sc_hd__clkbuf_4 repeater785 (.A(net786),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net785));
+ sky130_fd_sc_hd__clkbuf_4 repeater786 (.A(net787),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net786));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater787 (.A(net788),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net787));
+ sky130_fd_sc_hd__buf_4 repeater788 (.A(net789),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net788));
+ sky130_fd_sc_hd__buf_4 repeater789 (.A(net790),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net789));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater790 (.A(net791),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net790));
+ sky130_fd_sc_hd__buf_4 repeater791 (.A(net792),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net791));
+ sky130_fd_sc_hd__buf_6 repeater792 (.A(net793),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net792));
+ sky130_fd_sc_hd__buf_6 repeater793 (.A(net794),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net793));
+ sky130_fd_sc_hd__buf_4 repeater794 (.A(net795),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net794));
+ sky130_fd_sc_hd__buf_4 repeater795 (.A(net796),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net795));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater796 (.A(net37),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net796));
+ sky130_fd_sc_hd__clkbuf_4 repeater797 (.A(net798),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net797));
+ sky130_fd_sc_hd__clkbuf_4 repeater798 (.A(net799),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net798));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater799 (.A(net800),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net799));
+ sky130_fd_sc_hd__buf_4 repeater8 (.A(net2021),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2020));
+ sky130_fd_sc_hd__buf_6 repeater800 (.A(net801),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net800));
+ sky130_fd_sc_hd__buf_4 repeater801 (.A(net802),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net801));
+ sky130_fd_sc_hd__clkbuf_4 repeater802 (.A(net803),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net802));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater803 (.A(net36),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net803));
+ sky130_fd_sc_hd__clkbuf_4 repeater804 (.A(net805),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net804));
+ sky130_fd_sc_hd__clkbuf_4 repeater805 (.A(net806),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net805));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater806 (.A(net807),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net806));
+ sky130_fd_sc_hd__buf_4 repeater807 (.A(net808),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net807));
+ sky130_fd_sc_hd__buf_4 repeater808 (.A(net809),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net808));
+ sky130_fd_sc_hd__clkbuf_4 repeater809 (.A(net810),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net809));
+ sky130_fd_sc_hd__buf_4 repeater810 (.A(net811),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net810));
+ sky130_fd_sc_hd__buf_6 repeater811 (.A(net812),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net811));
+ sky130_fd_sc_hd__buf_6 repeater812 (.A(net813),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net812));
+ sky130_fd_sc_hd__buf_6 repeater813 (.A(net814),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net813));
+ sky130_fd_sc_hd__buf_4 repeater814 (.A(net815),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net814));
+ sky130_fd_sc_hd__clkbuf_4 repeater815 (.A(net36),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net815));
+ sky130_fd_sc_hd__clkbuf_4 repeater816 (.A(net817),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net816));
+ sky130_fd_sc_hd__clkbuf_4 repeater817 (.A(net818),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net817));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater818 (.A(net819),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net818));
+ sky130_fd_sc_hd__buf_6 repeater819 (.A(net820),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net819));
+ sky130_fd_sc_hd__buf_4 repeater820 (.A(net821),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net820));
+ sky130_fd_sc_hd__clkbuf_4 repeater821 (.A(net822),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net821));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater822 (.A(net35),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net822));
+ sky130_fd_sc_hd__clkbuf_4 repeater823 (.A(net824),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net823));
+ sky130_fd_sc_hd__clkbuf_4 repeater824 (.A(net825),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net824));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater825 (.A(net826),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net825));
+ sky130_fd_sc_hd__buf_6 repeater826 (.A(net827),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net826));
+ sky130_fd_sc_hd__buf_4 repeater827 (.A(net828),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net827));
+ sky130_fd_sc_hd__clkbuf_4 repeater828 (.A(net829),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net828));
+ sky130_fd_sc_hd__buf_4 repeater829 (.A(net830),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net829));
+ sky130_fd_sc_hd__buf_6 repeater830 (.A(net831),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net830));
+ sky130_fd_sc_hd__buf_6 repeater831 (.A(net832),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net831));
+ sky130_fd_sc_hd__buf_6 repeater832 (.A(net833),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net832));
+ sky130_fd_sc_hd__buf_4 repeater833 (.A(net834),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net833));
+ sky130_fd_sc_hd__clkbuf_4 repeater834 (.A(net835),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net834));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater835 (.A(net35),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net835));
+ sky130_fd_sc_hd__clkbuf_4 repeater836 (.A(net837),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net836));
+ sky130_fd_sc_hd__clkbuf_4 repeater837 (.A(net838),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net837));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater838 (.A(net839),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net838));
+ sky130_fd_sc_hd__buf_6 repeater839 (.A(net840),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net839));
+ sky130_fd_sc_hd__buf_4 repeater840 (.A(net841),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net840));
+ sky130_fd_sc_hd__clkbuf_4 repeater841 (.A(net842),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net841));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater842 (.A(net34),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net842));
+ sky130_fd_sc_hd__clkbuf_4 repeater843 (.A(net844),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net843));
+ sky130_fd_sc_hd__clkbuf_4 repeater844 (.A(net845),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net844));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater845 (.A(net846),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net845));
+ sky130_fd_sc_hd__buf_6 repeater846 (.A(net847),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net846));
+ sky130_fd_sc_hd__buf_4 repeater847 (.A(net848),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net847));
+ sky130_fd_sc_hd__clkbuf_4 repeater848 (.A(net849),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net848));
+ sky130_fd_sc_hd__buf_4 repeater849 (.A(net850),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net849));
+ sky130_fd_sc_hd__buf_6 repeater850 (.A(net851),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net850));
+ sky130_fd_sc_hd__buf_6 repeater851 (.A(net852),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net851));
+ sky130_fd_sc_hd__buf_6 repeater852 (.A(net853),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net852));
+ sky130_fd_sc_hd__buf_4 repeater853 (.A(net854),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net853));
+ sky130_fd_sc_hd__clkbuf_4 repeater854 (.A(net855),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net854));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater855 (.A(net34),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net855));
+ sky130_fd_sc_hd__clkbuf_4 repeater856 (.A(net857),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net856));
+ sky130_fd_sc_hd__clkbuf_4 repeater857 (.A(net858),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net857));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater858 (.A(net859),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net858));
+ sky130_fd_sc_hd__buf_6 repeater859 (.A(net860),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net859));
+ sky130_fd_sc_hd__buf_4 repeater860 (.A(net861),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net860));
+ sky130_fd_sc_hd__clkbuf_4 repeater861 (.A(net862),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net861));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater862 (.A(net33),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net862));
+ sky130_fd_sc_hd__clkbuf_4 repeater863 (.A(net864),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net863));
+ sky130_fd_sc_hd__clkbuf_4 repeater864 (.A(net865),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net864));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater865 (.A(net866),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net865));
+ sky130_fd_sc_hd__buf_6 repeater866 (.A(net867),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net866));
+ sky130_fd_sc_hd__buf_4 repeater867 (.A(net868),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net867));
+ sky130_fd_sc_hd__clkbuf_4 repeater868 (.A(net869),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net868));
+ sky130_fd_sc_hd__buf_4 repeater869 (.A(net870),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net869));
+ sky130_fd_sc_hd__buf_6 repeater870 (.A(net871),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net870));
+ sky130_fd_sc_hd__buf_6 repeater871 (.A(net872),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net871));
+ sky130_fd_sc_hd__buf_6 repeater872 (.A(net873),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net872));
+ sky130_fd_sc_hd__buf_4 repeater873 (.A(net874),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net873));
+ sky130_fd_sc_hd__clkbuf_4 repeater874 (.A(net875),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net874));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater875 (.A(net33),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net875));
+ sky130_fd_sc_hd__clkbuf_4 repeater876 (.A(net877),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net876));
+ sky130_fd_sc_hd__clkbuf_4 repeater877 (.A(net878),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net877));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater878 (.A(net879),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net878));
+ sky130_fd_sc_hd__buf_6 repeater879 (.A(net880),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net879));
+ sky130_fd_sc_hd__buf_4 repeater880 (.A(net881),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net880));
+ sky130_fd_sc_hd__clkbuf_4 repeater881 (.A(net882),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net881));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater882 (.A(net32),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net882));
+ sky130_fd_sc_hd__clkbuf_4 repeater883 (.A(net884),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net883));
+ sky130_fd_sc_hd__clkbuf_4 repeater884 (.A(net885),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net884));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater885 (.A(net886),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net885));
+ sky130_fd_sc_hd__buf_6 repeater886 (.A(net887),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net886));
+ sky130_fd_sc_hd__buf_4 repeater887 (.A(net888),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net887));
+ sky130_fd_sc_hd__clkbuf_4 repeater888 (.A(net889),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net888));
+ sky130_fd_sc_hd__buf_4 repeater889 (.A(net890),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net889));
+ sky130_fd_sc_hd__buf_6 repeater890 (.A(net891),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net890));
+ sky130_fd_sc_hd__buf_6 repeater891 (.A(net892),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net891));
+ sky130_fd_sc_hd__buf_6 repeater892 (.A(net893),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net892));
+ sky130_fd_sc_hd__buf_4 repeater893 (.A(net894),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net893));
+ sky130_fd_sc_hd__clkbuf_4 repeater894 (.A(net895),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net894));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater895 (.A(net32),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net895));
+ sky130_fd_sc_hd__clkbuf_4 repeater896 (.A(net897),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net896));
+ sky130_fd_sc_hd__clkbuf_4 repeater897 (.A(net898),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net897));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater898 (.A(net899),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net898));
+ sky130_fd_sc_hd__buf_6 repeater899 (.A(net900),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net899));
+ sky130_fd_sc_hd__buf_2 repeater9 (.A(clknet_1_0_3_clk),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net2021));
+ sky130_fd_sc_hd__buf_4 repeater900 (.A(net901),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net900));
+ sky130_fd_sc_hd__clkbuf_4 repeater901 (.A(net902),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net901));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater902 (.A(net31),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net902));
+ sky130_fd_sc_hd__clkbuf_4 repeater903 (.A(net904),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net903));
+ sky130_fd_sc_hd__clkbuf_4 repeater904 (.A(net905),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net904));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater905 (.A(net906),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net905));
+ sky130_fd_sc_hd__buf_6 repeater906 (.A(net907),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net906));
+ sky130_fd_sc_hd__buf_4 repeater907 (.A(net908),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net907));
+ sky130_fd_sc_hd__clkbuf_4 repeater908 (.A(net909),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net908));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater909 (.A(net910),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net909));
+ sky130_fd_sc_hd__buf_6 repeater910 (.A(net911),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net910));
+ sky130_fd_sc_hd__buf_6 repeater911 (.A(net912),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net911));
+ sky130_fd_sc_hd__buf_6 repeater912 (.A(net913),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net912));
+ sky130_fd_sc_hd__buf_4 repeater913 (.A(net914),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net913));
+ sky130_fd_sc_hd__clkbuf_4 repeater914 (.A(net915),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net914));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater915 (.A(net31),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net915));
+ sky130_fd_sc_hd__clkbuf_4 repeater916 (.A(net917),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net916));
+ sky130_fd_sc_hd__clkbuf_4 repeater917 (.A(net918),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net917));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater918 (.A(net919),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net918));
+ sky130_fd_sc_hd__buf_6 repeater919 (.A(net920),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net919));
+ sky130_fd_sc_hd__buf_4 repeater920 (.A(net921),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net920));
+ sky130_fd_sc_hd__clkbuf_4 repeater921 (.A(net922),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net921));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater922 (.A(net30),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net922));
+ sky130_fd_sc_hd__clkbuf_4 repeater923 (.A(net924),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net923));
+ sky130_fd_sc_hd__clkbuf_4 repeater924 (.A(net925),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net924));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater925 (.A(net926),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net925));
+ sky130_fd_sc_hd__buf_6 repeater926 (.A(net927),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net926));
+ sky130_fd_sc_hd__buf_4 repeater927 (.A(net928),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net927));
+ sky130_fd_sc_hd__clkbuf_4 repeater928 (.A(net929),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net928));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater929 (.A(net930),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net929));
+ sky130_fd_sc_hd__buf_6 repeater930 (.A(net931),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net930));
+ sky130_fd_sc_hd__buf_6 repeater931 (.A(net932),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net931));
+ sky130_fd_sc_hd__buf_6 repeater932 (.A(net933),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net932));
+ sky130_fd_sc_hd__buf_4 repeater933 (.A(net934),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net933));
+ sky130_fd_sc_hd__clkbuf_4 repeater934 (.A(net935),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net934));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater935 (.A(net30),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net935));
+ sky130_fd_sc_hd__buf_4 repeater936 (.A(net937),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net936));
+ sky130_fd_sc_hd__buf_4 repeater937 (.A(net938),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net937));
+ sky130_fd_sc_hd__buf_4 repeater938 (.A(net939),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net938));
+ sky130_fd_sc_hd__buf_4 repeater939 (.A(net940),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net939));
+ sky130_fd_sc_hd__buf_6 repeater940 (.A(net941),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net940));
+ sky130_fd_sc_hd__buf_6 repeater941 (.A(net942),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net941));
+ sky130_fd_sc_hd__buf_4 repeater942 (.A(net943),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net942));
+ sky130_fd_sc_hd__clkbuf_4 repeater943 (.A(net944),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net943));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater944 (.A(net3),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net944));
+ sky130_fd_sc_hd__clkbuf_4 repeater945 (.A(net946),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net945));
+ sky130_fd_sc_hd__clkbuf_4 repeater946 (.A(net947),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net946));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater947 (.A(net948),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net947));
+ sky130_fd_sc_hd__buf_6 repeater948 (.A(net949),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net948));
+ sky130_fd_sc_hd__buf_6 repeater949 (.A(net950),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net949));
+ sky130_fd_sc_hd__buf_6 repeater950 (.A(net951),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net950));
+ sky130_fd_sc_hd__buf_4 repeater951 (.A(net952),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net951));
+ sky130_fd_sc_hd__clkbuf_4 repeater952 (.A(net967),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net952));
+ sky130_fd_sc_hd__clkbuf_4 repeater953 (.A(net954),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net953));
+ sky130_fd_sc_hd__clkbuf_4 repeater954 (.A(net955),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net954));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater955 (.A(net956),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net955));
+ sky130_fd_sc_hd__buf_6 repeater956 (.A(net957),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net956));
+ sky130_fd_sc_hd__buf_6 repeater957 (.A(net958),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net957));
+ sky130_fd_sc_hd__buf_4 repeater958 (.A(net959),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net958));
+ sky130_fd_sc_hd__clkbuf_4 repeater959 (.A(net960),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net959));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater960 (.A(net961),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net960));
+ sky130_fd_sc_hd__buf_4 repeater961 (.A(net962),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net961));
+ sky130_fd_sc_hd__buf_6 repeater962 (.A(net963),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net962));
+ sky130_fd_sc_hd__buf_6 repeater963 (.A(net964),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net963));
+ sky130_fd_sc_hd__buf_4 repeater964 (.A(net965),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net964));
+ sky130_fd_sc_hd__clkbuf_4 repeater965 (.A(net966),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net965));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater966 (.A(net29),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net966));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater967 (.A(net29),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net967));
+ sky130_fd_sc_hd__clkbuf_4 repeater968 (.A(net969),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net968));
+ sky130_fd_sc_hd__clkbuf_4 repeater969 (.A(net970),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net969));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater970 (.A(net971),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net970));
+ sky130_fd_sc_hd__buf_6 repeater971 (.A(net972),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net971));
+ sky130_fd_sc_hd__buf_6 repeater972 (.A(net973),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net972));
+ sky130_fd_sc_hd__buf_4 repeater973 (.A(net974),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net973));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater974 (.A(net28),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net974));
+ sky130_fd_sc_hd__clkbuf_4 repeater975 (.A(net976),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net975));
+ sky130_fd_sc_hd__clkbuf_4 repeater976 (.A(net977),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net976));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater977 (.A(net978),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net977));
+ sky130_fd_sc_hd__buf_6 repeater978 (.A(net979),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net978));
+ sky130_fd_sc_hd__buf_4 repeater979 (.A(net980),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net979));
+ sky130_fd_sc_hd__clkbuf_4 repeater980 (.A(net981),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net980));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater981 (.A(net982),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net981));
+ sky130_fd_sc_hd__buf_6 repeater982 (.A(net983),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net982));
+ sky130_fd_sc_hd__buf_6 repeater983 (.A(net984),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net983));
+ sky130_fd_sc_hd__buf_6 repeater984 (.A(net985),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net984));
+ sky130_fd_sc_hd__buf_4 repeater985 (.A(net986),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net985));
+ sky130_fd_sc_hd__clkbuf_4 repeater986 (.A(net987),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net986));
+ sky130_fd_sc_hd__dlymetal6s2s_1 repeater987 (.A(net28),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net987));
+ sky130_fd_sc_hd__clkbuf_4 repeater988 (.A(net989),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net988));
+ sky130_fd_sc_hd__clkbuf_4 repeater989 (.A(net990),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net989));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater990 (.A(net991),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net990));
+ sky130_fd_sc_hd__buf_6 repeater991 (.A(net992),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net991));
+ sky130_fd_sc_hd__buf_6 repeater992 (.A(net993),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net992));
+ sky130_fd_sc_hd__buf_4 repeater993 (.A(net994),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net993));
+ sky130_fd_sc_hd__clkbuf_4 repeater994 (.A(net27),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net994));
+ sky130_fd_sc_hd__clkbuf_4 repeater995 (.A(net996),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net995));
+ sky130_fd_sc_hd__clkbuf_4 repeater996 (.A(net997),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net996));
+ sky130_fd_sc_hd__clkdlybuf4s15_2 repeater997 (.A(net998),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net997));
+ sky130_fd_sc_hd__buf_6 repeater998 (.A(net999),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net998));
+ sky130_fd_sc_hd__buf_4 repeater999 (.A(net1000),
+    .VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .X(net999));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1850 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1850));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1851 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1851));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1852 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1852));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1853 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1853));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1854 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1854));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1855 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1855));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1856 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1856));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1857 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1857));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1858 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1858));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1859 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1859));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1860 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1860));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1861 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1861));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1862 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1862));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1863 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1863));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1864 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1864));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1865 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1865));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1866 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1866));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1867 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1867));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1868 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1868));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1869 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1869));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1870 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1870));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1871 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1871));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1872 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1872));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1873 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1873));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1874 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1874));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1875 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1875));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1876 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1876));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1877 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1877));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1878 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1878));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1879 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1879));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1880 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1880));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1881 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1881));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1882 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1882));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1883 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1883));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1884 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1884));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1885 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1885));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1886 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1886));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1887 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1887));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1888 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1888));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1889 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1889));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1890 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1890));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1891 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1891));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1892 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1892));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1893 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1893));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1894 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1894));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1895 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1895));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1896 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1896));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1897 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1897));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1898 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1898));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1899 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1899));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1900 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1900));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1901 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1901));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1902 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1902));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1903 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1903));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1904 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1904));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1905 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1905));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1906 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1906));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1907 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1907));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1908 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1908));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1909 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1909));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1910 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1910));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1911 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1911));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1912 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1912));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1913 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1913));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1914 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1914));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1915 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1915));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1916 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1916));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1917 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1917));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1918 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1918));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1919 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1919));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1920 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1920));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1921 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1921));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1922 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1922));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1923 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1923));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1924 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1924));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1925 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1925));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1926 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1926));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1927 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1927));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1928 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1928));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1929 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1929));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1930 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1930));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1931 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1931));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1932 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1932));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1933 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1933));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1934 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1934));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1935 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1935));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1936 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1936));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1937 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1937));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1938 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1938));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1939 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1939));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1940 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1940));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1941 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1941));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1942 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1942));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1943 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1943));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1944 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1944));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1945 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1945));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1946 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1946));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1947 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1947));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1948 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1948));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1949 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1949));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1950 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1950));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1951 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1951));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1952 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1952));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1953 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1953));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1954 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1954));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1955 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .LO(net1955));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1960 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1960));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1961 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1961));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1962 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1962));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1963 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1963));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1964 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1964));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1965 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1965));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1966 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1966));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1967 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1967));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1968 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1968));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1969 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1969));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1970 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1970));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1971 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1971));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1972 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1972));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1973 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1973));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1974 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1974));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1975 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1975));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1976 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1976));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1977 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1977));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1978 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1978));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1979 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1979));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1980 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1980));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1981 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1981));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1982 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1982));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1983 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1983));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1984 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1984));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1985 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1985));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1986 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1986));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1987 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1987));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1988 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1988));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1989 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1989));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1990 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1990));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_1991 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net1991));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_2008 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2008));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_2009 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2009));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_2010 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2010));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_2011 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2011));
+ sky130_fd_sc_hd__conb_1 user_project_wrapper_2012 (.VGND(vssd1),
+    .VNB(vssd1),
+    .VPB(vccd1),
+    .VPWR(vccd1),
+    .HI(net2012));
+ assign io_oeb[0] = net2008;
+ assign io_oeb[10] = net1965;
+ assign io_oeb[11] = net1966;
+ assign io_oeb[12] = net1967;
+ assign io_oeb[13] = net1968;
+ assign io_oeb[14] = net1969;
+ assign io_oeb[15] = net1970;
+ assign io_oeb[16] = net1971;
+ assign io_oeb[17] = net1972;
+ assign io_oeb[18] = net1973;
+ assign io_oeb[19] = net1974;
+ assign io_oeb[1] = net2009;
+ assign io_oeb[20] = net1975;
+ assign io_oeb[21] = net1976;
+ assign io_oeb[22] = net1977;
+ assign io_oeb[23] = net1978;
+ assign io_oeb[24] = net1979;
+ assign io_oeb[25] = net1980;
+ assign io_oeb[26] = net1981;
+ assign io_oeb[27] = net1982;
+ assign io_oeb[28] = net1983;
+ assign io_oeb[29] = net1984;
+ assign io_oeb[2] = net2010;
+ assign io_oeb[30] = net1985;
+ assign io_oeb[31] = net1986;
+ assign io_oeb[32] = net1987;
+ assign io_oeb[33] = net1988;
+ assign io_oeb[34] = net1989;
+ assign io_oeb[35] = net1990;
+ assign io_oeb[36] = net1991;
+ assign io_oeb[37] = net1850;
+ assign io_oeb[3] = net2011;
+ assign io_oeb[4] = net2012;
+ assign io_oeb[5] = net1960;
+ assign io_oeb[6] = net1961;
+ assign io_oeb[7] = net1962;
+ assign io_oeb[8] = net1963;
+ assign io_oeb[9] = net1964;
+ assign io_out[0] = net1851;
+ assign io_out[10] = net1861;
+ assign io_out[11] = net1862;
+ assign io_out[12] = net1863;
+ assign io_out[13] = net1864;
+ assign io_out[14] = net1865;
+ assign io_out[15] = net1866;
+ assign io_out[16] = net1867;
+ assign io_out[17] = net1868;
+ assign io_out[18] = net1869;
+ assign io_out[19] = net1870;
+ assign io_out[1] = net1852;
+ assign io_out[20] = net1871;
+ assign io_out[21] = net1872;
+ assign io_out[22] = net1873;
+ assign io_out[23] = net1874;
+ assign io_out[24] = net1875;
+ assign io_out[25] = net1876;
+ assign io_out[26] = net1877;
+ assign io_out[27] = net1878;
+ assign io_out[28] = net1879;
+ assign io_out[29] = net1880;
+ assign io_out[2] = net1853;
+ assign io_out[30] = net1881;
+ assign io_out[31] = net1882;
+ assign io_out[32] = net1883;
+ assign io_out[33] = net1884;
+ assign io_out[34] = net1885;
+ assign io_out[35] = net1886;
+ assign io_out[36] = net1887;
+ assign io_out[37] = net1888;
+ assign io_out[3] = net1854;
+ assign io_out[4] = net1855;
+ assign io_out[5] = net1856;
+ assign io_out[6] = net1857;
+ assign io_out[7] = net1858;
+ assign io_out[8] = net1859;
+ assign io_out[9] = net1860;
+ assign la_data_out[100] = net1925;
+ assign la_data_out[101] = net1926;
+ assign la_data_out[102] = net1927;
+ assign la_data_out[103] = net1928;
+ assign la_data_out[104] = net1929;
+ assign la_data_out[105] = net1930;
+ assign la_data_out[106] = net1931;
+ assign la_data_out[107] = net1932;
+ assign la_data_out[108] = net1933;
+ assign la_data_out[109] = net1934;
+ assign la_data_out[110] = net1935;
+ assign la_data_out[111] = net1936;
+ assign la_data_out[112] = net1937;
+ assign la_data_out[113] = net1938;
+ assign la_data_out[114] = net1939;
+ assign la_data_out[115] = net1940;
+ assign la_data_out[116] = net1941;
+ assign la_data_out[117] = net1942;
+ assign la_data_out[118] = net1943;
+ assign la_data_out[119] = net1944;
+ assign la_data_out[120] = net1945;
+ assign la_data_out[121] = net1946;
+ assign la_data_out[122] = net1947;
+ assign la_data_out[123] = net1948;
+ assign la_data_out[124] = net1949;
+ assign la_data_out[125] = net1950;
+ assign la_data_out[126] = net1951;
+ assign la_data_out[127] = net1952;
+ assign la_data_out[64] = net1889;
+ assign la_data_out[65] = net1890;
+ assign la_data_out[66] = net1891;
+ assign la_data_out[67] = net1892;
+ assign la_data_out[68] = net1893;
+ assign la_data_out[69] = net1894;
+ assign la_data_out[70] = net1895;
+ assign la_data_out[71] = net1896;
+ assign la_data_out[72] = net1897;
+ assign la_data_out[73] = net1898;
+ assign la_data_out[74] = net1899;
+ assign la_data_out[75] = net1900;
+ assign la_data_out[76] = net1901;
+ assign la_data_out[77] = net1902;
+ assign la_data_out[78] = net1903;
+ assign la_data_out[79] = net1904;
+ assign la_data_out[80] = net1905;
+ assign la_data_out[81] = net1906;
+ assign la_data_out[82] = net1907;
+ assign la_data_out[83] = net1908;
+ assign la_data_out[84] = net1909;
+ assign la_data_out[85] = net1910;
+ assign la_data_out[86] = net1911;
+ assign la_data_out[87] = net1912;
+ assign la_data_out[88] = net1913;
+ assign la_data_out[89] = net1914;
+ assign la_data_out[90] = net1915;
+ assign la_data_out[91] = net1916;
+ assign la_data_out[92] = net1917;
+ assign la_data_out[93] = net1918;
+ assign la_data_out[94] = net1919;
+ assign la_data_out[95] = net1920;
+ assign la_data_out[96] = net1921;
+ assign la_data_out[97] = net1922;
+ assign la_data_out[98] = net1923;
+ assign la_data_out[99] = net1924;
+ assign user_irq[0] = net1953;
+ assign user_irq[1] = net1954;
+ assign user_irq[2] = net1955;
+endmodule
diff --git a/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag.gz b/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag.gz
new file mode 100644
index 0000000..daf99c6
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.magic.drc.mag.gz
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper.xor.gds b/mpw_precheck/outputs/user_project_wrapper.xor.gds
new file mode 100644
index 0000000..85523a3
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper.xor.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
new file mode 100644
index 0000000..0566063
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_empty_erased.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_erased.gds b/mpw_precheck/outputs/user_project_wrapper_erased.gds
new file mode 100644
index 0000000..3ce9ead
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_erased.gds
Binary files differ
diff --git a/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz b/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz
new file mode 100644
index 0000000..b06e7a6
--- /dev/null
+++ b/mpw_precheck/outputs/user_project_wrapper_no_zero_areas.gds.gz
Binary files differ
diff --git a/signoff/.gitignore b/signoff/.gitignore
new file mode 100644
index 0000000..6407046
--- /dev/null
+++ b/signoff/.gitignore
@@ -0,0 +1 @@
+cdrcpost/*
diff --git a/signoff/assigned_slot b/signoff/assigned_slot
new file mode 100644
index 0000000..5b0bcf5
--- /dev/null
+++ b/signoff/assigned_slot
@@ -0,0 +1 @@
+016
diff --git a/signoff/caravel_layout.png b/signoff/caravel_layout.png
new file mode 100644
index 0000000..6a53dfe
--- /dev/null
+++ b/signoff/caravel_layout.png
Binary files differ
diff --git a/tapeout/logs/compose.log b/tapeout/logs/compose.log
new file mode 100644
index 0000000..e6f179b
--- /dev/null
+++ b/tapeout/logs/compose.log
@@ -0,0 +1,1558 @@
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/compose.tcl" from command line.
+caravel: 10000 rects
+caravel: 20000 rects
+caravel: 30000 rects
+caravel: 40000 rects
+caravel: 50000 rects
+caravel: 60000 rects
+caravel: 70000 rects
+caravel: 80000 rects
+caravel
+Scaled magic input cell advSeal_6um_gen geometry by factor of 2
+Writing final GDS. . . 
+Scaled magic input cell seal_ring_corner_abstract geometry by factor of 2
+Scaled magic input cell caravel_motto geometry by factor of 2
+Scaled magic input cell font_22 geometry by factor of 24
+Scaled magic input cell font_73 geometry by factor of 24
+Scaled magic input cell font_43 geometry by factor of 24
+Scaled magic input cell font_49 geometry by factor of 24
+Scaled magic input cell font_65 geometry by factor of 24
+Scaled magic input cell font_68 geometry by factor of 24
+Scaled magic input cell font_54 geometry by factor of 24
+Scaled magic input cell font_67 geometry by factor of 24
+Scaled magic input cell font_6E geometry by factor of 24
+Scaled magic input cell font_69 geometry by factor of 24
+Scaled magic input cell font_6C geometry by factor of 24
+Scaled magic input cell font_61 geometry by factor of 24
+Scaled magic input cell font_53 geometry by factor of 24
+Scaled magic input cell font_79 geometry by factor of 24
+Scaled magic input cell font_76 geometry by factor of 24
+Scaled magic input cell font_74 geometry by factor of 24
+Scaled magic input cell font_72 geometry by factor of 24
+Scaled magic input cell font_70 geometry by factor of 24
+Scaled magic input cell font_66 geometry by factor of 24
+Scaled magic input cell font_63 geometry by factor of 24
+Scaled magic input cell font_62 geometry by factor of 24
+Scaled magic input cell font_57 geometry by factor of 24
+Scaled magic input cell font_56 geometry by factor of 24
+Scaled magic input cell font_50 geometry by factor of 24
+Scaled magic input cell font_47 geometry by factor of 24
+Scaled magic input cell font_44 geometry by factor of 24
+Scaled magic input cell font_35 geometry by factor of 24
+Scaled magic input cell font_32 geometry by factor of 24
+Scaled magic input cell font_30 geometry by factor of 24
+Scaled magic input cell font_29 geometry by factor of 24
+Scaled magic input cell font_28 geometry by factor of 24
+Scaled magic input cell font_20 geometry by factor of 24
+Scaled magic input cell font_6F geometry by factor of 24
+Scaled magic input cell font_6B geometry by factor of 24
+Scaled magic input cell font_4F geometry by factor of 24
+Scaled magic input cell font_4B geometry by factor of 24
+Scaled magic input cell font_2D geometry by factor of 24
+Scaled magic input cell open_source geometry by factor of 2
+Scaled magic input cell user_id_textblock geometry by factor of 2
+Scaled magic input cell alpha_0 geometry by factor of 2
+Scaled magic input cell user_project_wrapper geometry by factor of 2
+user_project_wrapper: 10000 rects
+user_project_wrapper: 20000 rects
+user_project_wrapper: 30000 rects
+user_project_wrapper: 40000 rects
+user_project_wrapper: 50000 rects
+Processing timestamp mismatches: sky130_ef_sc_hd__decap_12, sky130_fd_sc_hd__buf_8, sky130_fd_sc_hd__tapvpwrvgnd_1, sky130_ef_io__com_bus_slice_10um, sky130_ef_io__com_bus_slice_20um, sky130_ef_io__com_bus_slice_1um, sky130_ef_io__com_bus_slice_5um, sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um, sky130_ef_io__disconnect_vdda_slice_5um, sky130_ef_io__vccd_lvc_clamped_pad, sky130_ef_io__vddio_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped_pad, sky130_ef_io__vssio_hvc_clamped_pad, sky130_ef_io__gpiov2_pad_wrapped, sky130_fd_io__top_xres4v2, sky130_ef_io__corner_pad, sky130_ef_io__vccd_lvc_clamped3_pad, sky130_ef_io__vdda_hvc_clamped_pad, sky130_ef_io__vssa_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped3_pad, gpio_control_power_routing, gpio_control_power_routing_right, gpio_control_power_routing_top, mgmt_protect, spare_logic_block, user_id_programming, simple_por, digital_pll, housekeeping, gpio_defaults_block, gpio_control_block, buff_flash_clkrst, caravel_clocking, xres_buf, seal_ring_corner_abstract.
+   Generating output for cell advSeal_6um_gen
+Reading "sealring_slots".
+Reading "seal_ring_slots_array".
+Reading "sr_polygon00011".
+Reading "sr_polygon00039".
+Reading "sr_polygon00035".
+Reading "sr_polygon00015".
+Reading "sr_polygon00007".
+Reading "sr_polygon00001".
+Reading "sr_polygon00002".
+Reading "sr_polygon00003".
+Reading "sr_polygon00004".
+Reading "sr_polygon00005".
+Reading "sr_polygon00006".
+Reading "nikon_sealring_shape".
+Reading "sr_polygon00019".
+Reading "sr_polygon00023".
+Reading "sr_polygon00027".
+Reading "sr_polygon00031".
+Reading "sr_polygon00036".
+Reading "sr_polygon00032".
+Reading "sr_polygon00016".
+Reading "sr_polygon00020".
+Reading "sr_polygon00024".
+Reading "sr_polygon00028".
+Reading "seal_ring_corner".
+Reading "advSeal_6um_gen".
+   Generating output for cell caravel_0006b498_fill_pattern
+Reading "caravel_0006b498_fill_pattern_0_0".
+Reading "caravel_0006b498_fill_pattern_1_0".
+Reading "caravel_0006b498_fill_pattern_0_1".
+Reading "caravel_0006b498_fill_pattern_1_1".
+Reading "caravel_0006b498_fill_pattern_2_0".
+Reading "caravel_0006b498_fill_pattern_2_1".
+Reading "caravel_0006b498_fill_pattern_3_0".
+Reading "caravel_0006b498_fill_pattern_3_1".
+Reading "caravel_0006b498_fill_pattern_4_0".
+Reading "caravel_0006b498_fill_pattern_4_1".
+Reading "caravel_0006b498_fill_pattern_5_0".
+Reading "caravel_0006b498_fill_pattern_5_1".
+Reading "caravel_0006b498_fill_pattern_0_2".
+Reading "caravel_0006b498_fill_pattern_1_2".
+Reading "caravel_0006b498_fill_pattern_2_2".
+Reading "caravel_0006b498_fill_pattern_3_2".
+Reading "caravel_0006b498_fill_pattern_4_2".
+Reading "caravel_0006b498_fill_pattern_5_2".
+Reading "caravel_0006b498_fill_pattern_0_3".
+Reading "caravel_0006b498_fill_pattern_1_3".
+Reading "caravel_0006b498_fill_pattern_2_3".
+Reading "caravel_0006b498_fill_pattern_3_3".
+Reading "caravel_0006b498_fill_pattern_4_3".
+Reading "caravel_0006b498_fill_pattern_5_3".
+Reading "caravel_0006b498_fill_pattern_0_4".
+Reading "caravel_0006b498_fill_pattern_1_4".
+Reading "caravel_0006b498_fill_pattern_2_4".
+Reading "caravel_0006b498_fill_pattern_3_4".
+Reading "caravel_0006b498_fill_pattern_4_4".
+Reading "caravel_0006b498_fill_pattern_5_4".
+Reading "caravel_0006b498_fill_pattern_0_5".
+Reading "caravel_0006b498_fill_pattern_1_5".
+Reading "caravel_0006b498_fill_pattern_2_5".
+Reading "caravel_0006b498_fill_pattern_3_5".
+Reading "caravel_0006b498_fill_pattern_4_5".
+Reading "caravel_0006b498_fill_pattern_5_5".
+Reading "caravel_0006b498_fill_pattern_0_6".
+Reading "caravel_0006b498_fill_pattern_1_6".
+Reading "caravel_0006b498_fill_pattern_2_6".
+Reading "caravel_0006b498_fill_pattern_3_6".
+Reading "caravel_0006b498_fill_pattern_4_6".
+Reading "caravel_0006b498_fill_pattern_5_6".
+Reading "caravel_0006b498_fill_pattern_0_7".
+Reading "caravel_0006b498_fill_pattern_1_7".
+Reading "caravel_0006b498_fill_pattern_2_7".
+Reading "caravel_0006b498_fill_pattern_3_7".
+Reading "caravel_0006b498_fill_pattern_4_7".
+Reading "caravel_0006b498_fill_pattern_5_7".
+Reading "caravel_0006b498_fill_pattern".
+   Generating output for cell caravel
+Reading "caravel_logo".
+Reading "font_22".
+Reading "font_73".
+Reading "font_43".
+Reading "font_49".
+Reading "font_65".
+Reading "font_68".
+Reading "font_54".
+Reading "font_67".
+Reading "font_6E".
+Reading "font_69".
+Reading "font_6C".
+Reading "font_61".
+Reading "font_53".
+Reading "caravel_motto".
+Reading "font_79".
+Reading "font_76".
+Reading "font_74".
+Reading "font_72".
+Reading "font_70".
+Reading "font_66".
+Reading "font_63".
+Reading "font_62".
+Reading "font_57".
+Reading "font_56".
+Reading "font_50".
+Reading "font_47".
+Reading "font_44".
+Reading "font_35".
+Reading "font_32".
+Reading "font_30".
+Reading "font_29".
+Reading "font_28".
+Reading "font_20".
+Reading "font_6F".
+Reading "font_6B".
+Reading "font_4F".
+Reading "font_4B".
+Reading "font_2D".
+Reading "copyright_block".
+Reading "open_source".
+Reading "sky130_fd_sc_hvl__decap_8".
+Reading "sky130_fd_sc_hvl__decap_4".
+Reading "sky130_fd_sc_hvl__diode_2".
+Reading "sky130_fd_sc_hvl__fill_1".
+Reading "sky130_fd_sc_hvl__fill_2".
+Reading "sky130_fd_sc_hvl__lsbufhv2lv_1".
+Reading "xres_buf".
+Reading "alpha_6".
+Reading "alpha_B".
+Reading "alpha_4".
+Reading "alpha_9".
+Reading "alpha_8".
+Reading "alpha_0".
+Reading "user_id_textblock".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "gpio_defaults_block_1803".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__nand4bb_1".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a41oi_1".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "caravel_clocking".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "buff_flash_clkrst".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__macro_sparecell".
+Reading "sky130_fd_sc_hd__dfbbn_2".
+Reading "sky130_fd_sc_hd__or2_0".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__and2_0".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__buf_16".
+Reading "gpio_logic_high".
+Reading "gpio_control_block".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "housekeeping".
+Reading "sky130_fd_sc_hd__einvp_1".
+Reading "sky130_fd_sc_hd__clkinv_1".
+Reading "sky130_fd_sc_hd__einvn_4".
+Reading "sky130_fd_sc_hd__einvn_8".
+Reading "sky130_fd_sc_hd__einvp_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__nand4b_2".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "digital_pll".
+Reading "user_id_programming".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "YV_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "YV_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "YV_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "YV_sky130_fd_sc_hvl__schmittbuf_1".
+Reading "YV_sky130_fd_sc_hvl__buf_8".
+Reading "YV_sky130_fd_sc_hvl__inv_8".
+Reading "YV_sky130_fd_sc_hvl__fill_4".
+Reading "YV_sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "YV_sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "YV_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+Reading "L5_sky130_fd_sc_hd__decap_3".
+Reading "L5_sky130_ef_sc_hd__decap_12".
+Reading "L5_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "L5_sky130_fd_sc_hd__fill_1".
+Reading "L5_sky130_fd_sc_hd__decap_4".
+Reading "L5_sky130_fd_sc_hd__decap_6".
+Reading "L5_sky130_fd_sc_hd__fill_2".
+Reading "L5_sky130_fd_sc_hd__decap_8".
+Reading "L5_sky130_fd_sc_hd__diode_2".
+Reading "L5_sky130_fd_sc_hd__clkbuf_16".
+Reading "L5_sky130_fd_sc_hd__o211a_1".
+Reading "L5_sky130_fd_sc_hd__dfxtp_2".
+Reading "L5_sky130_fd_sc_hd__o21a_1".
+Reading "L5_sky130_fd_sc_hd__mux2_1".
+Reading "L5_sky130_fd_sc_hd__or2_1".
+Reading "L5_sky130_fd_sc_hd__dfxtp_1".
+Reading "L5_sky130_fd_sc_hd__a22o_1".
+Reading "L5_sky130_fd_sc_hd__a21o_2".
+Reading "L5_sky130_fd_sc_hd__a21o_1".
+Reading "L5_sky130_fd_sc_hd__a22o_4".
+Reading "L5_sky130_fd_sc_hd__buf_8".
+Reading "L5_sky130_fd_sc_hd__o21a_2".
+Reading "L5_sky130_fd_sc_hd__mux2_2".
+Reading "L5_sky130_fd_sc_hd__buf_4".
+Reading "L5_sky130_fd_sc_hd__clkbuf_8".
+Reading "L5_sky130_fd_sc_hd__buf_6".
+Reading "L5_sky130_fd_sc_hd__dfxtp_4".
+Reading "L5_sky130_fd_sc_hd__buf_2".
+Reading "L5_sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "L5_sky130_fd_sc_hd__o21ai_1".
+Reading "L5_sky130_fd_sc_hd__mux4_1".
+Reading "L5_sky130_fd_sc_hd__buf_12".
+Reading "L5_sky130_fd_sc_hd__mux4_2".
+Reading "L5_sky130_fd_sc_hd__inv_2".
+Reading "L5_sky130_fd_sc_hd__and3_2".
+Reading "L5_sky130_fd_sc_hd__nand2_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2o_1".
+Reading "L5_sky130_fd_sc_hd__or3b_1".
+Reading "L5_sky130_fd_sc_hd__o32a_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2o_2".
+Reading "L5_sky130_fd_sc_hd__o311a_1".
+Reading "L5_sky130_fd_sc_hd__o221a_1".
+Reading "L5_sky130_fd_sc_hd__o31a_1".
+Reading "L5_sky130_fd_sc_hd__o211a_2".
+Reading "L5_sky130_fd_sc_hd__and3_1".
+Reading "L5_sky130_fd_sc_hd__a211oi_1".
+Reading "L5_sky130_fd_sc_hd__and4_4".
+Reading "L5_sky130_fd_sc_hd__and4_1".
+Reading "L5_sky130_fd_sc_hd__clkbuf_4".
+Reading "L5_sky130_fd_sc_hd__and3b_1".
+Reading "L5_sky130_fd_sc_hd__a211o_4".
+Reading "L5_sky130_fd_sc_hd__a211o_1".
+Reading "L5_sky130_fd_sc_hd__o21ba_1".
+Reading "L5_sky130_fd_sc_hd__a21oi_1".
+Reading "L5_sky130_fd_sc_hd__nor2_1".
+Reading "L5_sky130_fd_sc_hd__nand2_8".
+Reading "L5_sky130_fd_sc_hd__a311o_1".
+Reading "L5_sky130_fd_sc_hd__nor2_2".
+Reading "L5_sky130_fd_sc_hd__a41o_1".
+Reading "L5_sky130_fd_sc_hd__nor3_2".
+Reading "L5_sky130_fd_sc_hd__or4bb_4".
+Reading "L5_sky130_fd_sc_hd__nor3_1".
+Reading "L5_sky130_fd_sc_hd__or4b_4".
+Reading "L5_sky130_fd_sc_hd__or3b_4".
+Reading "L5_sky130_fd_sc_hd__a31o_1".
+Reading "L5_sky130_fd_sc_hd__a211o_2".
+Reading "L5_sky130_fd_sc_hd__or2_2".
+Reading "L5_sky130_fd_sc_hd__a31o_2".
+Reading "L5_sky130_fd_sc_hd__a221o_1".
+Reading "L5_sky130_fd_sc_hd__and4b_4".
+Reading "L5_sky130_fd_sc_hd__and3_4".
+Reading "L5_sky130_fd_sc_hd__mux2_8".
+Reading "L5_sky130_fd_sc_hd__o21ai_2".
+Reading "L5_sky130_fd_sc_hd__and4b_1".
+Reading "L5_sky130_fd_sc_hd__or4b_1".
+Reading "L5_sky130_fd_sc_hd__o211a_4".
+Reading "L5_sky130_fd_sc_hd__a32o_1".
+Reading "L5_sky130_fd_sc_hd__a21boi_1".
+Reading "L5_sky130_fd_sc_hd__o41ai_4".
+Reading "L5_sky130_fd_sc_hd__o31a_2".
+Reading "L5_sky130_fd_sc_hd__nand2_4".
+Reading "L5_sky130_fd_sc_hd__a31oi_4".
+Reading "L5_sky130_fd_sc_hd__and4_2".
+Reading "L5_sky130_fd_sc_hd__nand3_4".
+Reading "L5_sky130_fd_sc_hd__and4b_2".
+Reading "L5_sky130_fd_sc_hd__o41a_4".
+Reading "L5_sky130_fd_sc_hd__and4bb_2".
+Reading "L5_sky130_fd_sc_hd__clkinv_2".
+Reading "L5_sky130_fd_sc_hd__and2b_2".
+Reading "L5_sky130_fd_sc_hd__or4bb_1".
+Reading "L5_sky130_fd_sc_hd__a21oi_2".
+Reading "L5_sky130_fd_sc_hd__a221oi_1".
+Reading "L5_sky130_fd_sc_hd__a31oi_1".
+Reading "L5_sky130_fd_sc_hd__xor2_4".
+Reading "L5_sky130_fd_sc_hd__clkbuf_1".
+Reading "L5_sky130_fd_sc_hd__nand3b_4".
+Reading "L5_sky130_fd_sc_hd__nand2_2".
+Reading "L5_sky130_fd_sc_hd__xnor2_1".
+Reading "L5_sky130_fd_sc_hd__and2_1".
+Reading "L5_sky130_fd_sc_hd__nor2_4".
+Reading "L5_sky130_fd_sc_hd__nand4_4".
+Reading "L5_sky130_fd_sc_hd__a32o_2".
+Reading "L5_sky130_fd_sc_hd__nor4_1".
+Reading "L5_sky130_fd_sc_hd__nand4_1".
+Reading "L5_sky130_fd_sc_hd__xor2_1".
+Reading "L5_sky130_fd_sc_hd__and4bb_4".
+Reading "L5_sky130_fd_sc_hd__a41o_2".
+Reading "L5_sky130_fd_sc_hd__o2bb2a_1".
+Reading "L5_sky130_fd_sc_hd__xnor2_2".
+Reading "L5_sky130_fd_sc_hd__xor2_2".
+Reading "L5_sky130_fd_sc_hd__or2_4".
+Reading "L5_sky130_fd_sc_hd__a2111oi_2".
+Reading "L5_sky130_fd_sc_hd__nor4_4".
+Reading "L5_sky130_fd_sc_hd__mux2_4".
+Reading "L5_sky130_fd_sc_hd__and2b_1".
+Reading "L5_sky130_fd_sc_hd__and2_2".
+Reading "L5_sky130_fd_sc_hd__nor4b_1".
+Reading "L5_sky130_fd_sc_hd__o2111ai_4".
+Reading "L5_sky130_fd_sc_hd__nor4_2".
+Reading "L5_sky130_fd_sc_hd__nand3b_2".
+Reading "L5_sky130_fd_sc_hd__nand3_1".
+Reading "L5_sky130_fd_sc_hd__nand2b_2".
+Reading "L5_sky130_fd_sc_hd__o31ai_1".
+Reading "L5_sky130_fd_sc_hd__o41a_1".
+Reading "L5_sky130_fd_sc_hd__a21bo_1".
+Reading "L5_sky130_fd_sc_hd__o41ai_1".
+Reading "L5_sky130_fd_sc_hd__nand3b_1".
+Reading "L5_sky130_fd_sc_hd__o2111a_1".
+Reading "L5_sky130_fd_sc_hd__o21a_4".
+Reading "L5_sky130_fd_sc_hd__o22a_1".
+Reading "L5_sky130_fd_sc_hd__or3b_2".
+Reading "L5_sky130_fd_sc_hd__nand2b_1".
+Reading "L5_sky130_fd_sc_hd__nor4b_4".
+Reading "L5_sky130_fd_sc_hd__o21bai_1".
+Reading "L5_sky130_fd_sc_hd__nor3_4".
+Reading "L5_sky130_fd_sc_hd__o41a_2".
+Reading "L5_sky130_fd_sc_hd__or4b_2".
+Reading "L5_sky130_fd_sc_hd__a221o_4".
+Reading "L5_sky130_fd_sc_hd__a2111oi_1".
+Reading "L5_sky130_fd_sc_hd__o31a_4".
+Reading "L5_sky130_fd_sc_hd__nor2_8".
+Reading "L5_sky130_fd_sc_hd__clkinv_4".
+Reading "L5_sky130_fd_sc_hd__a221o_2".
+Reading "L5_sky130_fd_sc_hd__o21ai_4".
+Reading "L5_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "L5_sky130_fd_sc_hd__clkbuf_2".
+Reading "L5_sky130_fd_sc_hd__a31o_4".
+Reading "L5_sky130_fd_sc_hd__ebufn_4".
+Reading "L5_sky130_fd_sc_hd__dlxtp_1".
+Reading "L5_sky130_fd_sc_hd__dlclkp_1".
+Reading "L5_sky130_fd_sc_hd__conb_1".
+Reading "L5_sky130_fd_sc_hd__inv_1".
+Reading "L5_sky130_fd_sc_hd__nor4b_2".
+Reading "L5_sky130_fd_sc_hd__and3b_2".
+Reading "L5_sky130_fd_sc_hd__nor3b_2".
+Reading "L5_RAM256".
+Reading "L5_sky130_fd_sc_hd__a21o_4".
+Reading "L5_sky130_fd_sc_hd__o2111a_4".
+Reading "L5_sky130_fd_sc_hd__a22o_2".
+Reading "L5_sky130_fd_sc_hd__o211ai_4".
+Reading "L5_sky130_fd_sc_hd__o22ai_4".
+Reading "L5_sky130_fd_sc_hd__a221oi_4".
+Reading "L5_sky130_fd_sc_hd__and2b_4".
+Reading "L5_sky130_fd_sc_hd__and3b_4".
+Reading "L5_sky130_fd_sc_hd__and4bb_1".
+Reading "L5_sky130_fd_sc_hd__a21oi_4".
+Reading "L5_sky130_fd_sc_hd__o22ai_1".
+Reading "L5_sky130_fd_sc_hd__inv_4".
+Reading "L5_sky130_fd_sc_hd__a311o_2".
+Reading "L5_sky130_fd_sc_hd__a2111o_1".
+Reading "L5_sky130_fd_sc_hd__o311a_4".
+Reading "L5_sky130_fd_sc_hd__o2111ai_1".
+Reading "L5_sky130_fd_sc_hd__clkinv_8".
+Reading "L5_sky130_fd_sc_hd__nand3_2".
+Reading "L5_sky130_fd_sc_hd__a22oi_1".
+Reading "L5_sky130_fd_sc_hd__nand4b_4".
+Reading "L5_sky130_fd_sc_hd__o221ai_4".
+Reading "L5_sky130_fd_sc_hd__nand4_2".
+Reading "L5_sky130_fd_sc_hd__inv_6".
+Reading "L5_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "L5_sky130_fd_sc_hd__a311oi_4".
+Reading "L5_sky130_fd_sc_hd__o32ai_4".
+Reading "L5_sky130_fd_sc_hd__o211ai_1".
+Reading "L5_sky130_fd_sc_hd__nand4b_1".
+Reading "L5_sky130_fd_sc_hd__o211ai_2".
+Reading "L5_sky130_fd_sc_hd__a22oi_4".
+Reading "L5_sky130_fd_sc_hd__and2_4".
+Reading "L5_sky130_fd_sc_hd__a211oi_4".
+Reading "L5_sky130_fd_sc_hd__nor3b_4".
+Reading "L5_sky130_fd_sc_hd__o22a_2".
+Reading "L5_sky130_fd_sc_hd__a2111oi_4".
+Reading "L5_sky130_fd_sc_hd__nand2b_4".
+Reading "L5_sky130_fd_sc_hd__a2bb2o_4".
+Reading "L5_sky130_fd_sc_hd__o2bb2a_2".
+Reading "L5_sky130_fd_sc_hd__o2111ai_2".
+Reading "L5_sky130_fd_sc_hd__a22oi_2".
+Reading "L5_sky130_fd_sc_hd__nor3b_1".
+Reading "L5_sky130_fd_sc_hd__o2bb2a_4".
+Reading "L5_sky130_fd_sc_hd__o21bai_4".
+Reading "L5_sky130_fd_sc_hd__o311ai_1".
+Reading "L5_sky130_fd_sc_hd__a32oi_2".
+Reading "L5_sky130_fd_sc_hd__o2bb2ai_2".
+Reading "L5_sky130_fd_sc_hd__o311ai_4".
+Reading "L5_sky130_fd_sc_hd__o2bb2ai_4".
+Reading "L5_sky130_fd_sc_hd__o31ai_4".
+Reading "L5_sky130_fd_sc_hd__o221a_2".
+Reading "L5_sky130_fd_sc_hd__o2111a_2".
+Reading "L5_sky130_fd_sc_hd__a31oi_2".
+Reading "L5_sky130_fd_sc_hd__o311a_2".
+Reading "L5_sky130_fd_sc_hd__o22a_4".
+Reading "L5_sky130_fd_sc_hd__a32oi_4".
+Reading "L5_sky130_fd_sc_hd__a211oi_2".
+Reading "L5_sky130_fd_sc_hd__o31ai_2".
+Reading "L5_sky130_fd_sc_hd__o221ai_1".
+Reading "L5_sky130_fd_sc_hd__clkinv_16".
+Reading "L5_sky130_fd_sc_hd__or4bb_2".
+Reading "L5_sky130_fd_sc_hd__a221oi_2".
+Reading "L5_sky130_fd_sc_hd__inv_8".
+Reading "L5_sky130_fd_sc_hd__a311oi_2".
+Reading "L5_sky130_fd_sc_hd__a311oi_1".
+Reading "L5_sky130_fd_sc_hd__o311ai_2".
+Reading "L5_sky130_fd_sc_hd__a32oi_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2oi_2".
+Reading "L5_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "L5_sky130_fd_sc_hd__xnor2_4".
+Reading "L5_sky130_fd_sc_hd__inv_12".
+Reading "L5_sky130_fd_sc_hd__a2111o_4".
+Reading "L5_sky130_fd_sc_hd__a32o_4".
+Reading "L5_sky130_fd_sc_hd__o21ba_2".
+Reading "L5_sky130_fd_sc_hd__a41oi_2".
+Reading "L5_sky130_fd_sc_hd__o22ai_2".
+Reading "L5_sky130_fd_sc_hd__o21bai_2".
+Reading "L5_sky130_fd_sc_hd__a41oi_4".
+Reading "L5_sky130_fd_sc_hd__a41o_4".
+Reading "L5_sky130_fd_sc_hd__a311o_4".
+Reading "L5_sky130_fd_sc_hd__o32ai_1".
+Reading "L5_sky130_fd_sc_hd__a21boi_4".
+Reading "L5_sky130_fd_sc_hd__o32ai_2".
+Reading "L5_sky130_fd_sc_hd__a21bo_2".
+Reading "L5_RAM128".
+Reading "mgmt_core_wrapper".
+Reading "gpio_defaults_block_0403".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__dfbbp_1".
+Reading "spare_logic_block".
+Reading "sky130_fd_sc_hd__bufbuf_8".
+Reading "sky130_fd_sc_hvl__conb_1".
+Reading "mgmt_protect_hv".
+Reading "mprj_logic_high".
+Reading "mprj2_logic_high".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "mgmt_protect".
+Reading "gpio_defaults_block_0801".
+Reading "gpio_control_power_routing_top".
+Reading "gpio_control_power_routing_right".
+Reading "gpio_control_power_routing".
+Reading "caravel_power_routing".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_12".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_11".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_15".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_28".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_29".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_16".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_13".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_14".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv".
+Reading "SY_sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec".
+Reading "SY_sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sli_dactive".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w0_550_sli_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_22".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_21".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_23".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w2_880_sli_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_17".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_20".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_7".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_19".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_replica".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_dummy".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_0".
+Reading "SY_sky130_fd_bd_sram__openram_write_driver".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_1".
+Reading "SY_sky130_fd_bd_sram__openram_sense_amp".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_24".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_25".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_26".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_27".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode3x8".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m14_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m14_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m41_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m41_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m15_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m15_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m42_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m42_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_15".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dactive".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_16".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m24_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m24_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_3".
+Reading "SY_sky130_fd_bd_sram__openram_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_bitcell_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_replica_column".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_replica_column_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dummy_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_8".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_9".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_write_driver_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_write_mask_and_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_sense_amp_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_decoder".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand2_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_18".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_19".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_20".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_7".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_8".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_9".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_10".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_5".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_11".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_12".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_13".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_14".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_replica_bitcell_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_data".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_data_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_address".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_address_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_6".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_delay_chain".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_32".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_33".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_bank".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_cr_4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_r".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_cr_5".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_rw".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_data_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_col_addr_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_cr_3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_wmask_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_row_addr_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_38".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_39".
+Reading "SY_sky130_fd_sc_hd__a22o_2".
+Reading "SY_sky130_fd_sc_hd__a22o_1".
+Reading "SY_sky130_fd_sc_hd__or3b_1".
+Reading "SY_sky130_fd_sc_hd__clkinv_2".
+Reading "SY_sky130_fd_sc_hd__nor2_1".
+Reading "SY_sky130_fd_sc_hd__clkbuf_8".
+Reading "SY_sky130_fd_sc_hd__clkbuf_2".
+Reading "SY_sky130_fd_sc_hd__and2_1".
+Reading "SY_sky130_fd_sc_hd__or3_1".
+Reading "SY_sky130_fd_sc_hd__or2_1".
+Reading "SY_sky130_fd_sc_hd__clkdlybuf4s18_2".
+Reading "SY_sky130_fd_sc_hd__or4_1".
+Reading "SY_sky130_fd_sc_hd__inv_2".
+Reading "SY_sky130_fd_sc_hd__o22a_2".
+Reading "SY_sky130_fd_sc_hd__o22a_1".
+Reading "SY_sky130_fd_sc_hd__o21a_1".
+Reading "SY_sky130_fd_sc_hd__buf_12".
+Reading "SY_sky130_fd_sc_hd__dfxtp_1".
+Reading "SY_sky130_fd_sc_hd__clkbuf_16".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8".
+Reading "SY_sky130_fd_sc_hd__buf_2".
+Reading "SY_sky130_fd_sc_hd__buf_1".
+Reading "SY_sky130_fd_sc_hd__conb_1".
+Reading "SY_sky130_fd_sc_hd__nand3b_1".
+Reading "SY_sky130_fd_sc_hd__clkdlybuf4s15_2".
+Reading "SY_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "SY_sky130_fd_sc_hd__diode_2".
+Reading "SY_sky130_fd_sc_hd__fill_2".
+Reading "SY_sky130_fd_sc_hd__buf_4".
+Reading "SY_sky130_fd_sc_hd__clkbuf_4".
+Reading "SY_sky130_fd_sc_hd__clkdlybuf4s25_1".
+Reading "SY_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "SY_sky130_fd_sc_hd__decap_6".
+Reading "SY_sky130_fd_sc_hd__decap_8".
+Reading "SY_sky130_fd_sc_hd__decap_12".
+Reading "SY_sky130_fd_sc_hd__buf_6".
+Reading "SY_sky130_fd_sc_hd__mux2_2".
+Reading "SY_sky130_fd_sc_hd__decap_3".
+Reading "SY_sky130_fd_sc_hd__fill_1".
+Reading "SY_sky130_fd_sc_hd__decap_4".
+Reading "user_project_wrapper".
+Reading "sky130_ef_io__com_bus_slice_20um".
+Reading "sky130_fd_io__corner_bus_overlay".
+Reading "sky130_ef_io__corner_pad".
+Reading "sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um".
+Reading "sky130_ef_io__com_bus_slice_1um".
+Reading "sky130_ef_io__com_bus_slice_5um".
+Reading "sky130_ef_io__com_bus_slice_10um".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180851".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808664".
+Reading "sky130_fd_io__sio_clamp_pcap_4x5".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808680".
+Reading "sky130_fd_io__esd_rcclamp_nfetcap".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808336".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808666".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808665".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808678".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808679".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808677".
+Reading "sky130_fd_pr__via_pol1__example_5595914180839".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808667".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808671".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808672".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808673".
+Reading "sky130_fd_pr__dfl1__example_55959141808663".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808660".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808670".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808668".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808675".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808676".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808674".
+Reading "sky130_fd_pr__dfl1__example_55959141808662".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808661".
+Reading "sky130_fd_pr__via_l1m1__example_559591418084".
+Reading "sky130_fd_pr__genrivetdlring__example_559591418082".
+Reading "sky130_fd_pr__gendlring__example_559591418081".
+Reading "sky130_fd_pr__padplhp__example_559591418080".
+Reading "sky130_fd_io__pad_esd".
+Reading "sky130_fd_io__com_bus_slice".
+Reading "sky130_fd_io__com_bus_hookup".
+Reading "sky130_fd_io__com_busses_esd".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808669".
+Reading "sky130_fd_io__top_ground_hvc_wpad".
+Reading "sky130_fd_io__overlay_vssa_hvc".
+Reading "sky130_ef_io__hvc_vdda_overlay".
+Reading "sky130_ef_io__vssa_hvc_clamped_pad".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808719".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808767".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808765".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808764".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808720".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808718".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808717".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808716".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808243".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808723".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808722".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180890".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808721".
+Reading "sky130_fd_io__xres_inv_hysv2".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180838".
+Reading "sky130_fd_io__tk_tie_r_out_esd".
+Reading "sky130_fd_io__res250_sub_small".
+Reading "sky130_fd_io__res250only_small".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808264".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180858".
+Reading "sky130_fd_pr__via_pol1__example_5595914180833".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180864".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808715".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180863".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180862".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808288".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180859".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808289".
+Reading "sky130_fd_io__com_res_weak_v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808274".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808728".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808727".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808726".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808725".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808724".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808554".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808553".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808552".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808551".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808402".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808350".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808261".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808260".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808259".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808400".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808372".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808326".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808290".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808128".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808127".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180897".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180819".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808555".
+Reading "sky130_fd_pr__via_pol1__example_55959141808147".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808157".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808156".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808155".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808154".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808153".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808152".
+Reading "sky130_fd_pr__tpl1__example_55959141808151".
+Reading "sky130_fd_pr__tpl1__example_55959141808150".
+Reading "sky130_fd_pr__tpl1__example_55959141808149".
+Reading "sky130_fd_pr__tpl1__example_55959141808148".
+Reading "sky130_fd_pr__dfl1__example_55959141808158".
+Reading "sky130_fd_io__signal_5_sym_hv_local_5term".
+Reading "sky130_fd_io__gpio_buf_localesdv2".
+Reading "sky130_fd_pr__via_pol1__example_559591418083".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808137".
+Reading "sky130_fd_pr__dfl1sd__example_559591418086".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808371".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808370".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808369".
+Reading "sky130_fd_io__hvsbt_inv_x1".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808316".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808421".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808385".
+Reading "sky130_fd_pr__dfl1sd__example_559591418088".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808422".
+Reading "sky130_fd_io__hvsbt_inv_x2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808612".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808616".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808615".
+Reading "sky130_fd_io__hvsbt_inv_x4".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180848".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180849".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808766".
+Reading "sky130_fd_pr__via_m2m3__example_55959141808714".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418081".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808652".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808653".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180812".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180811".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418086".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418084".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808659".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808658".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808657".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808202".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pudrvr_strong_axres4v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808273".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808740".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808739".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808738".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808737".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808736".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808735".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808734".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808733".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808732".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808731".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808730".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808752".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808751".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808750".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808749".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808748".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808747".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808746".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808745".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808744".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808743".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808742".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808741".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808324".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808270".
+Reading "sky130_fd_pr__dfl1__example_55959141808187".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808755".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808754".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808338".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808337".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808763".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808700".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808559".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808762".
+Reading "sky130_fd_pr__dfl1__example_55959141808729".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759".
+Reading "sky130_fd_io__xres_p_em1c_cdns_55959141808753".
+Reading "sky130_fd_io__xres2v2_rcfilter_lpfv2".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180860".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180861".
+Reading "sky130_fd_io__com_res_weak_bentbigres".
+Reading "sky130_fd_io__com_res_weak".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180857".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808649".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808651".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808650".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808648".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808646".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808647".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808645".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808378".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_xres4v2".
+Reading "sky130_fd_io__top_gpio_pad".
+Reading "sky130_fd_io__com_busses".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808768".
+Reading "sky130_fd_pr__res_bent_nd__example_55959141808769".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808787".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808786".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808782".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808785".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808449".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808784".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808452".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808783".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808781".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808780".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808779".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808233".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180827".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808778".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180835".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808777".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808776".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808775".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808242".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808774".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180829".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808773".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808237".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808772".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808771".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808770".
+Reading "sky130_fd_io__tap_1".
+Reading "sky130_fd_io__inv_1".
+Reading "sky130_fd_pr__pfet_01v8__example_559591418085".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418089".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418087".
+Reading "sky130_fd_io__hvsbt_nand2".
+Reading "sky130_fd_io__xres4v2_in_buf".
+Reading "sky130_fd_io__top_xres4v2".
+Reading "sky130_fd_sc_hd__fill_4".
+Reading "sky130_fd_sc_hd__fill_8".
+Reading "constant_block".
+Reading "sky130_fd_io__res75only_small".
+Reading "sky130_fd_io__com_bus_slice_m4".
+Reading "sky130_fd_io__overlay_gpiov2_m4".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808420".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808419".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808418".
+Reading "sky130_fd_io__hvsbt_nor".
+Reading "sky130_fd_io__hvsbt_nand2v2".
+Reading "sky130_fd_io__gpiov2_ictl_logic".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808190".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808611".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180811".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808549".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808548".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808191".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808189".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808517".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808518".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808610".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808609".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180815".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180816".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808608".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808604".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808533".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808529".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180884".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808230".
+Reading "sky130_fd_io__gpiov2_in_buf".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808537".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808106".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808481".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808607".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808504".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808600".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808550".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808528".
+Reading "sky130_fd_io__gpiov2_ipath_hvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808595".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180825".
+Reading "sky130_fd_io__gpiov2_inbuf_lvinv_x1".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180812".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808599".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808598".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808597".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808596".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808547".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808546".
+Reading "sky130_fd_io__gpiov2_ipath_lvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808606".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180875".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808605".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808540".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808603".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808602".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808601".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808535".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808527".
+Reading "sky130_fd_io__gpiov2_vcchib_in_buf".
+Reading "sky130_fd_io__gpiov2_ibuf_se".
+Reading "sky130_fd_io__gpiov2_buf_localesd".
+Reading "sky130_fd_io__gpiov2_ipath".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808438".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808439".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180882".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180881".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180880".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180879".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808430".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180823".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180822".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180813".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808624".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808510".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808623".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808622".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808621".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808620".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808619".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808618".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808116".
+Reading "sky130_fd_io__com_ctl_lsv2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808394".
+Reading "sky130_fd_pr__via_pol1__example_55959141808298".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808440".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180878".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808434".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808435".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808433".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808432".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808102".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808431".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808115".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808429".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808428".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808100".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808140".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808427".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808426".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808280".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808425".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808424".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808423".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808306".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808383".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808382".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808380".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808379".
+Reading "sky130_fd_io__com_ctl_ls_v2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808617".
+Reading "sky130_fd_io__com_ctl_ls_en_1_v2".
+Reading "sky130_fd_io__com_ctl_ls_1v2".
+Reading "sky130_fd_io__gpiov2_ctl_lsbank".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808614".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808613".
+Reading "sky130_fd_io__hvsbt_inv_x8v2".
+Reading "sky130_fd_io__hvsbt_inv_x8".
+Reading "sky130_fd_io__com_ctl_ls".
+Reading "sky130_fd_io__com_ctl_hldv2".
+Reading "sky130_fd_io__gpiov2_ctl".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808178".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808591".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808594".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808593".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808488".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808592".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808586".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808122".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808123".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808477".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808476".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808475".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808589".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808570".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808569".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808588".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808587".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808590".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808460".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808468".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808467".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808466".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808465".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808464".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808463".
+Reading "sky130_fd_io__gpiov2_amux_ctl_ls".
+Reading "sky130_fd_io__gpiov2_amux_ctl_inv_1".
+Reading "sky130_fd_io__gpiov2_amux_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808573".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808572".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808579".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808578".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808577".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808576".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808566".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180868".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180869".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808565".
+Reading "sky130_fd_io__gpiov2_amx_pucsd_inv".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808441".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808571".
+Reading "sky130_fd_io__gpiov2_amx_inv4".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808567".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808568".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv2".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808581".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808580".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808278".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808462".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808583".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808582".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808498".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808497".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808496".
+Reading "sky130_fd_io__gpiov2_amux_drvr_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808574".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808575".
+Reading "sky130_fd_io__amx_inv1".
+Reading "sky130_fd_io__gpiov2_amux_drvr".
+Reading "sky130_fd_io__xor2_1".
+Reading "sky130_fd_io__nor2_1".
+Reading "sky130_fd_io__nand2_1".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808200".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808457".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808451".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808450".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180894".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808584".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808455".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808447".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808445".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808248".
+Reading "sky130_fd_io__gpiov2_amux_nand5".
+Reading "sky130_fd_pr__dfm1sd__example_55959141808258".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808585".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808446".
+Reading "sky130_fd_io__gpiov2_amux_nand4".
+Reading "sky130_fd_io__gpiov2_amux_decoder".
+Reading "sky130_fd_io__gpiov2_amux_ctl_logic".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808563".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808564".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808562".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808251".
+Reading "sky130_fd_pr__dfm1sd2__example_55959141808561".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808560".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808558".
+Reading "sky130_fd_io__amux_switch_1v2b".
+Reading "sky130_fd_io__gpiov2_amux".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808416".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808417".
+Reading "sky130_fd_io__hvsbt_xorv2".
+Reading "sky130_fd_io__hvsbt_xor".
+Reading "sky130_fd_io__com_ctl_ls_octl".
+Reading "sky130_fd_io__gpiov2_octl".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808267".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808266".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808642".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808184".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808141".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808643".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808183".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808139".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808636".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808635".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808634".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808633".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808632".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808630".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808638".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808637".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr3".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808629".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808628".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808627".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808626".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808354".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808631".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180888".
+Reading "sky130_fd_io__gpiov2_octl_mux".
+Reading "sky130_fd_pr__via_pol1__example_55959141808322".
+Reading "sky130_fd_pr__via_pol1__example_55959141808321".
+Reading "sky130_fd_pr__via_pol1__example_55959141808320".
+Reading "sky130_fd_pr__via_pol1__example_55959141808294".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808325".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808323".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808291".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808641".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808640".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808639".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808348".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808347".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808194".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808346".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808345".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808344".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808343".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808334".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808333".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808332".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808331".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808330".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808329".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808304".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808134".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808328".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808327".
+Reading "sky130_fd_io__com_pdpredrvr_pbiasv2".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong".
+Reading "sky130_fd_pr__via_pol1__example_55959141808272".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808271".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808143".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808142".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808101".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808144".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_5595914180899".
+Reading "sky130_fd_pr__via_pol1__example_55959141808275".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808276".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808286".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808285".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808284".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808283".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808644".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808287".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808282".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808281".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808297".
+Reading "sky130_fd_pr__via_pol1__example_55959141808296".
+Reading "sky130_fd_pr__via_pol1__example_55959141808295".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808293".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808292".
+Reading "sky130_fd_pr__tpl1__example_55959141808300".
+Reading "sky130_fd_pr__tpl1__example_55959141808299".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808319".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808318".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808317".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808315".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808314".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808313".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808312".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808311".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808310".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808309".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808308".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808307".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808305".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808303".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808301".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808302".
+Reading "sky130_fd_io__feascom_pupredrvr_nbiasv2".
+Reading "sky130_fd_io__gpio_pupredrvr_strongv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808361".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808360".
+Reading "sky130_fd_io__feas_com_pupredrvr_weak".
+Reading "sky130_fd_pr__via_pol1__example_5595914180854".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808363".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808362".
+Reading "sky130_fd_io__com_pupredrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808366".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808365".
+Reading "sky130_fd_io__com_pdpredrvr_weakv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808364".
+Reading "sky130_fd_io__com_pdpredrvr_strong_slowv2".
+Reading "sky130_fd_io__gpiov2_obpredrvr".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808368".
+Reading "sky130_fd_pr__tpl1__example_55959141808625".
+Reading "sky130_fd_pr__via_pol1__example_55959141808373".
+Reading "sky130_fd_pr__tpl1__example_55959141808374".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808393".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808392".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808391".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808390".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808389".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808388".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808387".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808386".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808384".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808381".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808377".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808376".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808375".
+Reading "sky130_fd_io__gpio_dat_lsv2".
+Reading "sky130_fd_io__gpio_dat_ls_1v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808398".
+Reading "sky130_fd_pr__via_pol1__example_55959141808397".
+Reading "sky130_fd_pr__via_pol1__example_55959141808396".
+Reading "sky130_fd_pr__via_pol1__example_55959141808395".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808401".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808399".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808269".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808410".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808409".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808408".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808407".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808406".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808405".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808404".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808403".
+Reading "sky130_fd_io__com_cclat".
+Reading "sky130_fd_io__com_opath_datoev2".
+Reading "sky130_fd_io__gpiov2_octl_dat".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418080".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180832".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180856".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180855".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180853".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180852".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418083".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418082".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpiov2_pddrvr_strong".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418085".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpio_pudrvr_strongv2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180850".
+Reading "sky130_fd_io__gpio_pddrvr_weakv2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808656".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808655".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808654".
+Reading "sky130_fd_io__com_pudrvr_weakv2".
+Reading "sky130_fd_io__com_pudrvr_strong_slowv2".
+Reading "sky130_fd_io__gpio_odrvr_subv2".
+Reading "sky130_fd_io__gpio_odrvrv2".
+Reading "sky130_fd_io__gpio_opathv2".
+Reading "sky130_fd_io__top_gpiov2".
+Reading "sky130_fd_io__overlay_gpiov2".
+Reading "sky130_ef_io__gpiov2_pad".
+Reading "sky130_ef_io__gpiov2_pad_wrapped".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808691".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808687".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808684".
+Reading "sky130_fd_pr__tpl1__example_55959141808686".
+Reading "sky130_fd_pr__tpl1__example_55959141808685".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808683".
+Reading "sky130_fd_io__gnd2gnd_strap".
+Reading "sky130_fd_io__gnd2gnd_tap".
+Reading "sky130_fd_io__gnd2gnd_diff".
+Reading "sky130_fd_io__gnd2gnd_sub_dnwl".
+Reading "sky130_fd_io__gnd2gnd_120x2_lv_isosub".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808690".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808702".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808705".
+Reading "sky130_fd_pr__dfl1__example_55959141808682".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808694".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808693".
+Reading "sky130_fd_pr__dfl1__example_55959141808681".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808688".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808699".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808698".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808697".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808696".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808695".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808704".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808703".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808701".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808689".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808692".
+Reading "sky130_fd_io__top_ground_lvc_wpad".
+Reading "sky130_fd_io__overlay_vssd_lvc".
+Reading "sky130_ef_io__lvc_vccdx_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped_pad".
+Reading "sky130_fd_io__overlay_vssio_hvc".
+Reading "sky130_ef_io__hvc_vssio_overlay".
+Reading "sky130_ef_io__vssio_hvc_clamped_pad".
+Reading "sky130_fd_io__hvc_clampv2".
+Reading "sky130_fd_io__top_power_hvc_wpadv2".
+Reading "sky130_fd_io__overlay_vdda_hvc".
+Reading "sky130_ef_io__vdda_hvc_clamped_pad".
+Reading "sky130_fd_io__top_power_lvc_wpad".
+Reading "sky130_fd_io__overlay_vccd_lvc".
+Reading "sky130_ef_io__vccd_lvc_clamped_pad".
+Reading "sky130_ef_io__disconnect_vdda_slice_5um".
+Reading "sky130_fd_io__overlay_vddio_hvc".
+Reading "sky130_ef_io__hvc_vddio_overlay".
+Reading "sky130_ef_io__vddio_hvc_clamped_pad".
+Reading "chip_io_gpio_connects".
+Reading "sky130_ef_io__lvc_vccdy_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped3_pad".
+Reading "sky130_ef_io__vccd_lvc_clamped3_pad".
+Reading "chip_io".
+Reading "gpio_signal_buffering".
+Reading "caravel".
+   Generating output for cell caravel_0006b498
+Ended: 11/16/2022 02:15:28
diff --git a/tapeout/logs/fill_final.log b/tapeout/logs/fill_final.log
new file mode 100644
index 0000000..9cec9d1
--- /dev/null
+++ b/tapeout/logs/fill_final.log
@@ -0,0 +1,114 @@
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_final.tcl" from command line.
+CIF output style is now "wafflefill(tiled)"
+Writing final GDS
+   Generating output for cell caravel_0006b498_fill_pattern_0_0
+Reading "caravel_0006b498_fill_pattern_0_0".
+   Generating output for cell caravel_0006b498_fill_pattern_1_0
+Reading "caravel_0006b498_fill_pattern_1_0".
+   Generating output for cell caravel_0006b498_fill_pattern_0_1
+Reading "caravel_0006b498_fill_pattern_0_1".
+   Generating output for cell caravel_0006b498_fill_pattern_1_1
+Reading "caravel_0006b498_fill_pattern_1_1".
+   Generating output for cell caravel_0006b498_fill_pattern_2_0
+Reading "caravel_0006b498_fill_pattern_2_0".
+   Generating output for cell caravel_0006b498_fill_pattern_2_1
+Reading "caravel_0006b498_fill_pattern_2_1".
+   Generating output for cell caravel_0006b498_fill_pattern_3_0
+Reading "caravel_0006b498_fill_pattern_3_0".
+   Generating output for cell caravel_0006b498_fill_pattern_3_1
+Reading "caravel_0006b498_fill_pattern_3_1".
+   Generating output for cell caravel_0006b498_fill_pattern_4_0
+Reading "caravel_0006b498_fill_pattern_4_0".
+   Generating output for cell caravel_0006b498_fill_pattern_4_1
+Reading "caravel_0006b498_fill_pattern_4_1".
+   Generating output for cell caravel_0006b498_fill_pattern_5_0
+Reading "caravel_0006b498_fill_pattern_5_0".
+   Generating output for cell caravel_0006b498_fill_pattern_5_1
+Reading "caravel_0006b498_fill_pattern_5_1".
+   Generating output for cell caravel_0006b498_fill_pattern_0_2
+Reading "caravel_0006b498_fill_pattern_0_2".
+   Generating output for cell caravel_0006b498_fill_pattern_1_2
+Reading "caravel_0006b498_fill_pattern_1_2".
+   Generating output for cell caravel_0006b498_fill_pattern_2_2
+Reading "caravel_0006b498_fill_pattern_2_2".
+   Generating output for cell caravel_0006b498_fill_pattern_3_2
+Reading "caravel_0006b498_fill_pattern_3_2".
+   Generating output for cell caravel_0006b498_fill_pattern_4_2
+Reading "caravel_0006b498_fill_pattern_4_2".
+   Generating output for cell caravel_0006b498_fill_pattern_5_2
+Reading "caravel_0006b498_fill_pattern_5_2".
+   Generating output for cell caravel_0006b498_fill_pattern_0_3
+Reading "caravel_0006b498_fill_pattern_0_3".
+   Generating output for cell caravel_0006b498_fill_pattern_1_3
+Reading "caravel_0006b498_fill_pattern_1_3".
+   Generating output for cell caravel_0006b498_fill_pattern_2_3
+Reading "caravel_0006b498_fill_pattern_2_3".
+   Generating output for cell caravel_0006b498_fill_pattern_3_3
+Reading "caravel_0006b498_fill_pattern_3_3".
+   Generating output for cell caravel_0006b498_fill_pattern_4_3
+Reading "caravel_0006b498_fill_pattern_4_3".
+   Generating output for cell caravel_0006b498_fill_pattern_5_3
+Reading "caravel_0006b498_fill_pattern_5_3".
+   Generating output for cell caravel_0006b498_fill_pattern_0_4
+Reading "caravel_0006b498_fill_pattern_0_4".
+   Generating output for cell caravel_0006b498_fill_pattern_1_4
+Reading "caravel_0006b498_fill_pattern_1_4".
+   Generating output for cell caravel_0006b498_fill_pattern_2_4
+Reading "caravel_0006b498_fill_pattern_2_4".
+   Generating output for cell caravel_0006b498_fill_pattern_3_4
+Reading "caravel_0006b498_fill_pattern_3_4".
+   Generating output for cell caravel_0006b498_fill_pattern_4_4
+Reading "caravel_0006b498_fill_pattern_4_4".
+   Generating output for cell caravel_0006b498_fill_pattern_5_4
+Reading "caravel_0006b498_fill_pattern_5_4".
+   Generating output for cell caravel_0006b498_fill_pattern_0_5
+Reading "caravel_0006b498_fill_pattern_0_5".
+   Generating output for cell caravel_0006b498_fill_pattern_1_5
+Reading "caravel_0006b498_fill_pattern_1_5".
+   Generating output for cell caravel_0006b498_fill_pattern_2_5
+Reading "caravel_0006b498_fill_pattern_2_5".
+   Generating output for cell caravel_0006b498_fill_pattern_3_5
+Reading "caravel_0006b498_fill_pattern_3_5".
+   Generating output for cell caravel_0006b498_fill_pattern_4_5
+Reading "caravel_0006b498_fill_pattern_4_5".
+   Generating output for cell caravel_0006b498_fill_pattern_5_5
+Reading "caravel_0006b498_fill_pattern_5_5".
+   Generating output for cell caravel_0006b498_fill_pattern_0_6
+Reading "caravel_0006b498_fill_pattern_0_6".
+   Generating output for cell caravel_0006b498_fill_pattern_1_6
+Reading "caravel_0006b498_fill_pattern_1_6".
+   Generating output for cell caravel_0006b498_fill_pattern_2_6
+Reading "caravel_0006b498_fill_pattern_2_6".
+   Generating output for cell caravel_0006b498_fill_pattern_3_6
+Reading "caravel_0006b498_fill_pattern_3_6".
+   Generating output for cell caravel_0006b498_fill_pattern_4_6
+Reading "caravel_0006b498_fill_pattern_4_6".
+   Generating output for cell caravel_0006b498_fill_pattern_5_6
+Reading "caravel_0006b498_fill_pattern_5_6".
+   Generating output for cell caravel_0006b498_fill_pattern_0_7
+Reading "caravel_0006b498_fill_pattern_0_7".
+   Generating output for cell caravel_0006b498_fill_pattern_1_7
+Reading "caravel_0006b498_fill_pattern_1_7".
+   Generating output for cell caravel_0006b498_fill_pattern_2_7
+Reading "caravel_0006b498_fill_pattern_2_7".
+   Generating output for cell caravel_0006b498_fill_pattern_3_7
+Reading "caravel_0006b498_fill_pattern_3_7".
+   Generating output for cell caravel_0006b498_fill_pattern_4_7
+Reading "caravel_0006b498_fill_pattern_4_7".
+   Generating output for cell caravel_0006b498_fill_pattern_5_7
+Reading "caravel_0006b498_fill_pattern_5_7".
+   Generating output for cell caravel_0006b498_fill_pattern
+Ended: 11/16/2022 02:14:23
diff --git a/tapeout/logs/fill_initial.log b/tapeout/logs/fill_initial.log
new file mode 100644
index 0000000..64ca4ab
--- /dev/null
+++ b/tapeout/logs/fill_initial.log
@@ -0,0 +1,1735 @@
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill.tcl" from command line.
+Started: 11/16/2022 01:27:51
+Warning: Calma reading is not undoable!  I hope that's OK.
+Library written using GDS-II Release 3.0
+Library name: caravel
+Reading "caravel_logo".
+Reading "font_22".
+Reading "font_73".
+Reading "font_43".
+Reading "font_49".
+Reading "font_65".
+Reading "font_68".
+Reading "font_54".
+Reading "font_67".
+Reading "font_6E".
+Reading "font_69".
+Reading "font_6C".
+Reading "font_61".
+Reading "font_53".
+Reading "caravel_motto".
+Reading "font_79".
+Reading "font_76".
+Reading "font_74".
+Reading "font_72".
+Reading "font_70".
+Reading "font_66".
+Reading "font_63".
+Reading "font_62".
+Reading "font_57".
+Reading "font_56".
+Reading "font_50".
+Reading "font_47".
+Reading "font_44".
+Reading "font_35".
+Reading "font_32".
+Reading "font_30".
+Reading "font_29".
+Reading "font_28".
+Reading "font_20".
+Reading "font_6F".
+Reading "font_6B".
+Reading "font_4F".
+Reading "font_4B".
+Reading "font_2D".
+Reading "copyright_block".
+Reading "open_source".
+Reading "sky130_fd_sc_hvl__decap_8".
+CIF file read warning: CIF style sky130(vendor): units rescaled by factor of 5 / 1
+Reading "sky130_fd_sc_hvl__decap_4".
+Reading "sky130_fd_sc_hvl__diode_2".
+Reading "sky130_fd_sc_hvl__fill_1".
+Reading "sky130_fd_sc_hvl__fill_2".
+Reading "sky130_fd_sc_hvl__lsbufhv2lv_1".
+Reading "xres_buf".
+Reading "alpha_6".
+Reading "alpha_B".
+Reading "alpha_4".
+Reading "alpha_9".
+Reading "alpha_8".
+Reading "alpha_0".
+Reading "user_id_textblock".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "gpio_defaults_block_1803".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__nand4bb_1".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a41oi_1".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__dfstp_1".
+Reading "sky130_fd_sc_hd__dfrtp_4".
+Reading "sky130_fd_sc_hd__dfrtn_1".
+Reading "sky130_fd_sc_hd__dfstp_2".
+Reading "sky130_fd_sc_hd__dfrtp_1".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dfrtp_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "caravel_clocking".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "buff_flash_clkrst".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__macro_sparecell".
+Reading "sky130_fd_sc_hd__dfbbn_2".
+Reading "sky130_fd_sc_hd__or2_0".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__and2_0".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__buf_16".
+Reading "gpio_logic_high".
+Reading "gpio_control_block".
+Reading "sky130_fd_sc_hd__dfstp_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__a2111o_2".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+CIF file read warning: Input off lambda grid by 2/5; snapped to grid.
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o221a_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "housekeeping".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+Reading "sky130_fd_sc_hd__einvp_1".
+Reading "sky130_fd_sc_hd__clkinv_1".
+Reading "sky130_fd_sc_hd__einvn_4".
+Reading "sky130_fd_sc_hd__einvn_8".
+Reading "sky130_fd_sc_hd__einvp_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__a21boi_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__nand4b_2".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__o32a_2".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "digital_pll".
+Reading "user_id_programming".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "YV_sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "YV_sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "YV_sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "YV_sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "YV_sky130_fd_sc_hvl__schmittbuf_1".
+Reading "YV_sky130_fd_sc_hvl__buf_8".
+Reading "YV_sky130_fd_sc_hvl__inv_8".
+Reading "YV_sky130_fd_sc_hvl__fill_4".
+Reading "YV_sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "YV_sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "YV_sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+Reading "L5_sky130_fd_sc_hd__decap_3".
+Reading "L5_sky130_ef_sc_hd__decap_12".
+Reading "L5_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "L5_sky130_fd_sc_hd__fill_1".
+Reading "L5_sky130_fd_sc_hd__decap_4".
+Reading "L5_sky130_fd_sc_hd__decap_6".
+Reading "L5_sky130_fd_sc_hd__fill_2".
+Reading "L5_sky130_fd_sc_hd__decap_8".
+Reading "L5_sky130_fd_sc_hd__diode_2".
+Reading "L5_sky130_fd_sc_hd__clkbuf_16".
+Reading "L5_sky130_fd_sc_hd__o211a_1".
+Reading "L5_sky130_fd_sc_hd__dfxtp_2".
+Reading "L5_sky130_fd_sc_hd__o21a_1".
+Reading "L5_sky130_fd_sc_hd__mux2_1".
+Reading "L5_sky130_fd_sc_hd__or2_1".
+Reading "L5_sky130_fd_sc_hd__dfxtp_1".
+Reading "L5_sky130_fd_sc_hd__a22o_1".
+Reading "L5_sky130_fd_sc_hd__a21o_2".
+Reading "L5_sky130_fd_sc_hd__a21o_1".
+Reading "L5_sky130_fd_sc_hd__a22o_4".
+Reading "L5_sky130_fd_sc_hd__buf_8".
+Reading "L5_sky130_fd_sc_hd__o21a_2".
+Reading "L5_sky130_fd_sc_hd__mux2_2".
+Reading "L5_sky130_fd_sc_hd__buf_4".
+Reading "L5_sky130_fd_sc_hd__clkbuf_8".
+Reading "L5_sky130_fd_sc_hd__buf_6".
+Reading "L5_sky130_fd_sc_hd__dfxtp_4".
+Reading "L5_sky130_fd_sc_hd__buf_2".
+Reading "L5_sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "L5_sky130_fd_sc_hd__o21ai_1".
+Reading "L5_sky130_fd_sc_hd__mux4_1".
+Reading "L5_sky130_fd_sc_hd__buf_12".
+Reading "L5_sky130_fd_sc_hd__mux4_2".
+Reading "L5_sky130_fd_sc_hd__inv_2".
+Reading "L5_sky130_fd_sc_hd__and3_2".
+Reading "L5_sky130_fd_sc_hd__nand2_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2o_1".
+Reading "L5_sky130_fd_sc_hd__or3b_1".
+Reading "L5_sky130_fd_sc_hd__o32a_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2o_2".
+Reading "L5_sky130_fd_sc_hd__o311a_1".
+Reading "L5_sky130_fd_sc_hd__o221a_1".
+Reading "L5_sky130_fd_sc_hd__o31a_1".
+Reading "L5_sky130_fd_sc_hd__o211a_2".
+Reading "L5_sky130_fd_sc_hd__and3_1".
+Reading "L5_sky130_fd_sc_hd__a211oi_1".
+Reading "L5_sky130_fd_sc_hd__and4_4".
+Reading "L5_sky130_fd_sc_hd__and4_1".
+Reading "L5_sky130_fd_sc_hd__clkbuf_4".
+Reading "L5_sky130_fd_sc_hd__and3b_1".
+Reading "L5_sky130_fd_sc_hd__a211o_4".
+Reading "L5_sky130_fd_sc_hd__a211o_1".
+Reading "L5_sky130_fd_sc_hd__o21ba_1".
+Reading "L5_sky130_fd_sc_hd__a21oi_1".
+Reading "L5_sky130_fd_sc_hd__nor2_1".
+Reading "L5_sky130_fd_sc_hd__nand2_8".
+Reading "L5_sky130_fd_sc_hd__a311o_1".
+Reading "L5_sky130_fd_sc_hd__nor2_2".
+Reading "L5_sky130_fd_sc_hd__a41o_1".
+Reading "L5_sky130_fd_sc_hd__nor3_2".
+Reading "L5_sky130_fd_sc_hd__or4bb_4".
+Reading "L5_sky130_fd_sc_hd__nor3_1".
+Reading "L5_sky130_fd_sc_hd__or4b_4".
+Reading "L5_sky130_fd_sc_hd__or3b_4".
+Reading "L5_sky130_fd_sc_hd__a31o_1".
+Reading "L5_sky130_fd_sc_hd__a211o_2".
+Reading "L5_sky130_fd_sc_hd__or2_2".
+Reading "L5_sky130_fd_sc_hd__a31o_2".
+Reading "L5_sky130_fd_sc_hd__a221o_1".
+Reading "L5_sky130_fd_sc_hd__and4b_4".
+Reading "L5_sky130_fd_sc_hd__and3_4".
+Reading "L5_sky130_fd_sc_hd__mux2_8".
+Reading "L5_sky130_fd_sc_hd__o21ai_2".
+Reading "L5_sky130_fd_sc_hd__and4b_1".
+Reading "L5_sky130_fd_sc_hd__or4b_1".
+Reading "L5_sky130_fd_sc_hd__o211a_4".
+Reading "L5_sky130_fd_sc_hd__a32o_1".
+Reading "L5_sky130_fd_sc_hd__a21boi_1".
+Reading "L5_sky130_fd_sc_hd__o41ai_4".
+Reading "L5_sky130_fd_sc_hd__o31a_2".
+Reading "L5_sky130_fd_sc_hd__nand2_4".
+Reading "L5_sky130_fd_sc_hd__a31oi_4".
+Reading "L5_sky130_fd_sc_hd__and4_2".
+Reading "L5_sky130_fd_sc_hd__nand3_4".
+Reading "L5_sky130_fd_sc_hd__and4b_2".
+Reading "L5_sky130_fd_sc_hd__o41a_4".
+Reading "L5_sky130_fd_sc_hd__and4bb_2".
+Reading "L5_sky130_fd_sc_hd__clkinv_2".
+Reading "L5_sky130_fd_sc_hd__and2b_2".
+Reading "L5_sky130_fd_sc_hd__or4bb_1".
+Reading "L5_sky130_fd_sc_hd__a21oi_2".
+Reading "L5_sky130_fd_sc_hd__a221oi_1".
+Reading "L5_sky130_fd_sc_hd__a31oi_1".
+Reading "L5_sky130_fd_sc_hd__xor2_4".
+Reading "L5_sky130_fd_sc_hd__clkbuf_1".
+Reading "L5_sky130_fd_sc_hd__nand3b_4".
+Reading "L5_sky130_fd_sc_hd__nand2_2".
+Reading "L5_sky130_fd_sc_hd__xnor2_1".
+Reading "L5_sky130_fd_sc_hd__and2_1".
+Reading "L5_sky130_fd_sc_hd__nor2_4".
+Reading "L5_sky130_fd_sc_hd__nand4_4".
+Reading "L5_sky130_fd_sc_hd__a32o_2".
+Reading "L5_sky130_fd_sc_hd__nor4_1".
+Reading "L5_sky130_fd_sc_hd__nand4_1".
+Reading "L5_sky130_fd_sc_hd__xor2_1".
+Reading "L5_sky130_fd_sc_hd__and4bb_4".
+Reading "L5_sky130_fd_sc_hd__a41o_2".
+Reading "L5_sky130_fd_sc_hd__o2bb2a_1".
+Reading "L5_sky130_fd_sc_hd__xnor2_2".
+Reading "L5_sky130_fd_sc_hd__xor2_2".
+Reading "L5_sky130_fd_sc_hd__or2_4".
+Reading "L5_sky130_fd_sc_hd__a2111oi_2".
+Reading "L5_sky130_fd_sc_hd__nor4_4".
+Reading "L5_sky130_fd_sc_hd__mux2_4".
+Reading "L5_sky130_fd_sc_hd__and2b_1".
+Reading "L5_sky130_fd_sc_hd__and2_2".
+Reading "L5_sky130_fd_sc_hd__nor4b_1".
+Reading "L5_sky130_fd_sc_hd__o2111ai_4".
+Reading "L5_sky130_fd_sc_hd__nor4_2".
+Reading "L5_sky130_fd_sc_hd__nand3b_2".
+Reading "L5_sky130_fd_sc_hd__nand3_1".
+Reading "L5_sky130_fd_sc_hd__nand2b_2".
+Reading "L5_sky130_fd_sc_hd__o31ai_1".
+Reading "L5_sky130_fd_sc_hd__o41a_1".
+Reading "L5_sky130_fd_sc_hd__a21bo_1".
+Reading "L5_sky130_fd_sc_hd__o41ai_1".
+Reading "L5_sky130_fd_sc_hd__nand3b_1".
+Reading "L5_sky130_fd_sc_hd__o2111a_1".
+Reading "L5_sky130_fd_sc_hd__o21a_4".
+Reading "L5_sky130_fd_sc_hd__o22a_1".
+Reading "L5_sky130_fd_sc_hd__or3b_2".
+Reading "L5_sky130_fd_sc_hd__nand2b_1".
+Reading "L5_sky130_fd_sc_hd__nor4b_4".
+Reading "L5_sky130_fd_sc_hd__o21bai_1".
+Reading "L5_sky130_fd_sc_hd__nor3_4".
+Reading "L5_sky130_fd_sc_hd__o41a_2".
+Reading "L5_sky130_fd_sc_hd__or4b_2".
+Reading "L5_sky130_fd_sc_hd__a221o_4".
+Reading "L5_sky130_fd_sc_hd__a2111oi_1".
+Reading "L5_sky130_fd_sc_hd__o31a_4".
+Reading "L5_sky130_fd_sc_hd__nor2_8".
+Reading "L5_sky130_fd_sc_hd__clkinv_4".
+Reading "L5_sky130_fd_sc_hd__a221o_2".
+Reading "L5_sky130_fd_sc_hd__o21ai_4".
+Reading "L5_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "L5_sky130_fd_sc_hd__clkbuf_2".
+Reading "L5_sky130_fd_sc_hd__a31o_4".
+Reading "L5_sky130_fd_sc_hd__ebufn_4".
+Reading "L5_sky130_fd_sc_hd__dlxtp_1".
+Reading "L5_sky130_fd_sc_hd__dlclkp_1".
+Reading "L5_sky130_fd_sc_hd__conb_1".
+Reading "L5_sky130_fd_sc_hd__inv_1".
+Reading "L5_sky130_fd_sc_hd__nor4b_2".
+Reading "L5_sky130_fd_sc_hd__and3b_2".
+Reading "L5_sky130_fd_sc_hd__nor3b_2".
+Reading "L5_RAM256".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+Reading "L5_sky130_fd_sc_hd__a21o_4".
+Reading "L5_sky130_fd_sc_hd__o2111a_4".
+Reading "L5_sky130_fd_sc_hd__a22o_2".
+Reading "L5_sky130_fd_sc_hd__o211ai_4".
+Reading "L5_sky130_fd_sc_hd__o22ai_4".
+Reading "L5_sky130_fd_sc_hd__a221oi_4".
+Reading "L5_sky130_fd_sc_hd__and2b_4".
+Reading "L5_sky130_fd_sc_hd__and3b_4".
+Reading "L5_sky130_fd_sc_hd__and4bb_1".
+Reading "L5_sky130_fd_sc_hd__a21oi_4".
+Reading "L5_sky130_fd_sc_hd__o22ai_1".
+Reading "L5_sky130_fd_sc_hd__inv_4".
+Reading "L5_sky130_fd_sc_hd__a311o_2".
+Reading "L5_sky130_fd_sc_hd__a2111o_1".
+Reading "L5_sky130_fd_sc_hd__o311a_4".
+Reading "L5_sky130_fd_sc_hd__o2111ai_1".
+Reading "L5_sky130_fd_sc_hd__clkinv_8".
+Reading "L5_sky130_fd_sc_hd__nand3_2".
+Reading "L5_sky130_fd_sc_hd__a22oi_1".
+Reading "L5_sky130_fd_sc_hd__nand4b_4".
+Reading "L5_sky130_fd_sc_hd__o221ai_4".
+Reading "L5_sky130_fd_sc_hd__nand4_2".
+Reading "L5_sky130_fd_sc_hd__inv_6".
+Reading "L5_sky130_fd_sc_hd__o2bb2ai_1".
+Reading "L5_sky130_fd_sc_hd__a311oi_4".
+Reading "L5_sky130_fd_sc_hd__o32ai_4".
+Reading "L5_sky130_fd_sc_hd__o211ai_1".
+Reading "L5_sky130_fd_sc_hd__nand4b_1".
+Reading "L5_sky130_fd_sc_hd__o211ai_2".
+Reading "L5_sky130_fd_sc_hd__a22oi_4".
+Reading "L5_sky130_fd_sc_hd__and2_4".
+Reading "L5_sky130_fd_sc_hd__a211oi_4".
+Reading "L5_sky130_fd_sc_hd__nor3b_4".
+Reading "L5_sky130_fd_sc_hd__o22a_2".
+Reading "L5_sky130_fd_sc_hd__a2111oi_4".
+Reading "L5_sky130_fd_sc_hd__nand2b_4".
+Reading "L5_sky130_fd_sc_hd__a2bb2o_4".
+Reading "L5_sky130_fd_sc_hd__o2bb2a_2".
+Reading "L5_sky130_fd_sc_hd__o2111ai_2".
+Reading "L5_sky130_fd_sc_hd__a22oi_2".
+Reading "L5_sky130_fd_sc_hd__nor3b_1".
+Reading "L5_sky130_fd_sc_hd__o2bb2a_4".
+Reading "L5_sky130_fd_sc_hd__o21bai_4".
+Reading "L5_sky130_fd_sc_hd__o311ai_1".
+Reading "L5_sky130_fd_sc_hd__a32oi_2".
+Reading "L5_sky130_fd_sc_hd__o2bb2ai_2".
+Reading "L5_sky130_fd_sc_hd__o311ai_4".
+Reading "L5_sky130_fd_sc_hd__o2bb2ai_4".
+Reading "L5_sky130_fd_sc_hd__o31ai_4".
+Reading "L5_sky130_fd_sc_hd__o221a_2".
+Reading "L5_sky130_fd_sc_hd__o2111a_2".
+Reading "L5_sky130_fd_sc_hd__a31oi_2".
+Reading "L5_sky130_fd_sc_hd__o311a_2".
+Reading "L5_sky130_fd_sc_hd__o22a_4".
+Reading "L5_sky130_fd_sc_hd__a32oi_4".
+Reading "L5_sky130_fd_sc_hd__a211oi_2".
+Reading "L5_sky130_fd_sc_hd__o31ai_2".
+Reading "L5_sky130_fd_sc_hd__o221ai_1".
+Reading "L5_sky130_fd_sc_hd__clkinv_16".
+Reading "L5_sky130_fd_sc_hd__or4bb_2".
+Reading "L5_sky130_fd_sc_hd__a221oi_2".
+Reading "L5_sky130_fd_sc_hd__inv_8".
+Reading "L5_sky130_fd_sc_hd__a311oi_2".
+Reading "L5_sky130_fd_sc_hd__a311oi_1".
+Reading "L5_sky130_fd_sc_hd__o311ai_2".
+Reading "L5_sky130_fd_sc_hd__a32oi_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2oi_2".
+Reading "L5_sky130_fd_sc_hd__a2bb2oi_1".
+Reading "L5_sky130_fd_sc_hd__a2bb2oi_4".
+Reading "L5_sky130_fd_sc_hd__xnor2_4".
+Reading "L5_sky130_fd_sc_hd__inv_12".
+Reading "L5_sky130_fd_sc_hd__a2111o_4".
+Reading "L5_sky130_fd_sc_hd__a32o_4".
+Reading "L5_sky130_fd_sc_hd__o21ba_2".
+Reading "L5_sky130_fd_sc_hd__a41oi_2".
+Reading "L5_sky130_fd_sc_hd__o22ai_2".
+Reading "L5_sky130_fd_sc_hd__o21bai_2".
+Reading "L5_sky130_fd_sc_hd__a41oi_4".
+Reading "L5_sky130_fd_sc_hd__a41o_4".
+Reading "L5_sky130_fd_sc_hd__a311o_4".
+Reading "L5_sky130_fd_sc_hd__o32ai_1".
+Reading "L5_sky130_fd_sc_hd__a21boi_4".
+Reading "L5_sky130_fd_sc_hd__o32ai_2".
+Reading "L5_sky130_fd_sc_hd__a21bo_2".
+Reading "L5_RAM128".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+Reading "mgmt_core_wrapper".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
+    130000 uses
+    135000 uses
+    140000 uses
+    145000 uses
+    150000 uses
+    155000 uses
+    160000 uses
+    165000 uses
+    170000 uses
+    175000 uses
+    180000 uses
+    185000 uses
+    190000 uses
+    195000 uses
+    200000 uses
+    205000 uses
+    210000 uses
+    215000 uses
+    220000 uses
+Reading "gpio_defaults_block_0403".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__dfbbp_1".
+Reading "spare_logic_block".
+Reading "sky130_fd_sc_hd__bufbuf_8".
+Reading "sky130_fd_sc_hvl__conb_1".
+Reading "mgmt_protect_hv".
+Reading "mprj_logic_high".
+Reading "mprj2_logic_high".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "mgmt_protect".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+Reading "gpio_defaults_block_0801".
+Reading "gpio_control_power_routing_top".
+Reading "gpio_control_power_routing_right".
+Reading "gpio_control_power_routing".
+Reading "caravel_power_routing".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_12".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_11".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_15".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_28".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_29".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_16".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_13".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_14".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv".
+Reading "SY_sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec".
+Reading "SY_sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sli_dactive".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w0_550_sli_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_22".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_21".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_23".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w2_880_sli_dli".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_17".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_20".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_7".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_19".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_replica".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_dummy".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "SY_sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_0".
+Reading "SY_sky130_fd_bd_sram__openram_write_driver".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_1".
+Reading "SY_sky130_fd_bd_sram__openram_sense_amp".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_24".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_25".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_26".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_27".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode3x8".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m14_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m14_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m41_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m41_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m15_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m15_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m42_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m42_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_15".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dactive".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_16".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m24_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m24_w2_000_sli_dli_da_p".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_3".
+Reading "SY_sky130_fd_bd_sram__openram_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_bitcell_array".
+    5000 uses
+    10000 uses
+    15000 uses
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_replica_column".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_replica_column_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dummy_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_8".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_9".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_write_driver_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_write_mask_and_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_sense_amp_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_decoder".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand2_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_18".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_19".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_20".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_7".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_8".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_9".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_10".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_5".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_11".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_12".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_13".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_14".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_replica_bitcell_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_data".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_data_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_address".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_port_address_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_6".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_2".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_delay_chain".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_32".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_33".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_bank".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_cr_4".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_r".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_cr_5".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_rw".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_data_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_col_addr_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_cr_3".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_wmask_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_row_addr_dff".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_38".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8_contact_39".
+Reading "SY_sky130_fd_sc_hd__a22o_2".
+Reading "SY_sky130_fd_sc_hd__a22o_1".
+Reading "SY_sky130_fd_sc_hd__or3b_1".
+Reading "SY_sky130_fd_sc_hd__clkinv_2".
+Reading "SY_sky130_fd_sc_hd__nor2_1".
+Reading "SY_sky130_fd_sc_hd__clkbuf_8".
+Reading "SY_sky130_fd_sc_hd__clkbuf_2".
+Reading "SY_sky130_fd_sc_hd__and2_1".
+Reading "SY_sky130_fd_sc_hd__or3_1".
+Reading "SY_sky130_fd_sc_hd__or2_1".
+Reading "SY_sky130_fd_sc_hd__clkdlybuf4s18_2".
+Reading "SY_sky130_fd_sc_hd__or4_1".
+Reading "SY_sky130_fd_sc_hd__inv_2".
+Reading "SY_sky130_fd_sc_hd__o22a_2".
+Reading "SY_sky130_fd_sc_hd__o22a_1".
+Reading "SY_sky130_fd_sc_hd__o21a_1".
+Reading "SY_sky130_fd_sc_hd__buf_12".
+Reading "SY_sky130_fd_sc_hd__dfxtp_1".
+Reading "SY_sky130_fd_sc_hd__clkbuf_16".
+Reading "SY_sky130_sram_2kbyte_1rw1r_32x512_8".
+    5000 uses
+Reading "SY_sky130_fd_sc_hd__buf_2".
+Reading "SY_sky130_fd_sc_hd__buf_1".
+Reading "SY_sky130_fd_sc_hd__conb_1".
+Reading "SY_sky130_fd_sc_hd__nand3b_1".
+Reading "SY_sky130_fd_sc_hd__clkdlybuf4s15_2".
+Reading "SY_sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "SY_sky130_fd_sc_hd__diode_2".
+Reading "SY_sky130_fd_sc_hd__fill_2".
+Reading "SY_sky130_fd_sc_hd__buf_4".
+Reading "SY_sky130_fd_sc_hd__clkbuf_4".
+Reading "SY_sky130_fd_sc_hd__clkdlybuf4s25_1".
+Reading "SY_sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "SY_sky130_fd_sc_hd__decap_6".
+Reading "SY_sky130_fd_sc_hd__decap_8".
+Reading "SY_sky130_fd_sc_hd__decap_12".
+Reading "SY_sky130_fd_sc_hd__buf_6".
+Reading "SY_sky130_fd_sc_hd__mux2_2".
+Reading "SY_sky130_fd_sc_hd__decap_3".
+Reading "SY_sky130_fd_sc_hd__fill_1".
+Reading "SY_sky130_fd_sc_hd__decap_4".
+Reading "user_project_wrapper".
+    5000 uses
+    10000 uses
+    15000 uses
+    20000 uses
+    25000 uses
+    30000 uses
+    35000 uses
+    40000 uses
+    45000 uses
+    50000 uses
+    55000 uses
+    60000 uses
+    65000 uses
+    70000 uses
+    75000 uses
+    80000 uses
+    85000 uses
+    90000 uses
+    95000 uses
+    100000 uses
+    105000 uses
+    110000 uses
+    115000 uses
+    120000 uses
+    125000 uses
+    130000 uses
+    135000 uses
+    140000 uses
+    145000 uses
+    150000 uses
+    155000 uses
+    160000 uses
+    165000 uses
+    170000 uses
+    175000 uses
+    180000 uses
+    185000 uses
+    190000 uses
+    195000 uses
+    200000 uses
+    205000 uses
+    210000 uses
+    215000 uses
+    220000 uses
+    225000 uses
+    230000 uses
+    235000 uses
+    240000 uses
+    245000 uses
+    250000 uses
+    255000 uses
+    260000 uses
+    265000 uses
+    270000 uses
+    275000 uses
+    280000 uses
+    285000 uses
+    290000 uses
+    295000 uses
+    300000 uses
+    305000 uses
+    310000 uses
+    315000 uses
+    320000 uses
+    325000 uses
+    330000 uses
+    335000 uses
+    340000 uses
+    345000 uses
+    350000 uses
+    355000 uses
+    360000 uses
+    365000 uses
+    370000 uses
+    375000 uses
+    380000 uses
+    385000 uses
+    390000 uses
+    395000 uses
+    400000 uses
+    405000 uses
+    410000 uses
+    415000 uses
+    420000 uses
+    425000 uses
+    430000 uses
+    435000 uses
+    440000 uses
+    445000 uses
+    450000 uses
+    455000 uses
+    460000 uses
+    465000 uses
+    470000 uses
+    475000 uses
+    480000 uses
+    485000 uses
+    490000 uses
+    495000 uses
+    500000 uses
+    505000 uses
+    510000 uses
+    515000 uses
+    520000 uses
+    525000 uses
+    530000 uses
+    535000 uses
+    540000 uses
+    545000 uses
+    550000 uses
+    555000 uses
+    560000 uses
+    565000 uses
+    570000 uses
+    575000 uses
+    580000 uses
+    585000 uses
+    590000 uses
+    595000 uses
+    600000 uses
+    605000 uses
+    610000 uses
+    615000 uses
+    620000 uses
+    625000 uses
+    630000 uses
+    635000 uses
+    640000 uses
+    645000 uses
+    650000 uses
+    655000 uses
+    660000 uses
+    665000 uses
+    670000 uses
+    675000 uses
+    680000 uses
+    685000 uses
+    690000 uses
+    695000 uses
+    700000 uses
+    705000 uses
+    710000 uses
+    715000 uses
+    720000 uses
+    725000 uses
+    730000 uses
+    735000 uses
+    740000 uses
+    745000 uses
+    750000 uses
+    755000 uses
+    760000 uses
+    765000 uses
+    770000 uses
+    775000 uses
+    780000 uses
+    785000 uses
+    790000 uses
+    795000 uses
+    800000 uses
+    805000 uses
+    810000 uses
+    815000 uses
+    820000 uses
+    825000 uses
+    830000 uses
+    835000 uses
+    840000 uses
+    845000 uses
+    850000 uses
+    855000 uses
+    860000 uses
+    865000 uses
+    870000 uses
+    875000 uses
+    880000 uses
+    885000 uses
+    890000 uses
+    895000 uses
+Reading "sky130_ef_io__com_bus_slice_20um".
+Reading "sky130_fd_io__corner_bus_overlay".
+Reading "sky130_ef_io__corner_pad".
+Reading "sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um".
+Reading "sky130_ef_io__com_bus_slice_1um".
+Reading "sky130_ef_io__com_bus_slice_5um".
+Reading "sky130_ef_io__com_bus_slice_10um".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180851".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808664".
+Reading "sky130_fd_io__sio_clamp_pcap_4x5".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808680".
+Reading "sky130_fd_io__esd_rcclamp_nfetcap".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808336".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808666".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808665".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808678".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808679".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808677".
+Reading "sky130_fd_pr__via_pol1__example_5595914180839".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808667".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808671".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808672".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808673".
+Reading "sky130_fd_pr__dfl1__example_55959141808663".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808660".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808670".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808668".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808675".
+Reading "sky130_fd_pr__hvdftpl1s2__example_55959141808676".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808674".
+Reading "sky130_fd_pr__dfl1__example_55959141808662".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808661".
+Reading "sky130_fd_pr__via_l1m1__example_559591418084".
+Reading "sky130_fd_pr__genrivetdlring__example_559591418082".
+Reading "sky130_fd_pr__gendlring__example_559591418081".
+Reading "sky130_fd_pr__padplhp__example_559591418080".
+Reading "sky130_fd_io__pad_esd".
+Reading "sky130_fd_io__com_bus_slice".
+Reading "sky130_fd_io__com_bus_hookup".
+Reading "sky130_fd_io__com_busses_esd".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808669".
+Reading "sky130_fd_io__top_ground_hvc_wpad".
+Reading "sky130_fd_io__overlay_vssa_hvc".
+Reading "sky130_ef_io__hvc_vdda_overlay".
+Reading "sky130_ef_io__vssa_hvc_clamped_pad".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808719".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808767".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808765".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808764".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808720".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808718".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808717".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808716".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808243".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808723".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808722".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180890".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808721".
+Reading "sky130_fd_io__xres_inv_hysv2".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180838".
+Reading "sky130_fd_io__tk_tie_r_out_esd".
+Reading "sky130_fd_io__res250_sub_small".
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432616228): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432616260): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432618852): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432618884): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432618916): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432618948): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432618980): NODE elements not supported: skipping.
+Error while reading cell "sky130_fd_io__res250_sub_small" (byte position 432619076): NODE elements not supported: skipping.
+Reading "sky130_fd_io__res250only_small".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808264".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180858".
+Reading "sky130_fd_pr__via_pol1__example_5595914180833".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180864".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808715".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180863".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180862".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808288".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180859".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808289".
+Reading "sky130_fd_io__com_res_weak_v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808274".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808728".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808727".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808726".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808725".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808724".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808554".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808553".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808552".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808551".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808402".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808350".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808261".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808260".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808259".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808400".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808372".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808326".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808290".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808128".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808127".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180897".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180819".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808555".
+Reading "sky130_fd_pr__via_pol1__example_55959141808147".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808157".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808156".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808155".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808154".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808153".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808152".
+Reading "sky130_fd_pr__tpl1__example_55959141808151".
+Reading "sky130_fd_pr__tpl1__example_55959141808150".
+Reading "sky130_fd_pr__tpl1__example_55959141808149".
+Reading "sky130_fd_pr__tpl1__example_55959141808148".
+Reading "sky130_fd_pr__dfl1__example_55959141808158".
+Reading "sky130_fd_io__signal_5_sym_hv_local_5term".
+Reading "sky130_fd_io__gpio_buf_localesdv2".
+Reading "sky130_fd_pr__via_pol1__example_559591418083".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808137".
+Reading "sky130_fd_pr__dfl1sd__example_559591418086".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808371".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808370".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808369".
+Reading "sky130_fd_io__hvsbt_inv_x1".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808316".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808421".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808385".
+Reading "sky130_fd_pr__dfl1sd__example_559591418088".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808422".
+Reading "sky130_fd_io__hvsbt_inv_x2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808612".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808616".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808615".
+Reading "sky130_fd_io__hvsbt_inv_x4".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180848".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180849".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808766".
+Reading "sky130_fd_pr__via_m2m3__example_55959141808714".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418081".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808652".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808653".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180812".
+Reading "sky130_fd_pr__via_l1m1_centered__example_5595914180811".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418086".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418084".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808659".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808658".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808657".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808202".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pudrvr_strong_axres4v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808273".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808740".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808739".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808738".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808737".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808736".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808735".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808734".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808733".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808732".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808731".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808730".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808752".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808751".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808750".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808749".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808748".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808747".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808746".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808745".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808744".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808743".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808742".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808741".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808324".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808270".
+Reading "sky130_fd_pr__dfl1__example_55959141808187".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808755".
+Reading "sky130_fd_pr__res_generic_nd__example_55959141808754".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808338".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808337".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808763".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808700".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808559".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808762".
+Reading "sky130_fd_pr__dfl1__example_55959141808729".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757".
+Reading "sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760".
+Reading "sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759".
+Reading "sky130_fd_io__xres_p_em1c_cdns_55959141808753".
+Reading "sky130_fd_io__xres2v2_rcfilter_lpfv2".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180860".
+Reading "sky130_fd_pr__res_bent_po__example_5595914180861".
+Reading "sky130_fd_io__com_res_weak_bentbigres".
+Reading "sky130_fd_io__com_res_weak".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180857".
+Reading "sky130_fd_pr__hvdftpm1s2__example_55959141808649".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808651".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808650".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808648".
+Reading "sky130_fd_pr__hvdftpl1s__example_55959141808646".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808647".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808645".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808378".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_xres4v2".
+Reading "sky130_fd_io__top_gpio_pad".
+Reading "sky130_fd_io__com_busses".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808768".
+Reading "sky130_fd_pr__res_bent_nd__example_55959141808769".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808787".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808786".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808782".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808785".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808449".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808784".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808452".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808783".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808781".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808780".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808779".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808233".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180827".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808778".
+Reading "sky130_fd_pr__hvdfm1sd__example_5595914180835".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808777".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808776".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808775".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808242".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808774".
+Reading "sky130_fd_pr__hvdfm1sd2__example_5595914180829".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808773".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808237".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808772".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808771".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808770".
+Reading "sky130_fd_io__tap_1".
+Reading "sky130_fd_io__inv_1".
+Reading "sky130_fd_pr__pfet_01v8__example_559591418085".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418089".
+Reading "sky130_fd_pr__nfet_01v8__example_559591418087".
+Reading "sky130_fd_io__hvsbt_nand2".
+Reading "sky130_fd_io__xres4v2_in_buf".
+Reading "sky130_fd_io__top_xres4v2".
+Reading "sky130_fd_sc_hd__fill_4".
+Reading "sky130_fd_sc_hd__fill_8".
+Reading "constant_block".
+Reading "sky130_fd_io__res75only_small".
+Reading "sky130_fd_io__com_bus_slice_m4".
+Reading "sky130_fd_io__overlay_gpiov2_m4".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808420".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808419".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808418".
+Reading "sky130_fd_io__hvsbt_nor".
+Reading "sky130_fd_io__hvsbt_nand2v2".
+Reading "sky130_fd_io__gpiov2_ictl_logic".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808190".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808611".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180811".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808549".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808548".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808191".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808189".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808517".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808518".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808610".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808609".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180815".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180816".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808608".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808604".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808533".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808529".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180884".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808230".
+Reading "sky130_fd_io__gpiov2_in_buf".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808537".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808106".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808481".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808607".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808504".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808600".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808550".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808528".
+Reading "sky130_fd_io__gpiov2_ipath_hvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808595".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180825".
+Reading "sky130_fd_io__gpiov2_inbuf_lvinv_x1".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180812".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808599".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808598".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808597".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808596".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808547".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808546".
+Reading "sky130_fd_io__gpiov2_ipath_lvls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808606".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180875".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808605".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808540".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808603".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808602".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808601".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808535".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808527".
+Reading "sky130_fd_io__gpiov2_vcchib_in_buf".
+Reading "sky130_fd_io__gpiov2_ibuf_se".
+Reading "sky130_fd_io__gpiov2_buf_localesd".
+Reading "sky130_fd_io__gpiov2_ipath".
+Reading "sky130_fd_io__tk_em2s_cdns_55959141808438".
+Reading "sky130_fd_io__tk_em2o_cdns_55959141808439".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180882".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180881".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180880".
+Reading "sky130_fd_io__tk_em1o_cdns_5595914180879".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808430".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180823".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180822".
+Reading "sky130_fd_pr__pfet_01v8__example_5595914180813".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808624".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808510".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808623".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808622".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808621".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808620".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808619".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808618".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808116".
+Reading "sky130_fd_io__com_ctl_lsv2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808394".
+Reading "sky130_fd_pr__via_pol1__example_55959141808298".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808440".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180878".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808434".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808435".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808433".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808432".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808102".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808431".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808115".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808429".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808428".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808100".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808140".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808427".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808426".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808280".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808425".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808424".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808423".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808306".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808383".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808382".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808380".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808379".
+Reading "sky130_fd_io__com_ctl_ls_v2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808617".
+Reading "sky130_fd_io__com_ctl_ls_en_1_v2".
+Reading "sky130_fd_io__com_ctl_ls_1v2".
+Reading "sky130_fd_io__gpiov2_ctl_lsbank".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808614".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808613".
+Reading "sky130_fd_io__hvsbt_inv_x8v2".
+Reading "sky130_fd_io__hvsbt_inv_x8".
+Reading "sky130_fd_io__com_ctl_ls".
+Reading "sky130_fd_io__com_ctl_hldv2".
+Reading "sky130_fd_io__gpiov2_ctl".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808178".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808591".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808594".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808593".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808488".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808592".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808586".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808122".
+Reading "sky130_fd_pr__dfl1sd__example_55959141808123".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808477".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808476".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808475".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808589".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808570".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808569".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808588".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808587".
+Reading "sky130_fd_io__gpiov2_amux_ctl_lshv2hv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808590".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808460".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808468".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808467".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808466".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808465".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808464".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808463".
+Reading "sky130_fd_io__gpiov2_amux_ctl_ls".
+Reading "sky130_fd_io__gpiov2_amux_ctl_inv_1".
+Reading "sky130_fd_io__gpiov2_amux_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808573".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808572".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808579".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808578".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808577".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808576".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808566".
+Reading "sky130_fd_pr__dfl1sd__example_5595914180868".
+Reading "sky130_fd_pr__dfl1sd2__example_5595914180869".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808565".
+Reading "sky130_fd_io__gpiov2_amx_pucsd_inv".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808441".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808571".
+Reading "sky130_fd_io__gpiov2_amx_inv4".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808567".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808568".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv".
+Reading "sky130_fd_io__gpiov2_amux_drvr_lshv2hv2".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808581".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808580".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808278".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808462".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808583".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808582".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808498".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808497".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808496".
+Reading "sky130_fd_io__gpiov2_amux_drvr_ls".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808574".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808575".
+Reading "sky130_fd_io__amx_inv1".
+Reading "sky130_fd_io__gpiov2_amux_drvr".
+Reading "sky130_fd_io__xor2_1".
+Reading "sky130_fd_io__nor2_1".
+Reading "sky130_fd_io__nand2_1".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808200".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808457".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808451".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808450".
+Reading "sky130_fd_pr__hvdfl1sd__example_5595914180894".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808584".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808455".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808447".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808445".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808248".
+Reading "sky130_fd_io__gpiov2_amux_nand5".
+Reading "sky130_fd_pr__dfm1sd__example_55959141808258".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808585".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808446".
+Reading "sky130_fd_io__gpiov2_amux_nand4".
+Reading "sky130_fd_io__gpiov2_amux_decoder".
+Reading "sky130_fd_io__gpiov2_amux_ctl_logic".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808563".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808564".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808562".
+Reading "sky130_fd_pr__hvdfm1sd2__example_55959141808251".
+Reading "sky130_fd_pr__dfm1sd2__example_55959141808561".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808560".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808558".
+Reading "sky130_fd_io__amux_switch_1v2b".
+Reading "sky130_fd_io__gpiov2_amux".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808416".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808417".
+Reading "sky130_fd_io__hvsbt_xorv2".
+Reading "sky130_fd_io__hvsbt_xor".
+Reading "sky130_fd_io__com_ctl_ls_octl".
+Reading "sky130_fd_io__gpiov2_octl".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808267".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808266".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808642".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808184".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808141".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808643".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808183".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808139".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808636".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808635".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808634".
+Reading "sky130_fd_pr__dfl1sd2__example_55959141808633".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808632".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808630".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808638".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808637".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr3".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808629".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808628".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808627".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808626".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808354".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808631".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong_nr2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180888".
+Reading "sky130_fd_io__gpiov2_octl_mux".
+Reading "sky130_fd_pr__via_pol1__example_55959141808322".
+Reading "sky130_fd_pr__via_pol1__example_55959141808321".
+Reading "sky130_fd_pr__via_pol1__example_55959141808320".
+Reading "sky130_fd_pr__via_pol1__example_55959141808294".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808325".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808323".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808291".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808641".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808640".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808639".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808348".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808347".
+Reading "sky130_fd_pr__hvdfl1sd__example_55959141808194".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808346".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808345".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808344".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808343".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808334".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808333".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808332".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808331".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808330".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808329".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808304".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808134".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808328".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808327".
+Reading "sky130_fd_io__com_pdpredrvr_pbiasv2".
+Reading "sky130_fd_io__gpiov2_pdpredrvr_strong".
+Reading "sky130_fd_pr__via_pol1__example_55959141808272".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808271".
+Reading "sky130_fd_pr__hvdfl1sd2__example_55959141808143".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808142".
+Reading "sky130_fd_pr__model__pfet_highvoltage__example_55959141808101".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_55959141808144".
+Reading "sky130_fd_pr__model__nfet_highvoltage__example_5595914180899".
+Reading "sky130_fd_pr__via_pol1__example_55959141808275".
+Reading "sky130_fd_pr__via_m1m2__example_55959141808276".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808286".
+Reading "sky130_fd_pr__res_generic_po__example_55959141808285".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808284".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808283".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808644".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808287".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808282".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808281".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a".
+Reading "sky130_fd_io__gpiov2_pupredrvr_strong_nd2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808297".
+Reading "sky130_fd_pr__via_pol1__example_55959141808296".
+Reading "sky130_fd_pr__via_pol1__example_55959141808295".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808293".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808292".
+Reading "sky130_fd_pr__tpl1__example_55959141808300".
+Reading "sky130_fd_pr__tpl1__example_55959141808299".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808319".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808318".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808317".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808315".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808314".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808313".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808312".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808311".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808310".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808309".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808308".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808307".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808305".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808303".
+Reading "sky130_fd_io__tk_em1s_cdns_55959141808301".
+Reading "sky130_fd_io__tk_em1o_cdns_55959141808302".
+Reading "sky130_fd_io__feascom_pupredrvr_nbiasv2".
+Reading "sky130_fd_io__gpio_pupredrvr_strongv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808361".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808360".
+Reading "sky130_fd_io__feas_com_pupredrvr_weak".
+Reading "sky130_fd_pr__via_pol1__example_5595914180854".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808363".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808362".
+Reading "sky130_fd_io__com_pupredrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808366".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808365".
+Reading "sky130_fd_io__com_pdpredrvr_weakv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808364".
+Reading "sky130_fd_io__com_pdpredrvr_strong_slowv2".
+Reading "sky130_fd_io__gpiov2_obpredrvr".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808368".
+Reading "sky130_fd_pr__tpl1__example_55959141808625".
+Reading "sky130_fd_pr__via_pol1__example_55959141808373".
+Reading "sky130_fd_pr__tpl1__example_55959141808374".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808393".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808392".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808391".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808390".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808389".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808388".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808387".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808386".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808384".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808381".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808377".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808376".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808375".
+Reading "sky130_fd_io__gpio_dat_lsv2".
+Reading "sky130_fd_io__gpio_dat_ls_1v2".
+Reading "sky130_fd_pr__via_pol1__example_55959141808398".
+Reading "sky130_fd_pr__via_pol1__example_55959141808397".
+Reading "sky130_fd_pr__via_pol1__example_55959141808396".
+Reading "sky130_fd_pr__via_pol1__example_55959141808395".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808401".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808399".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808269".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808410".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808409".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808408".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808407".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808406".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808405".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808404".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808403".
+Reading "sky130_fd_io__com_cclat".
+Reading "sky130_fd_io__com_opath_datoev2".
+Reading "sky130_fd_io__gpiov2_octl_dat".
+Reading "sky130_fd_pr__via_pol1_centered__example_559591418080".
+Reading "sky130_fd_pr__via_l1m1__example_5595914180832".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180856".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180855".
+Reading "sky130_fd_pr__res_generic_po__example_5595914180853".
+Reading "sky130_fd_io__tk_em1s_cdns_5595914180852".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418083".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418082".
+Reading "sky130_fd_io__nfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpiov2_pddrvr_strong".
+Reading "sky130_fd_pr__via_l1m1_centered__example_559591418085".
+Reading "sky130_fd_io__pfet_con_diff_wo_abt_270v2".
+Reading "sky130_fd_io__gpio_pudrvr_strongv2".
+Reading "sky130_fd_pr__nfet_01v8__example_5595914180850".
+Reading "sky130_fd_io__gpio_pddrvr_weakv2".
+Reading "sky130_fd_io__gpio_pddrvr_strong_slowv2".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808656".
+Reading "sky130_fd_pr__hvdfm1sd__example_55959141808655".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808654".
+Reading "sky130_fd_io__com_pudrvr_weakv2".
+Reading "sky130_fd_io__com_pudrvr_strong_slowv2".
+Reading "sky130_fd_io__gpio_odrvr_subv2".
+Reading "sky130_fd_io__gpio_odrvrv2".
+Reading "sky130_fd_io__gpio_opathv2".
+Reading "sky130_fd_io__top_gpiov2".
+Reading "sky130_fd_io__overlay_gpiov2".
+Reading "sky130_ef_io__gpiov2_pad".
+Reading "sky130_ef_io__gpiov2_pad_wrapped".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808691".
+Reading "sky130_fd_pr__pfet_01v8__example_55959141808687".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808684".
+Reading "sky130_fd_pr__tpl1__example_55959141808686".
+Reading "sky130_fd_pr__tpl1__example_55959141808685".
+Reading "sky130_fd_pr__via_l1m1__example_55959141808683".
+Reading "sky130_fd_io__gnd2gnd_strap".
+Reading "sky130_fd_io__gnd2gnd_tap".
+Reading "sky130_fd_io__gnd2gnd_diff".
+Reading "sky130_fd_io__gnd2gnd_sub_dnwl".
+Reading "sky130_fd_io__gnd2gnd_120x2_lv_isosub".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808690".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808702".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808705".
+Reading "sky130_fd_pr__dfl1__example_55959141808682".
+Reading "sky130_fd_pr__dftpl1s2__example_55959141808694".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808693".
+Reading "sky130_fd_pr__dfl1__example_55959141808681".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808688".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808699".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808698".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808697".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808696".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808695".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808704".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808703".
+Reading "sky130_fd_pr__nfet_01v8__example_55959141808701".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808689".
+Reading "sky130_fd_pr__res_bent_po__example_55959141808692".
+Reading "sky130_fd_io__top_ground_lvc_wpad".
+Reading "sky130_fd_io__overlay_vssd_lvc".
+Reading "sky130_ef_io__lvc_vccdx_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped_pad".
+Reading "sky130_fd_io__overlay_vssio_hvc".
+Reading "sky130_ef_io__hvc_vssio_overlay".
+Reading "sky130_ef_io__vssio_hvc_clamped_pad".
+Reading "sky130_fd_io__hvc_clampv2".
+Reading "sky130_fd_io__top_power_hvc_wpadv2".
+Reading "sky130_fd_io__overlay_vdda_hvc".
+Reading "sky130_ef_io__vdda_hvc_clamped_pad".
+Reading "sky130_fd_io__top_power_lvc_wpad".
+Reading "sky130_fd_io__overlay_vccd_lvc".
+Reading "sky130_ef_io__vccd_lvc_clamped_pad".
+Reading "sky130_ef_io__disconnect_vdda_slice_5um".
+Reading "sky130_fd_io__overlay_vddio_hvc".
+Reading "sky130_ef_io__hvc_vddio_overlay".
+Reading "sky130_ef_io__vddio_hvc_clamped_pad".
+Reading "chip_io_gpio_connects".
+Reading "sky130_ef_io__lvc_vccdy_overlay".
+Reading "sky130_ef_io__vssd_lvc_clamped3_pad".
+Reading "sky130_ef_io__vccd_lvc_clamped3_pad".
+Reading "chip_io".
+Reading "gpio_signal_buffering".
+Reading "caravel".
+Flattening layout of tile x=0 y=0. . . 
+Flattening layout of tile x=1 y=0. . . 
+Flattening layout of tile x=2 y=0. . . 
+Flattening layout of tile x=3 y=0. . . 
+Flattening layout of tile x=4 y=0. . . 
+Flattening layout of tile x=5 y=0. . . 
+Flattening layout of tile x=0 y=1. . . 
+Flattening layout of tile x=1 y=1. . . 
+Flattening layout of tile x=2 y=1. . . 
+Flattening layout of tile x=3 y=1. . . 
+Flattening layout of tile x=4 y=1. . . 
+Flattening layout of tile x=5 y=1. . . 
+Flattening layout of tile x=0 y=2. . . 
+Flattening layout of tile x=1 y=2. . . 
+Flattening layout of tile x=2 y=2. . . 
+Flattening layout of tile x=3 y=2. . . 
+Flattening layout of tile x=4 y=2. . . 
+Flattening layout of tile x=5 y=2. . . 
+Flattening layout of tile x=0 y=3. . . 
+Flattening layout of tile x=1 y=3. . . 
+Flattening layout of tile x=2 y=3. . . 
+Flattening layout of tile x=3 y=3. . . 
+Flattening layout of tile x=4 y=3. . . 
+Flattening layout of tile x=5 y=3. . . 
+Flattening layout of tile x=0 y=4. . . 
+Flattening layout of tile x=1 y=4. . . 
+Flattening layout of tile x=2 y=4. . . 
+Flattening layout of tile x=3 y=4. . . 
+Flattening layout of tile x=4 y=4. . . 
+Flattening layout of tile x=5 y=4. . . 
+Flattening layout of tile x=0 y=5. . . 
+Flattening layout of tile x=1 y=5. . . 
+Flattening layout of tile x=2 y=5. . . 
+Flattening layout of tile x=3 y=5. . . 
+Flattening layout of tile x=4 y=5. . . 
+Flattening layout of tile x=5 y=5. . . 
+Flattening layout of tile x=0 y=6. . . 
+Flattening layout of tile x=1 y=6. . . 
+Flattening layout of tile x=2 y=6. . . 
+Flattening layout of tile x=3 y=6. . . 
+Flattening layout of tile x=4 y=6. . . 
+Flattening layout of tile x=5 y=6. . . 
+Flattening layout of tile x=0 y=7. . . 
+Flattening layout of tile x=1 y=7. . . 
+Flattening layout of tile x=2 y=7. . . 
+Flattening layout of tile x=3 y=7. . . 
+Flattening layout of tile x=4 y=7. . . 
+Flattening layout of tile x=5 y=7. . . 
+Ended: 11/16/2022 01:48:58
diff --git a/tapeout/logs/fill_intermediate.log b/tapeout/logs/fill_intermediate.log
new file mode 100644
index 0000000..2a00625
--- /dev/null
+++ b/tapeout/logs/fill_intermediate.log
@@ -0,0 +1,17445 @@
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Using NULL graphics device.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using NULL graphics device.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using the terminal as the console.
+Using NULL graphics device.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using NULL graphics device.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Starting magic under Tcl interpreter
+Using NULL graphics device.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using the terminal as the console.
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using NULL graphics device.
+Starting magic under Tcl interpreter
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using the terminal as the console.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Starting magic under Tcl interpreter
+Using NULL graphics device.
+Using the terminal as the console.
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using NULL graphics device.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Using NULL graphics device.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+Processing system .magicrc file
+Processing system .magicrc file
+2 Magic internal units = 1 Lambda
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+2 Magic internal units = 1 Lambda
+Processing system .magicrc file
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Processing system .magicrc file
+Processing system .magicrc file
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Processing system .magicrc file
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Sourcing design .magicrc for technology sky130A ...
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Sourcing design .magicrc for technology sky130A ...
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading sky130A Device Generator Menu ...
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading sky130A Device Generator Menu ...
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_5_1: 10000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+caravel_0006b498_fill_pattern_5_1: 20000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading sky130A Device Generator Menu ...
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_5_5: 10000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0006b498_fill_pattern_2_0: 10000 rects
+caravel_0006b498_fill_pattern_5_1: 30000 rects
+caravel_0006b498_fill_pattern_5_5: 20000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0006b498_fill_pattern_2_0: 20000 rects
+caravel_0006b498_fill_pattern_2_4: 10000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+caravel_0006b498_fill_pattern_5_1: 40000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_5_5: 30000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+caravel_0006b498_fill_pattern_3_7: 10000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_2_0: 30000 rects
+caravel_0006b498_fill_pattern_2_4: 20000 rects
+caravel_0006b498_fill_pattern_1_1: 10000 rects
+caravel_0006b498_fill_pattern_2_2: 10000 rects
+caravel_0006b498_fill_pattern_5_1: 50000 rects
+caravel_0006b498_fill_pattern_0_7: 10000 rects
+caravel_0006b498_fill_pattern_5_5: 40000 rects
+caravel_0006b498_fill_pattern_3_7: 20000 rects
+caravel_0006b498_fill_pattern_4_2: 10000 rects
+caravel_0006b498_fill_pattern_1_1: 20000 rects
+caravel_0006b498_fill_pattern_1_7: 10000 rects
+caravel_0006b498_fill_pattern_2_0: 40000 rects
+caravel_0006b498_fill_pattern_0_4: 10000 rects
+caravel_0006b498_fill_pattern_0_7: 20000 rects
+caravel_0006b498_fill_pattern_2_4: 30000 rects
+caravel_0006b498_fill_pattern_3_1: 10000 rects
+caravel_0006b498_fill_pattern_5_1: 60000 rects
+caravel_0006b498_fill_pattern_5_6: 10000 rects
+caravel_0006b498_fill_pattern_2_2: 20000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0006b498_fill_pattern_5_5: 50000 rects
+caravel_0006b498_fill_pattern_0_6: 10000 rects
+caravel_0006b498_fill_pattern_0_4: 20000 rects
+caravel_0006b498_fill_pattern_3_1: 20000 rects
+caravel_0006b498_fill_pattern_0_7: 30000 rects
+caravel_0006b498_fill_pattern_3_7: 30000 rects
+caravel_0006b498_fill_pattern_4_2: 20000 rects
+caravel_0006b498_fill_pattern_2_4: 40000 rects
+caravel_0006b498_fill_pattern_5_6: 20000 rects
+caravel_0006b498_fill_pattern_0_1: 10000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+caravel_0006b498_fill_pattern_1_1: 30000 rects
+Loading sky130A Device Generator Menu ...
+caravel_0006b498_fill_pattern_2_0: 50000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_1_7: 20000 rects
+caravel_0006b498_fill_pattern_0_7: 40000 rects
+caravel_0006b498_fill_pattern_5_1: 70000 rects
+caravel_0006b498_fill_pattern_3_1: 30000 rects
+caravel_0006b498_fill_pattern_5_5: 60000 rects
+caravel_0006b498_fill_pattern_0_4: 30000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0006b498_fill_pattern_0_5: 10000 rects
+caravel_0006b498_fill_pattern_5_0: 10000 rects
+caravel_0006b498_fill_pattern_2_2: 30000 rects
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0006b498_fill_pattern_0_6: 20000 rects
+caravel_0006b498_fill_pattern_4_2: 30000 rects
+caravel_0006b498_fill_pattern_3_2: 10000 rects
+caravel_0006b498_fill_pattern_1_7: 30000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+caravel_0006b498_fill_pattern_0_7: 50000 rects
+Loading sky130A Device Generator Menu ...
+caravel_0006b498_fill_pattern_3_7: 40000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_5_6: 30000 rects
+caravel_0006b498_fill_pattern_0_1: 20000 rects
+caravel_0006b498_fill_pattern_3_1: 40000 rects
+caravel_0006b498_fill_pattern_2_4: 50000 rects
+caravel_0006b498_fill_pattern_1_4: 10000 rects
+caravel_0006b498_fill_pattern_2_0: 60000 rects
+caravel_0006b498_fill_pattern_1_1: 40000 rects
+caravel_0006b498_fill_pattern_0_4: 40000 rects
+caravel_0006b498_fill_pattern_4_1: 10000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+caravel_0006b498_fill_pattern_5_1: 80000 rects
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_4_2: 40000 rects
+caravel_0006b498_fill_pattern_0_7: 60000 rects
+caravel_0006b498_fill_pattern_5_0: 20000 rects
+caravel_0006b498_fill_pattern_1_7: 40000 rects
+caravel_0006b498_fill_pattern_0_5: 20000 rects
+caravel_0006b498_fill_pattern_5_5: 70000 rects
+caravel_0006b498_fill_pattern_3_1: 50000 rects
+caravel_0006b498_fill_pattern_0_6: 30000 rects
+caravel_0006b498_fill_pattern_4_7: 10000 rects
+caravel_0006b498_fill_pattern_3_2: 20000 rects
+caravel_0006b498_fill_pattern_0_4: 50000 rects
+caravel_0006b498_fill_pattern_5_6: 40000 rects
+caravel_0006b498_fill_pattern_2_2: 40000 rects
+caravel_0006b498_fill_pattern_1_4: 20000 rects
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/generate_fill_distributed.tcl" from command line.
+caravel_0006b498_fill_pattern_3_7: 50000 rects
+caravel_0006b498_fill_pattern_0_1: 30000 rects
+caravel_0006b498_fill_pattern_0_7: 70000 rects
+caravel_0006b498_fill_pattern_2_0: 70000 rects
+caravel_0006b498_fill_pattern_5_1: 90000 rects
+caravel_0006b498_fill_pattern_1_1: 50000 rects
+caravel_0006b498_fill_pattern_3_1: 60000 rects
+caravel_0006b498_fill_pattern_4_1: 20000 rects
+caravel_0006b498_fill_pattern_0_6: 40000 rects
+caravel_0006b498_fill_pattern_1_7: 50000 rects
+caravel_0006b498_fill_pattern_0_4: 60000 rects
+caravel_0006b498_fill_pattern_2_4: 60000 rects
+caravel_0006b498_fill_pattern_1_3: 10000 rects
+caravel_0006b498_fill_pattern_5_6: 50000 rects
+caravel_0006b498_fill_pattern_4_2: 50000 rects
+caravel_0006b498_fill_pattern_3_7: 60000 rects
+caravel_0006b498_fill_pattern_0_7: 80000 rects
+caravel_0006b498_fill_pattern_5_5: 80000 rects
+caravel_0006b498_fill_pattern_5_1: 100000 rects
+caravel_0006b498_fill_pattern_3_2: 30000 rects
+caravel_0006b498_fill_pattern_3_1: 70000 rects
+caravel_0006b498_fill_pattern_0_4: 70000 rects
+caravel_0006b498_fill_pattern_5_0: 30000 rects
+caravel_0006b498_fill_pattern_0_6: 50000 rects
+caravel_0006b498_fill_pattern_4_0: 10000 rects
+caravel_0006b498_fill_pattern_1_7: 60000 rects
+caravel_0006b498_fill_pattern_0_1: 40000 rects
+caravel_0006b498_fill_pattern_2_2: 50000 rects
+caravel_0006b498_fill_pattern_2_0: 80000 rects
+caravel_0006b498_fill_pattern_2_4: 70000 rects
+caravel_0006b498_fill_pattern_3_7: 70000 rects
+caravel_0006b498_fill_pattern_1_1: 60000 rects
+caravel_0006b498_fill_pattern_5_6: 60000 rects
+caravel_0006b498_fill_pattern_0_7: 90000 rects
+caravel_0006b498_fill_pattern_0_5: 30000 rects
+caravel_0006b498_fill_pattern_5_1: 110000 rects
+caravel_0006b498_fill_pattern_4_7: 20000 rects
+caravel_0006b498_fill_pattern_3_1: 80000 rects
+caravel_0006b498_fill_pattern_0_6: 60000 rects
+caravel_0006b498_fill_pattern_4_2: 60000 rects
+caravel_0006b498_fill_pattern_0_4: 80000 rects
+caravel_0006b498_fill_pattern_1_7: 70000 rects
+caravel_0006b498_fill_pattern_1_2: 10000 rects
+caravel_0006b498_fill_pattern_3_2: 40000 rects
+caravel_0006b498_fill_pattern_5_0: 40000 rects
+caravel_0006b498_fill_pattern_2_4: 80000 rects
+caravel_0006b498_fill_pattern_0_7: 100000 rects
+caravel_0006b498_fill_pattern_1_3: 20000 rects
+caravel_0006b498_fill_pattern_5_5: 90000 rects
+caravel_0006b498_fill_pattern_0_6: 70000 rects
+caravel_0006b498_fill_pattern_2_2: 60000 rects
+caravel_0006b498_fill_pattern_5_6: 70000 rects
+caravel_0006b498_fill_pattern_2_0: 90000 rects
+caravel_0006b498_fill_pattern_0_1: 50000 rects
+caravel_0006b498_fill_pattern_4_0: 20000 rects
+caravel_0006b498_fill_pattern_2_7: 10000 rects
+caravel_0006b498_fill_pattern_3_1: 90000 rects
+caravel_0006b498_fill_pattern_5_1: 120000 rects
+caravel_0006b498_fill_pattern_0_4: 90000 rects
+caravel_0006b498_fill_pattern_1_7: 80000 rects
+caravel_0006b498_fill_pattern_3_7: 80000 rects
+caravel_0006b498_fill_pattern_1_4: 30000 rects
+caravel_0006b498_fill_pattern_1_1: 70000 rects
+caravel_0006b498_fill_pattern_4_2: 70000 rects
+caravel_0006b498_fill_pattern_0_5: 40000 rects
+caravel_0006b498_fill_pattern_3_2: 50000 rects
+caravel_0006b498_fill_pattern_2_5: 10000 rects
+caravel_0006b498_fill_pattern_0_7: 110000 rects
+caravel_0006b498_fill_pattern_0_6: 80000 rects
+caravel_0006b498_fill_pattern_4_7: 30000 rects
+caravel_0006b498_fill_pattern_1_7: 90000 rects
+caravel_0006b498_fill_pattern_3_1: 100000 rects
+caravel_0006b498_fill_pattern_2_2: 70000 rects
+caravel_0006b498_fill_pattern_2_4: 90000 rects
+caravel_0006b498_fill_pattern_2_0: 100000 rects
+caravel_0006b498_fill_pattern_4_2: 80000 rects
+caravel_0006b498_fill_pattern_0_4: 100000 rects
+caravel_0006b498_fill_pattern_4_1: 30000 rects
+caravel_0006b498_fill_pattern_0_5: 50000 rects
+caravel_0006b498_fill_pattern_1_4: 40000 rects
+caravel_0006b498_fill_pattern_5_6: 80000 rects
+caravel_0006b498_fill_pattern_1_2: 20000 rects
+caravel_0006b498_fill_pattern_3_2: 60000 rects
+caravel_0006b498_fill_pattern_5_1: 130000 rects
+caravel_0006b498_fill_pattern_5_0: 50000 rects
+caravel_0006b498_fill_pattern_3_7: 90000 rects
+caravel_0006b498_fill_pattern_0_1: 60000 rects
+caravel_0006b498_fill_pattern_0_7: 120000 rects
+caravel_0006b498_fill_pattern_1_1: 80000 rects
+caravel_0006b498_fill_pattern_1_7: 100000 rects
+caravel_0006b498_fill_pattern_0_6: 90000 rects
+caravel_0006b498_fill_pattern_4_7: 40000 rects
+caravel_0006b498_fill_pattern_5_5: 100000 rects
+caravel_0006b498_fill_pattern_2_2: 80000 rects
+caravel_0006b498_fill_pattern_0_5: 60000 rects
+caravel_0006b498_fill_pattern_0_4: 110000 rects
+caravel_0006b498_fill_pattern_2_0: 110000 rects
+caravel_0006b498_fill_pattern_2_5: 20000 rects
+caravel_0006b498_fill_pattern_1_4: 50000 rects
+caravel_0006b498_fill_pattern_2_4: 100000 rects
+caravel_0006b498_fill_pattern_3_2: 70000 rects
+caravel_0006b498_fill_pattern_3_7: 100000 rects
+caravel_0006b498_fill_pattern_1_7: 110000 rects
+caravel_0006b498_fill_pattern_3_1: 110000 rects
+caravel_0006b498_fill_pattern_5_1: 140000 rects
+caravel_0006b498_fill_pattern_4_7: 50000 rects
+caravel_0006b498_fill_pattern_0_7: 130000 rects
+caravel_0006b498_fill_pattern_0_6: 100000 rects
+caravel_0006b498_fill_pattern_4_2: 90000 rects
+caravel_0006b498_fill_pattern_4_1: 40000 rects
+caravel_0006b498_fill_pattern_5_6: 90000 rects
+caravel_0006b498_fill_pattern_2_2: 90000 rects
+caravel_0006b498_fill_pattern_5_0: 60000 rects
+caravel_0006b498_fill_pattern_0_1: 70000 rects
+caravel_0006b498_fill_pattern_1_3: 30000 rects
+caravel_0006b498_fill_pattern_0_4: 120000 rects
+caravel_0006b498_fill_pattern_1_1: 90000 rects
+caravel_0006b498_fill_pattern_2_0: 120000 rects
+caravel_0006b498_fill_pattern_0_5: 70000 rects
+caravel_0006b498_fill_pattern_4_7: 60000 rects
+caravel_0006b498_fill_pattern_4_0: 30000 rects
+caravel_0006b498_fill_pattern_1_4: 60000 rects
+caravel_0006b498_fill_pattern_0_6: 110000 rects
+caravel_0006b498_fill_pattern_3_7: 110000 rects
+caravel_0006b498_fill_pattern_1_7: 120000 rects
+caravel_0006b498_fill_pattern_3_2: 80000 rects
+caravel_0006b498_fill_pattern_3_1: 120000 rects
+caravel_0006b498_fill_pattern_2_2: 100000 rects
+caravel_0006b498_fill_pattern_0_7: 140000 rects
+caravel_0006b498_fill_pattern_0_4: 130000 rects
+caravel_0006b498_fill_pattern_2_4: 110000 rects
+caravel_0006b498_fill_pattern_2_7: 20000 rects
+caravel_0006b498_fill_pattern_5_1: 150000 rects
+caravel_0006b498_fill_pattern_5_5: 110000 rects
+caravel_0006b498_fill_pattern_5_6: 100000 rects
+caravel_0006b498_fill_pattern_2_0: 130000 rects
+caravel_0006b498_fill_pattern_4_2: 100000 rects
+caravel_0006b498_fill_pattern_1_1: 100000 rects
+caravel_0006b498_fill_pattern_0_6: 120000 rects
+caravel_0006b498_fill_pattern_4_1: 50000 rects
+caravel_0006b498_fill_pattern_0_1: 80000 rects
+caravel_0006b498_fill_pattern_1_7: 130000 rects
+caravel_0006b498_fill_pattern_1_4: 70000 rects
+caravel_0006b498_fill_pattern_2_2: 110000 rects
+caravel_0006b498_fill_pattern_4_7: 70000 rects
+caravel_0006b498_fill_pattern_5_0: 70000 rects
+caravel_0006b498_fill_pattern_3_2: 90000 rects
+caravel_0006b498_fill_pattern_3_1: 130000 rects
+caravel_0006b498_fill_pattern_0_5: 80000 rects
+caravel_0006b498_fill_pattern_3_7: 120000 rects
+caravel_0006b498_fill_pattern_4_0: 40000 rects
+caravel_0006b498_fill_pattern_0_4: 140000 rects
+caravel_0006b498_fill_pattern_5_1: 160000 rects
+caravel_0006b498_fill_pattern_1_3: 40000 rects
+caravel_0006b498_fill_pattern_0_7: 150000 rects
+caravel_0006b498_fill_pattern_0_6: 130000 rects
+caravel_0006b498_fill_pattern_2_0: 140000 rects
+caravel_0006b498_fill_pattern_1_1: 110000 rects
+caravel_0006b498_fill_pattern_1_7: 140000 rects
+caravel_0006b498_fill_pattern_2_2: 120000 rects
+caravel_0006b498_fill_pattern_2_4: 120000 rects
+caravel_0006b498_fill_pattern_1_4: 80000 rects
+caravel_0006b498_fill_pattern_2_7: 30000 rects
+caravel_0006b498_fill_pattern_3_5: 10000 rects
+caravel_0006b498_fill_pattern_5_5: 120000 rects
+caravel_0006b498_fill_pattern_0_1: 90000 rects
+caravel_0006b498_fill_pattern_3_2: 100000 rects
+caravel_0006b498_fill_pattern_1_2: 30000 rects
+caravel_0006b498_fill_pattern_3_1: 140000 rects
+caravel_0006b498_fill_pattern_0_4: 150000 rects
+caravel_0006b498_fill_pattern_4_2: 110000 rects
+caravel_0006b498_fill_pattern_4_7: 80000 rects
+caravel_0006b498_fill_pattern_4_1: 60000 rects
+caravel_0006b498_fill_pattern_5_6: 110000 rects
+caravel_0006b498_fill_pattern_1_7: 150000 rects
+caravel_0006b498_fill_pattern_0_6: 140000 rects
+caravel_0006b498_fill_pattern_0_5: 90000 rects
+caravel_0006b498_fill_pattern_5_1: 170000 rects
+caravel_0006b498_fill_pattern_2_2: 130000 rects
+caravel_0006b498_fill_pattern_3_7: 130000 rects
+caravel_0006b498_fill_pattern_5_0: 80000 rects
+caravel_0006b498_fill_pattern_0_7: 160000 rects
+caravel_0006b498_fill_pattern_1_4: 90000 rects
+caravel_0006b498_fill_pattern_4_0: 50000 rects
+caravel_0006b498_fill_pattern_3_2: 110000 rects
+caravel_0006b498_fill_pattern_2_5: 30000 rects
+caravel_0006b498_fill_pattern_2_0: 150000 rects
+caravel_0006b498_fill_pattern_0_4: 160000 rects
+caravel_0006b498_fill_pattern_0_1: 100000 rects
+caravel_0006b498_fill_pattern_3_1: 150000 rects
+caravel_0006b498_fill_pattern_1_7: 160000 rects
+caravel_0006b498_fill_pattern_2_7: 40000 rects
+caravel_0006b498_fill_pattern_0_6: 150000 rects
+caravel_0006b498_fill_pattern_1_1: 120000 rects
+caravel_0006b498_fill_pattern_1_3: 50000 rects
+caravel_0006b498_fill_pattern_2_4: 130000 rects
+caravel_0006b498_fill_pattern_5_5: 130000 rects
+caravel_0006b498_fill_pattern_5_1: 180000 rects
+caravel_0006b498_fill_pattern_3_5: 20000 rects
+caravel_0006b498_fill_pattern_3_2: 120000 rects
+caravel_0006b498_fill_pattern_4_2: 120000 rects
+caravel_0006b498_fill_pattern_2_2: 140000 rects
+caravel_0006b498_fill_pattern_4_1: 70000 rects
+caravel_0006b498_fill_pattern_1_4: 100000 rects
+caravel_0006b498_fill_pattern_4_7: 90000 rects
+caravel_0006b498_fill_pattern_0_4: 170000 rects
+caravel_0006b498_fill_pattern_3_7: 140000 rects
+caravel_0006b498_fill_pattern_0_7: 170000 rects
+caravel_0006b498_fill_pattern_1_7: 170000 rects
+caravel_0006b498_fill_pattern_5_6: 120000 rects
+caravel_0006b498_fill_pattern_4_0: 60000 rects
+caravel_0006b498_fill_pattern_0_6: 160000 rects
+caravel_0006b498_fill_pattern_1_2: 40000 rects
+caravel_0006b498_fill_pattern_0_5: 100000 rects
+caravel_0006b498_fill_pattern_2_0: 160000 rects
+caravel_0006b498_fill_pattern_1_1: 130000 rects
+caravel_0006b498_fill_pattern_0_1: 110000 rects
+caravel_0006b498_fill_pattern_3_1: 160000 rects
+caravel_0006b498_fill_pattern_5_0: 90000 rects
+caravel_0006b498_fill_pattern_2_5: 40000 rects
+caravel_0006b498_fill_pattern_0_4: 180000 rects
+caravel_0006b498_fill_pattern_3_2: 130000 rects
+caravel_0006b498_fill_pattern_2_2: 150000 rects
+caravel_0006b498_fill_pattern_1_0: 10000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_5_1: 190000 rects
+caravel_0006b498_fill_pattern_2_7: 50000 rects
+caravel_0006b498_fill_pattern_0_6: 170000 rects
+caravel_0006b498_fill_pattern_1_3: 60000 rects
+caravel_0006b498_fill_pattern_1_4: 110000 rects
+caravel_0006b498_fill_pattern_2_4: 140000 rects
+caravel_0006b498_fill_pattern_4_2: 130000 rects
+caravel_0006b498_fill_pattern_1_7: 180000 rects
+caravel_0006b498_fill_pattern_0_1: 120000 rects
+caravel_0006b498_fill_pattern_4_1: 80000 rects
+caravel_0006b498_fill_pattern_5_5: 140000 rects
+caravel_0006b498_fill_pattern_3_7: 150000 rects
+caravel_0006b498_fill_pattern_4_7: 100000 rects
+caravel_0006b498_fill_pattern_1_1: 140000 rects
+caravel_0006b498_fill_pattern_0_4: 190000 rects
+caravel_0006b498_fill_pattern_2_0: 170000 rects
+caravel_0006b498_fill_pattern_2_2: 160000 rects
+caravel_0006b498_fill_pattern_0_5: 110000 rects
+caravel_0006b498_fill_pattern_4_0: 70000 rects
+caravel_0006b498_fill_pattern_3_1: 170000 rects
+caravel_0006b498_fill_pattern_0_6: 180000 rects
+caravel_0006b498_fill_pattern_0_7: 180000 rects
+caravel_0006b498_fill_pattern_3_2: 140000 rects
+caravel_0006b498_fill_pattern_1_2: 50000 rects
+caravel_0006b498_fill_pattern_1_0: 20000 rects
+caravel_0006b498_fill_pattern_1_7: 190000 rects
+caravel_0006b498_fill_pattern_0_4: 200000 rects
+caravel_0006b498_fill_pattern_2_5: 50000 rects
+caravel_0006b498_fill_pattern_0_1: 130000 rects
+caravel_0006b498_fill_pattern_1_4: 120000 rects
+caravel_0006b498_fill_pattern_5_6: 130000 rects
+caravel_0006b498_fill_pattern_1_1: 150000 rects
+caravel_0006b498_fill_pattern_2_7: 60000 rects
+caravel_0006b498_fill_pattern_4_2: 140000 rects
+caravel_0006b498_fill_pattern_2_2: 170000 rects
+caravel_0006b498_fill_pattern_2_0: 180000 rects
+caravel_0006b498_fill_pattern_1_3: 70000 rects
+caravel_0006b498_fill_pattern_0_6: 190000 rects
+caravel_0006b498_fill_pattern_2_4: 150000 rects
+caravel_0006b498_fill_pattern_3_7: 160000 rects
+caravel_0006b498_fill_pattern_4_7: 110000 rects
+caravel_0006b498_fill_pattern_0_7: 190000 rects
+caravel_0006b498_fill_pattern_5_1: 200000 rects
+caravel_0006b498_fill_pattern_4_1: 90000 rects
+caravel_0006b498_fill_pattern_0_4: 210000 rects
+caravel_0006b498_fill_pattern_0_5: 120000 rects
+caravel_0006b498_fill_pattern_1_7: 200000 rects
+caravel_0006b498_fill_pattern_3_2: 150000 rects
+caravel_0006b498_fill_pattern_4_0: 80000 rects
+caravel_0006b498_fill_pattern_5_0: 100000 rects
+caravel_0006b498_fill_pattern_5_5: 150000 rects
+caravel_0006b498_fill_pattern_0_1: 140000 rects
+caravel_0006b498_fill_pattern_1_4: 130000 rects
+caravel_0006b498_fill_pattern_0_6: 200000 rects
+caravel_0006b498_fill_pattern_2_2: 180000 rects
+caravel_0006b498_fill_pattern_1_1: 160000 rects
+caravel_0006b498_fill_pattern_1_2: 60000 rects
+caravel_0006b498_fill_pattern_2_0: 190000 rects
+caravel_0006b498_fill_pattern_0_4: 220000 rects
+caravel_0006b498_fill_pattern_2_5: 60000 rects
+caravel_0006b498_fill_pattern_5_6: 140000 rects
+caravel_0006b498_fill_pattern_2_7: 70000 rects
+caravel_0006b498_fill_pattern_4_2: 150000 rects
+caravel_0006b498_fill_pattern_3_1: 180000 rects
+caravel_0006b498_fill_pattern_0_7: 200000 rects
+caravel_0006b498_fill_pattern_1_3: 80000 rects
+caravel_0006b498_fill_pattern_2_4: 160000 rects
+caravel_0006b498_fill_pattern_0_6: 210000 rects
+caravel_0006b498_fill_pattern_3_7: 170000 rects
+caravel_0006b498_fill_pattern_2_2: 190000 rects
+caravel_0006b498_fill_pattern_4_7: 120000 rects
+caravel_0006b498_fill_pattern_1_7: 210000 rects
+caravel_0006b498_fill_pattern_0_5: 130000 rects
+caravel_0006b498_fill_pattern_3_2: 160000 rects
+caravel_0006b498_fill_pattern_4_1: 100000 rects
+caravel_0006b498_fill_pattern_0_1: 150000 rects
+caravel_0006b498_fill_pattern_1_4: 140000 rects
+caravel_0006b498_fill_pattern_5_1: 210000 rects
+caravel_0006b498_fill_pattern_5_5: 160000 rects
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+   Generating output for cell caravel_0006b498_fill_pattern_5_0
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+caravel_0006b498_fill_pattern_3_4: 140000 rects
+Ended: 11/16/2022 01:49:01
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+   Generating output for cell caravel_0006b498_fill_pattern_5_6
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+   Generating output for cell caravel_0006b498_fill_pattern_5_5
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+CIF output style is now "wafflefill(tiled)"
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0006b498_fill_pattern_5_3
+caravel_0006b498_fill_pattern_4_3: 450000 rects
+caravel_0006b498_fill_pattern_2_0: 1430000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_5_1
+caravel_0006b498_fill_pattern_4_0: 1040000 rects
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+   Generating output for cell caravel_0006b498_fill_pattern_1_7
+caravel_0006b498_fill_pattern_3_4: 1300000 rects
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+   Generating output for cell caravel_0006b498_fill_pattern_3_7
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+Ended: 11/16/2022 01:49:07
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0006b498_fill_pattern_5_4
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0006b498_fill_pattern_2_7
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+caravel_0006b498_fill_pattern_0_3: 2570000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_4_0
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+   Generating output for cell caravel_0006b498_fill_pattern_0_6
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0006b498_fill_pattern_4_6
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+CIF output style is now "wafflefill(tiled)"
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+   Generating output for cell caravel_0006b498_fill_pattern_0_3
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+caravel_0006b498_fill_pattern_1_3: 3990000 rects
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+caravel_0006b498_fill_pattern_1_0: 3700000 rects
+caravel_0006b498_fill_pattern_3_6: 2640000 rects
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+caravel_0006b498_fill_pattern_4_2: 3120000 rects
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+caravel_0006b498_fill_pattern_3_4: 2690000 rects
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+caravel_0006b498_fill_pattern_4_2: 3130000 rects
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+caravel_0006b498_fill_pattern_3_3: 3710000 rects
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+caravel_0006b498_fill_pattern_2_4: 2810000 rects
+caravel_0006b498_fill_pattern_2_0: 3320000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_1_3: 4040000 rects
+caravel_0006b498_fill_pattern_2_6: 2650000 rects
+caravel_0006b498_fill_pattern_0_1: 3390000 rects
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+caravel_0006b498_fill_pattern_0_2: 3370000 rects
+caravel_0006b498_fill_pattern_0_0: 2970000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_0_4
+caravel_0006b498_fill_pattern_3_0: 3800000 rects
+caravel_0006b498_fill_pattern_1_2: 3810000 rects
+caravel_0006b498_fill_pattern_3_5: 2710000 rects
+caravel_0006b498_fill_pattern_1_0: 3710000 rects
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+caravel_0006b498_fill_pattern_1_3: 4050000 rects
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+caravel_0006b498_fill_pattern_1_1: 3330000 rects
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+caravel_0006b498_fill_pattern_2_1: 3000000 rects
+caravel_0006b498_fill_pattern_1_4: 2870000 rects
+caravel_0006b498_fill_pattern_3_6: 2660000 rects
+caravel_0006b498_fill_pattern_0_2: 3380000 rects
+caravel_0006b498_fill_pattern_4_4: 3000000 rects
+caravel_0006b498_fill_pattern_4_3: 2940000 rects
+caravel_0006b498_fill_pattern_1_3: 4060000 rects
+caravel_0006b498_fill_pattern_1_5: 2730000 rects
+caravel_0006b498_fill_pattern_3_3: 3720000 rects
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+caravel_0006b498_fill_pattern_1_3: 4070000 rects
+caravel_0006b498_fill_pattern_3_5: 2720000 rects
+caravel_0006b498_fill_pattern_2_5: 2880000 rects
+caravel_0006b498_fill_pattern_0_5: 3770000 rects
+caravel_0006b498_fill_pattern_0_2: 3390000 rects
+caravel_0006b498_fill_pattern_4_4: 3010000 rects
+caravel_0006b498_fill_pattern_3_4: 2710000 rects
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+caravel_0006b498_fill_pattern_2_3: 3130000 rects
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+caravel_0006b498_fill_pattern_1_6: 2810000 rects
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+caravel_0006b498_fill_pattern_1_3: 4090000 rects
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+caravel_0006b498_fill_pattern_2_5: 2890000 rects
+caravel_0006b498_fill_pattern_3_6: 2680000 rects
+caravel_0006b498_fill_pattern_3_4: 2720000 rects
+caravel_0006b498_fill_pattern_1_4: 2890000 rects
+caravel_0006b498_fill_pattern_4_4: 3050000 rects
+caravel_0006b498_fill_pattern_1_3: 4100000 rects
+caravel_0006b498_fill_pattern_3_3: 3730000 rects
+caravel_0006b498_fill_pattern_3_2: 3980000 rects
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+caravel_0006b498_fill_pattern_0_2: 3410000 rects
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+caravel_0006b498_fill_pattern_3_2: 3990000 rects
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+caravel_0006b498_fill_pattern_1_4: 2900000 rects
+caravel_0006b498_fill_pattern_0_2: 3420000 rects
+caravel_0006b498_fill_pattern_2_5: 2900000 rects
+caravel_0006b498_fill_pattern_4_1: 3280000 rects
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+caravel_0006b498_fill_pattern_1_3: 4120000 rects
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+caravel_0006b498_fill_pattern_1_3: 4140000 rects
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+caravel_0006b498_fill_pattern_3_6: 2700000 rects
+caravel_0006b498_fill_pattern_3_4: 2740000 rects
+caravel_0006b498_fill_pattern_1_0: 3740000 rects
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+caravel_0006b498_fill_pattern_2_4: 2860000 rects
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+caravel_0006b498_fill_pattern_4_4: 3090000 rects
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+caravel_0006b498_fill_pattern_3_3: 3750000 rects
+caravel_0006b498_fill_pattern_3_5: 2760000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_2_5: 2920000 rects
+caravel_0006b498_fill_pattern_0_2: 3450000 rects
+caravel_0006b498_fill_pattern_3_6: 2710000 rects
+caravel_0006b498_fill_pattern_3_4: 2750000 rects
+caravel_0006b498_fill_pattern_3_2: 4040000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_4_2
+caravel_0006b498_fill_pattern_1_3: 4170000 rects
+caravel_0006b498_fill_pattern_2_2: 3380000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_1_6: 2850000 rects
+caravel_0006b498_fill_pattern_4_4: 3100000 rects
+caravel_0006b498_fill_pattern_2_1: 3040000 rects
+caravel_0006b498_fill_pattern_3_0: 3850000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_4_3
+caravel_0006b498_fill_pattern_1_0: 3750000 rects
+caravel_0006b498_fill_pattern_3_2: 4050000 rects
+caravel_0006b498_fill_pattern_1_4: 2930000 rects
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+caravel_0006b498_fill_pattern_1_4: 2950000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_2_0: 3370000 rects
+caravel_0006b498_fill_pattern_0_1: 3520000 rects
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+caravel_0006b498_fill_pattern_3_0: 3870000 rects
+caravel_0006b498_fill_pattern_3_3: 3770000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_0_5
+caravel_0006b498_fill_pattern_1_5: 2800000 rects
+caravel_0006b498_fill_pattern_2_6: 2730000 rects
+caravel_0006b498_fill_pattern_2_4: 2900000 rects
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+caravel_0006b498_fill_pattern_1_3: 4260000 rects
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+caravel_0006b498_fill_pattern_0_2: 3530000 rects
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+   Generating output for cell caravel_0006b498_fill_pattern_4_1
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+   Generating output for cell caravel_0006b498_fill_pattern_2_2
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+caravel_0006b498_fill_pattern_3_2: 5380000 rects
+caravel_0006b498_fill_pattern_3_3: 4910000 rects
+caravel_0006b498_fill_pattern_1_6: 3380000 rects
+caravel_0006b498_fill_pattern_0_0: 3540000 rects
+caravel_0006b498_fill_pattern_0_1: 4310000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_2_6: 3270000 rects
+caravel_0006b498_fill_pattern_3_5: 3310000 rects
+caravel_0006b498_fill_pattern_2_5: 3420000 rects
+caravel_0006b498_fill_pattern_1_1: 3780000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_1_4
+caravel_0006b498_fill_pattern_3_3: 4920000 rects
+caravel_0006b498_fill_pattern_2_1: 3490000 rects
+caravel_0006b498_fill_pattern_3_6: 3270000 rects
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+caravel_0006b498_fill_pattern_3_0: 4440000 rects
+caravel_0006b498_fill_pattern_3_3: 4930000 rects
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+caravel_0006b498_fill_pattern_1_5: 3340000 rects
+caravel_0006b498_fill_pattern_0_0: 3560000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_3_4: 3320000 rects
+caravel_0006b498_fill_pattern_3_3: 4940000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_2_4
+caravel_0006b498_fill_pattern_1_6: 3390000 rects
+caravel_0006b498_fill_pattern_3_1: 3580000 rects
+caravel_0006b498_fill_pattern_2_0: 3790000 rects
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+caravel_0006b498_fill_pattern_3_5: 3360000 rects
+caravel_0006b498_fill_pattern_3_3: 5070000 rects
+caravel_0006b498_fill_pattern_2_5: 3550000 rects
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+caravel_0006b498_fill_pattern_0_0: 3690000 rects
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+caravel_0006b498_fill_pattern_3_1: 3630000 rects
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+caravel_0006b498_fill_pattern_1_6: 3510000 rects
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+caravel_0006b498_fill_pattern_3_6: 3350000 rects
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+caravel_0006b498_fill_pattern_1_6: 3560000 rects
+caravel_0006b498_fill_pattern_3_1: 3650000 rects
+caravel_0006b498_fill_pattern_0_1: 4460000 rects
+caravel_0006b498_fill_pattern_3_3: 5170000 rects
+caravel_0006b498_fill_pattern_3_2: 5510000 rects
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+caravel_0006b498_fill_pattern_2_6: 3360000 rects
+caravel_0006b498_fill_pattern_3_0: 4550000 rects
+caravel_0006b498_fill_pattern_3_5: 3400000 rects
+caravel_0006b498_fill_pattern_3_3: 5180000 rects
+caravel_0006b498_fill_pattern_1_1: 3880000 rects
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+caravel_0006b498_fill_pattern_2_0: 3960000 rects
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+caravel_0006b498_fill_pattern_3_4: 3410000 rects
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+caravel_0006b498_fill_pattern_1_5: 3430000 rects
+caravel_0006b498_fill_pattern_2_0: 3970000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_1_6: 3570000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_2_5
+caravel_0006b498_fill_pattern_3_0: 4560000 rects
+caravel_0006b498_fill_pattern_3_1: 3660000 rects
+caravel_0006b498_fill_pattern_3_3: 5200000 rects
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+caravel_0006b498_fill_pattern_2_0: 4030000 rects
+caravel_0006b498_fill_pattern_3_5: 3440000 rects
+CIF output style is now "wafflefill(tiled)"
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+caravel_0006b498_fill_pattern_0_0: 3930000 rects
+caravel_0006b498_fill_pattern_3_4: 3440000 rects
+caravel_0006b498_fill_pattern_1_5: 3510000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_1_6
+caravel_0006b498_fill_pattern_1_2: 5330000 rects
+caravel_0006b498_fill_pattern_3_5: 3450000 rects
+caravel_0006b498_fill_pattern_3_3: 5280000 rects
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+caravel_0006b498_fill_pattern_3_5: 3460000 rects
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+caravel_0006b498_fill_pattern_3_5: 3500000 rects
+caravel_0006b498_fill_pattern_1_5: 3570000 rects
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+caravel_0006b498_fill_pattern_1_1: 3980000 rects
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+caravel_0006b498_fill_pattern_3_1: 3740000 rects
+caravel_0006b498_fill_pattern_0_1: 4670000 rects
+caravel_0006b498_fill_pattern_3_6: 3490000 rects
+caravel_0006b498_fill_pattern_3_3: 5420000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_3_4: 3540000 rects
+caravel_0006b498_fill_pattern_3_6: 3500000 rects
+caravel_0006b498_fill_pattern_2_6: 3480000 rects
+caravel_0006b498_fill_pattern_2_0: 4120000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_1_5
+caravel_0006b498_fill_pattern_3_6: 3510000 rects
+caravel_0006b498_fill_pattern_1_0: 4440000 rects
+caravel_0006b498_fill_pattern_2_1: 3670000 rects
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+caravel_0006b498_fill_pattern_2_6: 3490000 rects
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+caravel_0006b498_fill_pattern_3_6: 3530000 rects
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+caravel_0006b498_fill_pattern_3_2: 5590000 rects
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+caravel_0006b498_fill_pattern_2_6: 3540000 rects
+caravel_0006b498_fill_pattern_3_4: 3580000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_3_3: 5450000 rects
+caravel_0006b498_fill_pattern_2_6: 3550000 rects
+caravel_0006b498_fill_pattern_3_1: 3760000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_3_5
+caravel_0006b498_fill_pattern_1_1: 4030000 rects
+caravel_0006b498_fill_pattern_2_6: 3560000 rects
+caravel_0006b498_fill_pattern_3_0: 4690000 rects
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+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_1_0: 4490000 rects
+caravel_0006b498_fill_pattern_2_0: 4200000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_0_1
+caravel_0006b498_fill_pattern_3_1: 3790000 rects
+caravel_0006b498_fill_pattern_3_3: 5500000 rects
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+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_1_3: 5410000 rects
+caravel_0006b498_fill_pattern_0_0: 3980000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_3_6
+caravel_0006b498_fill_pattern_2_1: 3730000 rects
+caravel_0006b498_fill_pattern_3_3: 5510000 rects
+caravel_0006b498_fill_pattern_1_0: 4500000 rects
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+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_2_0: 4240000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_2_6
+caravel_0006b498_fill_pattern_0_0: 4010000 rects
+caravel_0006b498_fill_pattern_3_3: 5530000 rects
+caravel_0006b498_fill_pattern_2_0: 4250000 rects
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+caravel_0006b498_fill_pattern_0_0: 4030000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0006b498_fill_pattern_3_4
+caravel_0006b498_fill_pattern_3_0: 4770000 rects
+caravel_0006b498_fill_pattern_1_1: 4100000 rects
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+caravel_0006b498_fill_pattern_1_0: 6650000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_1_2: 6430000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_3_1
+caravel_0006b498_fill_pattern_3_3: 6040000 rects
+caravel_0006b498_fill_pattern_1_2: 6440000 rects
+caravel_0006b498_fill_pattern_3_2: 6080000 rects
+caravel_0006b498_fill_pattern_3_0: 6920000 rects
+caravel_0006b498_fill_pattern_2_1: 5480000 rects
+caravel_0006b498_fill_pattern_1_3: 6550000 rects
+caravel_0006b498_fill_pattern_1_1: 5910000 rects
+caravel_0006b498_fill_pattern_1_0: 6660000 rects
+caravel_0006b498_fill_pattern_3_2: 6090000 rects
+caravel_0006b498_fill_pattern_2_1: 5490000 rects
+caravel_0006b498_fill_pattern_3_0: 6930000 rects
+caravel_0006b498_fill_pattern_3_3: 6050000 rects
+caravel_0006b498_fill_pattern_1_3: 6560000 rects
+caravel_0006b498_fill_pattern_2_1: 5500000 rects
+caravel_0006b498_fill_pattern_1_1: 5920000 rects
+caravel_0006b498_fill_pattern_3_0: 6940000 rects
+caravel_0006b498_fill_pattern_3_2: 6100000 rects
+caravel_0006b498_fill_pattern_1_0: 6670000 rects
+caravel_0006b498_fill_pattern_3_0: 6950000 rects
+caravel_0006b498_fill_pattern_2_1: 5510000 rects
+caravel_0006b498_fill_pattern_3_3: 6060000 rects
+caravel_0006b498_fill_pattern_3_0: 6960000 rects
+caravel_0006b498_fill_pattern_2_1: 5520000 rects
+caravel_0006b498_fill_pattern_3_2: 6110000 rects
+caravel_0006b498_fill_pattern_2_1: 5530000 rects
+caravel_0006b498_fill_pattern_3_0: 6970000 rects
+caravel_0006b498_fill_pattern_2_1: 5540000 rects
+caravel_0006b498_fill_pattern_1_0: 6680000 rects
+caravel_0006b498_fill_pattern_2_1: 5550000 rects
+caravel_0006b498_fill_pattern_2_1: 5560000 rects
+caravel_0006b498_fill_pattern_1_1: 5930000 rects
+caravel_0006b498_fill_pattern_1_3: 6570000 rects
+caravel_0006b498_fill_pattern_3_0: 6980000 rects
+caravel_0006b498_fill_pattern_2_1: 5570000 rects
+caravel_0006b498_fill_pattern_2_1: 5580000 rects
+caravel_0006b498_fill_pattern_3_3: 6070000 rects
+caravel_0006b498_fill_pattern_2_1: 5590000 rects
+caravel_0006b498_fill_pattern_3_0: 6990000 rects
+caravel_0006b498_fill_pattern_1_0: 6690000 rects
+caravel_0006b498_fill_pattern_3_0: 7000000 rects
+caravel_0006b498_fill_pattern_3_2: 6120000 rects
+caravel_0006b498_fill_pattern_2_1: 5600000 rects
+caravel_0006b498_fill_pattern_1_0: 6700000 rects
+caravel_0006b498_fill_pattern_2_1: 5610000 rects
+caravel_0006b498_fill_pattern_3_0: 7010000 rects
+caravel_0006b498_fill_pattern_1_2: 6450000 rects
+caravel_0006b498_fill_pattern_1_0: 6710000 rects
+caravel_0006b498_fill_pattern_3_0: 7020000 rects
+caravel_0006b498_fill_pattern_1_1: 5940000 rects
+caravel_0006b498_fill_pattern_3_0: 7030000 rects
+caravel_0006b498_fill_pattern_3_3: 6080000 rects
+caravel_0006b498_fill_pattern_2_1: 5620000 rects
+caravel_0006b498_fill_pattern_3_0: 7040000 rects
+caravel_0006b498_fill_pattern_3_0: 7050000 rects
+caravel_0006b498_fill_pattern_1_3: 6580000 rects
+caravel_0006b498_fill_pattern_1_0: 6720000 rects
+caravel_0006b498_fill_pattern_3_0: 7060000 rects
+caravel_0006b498_fill_pattern_3_2: 6130000 rects
+caravel_0006b498_fill_pattern_2_1: 5630000 rects
+Ended: 11/16/2022 01:49:49
+caravel_0006b498_fill_pattern_3_0: 7070000 rects
+caravel_0006b498_fill_pattern_1_0: 6730000 rects
+caravel_0006b498_fill_pattern_3_0: 7080000 rects
+caravel_0006b498_fill_pattern_1_2: 6460000 rects
+caravel_0006b498_fill_pattern_2_1: 5640000 rects
+caravel_0006b498_fill_pattern_3_2: 6140000 rects
+caravel_0006b498_fill_pattern_1_0: 6740000 rects
+caravel_0006b498_fill_pattern_1_1: 5950000 rects
+caravel_0006b498_fill_pattern_3_3: 6090000 rects
+caravel_0006b498_fill_pattern_3_0: 7090000 rects
+caravel_0006b498_fill_pattern_1_0: 6750000 rects
+caravel_0006b498_fill_pattern_2_1: 5650000 rects
+caravel_0006b498_fill_pattern_1_0: 6760000 rects
+caravel_0006b498_fill_pattern_1_2: 6470000 rects
+caravel_0006b498_fill_pattern_3_2: 6150000 rects
+caravel_0006b498_fill_pattern_1_0: 6770000 rects
+caravel_0006b498_fill_pattern_2_1: 5660000 rects
+caravel_0006b498_fill_pattern_1_0: 6780000 rects
+caravel_0006b498_fill_pattern_3_0: 7100000 rects
+caravel_0006b498_fill_pattern_1_0: 6790000 rects
+caravel_0006b498_fill_pattern_3_2: 6160000 rects
+caravel_0006b498_fill_pattern_1_1: 5960000 rects
+caravel_0006b498_fill_pattern_1_0: 6800000 rects
+caravel_0006b498_fill_pattern_1_3: 6590000 rects
+caravel_0006b498_fill_pattern_1_0: 6810000 rects
+caravel_0006b498_fill_pattern_2_1: 5670000 rects
+caravel_0006b498_fill_pattern_1_0: 6820000 rects
+caravel_0006b498_fill_pattern_3_2: 6170000 rects
+caravel_0006b498_fill_pattern_1_0: 6830000 rects
+caravel_0006b498_fill_pattern_3_3: 6100000 rects
+caravel_0006b498_fill_pattern_3_0: 7110000 rects
+caravel_0006b498_fill_pattern_1_2: 6480000 rects
+caravel_0006b498_fill_pattern_2_1: 5680000 rects
+caravel_0006b498_fill_pattern_3_2: 6180000 rects
+caravel_0006b498_fill_pattern_1_1: 5970000 rects
+caravel_0006b498_fill_pattern_1_0: 6840000 rects
+caravel_0006b498_fill_pattern_3_0: 7120000 rects
+caravel_0006b498_fill_pattern_3_2: 6190000 rects
+caravel_0006b498_fill_pattern_2_1: 5690000 rects
+caravel_0006b498_fill_pattern_3_0: 7130000 rects
+caravel_0006b498_fill_pattern_3_2: 6200000 rects
+caravel_0006b498_fill_pattern_3_0: 7140000 rects
+caravel_0006b498_fill_pattern_2_1: 5700000 rects
+caravel_0006b498_fill_pattern_1_2: 6490000 rects
+caravel_0006b498_fill_pattern_3_3: 6110000 rects
+caravel_0006b498_fill_pattern_1_0: 6850000 rects
+caravel_0006b498_fill_pattern_1_3: 6600000 rects
+caravel_0006b498_fill_pattern_1_1: 5980000 rects
+caravel_0006b498_fill_pattern_3_2: 6210000 rects
+caravel_0006b498_fill_pattern_3_0: 7150000 rects
+caravel_0006b498_fill_pattern_2_1: 5710000 rects
+caravel_0006b498_fill_pattern_3_0: 7160000 rects
+caravel_0006b498_fill_pattern_3_0: 7170000 rects
+caravel_0006b498_fill_pattern_2_1: 5720000 rects
+caravel_0006b498_fill_pattern_3_0: 7180000 rects
+caravel_0006b498_fill_pattern_1_0: 6860000 rects
+caravel_0006b498_fill_pattern_2_1: 5730000 rects
+caravel_0006b498_fill_pattern_3_2: 6220000 rects
+caravel_0006b498_fill_pattern_3_0: 7190000 rects
+caravel_0006b498_fill_pattern_2_1: 5740000 rects
+caravel_0006b498_fill_pattern_2_1: 5750000 rects
+caravel_0006b498_fill_pattern_1_2: 6500000 rects
+caravel_0006b498_fill_pattern_1_1: 5990000 rects
+caravel_0006b498_fill_pattern_3_0: 7200000 rects
+caravel_0006b498_fill_pattern_2_1: 5760000 rects
+caravel_0006b498_fill_pattern_3_3: 6120000 rects
+caravel_0006b498_fill_pattern_3_0: 7210000 rects
+caravel_0006b498_fill_pattern_1_0: 6870000 rects
+caravel_0006b498_fill_pattern_3_2: 6230000 rects
+caravel_0006b498_fill_pattern_1_0: 6880000 rects
+caravel_0006b498_fill_pattern_1_1: 6000000 rects
+caravel_0006b498_fill_pattern_2_1: 5770000 rects
+caravel_0006b498_fill_pattern_1_3: 6610000 rects
+caravel_0006b498_fill_pattern_1_0: 6890000 rects
+caravel_0006b498_fill_pattern_1_1: 6010000 rects
+caravel_0006b498_fill_pattern_1_1: 6020000 rects
+caravel_0006b498_fill_pattern_1_2: 6510000 rects
+caravel_0006b498_fill_pattern_1_0: 6900000 rects
+caravel_0006b498_fill_pattern_3_2: 6240000 rects
+caravel_0006b498_fill_pattern_3_3: 6130000 rects
+caravel_0006b498_fill_pattern_1_1: 6030000 rects
+caravel_0006b498_fill_pattern_3_0: 7220000 rects
+caravel_0006b498_fill_pattern_1_0: 6910000 rects
+caravel_0006b498_fill_pattern_1_1: 6040000 rects
+caravel_0006b498_fill_pattern_1_0: 6920000 rects
+caravel_0006b498_fill_pattern_1_1: 6050000 rects
+caravel_0006b498_fill_pattern_1_0: 6930000 rects
+caravel_0006b498_fill_pattern_2_1: 5780000 rects
+caravel_0006b498_fill_pattern_1_0: 6940000 rects
+caravel_0006b498_fill_pattern_3_2: 6250000 rects
+caravel_0006b498_fill_pattern_1_0: 6950000 rects
+caravel_0006b498_fill_pattern_1_1: 6060000 rects
+caravel_0006b498_fill_pattern_3_0: 7230000 rects
+caravel_0006b498_fill_pattern_3_3: 6140000 rects
+caravel_0006b498_fill_pattern_1_2: 6520000 rects
+caravel_0006b498_fill_pattern_1_1: 6070000 rects
+caravel_0006b498_fill_pattern_3_0: 7240000 rects
+caravel_0006b498_fill_pattern_3_2: 6260000 rects
+caravel_0006b498_fill_pattern_3_0: 7250000 rects
+caravel_0006b498_fill_pattern_1_0: 6960000 rects
+caravel_0006b498_fill_pattern_2_1: 5790000 rects
+caravel_0006b498_fill_pattern_3_0: 7260000 rects
+caravel_0006b498_fill_pattern_1_1: 6080000 rects
+caravel_0006b498_fill_pattern_1_3: 6620000 rects
+caravel_0006b498_fill_pattern_3_0: 7270000 rects
+caravel_0006b498_fill_pattern_3_2: 6270000 rects
+caravel_0006b498_fill_pattern_3_3: 6150000 rects
+caravel_0006b498_fill_pattern_1_1: 6090000 rects
+caravel_0006b498_fill_pattern_3_0: 7280000 rects
+caravel_0006b498_fill_pattern_1_0: 6970000 rects
+caravel_0006b498_fill_pattern_1_2: 6530000 rects
+caravel_0006b498_fill_pattern_1_1: 6100000 rects
+caravel_0006b498_fill_pattern_3_2: 6280000 rects
+caravel_0006b498_fill_pattern_1_0: 6980000 rects
+caravel_0006b498_fill_pattern_1_0: 6990000 rects
+caravel_0006b498_fill_pattern_3_3: 6160000 rects
+caravel_0006b498_fill_pattern_1_1: 6110000 rects
+caravel_0006b498_fill_pattern_1_0: 7000000 rects
+caravel_0006b498_fill_pattern_3_2: 6290000 rects
+caravel_0006b498_fill_pattern_1_2: 6540000 rects
+caravel_0006b498_fill_pattern_1_3: 6630000 rects
+caravel_0006b498_fill_pattern_1_0: 7010000 rects
+caravel_0006b498_fill_pattern_1_0: 7020000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0006b498_fill_pattern_2_1
+caravel_0006b498_fill_pattern_1_1: 6120000 rects
+caravel_0006b498_fill_pattern_3_2: 6300000 rects
+caravel_0006b498_fill_pattern_1_1: 6130000 rects
+caravel_0006b498_fill_pattern_3_3: 6170000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0006b498_fill_pattern_3_0
+caravel_0006b498_fill_pattern_1_0: 7030000 rects
+caravel_0006b498_fill_pattern_1_2: 6550000 rects
+caravel_0006b498_fill_pattern_3_2: 6310000 rects
+caravel_0006b498_fill_pattern_1_1: 6140000 rects
+caravel_0006b498_fill_pattern_3_3: 6180000 rects
+caravel_0006b498_fill_pattern_3_2: 6320000 rects
+caravel_0006b498_fill_pattern_1_1: 6150000 rects
+caravel_0006b498_fill_pattern_1_3: 6640000 rects
+caravel_0006b498_fill_pattern_3_3: 6190000 rects
+caravel_0006b498_fill_pattern_1_2: 6560000 rects
+caravel_0006b498_fill_pattern_3_2: 6330000 rects
+caravel_0006b498_fill_pattern_3_3: 6200000 rects
+caravel_0006b498_fill_pattern_1_1: 6160000 rects
+caravel_0006b498_fill_pattern_1_1: 6170000 rects
+caravel_0006b498_fill_pattern_3_3: 6210000 rects
+caravel_0006b498_fill_pattern_1_1: 6180000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_1_1: 6190000 rects
+caravel_0006b498_fill_pattern_3_2: 6340000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_1_0
+caravel_0006b498_fill_pattern_1_1: 6200000 rects
+caravel_0006b498_fill_pattern_3_3: 6220000 rects
+caravel_0006b498_fill_pattern_1_2: 6570000 rects
+caravel_0006b498_fill_pattern_3_3: 6230000 rects
+caravel_0006b498_fill_pattern_3_2: 6350000 rects
+caravel_0006b498_fill_pattern_1_1: 6210000 rects
+caravel_0006b498_fill_pattern_1_3: 6650000 rects
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+caravel_0006b498_fill_pattern_3_2: 6360000 rects
+caravel_0006b498_fill_pattern_3_3: 6250000 rects
+caravel_0006b498_fill_pattern_1_2: 6580000 rects
+caravel_0006b498_fill_pattern_1_1: 6220000 rects
+caravel_0006b498_fill_pattern_3_2: 6370000 rects
+caravel_0006b498_fill_pattern_3_3: 6260000 rects
+caravel_0006b498_fill_pattern_1_3: 6660000 rects
+caravel_0006b498_fill_pattern_3_2: 6380000 rects
+caravel_0006b498_fill_pattern_3_3: 6270000 rects
+caravel_0006b498_fill_pattern_1_3: 6670000 rects
+caravel_0006b498_fill_pattern_1_2: 6590000 rects
+caravel_0006b498_fill_pattern_1_1: 6230000 rects
+caravel_0006b498_fill_pattern_3_2: 6390000 rects
+caravel_0006b498_fill_pattern_3_3: 6280000 rects
+caravel_0006b498_fill_pattern_1_3: 6680000 rects
+caravel_0006b498_fill_pattern_3_3: 6290000 rects
+caravel_0006b498_fill_pattern_3_2: 6400000 rects
+caravel_0006b498_fill_pattern_1_3: 6690000 rects
+caravel_0006b498_fill_pattern_1_3: 6700000 rects
+caravel_0006b498_fill_pattern_1_2: 6600000 rects
+caravel_0006b498_fill_pattern_1_3: 6710000 rects
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+caravel_0006b498_fill_pattern_3_2: 6410000 rects
+caravel_0006b498_fill_pattern_3_3: 6300000 rects
+caravel_0006b498_fill_pattern_1_3: 6730000 rects
+caravel_0006b498_fill_pattern_3_2: 6420000 rects
+caravel_0006b498_fill_pattern_3_2: 6430000 rects
+caravel_0006b498_fill_pattern_3_2: 6440000 rects
+caravel_0006b498_fill_pattern_1_3: 6740000 rects
+caravel_0006b498_fill_pattern_3_2: 6450000 rects
+caravel_0006b498_fill_pattern_3_2: 6460000 rects
+caravel_0006b498_fill_pattern_1_3: 6750000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0006b498_fill_pattern_1_1
+caravel_0006b498_fill_pattern_3_2: 6470000 rects
+caravel_0006b498_fill_pattern_3_3: 6310000 rects
+caravel_0006b498_fill_pattern_1_3: 6760000 rects
+caravel_0006b498_fill_pattern_3_2: 6480000 rects
+caravel_0006b498_fill_pattern_1_3: 6770000 rects
+caravel_0006b498_fill_pattern_3_2: 6490000 rects
+caravel_0006b498_fill_pattern_1_3: 6780000 rects
+caravel_0006b498_fill_pattern_1_2: 6610000 rects
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+caravel_0006b498_fill_pattern_3_2: 6510000 rects
+caravel_0006b498_fill_pattern_3_2: 6520000 rects
+caravel_0006b498_fill_pattern_3_3: 6320000 rects
+caravel_0006b498_fill_pattern_3_2: 6530000 rects
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+caravel_0006b498_fill_pattern_3_2: 6540000 rects
+caravel_0006b498_fill_pattern_3_2: 6550000 rects
+caravel_0006b498_fill_pattern_1_3: 6800000 rects
+caravel_0006b498_fill_pattern_3_3: 6330000 rects
+caravel_0006b498_fill_pattern_3_2: 6560000 rects
+caravel_0006b498_fill_pattern_3_2: 6570000 rects
+caravel_0006b498_fill_pattern_3_2: 6580000 rects
+caravel_0006b498_fill_pattern_1_2: 6620000 rects
+caravel_0006b498_fill_pattern_3_2: 6590000 rects
+caravel_0006b498_fill_pattern_3_3: 6340000 rects
+caravel_0006b498_fill_pattern_3_2: 6600000 rects
+caravel_0006b498_fill_pattern_3_2: 6610000 rects
+caravel_0006b498_fill_pattern_3_2: 6620000 rects
+caravel_0006b498_fill_pattern_3_3: 6350000 rects
+caravel_0006b498_fill_pattern_3_2: 6630000 rects
+caravel_0006b498_fill_pattern_3_2: 6640000 rects
+caravel_0006b498_fill_pattern_3_2: 6650000 rects
+caravel_0006b498_fill_pattern_3_3: 6360000 rects
+caravel_0006b498_fill_pattern_1_2: 6630000 rects
+caravel_0006b498_fill_pattern_3_2: 6660000 rects
+caravel_0006b498_fill_pattern_3_2: 6670000 rects
+CIF output style is now "wafflefill(tiled)"
+caravel_0006b498_fill_pattern_3_2: 6680000 rects
+   Generating output for cell caravel_0006b498_fill_pattern_1_3
+caravel_0006b498_fill_pattern_3_3: 6370000 rects
+caravel_0006b498_fill_pattern_3_2: 6690000 rects
+caravel_0006b498_fill_pattern_3_2: 6700000 rects
+caravel_0006b498_fill_pattern_3_3: 6380000 rects
+caravel_0006b498_fill_pattern_3_2: 6710000 rects
+Ended: 11/16/2022 01:49:54
+caravel_0006b498_fill_pattern_3_2: 6720000 rects
+caravel_0006b498_fill_pattern_1_2: 6640000 rects
+caravel_0006b498_fill_pattern_3_2: 6730000 rects
+caravel_0006b498_fill_pattern_3_3: 6390000 rects
+caravel_0006b498_fill_pattern_3_2: 6740000 rects
+caravel_0006b498_fill_pattern_3_2: 6750000 rects
+caravel_0006b498_fill_pattern_3_3: 6400000 rects
+caravel_0006b498_fill_pattern_3_2: 6760000 rects
+caravel_0006b498_fill_pattern_1_2: 6650000 rects
+caravel_0006b498_fill_pattern_3_2: 6770000 rects
+caravel_0006b498_fill_pattern_3_3: 6410000 rects
+caravel_0006b498_fill_pattern_3_2: 6780000 rects
+caravel_0006b498_fill_pattern_3_3: 6420000 rects
+caravel_0006b498_fill_pattern_3_2: 6790000 rects
+caravel_0006b498_fill_pattern_1_2: 6660000 rects
+caravel_0006b498_fill_pattern_3_3: 6430000 rects
+caravel_0006b498_fill_pattern_3_2: 6800000 rects
+caravel_0006b498_fill_pattern_3_3: 6440000 rects
+caravel_0006b498_fill_pattern_3_2: 6810000 rects
+caravel_0006b498_fill_pattern_1_2: 6670000 rects
+caravel_0006b498_fill_pattern_3_3: 6450000 rects
+caravel_0006b498_fill_pattern_3_2: 6820000 rects
+caravel_0006b498_fill_pattern_3_3: 6460000 rects
+caravel_0006b498_fill_pattern_3_3: 6470000 rects
+caravel_0006b498_fill_pattern_3_2: 6830000 rects
+caravel_0006b498_fill_pattern_3_3: 6480000 rects
+caravel_0006b498_fill_pattern_1_2: 6680000 rects
+caravel_0006b498_fill_pattern_3_3: 6490000 rects
+caravel_0006b498_fill_pattern_3_3: 6500000 rects
+caravel_0006b498_fill_pattern_3_3: 6510000 rects
+caravel_0006b498_fill_pattern_1_2: 6690000 rects
+caravel_0006b498_fill_pattern_3_3: 6520000 rects
+caravel_0006b498_fill_pattern_3_3: 6530000 rects
+caravel_0006b498_fill_pattern_3_3: 6540000 rects
+caravel_0006b498_fill_pattern_1_2: 6700000 rects
+caravel_0006b498_fill_pattern_3_3: 6550000 rects
+caravel_0006b498_fill_pattern_1_2: 6710000 rects
+caravel_0006b498_fill_pattern_1_2: 6720000 rects
+caravel_0006b498_fill_pattern_3_3: 6560000 rects
+caravel_0006b498_fill_pattern_3_2: 6840000 rects
+caravel_0006b498_fill_pattern_1_2: 6730000 rects
+caravel_0006b498_fill_pattern_3_3: 6570000 rects
+caravel_0006b498_fill_pattern_1_2: 6740000 rects
+caravel_0006b498_fill_pattern_3_3: 6580000 rects
+caravel_0006b498_fill_pattern_1_2: 6750000 rects
+caravel_0006b498_fill_pattern_3_3: 6590000 rects
+caravel_0006b498_fill_pattern_3_3: 6600000 rects
+caravel_0006b498_fill_pattern_1_2: 6760000 rects
+caravel_0006b498_fill_pattern_1_2: 6770000 rects
+caravel_0006b498_fill_pattern_1_2: 6780000 rects
+caravel_0006b498_fill_pattern_3_3: 6610000 rects
+caravel_0006b498_fill_pattern_3_3: 6620000 rects
+caravel_0006b498_fill_pattern_3_2: 6850000 rects
+caravel_0006b498_fill_pattern_3_3: 6630000 rects
+caravel_0006b498_fill_pattern_1_2: 6790000 rects
+caravel_0006b498_fill_pattern_3_3: 6640000 rects
+caravel_0006b498_fill_pattern_3_3: 6650000 rects
+caravel_0006b498_fill_pattern_1_2: 6800000 rects
+caravel_0006b498_fill_pattern_3_3: 6660000 rects
+caravel_0006b498_fill_pattern_3_3: 6670000 rects
+caravel_0006b498_fill_pattern_3_2: 6860000 rects
+caravel_0006b498_fill_pattern_3_3: 6680000 rects
+caravel_0006b498_fill_pattern_3_3: 6690000 rects
+caravel_0006b498_fill_pattern_3_3: 6700000 rects
+caravel_0006b498_fill_pattern_3_3: 6710000 rects
+caravel_0006b498_fill_pattern_3_3: 6720000 rects
+caravel_0006b498_fill_pattern_3_2: 6870000 rects
+caravel_0006b498_fill_pattern_3_3: 6730000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0006b498_fill_pattern_1_2
+caravel_0006b498_fill_pattern_3_3: 6740000 rects
+caravel_0006b498_fill_pattern_3_3: 6750000 rects
+caravel_0006b498_fill_pattern_3_3: 6760000 rects
+caravel_0006b498_fill_pattern_3_2: 6880000 rects
+caravel_0006b498_fill_pattern_3_3: 6770000 rects
+caravel_0006b498_fill_pattern_3_3: 6780000 rects
+caravel_0006b498_fill_pattern_3_3: 6790000 rects
+caravel_0006b498_fill_pattern_3_3: 6800000 rects
+caravel_0006b498_fill_pattern_3_2: 6890000 rects
+caravel_0006b498_fill_pattern_3_3: 6810000 rects
+caravel_0006b498_fill_pattern_3_3: 6820000 rects
+caravel_0006b498_fill_pattern_3_3: 6830000 rects
+caravel_0006b498_fill_pattern_3_3: 6840000 rects
+caravel_0006b498_fill_pattern_3_3: 6850000 rects
+caravel_0006b498_fill_pattern_3_3: 6860000 rects
+caravel_0006b498_fill_pattern_3_2: 6900000 rects
+caravel_0006b498_fill_pattern_3_3: 6870000 rects
+caravel_0006b498_fill_pattern_3_3: 6880000 rects
+caravel_0006b498_fill_pattern_3_2: 6910000 rects
+caravel_0006b498_fill_pattern_3_3: 6890000 rects
+caravel_0006b498_fill_pattern_3_3: 6900000 rects
+caravel_0006b498_fill_pattern_3_2: 6920000 rects
+caravel_0006b498_fill_pattern_3_3: 6910000 rects
+caravel_0006b498_fill_pattern_3_2: 6930000 rects
+caravel_0006b498_fill_pattern_3_3: 6920000 rects
+caravel_0006b498_fill_pattern_3_2: 6940000 rects
+caravel_0006b498_fill_pattern_3_3: 6930000 rects
+caravel_0006b498_fill_pattern_3_2: 6950000 rects
+caravel_0006b498_fill_pattern_3_3: 6940000 rects
+caravel_0006b498_fill_pattern_3_2: 6960000 rects
+caravel_0006b498_fill_pattern_3_3: 6950000 rects
+caravel_0006b498_fill_pattern_3_3: 6960000 rects
+caravel_0006b498_fill_pattern_3_2: 6970000 rects
+caravel_0006b498_fill_pattern_3_3: 6970000 rects
+caravel_0006b498_fill_pattern_3_2: 6980000 rects
+caravel_0006b498_fill_pattern_3_3: 6980000 rects
+caravel_0006b498_fill_pattern_3_2: 6990000 rects
+caravel_0006b498_fill_pattern_3_3: 6990000 rects
+caravel_0006b498_fill_pattern_3_3: 7000000 rects
+caravel_0006b498_fill_pattern_3_2: 7000000 rects
+caravel_0006b498_fill_pattern_3_3: 7010000 rects
+caravel_0006b498_fill_pattern_3_2: 7010000 rects
+caravel_0006b498_fill_pattern_3_3: 7020000 rects
+caravel_0006b498_fill_pattern_3_2: 7020000 rects
+caravel_0006b498_fill_pattern_3_3: 7030000 rects
+caravel_0006b498_fill_pattern_3_3: 7040000 rects
+caravel_0006b498_fill_pattern_3_2: 7030000 rects
+caravel_0006b498_fill_pattern_3_3: 7050000 rects
+caravel_0006b498_fill_pattern_3_2: 7040000 rects
+caravel_0006b498_fill_pattern_3_3: 7060000 rects
+caravel_0006b498_fill_pattern_3_2: 7050000 rects
+caravel_0006b498_fill_pattern_3_3: 7070000 rects
+caravel_0006b498_fill_pattern_3_2: 7060000 rects
+caravel_0006b498_fill_pattern_3_2: 7070000 rects
+caravel_0006b498_fill_pattern_3_3: 7080000 rects
+caravel_0006b498_fill_pattern_3_2: 7080000 rects
+caravel_0006b498_fill_pattern_3_2: 7090000 rects
+caravel_0006b498_fill_pattern_3_2: 7100000 rects
+caravel_0006b498_fill_pattern_3_2: 7110000 rects
+caravel_0006b498_fill_pattern_3_2: 7120000 rects
+caravel_0006b498_fill_pattern_3_2: 7130000 rects
+caravel_0006b498_fill_pattern_3_2: 7140000 rects
+caravel_0006b498_fill_pattern_3_2: 7150000 rects
+caravel_0006b498_fill_pattern_3_2: 7160000 rects
+caravel_0006b498_fill_pattern_3_3: 7090000 rects
+caravel_0006b498_fill_pattern_3_3: 7100000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0006b498_fill_pattern_3_2
+caravel_0006b498_fill_pattern_3_3: 7110000 rects
+caravel_0006b498_fill_pattern_3_3: 7120000 rects
+caravel_0006b498_fill_pattern_3_3: 7130000 rects
+caravel_0006b498_fill_pattern_3_3: 7140000 rects
+caravel_0006b498_fill_pattern_3_3: 7150000 rects
+caravel_0006b498_fill_pattern_3_3: 7160000 rects
+caravel_0006b498_fill_pattern_3_3: 7170000 rects
+caravel_0006b498_fill_pattern_3_3: 7180000 rects
+caravel_0006b498_fill_pattern_3_3: 7190000 rects
+caravel_0006b498_fill_pattern_3_3: 7200000 rects
+caravel_0006b498_fill_pattern_3_3: 7210000 rects
+caravel_0006b498_fill_pattern_3_3: 7220000 rects
+caravel_0006b498_fill_pattern_3_3: 7230000 rects
+caravel_0006b498_fill_pattern_3_3: 7240000 rects
+caravel_0006b498_fill_pattern_3_3: 7250000 rects
+caravel_0006b498_fill_pattern_3_3: 7260000 rects
+caravel_0006b498_fill_pattern_3_3: 7270000 rects
+caravel_0006b498_fill_pattern_3_3: 7280000 rects
+caravel_0006b498_fill_pattern_3_3: 7290000 rects
+CIF output style is now "wafflefill(tiled)"
+   Generating output for cell caravel_0006b498_fill_pattern_3_3
+Ended: 11/16/2022 01:51:02
+Ended: 11/16/2022 01:51:03
+Ended: 11/16/2022 01:51:06
+Ended: 11/16/2022 01:51:12
+Ended: 11/16/2022 01:51:20
+Ended: 11/16/2022 01:51:23
+Ended: 11/16/2022 01:51:28
+Ended: 11/16/2022 01:51:29
+Ended: 11/16/2022 01:51:30
+Ended: 11/16/2022 01:51:30
+Ended: 11/16/2022 01:51:33
+Ended: 11/16/2022 01:51:40
+Ended: 11/16/2022 01:51:45
+Ended: 11/16/2022 01:52:00
+Ended: 11/16/2022 01:52:13
+Ended: 11/16/2022 01:52:14
+Ended: 11/16/2022 01:52:15
+Ended: 11/16/2022 01:52:15
+Ended: 11/16/2022 01:52:17
+Ended: 11/16/2022 01:52:18
+Ended: 11/16/2022 01:52:19
+Ended: 11/16/2022 01:52:22
+Ended: 11/16/2022 01:52:25
+Ended: 11/16/2022 01:52:28
+Ended: 11/16/2022 01:52:30
+Ended: 11/16/2022 01:52:36
+Ended: 11/16/2022 01:52:39
+Ended: 11/16/2022 01:52:58
+Ended: 11/16/2022 01:53:10
+Ended: 11/16/2022 01:53:22
+Ended: 11/16/2022 01:53:23
+Ended: 11/16/2022 01:56:18
+Ended: 11/16/2022 01:56:24
+Ended: 11/16/2022 01:59:14
+Ended: 11/16/2022 01:59:24
diff --git a/tapeout/logs/gds.info b/tapeout/logs/gds.info
new file mode 100644
index 0000000..be8dd6b
--- /dev/null
+++ b/tapeout/logs/gds.info
@@ -0,0 +1 @@
+user_project_wrapper.gds: 06fcf8c086944995966d6e861ab72b76c0bf8a58
\ No newline at end of file
diff --git a/tapeout/logs/gen_gpio_defaults.log b/tapeout/logs/gen_gpio_defaults.log
new file mode 100644
index 0000000..15add75
--- /dev/null
+++ b/tapeout/logs/gen_gpio_defaults.log
@@ -0,0 +1,80 @@
+/root/project/verilog/rtl/user_defines.v not found, using default /opt/caravel/verilog/rtl/user_defines.v
+Step 1:  Create new cells for new GPIO default vectors.
+Creating new layout file /root/project/mag/gpio_defaults_block_1803.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1803.v
+Layout file /root/project/mag/gpio_defaults_block_1803.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_1803.v already exists and does not need to be generated.
+Creating new layout file /root/project/mag/gpio_defaults_block_0403.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v
+Creating new layout file /root/project/mag/gpio_defaults_block_0801.mag
+Creating new gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0801.v
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Layout file /root/project/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
+Gate-level verilog file /root/project/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
+Step 2:  Modify top-level layouts to use the specified defaults.
+Done.
diff --git a/tapeout/logs/git.info b/tapeout/logs/git.info
new file mode 100644
index 0000000..4d5d965
--- /dev/null
+++ b/tapeout/logs/git.info
@@ -0,0 +1,3 @@
+Repository: https://github.com/SerdarUnal132/openram_openmpw.git
+Branch: HEAD
+Commit: c2fabbd9fae639d26341eaeb7b57edb46fc052c5
\ No newline at end of file
diff --git a/tapeout/logs/git_clone.log b/tapeout/logs/git_clone.log
new file mode 100644
index 0000000..f7541e1
--- /dev/null
+++ b/tapeout/logs/git_clone.log
@@ -0,0 +1,20 @@
+https://github.com/SerdarUnal132/openram_openmpw.git
+Cloning into '/root/project'...
+Note: switching to 'c2fabbd9fae639d26341eaeb7b57edb46fc052c5'.
+
+You are in 'detached HEAD' state. You can look around, make experimental
+changes and commit them, and you can discard any commits you make in this
+state without impacting any branches by switching back to a branch.
+
+If you want to create a new branch to retain commits you create, you may
+do so (now or later) by using -c with the switch command. Example:
+
+  git switch -c <new-branch-name>
+
+Or undo this operation with:
+
+  git switch -
+
+Turn off this advice by setting config variable advice.detachedHead to false
+
+HEAD is now at c2fabbd xor violation solved by shifting power rings
diff --git a/tapeout/logs/klayout_beol.log b/tapeout/logs/klayout_beol.log
new file mode 100644
index 0000000..17f3641
--- /dev/null
+++ b/tapeout/logs/klayout_beol.log
@@ -0,0 +1,1005 @@
+/opt/scripts/tech/sky130A_mr.drc:50: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/scripts/tech/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/scripts/tech/sky130A_mr.drc:54: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/scripts/tech/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/scripts/tech/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/scripts/tech/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/scripts/tech/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/scripts/tech/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/scripts/tech/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/scripts/tech/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
+"input" in: sky130A_mr.drc:124
+    Polygons (raw): 2786730 (flat)  3984 (hierarchical)
+    Elapsed: 0.560s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:125
+    Polygons (raw): 584655 (flat)  1031 (hierarchical)
+    Elapsed: 0.390s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:126
+    Polygons (raw): 1496438 (flat)  1251 (hierarchical)
+    Elapsed: 0.340s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:127
+    Polygons (raw): 857 (flat)  37 (hierarchical)
+    Elapsed: 0.280s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:128
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:129
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:130
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.000s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:131
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:132
+    Polygons (raw): 1360380 (flat)  489 (hierarchical)
+    Elapsed: 0.340s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:133
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:134
+    Polygons (raw): 54311 (flat)  575 (hierarchical)
+    Elapsed: 0.030s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:135
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:136
+    Polygons (raw): 5945 (flat)  38 (hierarchical)
+    Elapsed: 0.010s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:137
+    Polygons (raw): 3767199 (flat)  9813 (hierarchical)
+    Elapsed: 0.400s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:138
+    Polygons (raw): 33 (flat)  16 (hierarchical)
+    Elapsed: 0.020s  Memory: 2905.00M
+"polygons" in: sky130A_mr.drc:139
+    Polygons (raw): 1979420 (flat)  1783 (hierarchical)
+    Elapsed: 0.340s  Memory: 2906.00M
+"polygons" in: sky130A_mr.drc:140
+    Polygons (raw): 1813553 (flat)  1587 (hierarchical)
+    Elapsed: 0.340s  Memory: 2906.00M
+"polygons" in: sky130A_mr.drc:141
+    Polygons (raw): 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 2906.00M
+"polygons" in: sky130A_mr.drc:142
+    Polygons (raw): 1 (flat)  1 (hierarchical)
+    Elapsed: 0.010s  Memory: 2906.00M
+"polygons" in: sky130A_mr.drc:143
+    Polygons (raw): 1282879 (flat)  2148 (hierarchical)
+    Elapsed: 0.360s  Memory: 2906.00M
+"polygons" in: sky130A_mr.drc:144
+    Polygons (raw): 14666102 (flat)  157016 (hierarchical)
+    Elapsed: 0.430s  Memory: 2910.00M
+"polygons" in: sky130A_mr.drc:146
+    Polygons (raw): 9577757 (flat)  306888 (hierarchical)
+    Elapsed: 0.530s  Memory: 2917.00M
+"polygons" in: sky130A_mr.drc:147
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+START: 76/20 (pad)
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+END: 76/20 (pad)
+Writing report database: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/tapeout/36c7b82d-c8f5-4949-a31d-774703f52e34/outputs/klayout_beol_report.xml ..
+Total elapsed: 6239.320s  Memory: 17205.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07
diff --git a/tapeout/logs/klayout_feol.log b/tapeout/logs/klayout_feol.log
new file mode 100644
index 0000000..c1b831c
--- /dev/null
+++ b/tapeout/logs/klayout_feol.log
@@ -0,0 +1,817 @@
+/opt/scripts/tech/sky130A_mr.drc:48: warning: already initialized constant DRC::DRCEngine::FEOL
+/opt/scripts/tech/sky130A_mr.drc:40: warning: previous definition of FEOL was here
+/opt/scripts/tech/sky130A_mr.drc:56: warning: already initialized constant DRC::DRCEngine::BEOL
+/opt/scripts/tech/sky130A_mr.drc:41: warning: previous definition of BEOL was here
+/opt/scripts/tech/sky130A_mr.drc:62: warning: already initialized constant DRC::DRCEngine::OFFGRID
+/opt/scripts/tech/sky130A_mr.drc:42: warning: previous definition of OFFGRID was here
+/opt/scripts/tech/sky130A_mr.drc:68: warning: already initialized constant DRC::DRCEngine::SEAL
+/opt/scripts/tech/sky130A_mr.drc:43: warning: previous definition of SEAL was here
+/opt/scripts/tech/sky130A_mr.drc:74: warning: already initialized constant DRC::DRCEngine::FLOATING_MET
+/opt/scripts/tech/sky130A_mr.drc:44: warning: previous definition of FLOATING_MET was here
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+    Elapsed: 3.240s  Memory: 11021.00M
+"output" in: sky130A_mr.drc:388
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 11021.00M
+END: 97/44 (cap2m)
+FEOL section
+START: 75/20 (hvi)
+"not" in: sky130A_mr.drc:688
+    Polygons (raw): 54311 (flat)  575 (hierarchical)
+    Elapsed: 0.440s  Memory: 11021.00M
+"width" in: sky130A_mr.drc:689
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.470s  Memory: 11021.00M
+"output" in: sky130A_mr.drc:689
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 11021.00M
+"space" in: sky130A_mr.drc:690
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.200s  Memory: 11021.00M
+"output" in: sky130A_mr.drc:690
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 11021.00M
+END: 75/20 (hvi)
+START: 125/20 (hvntm)
+"not" in: sky130A_mr.drc:695
+    Polygons (raw): 33 (flat)  16 (hierarchical)
+    Elapsed: 0.230s  Memory: 11021.00M
+"width" in: sky130A_mr.drc:696
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.410s  Memory: 11021.00M
+"output" in: sky130A_mr.drc:696
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 11021.00M
+"space" in: sky130A_mr.drc:697
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.150s  Memory: 11021.00M
+"output" in: sky130A_mr.drc:697
+    Edge pairs: 0 (flat)  0 (hierarchical)
+    Elapsed: 0.010s  Memory: 11021.00M
+END: 125/20 (hvntm)
+Writing report database: /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/tapeout/36c7b82d-c8f5-4949-a31d-774703f52e34/outputs/klayout_feol_report.xml ..
+Total elapsed: 2247.950s  Memory: 10997.00M
+ 
+Cell exclusion list:
+   rule    | cell
+   nwell.6 | sky130_fd_io__gpiov2_amux, sky130_fd_io__simple_pad_and_busses, sram
+   nsd.1   | sram
+   nsd.2   | sram
+   psd.1   | sram
+   psd.2   | sram
+ 
+release 2022.6.30_01.07
diff --git a/tapeout/logs/klayout_fom_density.log b/tapeout/logs/klayout_fom_density.log
new file mode 100644
index 0000000..ef348de
--- /dev/null
+++ b/tapeout/logs/klayout_fom_density.log
@@ -0,0 +1,58 @@
+fom_density.drc:: sourcing design file=/mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/tapeout/36c7b82d-c8f5-4949-a31d-774703f52e34/outputs/caravel_0006b498.oas topcell=caravel_0006b498 ...
+done.
+flattening chip boundary...
+done.
+step size = 70.0
+llx=5.964999999999999 lly=5.999999999999999 urx=3594.0349999999994 ury=5193.999999999999
+x_cnt = 51
+y_cnt = 74
+dbu = 0.0009999999999999998
+bbox_area = 18614907.159999993
+calculating subtile areas (= 3774)...
+tiles per step = 10
+calculating window step densities (= 2730)...
+{{ CHECK }} 0/2730
+{{ CHECK }} 65/2730
+{{ CHECK }} 130/2730
+{{ CHECK }} 195/2730
+{{ CHECK }} 260/2730
+{{ CHECK }} 325/2730
+{{ CHECK }} 390/2730
+{{ CHECK }} 455/2730
+{{ CHECK }} 520/2730
+{{ CHECK }} 585/2730
+{{ CHECK }} 650/2730
+{{ CHECK }} 715/2730
+{{ CHECK }} 780/2730
+{{ CHECK }} 845/2730
+{{ CHECK }} 910/2730
+{{ CHECK }} 975/2730
+{{ CHECK }} 1040/2730
+{{ CHECK }} 1105/2730
+{{ CHECK }} 1170/2730
+{{ CHECK }} 1235/2730
+{{ CHECK }} 1300/2730
+{{ CHECK }} 1365/2730
+{{ CHECK }} 1430/2730
+{{ CHECK }} 1495/2730
+{{ CHECK }} 1560/2730
+{{ CHECK }} 1625/2730
+{{ CHECK }} 1690/2730
+{{ CHECK }} 1755/2730
+{{ CHECK }} 1820/2730
+{{ CHECK }} 1885/2730
+{{ CHECK }} 1950/2730
+{{ CHECK }} 2015/2730
+{{ CHECK }} 2080/2730
+{{ CHECK }} 2145/2730
+{{ CHECK }} 2210/2730
+{{ CHECK }} 2275/2730
+{{ CHECK }} 2340/2730
+{{ CHECK }} 2405/2730
+{{ CHECK }} 2470/2730
+{{ CHECK }} 2535/2730
+{{ CHECK }} 2600/2730
+{{ CHECK }} 2665/2730
+minimum fom density  = 0.3706
+maximum fom density  = 0.4958
+finish received: success = true
diff --git a/tapeout/logs/klayout_gds2oas.log b/tapeout/logs/klayout_gds2oas.log
new file mode 100644
index 0000000..668bc51
--- /dev/null
+++ b/tapeout/logs/klayout_gds2oas.log
@@ -0,0 +1 @@
+[INFO] Changing from /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/tapeout/36c7b82d-c8f5-4949-a31d-774703f52e34/outputs/caravel_0006b498.gds to /mnt/uffs/user/u6704_serdaru/design/openram_test_design/jobs/tapeout/36c7b82d-c8f5-4949-a31d-774703f52e34/outputs/caravel_0006b498.oas
diff --git a/tapeout/logs/klayout_met_density.log b/tapeout/logs/klayout_met_density.log
new file mode 100644
index 0000000..6b1d20d
--- /dev/null
+++ b/tapeout/logs/klayout_met_density.log
@@ -0,0 +1,6 @@
+li1_ca_density is 0.49237480613148243
+m1_ca_density is 0.58421047491925
+m2_ca_density is 0.5263162539714634
+m3_ca_density is 0.5251839708274788
+m4_ca_density is 0.4712713500331638
+m5_ca_density is 0.5409440371173899
diff --git a/tapeout/logs/klayout_missing_cells.log b/tapeout/logs/klayout_missing_cells.log
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/tapeout/logs/klayout_missing_cells.log
diff --git a/tapeout/logs/klayout_zero_area.log b/tapeout/logs/klayout_zero_area.log
new file mode 100644
index 0000000..2ff9bb3
--- /dev/null
+++ b/tapeout/logs/klayout_zero_area.log
@@ -0,0 +1,4 @@
+0 zero-length paths,  0 zero-length paths deleted.
+0 total zero-area objects,  0 total objects deleted.
+VmPeak:	 3824720 kB
+VmHWM:	 3303080 kB
diff --git a/tapeout/logs/oasis.info b/tapeout/logs/oasis.info
new file mode 100644
index 0000000..710ef02
--- /dev/null
+++ b/tapeout/logs/oasis.info
@@ -0,0 +1 @@
+caravel_0006b498.oas: 3b03cbed617011fb34fcc5e0819b21ef1c6458a1
\ No newline at end of file
diff --git a/tapeout/logs/pdks.info b/tapeout/logs/pdks.info
new file mode 100644
index 0000000..3bb11c6
--- /dev/null
+++ b/tapeout/logs/pdks.info
@@ -0,0 +1,2 @@
+Open PDKs: 0059588eebfc704681dc2368bd1d33d96281d10f
+Skywater PDK: f70d8ca46961ff92719d8870a18a076370b85f6c
\ No newline at end of file
diff --git a/tapeout/logs/set_user_id.log b/tapeout/logs/set_user_id.log
new file mode 100644
index 0000000..9743c17
--- /dev/null
+++ b/tapeout/logs/set_user_id.log
@@ -0,0 +1,10 @@
+Project Chip ID is: 439448
+Setting Project Chip ID to: 0006b498
+Step 1: Modify Layout of the user_id_programming subcell
+Done!
+Step 2: Add user project ID parameter to source verilog.
+Done!
+Step 3: Add user project ID parameter to gate-level verilog.
+Done!
+Step 4: Add user project ID text to top level layout.
+Done!
diff --git a/tapeout/logs/ship_truck.log b/tapeout/logs/ship_truck.log
new file mode 100644
index 0000000..80eb6d2
--- /dev/null
+++ b/tapeout/logs/ship_truck.log
@@ -0,0 +1,2733 @@
+
+Magic 8.3 revision 339 - Compiled on Sat Nov 12 14:25:26 UTC 2022.
+Starting magic under Tcl interpreter
+Using the terminal as the console.
+Using NULL graphics device.
+Processing system .magicrc file
+Sourcing design .magicrc for technology sky130A ...
+2 Magic internal units = 1 Lambda
+Input style sky130(vendor): scaleFactor=2, multiplier=2
+The following types are not handled by extraction and will be treated as non-electrical types:
+    ubm 
+Scaled tech values by 2 / 1 to match internal grid scaling
+Loading sky130A Device Generator Menu ...
+Loading "/opt/scripts/mag2gds.tcl" from command line.
+Scaled magic input cell user_project_wrapper geometry by factor of 2
+user_project_wrapper: 10000 rects
+user_project_wrapper: 20000 rects
+user_project_wrapper: 30000 rects
+user_project_wrapper: 40000 rects
+user_project_wrapper: 50000 rects
+Scaled magic input cell user_id_textblock geometry by factor of 2
+caravel: 10000 rects
+caravel: 20000 rects
+caravel: 30000 rects
+caravel: 40000 rects
+caravel: 50000 rects
+caravel: 60000 rects
+caravel: 70000 rects
+caravel: 80000 rects
+Processing timestamp mismatches: simple_por.
+Warning:  Parent cell lists instance of "caravel_logo" at bad file path /root/project/mag/caravel_logo.mag.
+The cell exists in the search paths at ../mag/caravel_logo.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "caravel_motto" at bad file path /root/project/mag/caravel_motto.mag.
+The cell exists in the search paths at ../mag/caravel_motto.mag.
+The discovered version will be used.
+Scaled magic input cell caravel_motto geometry by factor of 2
+Warning:  Parent cell lists instance of "font_22" at bad file path ../mag/font_22.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_22.mag.
+The discovered version will be used.
+Scaled magic input cell font_22 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_73" at bad file path ../mag/font_73.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_73.mag.
+The discovered version will be used.
+Scaled magic input cell font_73 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_43" at bad file path ../mag/font_43.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_43.mag.
+The discovered version will be used.
+Scaled magic input cell font_43 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_49" at bad file path ../mag/font_49.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_49.mag.
+The discovered version will be used.
+Scaled magic input cell font_49 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_65" at bad file path ../mag/font_65.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_65.mag.
+The discovered version will be used.
+Scaled magic input cell font_65 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_68" at bad file path ../mag/font_68.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_68.mag.
+The discovered version will be used.
+Scaled magic input cell font_68 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_54" at bad file path ../mag/font_54.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_54.mag.
+The discovered version will be used.
+Scaled magic input cell font_54 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_67" at bad file path ../mag/font_67.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_67.mag.
+The discovered version will be used.
+Scaled magic input cell font_67 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_6E" at bad file path ../mag/font_6E.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_6E.mag.
+The discovered version will be used.
+Scaled magic input cell font_6E geometry by factor of 24
+Warning:  Parent cell lists instance of "font_69" at bad file path ../mag/font_69.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_69.mag.
+The discovered version will be used.
+Scaled magic input cell font_69 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_6C" at bad file path ../mag/font_6C.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_6C.mag.
+The discovered version will be used.
+Scaled magic input cell font_6C geometry by factor of 24
+Warning:  Parent cell lists instance of "font_61" at bad file path ../mag/font_61.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_61.mag.
+The discovered version will be used.
+Scaled magic input cell font_61 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_53" at bad file path ../mag/font_53.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_53.mag.
+The discovered version will be used.
+Scaled magic input cell font_53 geometry by factor of 24
+Warning:  Parent cell lists instance of "copyright_block" at bad file path /root/project/mag/copyright_block.mag.
+The cell exists in the search paths at ../mag/copyright_block.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "font_79" at bad file path ../mag/font_79.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_79.mag.
+The discovered version will be used.
+Scaled magic input cell font_79 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_76" at bad file path ../mag/font_76.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_76.mag.
+The discovered version will be used.
+Scaled magic input cell font_76 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_74" at bad file path ../mag/font_74.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_74.mag.
+The discovered version will be used.
+Scaled magic input cell font_74 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_72" at bad file path ../mag/font_72.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_72.mag.
+The discovered version will be used.
+Scaled magic input cell font_72 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_70" at bad file path ../mag/font_70.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_70.mag.
+The discovered version will be used.
+Scaled magic input cell font_70 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_66" at bad file path ../mag/font_66.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_66.mag.
+The discovered version will be used.
+Scaled magic input cell font_66 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_63" at bad file path ../mag/font_63.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_63.mag.
+The discovered version will be used.
+Scaled magic input cell font_63 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_62" at bad file path ../mag/font_62.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_62.mag.
+The discovered version will be used.
+Scaled magic input cell font_62 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_57" at bad file path ../mag/font_57.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_57.mag.
+The discovered version will be used.
+Scaled magic input cell font_57 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_56" at bad file path ../mag/font_56.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_56.mag.
+The discovered version will be used.
+Scaled magic input cell font_56 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_50" at bad file path ../mag/font_50.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_50.mag.
+The discovered version will be used.
+Scaled magic input cell font_50 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_47" at bad file path ../mag/font_47.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_47.mag.
+The discovered version will be used.
+Scaled magic input cell font_47 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_44" at bad file path ../mag/font_44.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_44.mag.
+The discovered version will be used.
+Scaled magic input cell font_44 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_35" at bad file path ../mag/font_35.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_35.mag.
+The discovered version will be used.
+Scaled magic input cell font_35 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_32" at bad file path ../mag/font_32.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_32.mag.
+The discovered version will be used.
+Scaled magic input cell font_32 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_30" at bad file path ../mag/font_30.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_30.mag.
+The discovered version will be used.
+Scaled magic input cell font_30 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_29" at bad file path ../mag/font_29.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_29.mag.
+The discovered version will be used.
+Scaled magic input cell font_29 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_28" at bad file path ../mag/font_28.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_28.mag.
+The discovered version will be used.
+Scaled magic input cell font_28 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_20" at bad file path ../mag/font_20.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_20.mag.
+The discovered version will be used.
+Scaled magic input cell font_20 geometry by factor of 24
+Warning:  Parent cell lists instance of "font_6F" at bad file path ../mag/font_6F.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_6F.mag.
+The discovered version will be used.
+Scaled magic input cell font_6F geometry by factor of 24
+Warning:  Parent cell lists instance of "font_6B" at bad file path ../mag/font_6B.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_6B.mag.
+The discovered version will be used.
+Scaled magic input cell font_6B geometry by factor of 24
+Warning:  Parent cell lists instance of "font_4F" at bad file path ../mag/font_4F.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_4F.mag.
+The discovered version will be used.
+Scaled magic input cell font_4F geometry by factor of 24
+Warning:  Parent cell lists instance of "font_4B" at bad file path ../mag/font_4B.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_4B.mag.
+The discovered version will be used.
+Scaled magic input cell font_4B geometry by factor of 24
+Warning:  Parent cell lists instance of "font_2D" at bad file path ../mag/font_2D.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_ml_xx_hd/mag/font_2D.mag.
+The discovered version will be used.
+Scaled magic input cell font_2D geometry by factor of 24
+Warning:  Parent cell lists instance of "open_source" at bad file path /root/project/mag/open_source.mag.
+The cell exists in the search paths at ../mag/open_source.mag.
+The discovered version will be used.
+Scaled magic input cell open_source geometry by factor of 2
+Warning:  Parent cell lists instance of "xres_buf" at bad file path /root/project/mag/xres_buf.mag.
+The cell exists in the search paths at ../mag/xres_buf.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hvl__lsbufhv2lv_1" at bad file path ../mag/sky130_fd_sc_hvl__lsbufhv2lv_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hvl/mag/sky130_fd_sc_hvl__lsbufhv2lv_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hvl__fill_1" at bad file path ../mag/sky130_fd_sc_hvl__fill_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hvl/mag/sky130_fd_sc_hvl__fill_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hvl__fill_2" at bad file path ../mag/sky130_fd_sc_hvl__fill_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hvl/mag/sky130_fd_sc_hvl__fill_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hvl__decap_8" at bad file path ../mag/sky130_fd_sc_hvl__decap_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hvl/mag/sky130_fd_sc_hvl__decap_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hvl__decap_4" at bad file path ../mag/sky130_fd_sc_hvl__decap_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hvl/mag/sky130_fd_sc_hvl__decap_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hvl__diode_2" at bad file path ../mag/sky130_fd_sc_hvl__diode_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hvl/mag/sky130_fd_sc_hvl__diode_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "alpha_0" at bad file path /root/project/mag/hexdigits/alpha_0.mag.
+The cell exists in the search paths at hexdigits/alpha_0.mag.
+The discovered version will be used.
+Scaled magic input cell alpha_0 geometry by factor of 2
+Warning:  Parent cell lists instance of "alpha_6" at bad file path /root/project/mag/hexdigits/alpha_6.mag.
+The cell exists in the search paths at hexdigits/alpha_6.mag.
+The discovered version will be used.
+Scaled magic input cell alpha_6 geometry by factor of 72
+Warning:  Parent cell lists instance of "alpha_B" at bad file path /root/project/mag/hexdigits/alpha_B.mag.
+The cell exists in the search paths at hexdigits/alpha_B.mag.
+The discovered version will be used.
+Scaled magic input cell alpha_B geometry by factor of 72
+Warning:  Parent cell lists instance of "alpha_4" at bad file path /root/project/mag/hexdigits/alpha_4.mag.
+The cell exists in the search paths at hexdigits/alpha_4.mag.
+The discovered version will be used.
+Scaled magic input cell alpha_4 geometry by factor of 72
+Warning:  Parent cell lists instance of "alpha_9" at bad file path /root/project/mag/hexdigits/alpha_9.mag.
+The cell exists in the search paths at hexdigits/alpha_9.mag.
+The discovered version will be used.
+Scaled magic input cell alpha_9 geometry by factor of 72
+Warning:  Parent cell lists instance of "alpha_8" at bad file path /root/project/mag/hexdigits/alpha_8.mag.
+The cell exists in the search paths at hexdigits/alpha_8.mag.
+The discovered version will be used.
+Scaled magic input cell alpha_8 geometry by factor of 72
+Warning:  Parent cell lists instance of "caravel_clocking" at bad file path /root/project/mag/caravel_clocking.mag.
+The cell exists in the search paths at ../mag/caravel_clocking.mag.
+The discovered version will be used.
+caravel_clocking: 10000 rects
+caravel_clocking: 20000 rects
+caravel_clocking: 30000 rects
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_16" at bad file path ../mag/sky130_fd_sc_hd__clkbuf_16.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkbuf_16.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__buf_12" at bad file path ../mag/sky130_fd_sc_hd__buf_12.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__buf_12.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_1" at bad file path ../mag/sky130_fd_sc_hd__clkbuf_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkbuf_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dlymetal6s2s_1" at bad file path ../mag/sky130_fd_sc_hd__dlymetal6s2s_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dlymetal6s2s_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__buf_2" at bad file path ../mag/sky130_fd_sc_hd__buf_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__buf_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__buf_4" at bad file path ../mag/sky130_fd_sc_hd__buf_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__buf_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_4" at bad file path ../mag/sky130_fd_sc_hd__clkbuf_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkbuf_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_2" at bad file path ../mag/sky130_fd_sc_hd__clkbuf_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkbuf_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfrtp_1" at bad file path ../mag/sky130_fd_sc_hd__dfrtp_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfrtp_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfstp_1" at bad file path ../mag/sky130_fd_sc_hd__dfstp_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfstp_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfstp_2" at bad file path ../mag/sky130_fd_sc_hd__dfstp_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfstp_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfrtp_2" at bad file path ../mag/sky130_fd_sc_hd__dfrtp_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfrtp_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfrtp_4" at bad file path ../mag/sky130_fd_sc_hd__dfrtp_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfrtp_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfrtn_1" at bad file path ../mag/sky130_fd_sc_hd__dfrtn_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfrtn_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfxtp_1" at bad file path ../mag/sky130_fd_sc_hd__dfxtp_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfxtp_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__inv_4" at bad file path ../mag/sky130_fd_sc_hd__inv_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__inv_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand2b_1" at bad file path ../mag/sky130_fd_sc_hd__nand2b_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand2b_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o31ai_1" at bad file path ../mag/sky130_fd_sc_hd__o31ai_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o31ai_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor4_1" at bad file path ../mag/sky130_fd_sc_hd__nor4_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor4_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__mux2_1" at bad file path ../mag/sky130_fd_sc_hd__mux2_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__mux2_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21ai_1" at bad file path ../mag/sky130_fd_sc_hd__o21ai_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21ai_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21oi_1" at bad file path ../mag/sky130_fd_sc_hd__a21oi_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21oi_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o2111ai_1" at bad file path ../mag/sky130_fd_sc_hd__o2111ai_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o2111ai_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o31a_1" at bad file path ../mag/sky130_fd_sc_hd__o31a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o31a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21bai_1" at bad file path ../mag/sky130_fd_sc_hd__o21bai_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21bai_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand3b_1" at bad file path ../mag/sky130_fd_sc_hd__nand3b_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand3b_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o22a_1" at bad file path ../mag/sky130_fd_sc_hd__o22a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o22a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and2_1" at bad file path ../mag/sky130_fd_sc_hd__and2_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and2_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor2_1" at bad file path ../mag/sky130_fd_sc_hd__nor2_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor2_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand3_1" at bad file path ../mag/sky130_fd_sc_hd__nand3_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand3_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand2_1" at bad file path ../mag/sky130_fd_sc_hd__nand2_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand2_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand4bb_1" at bad file path ../mag/sky130_fd_sc_hd__nand4bb_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand4bb_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a2bb2o_1" at bad file path ../mag/sky130_fd_sc_hd__a2bb2o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a2bb2o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o2111ai_2" at bad file path ../mag/sky130_fd_sc_hd__o2111ai_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o2111ai_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__xnor2_1" at bad file path ../mag/sky130_fd_sc_hd__xnor2_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__xnor2_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor3_1" at bad file path ../mag/sky130_fd_sc_hd__nor3_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor3_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21o_1" at bad file path ../mag/sky130_fd_sc_hd__a21o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21a_1" at bad file path ../mag/sky130_fd_sc_hd__o21a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o31ai_2" at bad file path ../mag/sky130_fd_sc_hd__o31ai_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o31ai_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand2b_2" at bad file path ../mag/sky130_fd_sc_hd__nand2b_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand2b_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor3_2" at bad file path ../mag/sky130_fd_sc_hd__nor3_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor3_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o2bb2ai_1" at bad file path ../mag/sky130_fd_sc_hd__o2bb2ai_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o2bb2ai_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a41oi_1" at bad file path ../mag/sky130_fd_sc_hd__a41oi_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a41oi_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a31o_1" at bad file path ../mag/sky130_fd_sc_hd__a31o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a31o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__inv_2" at bad file path ../mag/sky130_fd_sc_hd__inv_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__inv_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o211ai_4" at bad file path ../mag/sky130_fd_sc_hd__o211ai_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o211ai_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21ai_2" at bad file path ../mag/sky130_fd_sc_hd__o21ai_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21ai_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor2_2" at bad file path ../mag/sky130_fd_sc_hd__nor2_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor2_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor3b_2" at bad file path ../mag/sky130_fd_sc_hd__nor3b_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor3b_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21a_2" at bad file path ../mag/sky130_fd_sc_hd__o21a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkinv_4" at bad file path ../mag/sky130_fd_sc_hd__clkinv_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkinv_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkinv_2" at bad file path ../mag/sky130_fd_sc_hd__clkinv_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkinv_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_sc_hd__decap_12" at bad file path ../mag/sky130_ef_sc_hd__decap_12.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_ef_sc_hd__decap_12.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__diode_2" at bad file path ../mag/sky130_fd_sc_hd__diode_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__diode_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "buff_flash_clkrst" at bad file path /root/project/mag/buff_flash_clkrst.mag.
+The cell exists in the search paths at ../mag/buff_flash_clkrst.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkbuf_8" at bad file path ../mag/sky130_fd_sc_hd__clkbuf_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkbuf_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "gpio_control_block" at bad file path /root/project/mag/gpio_control_block.mag.
+The cell exists in the search paths at ../mag/gpio_control_block.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__buf_16" at bad file path ../mag/sky130_fd_sc_hd__buf_16.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__buf_16.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__macro_sparecell" at bad file path ../mag/sky130_fd_sc_hd__macro_sparecell.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__macro_sparecell.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dlygate4sd3_1" at bad file path ../mag/sky130_fd_sc_hd__dlygate4sd3_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dlygate4sd3_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfbbn_2" at bad file path ../mag/sky130_fd_sc_hd__dfbbn_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfbbn_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__or2_0" at bad file path ../mag/sky130_fd_sc_hd__or2_0.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__or2_0.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and2_2" at bad file path ../mag/sky130_fd_sc_hd__and2_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and2_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21ai_4" at bad file path ../mag/sky130_fd_sc_hd__o21ai_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21ai_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and2b_2" at bad file path ../mag/sky130_fd_sc_hd__and2b_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and2b_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and3b_2" at bad file path ../mag/sky130_fd_sc_hd__and3b_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and3b_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__mux2_4" at bad file path ../mag/sky130_fd_sc_hd__mux2_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__mux2_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and2_0" at bad file path ../mag/sky130_fd_sc_hd__and2_0.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and2_0.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "housekeeping" at bad file path /root/project/mag/housekeeping.mag.
+The cell exists in the search paths at ../mag/housekeeping.mag.
+The discovered version will be used.
+housekeeping: 10000 rects
+housekeeping: 20000 rects
+housekeeping: 30000 rects
+housekeeping: 40000 rects
+housekeeping: 50000 rects
+housekeeping: 60000 rects
+housekeeping: 70000 rects
+housekeeping: 80000 rects
+housekeeping: 90000 rects
+housekeeping: 100000 rects
+housekeeping: 110000 rects
+housekeeping: 120000 rects
+housekeeping: 130000 rects
+housekeeping: 140000 rects
+housekeeping: 150000 rects
+housekeeping: 160000 rects
+housekeeping: 170000 rects
+housekeeping: 180000 rects
+housekeeping: 190000 rects
+housekeeping: 200000 rects
+housekeeping: 210000 rects
+housekeeping: 220000 rects
+housekeeping: 230000 rects
+housekeeping: 240000 rects
+housekeeping: 250000 rects
+housekeeping: 260000 rects
+housekeeping: 270000 rects
+housekeeping: 280000 rects
+housekeeping: 290000 rects
+housekeeping: 300000 rects
+housekeeping: 310000 rects
+housekeeping: 320000 rects
+housekeeping: 330000 rects
+housekeeping: 340000 rects
+housekeeping: 350000 rects
+housekeeping: 360000 rects
+housekeeping: 370000 rects
+housekeeping: 380000 rects
+housekeeping: 390000 rects
+housekeeping: 400000 rects
+housekeeping: 410000 rects
+housekeeping: 420000 rects
+housekeeping: 430000 rects
+housekeeping: 440000 rects
+housekeeping: 450000 rects
+housekeeping: 460000 rects
+housekeeping: 470000 rects
+housekeeping: 480000 rects
+housekeeping: 490000 rects
+housekeeping: 500000 rects
+housekeeping: 510000 rects
+housekeeping: 520000 rects
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__buf_8" at bad file path ../mag/sky130_fd_sc_hd__buf_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__buf_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__buf_6" at bad file path ../mag/sky130_fd_sc_hd__buf_6.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__buf_6.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfstp_4" at bad file path ../mag/sky130_fd_sc_hd__dfstp_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfstp_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a32o_1" at bad file path ../mag/sky130_fd_sc_hd__a32o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a32o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a22o_1" at bad file path ../mag/sky130_fd_sc_hd__a22o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a22o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o211a_2" at bad file path ../mag/sky130_fd_sc_hd__o211a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o211a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a221o_1" at bad file path ../mag/sky130_fd_sc_hd__a221o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a221o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a211o_4" at bad file path ../mag/sky130_fd_sc_hd__a211o_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a211o_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21bo_1" at bad file path ../mag/sky130_fd_sc_hd__a21bo_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21bo_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand2_4" at bad file path ../mag/sky130_fd_sc_hd__nand2_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand2_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__mux2_2" at bad file path ../mag/sky130_fd_sc_hd__mux2_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__mux2_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o2bb2a_1" at bad file path ../mag/sky130_fd_sc_hd__o2bb2a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o2bb2a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and3b_1" at bad file path ../mag/sky130_fd_sc_hd__and3b_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and3b_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a221o_2" at bad file path ../mag/sky130_fd_sc_hd__a221o_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a221o_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a211o_1" at bad file path ../mag/sky130_fd_sc_hd__a211o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a211o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21ba_1" at bad file path ../mag/sky130_fd_sc_hd__o21ba_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21ba_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and4b_2" at bad file path ../mag/sky130_fd_sc_hd__and4b_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and4b_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a22o_2" at bad file path ../mag/sky130_fd_sc_hd__a22o_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a22o_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a211o_2" at bad file path ../mag/sky130_fd_sc_hd__a211o_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a211o_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and4b_1" at bad file path ../mag/sky130_fd_sc_hd__and4b_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and4b_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and4bb_1" at bad file path ../mag/sky130_fd_sc_hd__and4bb_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and4bb_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and4bb_2" at bad file path ../mag/sky130_fd_sc_hd__and4bb_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and4bb_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and3_4" at bad file path ../mag/sky130_fd_sc_hd__and3_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and3_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand3_4" at bad file path ../mag/sky130_fd_sc_hd__nand3_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand3_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a311o_1" at bad file path ../mag/sky130_fd_sc_hd__a311o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a311o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and2_4" at bad file path ../mag/sky130_fd_sc_hd__and2_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and2_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor2_4" at bad file path ../mag/sky130_fd_sc_hd__nor2_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor2_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor2_8" at bad file path ../mag/sky130_fd_sc_hd__nor2_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor2_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o221a_1" at bad file path ../mag/sky130_fd_sc_hd__o221a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o221a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a2111o_1" at bad file path ../mag/sky130_fd_sc_hd__a2111o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a2111o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor4_2" at bad file path ../mag/sky130_fd_sc_hd__nor4_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor4_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a2111o_4" at bad file path ../mag/sky130_fd_sc_hd__a2111o_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a2111o_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor4_4" at bad file path ../mag/sky130_fd_sc_hd__nor4_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor4_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a2111o_2" at bad file path ../mag/sky130_fd_sc_hd__a2111o_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a2111o_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and3b_4" at bad file path ../mag/sky130_fd_sc_hd__and3b_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and3b_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand2b_4" at bad file path ../mag/sky130_fd_sc_hd__nand2b_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand2b_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand2_8" at bad file path ../mag/sky130_fd_sc_hd__nand2_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand2_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21o_2" at bad file path ../mag/sky130_fd_sc_hd__a21o_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21o_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and3_1" at bad file path ../mag/sky130_fd_sc_hd__and3_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and3_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o32a_1" at bad file path ../mag/sky130_fd_sc_hd__o32a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o32a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and2b_4" at bad file path ../mag/sky130_fd_sc_hd__and2b_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and2b_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21boi_1" at bad file path ../mag/sky130_fd_sc_hd__a21boi_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21boi_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand4_1" at bad file path ../mag/sky130_fd_sc_hd__nand4_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand4_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o311a_1" at bad file path ../mag/sky130_fd_sc_hd__o311a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o311a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o211a_1" at bad file path ../mag/sky130_fd_sc_hd__o211a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o211a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand3_2" at bad file path ../mag/sky130_fd_sc_hd__nand3_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand3_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o2111a_1" at bad file path ../mag/sky130_fd_sc_hd__o2111a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o2111a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand4b_1" at bad file path ../mag/sky130_fd_sc_hd__nand4b_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand4b_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a31oi_1" at bad file path ../mag/sky130_fd_sc_hd__a31oi_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a31oi_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and4_1" at bad file path ../mag/sky130_fd_sc_hd__and4_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and4_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a41o_1" at bad file path ../mag/sky130_fd_sc_hd__a41o_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a41o_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and2b_1" at bad file path ../mag/sky130_fd_sc_hd__and2b_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and2b_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and3_2" at bad file path ../mag/sky130_fd_sc_hd__and3_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and3_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a311oi_2" at bad file path ../mag/sky130_fd_sc_hd__a311oi_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a311oi_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o41a_1" at bad file path ../mag/sky130_fd_sc_hd__o41a_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o41a_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor3b_1" at bad file path ../mag/sky130_fd_sc_hd__nor3b_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor3b_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21oi_2" at bad file path ../mag/sky130_fd_sc_hd__a21oi_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21oi_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand4_2" at bad file path ../mag/sky130_fd_sc_hd__nand4_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand4_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a2111oi_1" at bad file path ../mag/sky130_fd_sc_hd__a2111oi_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a2111oi_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand4b_4" at bad file path ../mag/sky130_fd_sc_hd__nand4b_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand4b_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__xnor2_2" at bad file path ../mag/sky130_fd_sc_hd__xnor2_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__xnor2_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a31oi_4" at bad file path ../mag/sky130_fd_sc_hd__a31oi_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a31oi_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and4b_4" at bad file path ../mag/sky130_fd_sc_hd__and4b_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and4b_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand3b_4" at bad file path ../mag/sky130_fd_sc_hd__nand3b_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand3b_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21a_4" at bad file path ../mag/sky130_fd_sc_hd__o21a_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21a_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a31o_2" at bad file path ../mag/sky130_fd_sc_hd__a31o_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a31o_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__xor2_1" at bad file path ../mag/sky130_fd_sc_hd__xor2_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__xor2_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nor3_4" at bad file path ../mag/sky130_fd_sc_hd__nor3_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nor3_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o221a_4" at bad file path ../mag/sky130_fd_sc_hd__o221a_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o221a_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__mux2_8" at bad file path ../mag/sky130_fd_sc_hd__mux2_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__mux2_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o31a_4" at bad file path ../mag/sky130_fd_sc_hd__o31a_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o31a_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__and4_2" at bad file path ../mag/sky130_fd_sc_hd__and4_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__and4_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a221oi_1" at bad file path ../mag/sky130_fd_sc_hd__a221oi_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a221oi_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a221o_4" at bad file path ../mag/sky130_fd_sc_hd__a221o_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a221o_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o31a_2" at bad file path ../mag/sky130_fd_sc_hd__o31a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o31a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21oi_4" at bad file path ../mag/sky130_fd_sc_hd__a21oi_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21oi_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21o_4" at bad file path ../mag/sky130_fd_sc_hd__a21o_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21o_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__inv_6" at bad file path ../mag/sky130_fd_sc_hd__inv_6.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__inv_6.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "digital_pll" at bad file path /root/project/mag/digital_pll.mag.
+The cell exists in the search paths at ../mag/digital_pll.mag.
+The discovered version will be used.
+digital_pll: 10000 rects
+digital_pll: 20000 rects
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__einvp_1" at bad file path ../mag/sky130_fd_sc_hd__einvp_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__einvp_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkinv_1" at bad file path ../mag/sky130_fd_sc_hd__clkinv_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkinv_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__einvn_4" at bad file path ../mag/sky130_fd_sc_hd__einvn_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__einvn_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__einvn_8" at bad file path ../mag/sky130_fd_sc_hd__einvn_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__einvn_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__einvp_2" at bad file path ../mag/sky130_fd_sc_hd__einvp_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__einvp_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__or2_2" at bad file path ../mag/sky130_fd_sc_hd__or2_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__or2_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__clkinv_8" at bad file path ../mag/sky130_fd_sc_hd__clkinv_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__clkinv_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a32o_2" at bad file path ../mag/sky130_fd_sc_hd__a32o_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a32o_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o2111a_2" at bad file path ../mag/sky130_fd_sc_hd__o2111a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o2111a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o22a_2" at bad file path ../mag/sky130_fd_sc_hd__o22a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o22a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o221a_2" at bad file path ../mag/sky130_fd_sc_hd__o221a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o221a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand3b_2" at bad file path ../mag/sky130_fd_sc_hd__nand3b_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand3b_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__a21boi_2" at bad file path ../mag/sky130_fd_sc_hd__a21boi_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__a21boi_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__xor2_2" at bad file path ../mag/sky130_fd_sc_hd__xor2_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__xor2_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o2bb2a_2" at bad file path ../mag/sky130_fd_sc_hd__o2bb2a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o2bb2a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__nand4b_2" at bad file path ../mag/sky130_fd_sc_hd__nand4b_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__nand4b_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o21ba_2" at bad file path ../mag/sky130_fd_sc_hd__o21ba_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o21ba_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__o32a_2" at bad file path ../mag/sky130_fd_sc_hd__o32a_2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__o32a_2.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "spare_logic_block" at bad file path /root/project/mag/spare_logic_block.mag.
+The cell exists in the search paths at ../mag/spare_logic_block.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__inv_8" at bad file path ../mag/sky130_fd_sc_hd__inv_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__inv_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__dfbbp_1" at bad file path ../mag/sky130_fd_sc_hd__dfbbp_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__dfbbp_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "mgmt_protect" at bad file path /root/project/mag/mgmt_protect.mag.
+The cell exists in the search paths at ../mag/mgmt_protect.mag.
+The discovered version will be used.
+mgmt_protect: 10000 rects
+mgmt_protect: 20000 rects
+mgmt_protect: 30000 rects
+mgmt_protect: 40000 rects
+mgmt_protect: 50000 rects
+mgmt_protect: 60000 rects
+mgmt_protect: 70000 rects
+mgmt_protect: 80000 rects
+mgmt_protect: 90000 rects
+mgmt_protect: 100000 rects
+mgmt_protect: 110000 rects
+mgmt_protect: 120000 rects
+mgmt_protect: 130000 rects
+mgmt_protect: 140000 rects
+mgmt_protect: 150000 rects
+mgmt_protect: 160000 rects
+mgmt_protect: 170000 rects
+mgmt_protect: 180000 rects
+mgmt_protect: 190000 rects
+mgmt_protect: 200000 rects
+mgmt_protect: 210000 rects
+mgmt_protect: 220000 rects
+mgmt_protect: 230000 rects
+mgmt_protect: 240000 rects
+mgmt_protect: 250000 rects
+mgmt_protect: 260000 rects
+mgmt_protect: 270000 rects
+mgmt_protect: 280000 rects
+mgmt_protect: 290000 rects
+mgmt_protect: 300000 rects
+mgmt_protect: 310000 rects
+mgmt_protect: 320000 rects
+mgmt_protect: 330000 rects
+mgmt_protect: 340000 rects
+mgmt_protect: 350000 rects
+mgmt_protect: 360000 rects
+mgmt_protect: 370000 rects
+mgmt_protect: 380000 rects
+mgmt_protect: 390000 rects
+mgmt_protect: 400000 rects
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__bufbuf_8" at bad file path ../mag/sky130_fd_sc_hd__bufbuf_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__bufbuf_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hvl__conb_1" at bad file path ../mag/sky130_fd_sc_hvl__conb_1.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hvl/mag/sky130_fd_sc_hvl__conb_1.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__inv_12" at bad file path ../mag/sky130_fd_sc_hd__inv_12.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__inv_12.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "caravel_power_routing" at bad file path /root/project/mag/caravel_power_routing.mag.
+The cell exists in the search paths at ../mag/caravel_power_routing.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "chip_io" at bad file path /root/project/mag/chip_io.mag.
+The cell exists in the search paths at ../mag/chip_io.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__com_bus_slice_20um" at bad file path ../mag/sky130_ef_io__com_bus_slice_20um.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__com_bus_slice_20um.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__corner_pad" at bad file path ../mag/sky130_ef_io__corner_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__corner_pad.mag.
+The discovered version will be used.
+sky130_fd_io__corner_bus_overlay: 10000 rects
+Warning:  Parent cell lists instance of "sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um" at bad file path ../mag/sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__com_bus_slice_1um" at bad file path ../mag/sky130_ef_io__com_bus_slice_1um.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__com_bus_slice_1um.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__com_bus_slice_5um" at bad file path ../mag/sky130_ef_io__com_bus_slice_5um.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__com_bus_slice_5um.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__com_bus_slice_10um" at bad file path ../mag/sky130_ef_io__com_bus_slice_10um.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__com_bus_slice_10um.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__vssa_hvc_clamped_pad" at bad file path ../mag/sky130_ef_io__vssa_hvc_clamped_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vssa_hvc_clamped_pad.mag.
+The discovered version will be used.
+sky130_fd_io__top_ground_hvc_wpad: 10000 rects
+sky130_fd_io__top_ground_hvc_wpad: 20000 rects
+sky130_fd_io__top_ground_hvc_wpad: 30000 rects
+sky130_fd_io__top_ground_hvc_wpad: 40000 rects
+sky130_fd_io__top_ground_hvc_wpad: 50000 rects
+sky130_fd_io__top_ground_hvc_wpad: 60000 rects
+sky130_fd_io__top_ground_hvc_wpad: 70000 rects
+sky130_fd_io__top_ground_hvc_wpad: 80000 rects
+sky130_fd_io__top_ground_hvc_wpad: 90000 rects
+sky130_fd_io__top_ground_hvc_wpad: 100000 rects
+sky130_fd_io__top_ground_hvc_wpad: 110000 rects
+sky130_fd_io__top_ground_hvc_wpad: 120000 rects
+sky130_fd_io__top_ground_hvc_wpad: 130000 rects
+sky130_fd_io__top_ground_hvc_wpad: 140000 rects
+sky130_fd_io__top_ground_hvc_wpad: 150000 rects
+sky130_fd_io__top_ground_hvc_wpad: 160000 rects
+sky130_fd_io__top_ground_hvc_wpad: 170000 rects
+sky130_fd_io__top_ground_hvc_wpad: 180000 rects
+sky130_fd_io__top_ground_hvc_wpad: 190000 rects
+sky130_fd_io__top_ground_hvc_wpad: 200000 rects
+sky130_fd_io__top_ground_hvc_wpad: 210000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_5595914180851 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808336 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808666 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808678 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808679 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180839 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808671 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s2__example_55959141808672 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808663 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808660 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808675 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s2__example_55959141808676 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808662 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808661 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_559591418084 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__genrivetdlring__example_559591418082 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__gendlring__example_559591418081 geometry by factor of 2
+Warning:  Parent cell lists instance of "sky130_fd_io__top_xres4v2" at bad file path ../mag/sky130_fd_io__top_xres4v2.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_fd_io__top_xres4v2.mag.
+The discovered version will be used.
+sky130_fd_io__top_xres4v2: 10000 rects
+sky130_fd_io__top_xres4v2: 20000 rects
+sky130_fd_io__top_xres4v2: 30000 rects
+sky130_fd_io__top_xres4v2: 40000 rects
+sky130_fd_io__top_xres4v2: 50000 rects
+sky130_fd_io__top_xres4v2: 60000 rects
+sky130_fd_io__top_xres4v2: 70000 rects
+sky130_fd_io__top_xres4v2: 80000 rects
+sky130_fd_io__top_xres4v2: 90000 rects
+sky130_fd_io__top_xres4v2: 100000 rects
+sky130_fd_io__top_xres4v2: 110000 rects
+sky130_fd_io__top_xres4v2: 120000 rects
+sky130_fd_io__top_xres4v2: 130000 rects
+sky130_fd_io__top_xres4v2: 140000 rects
+sky130_fd_io__top_xres4v2: 150000 rects
+sky130_fd_io__top_xres4v2: 160000 rects
+sky130_fd_io__top_xres4v2: 170000 rects
+sky130_fd_io__top_xres4v2: 180000 rects
+sky130_fd_io__top_xres4v2: 190000 rects
+sky130_fd_io__top_xres4v2: 200000 rects
+sky130_fd_io__top_xres4v2: 210000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808719 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808765 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808717 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808243 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180890 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808264 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180858 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180833 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_55959141808288 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180859 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808289 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808274 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808728 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808727 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808726 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808725 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808724 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808554 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808553 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808552 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808551 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808402 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808350 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808261 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808260 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808259 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808400 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808372 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808326 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808290 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808128 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808127 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180897 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180819 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808147 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808157 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808156 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808155 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808154 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808153 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808152 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808151 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808150 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808149 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808148 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808158 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_559591418083 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808137 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_559591418086 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808370 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808316 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808385 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_559591418088 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808612 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_5595914180848 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180849 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m2m3__example_55959141808714 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1_centered__example_559591418081 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2s_cdns_55959141808652 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2o_cdns_55959141808653 geometry by factor of 2
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 10000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 20000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 30000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_5595914180812 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_5595914180811 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418086 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418084 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpm1s2__example_55959141808659 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__pfet_01v8__example_55959141808657 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808202 geometry by factor of 2
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 10000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 20000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 30000 rects
+sky130_fd_io__xres2v2_rcfilter_lpfv2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808273 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808740 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808739 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808738 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808737 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808736 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808735 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808734 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808733 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808732 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808731 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808730 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808752 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808751 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808750 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808749 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808748 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808747 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808746 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808745 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808744 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808743 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808742 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808741 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808324 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808270 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808187 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808338 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808337 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808700 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808559 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808729 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__xres_p_em1c_cdns_55959141808753 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180860 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180857 geometry by factor of 2
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 10000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 20000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 30000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 40000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2: 50000 rects
+Scaled magic input cell sky130_fd_pr__hvdftpm1s2__example_55959141808649 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdftpl1s__example_55959141808646 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808378 geometry by factor of 2
+sky130_fd_io__xres4v2_in_buf: 10000 rects
+sky130_fd_io__xres4v2_in_buf: 20000 rects
+sky130_fd_io__xres4v2_in_buf: 30000 rects
+sky130_fd_io__xres4v2_in_buf: 40000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808782 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808449 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808452 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808233 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180827 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_5595914180835 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808242 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_5595914180829 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808237 geometry by factor of 2
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__fill_4" at bad file path ../mag/sky130_fd_sc_hd__fill_4.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__fill_4.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_fd_sc_hd__fill_8" at bad file path ../mag/sky130_fd_sc_hd__fill_8.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_sc_hd/mag/sky130_fd_sc_hd__fill_8.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__gpiov2_pad_wrapped" at bad file path ../mag/sky130_ef_io__gpiov2_pad_wrapped.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__gpiov2_pad_wrapped.mag.
+The discovered version will be used.
+sky130_fd_io__top_gpiov2: 10000 rects
+sky130_fd_io__top_gpiov2: 20000 rects
+sky130_fd_io__top_gpiov2: 30000 rects
+sky130_fd_io__top_gpiov2: 40000 rects
+sky130_fd_io__top_gpiov2: 50000 rects
+sky130_fd_io__top_gpiov2: 60000 rects
+sky130_fd_io__top_gpiov2: 70000 rects
+sky130_fd_io__top_gpiov2: 80000 rects
+sky130_fd_io__top_gpiov2: 90000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808418 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808190 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180811 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808191 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808517 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808518 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180815 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180816 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180884 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808106 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808504 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180812 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180875 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2s_cdns_55959141808438 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em2o_cdns_55959141808439 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180882 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180881 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180880 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_5595914180879 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180823 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808510 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808394 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808298 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808440 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180878 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808434 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808102 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808115 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808100 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808140 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808280 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808425 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808306 geometry by factor of 2
+sky130_fd_io__gpiov2_amux: 10000 rects
+sky130_fd_io__gpiov2_amux: 20000 rects
+sky130_fd_io__gpiov2_amux: 30000 rects
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808178 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808488 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808122 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_55959141808123 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808476 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd__example_5595914180868 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_5595914180869 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808581 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808278 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808462 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808200 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_5595914180894 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfm1sd__example_55959141808258 geometry by factor of 2
+sky130_fd_io__amux_switch_1v2b: 10000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808563 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfm1sd2__example_55959141808251 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfm1sd2__example_55959141808561 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808267 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808266 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1sd2__example_55959141808633 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808322 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808321 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808320 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808294 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808325 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808323 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808291 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__pfet_01v8__example_55959141808640 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd__example_55959141808194 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808328 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808327 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808272 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808271 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__hvdfl1sd2__example_55959141808143 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808275 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_m1m2__example_55959141808276 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808297 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808296 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808295 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808293 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808292 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808300 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808299 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__nfet_01v8__example_55959141808308 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_55959141808301 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1o_cdns_55959141808302 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_5595914180854 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808368 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808625 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808373 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808374 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808398 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808397 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808396 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_pol1__example_55959141808395 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808401 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808399 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808269 geometry by factor of 2
+sky130_fd_io__gpio_odrvr_subv2: 10000 rects
+sky130_fd_io__gpio_odrvr_subv2: 20000 rects
+sky130_fd_io__gpio_odrvr_subv2: 30000 rects
+Scaled magic input cell sky130_fd_pr__via_pol1_centered__example_559591418080 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_5595914180832 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__tk_em1s_cdns_5595914180852 geometry by factor of 2
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 10000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 20000 rects
+sky130_fd_io__nfet_con_diff_wo_abt_270v2: 30000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418083 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418082 geometry by factor of 2
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 10000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 20000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 30000 rects
+sky130_fd_io__pfet_con_diff_wo_abt_270v2: 40000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1_centered__example_559591418085 geometry by factor of 2
+sky130_fd_io__gpio_pddrvr_strong_slowv2: 10000 rects
+sky130_fd_io__gpio_pddrvr_strong_slowv2: 20000 rects
+Scaled magic input cell sky130_fd_pr__hvdfm1sd__example_55959141808655 geometry by factor of 2
+Warning:  Parent cell lists instance of "sky130_ef_io__vssd_lvc_clamped_pad" at bad file path ../mag/sky130_ef_io__vssd_lvc_clamped_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vssd_lvc_clamped_pad.mag.
+The discovered version will be used.
+sky130_fd_io__top_ground_lvc_wpad: 10000 rects
+sky130_fd_io__top_ground_lvc_wpad: 20000 rects
+sky130_fd_io__top_ground_lvc_wpad: 30000 rects
+sky130_fd_io__top_ground_lvc_wpad: 40000 rects
+sky130_fd_io__top_ground_lvc_wpad: 50000 rects
+sky130_fd_io__top_ground_lvc_wpad: 60000 rects
+sky130_fd_io__top_ground_lvc_wpad: 70000 rects
+sky130_fd_io__top_ground_lvc_wpad: 80000 rects
+sky130_fd_io__top_ground_lvc_wpad: 90000 rects
+sky130_fd_io__top_ground_lvc_wpad: 100000 rects
+sky130_fd_io__top_ground_lvc_wpad: 110000 rects
+sky130_fd_io__top_ground_lvc_wpad: 120000 rects
+sky130_fd_io__top_ground_lvc_wpad: 130000 rects
+sky130_fd_io__top_ground_lvc_wpad: 140000 rects
+sky130_fd_io__top_ground_lvc_wpad: 150000 rects
+sky130_fd_io__top_ground_lvc_wpad: 160000 rects
+sky130_fd_io__top_ground_lvc_wpad: 170000 rects
+sky130_fd_io__top_ground_lvc_wpad: 180000 rects
+sky130_fd_io__top_ground_lvc_wpad: 190000 rects
+sky130_fd_io__top_ground_lvc_wpad: 200000 rects
+sky130_fd_io__top_ground_lvc_wpad: 210000 rects
+sky130_fd_io__top_ground_lvc_wpad: 220000 rects
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808684 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808686 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__tpl1__example_55959141808685 geometry by factor of 2
+Scaled magic input cell sky130_fd_io__gnd2gnd_tap geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__via_l1m1__example_55959141808683 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dftpl1s2__example_55959141808702 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808682 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dftpl1s2__example_55959141808694 geometry by factor of 2
+Scaled magic input cell sky130_fd_pr__dfl1__example_55959141808681 geometry by factor of 2
+Warning:  Parent cell lists instance of "sky130_ef_io__vssio_hvc_clamped_pad" at bad file path ../mag/sky130_ef_io__vssio_hvc_clamped_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vssio_hvc_clamped_pad.mag.
+The discovered version will be used.
+sky130_fd_io__overlay_vssio_hvc: 10000 rects
+Warning:  Parent cell lists instance of "sky130_ef_io__vdda_hvc_clamped_pad" at bad file path ../mag/sky130_ef_io__vdda_hvc_clamped_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vdda_hvc_clamped_pad.mag.
+The discovered version will be used.
+sky130_fd_io__hvc_clampv2: 10000 rects
+sky130_fd_io__hvc_clampv2: 20000 rects
+sky130_fd_io__hvc_clampv2: 30000 rects
+sky130_fd_io__hvc_clampv2: 40000 rects
+sky130_fd_io__hvc_clampv2: 50000 rects
+sky130_fd_io__hvc_clampv2: 60000 rects
+sky130_fd_io__hvc_clampv2: 70000 rects
+sky130_fd_io__hvc_clampv2: 80000 rects
+sky130_fd_io__hvc_clampv2: 90000 rects
+sky130_fd_io__hvc_clampv2: 100000 rects
+sky130_fd_io__hvc_clampv2: 110000 rects
+sky130_fd_io__hvc_clampv2: 120000 rects
+sky130_fd_io__hvc_clampv2: 130000 rects
+sky130_fd_io__hvc_clampv2: 140000 rects
+sky130_fd_io__hvc_clampv2: 150000 rects
+sky130_fd_io__hvc_clampv2: 160000 rects
+sky130_fd_io__hvc_clampv2: 170000 rects
+sky130_fd_io__hvc_clampv2: 180000 rects
+sky130_fd_io__hvc_clampv2: 190000 rects
+sky130_fd_io__hvc_clampv2: 200000 rects
+sky130_fd_io__hvc_clampv2: 210000 rects
+sky130_fd_io__hvc_clampv2: 220000 rects
+sky130_fd_io__hvc_clampv2: 230000 rects
+sky130_fd_io__hvc_clampv2: 240000 rects
+sky130_fd_io__hvc_clampv2: 250000 rects
+sky130_fd_io__hvc_clampv2: 260000 rects
+sky130_fd_io__hvc_clampv2: 270000 rects
+sky130_fd_io__hvc_clampv2: 280000 rects
+Warning:  Parent cell lists instance of "sky130_ef_io__vccd_lvc_clamped_pad" at bad file path ../mag/sky130_ef_io__vccd_lvc_clamped_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vccd_lvc_clamped_pad.mag.
+The discovered version will be used.
+sky130_fd_io__top_power_lvc_wpad: 10000 rects
+sky130_fd_io__top_power_lvc_wpad: 20000 rects
+sky130_fd_io__top_power_lvc_wpad: 30000 rects
+sky130_fd_io__top_power_lvc_wpad: 40000 rects
+sky130_fd_io__top_power_lvc_wpad: 50000 rects
+sky130_fd_io__top_power_lvc_wpad: 60000 rects
+sky130_fd_io__top_power_lvc_wpad: 70000 rects
+sky130_fd_io__top_power_lvc_wpad: 80000 rects
+sky130_fd_io__top_power_lvc_wpad: 90000 rects
+sky130_fd_io__top_power_lvc_wpad: 100000 rects
+sky130_fd_io__top_power_lvc_wpad: 110000 rects
+sky130_fd_io__top_power_lvc_wpad: 120000 rects
+sky130_fd_io__top_power_lvc_wpad: 130000 rects
+sky130_fd_io__top_power_lvc_wpad: 140000 rects
+sky130_fd_io__top_power_lvc_wpad: 150000 rects
+sky130_fd_io__top_power_lvc_wpad: 160000 rects
+sky130_fd_io__top_power_lvc_wpad: 170000 rects
+sky130_fd_io__top_power_lvc_wpad: 180000 rects
+sky130_fd_io__top_power_lvc_wpad: 190000 rects
+sky130_fd_io__top_power_lvc_wpad: 200000 rects
+sky130_fd_io__top_power_lvc_wpad: 210000 rects
+sky130_fd_io__top_power_lvc_wpad: 220000 rects
+sky130_fd_io__top_power_lvc_wpad: 230000 rects
+Warning:  Parent cell lists instance of "sky130_ef_io__disconnect_vdda_slice_5um" at bad file path ../mag/sky130_ef_io__disconnect_vdda_slice_5um.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__disconnect_vdda_slice_5um.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__vddio_hvc_clamped_pad" at bad file path ../mag/sky130_ef_io__vddio_hvc_clamped_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vddio_hvc_clamped_pad.mag.
+The discovered version will be used.
+sky130_fd_io__overlay_vddio_hvc: 10000 rects
+Warning:  Parent cell lists instance of "sky130_ef_io__vssd_lvc_clamped3_pad" at bad file path ../mag/sky130_ef_io__vssd_lvc_clamped3_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vssd_lvc_clamped3_pad.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "sky130_ef_io__vccd_lvc_clamped3_pad" at bad file path ../mag/sky130_ef_io__vccd_lvc_clamped3_pad.mag.
+The cell exists in the search paths at /opt/pdks/sky130A/libs.ref/sky130_fd_io/mag/sky130_ef_io__vccd_lvc_clamped3_pad.mag.
+The discovered version will be used.
+Warning:  Parent cell lists instance of "gpio_signal_buffering" at bad file path /root/project/mag/gpio_signal_buffering.mag.
+The cell exists in the search paths at ../mag/gpio_signal_buffering.mag.
+The discovered version will be used.
+Processing timestamp mismatches: sky130_fd_sc_hd__tapvpwrvgnd_1, sky130_fd_sc_hd__buf_8, sky130_ef_sc_hd__decap_12, sky130_ef_io__vccd_lvc_clamped3_pad, sky130_ef_io__vssd_lvc_clamped3_pad, sky130_ef_io__vddio_hvc_clamped_pad, sky130_ef_io__disconnect_vdda_slice_5um, sky130_ef_io__vccd_lvc_clamped_pad, sky130_ef_io__vdda_hvc_clamped_pad, sky130_ef_io__vssio_hvc_clamped_pad, sky130_ef_io__vssd_lvc_clamped_pad, sky130_ef_io__gpiov2_pad_wrapped, sky130_fd_sc_hd__fill_8, sky130_fd_sc_hd__fill_4, constant_block, sky130_fd_sc_hd__buf_16, sky130_fd_sc_hd__conb_1, sky130_fd_sc_hd__fill_1, sky130_fd_sc_hd__fill_2, sky130_fd_io__top_xres4v2, sky130_ef_io__vssa_hvc_clamped_pad, sky130_ef_io__com_bus_slice_10um, sky130_ef_io__com_bus_slice_5um, sky130_ef_io__com_bus_slice_1um, sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um, sky130_ef_io__corner_pad, sky130_ef_io__com_bus_slice_20um, gpio_control_power_routing, gpio_control_power_routing_right, gpio_control_power_routing_top, gpio_defaults_block_0801, sky130_fd_sc_hd__decap_3, sky130_fd_sc_hd__decap_4, sky130_fd_sc_hd__decap_12, sky130_fd_sc_hd__decap_6, sky130_fd_sc_hd__inv_12, mprj2_logic_high, mprj_logic_high, sky130_fd_sc_hd__decap_8, sky130_fd_sc_hvl__conb_1, mgmt_protect_hv, sky130_fd_sc_hvl__lsbufhv2lv_1, sky130_fd_sc_hvl__fill_2, sky130_fd_sc_hvl__fill_1, sky130_fd_sc_hd__bufbuf_8, sky130_fd_sc_hd__buf_6, sky130_fd_sc_hd__buf_4, sky130_fd_sc_hd__nand2_8, sky130_fd_sc_hd__nand2_4, sky130_fd_sc_hd__nand2_2, sky130_fd_sc_hd__nand2_1, sky130_fd_sc_hd__clkbuf_4, sky130_fd_sc_hd__clkbuf_8, sky130_fd_sc_hd__and2_1, sky130_fd_sc_hd__and2_2, sky130_fd_sc_hd__and2_4, sky130_fd_sc_hd__and3b_4, sky130_fd_sc_hd__and3b_2, sky130_fd_sc_hd__and3b_1, sky130_fd_sc_hd__and2b_4, sky130_fd_sc_hd__clkinv_2, sky130_fd_sc_hd__inv_2, sky130_fd_sc_hd__clkinv_8, sky130_fd_sc_hd__clkinv_4, sky130_fd_sc_hd__inv_4, sky130_fd_sc_hd__diode_2, sky130_fd_sc_hd__dfbbp_1, sky130_fd_sc_hd__inv_8, sky130_fd_sc_hd__nor2_2, sky130_fd_sc_hd__mux2_2, gpio_defaults_block_0403, sky130_fd_sc_hd__o32a_2, sky130_fd_sc_hd__o21ba_2, sky130_fd_sc_hd__nand4b_2, sky130_fd_sc_hd__o2bb2a_2, sky130_fd_sc_hd__xor2_2, sky130_fd_sc_hd__a21boi_2, sky130_fd_sc_hd__nand3b_2, sky130_fd_sc_hd__o221a_2, sky130_fd_sc_hd__o22a_2, sky130_fd_sc_hd__o2111a_2, sky130_fd_sc_hd__a32o_2, sky130_fd_sc_hd__or2_2, sky130_fd_sc_hd__einvp_2, sky130_fd_sc_hd__einvn_8, sky130_fd_sc_hd__einvn_4, sky130_fd_sc_hd__clkinv_1, sky130_fd_sc_hd__einvp_1, sky130_fd_sc_hd__clkbuf_1, sky130_fd_sc_hd__clkbuf_2, sky130_fd_sc_hd__clkbuf_16, sky130_fd_sc_hd__dfrtp_2, sky130_fd_sc_hd__buf_2, sky130_fd_sc_hd__a22o_2, sky130_fd_sc_hd__a21o_2, sky130_fd_sc_hd__nand3_2, sky130_fd_sc_hd__o31a_2, sky130_fd_sc_hd__o21ai_2, sky130_fd_sc_hd__o211a_2, sky130_fd_sc_hd__and3_2, sky130_fd_sc_hd__nand2b_2, sky130_fd_sc_hd__a211o_2, sky130_fd_sc_hd__o21a_2, sky130_fd_sc_hd__a21oi_2, sky130_fd_sc_hd__and2b_2, sky130_fd_sc_hd__xnor2_2, sky130_fd_sc_hd__and4b_2, sky130_fd_sc_hd__nand4_2, sky130_fd_sc_hd__a31o_2, sky130_fd_sc_hd__inv_6, sky130_fd_sc_hd__a21o_4, sky130_fd_sc_hd__a21oi_4, sky130_fd_sc_hd__a221o_4, sky130_fd_sc_hd__a221oi_1, sky130_fd_sc_hd__and4_2, sky130_fd_sc_hd__o31a_4, sky130_fd_sc_hd__mux2_8, sky130_fd_sc_hd__o221a_4, sky130_fd_sc_hd__nor3_4, sky130_fd_sc_hd__xor2_1, sky130_fd_sc_hd__o21a_4, sky130_fd_sc_hd__nand3b_4, sky130_fd_sc_hd__and4b_4, sky130_fd_sc_hd__a31oi_4, sky130_fd_sc_hd__nand4b_4, sky130_fd_sc_hd__a2111oi_1, sky130_fd_sc_hd__nor3b_1, sky130_fd_sc_hd__o41a_1, sky130_fd_sc_hd__a311oi_2, sky130_fd_sc_hd__and2b_1, sky130_fd_sc_hd__a41o_1, sky130_fd_sc_hd__and4_1, sky130_fd_sc_hd__a31oi_1, sky130_fd_sc_hd__nand4b_1, sky130_fd_sc_hd__o2111a_1, sky130_fd_sc_hd__o211a_1, sky130_fd_sc_hd__o311a_1, sky130_fd_sc_hd__nand4_1, sky130_fd_sc_hd__a21boi_1, sky130_fd_sc_hd__o32a_1, sky130_fd_sc_hd__and3_1, sky130_fd_sc_hd__nand2b_4, sky130_fd_sc_hd__a2111o_2, sky130_fd_sc_hd__nor4_4, sky130_fd_sc_hd__a2111o_4, sky130_fd_sc_hd__nor4_2, sky130_fd_sc_hd__a2111o_1, sky130_fd_sc_hd__o221a_1, sky130_fd_sc_hd__nor2_8, sky130_fd_sc_hd__nor2_4, sky130_fd_sc_hd__a311o_1, sky130_fd_sc_hd__nand3_4, sky130_fd_sc_hd__and3_4, sky130_fd_sc_hd__and4bb_2, sky130_fd_sc_hd__and4bb_1, sky130_fd_sc_hd__and4b_1, sky130_fd_sc_hd__o21ba_1, sky130_fd_sc_hd__a211o_1, sky130_fd_sc_hd__a221o_2, sky130_fd_sc_hd__o2bb2a_1, sky130_fd_sc_hd__a21bo_1, sky130_fd_sc_hd__a211o_4, sky130_fd_sc_hd__a221o_1, sky130_fd_sc_hd__a22o_1, sky130_fd_sc_hd__a32o_1, sky130_fd_sc_hd__dfstp_4, sky130_fd_sc_hd__buf_12, sky130_fd_sc_hd__dlymetal6s2s_1, sky130_fd_sc_hd__dlygate4sd3_1, sky130_fd_sc_hd__dfrtp_1, sky130_fd_sc_hd__dfstp_2, sky130_fd_sc_hd__dfrtn_1, sky130_fd_sc_hd__dfrtp_4, sky130_fd_sc_hd__dfstp_1, sky130_fd_sc_hd__dfxtp_1, sky130_fd_sc_hd__mux2_1, sky130_fd_sc_hd__o31a_1, sky130_fd_sc_hd__a21o_1, sky130_fd_sc_hd__o31ai_1, sky130_fd_sc_hd__nor4_1, sky130_fd_sc_hd__nor3_1, sky130_fd_sc_hd__nor3_2, sky130_fd_sc_hd__a21oi_1, sky130_fd_sc_hd__nor2_1, sky130_fd_sc_hd__a2bb2o_1, sky130_fd_sc_hd__o21ai_1, sky130_fd_sc_hd__o22a_1, sky130_fd_sc_hd__nand2b_1, sky130_fd_sc_hd__o21a_1, sky130_fd_sc_hd__a31o_1, sky130_fd_sc_hd__nand3_1, sky130_fd_sc_hd__o2111ai_1, sky130_fd_sc_hd__xnor2_1, sky130_fd_sc_hd__mux2_4, gpio_defaults_block_1803, sky130_fd_sc_hd__and2_0, sky130_fd_sc_hd__o21ai_4, sky130_fd_sc_hd__or2_0, sky130_fd_sc_hd__dfbbn_2, sky130_fd_sc_hd__macro_sparecell, sky130_fd_sc_hd__nor3b_2, sky130_fd_sc_hd__o211ai_4, sky130_fd_sc_hd__a41oi_1, sky130_fd_sc_hd__o2bb2ai_1, sky130_fd_sc_hd__o31ai_2, sky130_fd_sc_hd__o2111ai_2, sky130_fd_sc_hd__nand4bb_1, sky130_fd_sc_hd__nand3b_1, sky130_fd_sc_hd__o21bai_1, alpha_8, alpha_9, alpha_4, alpha_B, alpha_6, sky130_fd_sc_hvl__diode_2, sky130_fd_sc_hvl__decap_4, sky130_fd_sc_hvl__decap_8.
+   Generating output for cell caravel_logo
+   Generating output for cell font_22
+   Generating output for cell font_73
+   Generating output for cell font_43
+   Generating output for cell font_49
+   Generating output for cell font_65
+   Generating output for cell font_68
+   Generating output for cell font_54
+   Generating output for cell font_67
+   Generating output for cell font_6E
+   Generating output for cell font_69
+   Generating output for cell font_6C
+   Generating output for cell font_61
+   Generating output for cell font_53
+   Generating output for cell caravel_motto
+   Generating output for cell font_79
+   Generating output for cell font_76
+   Generating output for cell font_74
+   Generating output for cell font_72
+   Generating output for cell font_70
+   Generating output for cell font_66
+   Generating output for cell font_63
+   Generating output for cell font_62
+   Generating output for cell font_57
+   Generating output for cell font_56
+   Generating output for cell font_50
+   Generating output for cell font_47
+   Generating output for cell font_44
+   Generating output for cell font_35
+   Generating output for cell font_32
+   Generating output for cell font_30
+   Generating output for cell font_29
+   Generating output for cell font_28
+   Generating output for cell font_20
+   Generating output for cell font_6F
+   Generating output for cell font_6B
+   Generating output for cell font_4F
+   Generating output for cell font_4B
+   Generating output for cell font_2D
+   Generating output for cell copyright_block
+   Generating output for cell open_source
+   Generating output for cell sky130_fd_sc_hvl__decap_8
+   Generating output for cell sky130_fd_sc_hvl__decap_4
+   Generating output for cell sky130_fd_sc_hvl__diode_2
+   Generating output for cell sky130_fd_sc_hvl__fill_1
+   Generating output for cell sky130_fd_sc_hvl__fill_2
+   Generating output for cell sky130_fd_sc_hvl__lsbufhv2lv_1
+   Generating output for cell xres_buf
+   Generating output for cell alpha_6
+   Generating output for cell alpha_B
+   Generating output for cell alpha_4
+   Generating output for cell alpha_9
+   Generating output for cell alpha_8
+   Generating output for cell alpha_0
+   Generating output for cell user_id_textblock
+   Generating output for cell sky130_fd_sc_hd__decap_6
+   Generating output for cell sky130_fd_sc_hd__decap_12
+   Generating output for cell sky130_fd_sc_hd__decap_4
+   Generating output for cell sky130_fd_sc_hd__decap_3
+   Generating output for cell sky130_fd_sc_hd__fill_2
+   Generating output for cell sky130_fd_sc_hd__fill_1
+   Generating output for cell sky130_fd_sc_hd__conb_1
+   Generating output for cell sky130_fd_sc_hd__tapvpwrvgnd_1
+   Generating output for cell gpio_defaults_block_1803
+   Generating output for cell sky130_fd_sc_hd__o21bai_1
+   Generating output for cell sky130_fd_sc_hd__nand3b_1
+   Generating output for cell sky130_fd_sc_hd__nand4bb_1
+   Generating output for cell sky130_fd_sc_hd__o2111ai_2
+   Generating output for cell sky130_fd_sc_hd__o31ai_2
+   Generating output for cell sky130_fd_sc_hd__o2bb2ai_1
+   Generating output for cell sky130_fd_sc_hd__a41oi_1
+   Generating output for cell sky130_fd_sc_hd__o211ai_4
+   Generating output for cell sky130_fd_sc_hd__nor3b_2
+   Generating output for cell sky130_fd_sc_hd__xnor2_1
+   Generating output for cell sky130_fd_sc_hd__o2111ai_1
+   Generating output for cell sky130_fd_sc_hd__nand3_1
+   Generating output for cell sky130_fd_sc_hd__a31o_1
+   Generating output for cell sky130_fd_sc_hd__o21a_1
+   Generating output for cell sky130_fd_sc_hd__nand2b_1
+   Generating output for cell sky130_fd_sc_hd__o22a_1
+   Generating output for cell sky130_fd_sc_hd__o21ai_1
+   Generating output for cell sky130_fd_sc_hd__a2bb2o_1
+   Generating output for cell sky130_fd_sc_hd__nor2_1
+   Generating output for cell sky130_fd_sc_hd__a21oi_1
+   Generating output for cell sky130_fd_sc_hd__nor3_2
+   Generating output for cell sky130_fd_sc_hd__nor3_1
+   Generating output for cell sky130_fd_sc_hd__nor4_1
+   Generating output for cell sky130_fd_sc_hd__o31ai_1
+   Generating output for cell sky130_fd_sc_hd__a21o_1
+   Generating output for cell sky130_fd_sc_hd__o31a_1
+   Generating output for cell sky130_fd_sc_hd__mux2_1
+   Generating output for cell sky130_fd_sc_hd__dfxtp_1
+   Generating output for cell sky130_fd_sc_hd__dfstp_1
+   Generating output for cell sky130_fd_sc_hd__dfrtp_4
+   Generating output for cell sky130_fd_sc_hd__dfrtn_1
+   Generating output for cell sky130_fd_sc_hd__dfstp_2
+   Generating output for cell sky130_fd_sc_hd__dfrtp_1
+   Generating output for cell sky130_fd_sc_hd__dlymetal6s2s_1
+   Generating output for cell sky130_fd_sc_hd__buf_12
+   Generating output for cell sky130_fd_sc_hd__o21a_2
+   Generating output for cell sky130_fd_sc_hd__nand2b_2
+   Generating output for cell sky130_fd_sc_hd__o21ai_2
+   Generating output for cell sky130_fd_sc_hd__buf_2
+   Generating output for cell sky130_fd_sc_hd__dfrtp_2
+   Generating output for cell sky130_fd_sc_hd__clkbuf_16
+   Generating output for cell sky130_fd_sc_hd__clkbuf_2
+   Generating output for cell sky130_fd_sc_hd__clkbuf_1
+   Generating output for cell sky130_fd_sc_hd__nor2_2
+   Generating output for cell sky130_fd_sc_hd__diode_2
+   Generating output for cell sky130_fd_sc_hd__inv_4
+   Generating output for cell sky130_fd_sc_hd__clkinv_4
+   Generating output for cell sky130_fd_sc_hd__inv_2
+   Generating output for cell sky130_fd_sc_hd__clkinv_2
+   Generating output for cell sky130_fd_sc_hd__and2_1
+   Generating output for cell sky130_fd_sc_hd__clkbuf_4
+   Generating output for cell sky130_fd_sc_hd__nand2_1
+   Generating output for cell sky130_fd_sc_hd__buf_4
+   Generating output for cell sky130_fd_sc_hd__decap_8
+   Generating output for cell sky130_ef_sc_hd__decap_12
+   Generating output for cell caravel_clocking
+   Generating output for cell sky130_fd_sc_hd__clkbuf_8
+   Generating output for cell buff_flash_clkrst
+   Generating output for cell sky130_fd_sc_hd__nand2_2
+   Generating output for cell sky130_fd_sc_hd__macro_sparecell
+   Generating output for cell sky130_fd_sc_hd__dfbbn_2
+   Generating output for cell sky130_fd_sc_hd__or2_0
+   Generating output for cell sky130_fd_sc_hd__o21ai_4
+   Generating output for cell sky130_fd_sc_hd__and2_0
+   Generating output for cell sky130_fd_sc_hd__mux2_4
+   Generating output for cell sky130_fd_sc_hd__dlygate4sd3_1
+   Generating output for cell sky130_fd_sc_hd__and2b_2
+   Generating output for cell sky130_fd_sc_hd__and3b_2
+   Generating output for cell sky130_fd_sc_hd__and2_2
+   Generating output for cell sky130_fd_sc_hd__buf_16
+   Generating output for cell gpio_logic_high
+   Generating output for cell gpio_control_block
+   Generating output for cell sky130_fd_sc_hd__dfstp_4
+   Generating output for cell sky130_fd_sc_hd__a32o_1
+   Generating output for cell sky130_fd_sc_hd__a22o_1
+   Generating output for cell sky130_fd_sc_hd__a221o_1
+   Generating output for cell sky130_fd_sc_hd__a211o_4
+   Generating output for cell sky130_fd_sc_hd__a21bo_1
+   Generating output for cell sky130_fd_sc_hd__o2bb2a_1
+   Generating output for cell sky130_fd_sc_hd__a221o_2
+   Generating output for cell sky130_fd_sc_hd__a211o_1
+   Generating output for cell sky130_fd_sc_hd__o21ba_1
+   Generating output for cell sky130_fd_sc_hd__and4b_1
+   Generating output for cell sky130_fd_sc_hd__and4bb_1
+   Generating output for cell sky130_fd_sc_hd__and4bb_2
+   Generating output for cell sky130_fd_sc_hd__and3_4
+   Generating output for cell sky130_fd_sc_hd__nand3_4
+   Generating output for cell sky130_fd_sc_hd__a311o_1
+   Generating output for cell sky130_fd_sc_hd__nor2_4
+   Generating output for cell sky130_fd_sc_hd__nor2_8
+   Generating output for cell sky130_fd_sc_hd__o221a_1
+   Generating output for cell sky130_fd_sc_hd__a2111o_1
+   Generating output for cell sky130_fd_sc_hd__nor4_2
+   Generating output for cell sky130_fd_sc_hd__a2111o_4
+   Generating output for cell sky130_fd_sc_hd__nor4_4
+   Generating output for cell sky130_fd_sc_hd__a2111o_2
+   Generating output for cell sky130_fd_sc_hd__nand2b_4
+   Generating output for cell sky130_fd_sc_hd__and3_1
+   Generating output for cell sky130_fd_sc_hd__o32a_1
+   Generating output for cell sky130_fd_sc_hd__a21boi_1
+   Generating output for cell sky130_fd_sc_hd__nand4_1
+   Generating output for cell sky130_fd_sc_hd__o311a_1
+   Generating output for cell sky130_fd_sc_hd__o211a_1
+   Generating output for cell sky130_fd_sc_hd__o2111a_1
+   Generating output for cell sky130_fd_sc_hd__nand4b_1
+   Generating output for cell sky130_fd_sc_hd__a31oi_1
+   Generating output for cell sky130_fd_sc_hd__and4_1
+   Generating output for cell sky130_fd_sc_hd__a41o_1
+   Generating output for cell sky130_fd_sc_hd__and2b_1
+   Generating output for cell sky130_fd_sc_hd__a311oi_2
+   Generating output for cell sky130_fd_sc_hd__o41a_1
+   Generating output for cell sky130_fd_sc_hd__nor3b_1
+   Generating output for cell sky130_fd_sc_hd__a2111oi_1
+   Generating output for cell sky130_fd_sc_hd__nand4b_4
+   Generating output for cell sky130_fd_sc_hd__a31oi_4
+   Generating output for cell sky130_fd_sc_hd__and4b_4
+   Generating output for cell sky130_fd_sc_hd__nand3b_4
+   Generating output for cell sky130_fd_sc_hd__o21a_4
+   Generating output for cell sky130_fd_sc_hd__xor2_1
+   Generating output for cell sky130_fd_sc_hd__nor3_4
+   Generating output for cell sky130_fd_sc_hd__o221a_4
+   Generating output for cell sky130_fd_sc_hd__mux2_8
+   Generating output for cell sky130_fd_sc_hd__o31a_4
+   Generating output for cell sky130_fd_sc_hd__and4_2
+   Generating output for cell sky130_fd_sc_hd__a221oi_1
+   Generating output for cell sky130_fd_sc_hd__a221o_4
+   Generating output for cell sky130_fd_sc_hd__a21oi_4
+   Generating output for cell sky130_fd_sc_hd__a21o_4
+   Generating output for cell sky130_fd_sc_hd__inv_6
+   Generating output for cell sky130_fd_sc_hd__a31o_2
+   Generating output for cell sky130_fd_sc_hd__nand4_2
+   Generating output for cell sky130_fd_sc_hd__and4b_2
+   Generating output for cell sky130_fd_sc_hd__xnor2_2
+   Generating output for cell sky130_fd_sc_hd__a21oi_2
+   Generating output for cell sky130_fd_sc_hd__a211o_2
+   Generating output for cell sky130_fd_sc_hd__and3_2
+   Generating output for cell sky130_fd_sc_hd__o211a_2
+   Generating output for cell sky130_fd_sc_hd__o31a_2
+   Generating output for cell sky130_fd_sc_hd__nand3_2
+   Generating output for cell sky130_fd_sc_hd__a21o_2
+   Generating output for cell sky130_fd_sc_hd__a22o_2
+   Generating output for cell sky130_fd_sc_hd__mux2_2
+   Generating output for cell sky130_fd_sc_hd__and2b_4
+   Generating output for cell sky130_fd_sc_hd__and3b_1
+   Generating output for cell sky130_fd_sc_hd__and3b_4
+   Generating output for cell sky130_fd_sc_hd__and2_4
+   Generating output for cell sky130_fd_sc_hd__nand2_4
+   Generating output for cell sky130_fd_sc_hd__nand2_8
+   Generating output for cell sky130_fd_sc_hd__buf_6
+   Generating output for cell sky130_fd_sc_hd__buf_8
+   Generating output for cell housekeeping
+   Generating output for cell sky130_fd_sc_hd__einvp_1
+   Generating output for cell sky130_fd_sc_hd__clkinv_1
+   Generating output for cell sky130_fd_sc_hd__einvn_4
+   Generating output for cell sky130_fd_sc_hd__einvn_8
+   Generating output for cell sky130_fd_sc_hd__einvp_2
+   Generating output for cell sky130_fd_sc_hd__or2_2
+   Generating output for cell sky130_fd_sc_hd__a32o_2
+   Generating output for cell sky130_fd_sc_hd__o2111a_2
+   Generating output for cell sky130_fd_sc_hd__o22a_2
+   Generating output for cell sky130_fd_sc_hd__o221a_2
+   Generating output for cell sky130_fd_sc_hd__nand3b_2
+   Generating output for cell sky130_fd_sc_hd__a21boi_2
+   Generating output for cell sky130_fd_sc_hd__xor2_2
+   Generating output for cell sky130_fd_sc_hd__o2bb2a_2
+   Generating output for cell sky130_fd_sc_hd__nand4b_2
+   Generating output for cell sky130_fd_sc_hd__o21ba_2
+   Generating output for cell sky130_fd_sc_hd__o32a_2
+   Generating output for cell sky130_fd_sc_hd__clkinv_8
+   Generating output for cell digital_pll
+   Generating output for cell user_id_programming
+   Generating output for cell simple_por
+Reading "sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_3YBPVB".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_TGFUGS".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPBG".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YEUEBV".
+Reading "sky130_fd_pr__nfet_g5v0d10v5_PKVMTM".
+Reading "sky130_fd_pr__pfet_g5v0d10v5_YUHPXE".
+Reading "sky130_fd_sc_hvl__schmittbuf_1".
+Reading "sky130_fd_sc_hvl__buf_8".
+Reading "sky130_fd_sc_hvl__inv_8".
+Reading "sky130_fd_sc_hvl__fill_4".
+Reading "sky130_fd_pr__cap_mim_m3_1_WRT4AW".
+Reading "sky130_fd_pr__cap_mim_m3_2_W5U4AW".
+Reading "sky130_fd_pr__res_xhigh_po_0p69_S5N9F3".
+Reading "simple_por".
+   Generating output for cell mgmt_core_wrapper
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_ef_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_fd_sc_hd__o211a_1".
+Reading "sky130_fd_sc_hd__dfxtp_2".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__mux2_1".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__a21o_2".
+Reading "sky130_fd_sc_hd__a21o_1".
+Reading "sky130_fd_sc_hd__a22o_4".
+Reading "sky130_fd_sc_hd__buf_8".
+Reading "sky130_fd_sc_hd__o21a_2".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__dfxtp_4".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__dlygate4sd3_1".
+Reading "sky130_fd_sc_hd__o21ai_1".
+Reading "sky130_fd_sc_hd__mux4_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__mux4_2".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__and3_2".
+Reading "sky130_fd_sc_hd__nand2_1".
+Reading "sky130_fd_sc_hd__a2bb2o_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__o32a_1".
+Reading "sky130_fd_sc_hd__a2bb2o_2".
+Reading "sky130_fd_sc_hd__o311a_1".
+Reading "sky130_fd_sc_hd__o221a_1".
+Reading "sky130_fd_sc_hd__o31a_1".
+Reading "sky130_fd_sc_hd__o211a_2".
+Reading "sky130_fd_sc_hd__and3_1".
+Reading "sky130_fd_sc_hd__a211oi_1".
+Reading "sky130_fd_sc_hd__and4_4".
+Reading "sky130_fd_sc_hd__and4_1".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__and3b_1".
+Reading "sky130_fd_sc_hd__a211o_4".
+Reading "sky130_fd_sc_hd__a211o_1".
+Reading "sky130_fd_sc_hd__o21ba_1".
+Reading "sky130_fd_sc_hd__a21oi_1".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__nand2_8".
+Reading "sky130_fd_sc_hd__a311o_1".
+Reading "sky130_fd_sc_hd__nor2_2".
+Reading "sky130_fd_sc_hd__a41o_1".
+Reading "sky130_fd_sc_hd__nor3_2".
+Reading "sky130_fd_sc_hd__or4bb_4".
+Reading "sky130_fd_sc_hd__nor3_1".
+Reading "sky130_fd_sc_hd__or4b_4".
+Reading "sky130_fd_sc_hd__or3b_4".
+Reading "sky130_fd_sc_hd__a31o_1".
+Reading "sky130_fd_sc_hd__a211o_2".
+Reading "sky130_fd_sc_hd__or2_2".
+Reading "sky130_fd_sc_hd__a31o_2".
+Reading "sky130_fd_sc_hd__a221o_1".
+Reading "sky130_fd_sc_hd__and4b_4".
+Reading "sky130_fd_sc_hd__and3_4".
+Reading "sky130_fd_sc_hd__mux2_8".
+Reading "sky130_fd_sc_hd__o21ai_2".
+Reading "sky130_fd_sc_hd__and4b_1".
+Reading "sky130_fd_sc_hd__or4b_1".
+Reading "sky130_fd_sc_hd__o211a_4".
+Reading "sky130_fd_sc_hd__a32o_1".
+Reading "sky130_fd_sc_hd__a21boi_1".
+Reading "sky130_fd_sc_hd__o41ai_4".
+Reading "sky130_fd_sc_hd__o31a_2".
+Reading "sky130_fd_sc_hd__nand2_4".
+Reading "sky130_fd_sc_hd__a31oi_4".
+Reading "sky130_fd_sc_hd__and4_2".
+Reading "sky130_fd_sc_hd__nand3_4".
+Reading "sky130_fd_sc_hd__and4b_2".
+Reading "sky130_fd_sc_hd__o41a_4".
+Reading "sky130_fd_sc_hd__and4bb_2".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__and2b_2".
+Reading "sky130_fd_sc_hd__or4bb_1".
+Reading "sky130_fd_sc_hd__a21oi_2".
+Reading "sky130_fd_sc_hd__a221oi_1".
+Reading "sky130_fd_sc_hd__a31oi_1".
+Reading "sky130_fd_sc_hd__xor2_4".
+Reading "sky130_fd_sc_hd__clkbuf_1".
+Reading "sky130_fd_sc_hd__nand3b_4".
+Reading "sky130_fd_sc_hd__nand2_2".
+Reading "sky130_fd_sc_hd__xnor2_1".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__nor2_4".
+Reading "sky130_fd_sc_hd__nand4_4".
+Reading "sky130_fd_sc_hd__a32o_2".
+Reading "sky130_fd_sc_hd__nor4_1".
+Reading "sky130_fd_sc_hd__nand4_1".
+Reading "sky130_fd_sc_hd__xor2_1".
+Reading "sky130_fd_sc_hd__and4bb_4".
+Reading "sky130_fd_sc_hd__a41o_2".
+Reading "sky130_fd_sc_hd__o2bb2a_1".
+Reading "sky130_fd_sc_hd__xnor2_2".
+Reading "sky130_fd_sc_hd__xor2_2".
+Reading "sky130_fd_sc_hd__or2_4".
+Reading "sky130_fd_sc_hd__a2111oi_2".
+Reading "sky130_fd_sc_hd__nor4_4".
+Reading "sky130_fd_sc_hd__mux2_4".
+Reading "sky130_fd_sc_hd__and2b_1".
+Reading "sky130_fd_sc_hd__and2_2".
+Reading "sky130_fd_sc_hd__nor4b_1".
+Reading "sky130_fd_sc_hd__o2111ai_4".
+Reading "sky130_fd_sc_hd__nor4_2".
+Reading "sky130_fd_sc_hd__nand3b_2".
+Reading "sky130_fd_sc_hd__nand3_1".
+Reading "sky130_fd_sc_hd__nand2b_2".
+Reading "sky130_fd_sc_hd__o31ai_1".
+Reading "sky130_fd_sc_hd__o41a_1".
+Reading "sky130_fd_sc_hd__a21bo_1".
+Reading "sky130_fd_sc_hd__o41ai_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__o2111a_1".
+Reading "sky130_fd_sc_hd__o21a_4".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__or3b_2".
+Reading "sky130_fd_sc_hd__nand2b_1".
+Reading "sky130_fd_sc_hd__nor4b_4".
+Reading "sky130_fd_sc_hd__o21bai_1".
+Reading "sky130_fd_sc_hd__nor3_4".
+Reading "sky130_fd_sc_hd__o41a_2".
+Reading "sky130_fd_sc_hd__or4b_2".
+Reading "sky130_fd_sc_hd__a221o_4".
+Reading "sky130_fd_sc_hd__a2111oi_1".
+Reading "sky130_fd_sc_hd__o31a_4".
+Reading "sky130_fd_sc_hd__nor2_8".
+Reading "sky130_fd_sc_hd__clkinv_4".
+Reading "sky130_fd_sc_hd__a221o_2".
+Reading "sky130_fd_sc_hd__o21ai_4".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__a31o_4".
+Reading "sky130_fd_sc_hd__ebufn_4".
+Reading "sky130_fd_sc_hd__dlxtp_1".
+Reading "sky130_fd_sc_hd__dlclkp_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__inv_1".
+Reading "sky130_fd_sc_hd__nor4b_2".
+Reading "sky130_fd_sc_hd__and3b_2".
+Reading "sky130_fd_sc_hd__nor3b_2".
+Reading "RAM256".
+Reading "sky130_fd_sc_hd__a21o_4".
+Reading "sky130_fd_sc_hd__o2111a_4".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__o211ai_4".
+Reading "sky130_fd_sc_hd__o22ai_4".
+Reading "sky130_fd_sc_hd__a221oi_4".
+Reading "sky130_fd_sc_hd__and2b_4".
+Reading "sky130_fd_sc_hd__and3b_4".
+Reading "sky130_fd_sc_hd__and4bb_1".
+Reading "sky130_fd_sc_hd__a21oi_4".
+Reading "sky130_fd_sc_hd__o22ai_1".
+Reading "sky130_fd_sc_hd__inv_4".
+Reading "sky130_fd_sc_hd__a311o_2".
+Reading "sky130_fd_sc_hd__a2111o_1".
+Reading "sky130_fd_sc_hd__o311a_4".
+Reading "sky130_fd_sc_hd__o2111ai_1".
+Reading "sky130_fd_sc_hd__clkinv_8".
+Reading "sky130_fd_sc_hd__nand3_2".
+Reading "sky130_fd_sc_hd__a22oi_1".
+Reading "sky130_fd_sc_hd__nand4b_4".
+Reading "sky130_fd_sc_hd__o221ai_4".
+Reading "sky130_fd_sc_hd__nand4_2".
+Reading "sky130_fd_sc_hd__inv_6".
+Reading "sky130_fd_sc_hd__o2bb2ai_1".
+Reading "sky130_fd_sc_hd__a311oi_4".
+Reading "sky130_fd_sc_hd__o32ai_4".
+Reading "sky130_fd_sc_hd__o211ai_1".
+Reading "sky130_fd_sc_hd__nand4b_1".
+Reading "sky130_fd_sc_hd__o211ai_2".
+Reading "sky130_fd_sc_hd__a22oi_4".
+Reading "sky130_fd_sc_hd__and2_4".
+Reading "sky130_fd_sc_hd__a211oi_4".
+Reading "sky130_fd_sc_hd__nor3b_4".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__a2111oi_4".
+Reading "sky130_fd_sc_hd__nand2b_4".
+Reading "sky130_fd_sc_hd__a2bb2o_4".
+Reading "sky130_fd_sc_hd__o2bb2a_2".
+Reading "sky130_fd_sc_hd__o2111ai_2".
+Reading "sky130_fd_sc_hd__a22oi_2".
+Reading "sky130_fd_sc_hd__nor3b_1".
+Reading "sky130_fd_sc_hd__o2bb2a_4".
+Reading "sky130_fd_sc_hd__o21bai_4".
+Reading "sky130_fd_sc_hd__o311ai_1".
+Reading "sky130_fd_sc_hd__a32oi_2".
+Reading "sky130_fd_sc_hd__o2bb2ai_2".
+Reading "sky130_fd_sc_hd__o311ai_4".
+Reading "sky130_fd_sc_hd__o2bb2ai_4".
+Reading "sky130_fd_sc_hd__o31ai_4".
+Reading "sky130_fd_sc_hd__o221a_2".
+Reading "sky130_fd_sc_hd__o2111a_2".
+Reading "sky130_fd_sc_hd__a31oi_2".
+Reading "sky130_fd_sc_hd__o311a_2".
+Reading "sky130_fd_sc_hd__o22a_4".
+Reading "sky130_fd_sc_hd__a32oi_4".
+Reading "sky130_fd_sc_hd__a211oi_2".
+Reading "sky130_fd_sc_hd__o31ai_2".
+Reading "sky130_fd_sc_hd__o221ai_1".
+Reading "sky130_fd_sc_hd__clkinv_16".
+Reading "sky130_fd_sc_hd__or4bb_2".
+Reading "sky130_fd_sc_hd__a221oi_2".
+Reading "sky130_fd_sc_hd__inv_8".
+Reading "sky130_fd_sc_hd__a311oi_2".
+Reading "sky130_fd_sc_hd__a311oi_1".
+Reading "sky130_fd_sc_hd__o311ai_2".
+Reading "sky130_fd_sc_hd__a32oi_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_2".
+Reading "sky130_fd_sc_hd__a2bb2oi_1".
+Reading "sky130_fd_sc_hd__a2bb2oi_4".
+Reading "sky130_fd_sc_hd__xnor2_4".
+Reading "sky130_fd_sc_hd__inv_12".
+Reading "sky130_fd_sc_hd__a2111o_4".
+Reading "sky130_fd_sc_hd__a32o_4".
+Reading "sky130_fd_sc_hd__o21ba_2".
+Reading "sky130_fd_sc_hd__a41oi_2".
+Reading "sky130_fd_sc_hd__o22ai_2".
+Reading "sky130_fd_sc_hd__o21bai_2".
+Reading "sky130_fd_sc_hd__a41oi_4".
+Reading "sky130_fd_sc_hd__a41o_4".
+Reading "sky130_fd_sc_hd__a311o_4".
+Reading "sky130_fd_sc_hd__o32ai_1".
+Reading "sky130_fd_sc_hd__a21boi_4".
+Reading "sky130_fd_sc_hd__o32ai_2".
+Reading "sky130_fd_sc_hd__a21bo_2".
+Reading "RAM128".
+Reading "mgmt_core_wrapper".
+   Generating output for cell gpio_defaults_block_0403
+   Generating output for cell sky130_fd_sc_hd__inv_8
+   Generating output for cell sky130_fd_sc_hd__dfbbp_1
+   Generating output for cell spare_logic_block
+   Generating output for cell sky130_fd_sc_hd__bufbuf_8
+   Generating output for cell sky130_fd_sc_hvl__conb_1
+   Generating output for cell mgmt_protect_hv
+   Generating output for cell mprj_logic_high
+   Generating output for cell mprj2_logic_high
+   Generating output for cell sky130_fd_sc_hd__inv_12
+   Generating output for cell mgmt_protect
+   Generating output for cell gpio_defaults_block_0801
+   Generating output for cell gpio_control_power_routing_top
+   Generating output for cell gpio_control_power_routing_right
+   Generating output for cell gpio_control_power_routing
+   Generating output for cell caravel_power_routing
+   Generating output for cell user_project_wrapper
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_12".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_11".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_15".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w0_740_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_360_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_28".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_29".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_13".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_14".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv".
+Reading "sky130_fd_bd_sram__openram_dp_nand3_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec".
+Reading "sky130_fd_bd_sram__openram_dp_nand2_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w7_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w1_120_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sli_dactive".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m1_w0_550_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_22".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_21".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_23".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w2_880_sli_dli".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_17".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_20".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m22_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m18_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m7_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m7_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_7".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_19".
+Reading "sky130_fd_bd_sram__openram_dp_cell".
+Reading "sky130_fd_bd_sram__openram_dp_cell_replica".
+Reading "sky130_fd_bd_sram__openram_dp_cell_dummy".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_col".
+Reading "sky130_fd_bd_sram__openram_dp_cell_cap_row".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_0".
+Reading "sky130_fd_bd_sram__openram_write_driver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_1".
+Reading "sky130_fd_bd_sram__openram_sense_amp".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_24".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_25".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_26".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_27".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode3x8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w1_680_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m14_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m14_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m41_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m41_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m2_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m2_w1_260_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m5_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m15_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m15_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m42_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m42_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_15".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m1_w0_740_sactive_dactive".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m3_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m3_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m8_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pmos_m24_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_nmos_m24_w2_000_sli_dli_da_p".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_3".
+Reading "sky130_fd_bd_sram__openram_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_bitcell_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_column".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_column_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dummy_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_cap_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_cap_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_9".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_write_driver_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_write_mask_and_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_precharge_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_sense_amp_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_column_mux_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_decoder".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wordline_driver_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_18".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_19".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_20".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_7".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_8".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_9".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_10".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_5".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_11".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_12".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_13".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_14".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_replica_bitcell_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_data".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_data_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_address".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_port_address_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_hierarchical_predecode2x4_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_6".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_2".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_delay_chain".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_dff_buf_array".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_32".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_33".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_bank".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_4".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_r".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_5".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_control_logic_rw".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_data_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_col_addr_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_cr_3".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_wmask_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_row_addr_dff".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_38".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8_contact_39".
+Reading "sky130_fd_sc_hd__a22o_2".
+Reading "sky130_fd_sc_hd__a22o_1".
+Reading "sky130_fd_sc_hd__or3b_1".
+Reading "sky130_fd_sc_hd__clkinv_2".
+Reading "sky130_fd_sc_hd__nor2_1".
+Reading "sky130_fd_sc_hd__clkbuf_8".
+Reading "sky130_fd_sc_hd__clkbuf_2".
+Reading "sky130_fd_sc_hd__and2_1".
+Reading "sky130_fd_sc_hd__or3_1".
+Reading "sky130_fd_sc_hd__or2_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s18_2".
+Reading "sky130_fd_sc_hd__or4_1".
+Reading "sky130_fd_sc_hd__inv_2".
+Reading "sky130_fd_sc_hd__o22a_2".
+Reading "sky130_fd_sc_hd__o22a_1".
+Reading "sky130_fd_sc_hd__o21a_1".
+Reading "sky130_fd_sc_hd__buf_12".
+Reading "sky130_fd_sc_hd__dfxtp_1".
+Reading "sky130_fd_sc_hd__clkbuf_16".
+Reading "sky130_sram_2kbyte_1rw1r_32x512_8".
+Reading "sky130_fd_sc_hd__buf_2".
+Reading "sky130_fd_sc_hd__buf_1".
+Reading "sky130_fd_sc_hd__conb_1".
+Reading "sky130_fd_sc_hd__nand3b_1".
+Reading "sky130_fd_sc_hd__clkdlybuf4s15_2".
+Reading "sky130_fd_sc_hd__dlymetal6s2s_1".
+Reading "sky130_fd_sc_hd__diode_2".
+Reading "sky130_fd_sc_hd__fill_2".
+Reading "sky130_fd_sc_hd__buf_4".
+Reading "sky130_fd_sc_hd__clkbuf_4".
+Reading "sky130_fd_sc_hd__clkdlybuf4s25_1".
+Reading "sky130_fd_sc_hd__tapvpwrvgnd_1".
+Reading "sky130_fd_sc_hd__decap_6".
+Reading "sky130_fd_sc_hd__decap_8".
+Reading "sky130_fd_sc_hd__decap_12".
+Reading "sky130_fd_sc_hd__buf_6".
+Reading "sky130_fd_sc_hd__mux2_2".
+Reading "sky130_fd_sc_hd__decap_3".
+Reading "sky130_fd_sc_hd__fill_1".
+Reading "sky130_fd_sc_hd__decap_4".
+Reading "user_project_wrapper".
+   Generating output for cell sky130_ef_io__com_bus_slice_20um
+   Generating output for cell sky130_fd_io__corner_bus_overlay
+   Generating output for cell sky130_ef_io__corner_pad
+   Generating output for cell sky130_ef_io__connect_vcchib_vccd_and_vswitch_vddio_slice_20um
+   Generating output for cell sky130_ef_io__com_bus_slice_1um
+   Generating output for cell sky130_ef_io__com_bus_slice_5um
+   Generating output for cell sky130_ef_io__com_bus_slice_10um
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_5595914180851
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808664
+   Generating output for cell sky130_fd_io__sio_clamp_pcap_4x5
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808680
+   Generating output for cell sky130_fd_io__esd_rcclamp_nfetcap
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808336
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808666
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808665
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808678
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808679
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808677
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180839
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808667
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808671
+   Generating output for cell sky130_fd_pr__hvdftpl1s2__example_55959141808672
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808673
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808663
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808660
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808670
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808668
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808675
+   Generating output for cell sky130_fd_pr__hvdftpl1s2__example_55959141808676
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808674
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808662
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808661
+   Generating output for cell sky130_fd_pr__via_l1m1__example_559591418084
+   Generating output for cell sky130_fd_pr__genrivetdlring__example_559591418082
+   Generating output for cell sky130_fd_pr__gendlring__example_559591418081
+   Generating output for cell sky130_fd_pr__padplhp__example_559591418080
+   Generating output for cell sky130_fd_io__pad_esd
+   Generating output for cell sky130_fd_io__com_bus_slice
+   Generating output for cell sky130_fd_io__com_bus_hookup
+   Generating output for cell sky130_fd_io__com_busses_esd
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808669
+   Generating output for cell sky130_fd_io__top_ground_hvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vssa_hvc
+   Generating output for cell sky130_ef_io__hvc_vdda_overlay
+   Generating output for cell sky130_ef_io__vssa_hvc_clamped_pad
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808719
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808767
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808765
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808764
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808720
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808718
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808717
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808716
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808243
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808723
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808722
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180890
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808721
+   Generating output for cell sky130_fd_io__xres_inv_hysv2
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180838
+   Generating output for cell sky130_fd_io__tk_tie_r_out_esd
+   Generating output for cell sky130_fd_io__res250_sub_small
+   Generating output for cell sky130_fd_io__res250only_small
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808264
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180858
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180833
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180864
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808715
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180863
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180862
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_55959141808288
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180859
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808289
+   Generating output for cell sky130_fd_io__com_res_weak_v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808274
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808728
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808727
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808726
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808725
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808724
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808554
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808553
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808552
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808551
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808402
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808350
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808261
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808260
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808259
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808400
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808372
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808326
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808290
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808128
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808127
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180897
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180819
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808555
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808147
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808157
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808156
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808155
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808154
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808153
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808152
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808151
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808150
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808149
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808148
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808158
+   Generating output for cell sky130_fd_io__signal_5_sym_hv_local_5term
+   Generating output for cell sky130_fd_io__gpio_buf_localesdv2
+   Generating output for cell sky130_fd_pr__via_pol1__example_559591418083
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808137
+   Generating output for cell sky130_fd_pr__dfl1sd__example_559591418086
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808371
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808370
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808369
+   Generating output for cell sky130_fd_io__hvsbt_inv_x1
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808316
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808421
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808385
+   Generating output for cell sky130_fd_pr__dfl1sd__example_559591418088
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808422
+   Generating output for cell sky130_fd_io__hvsbt_inv_x2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808612
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808616
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808615
+   Generating output for cell sky130_fd_io__hvsbt_inv_x4
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_5595914180848
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180849
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808766
+   Generating output for cell sky130_fd_pr__via_m2m3__example_55959141808714
+   Generating output for cell sky130_fd_pr__via_pol1_centered__example_559591418081
+   Generating output for cell sky130_fd_io__tk_em2s_cdns_55959141808652
+   Generating output for cell sky130_fd_io__tk_em2o_cdns_55959141808653
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_5595914180812
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_5595914180811
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418086
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418084
+   Generating output for cell sky130_fd_pr__hvdftpm1s2__example_55959141808659
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808658
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808657
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808202
+   Generating output for cell sky130_fd_io__pfet_con_diff_wo_abt_270_xres4v2
+   Generating output for cell sky130_fd_io__gpio_pudrvr_strong_axres4v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808273
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808740
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808739
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808738
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808737
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808736
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808735
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808734
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808733
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808732
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808731
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808730
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808752
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808751
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808750
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808749
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808748
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808747
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808746
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808745
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808744
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808743
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808742
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808741
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808324
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808270
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808187
+   Generating output for cell sky130_fd_pr__res_generic_nd__example_55959141808755
+   Generating output for cell sky130_fd_pr__res_generic_nd__example_55959141808754
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808338
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808337
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808763
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808700
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808559
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808762
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808729
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808758
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808757
+   Generating output for cell sky130_fd_io__xres_tk_p_em1o_cdns_55959141808756
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808761
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808760
+   Generating output for cell sky130_fd_io__xres_tk_p_em1c_cdns_55959141808759
+   Generating output for cell sky130_fd_io__xres_p_em1c_cdns_55959141808753
+   Generating output for cell sky130_fd_io__xres2v2_rcfilter_lpfv2
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180860
+   Generating output for cell sky130_fd_pr__res_bent_po__example_5595914180861
+   Generating output for cell sky130_fd_io__com_res_weak_bentbigres
+   Generating output for cell sky130_fd_io__com_res_weak
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180857
+   Generating output for cell sky130_fd_pr__hvdftpm1s2__example_55959141808649
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808651
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808650
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808648
+   Generating output for cell sky130_fd_pr__hvdftpl1s__example_55959141808646
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808647
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808645
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808378
+   Generating output for cell sky130_fd_io__nfet_con_diff_wo_abt_270_xres4v2
+   Generating output for cell sky130_fd_io__gpio_pddrvr_strong_xres4v2
+   Generating output for cell sky130_fd_io__top_gpio_pad
+   Generating output for cell sky130_fd_io__com_busses
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808768
+   Generating output for cell sky130_fd_pr__res_bent_nd__example_55959141808769
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808787
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808786
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808782
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808785
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808449
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808784
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808452
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808783
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808781
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808780
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808779
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808233
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180827
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808778
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_5595914180835
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808777
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808776
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808775
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808242
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808774
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_5595914180829
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808773
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808237
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808772
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808771
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808770
+   Generating output for cell sky130_fd_io__tap_1
+   Generating output for cell sky130_fd_io__inv_1
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_559591418085
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_559591418089
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_559591418087
+   Generating output for cell sky130_fd_io__hvsbt_nand2
+   Generating output for cell sky130_fd_io__xres4v2_in_buf
+   Generating output for cell sky130_fd_io__top_xres4v2
+   Generating output for cell sky130_fd_sc_hd__fill_4
+   Generating output for cell sky130_fd_sc_hd__fill_8
+   Generating output for cell constant_block
+   Generating output for cell sky130_fd_io__res75only_small
+   Generating output for cell sky130_fd_io__com_bus_slice_m4
+   Generating output for cell sky130_fd_io__overlay_gpiov2_m4
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808420
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808419
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808418
+   Generating output for cell sky130_fd_io__hvsbt_nor
+   Generating output for cell sky130_fd_io__hvsbt_nand2v2
+   Generating output for cell sky130_fd_io__gpiov2_ictl_logic
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808190
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808611
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180811
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808549
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808548
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808191
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808189
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808517
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808518
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808610
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808609
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180815
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180816
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808608
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808604
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808533
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808529
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180884
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808230
+   Generating output for cell sky130_fd_io__gpiov2_in_buf
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808537
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808106
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808481
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808607
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808504
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808600
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808550
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808528
+   Generating output for cell sky130_fd_io__gpiov2_ipath_hvls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808595
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180825
+   Generating output for cell sky130_fd_io__gpiov2_inbuf_lvinv_x1
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180812
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808599
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808598
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808597
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808596
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808547
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808546
+   Generating output for cell sky130_fd_io__gpiov2_ipath_lvls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808606
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180875
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808605
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808540
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808603
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808602
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808601
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808535
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808527
+   Generating output for cell sky130_fd_io__gpiov2_vcchib_in_buf
+   Generating output for cell sky130_fd_io__gpiov2_ibuf_se
+   Generating output for cell sky130_fd_io__gpiov2_buf_localesd
+   Generating output for cell sky130_fd_io__gpiov2_ipath
+   Generating output for cell sky130_fd_io__tk_em2s_cdns_55959141808438
+   Generating output for cell sky130_fd_io__tk_em2o_cdns_55959141808439
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180882
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180881
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180880
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_5595914180879
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808430
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180823
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_5595914180822
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_5595914180813
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808624
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808510
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808623
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808622
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808621
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808620
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808619
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808618
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808116
+   Generating output for cell sky130_fd_io__com_ctl_lsv2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808394
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808298
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808440
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180878
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808434
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808435
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808433
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808432
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808102
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808431
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808115
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808429
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808428
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808100
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808140
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808427
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808426
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808280
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808425
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808424
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808423
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808306
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808383
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808382
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808380
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808379
+   Generating output for cell sky130_fd_io__com_ctl_ls_v2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808617
+   Generating output for cell sky130_fd_io__com_ctl_ls_en_1_v2
+   Generating output for cell sky130_fd_io__com_ctl_ls_1v2
+   Generating output for cell sky130_fd_io__gpiov2_ctl_lsbank
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808614
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808613
+   Generating output for cell sky130_fd_io__hvsbt_inv_x8v2
+   Generating output for cell sky130_fd_io__hvsbt_inv_x8
+   Generating output for cell sky130_fd_io__com_ctl_ls
+   Generating output for cell sky130_fd_io__com_ctl_hldv2
+   Generating output for cell sky130_fd_io__gpiov2_ctl
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808178
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808591
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808594
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808593
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808488
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808592
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808586
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808122
+   Generating output for cell sky130_fd_pr__dfl1sd__example_55959141808123
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808477
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808476
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808475
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808589
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808570
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808569
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_lshv2hv
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808588
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808587
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_lshv2hv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808590
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808460
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808468
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808467
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808466
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808465
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808464
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808463
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_ls
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_inv_1
+   Generating output for cell sky130_fd_io__gpiov2_amux_ls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808573
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808572
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808579
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808578
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808577
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808576
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808566
+   Generating output for cell sky130_fd_pr__dfl1sd__example_5595914180868
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_5595914180869
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808565
+   Generating output for cell sky130_fd_io__gpiov2_amx_pucsd_inv
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808441
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808571
+   Generating output for cell sky130_fd_io__gpiov2_amx_inv4
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808567
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808568
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_lshv2hv
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_lshv2hv2
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808581
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808580
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808278
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808462
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808583
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808582
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808498
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808497
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808496
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr_ls
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808574
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808575
+   Generating output for cell sky130_fd_io__amx_inv1
+   Generating output for cell sky130_fd_io__gpiov2_amux_drvr
+   Generating output for cell sky130_fd_io__xor2_1
+   Generating output for cell sky130_fd_io__nor2_1
+   Generating output for cell sky130_fd_io__nand2_1
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808200
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808457
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808451
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808450
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_5595914180894
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808584
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808455
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808447
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808445
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808248
+   Generating output for cell sky130_fd_io__gpiov2_amux_nand5
+   Generating output for cell sky130_fd_pr__dfm1sd__example_55959141808258
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808585
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808446
+   Generating output for cell sky130_fd_io__gpiov2_amux_nand4
+   Generating output for cell sky130_fd_io__gpiov2_amux_decoder
+   Generating output for cell sky130_fd_io__gpiov2_amux_ctl_logic
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808563
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808564
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808562
+   Generating output for cell sky130_fd_pr__hvdfm1sd2__example_55959141808251
+   Generating output for cell sky130_fd_pr__dfm1sd2__example_55959141808561
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808560
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808558
+   Generating output for cell sky130_fd_io__amux_switch_1v2b
+   Generating output for cell sky130_fd_io__gpiov2_amux
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808416
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808417
+   Generating output for cell sky130_fd_io__hvsbt_xorv2
+   Generating output for cell sky130_fd_io__hvsbt_xor
+   Generating output for cell sky130_fd_io__com_ctl_ls_octl
+   Generating output for cell sky130_fd_io__gpiov2_octl
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808267
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808266
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808642
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808184
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808141
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808643
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808183
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808139
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808636
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808635
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808634
+   Generating output for cell sky130_fd_pr__dfl1sd2__example_55959141808633
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808632
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808630
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808638
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808637
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong_nr3
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808629
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808628
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808627
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808626
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808354
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808631
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong_nr2
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180888
+   Generating output for cell sky130_fd_io__gpiov2_octl_mux
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808322
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808321
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808320
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808294
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808325
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808323
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808291
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808641
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808640
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808639
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808348
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808347
+   Generating output for cell sky130_fd_pr__hvdfl1sd__example_55959141808194
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808346
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808345
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808344
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808343
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808334
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808333
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808332
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808331
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808330
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808329
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808304
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808134
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808328
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808327
+   Generating output for cell sky130_fd_io__com_pdpredrvr_pbiasv2
+   Generating output for cell sky130_fd_io__gpiov2_pdpredrvr_strong
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808272
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808271
+   Generating output for cell sky130_fd_pr__hvdfl1sd2__example_55959141808143
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808142
+   Generating output for cell sky130_fd_pr__model__pfet_highvoltage__example_55959141808101
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_55959141808144
+   Generating output for cell sky130_fd_pr__model__nfet_highvoltage__example_5595914180899
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808275
+   Generating output for cell sky130_fd_pr__via_m1m2__example_55959141808276
+   Generating output for cell sky130_fd_pr__res_generic_po__example_55959141808286
+   Generating output for cell sky130_fd_pr__res_generic_po__example_55959141808285
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808284
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808283
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808644
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808287
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808282
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808281
+   Generating output for cell sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a
+   Generating output for cell sky130_fd_io__gpiov2_pupredrvr_strong_nd2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808297
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808296
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808295
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808293
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808292
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808300
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808299
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808319
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808318
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808317
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808315
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808314
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808313
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808312
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808311
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808310
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808309
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808308
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808307
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808305
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808303
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_55959141808301
+   Generating output for cell sky130_fd_io__tk_em1o_cdns_55959141808302
+   Generating output for cell sky130_fd_io__feascom_pupredrvr_nbiasv2
+   Generating output for cell sky130_fd_io__gpio_pupredrvr_strongv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808361
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808360
+   Generating output for cell sky130_fd_io__feas_com_pupredrvr_weak
+   Generating output for cell sky130_fd_pr__via_pol1__example_5595914180854
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808363
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808362
+   Generating output for cell sky130_fd_io__com_pupredrvr_strong_slowv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808366
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808365
+   Generating output for cell sky130_fd_io__com_pdpredrvr_weakv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808364
+   Generating output for cell sky130_fd_io__com_pdpredrvr_strong_slowv2
+   Generating output for cell sky130_fd_io__gpiov2_obpredrvr
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808368
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808625
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808373
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808374
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808393
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808392
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808391
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808390
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808389
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808388
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808387
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808386
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808384
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808381
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808377
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808376
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808375
+   Generating output for cell sky130_fd_io__gpio_dat_lsv2
+   Generating output for cell sky130_fd_io__gpio_dat_ls_1v2
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808398
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808397
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808396
+   Generating output for cell sky130_fd_pr__via_pol1__example_55959141808395
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808401
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808399
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808269
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808410
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808409
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808408
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808407
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808406
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808405
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808404
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808403
+   Generating output for cell sky130_fd_io__com_cclat
+   Generating output for cell sky130_fd_io__com_opath_datoev2
+   Generating output for cell sky130_fd_io__gpiov2_octl_dat
+   Generating output for cell sky130_fd_pr__via_pol1_centered__example_559591418080
+   Generating output for cell sky130_fd_pr__via_l1m1__example_5595914180832
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180856
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180855
+   Generating output for cell sky130_fd_pr__res_generic_po__example_5595914180853
+   Generating output for cell sky130_fd_io__tk_em1s_cdns_5595914180852
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418083
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418082
+   Generating output for cell sky130_fd_io__nfet_con_diff_wo_abt_270v2
+   Generating output for cell sky130_fd_io__gpiov2_pddrvr_strong
+   Generating output for cell sky130_fd_pr__via_l1m1_centered__example_559591418085
+   Generating output for cell sky130_fd_io__pfet_con_diff_wo_abt_270v2
+   Generating output for cell sky130_fd_io__gpio_pudrvr_strongv2
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_5595914180850
+   Generating output for cell sky130_fd_io__gpio_pddrvr_weakv2
+   Generating output for cell sky130_fd_io__gpio_pddrvr_strong_slowv2
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808656
+   Generating output for cell sky130_fd_pr__hvdfm1sd__example_55959141808655
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808654
+   Generating output for cell sky130_fd_io__com_pudrvr_weakv2
+   Generating output for cell sky130_fd_io__com_pudrvr_strong_slowv2
+   Generating output for cell sky130_fd_io__gpio_odrvr_subv2
+   Generating output for cell sky130_fd_io__gpio_odrvrv2
+   Generating output for cell sky130_fd_io__gpio_opathv2
+   Generating output for cell sky130_fd_io__top_gpiov2
+   Generating output for cell sky130_fd_io__overlay_gpiov2
+   Generating output for cell sky130_ef_io__gpiov2_pad
+   Generating output for cell sky130_ef_io__gpiov2_pad_wrapped
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808691
+   Generating output for cell sky130_fd_pr__pfet_01v8__example_55959141808687
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808684
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808686
+   Generating output for cell sky130_fd_pr__tpl1__example_55959141808685
+   Generating output for cell sky130_fd_pr__via_l1m1__example_55959141808683
+   Generating output for cell sky130_fd_io__gnd2gnd_strap
+   Generating output for cell sky130_fd_io__gnd2gnd_tap
+   Generating output for cell sky130_fd_io__gnd2gnd_diff
+   Generating output for cell sky130_fd_io__gnd2gnd_sub_dnwl
+   Generating output for cell sky130_fd_io__gnd2gnd_120x2_lv_isosub
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808690
+   Generating output for cell sky130_fd_pr__dftpl1s2__example_55959141808702
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808705
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808682
+   Generating output for cell sky130_fd_pr__dftpl1s2__example_55959141808694
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808693
+   Generating output for cell sky130_fd_pr__dfl1__example_55959141808681
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808688
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808699
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808698
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808697
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808696
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808695
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808704
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808703
+   Generating output for cell sky130_fd_pr__nfet_01v8__example_55959141808701
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808689
+   Generating output for cell sky130_fd_pr__res_bent_po__example_55959141808692
+   Generating output for cell sky130_fd_io__top_ground_lvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vssd_lvc
+   Generating output for cell sky130_ef_io__lvc_vccdx_overlay
+   Generating output for cell sky130_ef_io__vssd_lvc_clamped_pad
+   Generating output for cell sky130_fd_io__overlay_vssio_hvc
+   Generating output for cell sky130_ef_io__hvc_vssio_overlay
+   Generating output for cell sky130_ef_io__vssio_hvc_clamped_pad
+   Generating output for cell sky130_fd_io__hvc_clampv2
+   Generating output for cell sky130_fd_io__top_power_hvc_wpadv2
+   Generating output for cell sky130_fd_io__overlay_vdda_hvc
+   Generating output for cell sky130_ef_io__vdda_hvc_clamped_pad
+   Generating output for cell sky130_fd_io__top_power_lvc_wpad
+   Generating output for cell sky130_fd_io__overlay_vccd_lvc
+   Generating output for cell sky130_ef_io__vccd_lvc_clamped_pad
+   Generating output for cell sky130_ef_io__disconnect_vdda_slice_5um
+   Generating output for cell sky130_fd_io__overlay_vddio_hvc
+   Generating output for cell sky130_ef_io__hvc_vddio_overlay
+   Generating output for cell sky130_ef_io__vddio_hvc_clamped_pad
+   Generating output for cell chip_io_gpio_connects
+   Generating output for cell sky130_ef_io__lvc_vccdy_overlay
+   Generating output for cell sky130_ef_io__vssd_lvc_clamped3_pad
+   Generating output for cell sky130_ef_io__vccd_lvc_clamped3_pad
+   Generating output for cell chip_io
+   Generating output for cell gpio_signal_buffering
+   Generating output for cell caravel
diff --git a/tapeout/logs/tools.info b/tapeout/logs/tools.info
new file mode 100644
index 0000000..b630e4e
--- /dev/null
+++ b/tapeout/logs/tools.info
@@ -0,0 +1,2 @@
+KLayout: 0.27.12
+Magic: 8.3.339
\ No newline at end of file
diff --git a/tapeout/logs/uncompress.log b/tapeout/logs/uncompress.log
new file mode 100644
index 0000000..d21177f
--- /dev/null
+++ b/tapeout/logs/uncompress.log
@@ -0,0 +1,3 @@
+make: Nothing to be done for `check-env'.
+gds/user_project_wrapper.gds.gz -> gds/user_project_wrapper.gds
+All files are uncompressed!
diff --git a/tapeout/outputs/gds/caravel_0006b498.gds.gz.00.split b/tapeout/outputs/gds/caravel_0006b498.gds.gz.00.split
new file mode 100644
index 0000000..5bdf7bb
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0006b498.gds.gz.00.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0006b498.gds.gz.01.split b/tapeout/outputs/gds/caravel_0006b498.gds.gz.01.split
new file mode 100644
index 0000000..5b67fbb
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0006b498.gds.gz.01.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0006b498.gds.gz.02.split b/tapeout/outputs/gds/caravel_0006b498.gds.gz.02.split
new file mode 100644
index 0000000..412e8ce
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0006b498.gds.gz.02.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0006b498.gds.gz.03.split b/tapeout/outputs/gds/caravel_0006b498.gds.gz.03.split
new file mode 100644
index 0000000..4b6c0de
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0006b498.gds.gz.03.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0006b498.gds.gz.04.split b/tapeout/outputs/gds/caravel_0006b498.gds.gz.04.split
new file mode 100644
index 0000000..9416e24
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0006b498.gds.gz.04.split
Binary files differ
diff --git a/tapeout/outputs/gds/caravel_0006b498.gds.gz.05.split b/tapeout/outputs/gds/caravel_0006b498.gds.gz.05.split
new file mode 100644
index 0000000..cbbd80e
--- /dev/null
+++ b/tapeout/outputs/gds/caravel_0006b498.gds.gz.05.split
Binary files differ
diff --git a/tapeout/outputs/klayout_beol_report.xml b/tapeout/outputs/klayout_beol_report.xml
new file mode 100644
index 0000000..2547bef
--- /dev/null
+++ b/tapeout/outputs/klayout_beol_report.xml
@@ -0,0 +1,447 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/sky130A_mr.drc'</generator>
+ <top-cell>caravel_0006b498</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>li.1</name>
+   <description>li.1 : min. li width : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.3</name>
+   <description>li.3 : min. li spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.5</name>
+   <description>li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>li.6</name>
+   <description>li.6 : min. li area : 0.0561um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1</name>
+   <description>ct.1: non-ring mcon should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_a</name>
+   <description>ct.1_a : minimum width of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.1_b</name>
+   <description>ct.1_b : maximum length of mcon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.2</name>
+   <description>ct.2 : min. mcon spacing : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ct.4</name>
+   <description>ct.4 : mcon should covered by li</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.1</name>
+   <description>m1.1 : min. m1 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.2</name>
+   <description>m1.2 : min. m1 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.3ab</name>
+   <description>m1.3ab : min. 3um.m1 spacing m1 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>791_m1.4</name>
+   <description>791_m1.4 : min. m1 enclosure of mcon : 0.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4</name>
+   <description>m1.4 : mcon periphery must be enclosed by m1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a</name>
+   <description>m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.4a_a</name>
+   <description>m1.4a_a : mcon periph must be enclosed by met1 for specific cells</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.6</name>
+   <description>m1.6 : min. m1 area : 0.083um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.7</name>
+   <description>m1.7 : min. m1 with holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m1.5</name>
+   <description>m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a</name>
+   <description>via.1a : via outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_a</name>
+   <description>via.1a_a : min. width of via outside of moduleCut : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.1a_b</name>
+   <description>via.1a_b : maximum length of via : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.2</name>
+   <description>via.2 : min. via spacing : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a</name>
+   <description>via.4a : min. m1 enclosure of 0.15um via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.4a_a</name>
+   <description>via.4a_a : 0.15um via must be enclosed by met1</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via.5a</name>
+   <description>via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.1</name>
+   <description>m2.1 : min. m2 width : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.2</name>
+   <description>m2.2 : min. m2 spacing : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.3ab</name>
+   <description>m2.3ab : min. 3um.m2 spacing m2 : 0.28um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.6</name>
+   <description>m2.6 : min. m2 area : 0.0676um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.7</name>
+   <description>m2.7 : min. m2 holes area : 0.14um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4</name>
+   <description>m2.4 : min. m2 enclosure of via : 0.055um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.4_a</name>
+   <description>m2.4_a : via in periphery must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m2.5</name>
+   <description>m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a</name>
+   <description>via2.1a : via2 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_a</name>
+   <description>via2.1a_a : min. width of via2 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.1a_b</name>
+   <description>via2.1a_b : maximum length of via2 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.2</name>
+   <description>via2.2 : min. via2 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4</name>
+   <description>via2.4 : min. m2 enclosure of via2 : 0.04um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.4_a</name>
+   <description>via2.4_a : via must be enclosed by met2</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via2.5</name>
+   <description>via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.1</name>
+   <description>m3.1 : min. m3 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.2</name>
+   <description>m3.2 : min. m3 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.3cd</name>
+   <description>m3.3cd : min. 3um.m3 spacing m3 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4</name>
+   <description>m3.4 : min. m3 enclosure of via2 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m3.4_a</name>
+   <description>m3.4_a : via2 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1</name>
+   <description>via3.1 : via3 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_a</name>
+   <description>via3.1_a : min. width of via3 outside of moduleCut : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.1_b</name>
+   <description>via3.1_b : maximum length of via3 : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.2</name>
+   <description>via3.2 : min. via3 spacing : 0.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4</name>
+   <description>via3.4 : min. m3 enclosure of via3 : 0.06um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.4_a</name>
+   <description>via3.4_a : non-ring via3 must be enclosed by met3</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via3.5</name>
+   <description>via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.1</name>
+   <description>m4.1 : min. m4 width : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.2</name>
+   <description>m4.2 : min. m4 spacing : 0.3um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.4a</name>
+   <description>m4.4a : min. m4 area : 0.240um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.5ab</name>
+   <description>m4.5ab : min. 3um.m4 spacing m4 : 0.4um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3</name>
+   <description>m4.3 : min. m4 enclosure of via3 : 0.065um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m4.3_a</name>
+   <description>m4.3_a : via3 must be enclosed by met4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1</name>
+   <description>via4.1 : via4 outside of moduleCut should be rectangular</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_a</name>
+   <description>via4.1_a : min. width of via4 outside of moduleCut : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.1_b</name>
+   <description>via4.1_b : maximum length of via4 : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.2</name>
+   <description>via4.2 : min. via4 spacing : 0.8um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4</name>
+   <description>via4.4 : min. m4 enclosure of via4 : 0.19um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>via4.4_a</name>
+   <description>via4.4_a : m4 must enclose all via4</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.1</name>
+   <description>m5.1 : min. m5 width : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.2</name>
+   <description>m5.2 : min. m5 spacing : 1.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3</name>
+   <description>m5.3 : min. m5 enclosure of via4 : 0.31um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.3_a</name>
+   <description>m5.3_a : via must be enclosed by m5</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>m5.4</name>
+   <description>m5.4 : min. m5 area : 4.0um²</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>pad.2</name>
+   <description>pad.2 : min. pad spacing : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0006b498</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_beol_report.xml.summary b/tapeout/outputs/klayout_beol_report.xml.summary
new file mode 100644
index 0000000..79b5c11
--- /dev/null
+++ b/tapeout/outputs/klayout_beol_report.xml.summary
@@ -0,0 +1,72 @@
+       0 791_m1.4 : min. m1 enclosure of mcon : 0.03um
+       0 ct.1: non-ring mcon should be rectangular
+       0 ct.1_a : minimum width of mcon : 0.17um
+       0 ct.1_b : maximum length of mcon : 0.17um
+       0 ct.2 : min. mcon spacing : 0.19um
+       0 ct.4 : mcon should covered by li
+       0 li.1 : min. li width : 0.17um
+       0 li.3 : min. li spacing : 0.17um
+       0 li.5 : min. li enclosure of licon of 2 adjacent edges : 0.08um
+       0 li.6 : min. li area : 0.0561um²
+       0 m1.1 : min. m1 width : 0.14um
+       0 m1.2 : min. m1 spacing : 0.14um
+       0 m1.3ab : min. 3um.m1 spacing m1 : 0.28um
+       0 m1.4 : mcon periphery must be enclosed by m1
+       0 m1.4a : min. m1 enclosure of mcon for specific cells : 0.005um
+       0 m1.4a_a : mcon periph must be enclosed by met1 for specific cells
+       0 m1.5 : min. m1 enclosure of mcon of 2 adjacent edges : 0.06um
+       0 m1.6 : min. m1 area : 0.083um²
+       0 m1.7 : min. m1 with holes area : 0.14um²
+       0 m2.1 : min. m2 width : 0.14um
+       0 m2.2 : min. m2 spacing : 0.14um
+       0 m2.3ab : min. 3um.m2 spacing m2 : 0.28um
+       0 m2.4 : min. m2 enclosure of via : 0.055um
+       0 m2.4_a : via in periphery must be enclosed by met2
+       0 m2.5 : min. m2 enclosure of via of 2 adjacent edges : 0.085um
+       0 m2.6 : min. m2 area : 0.0676um²
+       0 m2.7 : min. m2 holes area : 0.14um²
+       0 m3.1 : min. m3 width : 0.3um
+       0 m3.2 : min. m3 spacing : 0.3um
+       0 m3.3cd : min. 3um.m3 spacing m3 : 0.4um
+       0 m3.4 : min. m3 enclosure of via2 : 0.065um
+       0 m3.4_a : via2 must be enclosed by met3
+       0 m4.1 : min. m4 width : 0.3um
+       0 m4.2 : min. m4 spacing : 0.3um
+       0 m4.3 : min. m4 enclosure of via3 : 0.065um
+       0 m4.3_a : via3 must be enclosed by met4
+       0 m4.4a : min. m4 area : 0.240um²
+       0 m4.5ab : min. 3um.m4 spacing m4 : 0.4um
+       0 m5.1 : min. m5 width : 1.6um
+       0 m5.2 : min. m5 spacing : 1.6um
+       0 m5.3 : min. m5 enclosure of via4 : 0.31um
+       0 m5.3_a : via must be enclosed by m5
+       0 m5.4 : min. m5 area : 4.0um²
+       0 pad.2 : min. pad spacing : 1.27um
+       0 via2.1a : via2 outside of moduleCut should be rectangular
+       0 via2.1a_a : min. width of via2 outside of moduleCut : 0.2um
+       0 via2.1a_b : maximum length of via2 : 0.2um
+       0 via2.2 : min. via2 spacing : 0.2um
+       0 via2.4 : min. m2 enclosure of via2 : 0.04um
+       0 via2.4_a : via must be enclosed by met2
+       0 via2.5 : min. m3 enclosure of via2 of 2 adjacent edges : 0.085um
+       0 via3.1 : via3 outside of moduleCut should be rectangular
+       0 via3.1_a : min. width of via3 outside of moduleCut : 0.2um
+       0 via3.1_b : maximum length of via3 : 0.2um
+       0 via3.2 : min. via3 spacing : 0.2um
+       0 via3.4 : min. m3 enclosure of via3 : 0.06um
+       0 via3.4_a : non-ring via3 must be enclosed by met3
+       0 via3.5 : min. m3 enclosure of via3 of 2 adjacent edges : 0.09um
+       0 via4.1 : via4 outside of moduleCut should be rectangular
+       0 via4.1_a : min. width of via4 outside of moduleCut : 0.8um
+       0 via4.1_b : maximum length of via4 : 0.8um
+       0 via4.2 : min. via4 spacing : 0.8um
+       0 via4.4 : min. m4 enclosure of via4 : 0.19um
+       0 via4.4_a : m4 must enclose all via4
+       0 via.1a : via outside of moduleCut should be rectangular
+       0 via.1a_a : min. width of via outside of moduleCut : 0.15um
+       0 via.1a_b : maximum length of via : 0.15um
+       0 via.2 : min. via spacing : 0.17um
+       0 via.4a : min. m1 enclosure of 0.15um via : 0.055um
+       0 via.4a_a : 0.15um via must be enclosed by met1
+       0 via.5a : min. m1 enclosure of 0.15um via of 2 adjacent edges : 0.085um
+       0 total error(s) among 71 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/klayout_feol_report.xml b/tapeout/outputs/klayout_feol_report.xml
new file mode 100644
index 0000000..84c424a
--- /dev/null
+++ b/tapeout/outputs/klayout_feol_report.xml
@@ -0,0 +1,375 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>SKY130 DRC runset</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/sky130A_mr.drc'</generator>
+ <top-cell>caravel_0006b498</top-cell>
+ <tags>
+ </tags>
+ <categories>
+  <category>
+   <name>dnwell.2</name>
+   <description>dnwell.2 : min. dnwell width : 3.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.1</name>
+   <description>nwell.1 : min. nwell width : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.2a</name>
+   <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nwell.6</name>
+   <description>nwell.6 : min enclosure of nwellHole by dnwell : 1.03um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.1</name>
+   <description>hvtp.1 : min. hvtp width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtp.2</name>
+   <description>hvtp.2 : min. hvtp spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.1</name>
+   <description>hvtr.1 : min. hvtr width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2</name>
+   <description>hvtr.2 : min. hvtr spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvtr.2_a</name>
+   <description>hvtr.2_a : hvtr must not overlap hvtp</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.1a</name>
+   <description>lvtn.1a : min. lvtn width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>lvtn.2</name>
+   <description>lvtn.2 : min. lvtn spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.1</name>
+   <description>ncm.1 : min. ncm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>ncm.2a</name>
+   <description>ncm.2a : min. ncm spacing : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1</name>
+   <description>difftap.1 : min. diff width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_a</name>
+   <description>difftap.1_a : min. diff width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_b</name>
+   <description>difftap.1_b : min. tap width across areaid:ce : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.1_c</name>
+   <description>difftap.1_c : min. tap width in periphery : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>difftap.3</name>
+   <description>difftap.3 : min. difftap spacing : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.1</name>
+   <description>tunm.1 : min. tunm width : 0.41um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>tunm.2</name>
+   <description>tunm.2 : min. tunm spacing : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.1a</name>
+   <description>poly.1a : min. poly width : 0.15um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>poly.2</name>
+   <description>poly.2 : min. poly spacing : 0.21um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.1a</name>
+   <description>rpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>rpm.2</name>
+   <description>rpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.1a</name>
+   <description>urpm.1a : min. rpm width : 1.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>urpm.2</name>
+   <description>urpm.2 : min. rpm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.1</name>
+   <description>npc.1 : min. npc width : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>npc.2</name>
+   <description>npc.2 : min. npc spacing, should be manually merged if less than : 0.27um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.1</name>
+   <description>nsd.1 : min. nsdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>nsd.2</name>
+   <description>nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.1</name>
+   <description>psd.1 : min. psdm width : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>psd.2</name>
+   <description>psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1</name>
+   <description>licon.1 : licon should be rectangle</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.1_a/b</name>
+   <description>licon.1_a/b : minimum/maximum width of licon : 0.17um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13</name>
+   <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.13_a</name>
+   <description>licon.13_a : licon of diffTap in periphery must not overlap npc</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>licon.17</name>
+   <description>licon.17 : Licons may not overlap both poly and (diff or tap)</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.1</name>
+   <description>capm.1 : min. capm width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2a</name>
+   <description>capm.2a : min. capm spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b</name>
+   <description>capm.2b : min. capm spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.2b_a</name>
+   <description>capm.2b_a : min. spacing of m3_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3</name>
+   <description>capm.3 : min. capm and m3 enclosure of m3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.3_a</name>
+   <description>capm.3_a : min. m3 enclosure of capm : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.4</name>
+   <description>capm.4 : min. capm enclosure of via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.5</name>
+   <description>capm.5 : min. capm spacing to via3 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>capm.11</name>
+   <description>capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.1</name>
+   <description>cap2m.1 : min. cap2m width : 1.0um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2a</name>
+   <description>cap2m.2a : min. cap2m spacing : 0.84um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b</name>
+   <description>cap2m.2b : min. cap2m spacing : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.2b_a</name>
+   <description>cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3</name>
+   <description>cap2m.3 : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.3_a</name>
+   <description>cap2m.3_a : min. m4 enclosure of cap2m : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.4</name>
+   <description>cap2m.4 : min. cap2m enclosure of via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.5</name>
+   <description>cap2m.5 : min. cap2m spacing to via4 : 0.14um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>cap2m.11</name>
+   <description>cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.1</name>
+   <description>hvi.1 : min. hvi width : 0.6um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvi.2a</name>
+   <description>hvi.2a : min. hvi spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.1</name>
+   <description>hvntm.1 : min. hvntm width : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+  <category>
+   <name>hvntm.2</name>
+   <description>hvntm.2 : min. hvntm spacing : 0.7um</description>
+   <categories>
+   </categories>
+  </category>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0006b498</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_feol_report.xml.summary b/tapeout/outputs/klayout_feol_report.xml.summary
new file mode 100644
index 0000000..2a7a007
--- /dev/null
+++ b/tapeout/outputs/klayout_feol_report.xml.summary
@@ -0,0 +1,60 @@
+       0 cap2m.1 : min. cap2m width : 1.0um
+       0 cap2m.2a : min. cap2m spacing : 0.84um
+       0 cap2m.2b : min. cap2m spacing : 1.2um
+       0 cap2m.2b_a : min. spacing of m4_bot_plate : 1.2um
+       0 cap2m.3 : min. m4 enclosure of cap2m : 0.14um
+       0 cap2m.3_a : min. m4 enclosure of cap2m : 0.14um
+       0 cap2m.4 : min. cap2m enclosure of via4 : 0.14um
+       0 cap2m.5 : min. cap2m spacing to via4 : 0.14um
+       0 cap2m.11 : Min spacing of cap2m and met4 not overlapping cap2m : 0.5um
+       0 capm.1 : min. capm width : 1.0um
+       0 capm.2a : min. capm spacing : 0.84um
+       0 capm.2b : min. capm spacing : 1.2um
+       0 capm.2b_a : min. spacing of m3_bot_plate : 1.2um
+       0 capm.3 : min. capm and m3 enclosure of m3 : 0.14um
+       0 capm.3_a : min. m3 enclosure of capm : 0.14um
+       0 capm.4 : min. capm enclosure of via3 : 0.14um
+       0 capm.5 : min. capm spacing to via3 : 0.14um
+       0 capm.11 : Min spacing of capm and met3 not overlapping capm : 0.5um
+       0 difftap.1 : min. diff width across areaid:ce : 0.15um
+       0 difftap.1_a : min. diff width in periphery : 0.15um
+       0 difftap.1_b : min. tap width across areaid:ce : 0.15um
+       0 difftap.1_c : min. tap width in periphery : 0.15um
+       0 difftap.3 : min. difftap spacing : 0.27um
+       0 dnwell.2 : min. dnwell width : 3.0um
+       0 hvi.1 : min. hvi width : 0.6um
+       0 hvi.2a : min. hvi spacing : 0.7um
+       0 hvntm.1 : min. hvntm width : 0.7um
+       0 hvntm.2 : min. hvntm spacing : 0.7um
+       0 hvtp.1 : min. hvtp width : 0.38um
+       0 hvtp.2 : min. hvtp spacing : 0.38um
+       0 hvtr.1 : min. hvtr width : 0.38um
+       0 hvtr.2 : min. hvtr spacing : 0.38um
+       0 hvtr.2_a : hvtr must not overlap hvtp
+       0 licon.1 : licon should be rectangle
+       0 licon.1_a/b : minimum/maximum width of licon : 0.17um
+       0 licon.13 : min. difftap licon spacing to npc : 0.09um
+       0 licon.13_a : licon of diffTap in periphery must not overlap npc
+       0 licon.17 : Licons may not overlap both poly and (diff or tap)
+       0 lvtn.1a : min. lvtn width : 0.38um
+       0 lvtn.2 : min. lvtn spacing : 0.38um
+       0 ncm.1 : min. ncm width : 0.38um
+       0 ncm.2a : min. ncm spacing : 0.38um
+       0 npc.1 : min. npc width : 0.27um
+       0 npc.2 : min. npc spacing, should be manually merged if less than : 0.27um
+       0 nsd.1 : min. nsdm width : 0.38um
+       0 nsd.2 : min. nsdm spacing, should be manually merged if less than : 0.38um
+       0 nwell.1 : min. nwell width : 0.84um
+       0 nwell.2a : min. nwell spacing (merged if less) : 1.27um
+       0 nwell.6 : min enclosure of nwellHole by dnwell : 1.03um
+       0 poly.1a : min. poly width : 0.15um
+       0 poly.2 : min. poly spacing : 0.21um
+       0 psd.1 : min. psdm width : 0.38um
+       0 psd.2 : min. psdm spacing, should be manually merged if less than : 0.38um
+       0 rpm.1a : min. rpm width : 1.27um
+       0 rpm.2 : min. rpm spacing : 0.84um
+       0 tunm.1 : min. tunm width : 0.41um
+       0 tunm.2 : min. tunm spacing : 0.5um
+       0 urpm.1a : min. rpm width : 1.27um
+       0 urpm.2 : min. rpm spacing : 0.84um
+       0 total error(s) among 59 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/klayout_fom_density_report.xml b/tapeout/outputs/klayout_fom_density_report.xml
new file mode 100644
index 0000000..1a697c5
--- /dev/null
+++ b/tapeout/outputs/klayout_fom_density_report.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/fom_density.drc'</generator>
+ <top-cell>caravel_0006b498</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0006b498</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_fom_density_report.xml.summary b/tapeout/outputs/klayout_fom_density_report.xml.summary
new file mode 100644
index 0000000..8d461a0
--- /dev/null
+++ b/tapeout/outputs/klayout_fom_density_report.xml.summary
@@ -0,0 +1 @@
+       0 total error(s) among 0 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/klayout_met_density_report.xml b/tapeout/outputs/klayout_met_density_report.xml
new file mode 100644
index 0000000..06751e0
--- /dev/null
+++ b/tapeout/outputs/klayout_met_density_report.xml
@@ -0,0 +1,21 @@
+<?xml version="1.0" encoding="utf-8"?>
+<report-database>
+ <description>Density Checks</description>
+ <original-file/>
+ <generator>drc: script='/opt/scripts/tech/met_density.lydrc'</generator>
+ <top-cell>caravel_0006b498</top-cell>
+ <tags>
+ </tags>
+ <categories>
+ </categories>
+ <cells>
+  <cell>
+   <name>caravel_0006b498</name>
+   <variant/>
+   <references>
+   </references>
+  </cell>
+ </cells>
+ <items>
+ </items>
+</report-database>
diff --git a/tapeout/outputs/klayout_met_density_report.xml.summary b/tapeout/outputs/klayout_met_density_report.xml.summary
new file mode 100644
index 0000000..8d461a0
--- /dev/null
+++ b/tapeout/outputs/klayout_met_density_report.xml.summary
@@ -0,0 +1 @@
+       0 total error(s) among 0 error type(s), 0 non-zero type(s)
diff --git a/tapeout/outputs/oas/caravel_0006b498.oas b/tapeout/outputs/oas/caravel_0006b498.oas
new file mode 100644
index 0000000..2b25dc5
--- /dev/null
+++ b/tapeout/outputs/oas/caravel_0006b498.oas
Binary files differ
diff --git a/tapeout/outputs/verilog/gl/caravel.v b/tapeout/outputs/verilog/gl/caravel.v
new file mode 100644
index 0000000..d6f5e90
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/caravel.v
@@ -0,0 +1,5435 @@
+/* Generated by Yosys 0.9+4052 (git sha1 d061b0e, gcc 8.3.1 -fPIC -Os) */
+
+module caravel(vddio, vddio_2, vssio, vssio_2, vdda, vssa, vccd, vssd, vdda1, vdda1_2, vdda2, vssa1, vssa1_2, vssa2, vccd1, vccd2, vssd1, vssd2, gpio, mprj_io, clock, resetb, flash_csb, flash_clk, flash_io0, flash_io1);
+  wire caravel_clk;
+  wire caravel_clk2;
+  wire caravel_clk_buf;
+  wire caravel_rstn;
+  wire caravel_rstn_buf;
+  wire clk_passthru;
+  input clock;
+  wire clock_core;
+  wire clock_core_buf;
+  wire debug_in;
+  wire debug_mode;
+  wire debug_oeb;
+  wire debug_out;
+  wire ext_clk_sel;
+  wire ext_reset;
+  output flash_clk;
+  wire flash_clk_core;
+  wire flash_clk_frame;
+  wire flash_clk_frame_buf;
+  wire flash_clk_ieb;
+  wire flash_clk_ieb_buf;
+  wire flash_clk_oeb;
+  wire flash_clk_oeb_buf;
+  wire flash_clk_oeb_core;
+  output flash_csb;
+  wire flash_csb_core;
+  wire flash_csb_frame;
+  wire flash_csb_frame_buf;
+  wire flash_csb_ieb;
+  wire flash_csb_ieb_buf;
+  wire flash_csb_oeb;
+  wire flash_csb_oeb_buf;
+  wire flash_csb_oeb_core;
+  output flash_io0;
+  wire flash_io0_di;
+  wire flash_io0_di_buf;
+  wire flash_io0_di_core;
+  wire flash_io0_do;
+  wire flash_io0_do_buf;
+  wire flash_io0_do_core;
+  wire flash_io0_ieb;
+  wire flash_io0_ieb_buf;
+  wire flash_io0_ieb_core;
+  wire flash_io0_oeb;
+  wire flash_io0_oeb_buf;
+  wire flash_io0_oeb_core;
+  output flash_io1;
+  wire flash_io1_di;
+  wire flash_io1_di_buf;
+  wire flash_io1_di_core;
+  wire flash_io1_do;
+  wire flash_io1_do_buf;
+  wire flash_io1_do_core;
+  wire flash_io1_ieb;
+  wire flash_io1_ieb_buf;
+  wire flash_io1_ieb_core;
+  wire flash_io1_oeb;
+  wire flash_io1_oeb_buf;
+  wire flash_io1_oeb_core;
+  wire flash_io2_di_core;
+  wire flash_io2_do_core;
+  wire flash_io2_ieb_core;
+  wire flash_io2_oeb_core;
+  wire flash_io3_di_core;
+  wire flash_io3_do_core;
+  wire flash_io3_ieb_core;
+  wire flash_io3_oeb_core;
+  inout gpio;
+  wire \gpio_clock_1[0] ;
+  wire \gpio_clock_1[10] ;
+  wire \gpio_clock_1[11] ;
+  wire \gpio_clock_1[12] ;
+  wire \gpio_clock_1[13] ;
+  wire \gpio_clock_1[14] ;
+  wire \gpio_clock_1[15] ;
+  wire \gpio_clock_1[16] ;
+  wire \gpio_clock_1[17] ;
+  wire \gpio_clock_1[18] ;
+  wire \gpio_clock_1[1] ;
+  wire \gpio_clock_1[2] ;
+  wire \gpio_clock_1[3] ;
+  wire \gpio_clock_1[4] ;
+  wire \gpio_clock_1[5] ;
+  wire \gpio_clock_1[6] ;
+  wire \gpio_clock_1[7] ;
+  wire \gpio_clock_1[8] ;
+  wire \gpio_clock_1[9] ;
+  wire \gpio_clock_1_shifted[0] ;
+  wire \gpio_clock_1_shifted[10] ;
+  wire \gpio_clock_1_shifted[11] ;
+  wire \gpio_clock_1_shifted[12] ;
+  wire \gpio_clock_1_shifted[13] ;
+  wire \gpio_clock_1_shifted[14] ;
+  wire \gpio_clock_1_shifted[15] ;
+  wire \gpio_clock_1_shifted[16] ;
+  wire \gpio_clock_1_shifted[17] ;
+  wire \gpio_clock_1_shifted[18] ;
+  wire \gpio_clock_1_shifted[1] ;
+  wire \gpio_clock_1_shifted[2] ;
+  wire \gpio_clock_1_shifted[3] ;
+  wire \gpio_clock_1_shifted[4] ;
+  wire \gpio_clock_1_shifted[5] ;
+  wire \gpio_clock_1_shifted[6] ;
+  wire \gpio_clock_1_shifted[7] ;
+  wire \gpio_clock_1_shifted[8] ;
+  wire \gpio_clock_1_shifted[9] ;
+  wire \gpio_clock_2[0] ;
+  wire \gpio_clock_2[10] ;
+  wire \gpio_clock_2[11] ;
+  wire \gpio_clock_2[12] ;
+  wire \gpio_clock_2[13] ;
+  wire \gpio_clock_2[14] ;
+  wire \gpio_clock_2[15] ;
+  wire \gpio_clock_2[16] ;
+  wire \gpio_clock_2[17] ;
+  wire \gpio_clock_2[18] ;
+  wire \gpio_clock_2[1] ;
+  wire \gpio_clock_2[2] ;
+  wire \gpio_clock_2[3] ;
+  wire \gpio_clock_2[4] ;
+  wire \gpio_clock_2[5] ;
+  wire \gpio_clock_2[6] ;
+  wire \gpio_clock_2[7] ;
+  wire \gpio_clock_2[8] ;
+  wire \gpio_clock_2[9] ;
+  wire \gpio_clock_2_shifted[0] ;
+  wire \gpio_clock_2_shifted[10] ;
+  wire \gpio_clock_2_shifted[11] ;
+  wire \gpio_clock_2_shifted[12] ;
+  wire \gpio_clock_2_shifted[13] ;
+  wire \gpio_clock_2_shifted[14] ;
+  wire \gpio_clock_2_shifted[15] ;
+  wire \gpio_clock_2_shifted[16] ;
+  wire \gpio_clock_2_shifted[17] ;
+  wire \gpio_clock_2_shifted[18] ;
+  wire \gpio_clock_2_shifted[1] ;
+  wire \gpio_clock_2_shifted[2] ;
+  wire \gpio_clock_2_shifted[3] ;
+  wire \gpio_clock_2_shifted[4] ;
+  wire \gpio_clock_2_shifted[5] ;
+  wire \gpio_clock_2_shifted[6] ;
+  wire \gpio_clock_2_shifted[7] ;
+  wire \gpio_clock_2_shifted[8] ;
+  wire \gpio_clock_2_shifted[9] ;
+  wire \gpio_defaults[0] ;
+  wire \gpio_defaults[100] ;
+  wire \gpio_defaults[101] ;
+  wire \gpio_defaults[102] ;
+  wire \gpio_defaults[103] ;
+  wire \gpio_defaults[104] ;
+  wire \gpio_defaults[105] ;
+  wire \gpio_defaults[106] ;
+  wire \gpio_defaults[107] ;
+  wire \gpio_defaults[108] ;
+  wire \gpio_defaults[109] ;
+  wire \gpio_defaults[10] ;
+  wire \gpio_defaults[110] ;
+  wire \gpio_defaults[111] ;
+  wire \gpio_defaults[112] ;
+  wire \gpio_defaults[113] ;
+  wire \gpio_defaults[114] ;
+  wire \gpio_defaults[115] ;
+  wire \gpio_defaults[116] ;
+  wire \gpio_defaults[117] ;
+  wire \gpio_defaults[118] ;
+  wire \gpio_defaults[119] ;
+  wire \gpio_defaults[11] ;
+  wire \gpio_defaults[120] ;
+  wire \gpio_defaults[121] ;
+  wire \gpio_defaults[122] ;
+  wire \gpio_defaults[123] ;
+  wire \gpio_defaults[124] ;
+  wire \gpio_defaults[125] ;
+  wire \gpio_defaults[126] ;
+  wire \gpio_defaults[127] ;
+  wire \gpio_defaults[128] ;
+  wire \gpio_defaults[129] ;
+  wire \gpio_defaults[12] ;
+  wire \gpio_defaults[130] ;
+  wire \gpio_defaults[131] ;
+  wire \gpio_defaults[132] ;
+  wire \gpio_defaults[133] ;
+  wire \gpio_defaults[134] ;
+  wire \gpio_defaults[135] ;
+  wire \gpio_defaults[136] ;
+  wire \gpio_defaults[137] ;
+  wire \gpio_defaults[138] ;
+  wire \gpio_defaults[139] ;
+  wire \gpio_defaults[13] ;
+  wire \gpio_defaults[140] ;
+  wire \gpio_defaults[141] ;
+  wire \gpio_defaults[142] ;
+  wire \gpio_defaults[143] ;
+  wire \gpio_defaults[144] ;
+  wire \gpio_defaults[145] ;
+  wire \gpio_defaults[146] ;
+  wire \gpio_defaults[147] ;
+  wire \gpio_defaults[148] ;
+  wire \gpio_defaults[149] ;
+  wire \gpio_defaults[14] ;
+  wire \gpio_defaults[150] ;
+  wire \gpio_defaults[151] ;
+  wire \gpio_defaults[152] ;
+  wire \gpio_defaults[153] ;
+  wire \gpio_defaults[154] ;
+  wire \gpio_defaults[155] ;
+  wire \gpio_defaults[156] ;
+  wire \gpio_defaults[157] ;
+  wire \gpio_defaults[158] ;
+  wire \gpio_defaults[159] ;
+  wire \gpio_defaults[15] ;
+  wire \gpio_defaults[160] ;
+  wire \gpio_defaults[161] ;
+  wire \gpio_defaults[162] ;
+  wire \gpio_defaults[163] ;
+  wire \gpio_defaults[164] ;
+  wire \gpio_defaults[165] ;
+  wire \gpio_defaults[166] ;
+  wire \gpio_defaults[167] ;
+  wire \gpio_defaults[168] ;
+  wire \gpio_defaults[169] ;
+  wire \gpio_defaults[16] ;
+  wire \gpio_defaults[170] ;
+  wire \gpio_defaults[171] ;
+  wire \gpio_defaults[172] ;
+  wire \gpio_defaults[173] ;
+  wire \gpio_defaults[174] ;
+  wire \gpio_defaults[175] ;
+  wire \gpio_defaults[176] ;
+  wire \gpio_defaults[177] ;
+  wire \gpio_defaults[178] ;
+  wire \gpio_defaults[179] ;
+  wire \gpio_defaults[17] ;
+  wire \gpio_defaults[180] ;
+  wire \gpio_defaults[181] ;
+  wire \gpio_defaults[182] ;
+  wire \gpio_defaults[183] ;
+  wire \gpio_defaults[184] ;
+  wire \gpio_defaults[185] ;
+  wire \gpio_defaults[186] ;
+  wire \gpio_defaults[187] ;
+  wire \gpio_defaults[188] ;
+  wire \gpio_defaults[189] ;
+  wire \gpio_defaults[18] ;
+  wire \gpio_defaults[190] ;
+  wire \gpio_defaults[191] ;
+  wire \gpio_defaults[192] ;
+  wire \gpio_defaults[193] ;
+  wire \gpio_defaults[194] ;
+  wire \gpio_defaults[195] ;
+  wire \gpio_defaults[196] ;
+  wire \gpio_defaults[197] ;
+  wire \gpio_defaults[198] ;
+  wire \gpio_defaults[199] ;
+  wire \gpio_defaults[19] ;
+  wire \gpio_defaults[1] ;
+  wire \gpio_defaults[200] ;
+  wire \gpio_defaults[201] ;
+  wire \gpio_defaults[202] ;
+  wire \gpio_defaults[203] ;
+  wire \gpio_defaults[204] ;
+  wire \gpio_defaults[205] ;
+  wire \gpio_defaults[206] ;
+  wire \gpio_defaults[207] ;
+  wire \gpio_defaults[208] ;
+  wire \gpio_defaults[209] ;
+  wire \gpio_defaults[20] ;
+  wire \gpio_defaults[210] ;
+  wire \gpio_defaults[211] ;
+  wire \gpio_defaults[212] ;
+  wire \gpio_defaults[213] ;
+  wire \gpio_defaults[214] ;
+  wire \gpio_defaults[215] ;
+  wire \gpio_defaults[216] ;
+  wire \gpio_defaults[217] ;
+  wire \gpio_defaults[218] ;
+  wire \gpio_defaults[219] ;
+  wire \gpio_defaults[21] ;
+  wire \gpio_defaults[220] ;
+  wire \gpio_defaults[221] ;
+  wire \gpio_defaults[222] ;
+  wire \gpio_defaults[223] ;
+  wire \gpio_defaults[224] ;
+  wire \gpio_defaults[225] ;
+  wire \gpio_defaults[226] ;
+  wire \gpio_defaults[227] ;
+  wire \gpio_defaults[228] ;
+  wire \gpio_defaults[229] ;
+  wire \gpio_defaults[22] ;
+  wire \gpio_defaults[230] ;
+  wire \gpio_defaults[231] ;
+  wire \gpio_defaults[232] ;
+  wire \gpio_defaults[233] ;
+  wire \gpio_defaults[234] ;
+  wire \gpio_defaults[235] ;
+  wire \gpio_defaults[236] ;
+  wire \gpio_defaults[237] ;
+  wire \gpio_defaults[238] ;
+  wire \gpio_defaults[239] ;
+  wire \gpio_defaults[23] ;
+  wire \gpio_defaults[240] ;
+  wire \gpio_defaults[241] ;
+  wire \gpio_defaults[242] ;
+  wire \gpio_defaults[243] ;
+  wire \gpio_defaults[244] ;
+  wire \gpio_defaults[245] ;
+  wire \gpio_defaults[246] ;
+  wire \gpio_defaults[247] ;
+  wire \gpio_defaults[248] ;
+  wire \gpio_defaults[249] ;
+  wire \gpio_defaults[24] ;
+  wire \gpio_defaults[250] ;
+  wire \gpio_defaults[251] ;
+  wire \gpio_defaults[252] ;
+  wire \gpio_defaults[253] ;
+  wire \gpio_defaults[254] ;
+  wire \gpio_defaults[255] ;
+  wire \gpio_defaults[256] ;
+  wire \gpio_defaults[257] ;
+  wire \gpio_defaults[258] ;
+  wire \gpio_defaults[259] ;
+  wire \gpio_defaults[25] ;
+  wire \gpio_defaults[260] ;
+  wire \gpio_defaults[261] ;
+  wire \gpio_defaults[262] ;
+  wire \gpio_defaults[263] ;
+  wire \gpio_defaults[264] ;
+  wire \gpio_defaults[265] ;
+  wire \gpio_defaults[266] ;
+  wire \gpio_defaults[267] ;
+  wire \gpio_defaults[268] ;
+  wire \gpio_defaults[269] ;
+  wire \gpio_defaults[26] ;
+  wire \gpio_defaults[270] ;
+  wire \gpio_defaults[271] ;
+  wire \gpio_defaults[272] ;
+  wire \gpio_defaults[273] ;
+  wire \gpio_defaults[274] ;
+  wire \gpio_defaults[275] ;
+  wire \gpio_defaults[276] ;
+  wire \gpio_defaults[277] ;
+  wire \gpio_defaults[278] ;
+  wire \gpio_defaults[279] ;
+  wire \gpio_defaults[27] ;
+  wire \gpio_defaults[280] ;
+  wire \gpio_defaults[281] ;
+  wire \gpio_defaults[282] ;
+  wire \gpio_defaults[283] ;
+  wire \gpio_defaults[284] ;
+  wire \gpio_defaults[285] ;
+  wire \gpio_defaults[286] ;
+  wire \gpio_defaults[287] ;
+  wire \gpio_defaults[288] ;
+  wire \gpio_defaults[289] ;
+  wire \gpio_defaults[28] ;
+  wire \gpio_defaults[290] ;
+  wire \gpio_defaults[291] ;
+  wire \gpio_defaults[292] ;
+  wire \gpio_defaults[293] ;
+  wire \gpio_defaults[294] ;
+  wire \gpio_defaults[295] ;
+  wire \gpio_defaults[296] ;
+  wire \gpio_defaults[297] ;
+  wire \gpio_defaults[298] ;
+  wire \gpio_defaults[299] ;
+  wire \gpio_defaults[29] ;
+  wire \gpio_defaults[2] ;
+  wire \gpio_defaults[300] ;
+  wire \gpio_defaults[301] ;
+  wire \gpio_defaults[302] ;
+  wire \gpio_defaults[303] ;
+  wire \gpio_defaults[304] ;
+  wire \gpio_defaults[305] ;
+  wire \gpio_defaults[306] ;
+  wire \gpio_defaults[307] ;
+  wire \gpio_defaults[308] ;
+  wire \gpio_defaults[309] ;
+  wire \gpio_defaults[30] ;
+  wire \gpio_defaults[310] ;
+  wire \gpio_defaults[311] ;
+  wire \gpio_defaults[312] ;
+  wire \gpio_defaults[313] ;
+  wire \gpio_defaults[314] ;
+  wire \gpio_defaults[315] ;
+  wire \gpio_defaults[316] ;
+  wire \gpio_defaults[317] ;
+  wire \gpio_defaults[318] ;
+  wire \gpio_defaults[319] ;
+  wire \gpio_defaults[31] ;
+  wire \gpio_defaults[320] ;
+  wire \gpio_defaults[321] ;
+  wire \gpio_defaults[322] ;
+  wire \gpio_defaults[323] ;
+  wire \gpio_defaults[324] ;
+  wire \gpio_defaults[325] ;
+  wire \gpio_defaults[326] ;
+  wire \gpio_defaults[327] ;
+  wire \gpio_defaults[328] ;
+  wire \gpio_defaults[329] ;
+  wire \gpio_defaults[32] ;
+  wire \gpio_defaults[330] ;
+  wire \gpio_defaults[331] ;
+  wire \gpio_defaults[332] ;
+  wire \gpio_defaults[333] ;
+  wire \gpio_defaults[334] ;
+  wire \gpio_defaults[335] ;
+  wire \gpio_defaults[336] ;
+  wire \gpio_defaults[337] ;
+  wire \gpio_defaults[338] ;
+  wire \gpio_defaults[339] ;
+  wire \gpio_defaults[33] ;
+  wire \gpio_defaults[340] ;
+  wire \gpio_defaults[341] ;
+  wire \gpio_defaults[342] ;
+  wire \gpio_defaults[343] ;
+  wire \gpio_defaults[344] ;
+  wire \gpio_defaults[345] ;
+  wire \gpio_defaults[346] ;
+  wire \gpio_defaults[347] ;
+  wire \gpio_defaults[348] ;
+  wire \gpio_defaults[349] ;
+  wire \gpio_defaults[34] ;
+  wire \gpio_defaults[350] ;
+  wire \gpio_defaults[351] ;
+  wire \gpio_defaults[352] ;
+  wire \gpio_defaults[353] ;
+  wire \gpio_defaults[354] ;
+  wire \gpio_defaults[355] ;
+  wire \gpio_defaults[356] ;
+  wire \gpio_defaults[357] ;
+  wire \gpio_defaults[358] ;
+  wire \gpio_defaults[359] ;
+  wire \gpio_defaults[35] ;
+  wire \gpio_defaults[360] ;
+  wire \gpio_defaults[361] ;
+  wire \gpio_defaults[362] ;
+  wire \gpio_defaults[363] ;
+  wire \gpio_defaults[364] ;
+  wire \gpio_defaults[365] ;
+  wire \gpio_defaults[366] ;
+  wire \gpio_defaults[367] ;
+  wire \gpio_defaults[368] ;
+  wire \gpio_defaults[369] ;
+  wire \gpio_defaults[36] ;
+  wire \gpio_defaults[370] ;
+  wire \gpio_defaults[371] ;
+  wire \gpio_defaults[372] ;
+  wire \gpio_defaults[373] ;
+  wire \gpio_defaults[374] ;
+  wire \gpio_defaults[375] ;
+  wire \gpio_defaults[376] ;
+  wire \gpio_defaults[377] ;
+  wire \gpio_defaults[378] ;
+  wire \gpio_defaults[379] ;
+  wire \gpio_defaults[37] ;
+  wire \gpio_defaults[380] ;
+  wire \gpio_defaults[381] ;
+  wire \gpio_defaults[382] ;
+  wire \gpio_defaults[383] ;
+  wire \gpio_defaults[384] ;
+  wire \gpio_defaults[385] ;
+  wire \gpio_defaults[386] ;
+  wire \gpio_defaults[387] ;
+  wire \gpio_defaults[388] ;
+  wire \gpio_defaults[389] ;
+  wire \gpio_defaults[38] ;
+  wire \gpio_defaults[390] ;
+  wire \gpio_defaults[391] ;
+  wire \gpio_defaults[392] ;
+  wire \gpio_defaults[393] ;
+  wire \gpio_defaults[394] ;
+  wire \gpio_defaults[395] ;
+  wire \gpio_defaults[396] ;
+  wire \gpio_defaults[397] ;
+  wire \gpio_defaults[398] ;
+  wire \gpio_defaults[399] ;
+  wire \gpio_defaults[39] ;
+  wire \gpio_defaults[3] ;
+  wire \gpio_defaults[400] ;
+  wire \gpio_defaults[401] ;
+  wire \gpio_defaults[402] ;
+  wire \gpio_defaults[403] ;
+  wire \gpio_defaults[404] ;
+  wire \gpio_defaults[405] ;
+  wire \gpio_defaults[406] ;
+  wire \gpio_defaults[407] ;
+  wire \gpio_defaults[408] ;
+  wire \gpio_defaults[409] ;
+  wire \gpio_defaults[40] ;
+  wire \gpio_defaults[410] ;
+  wire \gpio_defaults[411] ;
+  wire \gpio_defaults[412] ;
+  wire \gpio_defaults[413] ;
+  wire \gpio_defaults[414] ;
+  wire \gpio_defaults[415] ;
+  wire \gpio_defaults[416] ;
+  wire \gpio_defaults[417] ;
+  wire \gpio_defaults[418] ;
+  wire \gpio_defaults[419] ;
+  wire \gpio_defaults[41] ;
+  wire \gpio_defaults[420] ;
+  wire \gpio_defaults[421] ;
+  wire \gpio_defaults[422] ;
+  wire \gpio_defaults[423] ;
+  wire \gpio_defaults[424] ;
+  wire \gpio_defaults[425] ;
+  wire \gpio_defaults[426] ;
+  wire \gpio_defaults[427] ;
+  wire \gpio_defaults[428] ;
+  wire \gpio_defaults[429] ;
+  wire \gpio_defaults[42] ;
+  wire \gpio_defaults[430] ;
+  wire \gpio_defaults[431] ;
+  wire \gpio_defaults[432] ;
+  wire \gpio_defaults[433] ;
+  wire \gpio_defaults[434] ;
+  wire \gpio_defaults[435] ;
+  wire \gpio_defaults[436] ;
+  wire \gpio_defaults[437] ;
+  wire \gpio_defaults[438] ;
+  wire \gpio_defaults[439] ;
+  wire \gpio_defaults[43] ;
+  wire \gpio_defaults[440] ;
+  wire \gpio_defaults[441] ;
+  wire \gpio_defaults[442] ;
+  wire \gpio_defaults[443] ;
+  wire \gpio_defaults[444] ;
+  wire \gpio_defaults[445] ;
+  wire \gpio_defaults[446] ;
+  wire \gpio_defaults[447] ;
+  wire \gpio_defaults[448] ;
+  wire \gpio_defaults[449] ;
+  wire \gpio_defaults[44] ;
+  wire \gpio_defaults[450] ;
+  wire \gpio_defaults[451] ;
+  wire \gpio_defaults[452] ;
+  wire \gpio_defaults[453] ;
+  wire \gpio_defaults[454] ;
+  wire \gpio_defaults[455] ;
+  wire \gpio_defaults[456] ;
+  wire \gpio_defaults[457] ;
+  wire \gpio_defaults[458] ;
+  wire \gpio_defaults[459] ;
+  wire \gpio_defaults[45] ;
+  wire \gpio_defaults[460] ;
+  wire \gpio_defaults[461] ;
+  wire \gpio_defaults[462] ;
+  wire \gpio_defaults[463] ;
+  wire \gpio_defaults[464] ;
+  wire \gpio_defaults[465] ;
+  wire \gpio_defaults[466] ;
+  wire \gpio_defaults[467] ;
+  wire \gpio_defaults[468] ;
+  wire \gpio_defaults[469] ;
+  wire \gpio_defaults[46] ;
+  wire \gpio_defaults[470] ;
+  wire \gpio_defaults[471] ;
+  wire \gpio_defaults[472] ;
+  wire \gpio_defaults[473] ;
+  wire \gpio_defaults[474] ;
+  wire \gpio_defaults[475] ;
+  wire \gpio_defaults[476] ;
+  wire \gpio_defaults[477] ;
+  wire \gpio_defaults[478] ;
+  wire \gpio_defaults[479] ;
+  wire \gpio_defaults[47] ;
+  wire \gpio_defaults[480] ;
+  wire \gpio_defaults[481] ;
+  wire \gpio_defaults[482] ;
+  wire \gpio_defaults[483] ;
+  wire \gpio_defaults[484] ;
+  wire \gpio_defaults[485] ;
+  wire \gpio_defaults[486] ;
+  wire \gpio_defaults[487] ;
+  wire \gpio_defaults[488] ;
+  wire \gpio_defaults[489] ;
+  wire \gpio_defaults[48] ;
+  wire \gpio_defaults[490] ;
+  wire \gpio_defaults[491] ;
+  wire \gpio_defaults[492] ;
+  wire \gpio_defaults[493] ;
+  wire \gpio_defaults[49] ;
+  wire \gpio_defaults[4] ;
+  wire \gpio_defaults[50] ;
+  wire \gpio_defaults[51] ;
+  wire \gpio_defaults[52] ;
+  wire \gpio_defaults[53] ;
+  wire \gpio_defaults[54] ;
+  wire \gpio_defaults[55] ;
+  wire \gpio_defaults[56] ;
+  wire \gpio_defaults[57] ;
+  wire \gpio_defaults[58] ;
+  wire \gpio_defaults[59] ;
+  wire \gpio_defaults[5] ;
+  wire \gpio_defaults[60] ;
+  wire \gpio_defaults[61] ;
+  wire \gpio_defaults[62] ;
+  wire \gpio_defaults[63] ;
+  wire \gpio_defaults[64] ;
+  wire \gpio_defaults[65] ;
+  wire \gpio_defaults[66] ;
+  wire \gpio_defaults[67] ;
+  wire \gpio_defaults[68] ;
+  wire \gpio_defaults[69] ;
+  wire \gpio_defaults[6] ;
+  wire \gpio_defaults[70] ;
+  wire \gpio_defaults[71] ;
+  wire \gpio_defaults[72] ;
+  wire \gpio_defaults[73] ;
+  wire \gpio_defaults[74] ;
+  wire \gpio_defaults[75] ;
+  wire \gpio_defaults[76] ;
+  wire \gpio_defaults[77] ;
+  wire \gpio_defaults[78] ;
+  wire \gpio_defaults[79] ;
+  wire \gpio_defaults[7] ;
+  wire \gpio_defaults[80] ;
+  wire \gpio_defaults[81] ;
+  wire \gpio_defaults[82] ;
+  wire \gpio_defaults[83] ;
+  wire \gpio_defaults[84] ;
+  wire \gpio_defaults[85] ;
+  wire \gpio_defaults[86] ;
+  wire \gpio_defaults[87] ;
+  wire \gpio_defaults[88] ;
+  wire \gpio_defaults[89] ;
+  wire \gpio_defaults[8] ;
+  wire \gpio_defaults[90] ;
+  wire \gpio_defaults[91] ;
+  wire \gpio_defaults[92] ;
+  wire \gpio_defaults[93] ;
+  wire \gpio_defaults[94] ;
+  wire \gpio_defaults[95] ;
+  wire \gpio_defaults[96] ;
+  wire \gpio_defaults[97] ;
+  wire \gpio_defaults[98] ;
+  wire \gpio_defaults[99] ;
+  wire \gpio_defaults[9] ;
+  wire gpio_in_core;
+  wire gpio_inenb_core;
+  wire \gpio_load_1[0] ;
+  wire \gpio_load_1[10] ;
+  wire \gpio_load_1[11] ;
+  wire \gpio_load_1[12] ;
+  wire \gpio_load_1[13] ;
+  wire \gpio_load_1[14] ;
+  wire \gpio_load_1[15] ;
+  wire \gpio_load_1[16] ;
+  wire \gpio_load_1[17] ;
+  wire \gpio_load_1[18] ;
+  wire \gpio_load_1[1] ;
+  wire \gpio_load_1[2] ;
+  wire \gpio_load_1[3] ;
+  wire \gpio_load_1[4] ;
+  wire \gpio_load_1[5] ;
+  wire \gpio_load_1[6] ;
+  wire \gpio_load_1[7] ;
+  wire \gpio_load_1[8] ;
+  wire \gpio_load_1[9] ;
+  wire \gpio_load_1_shifted[0] ;
+  wire \gpio_load_1_shifted[10] ;
+  wire \gpio_load_1_shifted[11] ;
+  wire \gpio_load_1_shifted[12] ;
+  wire \gpio_load_1_shifted[13] ;
+  wire \gpio_load_1_shifted[14] ;
+  wire \gpio_load_1_shifted[15] ;
+  wire \gpio_load_1_shifted[16] ;
+  wire \gpio_load_1_shifted[17] ;
+  wire \gpio_load_1_shifted[18] ;
+  wire \gpio_load_1_shifted[1] ;
+  wire \gpio_load_1_shifted[2] ;
+  wire \gpio_load_1_shifted[3] ;
+  wire \gpio_load_1_shifted[4] ;
+  wire \gpio_load_1_shifted[5] ;
+  wire \gpio_load_1_shifted[6] ;
+  wire \gpio_load_1_shifted[7] ;
+  wire \gpio_load_1_shifted[8] ;
+  wire \gpio_load_1_shifted[9] ;
+  wire \gpio_load_2[0] ;
+  wire \gpio_load_2[10] ;
+  wire \gpio_load_2[11] ;
+  wire \gpio_load_2[12] ;
+  wire \gpio_load_2[13] ;
+  wire \gpio_load_2[14] ;
+  wire \gpio_load_2[15] ;
+  wire \gpio_load_2[16] ;
+  wire \gpio_load_2[17] ;
+  wire \gpio_load_2[18] ;
+  wire \gpio_load_2[1] ;
+  wire \gpio_load_2[2] ;
+  wire \gpio_load_2[3] ;
+  wire \gpio_load_2[4] ;
+  wire \gpio_load_2[5] ;
+  wire \gpio_load_2[6] ;
+  wire \gpio_load_2[7] ;
+  wire \gpio_load_2[8] ;
+  wire \gpio_load_2[9] ;
+  wire \gpio_load_2_shifted[0] ;
+  wire \gpio_load_2_shifted[10] ;
+  wire \gpio_load_2_shifted[11] ;
+  wire \gpio_load_2_shifted[12] ;
+  wire \gpio_load_2_shifted[13] ;
+  wire \gpio_load_2_shifted[14] ;
+  wire \gpio_load_2_shifted[15] ;
+  wire \gpio_load_2_shifted[16] ;
+  wire \gpio_load_2_shifted[17] ;
+  wire \gpio_load_2_shifted[18] ;
+  wire \gpio_load_2_shifted[1] ;
+  wire \gpio_load_2_shifted[2] ;
+  wire \gpio_load_2_shifted[3] ;
+  wire \gpio_load_2_shifted[4] ;
+  wire \gpio_load_2_shifted[5] ;
+  wire \gpio_load_2_shifted[6] ;
+  wire \gpio_load_2_shifted[7] ;
+  wire \gpio_load_2_shifted[8] ;
+  wire \gpio_load_2_shifted[9] ;
+  wire gpio_mode0_core;
+  wire gpio_mode1_core;
+  wire gpio_out_core;
+  wire gpio_outenb_core;
+  wire \gpio_resetn_1[0] ;
+  wire \gpio_resetn_1[10] ;
+  wire \gpio_resetn_1[11] ;
+  wire \gpio_resetn_1[12] ;
+  wire \gpio_resetn_1[13] ;
+  wire \gpio_resetn_1[14] ;
+  wire \gpio_resetn_1[15] ;
+  wire \gpio_resetn_1[16] ;
+  wire \gpio_resetn_1[17] ;
+  wire \gpio_resetn_1[18] ;
+  wire \gpio_resetn_1[1] ;
+  wire \gpio_resetn_1[2] ;
+  wire \gpio_resetn_1[3] ;
+  wire \gpio_resetn_1[4] ;
+  wire \gpio_resetn_1[5] ;
+  wire \gpio_resetn_1[6] ;
+  wire \gpio_resetn_1[7] ;
+  wire \gpio_resetn_1[8] ;
+  wire \gpio_resetn_1[9] ;
+  wire \gpio_resetn_1_shifted[0] ;
+  wire \gpio_resetn_1_shifted[10] ;
+  wire \gpio_resetn_1_shifted[11] ;
+  wire \gpio_resetn_1_shifted[12] ;
+  wire \gpio_resetn_1_shifted[13] ;
+  wire \gpio_resetn_1_shifted[14] ;
+  wire \gpio_resetn_1_shifted[15] ;
+  wire \gpio_resetn_1_shifted[16] ;
+  wire \gpio_resetn_1_shifted[17] ;
+  wire \gpio_resetn_1_shifted[18] ;
+  wire \gpio_resetn_1_shifted[1] ;
+  wire \gpio_resetn_1_shifted[2] ;
+  wire \gpio_resetn_1_shifted[3] ;
+  wire \gpio_resetn_1_shifted[4] ;
+  wire \gpio_resetn_1_shifted[5] ;
+  wire \gpio_resetn_1_shifted[6] ;
+  wire \gpio_resetn_1_shifted[7] ;
+  wire \gpio_resetn_1_shifted[8] ;
+  wire \gpio_resetn_1_shifted[9] ;
+  wire \gpio_resetn_2[0] ;
+  wire \gpio_resetn_2[10] ;
+  wire \gpio_resetn_2[11] ;
+  wire \gpio_resetn_2[12] ;
+  wire \gpio_resetn_2[13] ;
+  wire \gpio_resetn_2[14] ;
+  wire \gpio_resetn_2[15] ;
+  wire \gpio_resetn_2[16] ;
+  wire \gpio_resetn_2[17] ;
+  wire \gpio_resetn_2[18] ;
+  wire \gpio_resetn_2[1] ;
+  wire \gpio_resetn_2[2] ;
+  wire \gpio_resetn_2[3] ;
+  wire \gpio_resetn_2[4] ;
+  wire \gpio_resetn_2[5] ;
+  wire \gpio_resetn_2[6] ;
+  wire \gpio_resetn_2[7] ;
+  wire \gpio_resetn_2[8] ;
+  wire \gpio_resetn_2[9] ;
+  wire \gpio_resetn_2_shifted[0] ;
+  wire \gpio_resetn_2_shifted[10] ;
+  wire \gpio_resetn_2_shifted[11] ;
+  wire \gpio_resetn_2_shifted[12] ;
+  wire \gpio_resetn_2_shifted[13] ;
+  wire \gpio_resetn_2_shifted[14] ;
+  wire \gpio_resetn_2_shifted[15] ;
+  wire \gpio_resetn_2_shifted[16] ;
+  wire \gpio_resetn_2_shifted[17] ;
+  wire \gpio_resetn_2_shifted[18] ;
+  wire \gpio_resetn_2_shifted[1] ;
+  wire \gpio_resetn_2_shifted[2] ;
+  wire \gpio_resetn_2_shifted[3] ;
+  wire \gpio_resetn_2_shifted[4] ;
+  wire \gpio_resetn_2_shifted[5] ;
+  wire \gpio_resetn_2_shifted[6] ;
+  wire \gpio_resetn_2_shifted[7] ;
+  wire \gpio_resetn_2_shifted[8] ;
+  wire \gpio_resetn_2_shifted[9] ;
+  wire \gpio_serial_link_1[0] ;
+  wire \gpio_serial_link_1[10] ;
+  wire \gpio_serial_link_1[11] ;
+  wire \gpio_serial_link_1[12] ;
+  wire \gpio_serial_link_1[13] ;
+  wire \gpio_serial_link_1[14] ;
+  wire \gpio_serial_link_1[15] ;
+  wire \gpio_serial_link_1[16] ;
+  wire \gpio_serial_link_1[17] ;
+  wire \gpio_serial_link_1[18] ;
+  wire \gpio_serial_link_1[1] ;
+  wire \gpio_serial_link_1[2] ;
+  wire \gpio_serial_link_1[3] ;
+  wire \gpio_serial_link_1[4] ;
+  wire \gpio_serial_link_1[5] ;
+  wire \gpio_serial_link_1[6] ;
+  wire \gpio_serial_link_1[7] ;
+  wire \gpio_serial_link_1[8] ;
+  wire \gpio_serial_link_1[9] ;
+  wire \gpio_serial_link_1_shifted[0] ;
+  wire \gpio_serial_link_1_shifted[10] ;
+  wire \gpio_serial_link_1_shifted[11] ;
+  wire \gpio_serial_link_1_shifted[12] ;
+  wire \gpio_serial_link_1_shifted[13] ;
+  wire \gpio_serial_link_1_shifted[14] ;
+  wire \gpio_serial_link_1_shifted[15] ;
+  wire \gpio_serial_link_1_shifted[16] ;
+  wire \gpio_serial_link_1_shifted[17] ;
+  wire \gpio_serial_link_1_shifted[18] ;
+  wire \gpio_serial_link_1_shifted[1] ;
+  wire \gpio_serial_link_1_shifted[2] ;
+  wire \gpio_serial_link_1_shifted[3] ;
+  wire \gpio_serial_link_1_shifted[4] ;
+  wire \gpio_serial_link_1_shifted[5] ;
+  wire \gpio_serial_link_1_shifted[6] ;
+  wire \gpio_serial_link_1_shifted[7] ;
+  wire \gpio_serial_link_1_shifted[8] ;
+  wire \gpio_serial_link_1_shifted[9] ;
+  wire \gpio_serial_link_2[0] ;
+  wire \gpio_serial_link_2[10] ;
+  wire \gpio_serial_link_2[11] ;
+  wire \gpio_serial_link_2[12] ;
+  wire \gpio_serial_link_2[13] ;
+  wire \gpio_serial_link_2[14] ;
+  wire \gpio_serial_link_2[15] ;
+  wire \gpio_serial_link_2[16] ;
+  wire \gpio_serial_link_2[17] ;
+  wire \gpio_serial_link_2[18] ;
+  wire \gpio_serial_link_2[1] ;
+  wire \gpio_serial_link_2[2] ;
+  wire \gpio_serial_link_2[3] ;
+  wire \gpio_serial_link_2[4] ;
+  wire \gpio_serial_link_2[5] ;
+  wire \gpio_serial_link_2[6] ;
+  wire \gpio_serial_link_2[7] ;
+  wire \gpio_serial_link_2[8] ;
+  wire \gpio_serial_link_2[9] ;
+  wire \gpio_serial_link_2_shifted[0] ;
+  wire \gpio_serial_link_2_shifted[10] ;
+  wire \gpio_serial_link_2_shifted[11] ;
+  wire \gpio_serial_link_2_shifted[12] ;
+  wire \gpio_serial_link_2_shifted[13] ;
+  wire \gpio_serial_link_2_shifted[14] ;
+  wire \gpio_serial_link_2_shifted[15] ;
+  wire \gpio_serial_link_2_shifted[16] ;
+  wire \gpio_serial_link_2_shifted[17] ;
+  wire \gpio_serial_link_2_shifted[18] ;
+  wire \gpio_serial_link_2_shifted[1] ;
+  wire \gpio_serial_link_2_shifted[2] ;
+  wire \gpio_serial_link_2_shifted[3] ;
+  wire \gpio_serial_link_2_shifted[4] ;
+  wire \gpio_serial_link_2_shifted[5] ;
+  wire \gpio_serial_link_2_shifted[6] ;
+  wire \gpio_serial_link_2_shifted[7] ;
+  wire \gpio_serial_link_2_shifted[8] ;
+  wire \gpio_serial_link_2_shifted[9] ;
+  wire hk_ack_i;
+  wire hk_cyc_o;
+  wire \hk_dat_i[0] ;
+  wire \hk_dat_i[10] ;
+  wire \hk_dat_i[11] ;
+  wire \hk_dat_i[12] ;
+  wire \hk_dat_i[13] ;
+  wire \hk_dat_i[14] ;
+  wire \hk_dat_i[15] ;
+  wire \hk_dat_i[16] ;
+  wire \hk_dat_i[17] ;
+  wire \hk_dat_i[18] ;
+  wire \hk_dat_i[19] ;
+  wire \hk_dat_i[1] ;
+  wire \hk_dat_i[20] ;
+  wire \hk_dat_i[21] ;
+  wire \hk_dat_i[22] ;
+  wire \hk_dat_i[23] ;
+  wire \hk_dat_i[24] ;
+  wire \hk_dat_i[25] ;
+  wire \hk_dat_i[26] ;
+  wire \hk_dat_i[27] ;
+  wire \hk_dat_i[28] ;
+  wire \hk_dat_i[29] ;
+  wire \hk_dat_i[2] ;
+  wire \hk_dat_i[30] ;
+  wire \hk_dat_i[31] ;
+  wire \hk_dat_i[3] ;
+  wire \hk_dat_i[4] ;
+  wire \hk_dat_i[5] ;
+  wire \hk_dat_i[6] ;
+  wire \hk_dat_i[7] ;
+  wire \hk_dat_i[8] ;
+  wire \hk_dat_i[9] ;
+  wire hk_stb_o;
+  wire \irq_spi[0] ;
+  wire \irq_spi[1] ;
+  wire \irq_spi[2] ;
+  wire \la_data_in_mprj[0] ;
+  wire \la_data_in_mprj[100] ;
+  wire \la_data_in_mprj[101] ;
+  wire \la_data_in_mprj[102] ;
+  wire \la_data_in_mprj[103] ;
+  wire \la_data_in_mprj[104] ;
+  wire \la_data_in_mprj[105] ;
+  wire \la_data_in_mprj[106] ;
+  wire \la_data_in_mprj[107] ;
+  wire \la_data_in_mprj[108] ;
+  wire \la_data_in_mprj[109] ;
+  wire \la_data_in_mprj[10] ;
+  wire \la_data_in_mprj[110] ;
+  wire \la_data_in_mprj[111] ;
+  wire \la_data_in_mprj[112] ;
+  wire \la_data_in_mprj[113] ;
+  wire \la_data_in_mprj[114] ;
+  wire \la_data_in_mprj[115] ;
+  wire \la_data_in_mprj[116] ;
+  wire \la_data_in_mprj[117] ;
+  wire \la_data_in_mprj[118] ;
+  wire \la_data_in_mprj[119] ;
+  wire \la_data_in_mprj[11] ;
+  wire \la_data_in_mprj[120] ;
+  wire \la_data_in_mprj[121] ;
+  wire \la_data_in_mprj[122] ;
+  wire \la_data_in_mprj[123] ;
+  wire \la_data_in_mprj[124] ;
+  wire \la_data_in_mprj[125] ;
+  wire \la_data_in_mprj[126] ;
+  wire \la_data_in_mprj[127] ;
+  wire \la_data_in_mprj[12] ;
+  wire \la_data_in_mprj[13] ;
+  wire \la_data_in_mprj[14] ;
+  wire \la_data_in_mprj[15] ;
+  wire \la_data_in_mprj[16] ;
+  wire \la_data_in_mprj[17] ;
+  wire \la_data_in_mprj[18] ;
+  wire \la_data_in_mprj[19] ;
+  wire \la_data_in_mprj[1] ;
+  wire \la_data_in_mprj[20] ;
+  wire \la_data_in_mprj[21] ;
+  wire \la_data_in_mprj[22] ;
+  wire \la_data_in_mprj[23] ;
+  wire \la_data_in_mprj[24] ;
+  wire \la_data_in_mprj[25] ;
+  wire \la_data_in_mprj[26] ;
+  wire \la_data_in_mprj[27] ;
+  wire \la_data_in_mprj[28] ;
+  wire \la_data_in_mprj[29] ;
+  wire \la_data_in_mprj[2] ;
+  wire \la_data_in_mprj[30] ;
+  wire \la_data_in_mprj[31] ;
+  wire \la_data_in_mprj[32] ;
+  wire \la_data_in_mprj[33] ;
+  wire \la_data_in_mprj[34] ;
+  wire \la_data_in_mprj[35] ;
+  wire \la_data_in_mprj[36] ;
+  wire \la_data_in_mprj[37] ;
+  wire \la_data_in_mprj[38] ;
+  wire \la_data_in_mprj[39] ;
+  wire \la_data_in_mprj[3] ;
+  wire \la_data_in_mprj[40] ;
+  wire \la_data_in_mprj[41] ;
+  wire \la_data_in_mprj[42] ;
+  wire \la_data_in_mprj[43] ;
+  wire \la_data_in_mprj[44] ;
+  wire \la_data_in_mprj[45] ;
+  wire \la_data_in_mprj[46] ;
+  wire \la_data_in_mprj[47] ;
+  wire \la_data_in_mprj[48] ;
+  wire \la_data_in_mprj[49] ;
+  wire \la_data_in_mprj[4] ;
+  wire \la_data_in_mprj[50] ;
+  wire \la_data_in_mprj[51] ;
+  wire \la_data_in_mprj[52] ;
+  wire \la_data_in_mprj[53] ;
+  wire \la_data_in_mprj[54] ;
+  wire \la_data_in_mprj[55] ;
+  wire \la_data_in_mprj[56] ;
+  wire \la_data_in_mprj[57] ;
+  wire \la_data_in_mprj[58] ;
+  wire \la_data_in_mprj[59] ;
+  wire \la_data_in_mprj[5] ;
+  wire \la_data_in_mprj[60] ;
+  wire \la_data_in_mprj[61] ;
+  wire \la_data_in_mprj[62] ;
+  wire \la_data_in_mprj[63] ;
+  wire \la_data_in_mprj[64] ;
+  wire \la_data_in_mprj[65] ;
+  wire \la_data_in_mprj[66] ;
+  wire \la_data_in_mprj[67] ;
+  wire \la_data_in_mprj[68] ;
+  wire \la_data_in_mprj[69] ;
+  wire \la_data_in_mprj[6] ;
+  wire \la_data_in_mprj[70] ;
+  wire \la_data_in_mprj[71] ;
+  wire \la_data_in_mprj[72] ;
+  wire \la_data_in_mprj[73] ;
+  wire \la_data_in_mprj[74] ;
+  wire \la_data_in_mprj[75] ;
+  wire \la_data_in_mprj[76] ;
+  wire \la_data_in_mprj[77] ;
+  wire \la_data_in_mprj[78] ;
+  wire \la_data_in_mprj[79] ;
+  wire \la_data_in_mprj[7] ;
+  wire \la_data_in_mprj[80] ;
+  wire \la_data_in_mprj[81] ;
+  wire \la_data_in_mprj[82] ;
+  wire \la_data_in_mprj[83] ;
+  wire \la_data_in_mprj[84] ;
+  wire \la_data_in_mprj[85] ;
+  wire \la_data_in_mprj[86] ;
+  wire \la_data_in_mprj[87] ;
+  wire \la_data_in_mprj[88] ;
+  wire \la_data_in_mprj[89] ;
+  wire \la_data_in_mprj[8] ;
+  wire \la_data_in_mprj[90] ;
+  wire \la_data_in_mprj[91] ;
+  wire \la_data_in_mprj[92] ;
+  wire \la_data_in_mprj[93] ;
+  wire \la_data_in_mprj[94] ;
+  wire \la_data_in_mprj[95] ;
+  wire \la_data_in_mprj[96] ;
+  wire \la_data_in_mprj[97] ;
+  wire \la_data_in_mprj[98] ;
+  wire \la_data_in_mprj[99] ;
+  wire \la_data_in_mprj[9] ;
+  wire \la_data_in_user[0] ;
+  wire \la_data_in_user[100] ;
+  wire \la_data_in_user[101] ;
+  wire \la_data_in_user[102] ;
+  wire \la_data_in_user[103] ;
+  wire \la_data_in_user[104] ;
+  wire \la_data_in_user[105] ;
+  wire \la_data_in_user[106] ;
+  wire \la_data_in_user[107] ;
+  wire \la_data_in_user[108] ;
+  wire \la_data_in_user[109] ;
+  wire \la_data_in_user[10] ;
+  wire \la_data_in_user[110] ;
+  wire \la_data_in_user[111] ;
+  wire \la_data_in_user[112] ;
+  wire \la_data_in_user[113] ;
+  wire \la_data_in_user[114] ;
+  wire \la_data_in_user[115] ;
+  wire \la_data_in_user[116] ;
+  wire \la_data_in_user[117] ;
+  wire \la_data_in_user[118] ;
+  wire \la_data_in_user[119] ;
+  wire \la_data_in_user[11] ;
+  wire \la_data_in_user[120] ;
+  wire \la_data_in_user[121] ;
+  wire \la_data_in_user[122] ;
+  wire \la_data_in_user[123] ;
+  wire \la_data_in_user[124] ;
+  wire \la_data_in_user[125] ;
+  wire \la_data_in_user[126] ;
+  wire \la_data_in_user[127] ;
+  wire \la_data_in_user[12] ;
+  wire \la_data_in_user[13] ;
+  wire \la_data_in_user[14] ;
+  wire \la_data_in_user[15] ;
+  wire \la_data_in_user[16] ;
+  wire \la_data_in_user[17] ;
+  wire \la_data_in_user[18] ;
+  wire \la_data_in_user[19] ;
+  wire \la_data_in_user[1] ;
+  wire \la_data_in_user[20] ;
+  wire \la_data_in_user[21] ;
+  wire \la_data_in_user[22] ;
+  wire \la_data_in_user[23] ;
+  wire \la_data_in_user[24] ;
+  wire \la_data_in_user[25] ;
+  wire \la_data_in_user[26] ;
+  wire \la_data_in_user[27] ;
+  wire \la_data_in_user[28] ;
+  wire \la_data_in_user[29] ;
+  wire \la_data_in_user[2] ;
+  wire \la_data_in_user[30] ;
+  wire \la_data_in_user[31] ;
+  wire \la_data_in_user[32] ;
+  wire \la_data_in_user[33] ;
+  wire \la_data_in_user[34] ;
+  wire \la_data_in_user[35] ;
+  wire \la_data_in_user[36] ;
+  wire \la_data_in_user[37] ;
+  wire \la_data_in_user[38] ;
+  wire \la_data_in_user[39] ;
+  wire \la_data_in_user[3] ;
+  wire \la_data_in_user[40] ;
+  wire \la_data_in_user[41] ;
+  wire \la_data_in_user[42] ;
+  wire \la_data_in_user[43] ;
+  wire \la_data_in_user[44] ;
+  wire \la_data_in_user[45] ;
+  wire \la_data_in_user[46] ;
+  wire \la_data_in_user[47] ;
+  wire \la_data_in_user[48] ;
+  wire \la_data_in_user[49] ;
+  wire \la_data_in_user[4] ;
+  wire \la_data_in_user[50] ;
+  wire \la_data_in_user[51] ;
+  wire \la_data_in_user[52] ;
+  wire \la_data_in_user[53] ;
+  wire \la_data_in_user[54] ;
+  wire \la_data_in_user[55] ;
+  wire \la_data_in_user[56] ;
+  wire \la_data_in_user[57] ;
+  wire \la_data_in_user[58] ;
+  wire \la_data_in_user[59] ;
+  wire \la_data_in_user[5] ;
+  wire \la_data_in_user[60] ;
+  wire \la_data_in_user[61] ;
+  wire \la_data_in_user[62] ;
+  wire \la_data_in_user[63] ;
+  wire \la_data_in_user[64] ;
+  wire \la_data_in_user[65] ;
+  wire \la_data_in_user[66] ;
+  wire \la_data_in_user[67] ;
+  wire \la_data_in_user[68] ;
+  wire \la_data_in_user[69] ;
+  wire \la_data_in_user[6] ;
+  wire \la_data_in_user[70] ;
+  wire \la_data_in_user[71] ;
+  wire \la_data_in_user[72] ;
+  wire \la_data_in_user[73] ;
+  wire \la_data_in_user[74] ;
+  wire \la_data_in_user[75] ;
+  wire \la_data_in_user[76] ;
+  wire \la_data_in_user[77] ;
+  wire \la_data_in_user[78] ;
+  wire \la_data_in_user[79] ;
+  wire \la_data_in_user[7] ;
+  wire \la_data_in_user[80] ;
+  wire \la_data_in_user[81] ;
+  wire \la_data_in_user[82] ;
+  wire \la_data_in_user[83] ;
+  wire \la_data_in_user[84] ;
+  wire \la_data_in_user[85] ;
+  wire \la_data_in_user[86] ;
+  wire \la_data_in_user[87] ;
+  wire \la_data_in_user[88] ;
+  wire \la_data_in_user[89] ;
+  wire \la_data_in_user[8] ;
+  wire \la_data_in_user[90] ;
+  wire \la_data_in_user[91] ;
+  wire \la_data_in_user[92] ;
+  wire \la_data_in_user[93] ;
+  wire \la_data_in_user[94] ;
+  wire \la_data_in_user[95] ;
+  wire \la_data_in_user[96] ;
+  wire \la_data_in_user[97] ;
+  wire \la_data_in_user[98] ;
+  wire \la_data_in_user[99] ;
+  wire \la_data_in_user[9] ;
+  wire \la_data_out_mprj[0] ;
+  wire \la_data_out_mprj[100] ;
+  wire \la_data_out_mprj[101] ;
+  wire \la_data_out_mprj[102] ;
+  wire \la_data_out_mprj[103] ;
+  wire \la_data_out_mprj[104] ;
+  wire \la_data_out_mprj[105] ;
+  wire \la_data_out_mprj[106] ;
+  wire \la_data_out_mprj[107] ;
+  wire \la_data_out_mprj[108] ;
+  wire \la_data_out_mprj[109] ;
+  wire \la_data_out_mprj[10] ;
+  wire \la_data_out_mprj[110] ;
+  wire \la_data_out_mprj[111] ;
+  wire \la_data_out_mprj[112] ;
+  wire \la_data_out_mprj[113] ;
+  wire \la_data_out_mprj[114] ;
+  wire \la_data_out_mprj[115] ;
+  wire \la_data_out_mprj[116] ;
+  wire \la_data_out_mprj[117] ;
+  wire \la_data_out_mprj[118] ;
+  wire \la_data_out_mprj[119] ;
+  wire \la_data_out_mprj[11] ;
+  wire \la_data_out_mprj[120] ;
+  wire \la_data_out_mprj[121] ;
+  wire \la_data_out_mprj[122] ;
+  wire \la_data_out_mprj[123] ;
+  wire \la_data_out_mprj[124] ;
+  wire \la_data_out_mprj[125] ;
+  wire \la_data_out_mprj[126] ;
+  wire \la_data_out_mprj[127] ;
+  wire \la_data_out_mprj[12] ;
+  wire \la_data_out_mprj[13] ;
+  wire \la_data_out_mprj[14] ;
+  wire \la_data_out_mprj[15] ;
+  wire \la_data_out_mprj[16] ;
+  wire \la_data_out_mprj[17] ;
+  wire \la_data_out_mprj[18] ;
+  wire \la_data_out_mprj[19] ;
+  wire \la_data_out_mprj[1] ;
+  wire \la_data_out_mprj[20] ;
+  wire \la_data_out_mprj[21] ;
+  wire \la_data_out_mprj[22] ;
+  wire \la_data_out_mprj[23] ;
+  wire \la_data_out_mprj[24] ;
+  wire \la_data_out_mprj[25] ;
+  wire \la_data_out_mprj[26] ;
+  wire \la_data_out_mprj[27] ;
+  wire \la_data_out_mprj[28] ;
+  wire \la_data_out_mprj[29] ;
+  wire \la_data_out_mprj[2] ;
+  wire \la_data_out_mprj[30] ;
+  wire \la_data_out_mprj[31] ;
+  wire \la_data_out_mprj[32] ;
+  wire \la_data_out_mprj[33] ;
+  wire \la_data_out_mprj[34] ;
+  wire \la_data_out_mprj[35] ;
+  wire \la_data_out_mprj[36] ;
+  wire \la_data_out_mprj[37] ;
+  wire \la_data_out_mprj[38] ;
+  wire \la_data_out_mprj[39] ;
+  wire \la_data_out_mprj[3] ;
+  wire \la_data_out_mprj[40] ;
+  wire \la_data_out_mprj[41] ;
+  wire \la_data_out_mprj[42] ;
+  wire \la_data_out_mprj[43] ;
+  wire \la_data_out_mprj[44] ;
+  wire \la_data_out_mprj[45] ;
+  wire \la_data_out_mprj[46] ;
+  wire \la_data_out_mprj[47] ;
+  wire \la_data_out_mprj[48] ;
+  wire \la_data_out_mprj[49] ;
+  wire \la_data_out_mprj[4] ;
+  wire \la_data_out_mprj[50] ;
+  wire \la_data_out_mprj[51] ;
+  wire \la_data_out_mprj[52] ;
+  wire \la_data_out_mprj[53] ;
+  wire \la_data_out_mprj[54] ;
+  wire \la_data_out_mprj[55] ;
+  wire \la_data_out_mprj[56] ;
+  wire \la_data_out_mprj[57] ;
+  wire \la_data_out_mprj[58] ;
+  wire \la_data_out_mprj[59] ;
+  wire \la_data_out_mprj[5] ;
+  wire \la_data_out_mprj[60] ;
+  wire \la_data_out_mprj[61] ;
+  wire \la_data_out_mprj[62] ;
+  wire \la_data_out_mprj[63] ;
+  wire \la_data_out_mprj[64] ;
+  wire \la_data_out_mprj[65] ;
+  wire \la_data_out_mprj[66] ;
+  wire \la_data_out_mprj[67] ;
+  wire \la_data_out_mprj[68] ;
+  wire \la_data_out_mprj[69] ;
+  wire \la_data_out_mprj[6] ;
+  wire \la_data_out_mprj[70] ;
+  wire \la_data_out_mprj[71] ;
+  wire \la_data_out_mprj[72] ;
+  wire \la_data_out_mprj[73] ;
+  wire \la_data_out_mprj[74] ;
+  wire \la_data_out_mprj[75] ;
+  wire \la_data_out_mprj[76] ;
+  wire \la_data_out_mprj[77] ;
+  wire \la_data_out_mprj[78] ;
+  wire \la_data_out_mprj[79] ;
+  wire \la_data_out_mprj[7] ;
+  wire \la_data_out_mprj[80] ;
+  wire \la_data_out_mprj[81] ;
+  wire \la_data_out_mprj[82] ;
+  wire \la_data_out_mprj[83] ;
+  wire \la_data_out_mprj[84] ;
+  wire \la_data_out_mprj[85] ;
+  wire \la_data_out_mprj[86] ;
+  wire \la_data_out_mprj[87] ;
+  wire \la_data_out_mprj[88] ;
+  wire \la_data_out_mprj[89] ;
+  wire \la_data_out_mprj[8] ;
+  wire \la_data_out_mprj[90] ;
+  wire \la_data_out_mprj[91] ;
+  wire \la_data_out_mprj[92] ;
+  wire \la_data_out_mprj[93] ;
+  wire \la_data_out_mprj[94] ;
+  wire \la_data_out_mprj[95] ;
+  wire \la_data_out_mprj[96] ;
+  wire \la_data_out_mprj[97] ;
+  wire \la_data_out_mprj[98] ;
+  wire \la_data_out_mprj[99] ;
+  wire \la_data_out_mprj[9] ;
+  wire \la_data_out_user[0] ;
+  wire \la_data_out_user[100] ;
+  wire \la_data_out_user[101] ;
+  wire \la_data_out_user[102] ;
+  wire \la_data_out_user[103] ;
+  wire \la_data_out_user[104] ;
+  wire \la_data_out_user[105] ;
+  wire \la_data_out_user[106] ;
+  wire \la_data_out_user[107] ;
+  wire \la_data_out_user[108] ;
+  wire \la_data_out_user[109] ;
+  wire \la_data_out_user[10] ;
+  wire \la_data_out_user[110] ;
+  wire \la_data_out_user[111] ;
+  wire \la_data_out_user[112] ;
+  wire \la_data_out_user[113] ;
+  wire \la_data_out_user[114] ;
+  wire \la_data_out_user[115] ;
+  wire \la_data_out_user[116] ;
+  wire \la_data_out_user[117] ;
+  wire \la_data_out_user[118] ;
+  wire \la_data_out_user[119] ;
+  wire \la_data_out_user[11] ;
+  wire \la_data_out_user[120] ;
+  wire \la_data_out_user[121] ;
+  wire \la_data_out_user[122] ;
+  wire \la_data_out_user[123] ;
+  wire \la_data_out_user[124] ;
+  wire \la_data_out_user[125] ;
+  wire \la_data_out_user[126] ;
+  wire \la_data_out_user[127] ;
+  wire \la_data_out_user[12] ;
+  wire \la_data_out_user[13] ;
+  wire \la_data_out_user[14] ;
+  wire \la_data_out_user[15] ;
+  wire \la_data_out_user[16] ;
+  wire \la_data_out_user[17] ;
+  wire \la_data_out_user[18] ;
+  wire \la_data_out_user[19] ;
+  wire \la_data_out_user[1] ;
+  wire \la_data_out_user[20] ;
+  wire \la_data_out_user[21] ;
+  wire \la_data_out_user[22] ;
+  wire \la_data_out_user[23] ;
+  wire \la_data_out_user[24] ;
+  wire \la_data_out_user[25] ;
+  wire \la_data_out_user[26] ;
+  wire \la_data_out_user[27] ;
+  wire \la_data_out_user[28] ;
+  wire \la_data_out_user[29] ;
+  wire \la_data_out_user[2] ;
+  wire \la_data_out_user[30] ;
+  wire \la_data_out_user[31] ;
+  wire \la_data_out_user[32] ;
+  wire \la_data_out_user[33] ;
+  wire \la_data_out_user[34] ;
+  wire \la_data_out_user[35] ;
+  wire \la_data_out_user[36] ;
+  wire \la_data_out_user[37] ;
+  wire \la_data_out_user[38] ;
+  wire \la_data_out_user[39] ;
+  wire \la_data_out_user[3] ;
+  wire \la_data_out_user[40] ;
+  wire \la_data_out_user[41] ;
+  wire \la_data_out_user[42] ;
+  wire \la_data_out_user[43] ;
+  wire \la_data_out_user[44] ;
+  wire \la_data_out_user[45] ;
+  wire \la_data_out_user[46] ;
+  wire \la_data_out_user[47] ;
+  wire \la_data_out_user[48] ;
+  wire \la_data_out_user[49] ;
+  wire \la_data_out_user[4] ;
+  wire \la_data_out_user[50] ;
+  wire \la_data_out_user[51] ;
+  wire \la_data_out_user[52] ;
+  wire \la_data_out_user[53] ;
+  wire \la_data_out_user[54] ;
+  wire \la_data_out_user[55] ;
+  wire \la_data_out_user[56] ;
+  wire \la_data_out_user[57] ;
+  wire \la_data_out_user[58] ;
+  wire \la_data_out_user[59] ;
+  wire \la_data_out_user[5] ;
+  wire \la_data_out_user[60] ;
+  wire \la_data_out_user[61] ;
+  wire \la_data_out_user[62] ;
+  wire \la_data_out_user[63] ;
+  wire \la_data_out_user[64] ;
+  wire \la_data_out_user[65] ;
+  wire \la_data_out_user[66] ;
+  wire \la_data_out_user[67] ;
+  wire \la_data_out_user[68] ;
+  wire \la_data_out_user[69] ;
+  wire \la_data_out_user[6] ;
+  wire \la_data_out_user[70] ;
+  wire \la_data_out_user[71] ;
+  wire \la_data_out_user[72] ;
+  wire \la_data_out_user[73] ;
+  wire \la_data_out_user[74] ;
+  wire \la_data_out_user[75] ;
+  wire \la_data_out_user[76] ;
+  wire \la_data_out_user[77] ;
+  wire \la_data_out_user[78] ;
+  wire \la_data_out_user[79] ;
+  wire \la_data_out_user[7] ;
+  wire \la_data_out_user[80] ;
+  wire \la_data_out_user[81] ;
+  wire \la_data_out_user[82] ;
+  wire \la_data_out_user[83] ;
+  wire \la_data_out_user[84] ;
+  wire \la_data_out_user[85] ;
+  wire \la_data_out_user[86] ;
+  wire \la_data_out_user[87] ;
+  wire \la_data_out_user[88] ;
+  wire \la_data_out_user[89] ;
+  wire \la_data_out_user[8] ;
+  wire \la_data_out_user[90] ;
+  wire \la_data_out_user[91] ;
+  wire \la_data_out_user[92] ;
+  wire \la_data_out_user[93] ;
+  wire \la_data_out_user[94] ;
+  wire \la_data_out_user[95] ;
+  wire \la_data_out_user[96] ;
+  wire \la_data_out_user[97] ;
+  wire \la_data_out_user[98] ;
+  wire \la_data_out_user[99] ;
+  wire \la_data_out_user[9] ;
+  wire \la_iena_mprj[0] ;
+  wire \la_iena_mprj[100] ;
+  wire \la_iena_mprj[101] ;
+  wire \la_iena_mprj[102] ;
+  wire \la_iena_mprj[103] ;
+  wire \la_iena_mprj[104] ;
+  wire \la_iena_mprj[105] ;
+  wire \la_iena_mprj[106] ;
+  wire \la_iena_mprj[107] ;
+  wire \la_iena_mprj[108] ;
+  wire \la_iena_mprj[109] ;
+  wire \la_iena_mprj[10] ;
+  wire \la_iena_mprj[110] ;
+  wire \la_iena_mprj[111] ;
+  wire \la_iena_mprj[112] ;
+  wire \la_iena_mprj[113] ;
+  wire \la_iena_mprj[114] ;
+  wire \la_iena_mprj[115] ;
+  wire \la_iena_mprj[116] ;
+  wire \la_iena_mprj[117] ;
+  wire \la_iena_mprj[118] ;
+  wire \la_iena_mprj[119] ;
+  wire \la_iena_mprj[11] ;
+  wire \la_iena_mprj[120] ;
+  wire \la_iena_mprj[121] ;
+  wire \la_iena_mprj[122] ;
+  wire \la_iena_mprj[123] ;
+  wire \la_iena_mprj[124] ;
+  wire \la_iena_mprj[125] ;
+  wire \la_iena_mprj[126] ;
+  wire \la_iena_mprj[127] ;
+  wire \la_iena_mprj[12] ;
+  wire \la_iena_mprj[13] ;
+  wire \la_iena_mprj[14] ;
+  wire \la_iena_mprj[15] ;
+  wire \la_iena_mprj[16] ;
+  wire \la_iena_mprj[17] ;
+  wire \la_iena_mprj[18] ;
+  wire \la_iena_mprj[19] ;
+  wire \la_iena_mprj[1] ;
+  wire \la_iena_mprj[20] ;
+  wire \la_iena_mprj[21] ;
+  wire \la_iena_mprj[22] ;
+  wire \la_iena_mprj[23] ;
+  wire \la_iena_mprj[24] ;
+  wire \la_iena_mprj[25] ;
+  wire \la_iena_mprj[26] ;
+  wire \la_iena_mprj[27] ;
+  wire \la_iena_mprj[28] ;
+  wire \la_iena_mprj[29] ;
+  wire \la_iena_mprj[2] ;
+  wire \la_iena_mprj[30] ;
+  wire \la_iena_mprj[31] ;
+  wire \la_iena_mprj[32] ;
+  wire \la_iena_mprj[33] ;
+  wire \la_iena_mprj[34] ;
+  wire \la_iena_mprj[35] ;
+  wire \la_iena_mprj[36] ;
+  wire \la_iena_mprj[37] ;
+  wire \la_iena_mprj[38] ;
+  wire \la_iena_mprj[39] ;
+  wire \la_iena_mprj[3] ;
+  wire \la_iena_mprj[40] ;
+  wire \la_iena_mprj[41] ;
+  wire \la_iena_mprj[42] ;
+  wire \la_iena_mprj[43] ;
+  wire \la_iena_mprj[44] ;
+  wire \la_iena_mprj[45] ;
+  wire \la_iena_mprj[46] ;
+  wire \la_iena_mprj[47] ;
+  wire \la_iena_mprj[48] ;
+  wire \la_iena_mprj[49] ;
+  wire \la_iena_mprj[4] ;
+  wire \la_iena_mprj[50] ;
+  wire \la_iena_mprj[51] ;
+  wire \la_iena_mprj[52] ;
+  wire \la_iena_mprj[53] ;
+  wire \la_iena_mprj[54] ;
+  wire \la_iena_mprj[55] ;
+  wire \la_iena_mprj[56] ;
+  wire \la_iena_mprj[57] ;
+  wire \la_iena_mprj[58] ;
+  wire \la_iena_mprj[59] ;
+  wire \la_iena_mprj[5] ;
+  wire \la_iena_mprj[60] ;
+  wire \la_iena_mprj[61] ;
+  wire \la_iena_mprj[62] ;
+  wire \la_iena_mprj[63] ;
+  wire \la_iena_mprj[64] ;
+  wire \la_iena_mprj[65] ;
+  wire \la_iena_mprj[66] ;
+  wire \la_iena_mprj[67] ;
+  wire \la_iena_mprj[68] ;
+  wire \la_iena_mprj[69] ;
+  wire \la_iena_mprj[6] ;
+  wire \la_iena_mprj[70] ;
+  wire \la_iena_mprj[71] ;
+  wire \la_iena_mprj[72] ;
+  wire \la_iena_mprj[73] ;
+  wire \la_iena_mprj[74] ;
+  wire \la_iena_mprj[75] ;
+  wire \la_iena_mprj[76] ;
+  wire \la_iena_mprj[77] ;
+  wire \la_iena_mprj[78] ;
+  wire \la_iena_mprj[79] ;
+  wire \la_iena_mprj[7] ;
+  wire \la_iena_mprj[80] ;
+  wire \la_iena_mprj[81] ;
+  wire \la_iena_mprj[82] ;
+  wire \la_iena_mprj[83] ;
+  wire \la_iena_mprj[84] ;
+  wire \la_iena_mprj[85] ;
+  wire \la_iena_mprj[86] ;
+  wire \la_iena_mprj[87] ;
+  wire \la_iena_mprj[88] ;
+  wire \la_iena_mprj[89] ;
+  wire \la_iena_mprj[8] ;
+  wire \la_iena_mprj[90] ;
+  wire \la_iena_mprj[91] ;
+  wire \la_iena_mprj[92] ;
+  wire \la_iena_mprj[93] ;
+  wire \la_iena_mprj[94] ;
+  wire \la_iena_mprj[95] ;
+  wire \la_iena_mprj[96] ;
+  wire \la_iena_mprj[97] ;
+  wire \la_iena_mprj[98] ;
+  wire \la_iena_mprj[99] ;
+  wire \la_iena_mprj[9] ;
+  wire \la_oenb_mprj[0] ;
+  wire \la_oenb_mprj[100] ;
+  wire \la_oenb_mprj[101] ;
+  wire \la_oenb_mprj[102] ;
+  wire \la_oenb_mprj[103] ;
+  wire \la_oenb_mprj[104] ;
+  wire \la_oenb_mprj[105] ;
+  wire \la_oenb_mprj[106] ;
+  wire \la_oenb_mprj[107] ;
+  wire \la_oenb_mprj[108] ;
+  wire \la_oenb_mprj[109] ;
+  wire \la_oenb_mprj[10] ;
+  wire \la_oenb_mprj[110] ;
+  wire \la_oenb_mprj[111] ;
+  wire \la_oenb_mprj[112] ;
+  wire \la_oenb_mprj[113] ;
+  wire \la_oenb_mprj[114] ;
+  wire \la_oenb_mprj[115] ;
+  wire \la_oenb_mprj[116] ;
+  wire \la_oenb_mprj[117] ;
+  wire \la_oenb_mprj[118] ;
+  wire \la_oenb_mprj[119] ;
+  wire \la_oenb_mprj[11] ;
+  wire \la_oenb_mprj[120] ;
+  wire \la_oenb_mprj[121] ;
+  wire \la_oenb_mprj[122] ;
+  wire \la_oenb_mprj[123] ;
+  wire \la_oenb_mprj[124] ;
+  wire \la_oenb_mprj[125] ;
+  wire \la_oenb_mprj[126] ;
+  wire \la_oenb_mprj[127] ;
+  wire \la_oenb_mprj[12] ;
+  wire \la_oenb_mprj[13] ;
+  wire \la_oenb_mprj[14] ;
+  wire \la_oenb_mprj[15] ;
+  wire \la_oenb_mprj[16] ;
+  wire \la_oenb_mprj[17] ;
+  wire \la_oenb_mprj[18] ;
+  wire \la_oenb_mprj[19] ;
+  wire \la_oenb_mprj[1] ;
+  wire \la_oenb_mprj[20] ;
+  wire \la_oenb_mprj[21] ;
+  wire \la_oenb_mprj[22] ;
+  wire \la_oenb_mprj[23] ;
+  wire \la_oenb_mprj[24] ;
+  wire \la_oenb_mprj[25] ;
+  wire \la_oenb_mprj[26] ;
+  wire \la_oenb_mprj[27] ;
+  wire \la_oenb_mprj[28] ;
+  wire \la_oenb_mprj[29] ;
+  wire \la_oenb_mprj[2] ;
+  wire \la_oenb_mprj[30] ;
+  wire \la_oenb_mprj[31] ;
+  wire \la_oenb_mprj[32] ;
+  wire \la_oenb_mprj[33] ;
+  wire \la_oenb_mprj[34] ;
+  wire \la_oenb_mprj[35] ;
+  wire \la_oenb_mprj[36] ;
+  wire \la_oenb_mprj[37] ;
+  wire \la_oenb_mprj[38] ;
+  wire \la_oenb_mprj[39] ;
+  wire \la_oenb_mprj[3] ;
+  wire \la_oenb_mprj[40] ;
+  wire \la_oenb_mprj[41] ;
+  wire \la_oenb_mprj[42] ;
+  wire \la_oenb_mprj[43] ;
+  wire \la_oenb_mprj[44] ;
+  wire \la_oenb_mprj[45] ;
+  wire \la_oenb_mprj[46] ;
+  wire \la_oenb_mprj[47] ;
+  wire \la_oenb_mprj[48] ;
+  wire \la_oenb_mprj[49] ;
+  wire \la_oenb_mprj[4] ;
+  wire \la_oenb_mprj[50] ;
+  wire \la_oenb_mprj[51] ;
+  wire \la_oenb_mprj[52] ;
+  wire \la_oenb_mprj[53] ;
+  wire \la_oenb_mprj[54] ;
+  wire \la_oenb_mprj[55] ;
+  wire \la_oenb_mprj[56] ;
+  wire \la_oenb_mprj[57] ;
+  wire \la_oenb_mprj[58] ;
+  wire \la_oenb_mprj[59] ;
+  wire \la_oenb_mprj[5] ;
+  wire \la_oenb_mprj[60] ;
+  wire \la_oenb_mprj[61] ;
+  wire \la_oenb_mprj[62] ;
+  wire \la_oenb_mprj[63] ;
+  wire \la_oenb_mprj[64] ;
+  wire \la_oenb_mprj[65] ;
+  wire \la_oenb_mprj[66] ;
+  wire \la_oenb_mprj[67] ;
+  wire \la_oenb_mprj[68] ;
+  wire \la_oenb_mprj[69] ;
+  wire \la_oenb_mprj[6] ;
+  wire \la_oenb_mprj[70] ;
+  wire \la_oenb_mprj[71] ;
+  wire \la_oenb_mprj[72] ;
+  wire \la_oenb_mprj[73] ;
+  wire \la_oenb_mprj[74] ;
+  wire \la_oenb_mprj[75] ;
+  wire \la_oenb_mprj[76] ;
+  wire \la_oenb_mprj[77] ;
+  wire \la_oenb_mprj[78] ;
+  wire \la_oenb_mprj[79] ;
+  wire \la_oenb_mprj[7] ;
+  wire \la_oenb_mprj[80] ;
+  wire \la_oenb_mprj[81] ;
+  wire \la_oenb_mprj[82] ;
+  wire \la_oenb_mprj[83] ;
+  wire \la_oenb_mprj[84] ;
+  wire \la_oenb_mprj[85] ;
+  wire \la_oenb_mprj[86] ;
+  wire \la_oenb_mprj[87] ;
+  wire \la_oenb_mprj[88] ;
+  wire \la_oenb_mprj[89] ;
+  wire \la_oenb_mprj[8] ;
+  wire \la_oenb_mprj[90] ;
+  wire \la_oenb_mprj[91] ;
+  wire \la_oenb_mprj[92] ;
+  wire \la_oenb_mprj[93] ;
+  wire \la_oenb_mprj[94] ;
+  wire \la_oenb_mprj[95] ;
+  wire \la_oenb_mprj[96] ;
+  wire \la_oenb_mprj[97] ;
+  wire \la_oenb_mprj[98] ;
+  wire \la_oenb_mprj[99] ;
+  wire \la_oenb_mprj[9] ;
+  wire \la_oenb_user[0] ;
+  wire \la_oenb_user[100] ;
+  wire \la_oenb_user[101] ;
+  wire \la_oenb_user[102] ;
+  wire \la_oenb_user[103] ;
+  wire \la_oenb_user[104] ;
+  wire \la_oenb_user[105] ;
+  wire \la_oenb_user[106] ;
+  wire \la_oenb_user[107] ;
+  wire \la_oenb_user[108] ;
+  wire \la_oenb_user[109] ;
+  wire \la_oenb_user[10] ;
+  wire \la_oenb_user[110] ;
+  wire \la_oenb_user[111] ;
+  wire \la_oenb_user[112] ;
+  wire \la_oenb_user[113] ;
+  wire \la_oenb_user[114] ;
+  wire \la_oenb_user[115] ;
+  wire \la_oenb_user[116] ;
+  wire \la_oenb_user[117] ;
+  wire \la_oenb_user[118] ;
+  wire \la_oenb_user[119] ;
+  wire \la_oenb_user[11] ;
+  wire \la_oenb_user[120] ;
+  wire \la_oenb_user[121] ;
+  wire \la_oenb_user[122] ;
+  wire \la_oenb_user[123] ;
+  wire \la_oenb_user[124] ;
+  wire \la_oenb_user[125] ;
+  wire \la_oenb_user[126] ;
+  wire \la_oenb_user[127] ;
+  wire \la_oenb_user[12] ;
+  wire \la_oenb_user[13] ;
+  wire \la_oenb_user[14] ;
+  wire \la_oenb_user[15] ;
+  wire \la_oenb_user[16] ;
+  wire \la_oenb_user[17] ;
+  wire \la_oenb_user[18] ;
+  wire \la_oenb_user[19] ;
+  wire \la_oenb_user[1] ;
+  wire \la_oenb_user[20] ;
+  wire \la_oenb_user[21] ;
+  wire \la_oenb_user[22] ;
+  wire \la_oenb_user[23] ;
+  wire \la_oenb_user[24] ;
+  wire \la_oenb_user[25] ;
+  wire \la_oenb_user[26] ;
+  wire \la_oenb_user[27] ;
+  wire \la_oenb_user[28] ;
+  wire \la_oenb_user[29] ;
+  wire \la_oenb_user[2] ;
+  wire \la_oenb_user[30] ;
+  wire \la_oenb_user[31] ;
+  wire \la_oenb_user[32] ;
+  wire \la_oenb_user[33] ;
+  wire \la_oenb_user[34] ;
+  wire \la_oenb_user[35] ;
+  wire \la_oenb_user[36] ;
+  wire \la_oenb_user[37] ;
+  wire \la_oenb_user[38] ;
+  wire \la_oenb_user[39] ;
+  wire \la_oenb_user[3] ;
+  wire \la_oenb_user[40] ;
+  wire \la_oenb_user[41] ;
+  wire \la_oenb_user[42] ;
+  wire \la_oenb_user[43] ;
+  wire \la_oenb_user[44] ;
+  wire \la_oenb_user[45] ;
+  wire \la_oenb_user[46] ;
+  wire \la_oenb_user[47] ;
+  wire \la_oenb_user[48] ;
+  wire \la_oenb_user[49] ;
+  wire \la_oenb_user[4] ;
+  wire \la_oenb_user[50] ;
+  wire \la_oenb_user[51] ;
+  wire \la_oenb_user[52] ;
+  wire \la_oenb_user[53] ;
+  wire \la_oenb_user[54] ;
+  wire \la_oenb_user[55] ;
+  wire \la_oenb_user[56] ;
+  wire \la_oenb_user[57] ;
+  wire \la_oenb_user[58] ;
+  wire \la_oenb_user[59] ;
+  wire \la_oenb_user[5] ;
+  wire \la_oenb_user[60] ;
+  wire \la_oenb_user[61] ;
+  wire \la_oenb_user[62] ;
+  wire \la_oenb_user[63] ;
+  wire \la_oenb_user[64] ;
+  wire \la_oenb_user[65] ;
+  wire \la_oenb_user[66] ;
+  wire \la_oenb_user[67] ;
+  wire \la_oenb_user[68] ;
+  wire \la_oenb_user[69] ;
+  wire \la_oenb_user[6] ;
+  wire \la_oenb_user[70] ;
+  wire \la_oenb_user[71] ;
+  wire \la_oenb_user[72] ;
+  wire \la_oenb_user[73] ;
+  wire \la_oenb_user[74] ;
+  wire \la_oenb_user[75] ;
+  wire \la_oenb_user[76] ;
+  wire \la_oenb_user[77] ;
+  wire \la_oenb_user[78] ;
+  wire \la_oenb_user[79] ;
+  wire \la_oenb_user[7] ;
+  wire \la_oenb_user[80] ;
+  wire \la_oenb_user[81] ;
+  wire \la_oenb_user[82] ;
+  wire \la_oenb_user[83] ;
+  wire \la_oenb_user[84] ;
+  wire \la_oenb_user[85] ;
+  wire \la_oenb_user[86] ;
+  wire \la_oenb_user[87] ;
+  wire \la_oenb_user[88] ;
+  wire \la_oenb_user[89] ;
+  wire \la_oenb_user[8] ;
+  wire \la_oenb_user[90] ;
+  wire \la_oenb_user[91] ;
+  wire \la_oenb_user[92] ;
+  wire \la_oenb_user[93] ;
+  wire \la_oenb_user[94] ;
+  wire \la_oenb_user[95] ;
+  wire \la_oenb_user[96] ;
+  wire \la_oenb_user[97] ;
+  wire \la_oenb_user[98] ;
+  wire \la_oenb_user[99] ;
+  wire \la_oenb_user[9] ;
+  wire \mask_rev[0] ;
+  wire \mask_rev[10] ;
+  wire \mask_rev[11] ;
+  wire \mask_rev[12] ;
+  wire \mask_rev[13] ;
+  wire \mask_rev[14] ;
+  wire \mask_rev[15] ;
+  wire \mask_rev[16] ;
+  wire \mask_rev[17] ;
+  wire \mask_rev[18] ;
+  wire \mask_rev[19] ;
+  wire \mask_rev[1] ;
+  wire \mask_rev[20] ;
+  wire \mask_rev[21] ;
+  wire \mask_rev[22] ;
+  wire \mask_rev[23] ;
+  wire \mask_rev[24] ;
+  wire \mask_rev[25] ;
+  wire \mask_rev[26] ;
+  wire \mask_rev[27] ;
+  wire \mask_rev[28] ;
+  wire \mask_rev[29] ;
+  wire \mask_rev[2] ;
+  wire \mask_rev[30] ;
+  wire \mask_rev[31] ;
+  wire \mask_rev[3] ;
+  wire \mask_rev[4] ;
+  wire \mask_rev[5] ;
+  wire \mask_rev[6] ;
+  wire \mask_rev[7] ;
+  wire \mask_rev[8] ;
+  wire \mask_rev[9] ;
+  wire \mgmt_io_in[0] ;
+  wire \mgmt_io_in[10] ;
+  wire \mgmt_io_in[11] ;
+  wire \mgmt_io_in[12] ;
+  wire \mgmt_io_in[13] ;
+  wire \mgmt_io_in[14] ;
+  wire \mgmt_io_in[15] ;
+  wire \mgmt_io_in[16] ;
+  wire \mgmt_io_in[17] ;
+  wire \mgmt_io_in[18] ;
+  wire \mgmt_io_in[19] ;
+  wire \mgmt_io_in[1] ;
+  wire \mgmt_io_in[20] ;
+  wire \mgmt_io_in[21] ;
+  wire \mgmt_io_in[22] ;
+  wire \mgmt_io_in[23] ;
+  wire \mgmt_io_in[24] ;
+  wire \mgmt_io_in[25] ;
+  wire \mgmt_io_in[26] ;
+  wire \mgmt_io_in[27] ;
+  wire \mgmt_io_in[28] ;
+  wire \mgmt_io_in[29] ;
+  wire \mgmt_io_in[2] ;
+  wire \mgmt_io_in[30] ;
+  wire \mgmt_io_in[31] ;
+  wire \mgmt_io_in[32] ;
+  wire \mgmt_io_in[33] ;
+  wire \mgmt_io_in[34] ;
+  wire \mgmt_io_in[35] ;
+  wire \mgmt_io_in[36] ;
+  wire \mgmt_io_in[37] ;
+  wire \mgmt_io_in[3] ;
+  wire \mgmt_io_in[4] ;
+  wire \mgmt_io_in[5] ;
+  wire \mgmt_io_in[6] ;
+  wire \mgmt_io_in[7] ;
+  wire \mgmt_io_in[8] ;
+  wire \mgmt_io_in[9] ;
+  wire \mgmt_io_in_hk[0] ;
+  wire \mgmt_io_in_hk[10] ;
+  wire \mgmt_io_in_hk[11] ;
+  wire \mgmt_io_in_hk[12] ;
+  wire \mgmt_io_in_hk[13] ;
+  wire \mgmt_io_in_hk[14] ;
+  wire \mgmt_io_in_hk[15] ;
+  wire \mgmt_io_in_hk[16] ;
+  wire \mgmt_io_in_hk[17] ;
+  wire \mgmt_io_in_hk[18] ;
+  wire \mgmt_io_in_hk[19] ;
+  wire \mgmt_io_in_hk[1] ;
+  wire \mgmt_io_in_hk[20] ;
+  wire \mgmt_io_in_hk[21] ;
+  wire \mgmt_io_in_hk[22] ;
+  wire \mgmt_io_in_hk[23] ;
+  wire \mgmt_io_in_hk[24] ;
+  wire \mgmt_io_in_hk[25] ;
+  wire \mgmt_io_in_hk[26] ;
+  wire \mgmt_io_in_hk[27] ;
+  wire \mgmt_io_in_hk[28] ;
+  wire \mgmt_io_in_hk[29] ;
+  wire \mgmt_io_in_hk[2] ;
+  wire \mgmt_io_in_hk[30] ;
+  wire \mgmt_io_in_hk[31] ;
+  wire \mgmt_io_in_hk[32] ;
+  wire \mgmt_io_in_hk[33] ;
+  wire \mgmt_io_in_hk[34] ;
+  wire \mgmt_io_in_hk[35] ;
+  wire \mgmt_io_in_hk[36] ;
+  wire \mgmt_io_in_hk[37] ;
+  wire \mgmt_io_in_hk[3] ;
+  wire \mgmt_io_in_hk[4] ;
+  wire \mgmt_io_in_hk[5] ;
+  wire \mgmt_io_in_hk[6] ;
+  wire \mgmt_io_in_hk[7] ;
+  wire \mgmt_io_in_hk[8] ;
+  wire \mgmt_io_in_hk[9] ;
+  wire \mgmt_io_oeb[0] ;
+  wire \mgmt_io_oeb[10] ;
+  wire \mgmt_io_oeb[11] ;
+  wire \mgmt_io_oeb[12] ;
+  wire \mgmt_io_oeb[13] ;
+  wire \mgmt_io_oeb[14] ;
+  wire \mgmt_io_oeb[15] ;
+  wire \mgmt_io_oeb[16] ;
+  wire \mgmt_io_oeb[17] ;
+  wire \mgmt_io_oeb[18] ;
+  wire \mgmt_io_oeb[19] ;
+  wire \mgmt_io_oeb[1] ;
+  wire \mgmt_io_oeb[20] ;
+  wire \mgmt_io_oeb[21] ;
+  wire \mgmt_io_oeb[22] ;
+  wire \mgmt_io_oeb[23] ;
+  wire \mgmt_io_oeb[24] ;
+  wire \mgmt_io_oeb[25] ;
+  wire \mgmt_io_oeb[26] ;
+  wire \mgmt_io_oeb[27] ;
+  wire \mgmt_io_oeb[28] ;
+  wire \mgmt_io_oeb[29] ;
+  wire \mgmt_io_oeb[2] ;
+  wire \mgmt_io_oeb[30] ;
+  wire \mgmt_io_oeb[31] ;
+  wire \mgmt_io_oeb[32] ;
+  wire \mgmt_io_oeb[33] ;
+  wire \mgmt_io_oeb[34] ;
+  wire \mgmt_io_oeb[35] ;
+  wire \mgmt_io_oeb[36] ;
+  wire \mgmt_io_oeb[37] ;
+  wire \mgmt_io_oeb[3] ;
+  wire \mgmt_io_oeb[4] ;
+  wire \mgmt_io_oeb[5] ;
+  wire \mgmt_io_oeb[6] ;
+  wire \mgmt_io_oeb[7] ;
+  wire \mgmt_io_oeb[8] ;
+  wire \mgmt_io_oeb[9] ;
+  wire \mgmt_io_oeb_hk[0] ;
+  wire \mgmt_io_oeb_hk[10] ;
+  wire \mgmt_io_oeb_hk[11] ;
+  wire \mgmt_io_oeb_hk[12] ;
+  wire \mgmt_io_oeb_hk[13] ;
+  wire \mgmt_io_oeb_hk[14] ;
+  wire \mgmt_io_oeb_hk[15] ;
+  wire \mgmt_io_oeb_hk[16] ;
+  wire \mgmt_io_oeb_hk[17] ;
+  wire \mgmt_io_oeb_hk[18] ;
+  wire \mgmt_io_oeb_hk[19] ;
+  wire \mgmt_io_oeb_hk[1] ;
+  wire \mgmt_io_oeb_hk[20] ;
+  wire \mgmt_io_oeb_hk[21] ;
+  wire \mgmt_io_oeb_hk[22] ;
+  wire \mgmt_io_oeb_hk[23] ;
+  wire \mgmt_io_oeb_hk[24] ;
+  wire \mgmt_io_oeb_hk[25] ;
+  wire \mgmt_io_oeb_hk[26] ;
+  wire \mgmt_io_oeb_hk[27] ;
+  wire \mgmt_io_oeb_hk[28] ;
+  wire \mgmt_io_oeb_hk[29] ;
+  wire \mgmt_io_oeb_hk[2] ;
+  wire \mgmt_io_oeb_hk[30] ;
+  wire \mgmt_io_oeb_hk[31] ;
+  wire \mgmt_io_oeb_hk[32] ;
+  wire \mgmt_io_oeb_hk[33] ;
+  wire \mgmt_io_oeb_hk[34] ;
+  wire \mgmt_io_oeb_hk[35] ;
+  wire \mgmt_io_oeb_hk[36] ;
+  wire \mgmt_io_oeb_hk[37] ;
+  wire \mgmt_io_oeb_hk[3] ;
+  wire \mgmt_io_oeb_hk[4] ;
+  wire \mgmt_io_oeb_hk[5] ;
+  wire \mgmt_io_oeb_hk[6] ;
+  wire \mgmt_io_oeb_hk[7] ;
+  wire \mgmt_io_oeb_hk[8] ;
+  wire \mgmt_io_oeb_hk[9] ;
+  wire \mgmt_io_out[0] ;
+  wire \mgmt_io_out[10] ;
+  wire \mgmt_io_out[11] ;
+  wire \mgmt_io_out[12] ;
+  wire \mgmt_io_out[13] ;
+  wire \mgmt_io_out[14] ;
+  wire \mgmt_io_out[15] ;
+  wire \mgmt_io_out[16] ;
+  wire \mgmt_io_out[17] ;
+  wire \mgmt_io_out[18] ;
+  wire \mgmt_io_out[19] ;
+  wire \mgmt_io_out[1] ;
+  wire \mgmt_io_out[20] ;
+  wire \mgmt_io_out[21] ;
+  wire \mgmt_io_out[22] ;
+  wire \mgmt_io_out[23] ;
+  wire \mgmt_io_out[24] ;
+  wire \mgmt_io_out[25] ;
+  wire \mgmt_io_out[26] ;
+  wire \mgmt_io_out[27] ;
+  wire \mgmt_io_out[28] ;
+  wire \mgmt_io_out[29] ;
+  wire \mgmt_io_out[2] ;
+  wire \mgmt_io_out[30] ;
+  wire \mgmt_io_out[31] ;
+  wire \mgmt_io_out[32] ;
+  wire \mgmt_io_out[33] ;
+  wire \mgmt_io_out[34] ;
+  wire \mgmt_io_out[35] ;
+  wire \mgmt_io_out[36] ;
+  wire \mgmt_io_out[37] ;
+  wire \mgmt_io_out[3] ;
+  wire \mgmt_io_out[4] ;
+  wire \mgmt_io_out[5] ;
+  wire \mgmt_io_out[6] ;
+  wire \mgmt_io_out[7] ;
+  wire \mgmt_io_out[8] ;
+  wire \mgmt_io_out[9] ;
+  wire \mgmt_io_out_hk[0] ;
+  wire \mgmt_io_out_hk[10] ;
+  wire \mgmt_io_out_hk[11] ;
+  wire \mgmt_io_out_hk[12] ;
+  wire \mgmt_io_out_hk[13] ;
+  wire \mgmt_io_out_hk[14] ;
+  wire \mgmt_io_out_hk[15] ;
+  wire \mgmt_io_out_hk[16] ;
+  wire \mgmt_io_out_hk[17] ;
+  wire \mgmt_io_out_hk[18] ;
+  wire \mgmt_io_out_hk[19] ;
+  wire \mgmt_io_out_hk[1] ;
+  wire \mgmt_io_out_hk[20] ;
+  wire \mgmt_io_out_hk[21] ;
+  wire \mgmt_io_out_hk[22] ;
+  wire \mgmt_io_out_hk[23] ;
+  wire \mgmt_io_out_hk[24] ;
+  wire \mgmt_io_out_hk[25] ;
+  wire \mgmt_io_out_hk[26] ;
+  wire \mgmt_io_out_hk[27] ;
+  wire \mgmt_io_out_hk[28] ;
+  wire \mgmt_io_out_hk[29] ;
+  wire \mgmt_io_out_hk[2] ;
+  wire \mgmt_io_out_hk[30] ;
+  wire \mgmt_io_out_hk[31] ;
+  wire \mgmt_io_out_hk[32] ;
+  wire \mgmt_io_out_hk[33] ;
+  wire \mgmt_io_out_hk[34] ;
+  wire \mgmt_io_out_hk[35] ;
+  wire \mgmt_io_out_hk[36] ;
+  wire \mgmt_io_out_hk[37] ;
+  wire \mgmt_io_out_hk[3] ;
+  wire \mgmt_io_out_hk[4] ;
+  wire \mgmt_io_out_hk[5] ;
+  wire \mgmt_io_out_hk[6] ;
+  wire \mgmt_io_out_hk[7] ;
+  wire \mgmt_io_out_hk[8] ;
+  wire \mgmt_io_out_hk[9] ;
+  wire mprj2_vcc_pwrgood;
+  wire mprj2_vdd_pwrgood;
+  wire mprj_ack_i_core;
+  wire mprj_ack_i_user;
+  wire \mprj_adr_o_core[0] ;
+  wire \mprj_adr_o_core[10] ;
+  wire \mprj_adr_o_core[11] ;
+  wire \mprj_adr_o_core[12] ;
+  wire \mprj_adr_o_core[13] ;
+  wire \mprj_adr_o_core[14] ;
+  wire \mprj_adr_o_core[15] ;
+  wire \mprj_adr_o_core[16] ;
+  wire \mprj_adr_o_core[17] ;
+  wire \mprj_adr_o_core[18] ;
+  wire \mprj_adr_o_core[19] ;
+  wire \mprj_adr_o_core[1] ;
+  wire \mprj_adr_o_core[20] ;
+  wire \mprj_adr_o_core[21] ;
+  wire \mprj_adr_o_core[22] ;
+  wire \mprj_adr_o_core[23] ;
+  wire \mprj_adr_o_core[24] ;
+  wire \mprj_adr_o_core[25] ;
+  wire \mprj_adr_o_core[26] ;
+  wire \mprj_adr_o_core[27] ;
+  wire \mprj_adr_o_core[28] ;
+  wire \mprj_adr_o_core[29] ;
+  wire \mprj_adr_o_core[2] ;
+  wire \mprj_adr_o_core[30] ;
+  wire \mprj_adr_o_core[31] ;
+  wire \mprj_adr_o_core[3] ;
+  wire \mprj_adr_o_core[4] ;
+  wire \mprj_adr_o_core[5] ;
+  wire \mprj_adr_o_core[6] ;
+  wire \mprj_adr_o_core[7] ;
+  wire \mprj_adr_o_core[8] ;
+  wire \mprj_adr_o_core[9] ;
+  wire \mprj_adr_o_user[0] ;
+  wire \mprj_adr_o_user[10] ;
+  wire \mprj_adr_o_user[11] ;
+  wire \mprj_adr_o_user[12] ;
+  wire \mprj_adr_o_user[13] ;
+  wire \mprj_adr_o_user[14] ;
+  wire \mprj_adr_o_user[15] ;
+  wire \mprj_adr_o_user[16] ;
+  wire \mprj_adr_o_user[17] ;
+  wire \mprj_adr_o_user[18] ;
+  wire \mprj_adr_o_user[19] ;
+  wire \mprj_adr_o_user[1] ;
+  wire \mprj_adr_o_user[20] ;
+  wire \mprj_adr_o_user[21] ;
+  wire \mprj_adr_o_user[22] ;
+  wire \mprj_adr_o_user[23] ;
+  wire \mprj_adr_o_user[24] ;
+  wire \mprj_adr_o_user[25] ;
+  wire \mprj_adr_o_user[26] ;
+  wire \mprj_adr_o_user[27] ;
+  wire \mprj_adr_o_user[28] ;
+  wire \mprj_adr_o_user[29] ;
+  wire \mprj_adr_o_user[2] ;
+  wire \mprj_adr_o_user[30] ;
+  wire \mprj_adr_o_user[31] ;
+  wire \mprj_adr_o_user[3] ;
+  wire \mprj_adr_o_user[4] ;
+  wire \mprj_adr_o_user[5] ;
+  wire \mprj_adr_o_user[6] ;
+  wire \mprj_adr_o_user[7] ;
+  wire \mprj_adr_o_user[8] ;
+  wire \mprj_adr_o_user[9] ;
+  wire mprj_clock;
+  wire mprj_clock2;
+  wire mprj_cyc_o_core;
+  wire mprj_cyc_o_user;
+  wire \mprj_dat_i_core[0] ;
+  wire \mprj_dat_i_core[10] ;
+  wire \mprj_dat_i_core[11] ;
+  wire \mprj_dat_i_core[12] ;
+  wire \mprj_dat_i_core[13] ;
+  wire \mprj_dat_i_core[14] ;
+  wire \mprj_dat_i_core[15] ;
+  wire \mprj_dat_i_core[16] ;
+  wire \mprj_dat_i_core[17] ;
+  wire \mprj_dat_i_core[18] ;
+  wire \mprj_dat_i_core[19] ;
+  wire \mprj_dat_i_core[1] ;
+  wire \mprj_dat_i_core[20] ;
+  wire \mprj_dat_i_core[21] ;
+  wire \mprj_dat_i_core[22] ;
+  wire \mprj_dat_i_core[23] ;
+  wire \mprj_dat_i_core[24] ;
+  wire \mprj_dat_i_core[25] ;
+  wire \mprj_dat_i_core[26] ;
+  wire \mprj_dat_i_core[27] ;
+  wire \mprj_dat_i_core[28] ;
+  wire \mprj_dat_i_core[29] ;
+  wire \mprj_dat_i_core[2] ;
+  wire \mprj_dat_i_core[30] ;
+  wire \mprj_dat_i_core[31] ;
+  wire \mprj_dat_i_core[3] ;
+  wire \mprj_dat_i_core[4] ;
+  wire \mprj_dat_i_core[5] ;
+  wire \mprj_dat_i_core[6] ;
+  wire \mprj_dat_i_core[7] ;
+  wire \mprj_dat_i_core[8] ;
+  wire \mprj_dat_i_core[9] ;
+  wire \mprj_dat_i_user[0] ;
+  wire \mprj_dat_i_user[10] ;
+  wire \mprj_dat_i_user[11] ;
+  wire \mprj_dat_i_user[12] ;
+  wire \mprj_dat_i_user[13] ;
+  wire \mprj_dat_i_user[14] ;
+  wire \mprj_dat_i_user[15] ;
+  wire \mprj_dat_i_user[16] ;
+  wire \mprj_dat_i_user[17] ;
+  wire \mprj_dat_i_user[18] ;
+  wire \mprj_dat_i_user[19] ;
+  wire \mprj_dat_i_user[1] ;
+  wire \mprj_dat_i_user[20] ;
+  wire \mprj_dat_i_user[21] ;
+  wire \mprj_dat_i_user[22] ;
+  wire \mprj_dat_i_user[23] ;
+  wire \mprj_dat_i_user[24] ;
+  wire \mprj_dat_i_user[25] ;
+  wire \mprj_dat_i_user[26] ;
+  wire \mprj_dat_i_user[27] ;
+  wire \mprj_dat_i_user[28] ;
+  wire \mprj_dat_i_user[29] ;
+  wire \mprj_dat_i_user[2] ;
+  wire \mprj_dat_i_user[30] ;
+  wire \mprj_dat_i_user[31] ;
+  wire \mprj_dat_i_user[3] ;
+  wire \mprj_dat_i_user[4] ;
+  wire \mprj_dat_i_user[5] ;
+  wire \mprj_dat_i_user[6] ;
+  wire \mprj_dat_i_user[7] ;
+  wire \mprj_dat_i_user[8] ;
+  wire \mprj_dat_i_user[9] ;
+  wire \mprj_dat_o_core[0] ;
+  wire \mprj_dat_o_core[10] ;
+  wire \mprj_dat_o_core[11] ;
+  wire \mprj_dat_o_core[12] ;
+  wire \mprj_dat_o_core[13] ;
+  wire \mprj_dat_o_core[14] ;
+  wire \mprj_dat_o_core[15] ;
+  wire \mprj_dat_o_core[16] ;
+  wire \mprj_dat_o_core[17] ;
+  wire \mprj_dat_o_core[18] ;
+  wire \mprj_dat_o_core[19] ;
+  wire \mprj_dat_o_core[1] ;
+  wire \mprj_dat_o_core[20] ;
+  wire \mprj_dat_o_core[21] ;
+  wire \mprj_dat_o_core[22] ;
+  wire \mprj_dat_o_core[23] ;
+  wire \mprj_dat_o_core[24] ;
+  wire \mprj_dat_o_core[25] ;
+  wire \mprj_dat_o_core[26] ;
+  wire \mprj_dat_o_core[27] ;
+  wire \mprj_dat_o_core[28] ;
+  wire \mprj_dat_o_core[29] ;
+  wire \mprj_dat_o_core[2] ;
+  wire \mprj_dat_o_core[30] ;
+  wire \mprj_dat_o_core[31] ;
+  wire \mprj_dat_o_core[3] ;
+  wire \mprj_dat_o_core[4] ;
+  wire \mprj_dat_o_core[5] ;
+  wire \mprj_dat_o_core[6] ;
+  wire \mprj_dat_o_core[7] ;
+  wire \mprj_dat_o_core[8] ;
+  wire \mprj_dat_o_core[9] ;
+  wire \mprj_dat_o_user[0] ;
+  wire \mprj_dat_o_user[10] ;
+  wire \mprj_dat_o_user[11] ;
+  wire \mprj_dat_o_user[12] ;
+  wire \mprj_dat_o_user[13] ;
+  wire \mprj_dat_o_user[14] ;
+  wire \mprj_dat_o_user[15] ;
+  wire \mprj_dat_o_user[16] ;
+  wire \mprj_dat_o_user[17] ;
+  wire \mprj_dat_o_user[18] ;
+  wire \mprj_dat_o_user[19] ;
+  wire \mprj_dat_o_user[1] ;
+  wire \mprj_dat_o_user[20] ;
+  wire \mprj_dat_o_user[21] ;
+  wire \mprj_dat_o_user[22] ;
+  wire \mprj_dat_o_user[23] ;
+  wire \mprj_dat_o_user[24] ;
+  wire \mprj_dat_o_user[25] ;
+  wire \mprj_dat_o_user[26] ;
+  wire \mprj_dat_o_user[27] ;
+  wire \mprj_dat_o_user[28] ;
+  wire \mprj_dat_o_user[29] ;
+  wire \mprj_dat_o_user[2] ;
+  wire \mprj_dat_o_user[30] ;
+  wire \mprj_dat_o_user[31] ;
+  wire \mprj_dat_o_user[3] ;
+  wire \mprj_dat_o_user[4] ;
+  wire \mprj_dat_o_user[5] ;
+  wire \mprj_dat_o_user[6] ;
+  wire \mprj_dat_o_user[7] ;
+  wire \mprj_dat_o_user[8] ;
+  wire \mprj_dat_o_user[9] ;
+  wire mprj_iena_wb;
+  inout [37:0] mprj_io;
+  wire \mprj_io_analog_en[0] ;
+  wire \mprj_io_analog_en[10] ;
+  wire \mprj_io_analog_en[11] ;
+  wire \mprj_io_analog_en[12] ;
+  wire \mprj_io_analog_en[13] ;
+  wire \mprj_io_analog_en[14] ;
+  wire \mprj_io_analog_en[15] ;
+  wire \mprj_io_analog_en[16] ;
+  wire \mprj_io_analog_en[17] ;
+  wire \mprj_io_analog_en[18] ;
+  wire \mprj_io_analog_en[19] ;
+  wire \mprj_io_analog_en[1] ;
+  wire \mprj_io_analog_en[20] ;
+  wire \mprj_io_analog_en[21] ;
+  wire \mprj_io_analog_en[22] ;
+  wire \mprj_io_analog_en[23] ;
+  wire \mprj_io_analog_en[24] ;
+  wire \mprj_io_analog_en[25] ;
+  wire \mprj_io_analog_en[26] ;
+  wire \mprj_io_analog_en[27] ;
+  wire \mprj_io_analog_en[28] ;
+  wire \mprj_io_analog_en[29] ;
+  wire \mprj_io_analog_en[2] ;
+  wire \mprj_io_analog_en[30] ;
+  wire \mprj_io_analog_en[31] ;
+  wire \mprj_io_analog_en[32] ;
+  wire \mprj_io_analog_en[33] ;
+  wire \mprj_io_analog_en[34] ;
+  wire \mprj_io_analog_en[35] ;
+  wire \mprj_io_analog_en[36] ;
+  wire \mprj_io_analog_en[37] ;
+  wire \mprj_io_analog_en[3] ;
+  wire \mprj_io_analog_en[4] ;
+  wire \mprj_io_analog_en[5] ;
+  wire \mprj_io_analog_en[6] ;
+  wire \mprj_io_analog_en[7] ;
+  wire \mprj_io_analog_en[8] ;
+  wire \mprj_io_analog_en[9] ;
+  wire \mprj_io_analog_pol[0] ;
+  wire \mprj_io_analog_pol[10] ;
+  wire \mprj_io_analog_pol[11] ;
+  wire \mprj_io_analog_pol[12] ;
+  wire \mprj_io_analog_pol[13] ;
+  wire \mprj_io_analog_pol[14] ;
+  wire \mprj_io_analog_pol[15] ;
+  wire \mprj_io_analog_pol[16] ;
+  wire \mprj_io_analog_pol[17] ;
+  wire \mprj_io_analog_pol[18] ;
+  wire \mprj_io_analog_pol[19] ;
+  wire \mprj_io_analog_pol[1] ;
+  wire \mprj_io_analog_pol[20] ;
+  wire \mprj_io_analog_pol[21] ;
+  wire \mprj_io_analog_pol[22] ;
+  wire \mprj_io_analog_pol[23] ;
+  wire \mprj_io_analog_pol[24] ;
+  wire \mprj_io_analog_pol[25] ;
+  wire \mprj_io_analog_pol[26] ;
+  wire \mprj_io_analog_pol[27] ;
+  wire \mprj_io_analog_pol[28] ;
+  wire \mprj_io_analog_pol[29] ;
+  wire \mprj_io_analog_pol[2] ;
+  wire \mprj_io_analog_pol[30] ;
+  wire \mprj_io_analog_pol[31] ;
+  wire \mprj_io_analog_pol[32] ;
+  wire \mprj_io_analog_pol[33] ;
+  wire \mprj_io_analog_pol[34] ;
+  wire \mprj_io_analog_pol[35] ;
+  wire \mprj_io_analog_pol[36] ;
+  wire \mprj_io_analog_pol[37] ;
+  wire \mprj_io_analog_pol[3] ;
+  wire \mprj_io_analog_pol[4] ;
+  wire \mprj_io_analog_pol[5] ;
+  wire \mprj_io_analog_pol[6] ;
+  wire \mprj_io_analog_pol[7] ;
+  wire \mprj_io_analog_pol[8] ;
+  wire \mprj_io_analog_pol[9] ;
+  wire \mprj_io_analog_sel[0] ;
+  wire \mprj_io_analog_sel[10] ;
+  wire \mprj_io_analog_sel[11] ;
+  wire \mprj_io_analog_sel[12] ;
+  wire \mprj_io_analog_sel[13] ;
+  wire \mprj_io_analog_sel[14] ;
+  wire \mprj_io_analog_sel[15] ;
+  wire \mprj_io_analog_sel[16] ;
+  wire \mprj_io_analog_sel[17] ;
+  wire \mprj_io_analog_sel[18] ;
+  wire \mprj_io_analog_sel[19] ;
+  wire \mprj_io_analog_sel[1] ;
+  wire \mprj_io_analog_sel[20] ;
+  wire \mprj_io_analog_sel[21] ;
+  wire \mprj_io_analog_sel[22] ;
+  wire \mprj_io_analog_sel[23] ;
+  wire \mprj_io_analog_sel[24] ;
+  wire \mprj_io_analog_sel[25] ;
+  wire \mprj_io_analog_sel[26] ;
+  wire \mprj_io_analog_sel[27] ;
+  wire \mprj_io_analog_sel[28] ;
+  wire \mprj_io_analog_sel[29] ;
+  wire \mprj_io_analog_sel[2] ;
+  wire \mprj_io_analog_sel[30] ;
+  wire \mprj_io_analog_sel[31] ;
+  wire \mprj_io_analog_sel[32] ;
+  wire \mprj_io_analog_sel[33] ;
+  wire \mprj_io_analog_sel[34] ;
+  wire \mprj_io_analog_sel[35] ;
+  wire \mprj_io_analog_sel[36] ;
+  wire \mprj_io_analog_sel[37] ;
+  wire \mprj_io_analog_sel[3] ;
+  wire \mprj_io_analog_sel[4] ;
+  wire \mprj_io_analog_sel[5] ;
+  wire \mprj_io_analog_sel[6] ;
+  wire \mprj_io_analog_sel[7] ;
+  wire \mprj_io_analog_sel[8] ;
+  wire \mprj_io_analog_sel[9] ;
+  wire \mprj_io_dm[0] ;
+  wire \mprj_io_dm[100] ;
+  wire \mprj_io_dm[101] ;
+  wire \mprj_io_dm[102] ;
+  wire \mprj_io_dm[103] ;
+  wire \mprj_io_dm[104] ;
+  wire \mprj_io_dm[105] ;
+  wire \mprj_io_dm[106] ;
+  wire \mprj_io_dm[107] ;
+  wire \mprj_io_dm[108] ;
+  wire \mprj_io_dm[109] ;
+  wire \mprj_io_dm[10] ;
+  wire \mprj_io_dm[110] ;
+  wire \mprj_io_dm[111] ;
+  wire \mprj_io_dm[112] ;
+  wire \mprj_io_dm[113] ;
+  wire \mprj_io_dm[11] ;
+  wire \mprj_io_dm[12] ;
+  wire \mprj_io_dm[13] ;
+  wire \mprj_io_dm[14] ;
+  wire \mprj_io_dm[15] ;
+  wire \mprj_io_dm[16] ;
+  wire \mprj_io_dm[17] ;
+  wire \mprj_io_dm[18] ;
+  wire \mprj_io_dm[19] ;
+  wire \mprj_io_dm[1] ;
+  wire \mprj_io_dm[20] ;
+  wire \mprj_io_dm[21] ;
+  wire \mprj_io_dm[22] ;
+  wire \mprj_io_dm[23] ;
+  wire \mprj_io_dm[24] ;
+  wire \mprj_io_dm[25] ;
+  wire \mprj_io_dm[26] ;
+  wire \mprj_io_dm[27] ;
+  wire \mprj_io_dm[28] ;
+  wire \mprj_io_dm[29] ;
+  wire \mprj_io_dm[2] ;
+  wire \mprj_io_dm[30] ;
+  wire \mprj_io_dm[31] ;
+  wire \mprj_io_dm[32] ;
+  wire \mprj_io_dm[33] ;
+  wire \mprj_io_dm[34] ;
+  wire \mprj_io_dm[35] ;
+  wire \mprj_io_dm[36] ;
+  wire \mprj_io_dm[37] ;
+  wire \mprj_io_dm[38] ;
+  wire \mprj_io_dm[39] ;
+  wire \mprj_io_dm[3] ;
+  wire \mprj_io_dm[40] ;
+  wire \mprj_io_dm[41] ;
+  wire \mprj_io_dm[42] ;
+  wire \mprj_io_dm[43] ;
+  wire \mprj_io_dm[44] ;
+  wire \mprj_io_dm[45] ;
+  wire \mprj_io_dm[46] ;
+  wire \mprj_io_dm[47] ;
+  wire \mprj_io_dm[48] ;
+  wire \mprj_io_dm[49] ;
+  wire \mprj_io_dm[4] ;
+  wire \mprj_io_dm[50] ;
+  wire \mprj_io_dm[51] ;
+  wire \mprj_io_dm[52] ;
+  wire \mprj_io_dm[53] ;
+  wire \mprj_io_dm[54] ;
+  wire \mprj_io_dm[55] ;
+  wire \mprj_io_dm[56] ;
+  wire \mprj_io_dm[57] ;
+  wire \mprj_io_dm[58] ;
+  wire \mprj_io_dm[59] ;
+  wire \mprj_io_dm[5] ;
+  wire \mprj_io_dm[60] ;
+  wire \mprj_io_dm[61] ;
+  wire \mprj_io_dm[62] ;
+  wire \mprj_io_dm[63] ;
+  wire \mprj_io_dm[64] ;
+  wire \mprj_io_dm[65] ;
+  wire \mprj_io_dm[66] ;
+  wire \mprj_io_dm[67] ;
+  wire \mprj_io_dm[68] ;
+  wire \mprj_io_dm[69] ;
+  wire \mprj_io_dm[6] ;
+  wire \mprj_io_dm[70] ;
+  wire \mprj_io_dm[71] ;
+  wire \mprj_io_dm[72] ;
+  wire \mprj_io_dm[73] ;
+  wire \mprj_io_dm[74] ;
+  wire \mprj_io_dm[75] ;
+  wire \mprj_io_dm[76] ;
+  wire \mprj_io_dm[77] ;
+  wire \mprj_io_dm[78] ;
+  wire \mprj_io_dm[79] ;
+  wire \mprj_io_dm[7] ;
+  wire \mprj_io_dm[80] ;
+  wire \mprj_io_dm[81] ;
+  wire \mprj_io_dm[82] ;
+  wire \mprj_io_dm[83] ;
+  wire \mprj_io_dm[84] ;
+  wire \mprj_io_dm[85] ;
+  wire \mprj_io_dm[86] ;
+  wire \mprj_io_dm[87] ;
+  wire \mprj_io_dm[88] ;
+  wire \mprj_io_dm[89] ;
+  wire \mprj_io_dm[8] ;
+  wire \mprj_io_dm[90] ;
+  wire \mprj_io_dm[91] ;
+  wire \mprj_io_dm[92] ;
+  wire \mprj_io_dm[93] ;
+  wire \mprj_io_dm[94] ;
+  wire \mprj_io_dm[95] ;
+  wire \mprj_io_dm[96] ;
+  wire \mprj_io_dm[97] ;
+  wire \mprj_io_dm[98] ;
+  wire \mprj_io_dm[99] ;
+  wire \mprj_io_dm[9] ;
+  wire \mprj_io_holdover[0] ;
+  wire \mprj_io_holdover[10] ;
+  wire \mprj_io_holdover[11] ;
+  wire \mprj_io_holdover[12] ;
+  wire \mprj_io_holdover[13] ;
+  wire \mprj_io_holdover[14] ;
+  wire \mprj_io_holdover[15] ;
+  wire \mprj_io_holdover[16] ;
+  wire \mprj_io_holdover[17] ;
+  wire \mprj_io_holdover[18] ;
+  wire \mprj_io_holdover[19] ;
+  wire \mprj_io_holdover[1] ;
+  wire \mprj_io_holdover[20] ;
+  wire \mprj_io_holdover[21] ;
+  wire \mprj_io_holdover[22] ;
+  wire \mprj_io_holdover[23] ;
+  wire \mprj_io_holdover[24] ;
+  wire \mprj_io_holdover[25] ;
+  wire \mprj_io_holdover[26] ;
+  wire \mprj_io_holdover[27] ;
+  wire \mprj_io_holdover[28] ;
+  wire \mprj_io_holdover[29] ;
+  wire \mprj_io_holdover[2] ;
+  wire \mprj_io_holdover[30] ;
+  wire \mprj_io_holdover[31] ;
+  wire \mprj_io_holdover[32] ;
+  wire \mprj_io_holdover[33] ;
+  wire \mprj_io_holdover[34] ;
+  wire \mprj_io_holdover[35] ;
+  wire \mprj_io_holdover[36] ;
+  wire \mprj_io_holdover[37] ;
+  wire \mprj_io_holdover[3] ;
+  wire \mprj_io_holdover[4] ;
+  wire \mprj_io_holdover[5] ;
+  wire \mprj_io_holdover[6] ;
+  wire \mprj_io_holdover[7] ;
+  wire \mprj_io_holdover[8] ;
+  wire \mprj_io_holdover[9] ;
+  wire \mprj_io_ib_mode_sel[0] ;
+  wire \mprj_io_ib_mode_sel[10] ;
+  wire \mprj_io_ib_mode_sel[11] ;
+  wire \mprj_io_ib_mode_sel[12] ;
+  wire \mprj_io_ib_mode_sel[13] ;
+  wire \mprj_io_ib_mode_sel[14] ;
+  wire \mprj_io_ib_mode_sel[15] ;
+  wire \mprj_io_ib_mode_sel[16] ;
+  wire \mprj_io_ib_mode_sel[17] ;
+  wire \mprj_io_ib_mode_sel[18] ;
+  wire \mprj_io_ib_mode_sel[19] ;
+  wire \mprj_io_ib_mode_sel[1] ;
+  wire \mprj_io_ib_mode_sel[20] ;
+  wire \mprj_io_ib_mode_sel[21] ;
+  wire \mprj_io_ib_mode_sel[22] ;
+  wire \mprj_io_ib_mode_sel[23] ;
+  wire \mprj_io_ib_mode_sel[24] ;
+  wire \mprj_io_ib_mode_sel[25] ;
+  wire \mprj_io_ib_mode_sel[26] ;
+  wire \mprj_io_ib_mode_sel[27] ;
+  wire \mprj_io_ib_mode_sel[28] ;
+  wire \mprj_io_ib_mode_sel[29] ;
+  wire \mprj_io_ib_mode_sel[2] ;
+  wire \mprj_io_ib_mode_sel[30] ;
+  wire \mprj_io_ib_mode_sel[31] ;
+  wire \mprj_io_ib_mode_sel[32] ;
+  wire \mprj_io_ib_mode_sel[33] ;
+  wire \mprj_io_ib_mode_sel[34] ;
+  wire \mprj_io_ib_mode_sel[35] ;
+  wire \mprj_io_ib_mode_sel[36] ;
+  wire \mprj_io_ib_mode_sel[37] ;
+  wire \mprj_io_ib_mode_sel[3] ;
+  wire \mprj_io_ib_mode_sel[4] ;
+  wire \mprj_io_ib_mode_sel[5] ;
+  wire \mprj_io_ib_mode_sel[6] ;
+  wire \mprj_io_ib_mode_sel[7] ;
+  wire \mprj_io_ib_mode_sel[8] ;
+  wire \mprj_io_ib_mode_sel[9] ;
+  wire \mprj_io_in[0] ;
+  wire \mprj_io_in[10] ;
+  wire \mprj_io_in[11] ;
+  wire \mprj_io_in[12] ;
+  wire \mprj_io_in[13] ;
+  wire \mprj_io_in[14] ;
+  wire \mprj_io_in[15] ;
+  wire \mprj_io_in[16] ;
+  wire \mprj_io_in[17] ;
+  wire \mprj_io_in[18] ;
+  wire \mprj_io_in[19] ;
+  wire \mprj_io_in[1] ;
+  wire \mprj_io_in[20] ;
+  wire \mprj_io_in[21] ;
+  wire \mprj_io_in[22] ;
+  wire \mprj_io_in[23] ;
+  wire \mprj_io_in[24] ;
+  wire \mprj_io_in[25] ;
+  wire \mprj_io_in[26] ;
+  wire \mprj_io_in[27] ;
+  wire \mprj_io_in[28] ;
+  wire \mprj_io_in[29] ;
+  wire \mprj_io_in[2] ;
+  wire \mprj_io_in[30] ;
+  wire \mprj_io_in[31] ;
+  wire \mprj_io_in[32] ;
+  wire \mprj_io_in[33] ;
+  wire \mprj_io_in[34] ;
+  wire \mprj_io_in[35] ;
+  wire \mprj_io_in[36] ;
+  wire \mprj_io_in[37] ;
+  wire \mprj_io_in[3] ;
+  wire \mprj_io_in[4] ;
+  wire \mprj_io_in[5] ;
+  wire \mprj_io_in[6] ;
+  wire \mprj_io_in[7] ;
+  wire \mprj_io_in[8] ;
+  wire \mprj_io_in[9] ;
+  wire \mprj_io_inp_dis[0] ;
+  wire \mprj_io_inp_dis[10] ;
+  wire \mprj_io_inp_dis[11] ;
+  wire \mprj_io_inp_dis[12] ;
+  wire \mprj_io_inp_dis[13] ;
+  wire \mprj_io_inp_dis[14] ;
+  wire \mprj_io_inp_dis[15] ;
+  wire \mprj_io_inp_dis[16] ;
+  wire \mprj_io_inp_dis[17] ;
+  wire \mprj_io_inp_dis[18] ;
+  wire \mprj_io_inp_dis[19] ;
+  wire \mprj_io_inp_dis[1] ;
+  wire \mprj_io_inp_dis[20] ;
+  wire \mprj_io_inp_dis[21] ;
+  wire \mprj_io_inp_dis[22] ;
+  wire \mprj_io_inp_dis[23] ;
+  wire \mprj_io_inp_dis[24] ;
+  wire \mprj_io_inp_dis[25] ;
+  wire \mprj_io_inp_dis[26] ;
+  wire \mprj_io_inp_dis[27] ;
+  wire \mprj_io_inp_dis[28] ;
+  wire \mprj_io_inp_dis[29] ;
+  wire \mprj_io_inp_dis[2] ;
+  wire \mprj_io_inp_dis[30] ;
+  wire \mprj_io_inp_dis[31] ;
+  wire \mprj_io_inp_dis[32] ;
+  wire \mprj_io_inp_dis[33] ;
+  wire \mprj_io_inp_dis[34] ;
+  wire \mprj_io_inp_dis[35] ;
+  wire \mprj_io_inp_dis[36] ;
+  wire \mprj_io_inp_dis[37] ;
+  wire \mprj_io_inp_dis[3] ;
+  wire \mprj_io_inp_dis[4] ;
+  wire \mprj_io_inp_dis[5] ;
+  wire \mprj_io_inp_dis[6] ;
+  wire \mprj_io_inp_dis[7] ;
+  wire \mprj_io_inp_dis[8] ;
+  wire \mprj_io_inp_dis[9] ;
+  wire mprj_io_loader_clock;
+  wire mprj_io_loader_clock_buf;
+  wire mprj_io_loader_data_1;
+  wire mprj_io_loader_data_2;
+  wire mprj_io_loader_data_2_buf;
+  wire mprj_io_loader_resetn;
+  wire mprj_io_loader_resetn_buf;
+  wire mprj_io_loader_strobe;
+  wire mprj_io_loader_strobe_buf;
+  wire \mprj_io_oeb[0] ;
+  wire \mprj_io_oeb[10] ;
+  wire \mprj_io_oeb[11] ;
+  wire \mprj_io_oeb[12] ;
+  wire \mprj_io_oeb[13] ;
+  wire \mprj_io_oeb[14] ;
+  wire \mprj_io_oeb[15] ;
+  wire \mprj_io_oeb[16] ;
+  wire \mprj_io_oeb[17] ;
+  wire \mprj_io_oeb[18] ;
+  wire \mprj_io_oeb[19] ;
+  wire \mprj_io_oeb[1] ;
+  wire \mprj_io_oeb[20] ;
+  wire \mprj_io_oeb[21] ;
+  wire \mprj_io_oeb[22] ;
+  wire \mprj_io_oeb[23] ;
+  wire \mprj_io_oeb[24] ;
+  wire \mprj_io_oeb[25] ;
+  wire \mprj_io_oeb[26] ;
+  wire \mprj_io_oeb[27] ;
+  wire \mprj_io_oeb[28] ;
+  wire \mprj_io_oeb[29] ;
+  wire \mprj_io_oeb[2] ;
+  wire \mprj_io_oeb[30] ;
+  wire \mprj_io_oeb[31] ;
+  wire \mprj_io_oeb[32] ;
+  wire \mprj_io_oeb[33] ;
+  wire \mprj_io_oeb[34] ;
+  wire \mprj_io_oeb[35] ;
+  wire \mprj_io_oeb[36] ;
+  wire \mprj_io_oeb[37] ;
+  wire \mprj_io_oeb[3] ;
+  wire \mprj_io_oeb[4] ;
+  wire \mprj_io_oeb[5] ;
+  wire \mprj_io_oeb[6] ;
+  wire \mprj_io_oeb[7] ;
+  wire \mprj_io_oeb[8] ;
+  wire \mprj_io_oeb[9] ;
+  wire \mprj_io_one[0] ;
+  wire \mprj_io_one[10] ;
+  wire \mprj_io_one[11] ;
+  wire \mprj_io_one[12] ;
+  wire \mprj_io_one[13] ;
+  wire \mprj_io_one[14] ;
+  wire \mprj_io_one[15] ;
+  wire \mprj_io_one[16] ;
+  wire \mprj_io_one[17] ;
+  wire \mprj_io_one[18] ;
+  wire \mprj_io_one[19] ;
+  wire \mprj_io_one[1] ;
+  wire \mprj_io_one[20] ;
+  wire \mprj_io_one[21] ;
+  wire \mprj_io_one[22] ;
+  wire \mprj_io_one[23] ;
+  wire \mprj_io_one[24] ;
+  wire \mprj_io_one[25] ;
+  wire \mprj_io_one[26] ;
+  wire \mprj_io_one[27] ;
+  wire \mprj_io_one[28] ;
+  wire \mprj_io_one[29] ;
+  wire \mprj_io_one[2] ;
+  wire \mprj_io_one[30] ;
+  wire \mprj_io_one[31] ;
+  wire \mprj_io_one[32] ;
+  wire \mprj_io_one[33] ;
+  wire \mprj_io_one[34] ;
+  wire \mprj_io_one[35] ;
+  wire \mprj_io_one[36] ;
+  wire \mprj_io_one[37] ;
+  wire \mprj_io_one[3] ;
+  wire \mprj_io_one[4] ;
+  wire \mprj_io_one[5] ;
+  wire \mprj_io_one[6] ;
+  wire \mprj_io_one[7] ;
+  wire \mprj_io_one[8] ;
+  wire \mprj_io_one[9] ;
+  wire \mprj_io_out[0] ;
+  wire \mprj_io_out[10] ;
+  wire \mprj_io_out[11] ;
+  wire \mprj_io_out[12] ;
+  wire \mprj_io_out[13] ;
+  wire \mprj_io_out[14] ;
+  wire \mprj_io_out[15] ;
+  wire \mprj_io_out[16] ;
+  wire \mprj_io_out[17] ;
+  wire \mprj_io_out[18] ;
+  wire \mprj_io_out[19] ;
+  wire \mprj_io_out[1] ;
+  wire \mprj_io_out[20] ;
+  wire \mprj_io_out[21] ;
+  wire \mprj_io_out[22] ;
+  wire \mprj_io_out[23] ;
+  wire \mprj_io_out[24] ;
+  wire \mprj_io_out[25] ;
+  wire \mprj_io_out[26] ;
+  wire \mprj_io_out[27] ;
+  wire \mprj_io_out[28] ;
+  wire \mprj_io_out[29] ;
+  wire \mprj_io_out[2] ;
+  wire \mprj_io_out[30] ;
+  wire \mprj_io_out[31] ;
+  wire \mprj_io_out[32] ;
+  wire \mprj_io_out[33] ;
+  wire \mprj_io_out[34] ;
+  wire \mprj_io_out[35] ;
+  wire \mprj_io_out[36] ;
+  wire \mprj_io_out[37] ;
+  wire \mprj_io_out[3] ;
+  wire \mprj_io_out[4] ;
+  wire \mprj_io_out[5] ;
+  wire \mprj_io_out[6] ;
+  wire \mprj_io_out[7] ;
+  wire \mprj_io_out[8] ;
+  wire \mprj_io_out[9] ;
+  wire \mprj_io_slow_sel[0] ;
+  wire \mprj_io_slow_sel[10] ;
+  wire \mprj_io_slow_sel[11] ;
+  wire \mprj_io_slow_sel[12] ;
+  wire \mprj_io_slow_sel[13] ;
+  wire \mprj_io_slow_sel[14] ;
+  wire \mprj_io_slow_sel[15] ;
+  wire \mprj_io_slow_sel[16] ;
+  wire \mprj_io_slow_sel[17] ;
+  wire \mprj_io_slow_sel[18] ;
+  wire \mprj_io_slow_sel[19] ;
+  wire \mprj_io_slow_sel[1] ;
+  wire \mprj_io_slow_sel[20] ;
+  wire \mprj_io_slow_sel[21] ;
+  wire \mprj_io_slow_sel[22] ;
+  wire \mprj_io_slow_sel[23] ;
+  wire \mprj_io_slow_sel[24] ;
+  wire \mprj_io_slow_sel[25] ;
+  wire \mprj_io_slow_sel[26] ;
+  wire \mprj_io_slow_sel[27] ;
+  wire \mprj_io_slow_sel[28] ;
+  wire \mprj_io_slow_sel[29] ;
+  wire \mprj_io_slow_sel[2] ;
+  wire \mprj_io_slow_sel[30] ;
+  wire \mprj_io_slow_sel[31] ;
+  wire \mprj_io_slow_sel[32] ;
+  wire \mprj_io_slow_sel[33] ;
+  wire \mprj_io_slow_sel[34] ;
+  wire \mprj_io_slow_sel[35] ;
+  wire \mprj_io_slow_sel[36] ;
+  wire \mprj_io_slow_sel[37] ;
+  wire \mprj_io_slow_sel[3] ;
+  wire \mprj_io_slow_sel[4] ;
+  wire \mprj_io_slow_sel[5] ;
+  wire \mprj_io_slow_sel[6] ;
+  wire \mprj_io_slow_sel[7] ;
+  wire \mprj_io_slow_sel[8] ;
+  wire \mprj_io_slow_sel[9] ;
+  wire \mprj_io_vtrip_sel[0] ;
+  wire \mprj_io_vtrip_sel[10] ;
+  wire \mprj_io_vtrip_sel[11] ;
+  wire \mprj_io_vtrip_sel[12] ;
+  wire \mprj_io_vtrip_sel[13] ;
+  wire \mprj_io_vtrip_sel[14] ;
+  wire \mprj_io_vtrip_sel[15] ;
+  wire \mprj_io_vtrip_sel[16] ;
+  wire \mprj_io_vtrip_sel[17] ;
+  wire \mprj_io_vtrip_sel[18] ;
+  wire \mprj_io_vtrip_sel[19] ;
+  wire \mprj_io_vtrip_sel[1] ;
+  wire \mprj_io_vtrip_sel[20] ;
+  wire \mprj_io_vtrip_sel[21] ;
+  wire \mprj_io_vtrip_sel[22] ;
+  wire \mprj_io_vtrip_sel[23] ;
+  wire \mprj_io_vtrip_sel[24] ;
+  wire \mprj_io_vtrip_sel[25] ;
+  wire \mprj_io_vtrip_sel[26] ;
+  wire \mprj_io_vtrip_sel[27] ;
+  wire \mprj_io_vtrip_sel[28] ;
+  wire \mprj_io_vtrip_sel[29] ;
+  wire \mprj_io_vtrip_sel[2] ;
+  wire \mprj_io_vtrip_sel[30] ;
+  wire \mprj_io_vtrip_sel[31] ;
+  wire \mprj_io_vtrip_sel[32] ;
+  wire \mprj_io_vtrip_sel[33] ;
+  wire \mprj_io_vtrip_sel[34] ;
+  wire \mprj_io_vtrip_sel[35] ;
+  wire \mprj_io_vtrip_sel[36] ;
+  wire \mprj_io_vtrip_sel[37] ;
+  wire \mprj_io_vtrip_sel[3] ;
+  wire \mprj_io_vtrip_sel[4] ;
+  wire \mprj_io_vtrip_sel[5] ;
+  wire \mprj_io_vtrip_sel[6] ;
+  wire \mprj_io_vtrip_sel[7] ;
+  wire \mprj_io_vtrip_sel[8] ;
+  wire \mprj_io_vtrip_sel[9] ;
+  wire mprj_reset;
+  wire \mprj_sel_o_core[0] ;
+  wire \mprj_sel_o_core[1] ;
+  wire \mprj_sel_o_core[2] ;
+  wire \mprj_sel_o_core[3] ;
+  wire \mprj_sel_o_user[0] ;
+  wire \mprj_sel_o_user[1] ;
+  wire \mprj_sel_o_user[2] ;
+  wire \mprj_sel_o_user[3] ;
+  wire mprj_stb_o_core;
+  wire mprj_stb_o_user;
+  wire mprj_vcc_pwrgood;
+  wire mprj_vdd_pwrgood;
+  wire mprj_we_o_core;
+  wire mprj_we_o_user;
+  wire pll_clk;
+  wire pll_clk90;
+  wire por_l;
+  wire por_l_buf;
+  wire porb_h;
+  wire porb_h_buf;
+  wire porb_h_in_nc;
+  wire porb_h_out_nc;
+  wire porb_l;
+  wire \pwr_ctrl_nc[0] ;
+  wire \pwr_ctrl_nc[1] ;
+  wire \pwr_ctrl_nc[2] ;
+  wire \pwr_ctrl_nc[3] ;
+  wire qspi_enabled;
+  input resetb;
+  wire resetn_passthru;
+  wire rstb_h;
+  wire rstb_l;
+  wire rstb_l_buf;
+  wire ser_rx;
+  wire ser_tx;
+  wire \spare_xfq_nc[0] ;
+  wire \spare_xfq_nc[1] ;
+  wire \spare_xfq_nc[2] ;
+  wire \spare_xfq_nc[3] ;
+  wire \spare_xfq_nc[4] ;
+  wire \spare_xfq_nc[5] ;
+  wire \spare_xfq_nc[6] ;
+  wire \spare_xfq_nc[7] ;
+  wire \spare_xfqn_nc[0] ;
+  wire \spare_xfqn_nc[1] ;
+  wire \spare_xfqn_nc[2] ;
+  wire \spare_xfqn_nc[3] ;
+  wire \spare_xfqn_nc[4] ;
+  wire \spare_xfqn_nc[5] ;
+  wire \spare_xfqn_nc[6] ;
+  wire \spare_xfqn_nc[7] ;
+  wire \spare_xi_nc[0] ;
+  wire \spare_xi_nc[10] ;
+  wire \spare_xi_nc[11] ;
+  wire \spare_xi_nc[12] ;
+  wire \spare_xi_nc[13] ;
+  wire \spare_xi_nc[14] ;
+  wire \spare_xi_nc[15] ;
+  wire \spare_xi_nc[1] ;
+  wire \spare_xi_nc[2] ;
+  wire \spare_xi_nc[3] ;
+  wire \spare_xi_nc[4] ;
+  wire \spare_xi_nc[5] ;
+  wire \spare_xi_nc[6] ;
+  wire \spare_xi_nc[7] ;
+  wire \spare_xi_nc[8] ;
+  wire \spare_xi_nc[9] ;
+  wire \spare_xib_nc[0] ;
+  wire \spare_xib_nc[1] ;
+  wire \spare_xib_nc[2] ;
+  wire \spare_xib_nc[3] ;
+  wire \spare_xmx_nc[0] ;
+  wire \spare_xmx_nc[1] ;
+  wire \spare_xmx_nc[2] ;
+  wire \spare_xmx_nc[3] ;
+  wire \spare_xmx_nc[4] ;
+  wire \spare_xmx_nc[5] ;
+  wire \spare_xmx_nc[6] ;
+  wire \spare_xmx_nc[7] ;
+  wire \spare_xna_nc[0] ;
+  wire \spare_xna_nc[1] ;
+  wire \spare_xna_nc[2] ;
+  wire \spare_xna_nc[3] ;
+  wire \spare_xna_nc[4] ;
+  wire \spare_xna_nc[5] ;
+  wire \spare_xna_nc[6] ;
+  wire \spare_xna_nc[7] ;
+  wire \spare_xno_nc[0] ;
+  wire \spare_xno_nc[1] ;
+  wire \spare_xno_nc[2] ;
+  wire \spare_xno_nc[3] ;
+  wire \spare_xno_nc[4] ;
+  wire \spare_xno_nc[5] ;
+  wire \spare_xno_nc[6] ;
+  wire \spare_xno_nc[7] ;
+  wire \spare_xz_nc[0] ;
+  wire \spare_xz_nc[100] ;
+  wire \spare_xz_nc[101] ;
+  wire \spare_xz_nc[102] ;
+  wire \spare_xz_nc[103] ;
+  wire \spare_xz_nc[104] ;
+  wire \spare_xz_nc[105] ;
+  wire \spare_xz_nc[106] ;
+  wire \spare_xz_nc[107] ;
+  wire \spare_xz_nc[10] ;
+  wire \spare_xz_nc[11] ;
+  wire \spare_xz_nc[12] ;
+  wire \spare_xz_nc[13] ;
+  wire \spare_xz_nc[14] ;
+  wire \spare_xz_nc[15] ;
+  wire \spare_xz_nc[16] ;
+  wire \spare_xz_nc[17] ;
+  wire \spare_xz_nc[18] ;
+  wire \spare_xz_nc[19] ;
+  wire \spare_xz_nc[1] ;
+  wire \spare_xz_nc[20] ;
+  wire \spare_xz_nc[21] ;
+  wire \spare_xz_nc[22] ;
+  wire \spare_xz_nc[23] ;
+  wire \spare_xz_nc[24] ;
+  wire \spare_xz_nc[25] ;
+  wire \spare_xz_nc[26] ;
+  wire \spare_xz_nc[27] ;
+  wire \spare_xz_nc[28] ;
+  wire \spare_xz_nc[29] ;
+  wire \spare_xz_nc[2] ;
+  wire \spare_xz_nc[30] ;
+  wire \spare_xz_nc[31] ;
+  wire \spare_xz_nc[32] ;
+  wire \spare_xz_nc[33] ;
+  wire \spare_xz_nc[34] ;
+  wire \spare_xz_nc[35] ;
+  wire \spare_xz_nc[36] ;
+  wire \spare_xz_nc[37] ;
+  wire \spare_xz_nc[38] ;
+  wire \spare_xz_nc[39] ;
+  wire \spare_xz_nc[3] ;
+  wire \spare_xz_nc[40] ;
+  wire \spare_xz_nc[41] ;
+  wire \spare_xz_nc[42] ;
+  wire \spare_xz_nc[43] ;
+  wire \spare_xz_nc[44] ;
+  wire \spare_xz_nc[45] ;
+  wire \spare_xz_nc[46] ;
+  wire \spare_xz_nc[47] ;
+  wire \spare_xz_nc[48] ;
+  wire \spare_xz_nc[49] ;
+  wire \spare_xz_nc[4] ;
+  wire \spare_xz_nc[50] ;
+  wire \spare_xz_nc[51] ;
+  wire \spare_xz_nc[52] ;
+  wire \spare_xz_nc[53] ;
+  wire \spare_xz_nc[54] ;
+  wire \spare_xz_nc[55] ;
+  wire \spare_xz_nc[56] ;
+  wire \spare_xz_nc[57] ;
+  wire \spare_xz_nc[58] ;
+  wire \spare_xz_nc[59] ;
+  wire \spare_xz_nc[5] ;
+  wire \spare_xz_nc[60] ;
+  wire \spare_xz_nc[61] ;
+  wire \spare_xz_nc[62] ;
+  wire \spare_xz_nc[63] ;
+  wire \spare_xz_nc[64] ;
+  wire \spare_xz_nc[65] ;
+  wire \spare_xz_nc[66] ;
+  wire \spare_xz_nc[67] ;
+  wire \spare_xz_nc[68] ;
+  wire \spare_xz_nc[69] ;
+  wire \spare_xz_nc[6] ;
+  wire \spare_xz_nc[70] ;
+  wire \spare_xz_nc[71] ;
+  wire \spare_xz_nc[72] ;
+  wire \spare_xz_nc[73] ;
+  wire \spare_xz_nc[74] ;
+  wire \spare_xz_nc[75] ;
+  wire \spare_xz_nc[76] ;
+  wire \spare_xz_nc[77] ;
+  wire \spare_xz_nc[78] ;
+  wire \spare_xz_nc[79] ;
+  wire \spare_xz_nc[7] ;
+  wire \spare_xz_nc[80] ;
+  wire \spare_xz_nc[81] ;
+  wire \spare_xz_nc[82] ;
+  wire \spare_xz_nc[83] ;
+  wire \spare_xz_nc[84] ;
+  wire \spare_xz_nc[85] ;
+  wire \spare_xz_nc[86] ;
+  wire \spare_xz_nc[87] ;
+  wire \spare_xz_nc[88] ;
+  wire \spare_xz_nc[89] ;
+  wire \spare_xz_nc[8] ;
+  wire \spare_xz_nc[90] ;
+  wire \spare_xz_nc[91] ;
+  wire \spare_xz_nc[92] ;
+  wire \spare_xz_nc[93] ;
+  wire \spare_xz_nc[94] ;
+  wire \spare_xz_nc[95] ;
+  wire \spare_xz_nc[96] ;
+  wire \spare_xz_nc[97] ;
+  wire \spare_xz_nc[98] ;
+  wire \spare_xz_nc[99] ;
+  wire \spare_xz_nc[9] ;
+  wire spi_csb;
+  wire spi_enabled;
+  wire \spi_pll90_sel[0] ;
+  wire \spi_pll90_sel[1] ;
+  wire \spi_pll90_sel[2] ;
+  wire spi_pll_dco_ena;
+  wire \spi_pll_div[0] ;
+  wire \spi_pll_div[1] ;
+  wire \spi_pll_div[2] ;
+  wire \spi_pll_div[3] ;
+  wire \spi_pll_div[4] ;
+  wire spi_pll_ena;
+  wire \spi_pll_sel[0] ;
+  wire \spi_pll_sel[1] ;
+  wire \spi_pll_sel[2] ;
+  wire \spi_pll_trim[0] ;
+  wire \spi_pll_trim[10] ;
+  wire \spi_pll_trim[11] ;
+  wire \spi_pll_trim[12] ;
+  wire \spi_pll_trim[13] ;
+  wire \spi_pll_trim[14] ;
+  wire \spi_pll_trim[15] ;
+  wire \spi_pll_trim[16] ;
+  wire \spi_pll_trim[17] ;
+  wire \spi_pll_trim[18] ;
+  wire \spi_pll_trim[19] ;
+  wire \spi_pll_trim[1] ;
+  wire \spi_pll_trim[20] ;
+  wire \spi_pll_trim[21] ;
+  wire \spi_pll_trim[22] ;
+  wire \spi_pll_trim[23] ;
+  wire \spi_pll_trim[24] ;
+  wire \spi_pll_trim[25] ;
+  wire \spi_pll_trim[2] ;
+  wire \spi_pll_trim[3] ;
+  wire \spi_pll_trim[4] ;
+  wire \spi_pll_trim[5] ;
+  wire \spi_pll_trim[6] ;
+  wire \spi_pll_trim[7] ;
+  wire \spi_pll_trim[8] ;
+  wire \spi_pll_trim[9] ;
+  wire spi_sck;
+  wire spi_sdi;
+  wire spi_sdo;
+  wire spi_sdoenb;
+  wire trap;
+  wire uart_enabled;
+  wire \user_analog_io[0] ;
+  wire \user_analog_io[10] ;
+  wire \user_analog_io[11] ;
+  wire \user_analog_io[12] ;
+  wire \user_analog_io[13] ;
+  wire \user_analog_io[14] ;
+  wire \user_analog_io[15] ;
+  wire \user_analog_io[16] ;
+  wire \user_analog_io[17] ;
+  wire \user_analog_io[18] ;
+  wire \user_analog_io[19] ;
+  wire \user_analog_io[1] ;
+  wire \user_analog_io[20] ;
+  wire \user_analog_io[21] ;
+  wire \user_analog_io[22] ;
+  wire \user_analog_io[23] ;
+  wire \user_analog_io[24] ;
+  wire \user_analog_io[25] ;
+  wire \user_analog_io[26] ;
+  wire \user_analog_io[27] ;
+  wire \user_analog_io[28] ;
+  wire \user_analog_io[2] ;
+  wire \user_analog_io[3] ;
+  wire \user_analog_io[4] ;
+  wire \user_analog_io[5] ;
+  wire \user_analog_io[6] ;
+  wire \user_analog_io[7] ;
+  wire \user_analog_io[8] ;
+  wire \user_analog_io[9] ;
+  wire \user_io_in[0] ;
+  wire \user_io_in[10] ;
+  wire \user_io_in[11] ;
+  wire \user_io_in[12] ;
+  wire \user_io_in[13] ;
+  wire \user_io_in[14] ;
+  wire \user_io_in[15] ;
+  wire \user_io_in[16] ;
+  wire \user_io_in[17] ;
+  wire \user_io_in[18] ;
+  wire \user_io_in[19] ;
+  wire \user_io_in[1] ;
+  wire \user_io_in[20] ;
+  wire \user_io_in[21] ;
+  wire \user_io_in[22] ;
+  wire \user_io_in[23] ;
+  wire \user_io_in[24] ;
+  wire \user_io_in[25] ;
+  wire \user_io_in[26] ;
+  wire \user_io_in[27] ;
+  wire \user_io_in[28] ;
+  wire \user_io_in[29] ;
+  wire \user_io_in[2] ;
+  wire \user_io_in[30] ;
+  wire \user_io_in[31] ;
+  wire \user_io_in[32] ;
+  wire \user_io_in[33] ;
+  wire \user_io_in[34] ;
+  wire \user_io_in[35] ;
+  wire \user_io_in[36] ;
+  wire \user_io_in[37] ;
+  wire \user_io_in[3] ;
+  wire \user_io_in[4] ;
+  wire \user_io_in[5] ;
+  wire \user_io_in[6] ;
+  wire \user_io_in[7] ;
+  wire \user_io_in[8] ;
+  wire \user_io_in[9] ;
+  wire \user_io_oeb[0] ;
+  wire \user_io_oeb[10] ;
+  wire \user_io_oeb[11] ;
+  wire \user_io_oeb[12] ;
+  wire \user_io_oeb[13] ;
+  wire \user_io_oeb[14] ;
+  wire \user_io_oeb[15] ;
+  wire \user_io_oeb[16] ;
+  wire \user_io_oeb[17] ;
+  wire \user_io_oeb[18] ;
+  wire \user_io_oeb[19] ;
+  wire \user_io_oeb[1] ;
+  wire \user_io_oeb[20] ;
+  wire \user_io_oeb[21] ;
+  wire \user_io_oeb[22] ;
+  wire \user_io_oeb[23] ;
+  wire \user_io_oeb[24] ;
+  wire \user_io_oeb[25] ;
+  wire \user_io_oeb[26] ;
+  wire \user_io_oeb[27] ;
+  wire \user_io_oeb[28] ;
+  wire \user_io_oeb[29] ;
+  wire \user_io_oeb[2] ;
+  wire \user_io_oeb[30] ;
+  wire \user_io_oeb[31] ;
+  wire \user_io_oeb[32] ;
+  wire \user_io_oeb[33] ;
+  wire \user_io_oeb[34] ;
+  wire \user_io_oeb[35] ;
+  wire \user_io_oeb[36] ;
+  wire \user_io_oeb[37] ;
+  wire \user_io_oeb[3] ;
+  wire \user_io_oeb[4] ;
+  wire \user_io_oeb[5] ;
+  wire \user_io_oeb[6] ;
+  wire \user_io_oeb[7] ;
+  wire \user_io_oeb[8] ;
+  wire \user_io_oeb[9] ;
+  wire \user_io_out[0] ;
+  wire \user_io_out[10] ;
+  wire \user_io_out[11] ;
+  wire \user_io_out[12] ;
+  wire \user_io_out[13] ;
+  wire \user_io_out[14] ;
+  wire \user_io_out[15] ;
+  wire \user_io_out[16] ;
+  wire \user_io_out[17] ;
+  wire \user_io_out[18] ;
+  wire \user_io_out[19] ;
+  wire \user_io_out[1] ;
+  wire \user_io_out[20] ;
+  wire \user_io_out[21] ;
+  wire \user_io_out[22] ;
+  wire \user_io_out[23] ;
+  wire \user_io_out[24] ;
+  wire \user_io_out[25] ;
+  wire \user_io_out[26] ;
+  wire \user_io_out[27] ;
+  wire \user_io_out[28] ;
+  wire \user_io_out[29] ;
+  wire \user_io_out[2] ;
+  wire \user_io_out[30] ;
+  wire \user_io_out[31] ;
+  wire \user_io_out[32] ;
+  wire \user_io_out[33] ;
+  wire \user_io_out[34] ;
+  wire \user_io_out[35] ;
+  wire \user_io_out[36] ;
+  wire \user_io_out[37] ;
+  wire \user_io_out[3] ;
+  wire \user_io_out[4] ;
+  wire \user_io_out[5] ;
+  wire \user_io_out[6] ;
+  wire \user_io_out[7] ;
+  wire \user_io_out[8] ;
+  wire \user_io_out[9] ;
+  wire \user_irq[0] ;
+  wire \user_irq[1] ;
+  wire \user_irq[2] ;
+  wire \user_irq_core[0] ;
+  wire \user_irq_core[1] ;
+  wire \user_irq_core[2] ;
+  wire \user_irq_ena[0] ;
+  wire \user_irq_ena[1] ;
+  wire \user_irq_ena[2] ;
+  inout vccd;
+  inout vccd1;
+  wire vccd1_core;
+  inout vccd2;
+  wire vccd2_core;
+  wire vccd_core;
+  inout vdda;
+  inout vdda1;
+  inout vdda1_2;
+  wire vdda1_core;
+  inout vdda2;
+  wire vdda2_core;
+  wire vdda_core;
+  inout vddio;
+  inout vddio_2;
+  wire vddio_core;
+  inout vssa;
+  inout vssa1;
+  inout vssa1_2;
+  wire vssa1_core;
+  inout vssa2;
+  wire vssa2_core;
+  wire vssa_core;
+  inout vssd;
+  inout vssd1;
+  wire vssd1_core;
+  inout vssd2;
+  wire vssd2_core;
+  wire vssd_core;
+  inout vssio;
+  inout vssio_2;
+  wire vssio_core;
+  caravel_clocking clock_ctrl (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .core_clk(caravel_clk),
+    .ext_clk(clock_core_buf),
+    .ext_clk_sel(ext_clk_sel),
+    .ext_reset(ext_reset),
+    .pll_clk(pll_clk),
+    .pll_clk90(pll_clk90),
+    .resetb(rstb_l_buf),
+    .resetb_sync(caravel_rstn),
+    .sel({ \spi_pll_sel[2] , \spi_pll_sel[1] , \spi_pll_sel[0]  }),
+    .sel2({ \spi_pll90_sel[2] , \spi_pll90_sel[1] , \spi_pll90_sel[0]  }),
+    .user_clk(caravel_clk2)
+  );
+  buff_flash_clkrst flash_clkrst_buffers (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .in_n({ caravel_clk, caravel_rstn, flash_clk_frame, flash_csb_frame, flash_clk_oeb, flash_csb_oeb, flash_io0_oeb, flash_io1_oeb, flash_io0_ieb, flash_io1_ieb, flash_io0_do, flash_io1_do }),
+    .in_s({ clock_core, flash_io1_di, flash_io0_di }),
+    .out_n({ clock_core_buf, flash_io1_di_buf, flash_io0_di_buf }),
+    .out_s({ caravel_clk_buf, caravel_rstn_buf, flash_clk_frame_buf, flash_csb_frame_buf, flash_clk_oeb_buf, flash_csb_oeb_buf, flash_io0_oeb_buf, flash_io1_oeb_buf, flash_io0_ieb_buf, flash_io1_ieb_buf, flash_io0_do_buf, flash_io1_do_buf })
+  );
+  gpio_control_block \gpio_control_bidir_1[0]  (
+    .gpio_defaults({ \gpio_defaults[12] , \gpio_defaults[11] , \gpio_defaults[10] , \gpio_defaults[9] , \gpio_defaults[8] , \gpio_defaults[7] , \gpio_defaults[6] , \gpio_defaults[5] , \gpio_defaults[4] , \gpio_defaults[3] , \gpio_defaults[2] , \gpio_defaults[1] , \gpio_defaults[0]  }),
+    .mgmt_gpio_in(\mgmt_io_in[0] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[0] ),
+    .mgmt_gpio_out(\mgmt_io_out[0] ),
+    .one(\mprj_io_one[0] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[0] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[0] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[0] ),
+    .pad_gpio_dm({ \mprj_io_dm[2] , \mprj_io_dm[1] , \mprj_io_dm[0]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[0] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[0] ),
+    .pad_gpio_in(\mprj_io_in[0] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[0] ),
+    .pad_gpio_out(\mprj_io_out[0] ),
+    .pad_gpio_outenb(\mprj_io_oeb[0] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[0] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[0] ),
+    .resetn(\gpio_resetn_1_shifted[0] ),
+    .resetn_out(\gpio_resetn_1[0] ),
+    .serial_clock(\gpio_clock_1_shifted[0] ),
+    .serial_clock_out(\gpio_clock_1[0] ),
+    .serial_data_in(\gpio_serial_link_1_shifted[0] ),
+    .serial_data_out(\gpio_serial_link_1[0] ),
+    .serial_load(\gpio_load_1_shifted[0] ),
+    .serial_load_out(\gpio_load_1[0] ),
+    .user_gpio_in(\user_io_in[0] ),
+    .user_gpio_oeb(\user_io_oeb[0] ),
+    .user_gpio_out(\user_io_out[0] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_1[1]  (
+    .gpio_defaults({ \gpio_defaults[25] , \gpio_defaults[24] , \gpio_defaults[23] , \gpio_defaults[22] , \gpio_defaults[21] , \gpio_defaults[20] , \gpio_defaults[19] , \gpio_defaults[18] , \gpio_defaults[17] , \gpio_defaults[16] , \gpio_defaults[15] , \gpio_defaults[14] , \gpio_defaults[13]  }),
+    .mgmt_gpio_in(\mgmt_io_in[1] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[1] ),
+    .mgmt_gpio_out(\mgmt_io_out[1] ),
+    .one(\mprj_io_one[1] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[1] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[1] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[1] ),
+    .pad_gpio_dm({ \mprj_io_dm[5] , \mprj_io_dm[4] , \mprj_io_dm[3]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[1] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[1] ),
+    .pad_gpio_in(\mprj_io_in[1] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[1] ),
+    .pad_gpio_out(\mprj_io_out[1] ),
+    .pad_gpio_outenb(\mprj_io_oeb[1] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[1] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[1] ),
+    .resetn(\gpio_resetn_1[0] ),
+    .resetn_out(\gpio_resetn_1[1] ),
+    .serial_clock(\gpio_clock_1[0] ),
+    .serial_clock_out(\gpio_clock_1[1] ),
+    .serial_data_in(\gpio_serial_link_1[0] ),
+    .serial_data_out(\gpio_serial_link_1[1] ),
+    .serial_load(\gpio_load_1[0] ),
+    .serial_load_out(\gpio_load_1[1] ),
+    .user_gpio_in(\user_io_in[1] ),
+    .user_gpio_oeb(\user_io_oeb[1] ),
+    .user_gpio_out(\user_io_out[1] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[0]  (
+    .gpio_defaults({ \gpio_defaults[467] , \gpio_defaults[466] , \gpio_defaults[465] , \gpio_defaults[464] , \gpio_defaults[463] , \gpio_defaults[462] , \gpio_defaults[461] , \gpio_defaults[460] , \gpio_defaults[459] , \gpio_defaults[458] , \gpio_defaults[457] , \gpio_defaults[456] , \gpio_defaults[455]  }),
+    .mgmt_gpio_in(\mgmt_io_in[35] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[35] ),
+    .mgmt_gpio_out(\mgmt_io_out[35] ),
+    .one(\mprj_io_one[35] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[35] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[35] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[35] ),
+    .pad_gpio_dm({ \mprj_io_dm[107] , \mprj_io_dm[106] , \mprj_io_dm[105]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[35] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[35] ),
+    .pad_gpio_in(\mprj_io_in[35] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[35] ),
+    .pad_gpio_out(\mprj_io_out[35] ),
+    .pad_gpio_outenb(\mprj_io_oeb[35] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[35] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[35] ),
+    .resetn(\gpio_resetn_2[17] ),
+    .resetn_out(\gpio_resetn_2[16] ),
+    .serial_clock(\gpio_clock_2[17] ),
+    .serial_clock_out(\gpio_clock_2[16] ),
+    .serial_data_in(\gpio_serial_link_2[17] ),
+    .serial_data_out(\gpio_serial_link_2[16] ),
+    .serial_load(\gpio_load_2[17] ),
+    .serial_load_out(\gpio_load_2[16] ),
+    .user_gpio_in(\user_io_in[35] ),
+    .user_gpio_oeb(\user_io_oeb[35] ),
+    .user_gpio_out(\user_io_out[35] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[1]  (
+    .gpio_defaults({ \gpio_defaults[480] , \gpio_defaults[479] , \gpio_defaults[478] , \gpio_defaults[477] , \gpio_defaults[476] , \gpio_defaults[475] , \gpio_defaults[474] , \gpio_defaults[473] , \gpio_defaults[472] , \gpio_defaults[471] , \gpio_defaults[470] , \gpio_defaults[469] , \gpio_defaults[468]  }),
+    .mgmt_gpio_in(\mgmt_io_in[36] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[36] ),
+    .mgmt_gpio_out(\mgmt_io_out[36] ),
+    .one(\mprj_io_one[36] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[36] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[36] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[36] ),
+    .pad_gpio_dm({ \mprj_io_dm[110] , \mprj_io_dm[109] , \mprj_io_dm[108]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[36] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[36] ),
+    .pad_gpio_in(\mprj_io_in[36] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[36] ),
+    .pad_gpio_out(\mprj_io_out[36] ),
+    .pad_gpio_outenb(\mprj_io_oeb[36] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[36] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[36] ),
+    .resetn(\gpio_resetn_2[18] ),
+    .resetn_out(\gpio_resetn_2[17] ),
+    .serial_clock(\gpio_clock_2[18] ),
+    .serial_clock_out(\gpio_clock_2[17] ),
+    .serial_data_in(\gpio_serial_link_2[18] ),
+    .serial_data_out(\gpio_serial_link_2[17] ),
+    .serial_load(\gpio_load_2[18] ),
+    .serial_load_out(\gpio_load_2[17] ),
+    .user_gpio_in(\user_io_in[36] ),
+    .user_gpio_oeb(\user_io_oeb[36] ),
+    .user_gpio_out(\user_io_out[36] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_bidir_2[2]  (
+    .gpio_defaults({ \gpio_defaults[493] , \gpio_defaults[492] , \gpio_defaults[491] , \gpio_defaults[490] , \gpio_defaults[489] , \gpio_defaults[488] , \gpio_defaults[487] , \gpio_defaults[486] , \gpio_defaults[485] , \gpio_defaults[484] , \gpio_defaults[483] , \gpio_defaults[482] , \gpio_defaults[481]  }),
+    .mgmt_gpio_in(\mgmt_io_in[37] ),
+    .mgmt_gpio_oeb(\mgmt_io_oeb[37] ),
+    .mgmt_gpio_out(\mgmt_io_out[37] ),
+    .one(\mprj_io_one[37] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[37] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[37] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[37] ),
+    .pad_gpio_dm({ \mprj_io_dm[113] , \mprj_io_dm[112] , \mprj_io_dm[111]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[37] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[37] ),
+    .pad_gpio_in(\mprj_io_in[37] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[37] ),
+    .pad_gpio_out(\mprj_io_out[37] ),
+    .pad_gpio_outenb(\mprj_io_oeb[37] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[37] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[37] ),
+    .resetn(\gpio_resetn_2_shifted[18] ),
+    .resetn_out(\gpio_resetn_2[18] ),
+    .serial_clock(\gpio_clock_2_shifted[18] ),
+    .serial_clock_out(\gpio_clock_2[18] ),
+    .serial_data_in(\gpio_serial_link_2_shifted[18] ),
+    .serial_data_out(\gpio_serial_link_2[18] ),
+    .serial_load(\gpio_load_2_shifted[18] ),
+    .serial_load_out(\gpio_load_2[18] ),
+    .user_gpio_in(\user_io_in[37] ),
+    .user_gpio_oeb(\user_io_oeb[37] ),
+    .user_gpio_out(\user_io_out[37] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[0]  (
+    .gpio_defaults({ \gpio_defaults[116] , \gpio_defaults[115] , \gpio_defaults[114] , \gpio_defaults[113] , \gpio_defaults[112] , \gpio_defaults[111] , \gpio_defaults[110] , \gpio_defaults[109] , \gpio_defaults[108] , \gpio_defaults[107] , \gpio_defaults[106] , \gpio_defaults[105] , \gpio_defaults[104]  }),
+    .mgmt_gpio_in(\mgmt_io_in[8] ),
+    .mgmt_gpio_oeb(\mprj_io_one[8] ),
+    .mgmt_gpio_out(\mgmt_io_out[8] ),
+    .one(\mprj_io_one[8] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[8] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[8] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[8] ),
+    .pad_gpio_dm({ \mprj_io_dm[26] , \mprj_io_dm[25] , \mprj_io_dm[24]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[8] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[8] ),
+    .pad_gpio_in(\mprj_io_in[8] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[8] ),
+    .pad_gpio_out(\mprj_io_out[8] ),
+    .pad_gpio_outenb(\mprj_io_oeb[8] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[8] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[8] ),
+    .resetn(\gpio_resetn_1[7] ),
+    .resetn_out(\gpio_resetn_1[8] ),
+    .serial_clock(\gpio_clock_1[7] ),
+    .serial_clock_out(\gpio_clock_1[8] ),
+    .serial_data_in(\gpio_serial_link_1[7] ),
+    .serial_data_out(\gpio_serial_link_1[8] ),
+    .serial_load(\gpio_load_1[7] ),
+    .serial_load_out(\gpio_load_1[8] ),
+    .user_gpio_in(\user_io_in[8] ),
+    .user_gpio_oeb(\user_io_oeb[8] ),
+    .user_gpio_out(\user_io_out[8] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[10]  (
+    .gpio_defaults({ \gpio_defaults[246] , \gpio_defaults[245] , \gpio_defaults[244] , \gpio_defaults[243] , \gpio_defaults[242] , \gpio_defaults[241] , \gpio_defaults[240] , \gpio_defaults[239] , \gpio_defaults[238] , \gpio_defaults[237] , \gpio_defaults[236] , \gpio_defaults[235] , \gpio_defaults[234]  }),
+    .mgmt_gpio_in(\mgmt_io_in[18] ),
+    .mgmt_gpio_oeb(\mprj_io_one[18] ),
+    .mgmt_gpio_out(\mgmt_io_out[18] ),
+    .one(\mprj_io_one[18] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[18] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[18] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[18] ),
+    .pad_gpio_dm({ \mprj_io_dm[56] , \mprj_io_dm[55] , \mprj_io_dm[54]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[18] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[18] ),
+    .pad_gpio_in(\mprj_io_in[18] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[18] ),
+    .pad_gpio_out(\mprj_io_out[18] ),
+    .pad_gpio_outenb(\mprj_io_oeb[18] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[18] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[18] ),
+    .resetn(\gpio_resetn_1[17] ),
+    .resetn_out(\gpio_resetn_1[18] ),
+    .serial_clock(\gpio_clock_1[17] ),
+    .serial_clock_out(\gpio_clock_1[18] ),
+    .serial_data_in(\gpio_serial_link_1[17] ),
+    .serial_data_out(\gpio_serial_link_1[18] ),
+    .serial_load(\gpio_load_1[17] ),
+    .serial_load_out(\gpio_load_1[18] ),
+    .user_gpio_in(\user_io_in[18] ),
+    .user_gpio_oeb(\user_io_oeb[18] ),
+    .user_gpio_out(\user_io_out[18] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[1]  (
+    .gpio_defaults({ \gpio_defaults[129] , \gpio_defaults[128] , \gpio_defaults[127] , \gpio_defaults[126] , \gpio_defaults[125] , \gpio_defaults[124] , \gpio_defaults[123] , \gpio_defaults[122] , \gpio_defaults[121] , \gpio_defaults[120] , \gpio_defaults[119] , \gpio_defaults[118] , \gpio_defaults[117]  }),
+    .mgmt_gpio_in(\mgmt_io_in[9] ),
+    .mgmt_gpio_oeb(\mprj_io_one[9] ),
+    .mgmt_gpio_out(\mgmt_io_out[9] ),
+    .one(\mprj_io_one[9] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[9] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[9] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[9] ),
+    .pad_gpio_dm({ \mprj_io_dm[29] , \mprj_io_dm[28] , \mprj_io_dm[27]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[9] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[9] ),
+    .pad_gpio_in(\mprj_io_in[9] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[9] ),
+    .pad_gpio_out(\mprj_io_out[9] ),
+    .pad_gpio_outenb(\mprj_io_oeb[9] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[9] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[9] ),
+    .resetn(\gpio_resetn_1[8] ),
+    .resetn_out(\gpio_resetn_1[9] ),
+    .serial_clock(\gpio_clock_1[8] ),
+    .serial_clock_out(\gpio_clock_1[9] ),
+    .serial_data_in(\gpio_serial_link_1[8] ),
+    .serial_data_out(\gpio_serial_link_1[9] ),
+    .serial_load(\gpio_load_1[8] ),
+    .serial_load_out(\gpio_load_1[9] ),
+    .user_gpio_in(\user_io_in[9] ),
+    .user_gpio_oeb(\user_io_oeb[9] ),
+    .user_gpio_out(\user_io_out[9] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[2]  (
+    .gpio_defaults({ \gpio_defaults[142] , \gpio_defaults[141] , \gpio_defaults[140] , \gpio_defaults[139] , \gpio_defaults[138] , \gpio_defaults[137] , \gpio_defaults[136] , \gpio_defaults[135] , \gpio_defaults[134] , \gpio_defaults[133] , \gpio_defaults[132] , \gpio_defaults[131] , \gpio_defaults[130]  }),
+    .mgmt_gpio_in(\mgmt_io_in[10] ),
+    .mgmt_gpio_oeb(\mprj_io_one[10] ),
+    .mgmt_gpio_out(\mgmt_io_out[10] ),
+    .one(\mprj_io_one[10] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[10] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[10] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[10] ),
+    .pad_gpio_dm({ \mprj_io_dm[32] , \mprj_io_dm[31] , \mprj_io_dm[30]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[10] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[10] ),
+    .pad_gpio_in(\mprj_io_in[10] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[10] ),
+    .pad_gpio_out(\mprj_io_out[10] ),
+    .pad_gpio_outenb(\mprj_io_oeb[10] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[10] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[10] ),
+    .resetn(\gpio_resetn_1[9] ),
+    .resetn_out(\gpio_resetn_1[10] ),
+    .serial_clock(\gpio_clock_1[9] ),
+    .serial_clock_out(\gpio_clock_1[10] ),
+    .serial_data_in(\gpio_serial_link_1[9] ),
+    .serial_data_out(\gpio_serial_link_1[10] ),
+    .serial_load(\gpio_load_1[9] ),
+    .serial_load_out(\gpio_load_1[10] ),
+    .user_gpio_in(\user_io_in[10] ),
+    .user_gpio_oeb(\user_io_oeb[10] ),
+    .user_gpio_out(\user_io_out[10] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[3]  (
+    .gpio_defaults({ \gpio_defaults[155] , \gpio_defaults[154] , \gpio_defaults[153] , \gpio_defaults[152] , \gpio_defaults[151] , \gpio_defaults[150] , \gpio_defaults[149] , \gpio_defaults[148] , \gpio_defaults[147] , \gpio_defaults[146] , \gpio_defaults[145] , \gpio_defaults[144] , \gpio_defaults[143]  }),
+    .mgmt_gpio_in(\mgmt_io_in[11] ),
+    .mgmt_gpio_oeb(\mprj_io_one[11] ),
+    .mgmt_gpio_out(\mgmt_io_out[11] ),
+    .one(\mprj_io_one[11] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[11] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[11] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[11] ),
+    .pad_gpio_dm({ \mprj_io_dm[35] , \mprj_io_dm[34] , \mprj_io_dm[33]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[11] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[11] ),
+    .pad_gpio_in(\mprj_io_in[11] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[11] ),
+    .pad_gpio_out(\mprj_io_out[11] ),
+    .pad_gpio_outenb(\mprj_io_oeb[11] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[11] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[11] ),
+    .resetn(\gpio_resetn_1[10] ),
+    .resetn_out(\gpio_resetn_1[11] ),
+    .serial_clock(\gpio_clock_1[10] ),
+    .serial_clock_out(\gpio_clock_1[11] ),
+    .serial_data_in(\gpio_serial_link_1[10] ),
+    .serial_data_out(\gpio_serial_link_1[11] ),
+    .serial_load(\gpio_load_1[10] ),
+    .serial_load_out(\gpio_load_1[11] ),
+    .user_gpio_in(\user_io_in[11] ),
+    .user_gpio_oeb(\user_io_oeb[11] ),
+    .user_gpio_out(\user_io_out[11] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[4]  (
+    .gpio_defaults({ \gpio_defaults[168] , \gpio_defaults[167] , \gpio_defaults[166] , \gpio_defaults[165] , \gpio_defaults[164] , \gpio_defaults[163] , \gpio_defaults[162] , \gpio_defaults[161] , \gpio_defaults[160] , \gpio_defaults[159] , \gpio_defaults[158] , \gpio_defaults[157] , \gpio_defaults[156]  }),
+    .mgmt_gpio_in(\mgmt_io_in[12] ),
+    .mgmt_gpio_oeb(\mprj_io_one[12] ),
+    .mgmt_gpio_out(\mgmt_io_out[12] ),
+    .one(\mprj_io_one[12] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[12] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[12] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[12] ),
+    .pad_gpio_dm({ \mprj_io_dm[38] , \mprj_io_dm[37] , \mprj_io_dm[36]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[12] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[12] ),
+    .pad_gpio_in(\mprj_io_in[12] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[12] ),
+    .pad_gpio_out(\mprj_io_out[12] ),
+    .pad_gpio_outenb(\mprj_io_oeb[12] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[12] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[12] ),
+    .resetn(\gpio_resetn_1[11] ),
+    .resetn_out(\gpio_resetn_1[12] ),
+    .serial_clock(\gpio_clock_1[11] ),
+    .serial_clock_out(\gpio_clock_1[12] ),
+    .serial_data_in(\gpio_serial_link_1[11] ),
+    .serial_data_out(\gpio_serial_link_1[12] ),
+    .serial_load(\gpio_load_1[11] ),
+    .serial_load_out(\gpio_load_1[12] ),
+    .user_gpio_in(\user_io_in[12] ),
+    .user_gpio_oeb(\user_io_oeb[12] ),
+    .user_gpio_out(\user_io_out[12] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[5]  (
+    .gpio_defaults({ \gpio_defaults[181] , \gpio_defaults[180] , \gpio_defaults[179] , \gpio_defaults[178] , \gpio_defaults[177] , \gpio_defaults[176] , \gpio_defaults[175] , \gpio_defaults[174] , \gpio_defaults[173] , \gpio_defaults[172] , \gpio_defaults[171] , \gpio_defaults[170] , \gpio_defaults[169]  }),
+    .mgmt_gpio_in(\mgmt_io_in[13] ),
+    .mgmt_gpio_oeb(\mprj_io_one[13] ),
+    .mgmt_gpio_out(\mgmt_io_out[13] ),
+    .one(\mprj_io_one[13] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[13] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[13] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[13] ),
+    .pad_gpio_dm({ \mprj_io_dm[41] , \mprj_io_dm[40] , \mprj_io_dm[39]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[13] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[13] ),
+    .pad_gpio_in(\mprj_io_in[13] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[13] ),
+    .pad_gpio_out(\mprj_io_out[13] ),
+    .pad_gpio_outenb(\mprj_io_oeb[13] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[13] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[13] ),
+    .resetn(\gpio_resetn_1[12] ),
+    .resetn_out(\gpio_resetn_1[13] ),
+    .serial_clock(\gpio_clock_1[12] ),
+    .serial_clock_out(\gpio_clock_1[13] ),
+    .serial_data_in(\gpio_serial_link_1[12] ),
+    .serial_data_out(\gpio_serial_link_1[13] ),
+    .serial_load(\gpio_load_1[12] ),
+    .serial_load_out(\gpio_load_1[13] ),
+    .user_gpio_in(\user_io_in[13] ),
+    .user_gpio_oeb(\user_io_oeb[13] ),
+    .user_gpio_out(\user_io_out[13] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[6]  (
+    .gpio_defaults({ \gpio_defaults[194] , \gpio_defaults[193] , \gpio_defaults[192] , \gpio_defaults[191] , \gpio_defaults[190] , \gpio_defaults[189] , \gpio_defaults[188] , \gpio_defaults[187] , \gpio_defaults[186] , \gpio_defaults[185] , \gpio_defaults[184] , \gpio_defaults[183] , \gpio_defaults[182]  }),
+    .mgmt_gpio_in(\mgmt_io_in[14] ),
+    .mgmt_gpio_oeb(\mprj_io_one[14] ),
+    .mgmt_gpio_out(\mgmt_io_out[14] ),
+    .one(\mprj_io_one[14] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[14] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[14] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[14] ),
+    .pad_gpio_dm({ \mprj_io_dm[44] , \mprj_io_dm[43] , \mprj_io_dm[42]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[14] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[14] ),
+    .pad_gpio_in(\mprj_io_in[14] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[14] ),
+    .pad_gpio_out(\mprj_io_out[14] ),
+    .pad_gpio_outenb(\mprj_io_oeb[14] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[14] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[14] ),
+    .resetn(\gpio_resetn_1[13] ),
+    .resetn_out(\gpio_resetn_1[14] ),
+    .serial_clock(\gpio_clock_1[13] ),
+    .serial_clock_out(\gpio_clock_1[14] ),
+    .serial_data_in(\gpio_serial_link_1[13] ),
+    .serial_data_out(\gpio_serial_link_1[14] ),
+    .serial_load(\gpio_load_1[13] ),
+    .serial_load_out(\gpio_load_1[14] ),
+    .user_gpio_in(\user_io_in[14] ),
+    .user_gpio_oeb(\user_io_oeb[14] ),
+    .user_gpio_out(\user_io_out[14] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[7]  (
+    .gpio_defaults({ \gpio_defaults[207] , \gpio_defaults[206] , \gpio_defaults[205] , \gpio_defaults[204] , \gpio_defaults[203] , \gpio_defaults[202] , \gpio_defaults[201] , \gpio_defaults[200] , \gpio_defaults[199] , \gpio_defaults[198] , \gpio_defaults[197] , \gpio_defaults[196] , \gpio_defaults[195]  }),
+    .mgmt_gpio_in(\mgmt_io_in[15] ),
+    .mgmt_gpio_oeb(\mprj_io_one[15] ),
+    .mgmt_gpio_out(\mgmt_io_out[15] ),
+    .one(\mprj_io_one[15] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[15] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[15] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[15] ),
+    .pad_gpio_dm({ \mprj_io_dm[47] , \mprj_io_dm[46] , \mprj_io_dm[45]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[15] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[15] ),
+    .pad_gpio_in(\mprj_io_in[15] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[15] ),
+    .pad_gpio_out(\mprj_io_out[15] ),
+    .pad_gpio_outenb(\mprj_io_oeb[15] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[15] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[15] ),
+    .resetn(\gpio_resetn_1[14] ),
+    .resetn_out(\gpio_resetn_1[15] ),
+    .serial_clock(\gpio_clock_1[14] ),
+    .serial_clock_out(\gpio_clock_1[15] ),
+    .serial_data_in(\gpio_serial_link_1[14] ),
+    .serial_data_out(\gpio_serial_link_1[15] ),
+    .serial_load(\gpio_load_1[14] ),
+    .serial_load_out(\gpio_load_1[15] ),
+    .user_gpio_in(\user_io_in[15] ),
+    .user_gpio_oeb(\user_io_oeb[15] ),
+    .user_gpio_out(\user_io_out[15] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[8]  (
+    .gpio_defaults({ \gpio_defaults[220] , \gpio_defaults[219] , \gpio_defaults[218] , \gpio_defaults[217] , \gpio_defaults[216] , \gpio_defaults[215] , \gpio_defaults[214] , \gpio_defaults[213] , \gpio_defaults[212] , \gpio_defaults[211] , \gpio_defaults[210] , \gpio_defaults[209] , \gpio_defaults[208]  }),
+    .mgmt_gpio_in(\mgmt_io_in[16] ),
+    .mgmt_gpio_oeb(\mprj_io_one[16] ),
+    .mgmt_gpio_out(\mgmt_io_out[16] ),
+    .one(\mprj_io_one[16] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[16] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[16] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[16] ),
+    .pad_gpio_dm({ \mprj_io_dm[50] , \mprj_io_dm[49] , \mprj_io_dm[48]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[16] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[16] ),
+    .pad_gpio_in(\mprj_io_in[16] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[16] ),
+    .pad_gpio_out(\mprj_io_out[16] ),
+    .pad_gpio_outenb(\mprj_io_oeb[16] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[16] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[16] ),
+    .resetn(\gpio_resetn_1[15] ),
+    .resetn_out(\gpio_resetn_1[16] ),
+    .serial_clock(\gpio_clock_1[15] ),
+    .serial_clock_out(\gpio_clock_1[16] ),
+    .serial_data_in(\gpio_serial_link_1[15] ),
+    .serial_data_out(\gpio_serial_link_1[16] ),
+    .serial_load(\gpio_load_1[15] ),
+    .serial_load_out(\gpio_load_1[16] ),
+    .user_gpio_in(\user_io_in[16] ),
+    .user_gpio_oeb(\user_io_oeb[16] ),
+    .user_gpio_out(\user_io_out[16] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1[9]  (
+    .gpio_defaults({ \gpio_defaults[233] , \gpio_defaults[232] , \gpio_defaults[231] , \gpio_defaults[230] , \gpio_defaults[229] , \gpio_defaults[228] , \gpio_defaults[227] , \gpio_defaults[226] , \gpio_defaults[225] , \gpio_defaults[224] , \gpio_defaults[223] , \gpio_defaults[222] , \gpio_defaults[221]  }),
+    .mgmt_gpio_in(\mgmt_io_in[17] ),
+    .mgmt_gpio_oeb(\mprj_io_one[17] ),
+    .mgmt_gpio_out(\mgmt_io_out[17] ),
+    .one(\mprj_io_one[17] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[17] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[17] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[17] ),
+    .pad_gpio_dm({ \mprj_io_dm[53] , \mprj_io_dm[52] , \mprj_io_dm[51]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[17] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[17] ),
+    .pad_gpio_in(\mprj_io_in[17] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[17] ),
+    .pad_gpio_out(\mprj_io_out[17] ),
+    .pad_gpio_outenb(\mprj_io_oeb[17] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[17] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[17] ),
+    .resetn(\gpio_resetn_1[16] ),
+    .resetn_out(\gpio_resetn_1[17] ),
+    .serial_clock(\gpio_clock_1[16] ),
+    .serial_clock_out(\gpio_clock_1[17] ),
+    .serial_data_in(\gpio_serial_link_1[16] ),
+    .serial_data_out(\gpio_serial_link_1[17] ),
+    .serial_load(\gpio_load_1[16] ),
+    .serial_load_out(\gpio_load_1[17] ),
+    .user_gpio_in(\user_io_in[17] ),
+    .user_gpio_oeb(\user_io_oeb[17] ),
+    .user_gpio_out(\user_io_out[17] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[0]  (
+    .gpio_defaults({ \gpio_defaults[38] , \gpio_defaults[37] , \gpio_defaults[36] , \gpio_defaults[35] , \gpio_defaults[34] , \gpio_defaults[33] , \gpio_defaults[32] , \gpio_defaults[31] , \gpio_defaults[30] , \gpio_defaults[29] , \gpio_defaults[28] , \gpio_defaults[27] , \gpio_defaults[26]  }),
+    .mgmt_gpio_in(\mgmt_io_in[2] ),
+    .mgmt_gpio_oeb(\mprj_io_one[2] ),
+    .mgmt_gpio_out(\mgmt_io_out[2] ),
+    .one(\mprj_io_one[2] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[2] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[2] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[2] ),
+    .pad_gpio_dm({ \mprj_io_dm[8] , \mprj_io_dm[7] , \mprj_io_dm[6]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[2] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[2] ),
+    .pad_gpio_in(\mprj_io_in[2] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[2] ),
+    .pad_gpio_out(\mprj_io_out[2] ),
+    .pad_gpio_outenb(\mprj_io_oeb[2] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[2] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[2] ),
+    .resetn(\gpio_resetn_1[1] ),
+    .resetn_out(\gpio_resetn_1[2] ),
+    .serial_clock(\gpio_clock_1[1] ),
+    .serial_clock_out(\gpio_clock_1[2] ),
+    .serial_data_in(\gpio_serial_link_1[1] ),
+    .serial_data_out(\gpio_serial_link_1[2] ),
+    .serial_load(\gpio_load_1[1] ),
+    .serial_load_out(\gpio_load_1[2] ),
+    .user_gpio_in(\user_io_in[2] ),
+    .user_gpio_oeb(\user_io_oeb[2] ),
+    .user_gpio_out(\user_io_out[2] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[1]  (
+    .gpio_defaults({ \gpio_defaults[51] , \gpio_defaults[50] , \gpio_defaults[49] , \gpio_defaults[48] , \gpio_defaults[47] , \gpio_defaults[46] , \gpio_defaults[45] , \gpio_defaults[44] , \gpio_defaults[43] , \gpio_defaults[42] , \gpio_defaults[41] , \gpio_defaults[40] , \gpio_defaults[39]  }),
+    .mgmt_gpio_in(\mgmt_io_in[3] ),
+    .mgmt_gpio_oeb(\mprj_io_one[3] ),
+    .mgmt_gpio_out(\mgmt_io_out[3] ),
+    .one(\mprj_io_one[3] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[3] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[3] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[3] ),
+    .pad_gpio_dm({ \mprj_io_dm[11] , \mprj_io_dm[10] , \mprj_io_dm[9]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[3] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[3] ),
+    .pad_gpio_in(\mprj_io_in[3] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[3] ),
+    .pad_gpio_out(\mprj_io_out[3] ),
+    .pad_gpio_outenb(\mprj_io_oeb[3] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[3] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[3] ),
+    .resetn(\gpio_resetn_1[2] ),
+    .resetn_out(\gpio_resetn_1[3] ),
+    .serial_clock(\gpio_clock_1[2] ),
+    .serial_clock_out(\gpio_clock_1[3] ),
+    .serial_data_in(\gpio_serial_link_1[2] ),
+    .serial_data_out(\gpio_serial_link_1[3] ),
+    .serial_load(\gpio_load_1[2] ),
+    .serial_load_out(\gpio_load_1[3] ),
+    .user_gpio_in(\user_io_in[3] ),
+    .user_gpio_oeb(\user_io_oeb[3] ),
+    .user_gpio_out(\user_io_out[3] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[2]  (
+    .gpio_defaults({ \gpio_defaults[64] , \gpio_defaults[63] , \gpio_defaults[62] , \gpio_defaults[61] , \gpio_defaults[60] , \gpio_defaults[59] , \gpio_defaults[58] , \gpio_defaults[57] , \gpio_defaults[56] , \gpio_defaults[55] , \gpio_defaults[54] , \gpio_defaults[53] , \gpio_defaults[52]  }),
+    .mgmt_gpio_in(\mgmt_io_in[4] ),
+    .mgmt_gpio_oeb(\mprj_io_one[4] ),
+    .mgmt_gpio_out(\mgmt_io_out[4] ),
+    .one(\mprj_io_one[4] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[4] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[4] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[4] ),
+    .pad_gpio_dm({ \mprj_io_dm[14] , \mprj_io_dm[13] , \mprj_io_dm[12]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[4] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[4] ),
+    .pad_gpio_in(\mprj_io_in[4] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[4] ),
+    .pad_gpio_out(\mprj_io_out[4] ),
+    .pad_gpio_outenb(\mprj_io_oeb[4] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[4] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[4] ),
+    .resetn(\gpio_resetn_1[3] ),
+    .resetn_out(\gpio_resetn_1[4] ),
+    .serial_clock(\gpio_clock_1[3] ),
+    .serial_clock_out(\gpio_clock_1[4] ),
+    .serial_data_in(\gpio_serial_link_1[3] ),
+    .serial_data_out(\gpio_serial_link_1[4] ),
+    .serial_load(\gpio_load_1[3] ),
+    .serial_load_out(\gpio_load_1[4] ),
+    .user_gpio_in(\user_io_in[4] ),
+    .user_gpio_oeb(\user_io_oeb[4] ),
+    .user_gpio_out(\user_io_out[4] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[3]  (
+    .gpio_defaults({ \gpio_defaults[77] , \gpio_defaults[76] , \gpio_defaults[75] , \gpio_defaults[74] , \gpio_defaults[73] , \gpio_defaults[72] , \gpio_defaults[71] , \gpio_defaults[70] , \gpio_defaults[69] , \gpio_defaults[68] , \gpio_defaults[67] , \gpio_defaults[66] , \gpio_defaults[65]  }),
+    .mgmt_gpio_in(\mgmt_io_in[5] ),
+    .mgmt_gpio_oeb(\mprj_io_one[5] ),
+    .mgmt_gpio_out(\mgmt_io_out[5] ),
+    .one(\mprj_io_one[5] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[5] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[5] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[5] ),
+    .pad_gpio_dm({ \mprj_io_dm[17] , \mprj_io_dm[16] , \mprj_io_dm[15]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[5] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[5] ),
+    .pad_gpio_in(\mprj_io_in[5] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[5] ),
+    .pad_gpio_out(\mprj_io_out[5] ),
+    .pad_gpio_outenb(\mprj_io_oeb[5] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[5] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[5] ),
+    .resetn(\gpio_resetn_1[4] ),
+    .resetn_out(\gpio_resetn_1[5] ),
+    .serial_clock(\gpio_clock_1[4] ),
+    .serial_clock_out(\gpio_clock_1[5] ),
+    .serial_data_in(\gpio_serial_link_1[4] ),
+    .serial_data_out(\gpio_serial_link_1[5] ),
+    .serial_load(\gpio_load_1[4] ),
+    .serial_load_out(\gpio_load_1[5] ),
+    .user_gpio_in(\user_io_in[5] ),
+    .user_gpio_oeb(\user_io_oeb[5] ),
+    .user_gpio_out(\user_io_out[5] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[4]  (
+    .gpio_defaults({ \gpio_defaults[90] , \gpio_defaults[89] , \gpio_defaults[88] , \gpio_defaults[87] , \gpio_defaults[86] , \gpio_defaults[85] , \gpio_defaults[84] , \gpio_defaults[83] , \gpio_defaults[82] , \gpio_defaults[81] , \gpio_defaults[80] , \gpio_defaults[79] , \gpio_defaults[78]  }),
+    .mgmt_gpio_in(\mgmt_io_in[6] ),
+    .mgmt_gpio_oeb(\mprj_io_one[6] ),
+    .mgmt_gpio_out(\mgmt_io_out[6] ),
+    .one(\mprj_io_one[6] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[6] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[6] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[6] ),
+    .pad_gpio_dm({ \mprj_io_dm[20] , \mprj_io_dm[19] , \mprj_io_dm[18]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[6] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[6] ),
+    .pad_gpio_in(\mprj_io_in[6] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[6] ),
+    .pad_gpio_out(\mprj_io_out[6] ),
+    .pad_gpio_outenb(\mprj_io_oeb[6] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[6] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[6] ),
+    .resetn(\gpio_resetn_1[5] ),
+    .resetn_out(\gpio_resetn_1[6] ),
+    .serial_clock(\gpio_clock_1[5] ),
+    .serial_clock_out(\gpio_clock_1[6] ),
+    .serial_data_in(\gpio_serial_link_1[5] ),
+    .serial_data_out(\gpio_serial_link_1[6] ),
+    .serial_load(\gpio_load_1[5] ),
+    .serial_load_out(\gpio_load_1[6] ),
+    .user_gpio_in(\user_io_in[6] ),
+    .user_gpio_oeb(\user_io_oeb[6] ),
+    .user_gpio_out(\user_io_out[6] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_1a[5]  (
+    .gpio_defaults({ \gpio_defaults[103] , \gpio_defaults[102] , \gpio_defaults[101] , \gpio_defaults[100] , \gpio_defaults[99] , \gpio_defaults[98] , \gpio_defaults[97] , \gpio_defaults[96] , \gpio_defaults[95] , \gpio_defaults[94] , \gpio_defaults[93] , \gpio_defaults[92] , \gpio_defaults[91]  }),
+    .mgmt_gpio_in(\mgmt_io_in[7] ),
+    .mgmt_gpio_oeb(\mprj_io_one[7] ),
+    .mgmt_gpio_out(\mgmt_io_out[7] ),
+    .one(\mprj_io_one[7] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[7] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[7] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[7] ),
+    .pad_gpio_dm({ \mprj_io_dm[23] , \mprj_io_dm[22] , \mprj_io_dm[21]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[7] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[7] ),
+    .pad_gpio_in(\mprj_io_in[7] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[7] ),
+    .pad_gpio_out(\mprj_io_out[7] ),
+    .pad_gpio_outenb(\mprj_io_oeb[7] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[7] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[7] ),
+    .resetn(\gpio_resetn_1[6] ),
+    .resetn_out(\gpio_resetn_1[7] ),
+    .serial_clock(\gpio_clock_1[6] ),
+    .serial_clock_out(\gpio_clock_1[7] ),
+    .serial_data_in(\gpio_serial_link_1[6] ),
+    .serial_data_out(\gpio_serial_link_1[7] ),
+    .serial_load(\gpio_load_1[6] ),
+    .serial_load_out(\gpio_load_1[7] ),
+    .user_gpio_in(\user_io_in[7] ),
+    .user_gpio_oeb(\user_io_oeb[7] ),
+    .user_gpio_out(\user_io_out[7] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[0]  (
+    .gpio_defaults({ \gpio_defaults[259] , \gpio_defaults[258] , \gpio_defaults[257] , \gpio_defaults[256] , \gpio_defaults[255] , \gpio_defaults[254] , \gpio_defaults[253] , \gpio_defaults[252] , \gpio_defaults[251] , \gpio_defaults[250] , \gpio_defaults[249] , \gpio_defaults[248] , \gpio_defaults[247]  }),
+    .mgmt_gpio_in(\mgmt_io_in[19] ),
+    .mgmt_gpio_oeb(\mprj_io_one[19] ),
+    .mgmt_gpio_out(\mgmt_io_out[19] ),
+    .one(\mprj_io_one[19] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[19] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[19] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[19] ),
+    .pad_gpio_dm({ \mprj_io_dm[59] , \mprj_io_dm[58] , \mprj_io_dm[57]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[19] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[19] ),
+    .pad_gpio_in(\mprj_io_in[19] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[19] ),
+    .pad_gpio_out(\mprj_io_out[19] ),
+    .pad_gpio_outenb(\mprj_io_oeb[19] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[19] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[19] ),
+    .resetn(\gpio_resetn_2[1] ),
+    .resetn_out(\gpio_resetn_2[0] ),
+    .serial_clock(\gpio_clock_2[1] ),
+    .serial_clock_out(\gpio_clock_2[0] ),
+    .serial_data_in(\gpio_serial_link_2[1] ),
+    .serial_data_out(\gpio_serial_link_2[0] ),
+    .serial_load(\gpio_load_2[1] ),
+    .serial_load_out(\gpio_load_2[0] ),
+    .user_gpio_in(\user_io_in[19] ),
+    .user_gpio_oeb(\user_io_oeb[19] ),
+    .user_gpio_out(\user_io_out[19] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[10]  (
+    .gpio_defaults({ \gpio_defaults[389] , \gpio_defaults[388] , \gpio_defaults[387] , \gpio_defaults[386] , \gpio_defaults[385] , \gpio_defaults[384] , \gpio_defaults[383] , \gpio_defaults[382] , \gpio_defaults[381] , \gpio_defaults[380] , \gpio_defaults[379] , \gpio_defaults[378] , \gpio_defaults[377]  }),
+    .mgmt_gpio_in(\mgmt_io_in[29] ),
+    .mgmt_gpio_oeb(\mprj_io_one[29] ),
+    .mgmt_gpio_out(\mgmt_io_out[29] ),
+    .one(\mprj_io_one[29] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[29] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[29] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[29] ),
+    .pad_gpio_dm({ \mprj_io_dm[89] , \mprj_io_dm[88] , \mprj_io_dm[87]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[29] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[29] ),
+    .pad_gpio_in(\mprj_io_in[29] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[29] ),
+    .pad_gpio_out(\mprj_io_out[29] ),
+    .pad_gpio_outenb(\mprj_io_oeb[29] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[29] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[29] ),
+    .resetn(\gpio_resetn_2[11] ),
+    .resetn_out(\gpio_resetn_2[10] ),
+    .serial_clock(\gpio_clock_2[11] ),
+    .serial_clock_out(\gpio_clock_2[10] ),
+    .serial_data_in(\gpio_serial_link_2[11] ),
+    .serial_data_out(\gpio_serial_link_2[10] ),
+    .serial_load(\gpio_load_2[11] ),
+    .serial_load_out(\gpio_load_2[10] ),
+    .user_gpio_in(\user_io_in[29] ),
+    .user_gpio_oeb(\user_io_oeb[29] ),
+    .user_gpio_out(\user_io_out[29] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[11]  (
+    .gpio_defaults({ \gpio_defaults[402] , \gpio_defaults[401] , \gpio_defaults[400] , \gpio_defaults[399] , \gpio_defaults[398] , \gpio_defaults[397] , \gpio_defaults[396] , \gpio_defaults[395] , \gpio_defaults[394] , \gpio_defaults[393] , \gpio_defaults[392] , \gpio_defaults[391] , \gpio_defaults[390]  }),
+    .mgmt_gpio_in(\mgmt_io_in[30] ),
+    .mgmt_gpio_oeb(\mprj_io_one[30] ),
+    .mgmt_gpio_out(\mgmt_io_out[30] ),
+    .one(\mprj_io_one[30] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[30] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[30] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[30] ),
+    .pad_gpio_dm({ \mprj_io_dm[92] , \mprj_io_dm[91] , \mprj_io_dm[90]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[30] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[30] ),
+    .pad_gpio_in(\mprj_io_in[30] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[30] ),
+    .pad_gpio_out(\mprj_io_out[30] ),
+    .pad_gpio_outenb(\mprj_io_oeb[30] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[30] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[30] ),
+    .resetn(\gpio_resetn_2[12] ),
+    .resetn_out(\gpio_resetn_2[11] ),
+    .serial_clock(\gpio_clock_2[12] ),
+    .serial_clock_out(\gpio_clock_2[11] ),
+    .serial_data_in(\gpio_serial_link_2[12] ),
+    .serial_data_out(\gpio_serial_link_2[11] ),
+    .serial_load(\gpio_load_2[12] ),
+    .serial_load_out(\gpio_load_2[11] ),
+    .user_gpio_in(\user_io_in[30] ),
+    .user_gpio_oeb(\user_io_oeb[30] ),
+    .user_gpio_out(\user_io_out[30] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[12]  (
+    .gpio_defaults({ \gpio_defaults[415] , \gpio_defaults[414] , \gpio_defaults[413] , \gpio_defaults[412] , \gpio_defaults[411] , \gpio_defaults[410] , \gpio_defaults[409] , \gpio_defaults[408] , \gpio_defaults[407] , \gpio_defaults[406] , \gpio_defaults[405] , \gpio_defaults[404] , \gpio_defaults[403]  }),
+    .mgmt_gpio_in(\mgmt_io_in[31] ),
+    .mgmt_gpio_oeb(\mprj_io_one[31] ),
+    .mgmt_gpio_out(\mgmt_io_out[31] ),
+    .one(\mprj_io_one[31] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[31] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[31] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[31] ),
+    .pad_gpio_dm({ \mprj_io_dm[95] , \mprj_io_dm[94] , \mprj_io_dm[93]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[31] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[31] ),
+    .pad_gpio_in(\mprj_io_in[31] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[31] ),
+    .pad_gpio_out(\mprj_io_out[31] ),
+    .pad_gpio_outenb(\mprj_io_oeb[31] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[31] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[31] ),
+    .resetn(\gpio_resetn_2[13] ),
+    .resetn_out(\gpio_resetn_2[12] ),
+    .serial_clock(\gpio_clock_2[13] ),
+    .serial_clock_out(\gpio_clock_2[12] ),
+    .serial_data_in(\gpio_serial_link_2[13] ),
+    .serial_data_out(\gpio_serial_link_2[12] ),
+    .serial_load(\gpio_load_2[13] ),
+    .serial_load_out(\gpio_load_2[12] ),
+    .user_gpio_in(\user_io_in[31] ),
+    .user_gpio_oeb(\user_io_oeb[31] ),
+    .user_gpio_out(\user_io_out[31] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[13]  (
+    .gpio_defaults({ \gpio_defaults[428] , \gpio_defaults[427] , \gpio_defaults[426] , \gpio_defaults[425] , \gpio_defaults[424] , \gpio_defaults[423] , \gpio_defaults[422] , \gpio_defaults[421] , \gpio_defaults[420] , \gpio_defaults[419] , \gpio_defaults[418] , \gpio_defaults[417] , \gpio_defaults[416]  }),
+    .mgmt_gpio_in(\mgmt_io_in[32] ),
+    .mgmt_gpio_oeb(\mprj_io_one[32] ),
+    .mgmt_gpio_out(\mgmt_io_out[32] ),
+    .one(\mprj_io_one[32] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[32] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[32] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[32] ),
+    .pad_gpio_dm({ \mprj_io_dm[98] , \mprj_io_dm[97] , \mprj_io_dm[96]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[32] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[32] ),
+    .pad_gpio_in(\mprj_io_in[32] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[32] ),
+    .pad_gpio_out(\mprj_io_out[32] ),
+    .pad_gpio_outenb(\mprj_io_oeb[32] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[32] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[32] ),
+    .resetn(\gpio_resetn_2[14] ),
+    .resetn_out(\gpio_resetn_2[13] ),
+    .serial_clock(\gpio_clock_2[14] ),
+    .serial_clock_out(\gpio_clock_2[13] ),
+    .serial_data_in(\gpio_serial_link_2[14] ),
+    .serial_data_out(\gpio_serial_link_2[13] ),
+    .serial_load(\gpio_load_2[14] ),
+    .serial_load_out(\gpio_load_2[13] ),
+    .user_gpio_in(\user_io_in[32] ),
+    .user_gpio_oeb(\user_io_oeb[32] ),
+    .user_gpio_out(\user_io_out[32] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[14]  (
+    .gpio_defaults({ \gpio_defaults[441] , \gpio_defaults[440] , \gpio_defaults[439] , \gpio_defaults[438] , \gpio_defaults[437] , \gpio_defaults[436] , \gpio_defaults[435] , \gpio_defaults[434] , \gpio_defaults[433] , \gpio_defaults[432] , \gpio_defaults[431] , \gpio_defaults[430] , \gpio_defaults[429]  }),
+    .mgmt_gpio_in(\mgmt_io_in[33] ),
+    .mgmt_gpio_oeb(\mprj_io_one[33] ),
+    .mgmt_gpio_out(\mgmt_io_out[33] ),
+    .one(\mprj_io_one[33] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[33] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[33] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[33] ),
+    .pad_gpio_dm({ \mprj_io_dm[101] , \mprj_io_dm[100] , \mprj_io_dm[99]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[33] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[33] ),
+    .pad_gpio_in(\mprj_io_in[33] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[33] ),
+    .pad_gpio_out(\mprj_io_out[33] ),
+    .pad_gpio_outenb(\mprj_io_oeb[33] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[33] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[33] ),
+    .resetn(\gpio_resetn_2[15] ),
+    .resetn_out(\gpio_resetn_2[14] ),
+    .serial_clock(\gpio_clock_2[15] ),
+    .serial_clock_out(\gpio_clock_2[14] ),
+    .serial_data_in(\gpio_serial_link_2[15] ),
+    .serial_data_out(\gpio_serial_link_2[14] ),
+    .serial_load(\gpio_load_2[15] ),
+    .serial_load_out(\gpio_load_2[14] ),
+    .user_gpio_in(\user_io_in[33] ),
+    .user_gpio_oeb(\user_io_oeb[33] ),
+    .user_gpio_out(\user_io_out[33] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[15]  (
+    .gpio_defaults({ \gpio_defaults[454] , \gpio_defaults[453] , \gpio_defaults[452] , \gpio_defaults[451] , \gpio_defaults[450] , \gpio_defaults[449] , \gpio_defaults[448] , \gpio_defaults[447] , \gpio_defaults[446] , \gpio_defaults[445] , \gpio_defaults[444] , \gpio_defaults[443] , \gpio_defaults[442]  }),
+    .mgmt_gpio_in(\mgmt_io_in[34] ),
+    .mgmt_gpio_oeb(\mprj_io_one[34] ),
+    .mgmt_gpio_out(\mgmt_io_out[34] ),
+    .one(\mprj_io_one[34] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[34] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[34] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[34] ),
+    .pad_gpio_dm({ \mprj_io_dm[104] , \mprj_io_dm[103] , \mprj_io_dm[102]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[34] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[34] ),
+    .pad_gpio_in(\mprj_io_in[34] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[34] ),
+    .pad_gpio_out(\mprj_io_out[34] ),
+    .pad_gpio_outenb(\mprj_io_oeb[34] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[34] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[34] ),
+    .resetn(\gpio_resetn_2[16] ),
+    .resetn_out(\gpio_resetn_2[15] ),
+    .serial_clock(\gpio_clock_2[16] ),
+    .serial_clock_out(\gpio_clock_2[15] ),
+    .serial_data_in(\gpio_serial_link_2[16] ),
+    .serial_data_out(\gpio_serial_link_2[15] ),
+    .serial_load(\gpio_load_2[16] ),
+    .serial_load_out(\gpio_load_2[15] ),
+    .user_gpio_in(\user_io_in[34] ),
+    .user_gpio_oeb(\user_io_oeb[34] ),
+    .user_gpio_out(\user_io_out[34] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[1]  (
+    .gpio_defaults({ \gpio_defaults[272] , \gpio_defaults[271] , \gpio_defaults[270] , \gpio_defaults[269] , \gpio_defaults[268] , \gpio_defaults[267] , \gpio_defaults[266] , \gpio_defaults[265] , \gpio_defaults[264] , \gpio_defaults[263] , \gpio_defaults[262] , \gpio_defaults[261] , \gpio_defaults[260]  }),
+    .mgmt_gpio_in(\mgmt_io_in[20] ),
+    .mgmt_gpio_oeb(\mprj_io_one[20] ),
+    .mgmt_gpio_out(\mgmt_io_out[20] ),
+    .one(\mprj_io_one[20] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[20] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[20] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[20] ),
+    .pad_gpio_dm({ \mprj_io_dm[62] , \mprj_io_dm[61] , \mprj_io_dm[60]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[20] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[20] ),
+    .pad_gpio_in(\mprj_io_in[20] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[20] ),
+    .pad_gpio_out(\mprj_io_out[20] ),
+    .pad_gpio_outenb(\mprj_io_oeb[20] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[20] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[20] ),
+    .resetn(\gpio_resetn_2[2] ),
+    .resetn_out(\gpio_resetn_2[1] ),
+    .serial_clock(\gpio_clock_2[2] ),
+    .serial_clock_out(\gpio_clock_2[1] ),
+    .serial_data_in(\gpio_serial_link_2[2] ),
+    .serial_data_out(\gpio_serial_link_2[1] ),
+    .serial_load(\gpio_load_2[2] ),
+    .serial_load_out(\gpio_load_2[1] ),
+    .user_gpio_in(\user_io_in[20] ),
+    .user_gpio_oeb(\user_io_oeb[20] ),
+    .user_gpio_out(\user_io_out[20] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[2]  (
+    .gpio_defaults({ \gpio_defaults[285] , \gpio_defaults[284] , \gpio_defaults[283] , \gpio_defaults[282] , \gpio_defaults[281] , \gpio_defaults[280] , \gpio_defaults[279] , \gpio_defaults[278] , \gpio_defaults[277] , \gpio_defaults[276] , \gpio_defaults[275] , \gpio_defaults[274] , \gpio_defaults[273]  }),
+    .mgmt_gpio_in(\mgmt_io_in[21] ),
+    .mgmt_gpio_oeb(\mprj_io_one[21] ),
+    .mgmt_gpio_out(\mgmt_io_out[21] ),
+    .one(\mprj_io_one[21] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[21] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[21] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[21] ),
+    .pad_gpio_dm({ \mprj_io_dm[65] , \mprj_io_dm[64] , \mprj_io_dm[63]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[21] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[21] ),
+    .pad_gpio_in(\mprj_io_in[21] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[21] ),
+    .pad_gpio_out(\mprj_io_out[21] ),
+    .pad_gpio_outenb(\mprj_io_oeb[21] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[21] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[21] ),
+    .resetn(\gpio_resetn_2[3] ),
+    .resetn_out(\gpio_resetn_2[2] ),
+    .serial_clock(\gpio_clock_2[3] ),
+    .serial_clock_out(\gpio_clock_2[2] ),
+    .serial_data_in(\gpio_serial_link_2[3] ),
+    .serial_data_out(\gpio_serial_link_2[2] ),
+    .serial_load(\gpio_load_2[3] ),
+    .serial_load_out(\gpio_load_2[2] ),
+    .user_gpio_in(\user_io_in[21] ),
+    .user_gpio_oeb(\user_io_oeb[21] ),
+    .user_gpio_out(\user_io_out[21] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[3]  (
+    .gpio_defaults({ \gpio_defaults[298] , \gpio_defaults[297] , \gpio_defaults[296] , \gpio_defaults[295] , \gpio_defaults[294] , \gpio_defaults[293] , \gpio_defaults[292] , \gpio_defaults[291] , \gpio_defaults[290] , \gpio_defaults[289] , \gpio_defaults[288] , \gpio_defaults[287] , \gpio_defaults[286]  }),
+    .mgmt_gpio_in(\mgmt_io_in[22] ),
+    .mgmt_gpio_oeb(\mprj_io_one[22] ),
+    .mgmt_gpio_out(\mgmt_io_out[22] ),
+    .one(\mprj_io_one[22] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[22] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[22] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[22] ),
+    .pad_gpio_dm({ \mprj_io_dm[68] , \mprj_io_dm[67] , \mprj_io_dm[66]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[22] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[22] ),
+    .pad_gpio_in(\mprj_io_in[22] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[22] ),
+    .pad_gpio_out(\mprj_io_out[22] ),
+    .pad_gpio_outenb(\mprj_io_oeb[22] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[22] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[22] ),
+    .resetn(\gpio_resetn_2[4] ),
+    .resetn_out(\gpio_resetn_2[3] ),
+    .serial_clock(\gpio_clock_2[4] ),
+    .serial_clock_out(\gpio_clock_2[3] ),
+    .serial_data_in(\gpio_serial_link_2[4] ),
+    .serial_data_out(\gpio_serial_link_2[3] ),
+    .serial_load(\gpio_load_2[4] ),
+    .serial_load_out(\gpio_load_2[3] ),
+    .user_gpio_in(\user_io_in[22] ),
+    .user_gpio_oeb(\user_io_oeb[22] ),
+    .user_gpio_out(\user_io_out[22] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[4]  (
+    .gpio_defaults({ \gpio_defaults[311] , \gpio_defaults[310] , \gpio_defaults[309] , \gpio_defaults[308] , \gpio_defaults[307] , \gpio_defaults[306] , \gpio_defaults[305] , \gpio_defaults[304] , \gpio_defaults[303] , \gpio_defaults[302] , \gpio_defaults[301] , \gpio_defaults[300] , \gpio_defaults[299]  }),
+    .mgmt_gpio_in(\mgmt_io_in[23] ),
+    .mgmt_gpio_oeb(\mprj_io_one[23] ),
+    .mgmt_gpio_out(\mgmt_io_out[23] ),
+    .one(\mprj_io_one[23] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[23] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[23] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[23] ),
+    .pad_gpio_dm({ \mprj_io_dm[71] , \mprj_io_dm[70] , \mprj_io_dm[69]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[23] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[23] ),
+    .pad_gpio_in(\mprj_io_in[23] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[23] ),
+    .pad_gpio_out(\mprj_io_out[23] ),
+    .pad_gpio_outenb(\mprj_io_oeb[23] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[23] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[23] ),
+    .resetn(\gpio_resetn_2[5] ),
+    .resetn_out(\gpio_resetn_2[4] ),
+    .serial_clock(\gpio_clock_2[5] ),
+    .serial_clock_out(\gpio_clock_2[4] ),
+    .serial_data_in(\gpio_serial_link_2[5] ),
+    .serial_data_out(\gpio_serial_link_2[4] ),
+    .serial_load(\gpio_load_2[5] ),
+    .serial_load_out(\gpio_load_2[4] ),
+    .user_gpio_in(\user_io_in[23] ),
+    .user_gpio_oeb(\user_io_oeb[23] ),
+    .user_gpio_out(\user_io_out[23] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[5]  (
+    .gpio_defaults({ \gpio_defaults[324] , \gpio_defaults[323] , \gpio_defaults[322] , \gpio_defaults[321] , \gpio_defaults[320] , \gpio_defaults[319] , \gpio_defaults[318] , \gpio_defaults[317] , \gpio_defaults[316] , \gpio_defaults[315] , \gpio_defaults[314] , \gpio_defaults[313] , \gpio_defaults[312]  }),
+    .mgmt_gpio_in(\mgmt_io_in[24] ),
+    .mgmt_gpio_oeb(\mprj_io_one[24] ),
+    .mgmt_gpio_out(\mgmt_io_out[24] ),
+    .one(\mprj_io_one[24] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[24] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[24] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[24] ),
+    .pad_gpio_dm({ \mprj_io_dm[74] , \mprj_io_dm[73] , \mprj_io_dm[72]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[24] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[24] ),
+    .pad_gpio_in(\mprj_io_in[24] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[24] ),
+    .pad_gpio_out(\mprj_io_out[24] ),
+    .pad_gpio_outenb(\mprj_io_oeb[24] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[24] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[24] ),
+    .resetn(\gpio_resetn_2[6] ),
+    .resetn_out(\gpio_resetn_2[5] ),
+    .serial_clock(\gpio_clock_2[6] ),
+    .serial_clock_out(\gpio_clock_2[5] ),
+    .serial_data_in(\gpio_serial_link_2[6] ),
+    .serial_data_out(\gpio_serial_link_2[5] ),
+    .serial_load(\gpio_load_2[6] ),
+    .serial_load_out(\gpio_load_2[5] ),
+    .user_gpio_in(\user_io_in[24] ),
+    .user_gpio_oeb(\user_io_oeb[24] ),
+    .user_gpio_out(\user_io_out[24] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[6]  (
+    .gpio_defaults({ \gpio_defaults[337] , \gpio_defaults[336] , \gpio_defaults[335] , \gpio_defaults[334] , \gpio_defaults[333] , \gpio_defaults[332] , \gpio_defaults[331] , \gpio_defaults[330] , \gpio_defaults[329] , \gpio_defaults[328] , \gpio_defaults[327] , \gpio_defaults[326] , \gpio_defaults[325]  }),
+    .mgmt_gpio_in(\mgmt_io_in[25] ),
+    .mgmt_gpio_oeb(\mprj_io_one[25] ),
+    .mgmt_gpio_out(\mgmt_io_out[25] ),
+    .one(\mprj_io_one[25] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[25] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[25] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[25] ),
+    .pad_gpio_dm({ \mprj_io_dm[77] , \mprj_io_dm[76] , \mprj_io_dm[75]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[25] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[25] ),
+    .pad_gpio_in(\mprj_io_in[25] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[25] ),
+    .pad_gpio_out(\mprj_io_out[25] ),
+    .pad_gpio_outenb(\mprj_io_oeb[25] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[25] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[25] ),
+    .resetn(\gpio_resetn_2[7] ),
+    .resetn_out(\gpio_resetn_2[6] ),
+    .serial_clock(\gpio_clock_2[7] ),
+    .serial_clock_out(\gpio_clock_2[6] ),
+    .serial_data_in(\gpio_serial_link_2[7] ),
+    .serial_data_out(\gpio_serial_link_2[6] ),
+    .serial_load(\gpio_load_2[7] ),
+    .serial_load_out(\gpio_load_2[6] ),
+    .user_gpio_in(\user_io_in[25] ),
+    .user_gpio_oeb(\user_io_oeb[25] ),
+    .user_gpio_out(\user_io_out[25] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[7]  (
+    .gpio_defaults({ \gpio_defaults[350] , \gpio_defaults[349] , \gpio_defaults[348] , \gpio_defaults[347] , \gpio_defaults[346] , \gpio_defaults[345] , \gpio_defaults[344] , \gpio_defaults[343] , \gpio_defaults[342] , \gpio_defaults[341] , \gpio_defaults[340] , \gpio_defaults[339] , \gpio_defaults[338]  }),
+    .mgmt_gpio_in(\mgmt_io_in[26] ),
+    .mgmt_gpio_oeb(\mprj_io_one[26] ),
+    .mgmt_gpio_out(\mgmt_io_out[26] ),
+    .one(\mprj_io_one[26] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[26] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[26] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[26] ),
+    .pad_gpio_dm({ \mprj_io_dm[80] , \mprj_io_dm[79] , \mprj_io_dm[78]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[26] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[26] ),
+    .pad_gpio_in(\mprj_io_in[26] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[26] ),
+    .pad_gpio_out(\mprj_io_out[26] ),
+    .pad_gpio_outenb(\mprj_io_oeb[26] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[26] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[26] ),
+    .resetn(\gpio_resetn_2[8] ),
+    .resetn_out(\gpio_resetn_2[7] ),
+    .serial_clock(\gpio_clock_2[8] ),
+    .serial_clock_out(\gpio_clock_2[7] ),
+    .serial_data_in(\gpio_serial_link_2[8] ),
+    .serial_data_out(\gpio_serial_link_2[7] ),
+    .serial_load(\gpio_load_2[8] ),
+    .serial_load_out(\gpio_load_2[7] ),
+    .user_gpio_in(\user_io_in[26] ),
+    .user_gpio_oeb(\user_io_oeb[26] ),
+    .user_gpio_out(\user_io_out[26] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[8]  (
+    .gpio_defaults({ \gpio_defaults[363] , \gpio_defaults[362] , \gpio_defaults[361] , \gpio_defaults[360] , \gpio_defaults[359] , \gpio_defaults[358] , \gpio_defaults[357] , \gpio_defaults[356] , \gpio_defaults[355] , \gpio_defaults[354] , \gpio_defaults[353] , \gpio_defaults[352] , \gpio_defaults[351]  }),
+    .mgmt_gpio_in(\mgmt_io_in[27] ),
+    .mgmt_gpio_oeb(\mprj_io_one[27] ),
+    .mgmt_gpio_out(\mgmt_io_out[27] ),
+    .one(\mprj_io_one[27] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[27] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[27] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[27] ),
+    .pad_gpio_dm({ \mprj_io_dm[83] , \mprj_io_dm[82] , \mprj_io_dm[81]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[27] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[27] ),
+    .pad_gpio_in(\mprj_io_in[27] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[27] ),
+    .pad_gpio_out(\mprj_io_out[27] ),
+    .pad_gpio_outenb(\mprj_io_oeb[27] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[27] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[27] ),
+    .resetn(\gpio_resetn_2[9] ),
+    .resetn_out(\gpio_resetn_2[8] ),
+    .serial_clock(\gpio_clock_2[9] ),
+    .serial_clock_out(\gpio_clock_2[8] ),
+    .serial_data_in(\gpio_serial_link_2[9] ),
+    .serial_data_out(\gpio_serial_link_2[8] ),
+    .serial_load(\gpio_load_2[9] ),
+    .serial_load_out(\gpio_load_2[8] ),
+    .user_gpio_in(\user_io_in[27] ),
+    .user_gpio_oeb(\user_io_oeb[27] ),
+    .user_gpio_out(\user_io_out[27] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_control_block \gpio_control_in_2[9]  (
+    .gpio_defaults({ \gpio_defaults[376] , \gpio_defaults[375] , \gpio_defaults[374] , \gpio_defaults[373] , \gpio_defaults[372] , \gpio_defaults[371] , \gpio_defaults[370] , \gpio_defaults[369] , \gpio_defaults[368] , \gpio_defaults[367] , \gpio_defaults[366] , \gpio_defaults[365] , \gpio_defaults[364]  }),
+    .mgmt_gpio_in(\mgmt_io_in[28] ),
+    .mgmt_gpio_oeb(\mprj_io_one[28] ),
+    .mgmt_gpio_out(\mgmt_io_out[28] ),
+    .one(\mprj_io_one[28] ),
+    .pad_gpio_ana_en(\mprj_io_analog_en[28] ),
+    .pad_gpio_ana_pol(\mprj_io_analog_pol[28] ),
+    .pad_gpio_ana_sel(\mprj_io_analog_sel[28] ),
+    .pad_gpio_dm({ \mprj_io_dm[86] , \mprj_io_dm[85] , \mprj_io_dm[84]  }),
+    .pad_gpio_holdover(\mprj_io_holdover[28] ),
+    .pad_gpio_ib_mode_sel(\mprj_io_ib_mode_sel[28] ),
+    .pad_gpio_in(\mprj_io_in[28] ),
+    .pad_gpio_inenb(\mprj_io_inp_dis[28] ),
+    .pad_gpio_out(\mprj_io_out[28] ),
+    .pad_gpio_outenb(\mprj_io_oeb[28] ),
+    .pad_gpio_slow_sel(\mprj_io_slow_sel[28] ),
+    .pad_gpio_vtrip_sel(\mprj_io_vtrip_sel[28] ),
+    .resetn(\gpio_resetn_2[10] ),
+    .resetn_out(\gpio_resetn_2[9] ),
+    .serial_clock(\gpio_clock_2[10] ),
+    .serial_clock_out(\gpio_clock_2[9] ),
+    .serial_data_in(\gpio_serial_link_2[10] ),
+    .serial_data_out(\gpio_serial_link_2[9] ),
+    .serial_load(\gpio_load_2[10] ),
+    .serial_load_out(\gpio_load_2[9] ),
+    .user_gpio_in(\user_io_in[28] ),
+    .user_gpio_oeb(\user_io_oeb[28] ),
+    .user_gpio_out(\user_io_out[28] ),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .zero()
+  );
+  gpio_defaults_block_1803 gpio_defaults_block_0 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[12] , \gpio_defaults[11] , \gpio_defaults[10] , \gpio_defaults[9] , \gpio_defaults[8] , \gpio_defaults[7] , \gpio_defaults[6] , \gpio_defaults[5] , \gpio_defaults[4] , \gpio_defaults[3] , \gpio_defaults[2] , \gpio_defaults[1] , \gpio_defaults[0]  })
+  );
+  gpio_defaults_block_1803 gpio_defaults_block_1 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[25] , \gpio_defaults[24] , \gpio_defaults[23] , \gpio_defaults[22] , \gpio_defaults[21] , \gpio_defaults[20] , \gpio_defaults[19] , \gpio_defaults[18] , \gpio_defaults[17] , \gpio_defaults[16] , \gpio_defaults[15] , \gpio_defaults[14] , \gpio_defaults[13]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_10 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[142] , \gpio_defaults[141] , \gpio_defaults[140] , \gpio_defaults[139] , \gpio_defaults[138] , \gpio_defaults[137] , \gpio_defaults[136] , \gpio_defaults[135] , \gpio_defaults[134] , \gpio_defaults[133] , \gpio_defaults[132] , \gpio_defaults[131] , \gpio_defaults[130]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_11 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[155] , \gpio_defaults[154] , \gpio_defaults[153] , \gpio_defaults[152] , \gpio_defaults[151] , \gpio_defaults[150] , \gpio_defaults[149] , \gpio_defaults[148] , \gpio_defaults[147] , \gpio_defaults[146] , \gpio_defaults[145] , \gpio_defaults[144] , \gpio_defaults[143]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_12 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[168] , \gpio_defaults[167] , \gpio_defaults[166] , \gpio_defaults[165] , \gpio_defaults[164] , \gpio_defaults[163] , \gpio_defaults[162] , \gpio_defaults[161] , \gpio_defaults[160] , \gpio_defaults[159] , \gpio_defaults[158] , \gpio_defaults[157] , \gpio_defaults[156]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_13 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[181] , \gpio_defaults[180] , \gpio_defaults[179] , \gpio_defaults[178] , \gpio_defaults[177] , \gpio_defaults[176] , \gpio_defaults[175] , \gpio_defaults[174] , \gpio_defaults[173] , \gpio_defaults[172] , \gpio_defaults[171] , \gpio_defaults[170] , \gpio_defaults[169]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_14 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[194] , \gpio_defaults[193] , \gpio_defaults[192] , \gpio_defaults[191] , \gpio_defaults[190] , \gpio_defaults[189] , \gpio_defaults[188] , \gpio_defaults[187] , \gpio_defaults[186] , \gpio_defaults[185] , \gpio_defaults[184] , \gpio_defaults[183] , \gpio_defaults[182]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_15 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[207] , \gpio_defaults[206] , \gpio_defaults[205] , \gpio_defaults[204] , \gpio_defaults[203] , \gpio_defaults[202] , \gpio_defaults[201] , \gpio_defaults[200] , \gpio_defaults[199] , \gpio_defaults[198] , \gpio_defaults[197] , \gpio_defaults[196] , \gpio_defaults[195]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_16 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[220] , \gpio_defaults[219] , \gpio_defaults[218] , \gpio_defaults[217] , \gpio_defaults[216] , \gpio_defaults[215] , \gpio_defaults[214] , \gpio_defaults[213] , \gpio_defaults[212] , \gpio_defaults[211] , \gpio_defaults[210] , \gpio_defaults[209] , \gpio_defaults[208]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_17 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[233] , \gpio_defaults[232] , \gpio_defaults[231] , \gpio_defaults[230] , \gpio_defaults[229] , \gpio_defaults[228] , \gpio_defaults[227] , \gpio_defaults[226] , \gpio_defaults[225] , \gpio_defaults[224] , \gpio_defaults[223] , \gpio_defaults[222] , \gpio_defaults[221]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_18 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[246] , \gpio_defaults[245] , \gpio_defaults[244] , \gpio_defaults[243] , \gpio_defaults[242] , \gpio_defaults[241] , \gpio_defaults[240] , \gpio_defaults[239] , \gpio_defaults[238] , \gpio_defaults[237] , \gpio_defaults[236] , \gpio_defaults[235] , \gpio_defaults[234]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_19 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[259] , \gpio_defaults[258] , \gpio_defaults[257] , \gpio_defaults[256] , \gpio_defaults[255] , \gpio_defaults[254] , \gpio_defaults[253] , \gpio_defaults[252] , \gpio_defaults[251] , \gpio_defaults[250] , \gpio_defaults[249] , \gpio_defaults[248] , \gpio_defaults[247]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_2 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[38] , \gpio_defaults[37] , \gpio_defaults[36] , \gpio_defaults[35] , \gpio_defaults[34] , \gpio_defaults[33] , \gpio_defaults[32] , \gpio_defaults[31] , \gpio_defaults[30] , \gpio_defaults[29] , \gpio_defaults[28] , \gpio_defaults[27] , \gpio_defaults[26]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_20 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[272] , \gpio_defaults[271] , \gpio_defaults[270] , \gpio_defaults[269] , \gpio_defaults[268] , \gpio_defaults[267] , \gpio_defaults[266] , \gpio_defaults[265] , \gpio_defaults[264] , \gpio_defaults[263] , \gpio_defaults[262] , \gpio_defaults[261] , \gpio_defaults[260]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_21 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[285] , \gpio_defaults[284] , \gpio_defaults[283] , \gpio_defaults[282] , \gpio_defaults[281] , \gpio_defaults[280] , \gpio_defaults[279] , \gpio_defaults[278] , \gpio_defaults[277] , \gpio_defaults[276] , \gpio_defaults[275] , \gpio_defaults[274] , \gpio_defaults[273]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_22 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[298] , \gpio_defaults[297] , \gpio_defaults[296] , \gpio_defaults[295] , \gpio_defaults[294] , \gpio_defaults[293] , \gpio_defaults[292] , \gpio_defaults[291] , \gpio_defaults[290] , \gpio_defaults[289] , \gpio_defaults[288] , \gpio_defaults[287] , \gpio_defaults[286]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_23 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[311] , \gpio_defaults[310] , \gpio_defaults[309] , \gpio_defaults[308] , \gpio_defaults[307] , \gpio_defaults[306] , \gpio_defaults[305] , \gpio_defaults[304] , \gpio_defaults[303] , \gpio_defaults[302] , \gpio_defaults[301] , \gpio_defaults[300] , \gpio_defaults[299]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_24 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[324] , \gpio_defaults[323] , \gpio_defaults[322] , \gpio_defaults[321] , \gpio_defaults[320] , \gpio_defaults[319] , \gpio_defaults[318] , \gpio_defaults[317] , \gpio_defaults[316] , \gpio_defaults[315] , \gpio_defaults[314] , \gpio_defaults[313] , \gpio_defaults[312]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_25 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[337] , \gpio_defaults[336] , \gpio_defaults[335] , \gpio_defaults[334] , \gpio_defaults[333] , \gpio_defaults[332] , \gpio_defaults[331] , \gpio_defaults[330] , \gpio_defaults[329] , \gpio_defaults[328] , \gpio_defaults[327] , \gpio_defaults[326] , \gpio_defaults[325]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_26 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[350] , \gpio_defaults[349] , \gpio_defaults[348] , \gpio_defaults[347] , \gpio_defaults[346] , \gpio_defaults[345] , \gpio_defaults[344] , \gpio_defaults[343] , \gpio_defaults[342] , \gpio_defaults[341] , \gpio_defaults[340] , \gpio_defaults[339] , \gpio_defaults[338]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_27 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[363] , \gpio_defaults[362] , \gpio_defaults[361] , \gpio_defaults[360] , \gpio_defaults[359] , \gpio_defaults[358] , \gpio_defaults[357] , \gpio_defaults[356] , \gpio_defaults[355] , \gpio_defaults[354] , \gpio_defaults[353] , \gpio_defaults[352] , \gpio_defaults[351]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_28 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[376] , \gpio_defaults[375] , \gpio_defaults[374] , \gpio_defaults[373] , \gpio_defaults[372] , \gpio_defaults[371] , \gpio_defaults[370] , \gpio_defaults[369] , \gpio_defaults[368] , \gpio_defaults[367] , \gpio_defaults[366] , \gpio_defaults[365] , \gpio_defaults[364]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_29 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[389] , \gpio_defaults[388] , \gpio_defaults[387] , \gpio_defaults[386] , \gpio_defaults[385] , \gpio_defaults[384] , \gpio_defaults[383] , \gpio_defaults[382] , \gpio_defaults[381] , \gpio_defaults[380] , \gpio_defaults[379] , \gpio_defaults[378] , \gpio_defaults[377]  })
+  );
+  gpio_defaults_block_0801 gpio_defaults_block_3 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[51] , \gpio_defaults[50] , \gpio_defaults[49] , \gpio_defaults[48] , \gpio_defaults[47] , \gpio_defaults[46] , \gpio_defaults[45] , \gpio_defaults[44] , \gpio_defaults[43] , \gpio_defaults[42] , \gpio_defaults[41] , \gpio_defaults[40] , \gpio_defaults[39]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_30 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[402] , \gpio_defaults[401] , \gpio_defaults[400] , \gpio_defaults[399] , \gpio_defaults[398] , \gpio_defaults[397] , \gpio_defaults[396] , \gpio_defaults[395] , \gpio_defaults[394] , \gpio_defaults[393] , \gpio_defaults[392] , \gpio_defaults[391] , \gpio_defaults[390]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_31 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[415] , \gpio_defaults[414] , \gpio_defaults[413] , \gpio_defaults[412] , \gpio_defaults[411] , \gpio_defaults[410] , \gpio_defaults[409] , \gpio_defaults[408] , \gpio_defaults[407] , \gpio_defaults[406] , \gpio_defaults[405] , \gpio_defaults[404] , \gpio_defaults[403]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_32 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[428] , \gpio_defaults[427] , \gpio_defaults[426] , \gpio_defaults[425] , \gpio_defaults[424] , \gpio_defaults[423] , \gpio_defaults[422] , \gpio_defaults[421] , \gpio_defaults[420] , \gpio_defaults[419] , \gpio_defaults[418] , \gpio_defaults[417] , \gpio_defaults[416]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_33 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[441] , \gpio_defaults[440] , \gpio_defaults[439] , \gpio_defaults[438] , \gpio_defaults[437] , \gpio_defaults[436] , \gpio_defaults[435] , \gpio_defaults[434] , \gpio_defaults[433] , \gpio_defaults[432] , \gpio_defaults[431] , \gpio_defaults[430] , \gpio_defaults[429]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_34 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[454] , \gpio_defaults[453] , \gpio_defaults[452] , \gpio_defaults[451] , \gpio_defaults[450] , \gpio_defaults[449] , \gpio_defaults[448] , \gpio_defaults[447] , \gpio_defaults[446] , \gpio_defaults[445] , \gpio_defaults[444] , \gpio_defaults[443] , \gpio_defaults[442]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_35 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[467] , \gpio_defaults[466] , \gpio_defaults[465] , \gpio_defaults[464] , \gpio_defaults[463] , \gpio_defaults[462] , \gpio_defaults[461] , \gpio_defaults[460] , \gpio_defaults[459] , \gpio_defaults[458] , \gpio_defaults[457] , \gpio_defaults[456] , \gpio_defaults[455]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_36 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[480] , \gpio_defaults[479] , \gpio_defaults[478] , \gpio_defaults[477] , \gpio_defaults[476] , \gpio_defaults[475] , \gpio_defaults[474] , \gpio_defaults[473] , \gpio_defaults[472] , \gpio_defaults[471] , \gpio_defaults[470] , \gpio_defaults[469] , \gpio_defaults[468]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_37 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[493] , \gpio_defaults[492] , \gpio_defaults[491] , \gpio_defaults[490] , \gpio_defaults[489] , \gpio_defaults[488] , \gpio_defaults[487] , \gpio_defaults[486] , \gpio_defaults[485] , \gpio_defaults[484] , \gpio_defaults[483] , \gpio_defaults[482] , \gpio_defaults[481]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_4 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[64] , \gpio_defaults[63] , \gpio_defaults[62] , \gpio_defaults[61] , \gpio_defaults[60] , \gpio_defaults[59] , \gpio_defaults[58] , \gpio_defaults[57] , \gpio_defaults[56] , \gpio_defaults[55] , \gpio_defaults[54] , \gpio_defaults[53] , \gpio_defaults[52]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_5 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[77] , \gpio_defaults[76] , \gpio_defaults[75] , \gpio_defaults[74] , \gpio_defaults[73] , \gpio_defaults[72] , \gpio_defaults[71] , \gpio_defaults[70] , \gpio_defaults[69] , \gpio_defaults[68] , \gpio_defaults[67] , \gpio_defaults[66] , \gpio_defaults[65]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_6 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[90] , \gpio_defaults[89] , \gpio_defaults[88] , \gpio_defaults[87] , \gpio_defaults[86] , \gpio_defaults[85] , \gpio_defaults[84] , \gpio_defaults[83] , \gpio_defaults[82] , \gpio_defaults[81] , \gpio_defaults[80] , \gpio_defaults[79] , \gpio_defaults[78]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_7 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[103] , \gpio_defaults[102] , \gpio_defaults[101] , \gpio_defaults[100] , \gpio_defaults[99] , \gpio_defaults[98] , \gpio_defaults[97] , \gpio_defaults[96] , \gpio_defaults[95] , \gpio_defaults[94] , \gpio_defaults[93] , \gpio_defaults[92] , \gpio_defaults[91]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_8 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[116] , \gpio_defaults[115] , \gpio_defaults[114] , \gpio_defaults[113] , \gpio_defaults[112] , \gpio_defaults[111] , \gpio_defaults[110] , \gpio_defaults[109] , \gpio_defaults[108] , \gpio_defaults[107] , \gpio_defaults[106] , \gpio_defaults[105] , \gpio_defaults[104]  })
+  );
+  gpio_defaults_block_0403 gpio_defaults_block_9 (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .gpio_defaults({ \gpio_defaults[129] , \gpio_defaults[128] , \gpio_defaults[127] , \gpio_defaults[126] , \gpio_defaults[125] , \gpio_defaults[124] , \gpio_defaults[123] , \gpio_defaults[122] , \gpio_defaults[121] , \gpio_defaults[120] , \gpio_defaults[119] , \gpio_defaults[118] , \gpio_defaults[117]  })
+  );
+  housekeeping housekeeping (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .debug_in(debug_in),
+    .debug_mode(debug_mode),
+    .debug_oeb(debug_oeb),
+    .debug_out(debug_out),
+    .irq({ \irq_spi[2] , \irq_spi[1] , \irq_spi[0]  }),
+    .mask_rev_in({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0]  }),
+    .mgmt_gpio_in({ \mgmt_io_in_hk[37] , \mgmt_io_in_hk[36] , \mgmt_io_in_hk[35] , \mgmt_io_in_hk[34] , \mgmt_io_in_hk[33] , \mgmt_io_in_hk[32] , \mgmt_io_in_hk[31] , \mgmt_io_in_hk[30] , \mgmt_io_in_hk[29] , \mgmt_io_in_hk[28] , \mgmt_io_in_hk[27] , \mgmt_io_in_hk[26] , \mgmt_io_in_hk[25] , \mgmt_io_in_hk[24] , \mgmt_io_in_hk[23] , \mgmt_io_in_hk[22] , \mgmt_io_in_hk[21] , \mgmt_io_in_hk[20] , \mgmt_io_in_hk[19] , \mgmt_io_in_hk[18] , \mgmt_io_in_hk[17] , \mgmt_io_in_hk[16] , \mgmt_io_in_hk[15] , \mgmt_io_in_hk[14] , \mgmt_io_in_hk[13] , \mgmt_io_in_hk[12] , \mgmt_io_in_hk[11] , \mgmt_io_in_hk[10] , \mgmt_io_in_hk[9] , \mgmt_io_in_hk[8] , \mgmt_io_in_hk[7] , \mgmt_io_in[6] , \mgmt_io_in[5] , \mgmt_io_in[4] , \mgmt_io_in[3] , \mgmt_io_in[2] , \mgmt_io_in[1] , \mgmt_io_in[0]  }),
+    .mgmt_gpio_oeb({ \mgmt_io_oeb_hk[37] , \mgmt_io_oeb_hk[36] , \mgmt_io_oeb_hk[35] , \mgmt_io_oeb[34] , \mgmt_io_oeb[33] , \mgmt_io_oeb[32] , \mgmt_io_oeb[31] , \mgmt_io_oeb[30] , \mgmt_io_oeb[29] , \mgmt_io_oeb[28] , \mgmt_io_oeb[27] , \mgmt_io_oeb[26] , \mgmt_io_oeb[25] , \mgmt_io_oeb[24] , \mgmt_io_oeb[23] , \mgmt_io_oeb[22] , \mgmt_io_oeb[21] , \mgmt_io_oeb[20] , \mgmt_io_oeb[19] , \mgmt_io_oeb[18] , \mgmt_io_oeb[17] , \mgmt_io_oeb[16] , \mgmt_io_oeb[15] , \mgmt_io_oeb[14] , \mgmt_io_oeb[13] , \mgmt_io_oeb[12] , \mgmt_io_oeb[11] , \mgmt_io_oeb[10] , \mgmt_io_oeb[9] , \mgmt_io_oeb[8] , \mgmt_io_oeb[7] , \mgmt_io_oeb[6] , \mgmt_io_oeb[5] , \mgmt_io_oeb[4] , \mgmt_io_oeb[3] , \mgmt_io_oeb[2] , \mgmt_io_oeb[1] , \mgmt_io_oeb[0]  }),
+    .mgmt_gpio_out({ \mgmt_io_out_hk[37] , \mgmt_io_out_hk[36] , \mgmt_io_out_hk[35] , \mgmt_io_out_hk[34] , \mgmt_io_out_hk[33] , \mgmt_io_out_hk[32] , \mgmt_io_out_hk[31] , \mgmt_io_out_hk[30] , \mgmt_io_out_hk[29] , \mgmt_io_out_hk[28] , \mgmt_io_out_hk[27] , \mgmt_io_out_hk[26] , \mgmt_io_out_hk[25] , \mgmt_io_out_hk[24] , \mgmt_io_out_hk[23] , \mgmt_io_out_hk[22] , \mgmt_io_out_hk[21] , \mgmt_io_out_hk[20] , \mgmt_io_out_hk[19] , \mgmt_io_out_hk[18] , \mgmt_io_out_hk[17] , \mgmt_io_out_hk[16] , \mgmt_io_out_hk[15] , \mgmt_io_out_hk[14] , \mgmt_io_out_hk[13] , \mgmt_io_out_hk[12] , \mgmt_io_out_hk[11] , \mgmt_io_out_hk[10] , \mgmt_io_out_hk[9] , \mgmt_io_out_hk[8] , \mgmt_io_out_hk[7] , \mgmt_io_out[6] , \mgmt_io_out[5] , \mgmt_io_out[4] , \mgmt_io_out[3] , \mgmt_io_out[2] , \mgmt_io_out[1] , \mgmt_io_out[0]  }),
+    .pad_flash_clk(flash_clk_frame),
+    .pad_flash_clk_oeb(flash_clk_oeb),
+    .pad_flash_csb(flash_csb_frame),
+    .pad_flash_csb_oeb(flash_csb_oeb),
+    .pad_flash_io0_di(flash_io0_di_buf),
+    .pad_flash_io0_do(flash_io0_do),
+    .pad_flash_io0_ieb(flash_io0_ieb),
+    .pad_flash_io0_oeb(flash_io0_oeb),
+    .pad_flash_io1_di(flash_io1_di_buf),
+    .pad_flash_io1_do(flash_io1_do),
+    .pad_flash_io1_ieb(flash_io1_ieb),
+    .pad_flash_io1_oeb(flash_io1_oeb),
+    .pll90_sel({ \spi_pll90_sel[2] , \spi_pll90_sel[1] , \spi_pll90_sel[0]  }),
+    .pll_bypass(ext_clk_sel),
+    .pll_dco_ena(spi_pll_dco_ena),
+    .pll_div({ \spi_pll_div[4] , \spi_pll_div[3] , \spi_pll_div[2] , \spi_pll_div[1] , \spi_pll_div[0]  }),
+    .pll_ena(spi_pll_ena),
+    .pll_sel({ \spi_pll_sel[2] , \spi_pll_sel[1] , \spi_pll_sel[0]  }),
+    .pll_trim({ \spi_pll_trim[25] , \spi_pll_trim[24] , \spi_pll_trim[23] , \spi_pll_trim[22] , \spi_pll_trim[21] , \spi_pll_trim[20] , \spi_pll_trim[19] , \spi_pll_trim[18] , \spi_pll_trim[17] , \spi_pll_trim[16] , \spi_pll_trim[15] , \spi_pll_trim[14] , \spi_pll_trim[13] , \spi_pll_trim[12] , \spi_pll_trim[11] , \spi_pll_trim[10] , \spi_pll_trim[9] , \spi_pll_trim[8] , \spi_pll_trim[7] , \spi_pll_trim[6] , \spi_pll_trim[5] , \spi_pll_trim[4] , \spi_pll_trim[3] , \spi_pll_trim[2] , \spi_pll_trim[1] , \spi_pll_trim[0]  }),
+    .porb(porb_l),
+    .pwr_ctrl_out({ \pwr_ctrl_nc[3] , \pwr_ctrl_nc[2] , \pwr_ctrl_nc[1] , \pwr_ctrl_nc[0]  }),
+    .qspi_enabled(qspi_enabled),
+    .reset(ext_reset),
+    .ser_rx(ser_rx),
+    .ser_tx(ser_tx),
+    .serial_clock(\gpio_clock_1_shifted[0] ),
+    .serial_data_1(\gpio_serial_link_1_shifted[0] ),
+    .serial_data_2(mprj_io_loader_data_2),
+    .serial_load(\gpio_load_1_shifted[0] ),
+    .serial_resetn(\gpio_resetn_1_shifted[0] ),
+    .spi_csb(spi_csb),
+    .spi_enabled(spi_enabled),
+    .spi_sck(spi_sck),
+    .spi_sdi(spi_sdi),
+    .spi_sdo(spi_sdo),
+    .spi_sdoenb(spi_sdoenb),
+    .spimemio_flash_clk(flash_clk_core),
+    .spimemio_flash_csb(flash_csb_core),
+    .spimemio_flash_io0_di(flash_io0_di_core),
+    .spimemio_flash_io0_do(flash_io0_do_core),
+    .spimemio_flash_io0_oeb(flash_io0_oeb_core),
+    .spimemio_flash_io1_di(flash_io1_di_core),
+    .spimemio_flash_io1_do(flash_io1_do_core),
+    .spimemio_flash_io1_oeb(flash_io1_oeb_core),
+    .spimemio_flash_io2_di(flash_io2_di_core),
+    .spimemio_flash_io2_do(flash_io2_do_core),
+    .spimemio_flash_io2_oeb(flash_io2_oeb_core),
+    .spimemio_flash_io3_di(flash_io3_di_core),
+    .spimemio_flash_io3_do(flash_io3_do_core),
+    .spimemio_flash_io3_oeb(flash_io3_oeb_core),
+    .trap(trap),
+    .uart_enabled(uart_enabled),
+    .user_clock(caravel_clk2),
+    .usr1_vcc_pwrgood(mprj_vcc_pwrgood),
+    .usr1_vdd_pwrgood(mprj_vdd_pwrgood),
+    .usr2_vcc_pwrgood(mprj2_vcc_pwrgood),
+    .usr2_vdd_pwrgood(mprj2_vdd_pwrgood),
+    .wb_ack_o(hk_ack_i),
+    .wb_adr_i({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .wb_clk_i(caravel_clk),
+    .wb_cyc_i(hk_cyc_o),
+    .wb_dat_i({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .wb_dat_o({ \hk_dat_i[31] , \hk_dat_i[30] , \hk_dat_i[29] , \hk_dat_i[28] , \hk_dat_i[27] , \hk_dat_i[26] , \hk_dat_i[25] , \hk_dat_i[24] , \hk_dat_i[23] , \hk_dat_i[22] , \hk_dat_i[21] , \hk_dat_i[20] , \hk_dat_i[19] , \hk_dat_i[18] , \hk_dat_i[17] , \hk_dat_i[16] , \hk_dat_i[15] , \hk_dat_i[14] , \hk_dat_i[13] , \hk_dat_i[12] , \hk_dat_i[11] , \hk_dat_i[10] , \hk_dat_i[9] , \hk_dat_i[8] , \hk_dat_i[7] , \hk_dat_i[6] , \hk_dat_i[5] , \hk_dat_i[4] , \hk_dat_i[3] , \hk_dat_i[2] , \hk_dat_i[1] , \hk_dat_i[0]  }),
+    .wb_rstn_i(caravel_rstn),
+    .wb_sel_i({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .wb_stb_i(hk_stb_o),
+    .wb_we_i(mprj_we_o_core)
+  );
+  mgmt_protect mgmt_buffers (
+    .caravel_clk(clk_passthru),
+    .caravel_clk2(caravel_clk2),
+    .caravel_rstn(resetn_passthru),
+    .la_data_in_core({ \la_data_in_user[127] , \la_data_in_user[126] , \la_data_in_user[125] , \la_data_in_user[124] , \la_data_in_user[123] , \la_data_in_user[122] , \la_data_in_user[121] , \la_data_in_user[120] , \la_data_in_user[119] , \la_data_in_user[118] , \la_data_in_user[117] , \la_data_in_user[116] , \la_data_in_user[115] , \la_data_in_user[114] , \la_data_in_user[113] , \la_data_in_user[112] , \la_data_in_user[111] , \la_data_in_user[110] , \la_data_in_user[109] , \la_data_in_user[108] , \la_data_in_user[107] , \la_data_in_user[106] , \la_data_in_user[105] , \la_data_in_user[104] , \la_data_in_user[103] , \la_data_in_user[102] , \la_data_in_user[101] , \la_data_in_user[100] , \la_data_in_user[99] , \la_data_in_user[98] , \la_data_in_user[97] , \la_data_in_user[96] , \la_data_in_user[95] , \la_data_in_user[94] , \la_data_in_user[93] , \la_data_in_user[92] , \la_data_in_user[91] , \la_data_in_user[90] , \la_data_in_user[89] , \la_data_in_user[88] , \la_data_in_user[87] , \la_data_in_user[86] , \la_data_in_user[85] , \la_data_in_user[84] , \la_data_in_user[83] , \la_data_in_user[82] , \la_data_in_user[81] , \la_data_in_user[80] , \la_data_in_user[79] , \la_data_in_user[78] , \la_data_in_user[77] , \la_data_in_user[76] , \la_data_in_user[75] , \la_data_in_user[74] , \la_data_in_user[73] , \la_data_in_user[72] , \la_data_in_user[71] , \la_data_in_user[70] , \la_data_in_user[69] , \la_data_in_user[68] , \la_data_in_user[67] , \la_data_in_user[66] , \la_data_in_user[65] , \la_data_in_user[64] , \la_data_in_user[63] , \la_data_in_user[62] , \la_data_in_user[61] , \la_data_in_user[60] , \la_data_in_user[59] , \la_data_in_user[58] , \la_data_in_user[57] , \la_data_in_user[56] , \la_data_in_user[55] , \la_data_in_user[54] , \la_data_in_user[53] , \la_data_in_user[52] , \la_data_in_user[51] , \la_data_in_user[50] , \la_data_in_user[49] , \la_data_in_user[48] , \la_data_in_user[47] , \la_data_in_user[46] , \la_data_in_user[45] , \la_data_in_user[44] , \la_data_in_user[43] , \la_data_in_user[42] , \la_data_in_user[41] , \la_data_in_user[40] , \la_data_in_user[39] , \la_data_in_user[38] , \la_data_in_user[37] , \la_data_in_user[36] , \la_data_in_user[35] , \la_data_in_user[34] , \la_data_in_user[33] , \la_data_in_user[32] , \la_data_in_user[31] , \la_data_in_user[30] , \la_data_in_user[29] , \la_data_in_user[28] , \la_data_in_user[27] , \la_data_in_user[26] , \la_data_in_user[25] , \la_data_in_user[24] , \la_data_in_user[23] , \la_data_in_user[22] , \la_data_in_user[21] , \la_data_in_user[20] , \la_data_in_user[19] , \la_data_in_user[18] , \la_data_in_user[17] , \la_data_in_user[16] , \la_data_in_user[15] , \la_data_in_user[14] , \la_data_in_user[13] , \la_data_in_user[12] , \la_data_in_user[11] , \la_data_in_user[10] , \la_data_in_user[9] , \la_data_in_user[8] , \la_data_in_user[7] , \la_data_in_user[6] , \la_data_in_user[5] , \la_data_in_user[4] , \la_data_in_user[3] , \la_data_in_user[2] , \la_data_in_user[1] , \la_data_in_user[0]  }),
+    .la_data_in_mprj({ \la_data_in_mprj[127] , \la_data_in_mprj[126] , \la_data_in_mprj[125] , \la_data_in_mprj[124] , \la_data_in_mprj[123] , \la_data_in_mprj[122] , \la_data_in_mprj[121] , \la_data_in_mprj[120] , \la_data_in_mprj[119] , \la_data_in_mprj[118] , \la_data_in_mprj[117] , \la_data_in_mprj[116] , \la_data_in_mprj[115] , \la_data_in_mprj[114] , \la_data_in_mprj[113] , \la_data_in_mprj[112] , \la_data_in_mprj[111] , \la_data_in_mprj[110] , \la_data_in_mprj[109] , \la_data_in_mprj[108] , \la_data_in_mprj[107] , \la_data_in_mprj[106] , \la_data_in_mprj[105] , \la_data_in_mprj[104] , \la_data_in_mprj[103] , \la_data_in_mprj[102] , \la_data_in_mprj[101] , \la_data_in_mprj[100] , \la_data_in_mprj[99] , \la_data_in_mprj[98] , \la_data_in_mprj[97] , \la_data_in_mprj[96] , \la_data_in_mprj[95] , \la_data_in_mprj[94] , \la_data_in_mprj[93] , \la_data_in_mprj[92] , \la_data_in_mprj[91] , \la_data_in_mprj[90] , \la_data_in_mprj[89] , \la_data_in_mprj[88] , \la_data_in_mprj[87] , \la_data_in_mprj[86] , \la_data_in_mprj[85] , \la_data_in_mprj[84] , \la_data_in_mprj[83] , \la_data_in_mprj[82] , \la_data_in_mprj[81] , \la_data_in_mprj[80] , \la_data_in_mprj[79] , \la_data_in_mprj[78] , \la_data_in_mprj[77] , \la_data_in_mprj[76] , \la_data_in_mprj[75] , \la_data_in_mprj[74] , \la_data_in_mprj[73] , \la_data_in_mprj[72] , \la_data_in_mprj[71] , \la_data_in_mprj[70] , \la_data_in_mprj[69] , \la_data_in_mprj[68] , \la_data_in_mprj[67] , \la_data_in_mprj[66] , \la_data_in_mprj[65] , \la_data_in_mprj[64] , \la_data_in_mprj[63] , \la_data_in_mprj[62] , \la_data_in_mprj[61] , \la_data_in_mprj[60] , \la_data_in_mprj[59] , \la_data_in_mprj[58] , \la_data_in_mprj[57] , \la_data_in_mprj[56] , \la_data_in_mprj[55] , \la_data_in_mprj[54] , \la_data_in_mprj[53] , \la_data_in_mprj[52] , \la_data_in_mprj[51] , \la_data_in_mprj[50] , \la_data_in_mprj[49] , \la_data_in_mprj[48] , \la_data_in_mprj[47] , \la_data_in_mprj[46] , \la_data_in_mprj[45] , \la_data_in_mprj[44] , \la_data_in_mprj[43] , \la_data_in_mprj[42] , \la_data_in_mprj[41] , \la_data_in_mprj[40] , \la_data_in_mprj[39] , \la_data_in_mprj[38] , \la_data_in_mprj[37] , \la_data_in_mprj[36] , \la_data_in_mprj[35] , \la_data_in_mprj[34] , \la_data_in_mprj[33] , \la_data_in_mprj[32] , \la_data_in_mprj[31] , \la_data_in_mprj[30] , \la_data_in_mprj[29] , \la_data_in_mprj[28] , \la_data_in_mprj[27] , \la_data_in_mprj[26] , \la_data_in_mprj[25] , \la_data_in_mprj[24] , \la_data_in_mprj[23] , \la_data_in_mprj[22] , \la_data_in_mprj[21] , \la_data_in_mprj[20] , \la_data_in_mprj[19] , \la_data_in_mprj[18] , \la_data_in_mprj[17] , \la_data_in_mprj[16] , \la_data_in_mprj[15] , \la_data_in_mprj[14] , \la_data_in_mprj[13] , \la_data_in_mprj[12] , \la_data_in_mprj[11] , \la_data_in_mprj[10] , \la_data_in_mprj[9] , \la_data_in_mprj[8] , \la_data_in_mprj[7] , \la_data_in_mprj[6] , \la_data_in_mprj[5] , \la_data_in_mprj[4] , \la_data_in_mprj[3] , \la_data_in_mprj[2] , \la_data_in_mprj[1] , \la_data_in_mprj[0]  }),
+    .la_data_out_core({ \la_data_out_user[127] , \la_data_out_user[126] , \la_data_out_user[125] , \la_data_out_user[124] , \la_data_out_user[123] , \la_data_out_user[122] , \la_data_out_user[121] , \la_data_out_user[120] , \la_data_out_user[119] , \la_data_out_user[118] , \la_data_out_user[117] , \la_data_out_user[116] , \la_data_out_user[115] , \la_data_out_user[114] , \la_data_out_user[113] , \la_data_out_user[112] , \la_data_out_user[111] , \la_data_out_user[110] , \la_data_out_user[109] , \la_data_out_user[108] , \la_data_out_user[107] , \la_data_out_user[106] , \la_data_out_user[105] , \la_data_out_user[104] , \la_data_out_user[103] , \la_data_out_user[102] , \la_data_out_user[101] , \la_data_out_user[100] , \la_data_out_user[99] , \la_data_out_user[98] , \la_data_out_user[97] , \la_data_out_user[96] , \la_data_out_user[95] , \la_data_out_user[94] , \la_data_out_user[93] , \la_data_out_user[92] , \la_data_out_user[91] , \la_data_out_user[90] , \la_data_out_user[89] , \la_data_out_user[88] , \la_data_out_user[87] , \la_data_out_user[86] , \la_data_out_user[85] , \la_data_out_user[84] , \la_data_out_user[83] , \la_data_out_user[82] , \la_data_out_user[81] , \la_data_out_user[80] , \la_data_out_user[79] , \la_data_out_user[78] , \la_data_out_user[77] , \la_data_out_user[76] , \la_data_out_user[75] , \la_data_out_user[74] , \la_data_out_user[73] , \la_data_out_user[72] , \la_data_out_user[71] , \la_data_out_user[70] , \la_data_out_user[69] , \la_data_out_user[68] , \la_data_out_user[67] , \la_data_out_user[66] , \la_data_out_user[65] , \la_data_out_user[64] , \la_data_out_user[63] , \la_data_out_user[62] , \la_data_out_user[61] , \la_data_out_user[60] , \la_data_out_user[59] , \la_data_out_user[58] , \la_data_out_user[57] , \la_data_out_user[56] , \la_data_out_user[55] , \la_data_out_user[54] , \la_data_out_user[53] , \la_data_out_user[52] , \la_data_out_user[51] , \la_data_out_user[50] , \la_data_out_user[49] , \la_data_out_user[48] , \la_data_out_user[47] , \la_data_out_user[46] , \la_data_out_user[45] , \la_data_out_user[44] , \la_data_out_user[43] , \la_data_out_user[42] , \la_data_out_user[41] , \la_data_out_user[40] , \la_data_out_user[39] , \la_data_out_user[38] , \la_data_out_user[37] , \la_data_out_user[36] , \la_data_out_user[35] , \la_data_out_user[34] , \la_data_out_user[33] , \la_data_out_user[32] , \la_data_out_user[31] , \la_data_out_user[30] , \la_data_out_user[29] , \la_data_out_user[28] , \la_data_out_user[27] , \la_data_out_user[26] , \la_data_out_user[25] , \la_data_out_user[24] , \la_data_out_user[23] , \la_data_out_user[22] , \la_data_out_user[21] , \la_data_out_user[20] , \la_data_out_user[19] , \la_data_out_user[18] , \la_data_out_user[17] , \la_data_out_user[16] , \la_data_out_user[15] , \la_data_out_user[14] , \la_data_out_user[13] , \la_data_out_user[12] , \la_data_out_user[11] , \la_data_out_user[10] , \la_data_out_user[9] , \la_data_out_user[8] , \la_data_out_user[7] , \la_data_out_user[6] , \la_data_out_user[5] , \la_data_out_user[4] , \la_data_out_user[3] , \la_data_out_user[2] , \la_data_out_user[1] , \la_data_out_user[0]  }),
+    .la_data_out_mprj({ \la_data_out_mprj[127] , \la_data_out_mprj[126] , \la_data_out_mprj[125] , \la_data_out_mprj[124] , \la_data_out_mprj[123] , \la_data_out_mprj[122] , \la_data_out_mprj[121] , \la_data_out_mprj[120] , \la_data_out_mprj[119] , \la_data_out_mprj[118] , \la_data_out_mprj[117] , \la_data_out_mprj[116] , \la_data_out_mprj[115] , \la_data_out_mprj[114] , \la_data_out_mprj[113] , \la_data_out_mprj[112] , \la_data_out_mprj[111] , \la_data_out_mprj[110] , \la_data_out_mprj[109] , \la_data_out_mprj[108] , \la_data_out_mprj[107] , \la_data_out_mprj[106] , \la_data_out_mprj[105] , \la_data_out_mprj[104] , \la_data_out_mprj[103] , \la_data_out_mprj[102] , \la_data_out_mprj[101] , \la_data_out_mprj[100] , \la_data_out_mprj[99] , \la_data_out_mprj[98] , \la_data_out_mprj[97] , \la_data_out_mprj[96] , \la_data_out_mprj[95] , \la_data_out_mprj[94] , \la_data_out_mprj[93] , \la_data_out_mprj[92] , \la_data_out_mprj[91] , \la_data_out_mprj[90] , \la_data_out_mprj[89] , \la_data_out_mprj[88] , \la_data_out_mprj[87] , \la_data_out_mprj[86] , \la_data_out_mprj[85] , \la_data_out_mprj[84] , \la_data_out_mprj[83] , \la_data_out_mprj[82] , \la_data_out_mprj[81] , \la_data_out_mprj[80] , \la_data_out_mprj[79] , \la_data_out_mprj[78] , \la_data_out_mprj[77] , \la_data_out_mprj[76] , \la_data_out_mprj[75] , \la_data_out_mprj[74] , \la_data_out_mprj[73] , \la_data_out_mprj[72] , \la_data_out_mprj[71] , \la_data_out_mprj[70] , \la_data_out_mprj[69] , \la_data_out_mprj[68] , \la_data_out_mprj[67] , \la_data_out_mprj[66] , \la_data_out_mprj[65] , \la_data_out_mprj[64] , \la_data_out_mprj[63] , \la_data_out_mprj[62] , \la_data_out_mprj[61] , \la_data_out_mprj[60] , \la_data_out_mprj[59] , \la_data_out_mprj[58] , \la_data_out_mprj[57] , \la_data_out_mprj[56] , \la_data_out_mprj[55] , \la_data_out_mprj[54] , \la_data_out_mprj[53] , \la_data_out_mprj[52] , \la_data_out_mprj[51] , \la_data_out_mprj[50] , \la_data_out_mprj[49] , \la_data_out_mprj[48] , \la_data_out_mprj[47] , \la_data_out_mprj[46] , \la_data_out_mprj[45] , \la_data_out_mprj[44] , \la_data_out_mprj[43] , \la_data_out_mprj[42] , \la_data_out_mprj[41] , \la_data_out_mprj[40] , \la_data_out_mprj[39] , \la_data_out_mprj[38] , \la_data_out_mprj[37] , \la_data_out_mprj[36] , \la_data_out_mprj[35] , \la_data_out_mprj[34] , \la_data_out_mprj[33] , \la_data_out_mprj[32] , \la_data_out_mprj[31] , \la_data_out_mprj[30] , \la_data_out_mprj[29] , \la_data_out_mprj[28] , \la_data_out_mprj[27] , \la_data_out_mprj[26] , \la_data_out_mprj[25] , \la_data_out_mprj[24] , \la_data_out_mprj[23] , \la_data_out_mprj[22] , \la_data_out_mprj[21] , \la_data_out_mprj[20] , \la_data_out_mprj[19] , \la_data_out_mprj[18] , \la_data_out_mprj[17] , \la_data_out_mprj[16] , \la_data_out_mprj[15] , \la_data_out_mprj[14] , \la_data_out_mprj[13] , \la_data_out_mprj[12] , \la_data_out_mprj[11] , \la_data_out_mprj[10] , \la_data_out_mprj[9] , \la_data_out_mprj[8] , \la_data_out_mprj[7] , \la_data_out_mprj[6] , \la_data_out_mprj[5] , \la_data_out_mprj[4] , \la_data_out_mprj[3] , \la_data_out_mprj[2] , \la_data_out_mprj[1] , \la_data_out_mprj[0]  }),
+    .la_iena_mprj({ \la_iena_mprj[127] , \la_iena_mprj[126] , \la_iena_mprj[125] , \la_iena_mprj[124] , \la_iena_mprj[123] , \la_iena_mprj[122] , \la_iena_mprj[121] , \la_iena_mprj[120] , \la_iena_mprj[119] , \la_iena_mprj[118] , \la_iena_mprj[117] , \la_iena_mprj[116] , \la_iena_mprj[115] , \la_iena_mprj[114] , \la_iena_mprj[113] , \la_iena_mprj[112] , \la_iena_mprj[111] , \la_iena_mprj[110] , \la_iena_mprj[109] , \la_iena_mprj[108] , \la_iena_mprj[107] , \la_iena_mprj[106] , \la_iena_mprj[105] , \la_iena_mprj[104] , \la_iena_mprj[103] , \la_iena_mprj[102] , \la_iena_mprj[101] , \la_iena_mprj[100] , \la_iena_mprj[99] , \la_iena_mprj[98] , \la_iena_mprj[97] , \la_iena_mprj[96] , \la_iena_mprj[95] , \la_iena_mprj[94] , \la_iena_mprj[93] , \la_iena_mprj[92] , \la_iena_mprj[91] , \la_iena_mprj[90] , \la_iena_mprj[89] , \la_iena_mprj[88] , \la_iena_mprj[87] , \la_iena_mprj[86] , \la_iena_mprj[85] , \la_iena_mprj[84] , \la_iena_mprj[83] , \la_iena_mprj[82] , \la_iena_mprj[81] , \la_iena_mprj[80] , \la_iena_mprj[79] , \la_iena_mprj[78] , \la_iena_mprj[77] , \la_iena_mprj[76] , \la_iena_mprj[75] , \la_iena_mprj[74] , \la_iena_mprj[73] , \la_iena_mprj[72] , \la_iena_mprj[71] , \la_iena_mprj[70] , \la_iena_mprj[69] , \la_iena_mprj[68] , \la_iena_mprj[67] , \la_iena_mprj[66] , \la_iena_mprj[65] , \la_iena_mprj[64] , \la_iena_mprj[63] , \la_iena_mprj[62] , \la_iena_mprj[61] , \la_iena_mprj[60] , \la_iena_mprj[59] , \la_iena_mprj[58] , \la_iena_mprj[57] , \la_iena_mprj[56] , \la_iena_mprj[55] , \la_iena_mprj[54] , \la_iena_mprj[53] , \la_iena_mprj[52] , \la_iena_mprj[51] , \la_iena_mprj[50] , \la_iena_mprj[49] , \la_iena_mprj[48] , \la_iena_mprj[47] , \la_iena_mprj[46] , \la_iena_mprj[45] , \la_iena_mprj[44] , \la_iena_mprj[43] , \la_iena_mprj[42] , \la_iena_mprj[41] , \la_iena_mprj[40] , \la_iena_mprj[39] , \la_iena_mprj[38] , \la_iena_mprj[37] , \la_iena_mprj[36] , \la_iena_mprj[35] , \la_iena_mprj[34] , \la_iena_mprj[33] , \la_iena_mprj[32] , \la_iena_mprj[31] , \la_iena_mprj[30] , \la_iena_mprj[29] , \la_iena_mprj[28] , \la_iena_mprj[27] , \la_iena_mprj[26] , \la_iena_mprj[25] , \la_iena_mprj[24] , \la_iena_mprj[23] , \la_iena_mprj[22] , \la_iena_mprj[21] , \la_iena_mprj[20] , \la_iena_mprj[19] , \la_iena_mprj[18] , \la_iena_mprj[17] , \la_iena_mprj[16] , \la_iena_mprj[15] , \la_iena_mprj[14] , \la_iena_mprj[13] , \la_iena_mprj[12] , \la_iena_mprj[11] , \la_iena_mprj[10] , \la_iena_mprj[9] , \la_iena_mprj[8] , \la_iena_mprj[7] , \la_iena_mprj[6] , \la_iena_mprj[5] , \la_iena_mprj[4] , \la_iena_mprj[3] , \la_iena_mprj[2] , \la_iena_mprj[1] , \la_iena_mprj[0]  }),
+    .la_oenb_core({ \la_oenb_user[127] , \la_oenb_user[126] , \la_oenb_user[125] , \la_oenb_user[124] , \la_oenb_user[123] , \la_oenb_user[122] , \la_oenb_user[121] , \la_oenb_user[120] , \la_oenb_user[119] , \la_oenb_user[118] , \la_oenb_user[117] , \la_oenb_user[116] , \la_oenb_user[115] , \la_oenb_user[114] , \la_oenb_user[113] , \la_oenb_user[112] , \la_oenb_user[111] , \la_oenb_user[110] , \la_oenb_user[109] , \la_oenb_user[108] , \la_oenb_user[107] , \la_oenb_user[106] , \la_oenb_user[105] , \la_oenb_user[104] , \la_oenb_user[103] , \la_oenb_user[102] , \la_oenb_user[101] , \la_oenb_user[100] , \la_oenb_user[99] , \la_oenb_user[98] , \la_oenb_user[97] , \la_oenb_user[96] , \la_oenb_user[95] , \la_oenb_user[94] , \la_oenb_user[93] , \la_oenb_user[92] , \la_oenb_user[91] , \la_oenb_user[90] , \la_oenb_user[89] , \la_oenb_user[88] , \la_oenb_user[87] , \la_oenb_user[86] , \la_oenb_user[85] , \la_oenb_user[84] , \la_oenb_user[83] , \la_oenb_user[82] , \la_oenb_user[81] , \la_oenb_user[80] , \la_oenb_user[79] , \la_oenb_user[78] , \la_oenb_user[77] , \la_oenb_user[76] , \la_oenb_user[75] , \la_oenb_user[74] , \la_oenb_user[73] , \la_oenb_user[72] , \la_oenb_user[71] , \la_oenb_user[70] , \la_oenb_user[69] , \la_oenb_user[68] , \la_oenb_user[67] , \la_oenb_user[66] , \la_oenb_user[65] , \la_oenb_user[64] , \la_oenb_user[63] , \la_oenb_user[62] , \la_oenb_user[61] , \la_oenb_user[60] , \la_oenb_user[59] , \la_oenb_user[58] , \la_oenb_user[57] , \la_oenb_user[56] , \la_oenb_user[55] , \la_oenb_user[54] , \la_oenb_user[53] , \la_oenb_user[52] , \la_oenb_user[51] , \la_oenb_user[50] , \la_oenb_user[49] , \la_oenb_user[48] , \la_oenb_user[47] , \la_oenb_user[46] , \la_oenb_user[45] , \la_oenb_user[44] , \la_oenb_user[43] , \la_oenb_user[42] , \la_oenb_user[41] , \la_oenb_user[40] , \la_oenb_user[39] , \la_oenb_user[38] , \la_oenb_user[37] , \la_oenb_user[36] , \la_oenb_user[35] , \la_oenb_user[34] , \la_oenb_user[33] , \la_oenb_user[32] , \la_oenb_user[31] , \la_oenb_user[30] , \la_oenb_user[29] , \la_oenb_user[28] , \la_oenb_user[27] , \la_oenb_user[26] , \la_oenb_user[25] , \la_oenb_user[24] , \la_oenb_user[23] , \la_oenb_user[22] , \la_oenb_user[21] , \la_oenb_user[20] , \la_oenb_user[19] , \la_oenb_user[18] , \la_oenb_user[17] , \la_oenb_user[16] , \la_oenb_user[15] , \la_oenb_user[14] , \la_oenb_user[13] , \la_oenb_user[12] , \la_oenb_user[11] , \la_oenb_user[10] , \la_oenb_user[9] , \la_oenb_user[8] , \la_oenb_user[7] , \la_oenb_user[6] , \la_oenb_user[5] , \la_oenb_user[4] , \la_oenb_user[3] , \la_oenb_user[2] , \la_oenb_user[1] , \la_oenb_user[0]  }),
+    .la_oenb_mprj({ \la_oenb_mprj[127] , \la_oenb_mprj[126] , \la_oenb_mprj[125] , \la_oenb_mprj[124] , \la_oenb_mprj[123] , \la_oenb_mprj[122] , \la_oenb_mprj[121] , \la_oenb_mprj[120] , \la_oenb_mprj[119] , \la_oenb_mprj[118] , \la_oenb_mprj[117] , \la_oenb_mprj[116] , \la_oenb_mprj[115] , \la_oenb_mprj[114] , \la_oenb_mprj[113] , \la_oenb_mprj[112] , \la_oenb_mprj[111] , \la_oenb_mprj[110] , \la_oenb_mprj[109] , \la_oenb_mprj[108] , \la_oenb_mprj[107] , \la_oenb_mprj[106] , \la_oenb_mprj[105] , \la_oenb_mprj[104] , \la_oenb_mprj[103] , \la_oenb_mprj[102] , \la_oenb_mprj[101] , \la_oenb_mprj[100] , \la_oenb_mprj[99] , \la_oenb_mprj[98] , \la_oenb_mprj[97] , \la_oenb_mprj[96] , \la_oenb_mprj[95] , \la_oenb_mprj[94] , \la_oenb_mprj[93] , \la_oenb_mprj[92] , \la_oenb_mprj[91] , \la_oenb_mprj[90] , \la_oenb_mprj[89] , \la_oenb_mprj[88] , \la_oenb_mprj[87] , \la_oenb_mprj[86] , \la_oenb_mprj[85] , \la_oenb_mprj[84] , \la_oenb_mprj[83] , \la_oenb_mprj[82] , \la_oenb_mprj[81] , \la_oenb_mprj[80] , \la_oenb_mprj[79] , \la_oenb_mprj[78] , \la_oenb_mprj[77] , \la_oenb_mprj[76] , \la_oenb_mprj[75] , \la_oenb_mprj[74] , \la_oenb_mprj[73] , \la_oenb_mprj[72] , \la_oenb_mprj[71] , \la_oenb_mprj[70] , \la_oenb_mprj[69] , \la_oenb_mprj[68] , \la_oenb_mprj[67] , \la_oenb_mprj[66] , \la_oenb_mprj[65] , \la_oenb_mprj[64] , \la_oenb_mprj[63] , \la_oenb_mprj[62] , \la_oenb_mprj[61] , \la_oenb_mprj[60] , \la_oenb_mprj[59] , \la_oenb_mprj[58] , \la_oenb_mprj[57] , \la_oenb_mprj[56] , \la_oenb_mprj[55] , \la_oenb_mprj[54] , \la_oenb_mprj[53] , \la_oenb_mprj[52] , \la_oenb_mprj[51] , \la_oenb_mprj[50] , \la_oenb_mprj[49] , \la_oenb_mprj[48] , \la_oenb_mprj[47] , \la_oenb_mprj[46] , \la_oenb_mprj[45] , \la_oenb_mprj[44] , \la_oenb_mprj[43] , \la_oenb_mprj[42] , \la_oenb_mprj[41] , \la_oenb_mprj[40] , \la_oenb_mprj[39] , \la_oenb_mprj[38] , \la_oenb_mprj[37] , \la_oenb_mprj[36] , \la_oenb_mprj[35] , \la_oenb_mprj[34] , \la_oenb_mprj[33] , \la_oenb_mprj[32] , \la_oenb_mprj[31] , \la_oenb_mprj[30] , \la_oenb_mprj[29] , \la_oenb_mprj[28] , \la_oenb_mprj[27] , \la_oenb_mprj[26] , \la_oenb_mprj[25] , \la_oenb_mprj[24] , \la_oenb_mprj[23] , \la_oenb_mprj[22] , \la_oenb_mprj[21] , \la_oenb_mprj[20] , \la_oenb_mprj[19] , \la_oenb_mprj[18] , \la_oenb_mprj[17] , \la_oenb_mprj[16] , \la_oenb_mprj[15] , \la_oenb_mprj[14] , \la_oenb_mprj[13] , \la_oenb_mprj[12] , \la_oenb_mprj[11] , \la_oenb_mprj[10] , \la_oenb_mprj[9] , \la_oenb_mprj[8] , \la_oenb_mprj[7] , \la_oenb_mprj[6] , \la_oenb_mprj[5] , \la_oenb_mprj[4] , \la_oenb_mprj[3] , \la_oenb_mprj[2] , \la_oenb_mprj[1] , \la_oenb_mprj[0]  }),
+    .mprj_ack_i_core(mprj_ack_i_core),
+    .mprj_ack_i_user(mprj_ack_i_user),
+    .mprj_adr_o_core({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .mprj_adr_o_user({ \mprj_adr_o_user[31] , \mprj_adr_o_user[30] , \mprj_adr_o_user[29] , \mprj_adr_o_user[28] , \mprj_adr_o_user[27] , \mprj_adr_o_user[26] , \mprj_adr_o_user[25] , \mprj_adr_o_user[24] , \mprj_adr_o_user[23] , \mprj_adr_o_user[22] , \mprj_adr_o_user[21] , \mprj_adr_o_user[20] , \mprj_adr_o_user[19] , \mprj_adr_o_user[18] , \mprj_adr_o_user[17] , \mprj_adr_o_user[16] , \mprj_adr_o_user[15] , \mprj_adr_o_user[14] , \mprj_adr_o_user[13] , \mprj_adr_o_user[12] , \mprj_adr_o_user[11] , \mprj_adr_o_user[10] , \mprj_adr_o_user[9] , \mprj_adr_o_user[8] , \mprj_adr_o_user[7] , \mprj_adr_o_user[6] , \mprj_adr_o_user[5] , \mprj_adr_o_user[4] , \mprj_adr_o_user[3] , \mprj_adr_o_user[2] , \mprj_adr_o_user[1] , \mprj_adr_o_user[0]  }),
+    .mprj_cyc_o_core(mprj_cyc_o_core),
+    .mprj_cyc_o_user(mprj_cyc_o_user),
+    .mprj_dat_i_core({ \mprj_dat_i_core[31] , \mprj_dat_i_core[30] , \mprj_dat_i_core[29] , \mprj_dat_i_core[28] , \mprj_dat_i_core[27] , \mprj_dat_i_core[26] , \mprj_dat_i_core[25] , \mprj_dat_i_core[24] , \mprj_dat_i_core[23] , \mprj_dat_i_core[22] , \mprj_dat_i_core[21] , \mprj_dat_i_core[20] , \mprj_dat_i_core[19] , \mprj_dat_i_core[18] , \mprj_dat_i_core[17] , \mprj_dat_i_core[16] , \mprj_dat_i_core[15] , \mprj_dat_i_core[14] , \mprj_dat_i_core[13] , \mprj_dat_i_core[12] , \mprj_dat_i_core[11] , \mprj_dat_i_core[10] , \mprj_dat_i_core[9] , \mprj_dat_i_core[8] , \mprj_dat_i_core[7] , \mprj_dat_i_core[6] , \mprj_dat_i_core[5] , \mprj_dat_i_core[4] , \mprj_dat_i_core[3] , \mprj_dat_i_core[2] , \mprj_dat_i_core[1] , \mprj_dat_i_core[0]  }),
+    .mprj_dat_i_user({ \mprj_dat_i_user[31] , \mprj_dat_i_user[30] , \mprj_dat_i_user[29] , \mprj_dat_i_user[28] , \mprj_dat_i_user[27] , \mprj_dat_i_user[26] , \mprj_dat_i_user[25] , \mprj_dat_i_user[24] , \mprj_dat_i_user[23] , \mprj_dat_i_user[22] , \mprj_dat_i_user[21] , \mprj_dat_i_user[20] , \mprj_dat_i_user[19] , \mprj_dat_i_user[18] , \mprj_dat_i_user[17] , \mprj_dat_i_user[16] , \mprj_dat_i_user[15] , \mprj_dat_i_user[14] , \mprj_dat_i_user[13] , \mprj_dat_i_user[12] , \mprj_dat_i_user[11] , \mprj_dat_i_user[10] , \mprj_dat_i_user[9] , \mprj_dat_i_user[8] , \mprj_dat_i_user[7] , \mprj_dat_i_user[6] , \mprj_dat_i_user[5] , \mprj_dat_i_user[4] , \mprj_dat_i_user[3] , \mprj_dat_i_user[2] , \mprj_dat_i_user[1] , \mprj_dat_i_user[0]  }),
+    .mprj_dat_o_core({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .mprj_dat_o_user({ \mprj_dat_o_user[31] , \mprj_dat_o_user[30] , \mprj_dat_o_user[29] , \mprj_dat_o_user[28] , \mprj_dat_o_user[27] , \mprj_dat_o_user[26] , \mprj_dat_o_user[25] , \mprj_dat_o_user[24] , \mprj_dat_o_user[23] , \mprj_dat_o_user[22] , \mprj_dat_o_user[21] , \mprj_dat_o_user[20] , \mprj_dat_o_user[19] , \mprj_dat_o_user[18] , \mprj_dat_o_user[17] , \mprj_dat_o_user[16] , \mprj_dat_o_user[15] , \mprj_dat_o_user[14] , \mprj_dat_o_user[13] , \mprj_dat_o_user[12] , \mprj_dat_o_user[11] , \mprj_dat_o_user[10] , \mprj_dat_o_user[9] , \mprj_dat_o_user[8] , \mprj_dat_o_user[7] , \mprj_dat_o_user[6] , \mprj_dat_o_user[5] , \mprj_dat_o_user[4] , \mprj_dat_o_user[3] , \mprj_dat_o_user[2] , \mprj_dat_o_user[1] , \mprj_dat_o_user[0]  }),
+    .mprj_iena_wb(mprj_iena_wb),
+    .mprj_sel_o_core({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .mprj_sel_o_user({ \mprj_sel_o_user[3] , \mprj_sel_o_user[2] , \mprj_sel_o_user[1] , \mprj_sel_o_user[0]  }),
+    .mprj_stb_o_core(mprj_stb_o_core),
+    .mprj_stb_o_user(mprj_stb_o_user),
+    .mprj_we_o_core(mprj_we_o_core),
+    .mprj_we_o_user(mprj_we_o_user),
+    .user1_vcc_powergood(mprj_vcc_pwrgood),
+    .user1_vdd_powergood(mprj_vdd_pwrgood),
+    .user2_vcc_powergood(mprj2_vcc_pwrgood),
+    .user2_vdd_powergood(mprj2_vdd_pwrgood),
+    .user_clock(mprj_clock),
+    .user_clock2(mprj_clock2),
+    .user_irq({ \user_irq[2] , \user_irq[1] , \user_irq[0]  }),
+    .user_irq_core({ \user_irq_core[2] , \user_irq_core[1] , \user_irq_core[0]  }),
+    .user_irq_ena({ \user_irq_ena[2] , \user_irq_ena[1] , \user_irq_ena[0]  }),
+    .user_reset(mprj_reset),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vccd2(vccd2_core),
+    .vdda1(vdda1_core),
+    .vdda2(vdda2_core),
+    .vssa1(vssa1_core),
+    .vssa2(vssa2_core),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .vssd2(vssd2_core)
+  );
+  user_project_wrapper mprj (
+    .analog_io({ \user_analog_io[28] , \user_analog_io[27] , \user_analog_io[26] , \user_analog_io[25] , \user_analog_io[24] , \user_analog_io[23] , \user_analog_io[22] , \user_analog_io[21] , \user_analog_io[20] , \user_analog_io[19] , \user_analog_io[18] , \user_analog_io[17] , \user_analog_io[16] , \user_analog_io[15] , \user_analog_io[14] , \user_analog_io[13] , \user_analog_io[12] , \user_analog_io[11] , \user_analog_io[10] , \user_analog_io[9] , \user_analog_io[8] , \user_analog_io[7] , \user_analog_io[6] , \user_analog_io[5] , \user_analog_io[4] , \user_analog_io[3] , \user_analog_io[2] , \user_analog_io[1] , \user_analog_io[0]  }),
+    .io_in({ \user_io_in[37] , \user_io_in[36] , \user_io_in[35] , \user_io_in[34] , \user_io_in[33] , \user_io_in[32] , \user_io_in[31] , \user_io_in[30] , \user_io_in[29] , \user_io_in[28] , \user_io_in[27] , \user_io_in[26] , \user_io_in[25] , \user_io_in[24] , \user_io_in[23] , \user_io_in[22] , \user_io_in[21] , \user_io_in[20] , \user_io_in[19] , \user_io_in[18] , \user_io_in[17] , \user_io_in[16] , \user_io_in[15] , \user_io_in[14] , \user_io_in[13] , \user_io_in[12] , \user_io_in[11] , \user_io_in[10] , \user_io_in[9] , \user_io_in[8] , \user_io_in[7] , \user_io_in[6] , \user_io_in[5] , \user_io_in[4] , \user_io_in[3] , \user_io_in[2] , \user_io_in[1] , \user_io_in[0]  }),
+    .io_oeb({ \user_io_oeb[37] , \user_io_oeb[36] , \user_io_oeb[35] , \user_io_oeb[34] , \user_io_oeb[33] , \user_io_oeb[32] , \user_io_oeb[31] , \user_io_oeb[30] , \user_io_oeb[29] , \user_io_oeb[28] , \user_io_oeb[27] , \user_io_oeb[26] , \user_io_oeb[25] , \user_io_oeb[24] , \user_io_oeb[23] , \user_io_oeb[22] , \user_io_oeb[21] , \user_io_oeb[20] , \user_io_oeb[19] , \user_io_oeb[18] , \user_io_oeb[17] , \user_io_oeb[16] , \user_io_oeb[15] , \user_io_oeb[14] , \user_io_oeb[13] , \user_io_oeb[12] , \user_io_oeb[11] , \user_io_oeb[10] , \user_io_oeb[9] , \user_io_oeb[8] , \user_io_oeb[7] , \user_io_oeb[6] , \user_io_oeb[5] , \user_io_oeb[4] , \user_io_oeb[3] , \user_io_oeb[2] , \user_io_oeb[1] , \user_io_oeb[0]  }),
+    .io_out({ \user_io_out[37] , \user_io_out[36] , \user_io_out[35] , \user_io_out[34] , \user_io_out[33] , \user_io_out[32] , \user_io_out[31] , \user_io_out[30] , \user_io_out[29] , \user_io_out[28] , \user_io_out[27] , \user_io_out[26] , \user_io_out[25] , \user_io_out[24] , \user_io_out[23] , \user_io_out[22] , \user_io_out[21] , \user_io_out[20] , \user_io_out[19] , \user_io_out[18] , \user_io_out[17] , \user_io_out[16] , \user_io_out[15] , \user_io_out[14] , \user_io_out[13] , \user_io_out[12] , \user_io_out[11] , \user_io_out[10] , \user_io_out[9] , \user_io_out[8] , \user_io_out[7] , \user_io_out[6] , \user_io_out[5] , \user_io_out[4] , \user_io_out[3] , \user_io_out[2] , \user_io_out[1] , \user_io_out[0]  }),
+    .la_data_in({ \la_data_in_user[127] , \la_data_in_user[126] , \la_data_in_user[125] , \la_data_in_user[124] , \la_data_in_user[123] , \la_data_in_user[122] , \la_data_in_user[121] , \la_data_in_user[120] , \la_data_in_user[119] , \la_data_in_user[118] , \la_data_in_user[117] , \la_data_in_user[116] , \la_data_in_user[115] , \la_data_in_user[114] , \la_data_in_user[113] , \la_data_in_user[112] , \la_data_in_user[111] , \la_data_in_user[110] , \la_data_in_user[109] , \la_data_in_user[108] , \la_data_in_user[107] , \la_data_in_user[106] , \la_data_in_user[105] , \la_data_in_user[104] , \la_data_in_user[103] , \la_data_in_user[102] , \la_data_in_user[101] , \la_data_in_user[100] , \la_data_in_user[99] , \la_data_in_user[98] , \la_data_in_user[97] , \la_data_in_user[96] , \la_data_in_user[95] , \la_data_in_user[94] , \la_data_in_user[93] , \la_data_in_user[92] , \la_data_in_user[91] , \la_data_in_user[90] , \la_data_in_user[89] , \la_data_in_user[88] , \la_data_in_user[87] , \la_data_in_user[86] , \la_data_in_user[85] , \la_data_in_user[84] , \la_data_in_user[83] , \la_data_in_user[82] , \la_data_in_user[81] , \la_data_in_user[80] , \la_data_in_user[79] , \la_data_in_user[78] , \la_data_in_user[77] , \la_data_in_user[76] , \la_data_in_user[75] , \la_data_in_user[74] , \la_data_in_user[73] , \la_data_in_user[72] , \la_data_in_user[71] , \la_data_in_user[70] , \la_data_in_user[69] , \la_data_in_user[68] , \la_data_in_user[67] , \la_data_in_user[66] , \la_data_in_user[65] , \la_data_in_user[64] , \la_data_in_user[63] , \la_data_in_user[62] , \la_data_in_user[61] , \la_data_in_user[60] , \la_data_in_user[59] , \la_data_in_user[58] , \la_data_in_user[57] , \la_data_in_user[56] , \la_data_in_user[55] , \la_data_in_user[54] , \la_data_in_user[53] , \la_data_in_user[52] , \la_data_in_user[51] , \la_data_in_user[50] , \la_data_in_user[49] , \la_data_in_user[48] , \la_data_in_user[47] , \la_data_in_user[46] , \la_data_in_user[45] , \la_data_in_user[44] , \la_data_in_user[43] , \la_data_in_user[42] , \la_data_in_user[41] , \la_data_in_user[40] , \la_data_in_user[39] , \la_data_in_user[38] , \la_data_in_user[37] , \la_data_in_user[36] , \la_data_in_user[35] , \la_data_in_user[34] , \la_data_in_user[33] , \la_data_in_user[32] , \la_data_in_user[31] , \la_data_in_user[30] , \la_data_in_user[29] , \la_data_in_user[28] , \la_data_in_user[27] , \la_data_in_user[26] , \la_data_in_user[25] , \la_data_in_user[24] , \la_data_in_user[23] , \la_data_in_user[22] , \la_data_in_user[21] , \la_data_in_user[20] , \la_data_in_user[19] , \la_data_in_user[18] , \la_data_in_user[17] , \la_data_in_user[16] , \la_data_in_user[15] , \la_data_in_user[14] , \la_data_in_user[13] , \la_data_in_user[12] , \la_data_in_user[11] , \la_data_in_user[10] , \la_data_in_user[9] , \la_data_in_user[8] , \la_data_in_user[7] , \la_data_in_user[6] , \la_data_in_user[5] , \la_data_in_user[4] , \la_data_in_user[3] , \la_data_in_user[2] , \la_data_in_user[1] , \la_data_in_user[0]  }),
+    .la_data_out({ \la_data_out_user[127] , \la_data_out_user[126] , \la_data_out_user[125] , \la_data_out_user[124] , \la_data_out_user[123] , \la_data_out_user[122] , \la_data_out_user[121] , \la_data_out_user[120] , \la_data_out_user[119] , \la_data_out_user[118] , \la_data_out_user[117] , \la_data_out_user[116] , \la_data_out_user[115] , \la_data_out_user[114] , \la_data_out_user[113] , \la_data_out_user[112] , \la_data_out_user[111] , \la_data_out_user[110] , \la_data_out_user[109] , \la_data_out_user[108] , \la_data_out_user[107] , \la_data_out_user[106] , \la_data_out_user[105] , \la_data_out_user[104] , \la_data_out_user[103] , \la_data_out_user[102] , \la_data_out_user[101] , \la_data_out_user[100] , \la_data_out_user[99] , \la_data_out_user[98] , \la_data_out_user[97] , \la_data_out_user[96] , \la_data_out_user[95] , \la_data_out_user[94] , \la_data_out_user[93] , \la_data_out_user[92] , \la_data_out_user[91] , \la_data_out_user[90] , \la_data_out_user[89] , \la_data_out_user[88] , \la_data_out_user[87] , \la_data_out_user[86] , \la_data_out_user[85] , \la_data_out_user[84] , \la_data_out_user[83] , \la_data_out_user[82] , \la_data_out_user[81] , \la_data_out_user[80] , \la_data_out_user[79] , \la_data_out_user[78] , \la_data_out_user[77] , \la_data_out_user[76] , \la_data_out_user[75] , \la_data_out_user[74] , \la_data_out_user[73] , \la_data_out_user[72] , \la_data_out_user[71] , \la_data_out_user[70] , \la_data_out_user[69] , \la_data_out_user[68] , \la_data_out_user[67] , \la_data_out_user[66] , \la_data_out_user[65] , \la_data_out_user[64] , \la_data_out_user[63] , \la_data_out_user[62] , \la_data_out_user[61] , \la_data_out_user[60] , \la_data_out_user[59] , \la_data_out_user[58] , \la_data_out_user[57] , \la_data_out_user[56] , \la_data_out_user[55] , \la_data_out_user[54] , \la_data_out_user[53] , \la_data_out_user[52] , \la_data_out_user[51] , \la_data_out_user[50] , \la_data_out_user[49] , \la_data_out_user[48] , \la_data_out_user[47] , \la_data_out_user[46] , \la_data_out_user[45] , \la_data_out_user[44] , \la_data_out_user[43] , \la_data_out_user[42] , \la_data_out_user[41] , \la_data_out_user[40] , \la_data_out_user[39] , \la_data_out_user[38] , \la_data_out_user[37] , \la_data_out_user[36] , \la_data_out_user[35] , \la_data_out_user[34] , \la_data_out_user[33] , \la_data_out_user[32] , \la_data_out_user[31] , \la_data_out_user[30] , \la_data_out_user[29] , \la_data_out_user[28] , \la_data_out_user[27] , \la_data_out_user[26] , \la_data_out_user[25] , \la_data_out_user[24] , \la_data_out_user[23] , \la_data_out_user[22] , \la_data_out_user[21] , \la_data_out_user[20] , \la_data_out_user[19] , \la_data_out_user[18] , \la_data_out_user[17] , \la_data_out_user[16] , \la_data_out_user[15] , \la_data_out_user[14] , \la_data_out_user[13] , \la_data_out_user[12] , \la_data_out_user[11] , \la_data_out_user[10] , \la_data_out_user[9] , \la_data_out_user[8] , \la_data_out_user[7] , \la_data_out_user[6] , \la_data_out_user[5] , \la_data_out_user[4] , \la_data_out_user[3] , \la_data_out_user[2] , \la_data_out_user[1] , \la_data_out_user[0]  }),
+    .la_oenb({ \la_oenb_user[127] , \la_oenb_user[126] , \la_oenb_user[125] , \la_oenb_user[124] , \la_oenb_user[123] , \la_oenb_user[122] , \la_oenb_user[121] , \la_oenb_user[120] , \la_oenb_user[119] , \la_oenb_user[118] , \la_oenb_user[117] , \la_oenb_user[116] , \la_oenb_user[115] , \la_oenb_user[114] , \la_oenb_user[113] , \la_oenb_user[112] , \la_oenb_user[111] , \la_oenb_user[110] , \la_oenb_user[109] , \la_oenb_user[108] , \la_oenb_user[107] , \la_oenb_user[106] , \la_oenb_user[105] , \la_oenb_user[104] , \la_oenb_user[103] , \la_oenb_user[102] , \la_oenb_user[101] , \la_oenb_user[100] , \la_oenb_user[99] , \la_oenb_user[98] , \la_oenb_user[97] , \la_oenb_user[96] , \la_oenb_user[95] , \la_oenb_user[94] , \la_oenb_user[93] , \la_oenb_user[92] , \la_oenb_user[91] , \la_oenb_user[90] , \la_oenb_user[89] , \la_oenb_user[88] , \la_oenb_user[87] , \la_oenb_user[86] , \la_oenb_user[85] , \la_oenb_user[84] , \la_oenb_user[83] , \la_oenb_user[82] , \la_oenb_user[81] , \la_oenb_user[80] , \la_oenb_user[79] , \la_oenb_user[78] , \la_oenb_user[77] , \la_oenb_user[76] , \la_oenb_user[75] , \la_oenb_user[74] , \la_oenb_user[73] , \la_oenb_user[72] , \la_oenb_user[71] , \la_oenb_user[70] , \la_oenb_user[69] , \la_oenb_user[68] , \la_oenb_user[67] , \la_oenb_user[66] , \la_oenb_user[65] , \la_oenb_user[64] , \la_oenb_user[63] , \la_oenb_user[62] , \la_oenb_user[61] , \la_oenb_user[60] , \la_oenb_user[59] , \la_oenb_user[58] , \la_oenb_user[57] , \la_oenb_user[56] , \la_oenb_user[55] , \la_oenb_user[54] , \la_oenb_user[53] , \la_oenb_user[52] , \la_oenb_user[51] , \la_oenb_user[50] , \la_oenb_user[49] , \la_oenb_user[48] , \la_oenb_user[47] , \la_oenb_user[46] , \la_oenb_user[45] , \la_oenb_user[44] , \la_oenb_user[43] , \la_oenb_user[42] , \la_oenb_user[41] , \la_oenb_user[40] , \la_oenb_user[39] , \la_oenb_user[38] , \la_oenb_user[37] , \la_oenb_user[36] , \la_oenb_user[35] , \la_oenb_user[34] , \la_oenb_user[33] , \la_oenb_user[32] , \la_oenb_user[31] , \la_oenb_user[30] , \la_oenb_user[29] , \la_oenb_user[28] , \la_oenb_user[27] , \la_oenb_user[26] , \la_oenb_user[25] , \la_oenb_user[24] , \la_oenb_user[23] , \la_oenb_user[22] , \la_oenb_user[21] , \la_oenb_user[20] , \la_oenb_user[19] , \la_oenb_user[18] , \la_oenb_user[17] , \la_oenb_user[16] , \la_oenb_user[15] , \la_oenb_user[14] , \la_oenb_user[13] , \la_oenb_user[12] , \la_oenb_user[11] , \la_oenb_user[10] , \la_oenb_user[9] , \la_oenb_user[8] , \la_oenb_user[7] , \la_oenb_user[6] , \la_oenb_user[5] , \la_oenb_user[4] , \la_oenb_user[3] , \la_oenb_user[2] , \la_oenb_user[1] , \la_oenb_user[0]  }),
+    .user_clock2(mprj_clock2),
+    .user_irq({ \user_irq_core[2] , \user_irq_core[1] , \user_irq_core[0]  }),
+    .vccd1(vccd1_core),
+    .vccd2(vccd2_core),
+    .vdda1(vdda1_core),
+    .vdda2(vdda2_core),
+    .vssa1(vssa1_core),
+    .vssa2(vssa2_core),
+    .vssd1(vssd1_core),
+    .vssd2(vssd2_core),
+    .wb_clk_i(mprj_clock),
+    .wb_rst_i(mprj_reset),
+    .wbs_ack_o(mprj_ack_i_user),
+    .wbs_adr_i({ \mprj_adr_o_user[31] , \mprj_adr_o_user[30] , \mprj_adr_o_user[29] , \mprj_adr_o_user[28] , \mprj_adr_o_user[27] , \mprj_adr_o_user[26] , \mprj_adr_o_user[25] , \mprj_adr_o_user[24] , \mprj_adr_o_user[23] , \mprj_adr_o_user[22] , \mprj_adr_o_user[21] , \mprj_adr_o_user[20] , \mprj_adr_o_user[19] , \mprj_adr_o_user[18] , \mprj_adr_o_user[17] , \mprj_adr_o_user[16] , \mprj_adr_o_user[15] , \mprj_adr_o_user[14] , \mprj_adr_o_user[13] , \mprj_adr_o_user[12] , \mprj_adr_o_user[11] , \mprj_adr_o_user[10] , \mprj_adr_o_user[9] , \mprj_adr_o_user[8] , \mprj_adr_o_user[7] , \mprj_adr_o_user[6] , \mprj_adr_o_user[5] , \mprj_adr_o_user[4] , \mprj_adr_o_user[3] , \mprj_adr_o_user[2] , \mprj_adr_o_user[1] , \mprj_adr_o_user[0]  }),
+    .wbs_cyc_i(mprj_cyc_o_user),
+    .wbs_dat_i({ \mprj_dat_o_user[31] , \mprj_dat_o_user[30] , \mprj_dat_o_user[29] , \mprj_dat_o_user[28] , \mprj_dat_o_user[27] , \mprj_dat_o_user[26] , \mprj_dat_o_user[25] , \mprj_dat_o_user[24] , \mprj_dat_o_user[23] , \mprj_dat_o_user[22] , \mprj_dat_o_user[21] , \mprj_dat_o_user[20] , \mprj_dat_o_user[19] , \mprj_dat_o_user[18] , \mprj_dat_o_user[17] , \mprj_dat_o_user[16] , \mprj_dat_o_user[15] , \mprj_dat_o_user[14] , \mprj_dat_o_user[13] , \mprj_dat_o_user[12] , \mprj_dat_o_user[11] , \mprj_dat_o_user[10] , \mprj_dat_o_user[9] , \mprj_dat_o_user[8] , \mprj_dat_o_user[7] , \mprj_dat_o_user[6] , \mprj_dat_o_user[5] , \mprj_dat_o_user[4] , \mprj_dat_o_user[3] , \mprj_dat_o_user[2] , \mprj_dat_o_user[1] , \mprj_dat_o_user[0]  }),
+    .wbs_dat_o({ \mprj_dat_i_user[31] , \mprj_dat_i_user[30] , \mprj_dat_i_user[29] , \mprj_dat_i_user[28] , \mprj_dat_i_user[27] , \mprj_dat_i_user[26] , \mprj_dat_i_user[25] , \mprj_dat_i_user[24] , \mprj_dat_i_user[23] , \mprj_dat_i_user[22] , \mprj_dat_i_user[21] , \mprj_dat_i_user[20] , \mprj_dat_i_user[19] , \mprj_dat_i_user[18] , \mprj_dat_i_user[17] , \mprj_dat_i_user[16] , \mprj_dat_i_user[15] , \mprj_dat_i_user[14] , \mprj_dat_i_user[13] , \mprj_dat_i_user[12] , \mprj_dat_i_user[11] , \mprj_dat_i_user[10] , \mprj_dat_i_user[9] , \mprj_dat_i_user[8] , \mprj_dat_i_user[7] , \mprj_dat_i_user[6] , \mprj_dat_i_user[5] , \mprj_dat_i_user[4] , \mprj_dat_i_user[3] , \mprj_dat_i_user[2] , \mprj_dat_i_user[1] , \mprj_dat_i_user[0]  }),
+    .wbs_sel_i({ \mprj_sel_o_user[3] , \mprj_sel_o_user[2] , \mprj_sel_o_user[1] , \mprj_sel_o_user[0]  }),
+    .wbs_stb_i(mprj_stb_o_user),
+    .wbs_we_i(mprj_we_o_user)
+  );
+  chip_io padframe (
+    .clock(clock),
+    .clock_core(clock_core),
+    .flash_clk(flash_clk),
+    .flash_clk_core(flash_clk_frame_buf),
+    .flash_clk_oeb_core(flash_clk_oeb_buf),
+    .flash_csb(flash_csb),
+    .flash_csb_core(flash_csb_frame_buf),
+    .flash_csb_oeb_core(flash_csb_oeb_buf),
+    .flash_io0(flash_io0),
+    .flash_io0_di_core(flash_io0_di),
+    .flash_io0_do_core(flash_io0_do_buf),
+    .flash_io0_ieb_core(flash_io0_ieb_buf),
+    .flash_io0_oeb_core(flash_io0_oeb_buf),
+    .flash_io1(flash_io1),
+    .flash_io1_di_core(flash_io1_di),
+    .flash_io1_do_core(flash_io1_do_buf),
+    .flash_io1_ieb_core(flash_io1_ieb_buf),
+    .flash_io1_oeb_core(flash_io1_oeb_buf),
+    .gpio(gpio),
+    .gpio_in_core(gpio_in_core),
+    .gpio_inenb_core(gpio_inenb_core),
+    .gpio_mode0_core(gpio_mode0_core),
+    .gpio_mode1_core(gpio_mode1_core),
+    .gpio_out_core(gpio_out_core),
+    .gpio_outenb_core(gpio_outenb_core),
+    .mprj_analog_io({ \user_analog_io[28] , \user_analog_io[27] , \user_analog_io[26] , \user_analog_io[25] , \user_analog_io[24] , \user_analog_io[23] , \user_analog_io[22] , \user_analog_io[21] , \user_analog_io[20] , \user_analog_io[19] , \user_analog_io[18] , \user_analog_io[17] , \user_analog_io[16] , \user_analog_io[15] , \user_analog_io[14] , \user_analog_io[13] , \user_analog_io[12] , \user_analog_io[11] , \user_analog_io[10] , \user_analog_io[9] , \user_analog_io[8] , \user_analog_io[7] , \user_analog_io[6] , \user_analog_io[5] , \user_analog_io[4] , \user_analog_io[3] , \user_analog_io[2] , \user_analog_io[1] , \user_analog_io[0]  }),
+    .mprj_io(mprj_io),
+    .mprj_io_analog_en({ \mprj_io_analog_en[37] , \mprj_io_analog_en[36] , \mprj_io_analog_en[35] , \mprj_io_analog_en[34] , \mprj_io_analog_en[33] , \mprj_io_analog_en[32] , \mprj_io_analog_en[31] , \mprj_io_analog_en[30] , \mprj_io_analog_en[29] , \mprj_io_analog_en[28] , \mprj_io_analog_en[27] , \mprj_io_analog_en[26] , \mprj_io_analog_en[25] , \mprj_io_analog_en[24] , \mprj_io_analog_en[23] , \mprj_io_analog_en[22] , \mprj_io_analog_en[21] , \mprj_io_analog_en[20] , \mprj_io_analog_en[19] , \mprj_io_analog_en[18] , \mprj_io_analog_en[17] , \mprj_io_analog_en[16] , \mprj_io_analog_en[15] , \mprj_io_analog_en[14] , \mprj_io_analog_en[13] , \mprj_io_analog_en[12] , \mprj_io_analog_en[11] , \mprj_io_analog_en[10] , \mprj_io_analog_en[9] , \mprj_io_analog_en[8] , \mprj_io_analog_en[7] , \mprj_io_analog_en[6] , \mprj_io_analog_en[5] , \mprj_io_analog_en[4] , \mprj_io_analog_en[3] , \mprj_io_analog_en[2] , \mprj_io_analog_en[1] , \mprj_io_analog_en[0]  }),
+    .mprj_io_analog_pol({ \mprj_io_analog_pol[37] , \mprj_io_analog_pol[36] , \mprj_io_analog_pol[35] , \mprj_io_analog_pol[34] , \mprj_io_analog_pol[33] , \mprj_io_analog_pol[32] , \mprj_io_analog_pol[31] , \mprj_io_analog_pol[30] , \mprj_io_analog_pol[29] , \mprj_io_analog_pol[28] , \mprj_io_analog_pol[27] , \mprj_io_analog_pol[26] , \mprj_io_analog_pol[25] , \mprj_io_analog_pol[24] , \mprj_io_analog_pol[23] , \mprj_io_analog_pol[22] , \mprj_io_analog_pol[21] , \mprj_io_analog_pol[20] , \mprj_io_analog_pol[19] , \mprj_io_analog_pol[18] , \mprj_io_analog_pol[17] , \mprj_io_analog_pol[16] , \mprj_io_analog_pol[15] , \mprj_io_analog_pol[14] , \mprj_io_analog_pol[13] , \mprj_io_analog_pol[12] , \mprj_io_analog_pol[11] , \mprj_io_analog_pol[10] , \mprj_io_analog_pol[9] , \mprj_io_analog_pol[8] , \mprj_io_analog_pol[7] , \mprj_io_analog_pol[6] , \mprj_io_analog_pol[5] , \mprj_io_analog_pol[4] , \mprj_io_analog_pol[3] , \mprj_io_analog_pol[2] , \mprj_io_analog_pol[1] , \mprj_io_analog_pol[0]  }),
+    .mprj_io_analog_sel({ \mprj_io_analog_sel[37] , \mprj_io_analog_sel[36] , \mprj_io_analog_sel[35] , \mprj_io_analog_sel[34] , \mprj_io_analog_sel[33] , \mprj_io_analog_sel[32] , \mprj_io_analog_sel[31] , \mprj_io_analog_sel[30] , \mprj_io_analog_sel[29] , \mprj_io_analog_sel[28] , \mprj_io_analog_sel[27] , \mprj_io_analog_sel[26] , \mprj_io_analog_sel[25] , \mprj_io_analog_sel[24] , \mprj_io_analog_sel[23] , \mprj_io_analog_sel[22] , \mprj_io_analog_sel[21] , \mprj_io_analog_sel[20] , \mprj_io_analog_sel[19] , \mprj_io_analog_sel[18] , \mprj_io_analog_sel[17] , \mprj_io_analog_sel[16] , \mprj_io_analog_sel[15] , \mprj_io_analog_sel[14] , \mprj_io_analog_sel[13] , \mprj_io_analog_sel[12] , \mprj_io_analog_sel[11] , \mprj_io_analog_sel[10] , \mprj_io_analog_sel[9] , \mprj_io_analog_sel[8] , \mprj_io_analog_sel[7] , \mprj_io_analog_sel[6] , \mprj_io_analog_sel[5] , \mprj_io_analog_sel[4] , \mprj_io_analog_sel[3] , \mprj_io_analog_sel[2] , \mprj_io_analog_sel[1] , \mprj_io_analog_sel[0]  }),
+    .mprj_io_dm({ \mprj_io_dm[113] , \mprj_io_dm[112] , \mprj_io_dm[111] , \mprj_io_dm[110] , \mprj_io_dm[109] , \mprj_io_dm[108] , \mprj_io_dm[107] , \mprj_io_dm[106] , \mprj_io_dm[105] , \mprj_io_dm[104] , \mprj_io_dm[103] , \mprj_io_dm[102] , \mprj_io_dm[101] , \mprj_io_dm[100] , \mprj_io_dm[99] , \mprj_io_dm[98] , \mprj_io_dm[97] , \mprj_io_dm[96] , \mprj_io_dm[95] , \mprj_io_dm[94] , \mprj_io_dm[93] , \mprj_io_dm[92] , \mprj_io_dm[91] , \mprj_io_dm[90] , \mprj_io_dm[89] , \mprj_io_dm[88] , \mprj_io_dm[87] , \mprj_io_dm[86] , \mprj_io_dm[85] , \mprj_io_dm[84] , \mprj_io_dm[83] , \mprj_io_dm[82] , \mprj_io_dm[81] , \mprj_io_dm[80] , \mprj_io_dm[79] , \mprj_io_dm[78] , \mprj_io_dm[77] , \mprj_io_dm[76] , \mprj_io_dm[75] , \mprj_io_dm[74] , \mprj_io_dm[73] , \mprj_io_dm[72] , \mprj_io_dm[71] , \mprj_io_dm[70] , \mprj_io_dm[69] , \mprj_io_dm[68] , \mprj_io_dm[67] , \mprj_io_dm[66] , \mprj_io_dm[65] , \mprj_io_dm[64] , \mprj_io_dm[63] , \mprj_io_dm[62] , \mprj_io_dm[61] , \mprj_io_dm[60] , \mprj_io_dm[59] , \mprj_io_dm[58] , \mprj_io_dm[57] , \mprj_io_dm[56] , \mprj_io_dm[55] , \mprj_io_dm[54] , \mprj_io_dm[53] , \mprj_io_dm[52] , \mprj_io_dm[51] , \mprj_io_dm[50] , \mprj_io_dm[49] , \mprj_io_dm[48] , \mprj_io_dm[47] , \mprj_io_dm[46] , \mprj_io_dm[45] , \mprj_io_dm[44] , \mprj_io_dm[43] , \mprj_io_dm[42] , \mprj_io_dm[41] , \mprj_io_dm[40] , \mprj_io_dm[39] , \mprj_io_dm[38] , \mprj_io_dm[37] , \mprj_io_dm[36] , \mprj_io_dm[35] , \mprj_io_dm[34] , \mprj_io_dm[33] , \mprj_io_dm[32] , \mprj_io_dm[31] , \mprj_io_dm[30] , \mprj_io_dm[29] , \mprj_io_dm[28] , \mprj_io_dm[27] , \mprj_io_dm[26] , \mprj_io_dm[25] , \mprj_io_dm[24] , \mprj_io_dm[23] , \mprj_io_dm[22] , \mprj_io_dm[21] , \mprj_io_dm[20] , \mprj_io_dm[19] , \mprj_io_dm[18] , \mprj_io_dm[17] , \mprj_io_dm[16] , \mprj_io_dm[15] , \mprj_io_dm[14] , \mprj_io_dm[13] , \mprj_io_dm[12] , \mprj_io_dm[11] , \mprj_io_dm[10] , \mprj_io_dm[9] , \mprj_io_dm[8] , \mprj_io_dm[7] , \mprj_io_dm[6] , \mprj_io_dm[5] , \mprj_io_dm[4] , \mprj_io_dm[3] , \mprj_io_dm[2] , \mprj_io_dm[1] , \mprj_io_dm[0]  }),
+    .mprj_io_holdover({ \mprj_io_holdover[37] , \mprj_io_holdover[36] , \mprj_io_holdover[35] , \mprj_io_holdover[34] , \mprj_io_holdover[33] , \mprj_io_holdover[32] , \mprj_io_holdover[31] , \mprj_io_holdover[30] , \mprj_io_holdover[29] , \mprj_io_holdover[28] , \mprj_io_holdover[27] , \mprj_io_holdover[26] , \mprj_io_holdover[25] , \mprj_io_holdover[24] , \mprj_io_holdover[23] , \mprj_io_holdover[22] , \mprj_io_holdover[21] , \mprj_io_holdover[20] , \mprj_io_holdover[19] , \mprj_io_holdover[18] , \mprj_io_holdover[17] , \mprj_io_holdover[16] , \mprj_io_holdover[15] , \mprj_io_holdover[14] , \mprj_io_holdover[13] , \mprj_io_holdover[12] , \mprj_io_holdover[11] , \mprj_io_holdover[10] , \mprj_io_holdover[9] , \mprj_io_holdover[8] , \mprj_io_holdover[7] , \mprj_io_holdover[6] , \mprj_io_holdover[5] , \mprj_io_holdover[4] , \mprj_io_holdover[3] , \mprj_io_holdover[2] , \mprj_io_holdover[1] , \mprj_io_holdover[0]  }),
+    .mprj_io_ib_mode_sel({ \mprj_io_ib_mode_sel[37] , \mprj_io_ib_mode_sel[36] , \mprj_io_ib_mode_sel[35] , \mprj_io_ib_mode_sel[34] , \mprj_io_ib_mode_sel[33] , \mprj_io_ib_mode_sel[32] , \mprj_io_ib_mode_sel[31] , \mprj_io_ib_mode_sel[30] , \mprj_io_ib_mode_sel[29] , \mprj_io_ib_mode_sel[28] , \mprj_io_ib_mode_sel[27] , \mprj_io_ib_mode_sel[26] , \mprj_io_ib_mode_sel[25] , \mprj_io_ib_mode_sel[24] , \mprj_io_ib_mode_sel[23] , \mprj_io_ib_mode_sel[22] , \mprj_io_ib_mode_sel[21] , \mprj_io_ib_mode_sel[20] , \mprj_io_ib_mode_sel[19] , \mprj_io_ib_mode_sel[18] , \mprj_io_ib_mode_sel[17] , \mprj_io_ib_mode_sel[16] , \mprj_io_ib_mode_sel[15] , \mprj_io_ib_mode_sel[14] , \mprj_io_ib_mode_sel[13] , \mprj_io_ib_mode_sel[12] , \mprj_io_ib_mode_sel[11] , \mprj_io_ib_mode_sel[10] , \mprj_io_ib_mode_sel[9] , \mprj_io_ib_mode_sel[8] , \mprj_io_ib_mode_sel[7] , \mprj_io_ib_mode_sel[6] , \mprj_io_ib_mode_sel[5] , \mprj_io_ib_mode_sel[4] , \mprj_io_ib_mode_sel[3] , \mprj_io_ib_mode_sel[2] , \mprj_io_ib_mode_sel[1] , \mprj_io_ib_mode_sel[0]  }),
+    .mprj_io_in({ \mprj_io_in[37] , \mprj_io_in[36] , \mprj_io_in[35] , \mprj_io_in[34] , \mprj_io_in[33] , \mprj_io_in[32] , \mprj_io_in[31] , \mprj_io_in[30] , \mprj_io_in[29] , \mprj_io_in[28] , \mprj_io_in[27] , \mprj_io_in[26] , \mprj_io_in[25] , \mprj_io_in[24] , \mprj_io_in[23] , \mprj_io_in[22] , \mprj_io_in[21] , \mprj_io_in[20] , \mprj_io_in[19] , \mprj_io_in[18] , \mprj_io_in[17] , \mprj_io_in[16] , \mprj_io_in[15] , \mprj_io_in[14] , \mprj_io_in[13] , \mprj_io_in[12] , \mprj_io_in[11] , \mprj_io_in[10] , \mprj_io_in[9] , \mprj_io_in[8] , \mprj_io_in[7] , \mprj_io_in[6] , \mprj_io_in[5] , \mprj_io_in[4] , \mprj_io_in[3] , \mprj_io_in[2] , \mprj_io_in[1] , \mprj_io_in[0]  }),
+    .mprj_io_inp_dis({ \mprj_io_inp_dis[37] , \mprj_io_inp_dis[36] , \mprj_io_inp_dis[35] , \mprj_io_inp_dis[34] , \mprj_io_inp_dis[33] , \mprj_io_inp_dis[32] , \mprj_io_inp_dis[31] , \mprj_io_inp_dis[30] , \mprj_io_inp_dis[29] , \mprj_io_inp_dis[28] , \mprj_io_inp_dis[27] , \mprj_io_inp_dis[26] , \mprj_io_inp_dis[25] , \mprj_io_inp_dis[24] , \mprj_io_inp_dis[23] , \mprj_io_inp_dis[22] , \mprj_io_inp_dis[21] , \mprj_io_inp_dis[20] , \mprj_io_inp_dis[19] , \mprj_io_inp_dis[18] , \mprj_io_inp_dis[17] , \mprj_io_inp_dis[16] , \mprj_io_inp_dis[15] , \mprj_io_inp_dis[14] , \mprj_io_inp_dis[13] , \mprj_io_inp_dis[12] , \mprj_io_inp_dis[11] , \mprj_io_inp_dis[10] , \mprj_io_inp_dis[9] , \mprj_io_inp_dis[8] , \mprj_io_inp_dis[7] , \mprj_io_inp_dis[6] , \mprj_io_inp_dis[5] , \mprj_io_inp_dis[4] , \mprj_io_inp_dis[3] , \mprj_io_inp_dis[2] , \mprj_io_inp_dis[1] , \mprj_io_inp_dis[0]  }),
+    .mprj_io_oeb({ \mprj_io_oeb[37] , \mprj_io_oeb[36] , \mprj_io_oeb[35] , \mprj_io_oeb[34] , \mprj_io_oeb[33] , \mprj_io_oeb[32] , \mprj_io_oeb[31] , \mprj_io_oeb[30] , \mprj_io_oeb[29] , \mprj_io_oeb[28] , \mprj_io_oeb[27] , \mprj_io_oeb[26] , \mprj_io_oeb[25] , \mprj_io_oeb[24] , \mprj_io_oeb[23] , \mprj_io_oeb[22] , \mprj_io_oeb[21] , \mprj_io_oeb[20] , \mprj_io_oeb[19] , \mprj_io_oeb[18] , \mprj_io_oeb[17] , \mprj_io_oeb[16] , \mprj_io_oeb[15] , \mprj_io_oeb[14] , \mprj_io_oeb[13] , \mprj_io_oeb[12] , \mprj_io_oeb[11] , \mprj_io_oeb[10] , \mprj_io_oeb[9] , \mprj_io_oeb[8] , \mprj_io_oeb[7] , \mprj_io_oeb[6] , \mprj_io_oeb[5] , \mprj_io_oeb[4] , \mprj_io_oeb[3] , \mprj_io_oeb[2] , \mprj_io_oeb[1] , \mprj_io_oeb[0]  }),
+    .mprj_io_one({ \mprj_io_one[37] , \mprj_io_one[36] , \mprj_io_one[35] , \mprj_io_one[34] , \mprj_io_one[33] , \mprj_io_one[32] , \mprj_io_one[31] , \mprj_io_one[30] , \mprj_io_one[29] , \mprj_io_one[28] , \mprj_io_one[27] , \mprj_io_one[26] , \mprj_io_one[25] , \mprj_io_one[24] , \mprj_io_one[23] , \mprj_io_one[22] , \mprj_io_one[21] , \mprj_io_one[20] , \mprj_io_one[19] , \mprj_io_one[18] , \mprj_io_one[17] , \mprj_io_one[16] , \mprj_io_one[15] , \mprj_io_one[14] , \mprj_io_one[13] , \mprj_io_one[12] , \mprj_io_one[11] , \mprj_io_one[10] , \mprj_io_one[9] , \mprj_io_one[8] , \mprj_io_one[7] , \mprj_io_one[6] , \mprj_io_one[5] , \mprj_io_one[4] , \mprj_io_one[3] , \mprj_io_one[2] , \mprj_io_one[1] , \mprj_io_one[0]  }),
+    .mprj_io_out({ \mprj_io_out[37] , \mprj_io_out[36] , \mprj_io_out[35] , \mprj_io_out[34] , \mprj_io_out[33] , \mprj_io_out[32] , \mprj_io_out[31] , \mprj_io_out[30] , \mprj_io_out[29] , \mprj_io_out[28] , \mprj_io_out[27] , \mprj_io_out[26] , \mprj_io_out[25] , \mprj_io_out[24] , \mprj_io_out[23] , \mprj_io_out[22] , \mprj_io_out[21] , \mprj_io_out[20] , \mprj_io_out[19] , \mprj_io_out[18] , \mprj_io_out[17] , \mprj_io_out[16] , \mprj_io_out[15] , \mprj_io_out[14] , \mprj_io_out[13] , \mprj_io_out[12] , \mprj_io_out[11] , \mprj_io_out[10] , \mprj_io_out[9] , \mprj_io_out[8] , \mprj_io_out[7] , \mprj_io_out[6] , \mprj_io_out[5] , \mprj_io_out[4] , \mprj_io_out[3] , \mprj_io_out[2] , \mprj_io_out[1] , \mprj_io_out[0]  }),
+    .mprj_io_slow_sel({ \mprj_io_slow_sel[37] , \mprj_io_slow_sel[36] , \mprj_io_slow_sel[35] , \mprj_io_slow_sel[34] , \mprj_io_slow_sel[33] , \mprj_io_slow_sel[32] , \mprj_io_slow_sel[31] , \mprj_io_slow_sel[30] , \mprj_io_slow_sel[29] , \mprj_io_slow_sel[28] , \mprj_io_slow_sel[27] , \mprj_io_slow_sel[26] , \mprj_io_slow_sel[25] , \mprj_io_slow_sel[24] , \mprj_io_slow_sel[23] , \mprj_io_slow_sel[22] , \mprj_io_slow_sel[21] , \mprj_io_slow_sel[20] , \mprj_io_slow_sel[19] , \mprj_io_slow_sel[18] , \mprj_io_slow_sel[17] , \mprj_io_slow_sel[16] , \mprj_io_slow_sel[15] , \mprj_io_slow_sel[14] , \mprj_io_slow_sel[13] , \mprj_io_slow_sel[12] , \mprj_io_slow_sel[11] , \mprj_io_slow_sel[10] , \mprj_io_slow_sel[9] , \mprj_io_slow_sel[8] , \mprj_io_slow_sel[7] , \mprj_io_slow_sel[6] , \mprj_io_slow_sel[5] , \mprj_io_slow_sel[4] , \mprj_io_slow_sel[3] , \mprj_io_slow_sel[2] , \mprj_io_slow_sel[1] , \mprj_io_slow_sel[0]  }),
+    .mprj_io_vtrip_sel({ \mprj_io_vtrip_sel[37] , \mprj_io_vtrip_sel[36] , \mprj_io_vtrip_sel[35] , \mprj_io_vtrip_sel[34] , \mprj_io_vtrip_sel[33] , \mprj_io_vtrip_sel[32] , \mprj_io_vtrip_sel[31] , \mprj_io_vtrip_sel[30] , \mprj_io_vtrip_sel[29] , \mprj_io_vtrip_sel[28] , \mprj_io_vtrip_sel[27] , \mprj_io_vtrip_sel[26] , \mprj_io_vtrip_sel[25] , \mprj_io_vtrip_sel[24] , \mprj_io_vtrip_sel[23] , \mprj_io_vtrip_sel[22] , \mprj_io_vtrip_sel[21] , \mprj_io_vtrip_sel[20] , \mprj_io_vtrip_sel[19] , \mprj_io_vtrip_sel[18] , \mprj_io_vtrip_sel[17] , \mprj_io_vtrip_sel[16] , \mprj_io_vtrip_sel[15] , \mprj_io_vtrip_sel[14] , \mprj_io_vtrip_sel[13] , \mprj_io_vtrip_sel[12] , \mprj_io_vtrip_sel[11] , \mprj_io_vtrip_sel[10] , \mprj_io_vtrip_sel[9] , \mprj_io_vtrip_sel[8] , \mprj_io_vtrip_sel[7] , \mprj_io_vtrip_sel[6] , \mprj_io_vtrip_sel[5] , \mprj_io_vtrip_sel[4] , \mprj_io_vtrip_sel[3] , \mprj_io_vtrip_sel[2] , \mprj_io_vtrip_sel[1] , \mprj_io_vtrip_sel[0]  }),
+    .por(por_l_buf),
+    .porb_h(porb_h),
+    .resetb(resetb),
+    .resetb_core_h(rstb_h),
+    .vccd(vccd_core),
+    .vccd1(vccd1_core),
+    .vccd1_pad(vccd1),
+    .vccd2(vccd2_core),
+    .vccd2_pad(vccd2),
+    .vccd_pad(vccd),
+    .vdda(vdda_core),
+    .vdda1(vdda1_core),
+    .vdda1_pad(vdda1),
+    .vdda1_pad2(vdda1_2),
+    .vdda2(vdda2_core),
+    .vdda2_pad(vdda2),
+    .vdda_pad(vdda),
+    .vddio(vddio_core),
+    .vddio_pad(vddio),
+    .vddio_pad2(vddio_2),
+    .vssa(vssa_core),
+    .vssa1(vssa1_core),
+    .vssa1_pad(vssa1),
+    .vssa1_pad2(vssa1_2),
+    .vssa2(vssa2_core),
+    .vssa2_pad(vssa2),
+    .vssa_pad(vssa),
+    .vssd(vssd_core),
+    .vssd1(vssd1_core),
+    .vssd1_pad(vssd1),
+    .vssd2(vssd2_core),
+    .vssd2_pad(vssd2),
+    .vssd_pad(vssd),
+    .vssio(vssio_core),
+    .vssio_pad(vssio),
+    .vssio_pad2(vssio_2)
+  );
+  digital_pll pll (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .clockp({ pll_clk, pll_clk90 }),
+    .dco(spi_pll_dco_ena),
+    .div({ \spi_pll_div[4] , \spi_pll_div[3] , \spi_pll_div[2] , \spi_pll_div[1] , \spi_pll_div[0]  }),
+    .enable(spi_pll_ena),
+    .ext_trim({ \spi_pll_trim[25] , \spi_pll_trim[24] , \spi_pll_trim[23] , \spi_pll_trim[22] , \spi_pll_trim[21] , \spi_pll_trim[20] , \spi_pll_trim[19] , \spi_pll_trim[18] , \spi_pll_trim[17] , \spi_pll_trim[16] , \spi_pll_trim[15] , \spi_pll_trim[14] , \spi_pll_trim[13] , \spi_pll_trim[12] , \spi_pll_trim[11] , \spi_pll_trim[10] , \spi_pll_trim[9] , \spi_pll_trim[8] , \spi_pll_trim[7] , \spi_pll_trim[6] , \spi_pll_trim[5] , \spi_pll_trim[4] , \spi_pll_trim[3] , \spi_pll_trim[2] , \spi_pll_trim[1] , \spi_pll_trim[0]  }),
+    .osc(clock_core_buf),
+    .resetb(rstb_l_buf)
+  );
+  simple_por por (
+    .por_l(por_l),
+    .porb_h(porb_h),
+    .porb_l(porb_l),
+    .vdd1v8(vccd_core),
+    .vdd3v3(vddio_core),
+    .vss1v8(vssd_core),
+    .vss3v3(vssio_core)
+  );
+  xres_buf rstb_level (
+    .A(rstb_h),
+    .LVGND(vssd_core),
+    .LVPWR(vccd_core),
+    .VGND(vssio_core),
+    .VPWR(vddio_core),
+    .X(rstb_l)
+  );
+  gpio_signal_buffering sigbuf (
+    .mgmt_io_in_buf({ \mgmt_io_in_hk[37] , \mgmt_io_in_hk[36] , \mgmt_io_in_hk[35] , \mgmt_io_in_hk[34] , \mgmt_io_in_hk[33] , \mgmt_io_in_hk[32] , \mgmt_io_in_hk[31] , \mgmt_io_in_hk[30] , \mgmt_io_in_hk[29] , \mgmt_io_in_hk[28] , \mgmt_io_in_hk[27] , \mgmt_io_in_hk[26] , \mgmt_io_in_hk[25] , \mgmt_io_in_hk[24] , \mgmt_io_in_hk[23] , \mgmt_io_in_hk[22] , \mgmt_io_in_hk[21] , \mgmt_io_in_hk[20] , \mgmt_io_in_hk[19] , \mgmt_io_in_hk[18] , \mgmt_io_in_hk[17] , \mgmt_io_in_hk[16] , \mgmt_io_in_hk[15] , \mgmt_io_in_hk[14] , \mgmt_io_in_hk[13] , \mgmt_io_in_hk[12] , \mgmt_io_in_hk[11] , \mgmt_io_in_hk[10] , \mgmt_io_in_hk[9] , \mgmt_io_in_hk[8] , \mgmt_io_in_hk[7]  }),
+    .mgmt_io_in_unbuf({ \mgmt_io_in[37] , \mgmt_io_in[36] , \mgmt_io_in[35] , \mgmt_io_in[34] , \mgmt_io_in[33] , \mgmt_io_in[32] , \mgmt_io_in[31] , \mgmt_io_in[30] , \mgmt_io_in[29] , \mgmt_io_in[28] , \mgmt_io_in[27] , \mgmt_io_in[26] , \mgmt_io_in[25] , \mgmt_io_in[24] , \mgmt_io_in[23] , \mgmt_io_in[22] , \mgmt_io_in[21] , \mgmt_io_in[20] , \mgmt_io_in[19] , \mgmt_io_in[18] , \mgmt_io_in[17] , \mgmt_io_in[16] , \mgmt_io_in[15] , \mgmt_io_in[14] , \mgmt_io_in[13] , \mgmt_io_in[12] , \mgmt_io_in[11] , \mgmt_io_in[10] , \mgmt_io_in[9] , \mgmt_io_in[8] , \mgmt_io_in[7]  }),
+    .mgmt_io_oeb_buf({ \mgmt_io_oeb[37] , \mgmt_io_oeb[36] , \mgmt_io_oeb[35]  }),
+    .mgmt_io_oeb_unbuf({ \mgmt_io_oeb_hk[37] , \mgmt_io_oeb_hk[36] , \mgmt_io_oeb_hk[35]  }),
+    .mgmt_io_out_buf({ \mgmt_io_out[37] , \mgmt_io_out[36] , \mgmt_io_out[35] , \mgmt_io_out[34] , \mgmt_io_out[33] , \mgmt_io_out[32] , \mgmt_io_out[31] , \mgmt_io_out[30] , \mgmt_io_out[29] , \mgmt_io_out[28] , \mgmt_io_out[27] , \mgmt_io_out[26] , \mgmt_io_out[25] , \mgmt_io_out[24] , \mgmt_io_out[23] , \mgmt_io_out[22] , \mgmt_io_out[21] , \mgmt_io_out[20] , \mgmt_io_out[19] , \mgmt_io_out[18] , \mgmt_io_out[17] , \mgmt_io_out[16] , \mgmt_io_out[15] , \mgmt_io_out[14] , \mgmt_io_out[13] , \mgmt_io_out[12] , \mgmt_io_out[11] , \mgmt_io_out[10] , \mgmt_io_out[9] , \mgmt_io_out[8] , \mgmt_io_out[7]  }),
+    .mgmt_io_out_unbuf({ \mgmt_io_out_hk[37] , \mgmt_io_out_hk[36] , \mgmt_io_out_hk[35] , \mgmt_io_out_hk[34] , \mgmt_io_out_hk[33] , \mgmt_io_out_hk[32] , \mgmt_io_out_hk[31] , \mgmt_io_out_hk[30] , \mgmt_io_out_hk[29] , \mgmt_io_out_hk[28] , \mgmt_io_out_hk[27] , \mgmt_io_out_hk[26] , \mgmt_io_out_hk[25] , \mgmt_io_out_hk[24] , \mgmt_io_out_hk[23] , \mgmt_io_out_hk[22] , \mgmt_io_out_hk[21] , \mgmt_io_out_hk[20] , \mgmt_io_out_hk[19] , \mgmt_io_out_hk[18] , \mgmt_io_out_hk[17] , \mgmt_io_out_hk[16] , \mgmt_io_out_hk[15] , \mgmt_io_out_hk[14] , \mgmt_io_out_hk[13] , \mgmt_io_out_hk[12] , \mgmt_io_out_hk[11] , \mgmt_io_out_hk[10] , \mgmt_io_out_hk[9] , \mgmt_io_out_hk[8] , \mgmt_io_out_hk[7]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  mgmt_core_wrapper soc (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .clk_in(caravel_clk_buf),
+    .clk_out(clk_passthru),
+    .core_clk(caravel_clk_buf),
+    .core_rstn(caravel_rstn_buf),
+    .debug_in(debug_in),
+    .debug_mode(debug_mode),
+    .debug_oeb(debug_oeb),
+    .debug_out(debug_out),
+    .flash_clk(flash_clk_core),
+    .flash_csb(flash_csb_core),
+    .flash_io0_di(flash_io0_di_core),
+    .flash_io0_do(flash_io0_do_core),
+    .flash_io0_oeb(flash_io0_oeb_core),
+    .flash_io1_di(flash_io1_di_core),
+    .flash_io1_do(flash_io1_do_core),
+    .flash_io1_oeb(flash_io1_oeb_core),
+    .flash_io2_di(flash_io2_di_core),
+    .flash_io2_do(flash_io2_do_core),
+    .flash_io2_oeb(flash_io2_oeb_core),
+    .flash_io3_di(flash_io3_di_core),
+    .flash_io3_do(flash_io3_do_core),
+    .flash_io3_oeb(flash_io3_oeb_core),
+    .gpio_in_pad(gpio_in_core),
+    .gpio_inenb_pad(gpio_inenb_core),
+    .gpio_mode0_pad(gpio_mode0_core),
+    .gpio_mode1_pad(gpio_mode1_core),
+    .gpio_out_pad(gpio_out_core),
+    .gpio_outenb_pad(gpio_outenb_core),
+    .hk_ack_i(hk_ack_i),
+    .hk_cyc_o(hk_cyc_o),
+    .hk_dat_i({ \hk_dat_i[31] , \hk_dat_i[30] , \hk_dat_i[29] , \hk_dat_i[28] , \hk_dat_i[27] , \hk_dat_i[26] , \hk_dat_i[25] , \hk_dat_i[24] , \hk_dat_i[23] , \hk_dat_i[22] , \hk_dat_i[21] , \hk_dat_i[20] , \hk_dat_i[19] , \hk_dat_i[18] , \hk_dat_i[17] , \hk_dat_i[16] , \hk_dat_i[15] , \hk_dat_i[14] , \hk_dat_i[13] , \hk_dat_i[12] , \hk_dat_i[11] , \hk_dat_i[10] , \hk_dat_i[9] , \hk_dat_i[8] , \hk_dat_i[7] , \hk_dat_i[6] , \hk_dat_i[5] , \hk_dat_i[4] , \hk_dat_i[3] , \hk_dat_i[2] , \hk_dat_i[1] , \hk_dat_i[0]  }),
+    .hk_stb_o(hk_stb_o),
+    .irq({ \irq_spi[2] , \irq_spi[1] , \irq_spi[0] , \user_irq[2] , \user_irq[1] , \user_irq[0]  }),
+    .la_iena({ \la_iena_mprj[127] , \la_iena_mprj[126] , \la_iena_mprj[125] , \la_iena_mprj[124] , \la_iena_mprj[123] , \la_iena_mprj[122] , \la_iena_mprj[121] , \la_iena_mprj[120] , \la_iena_mprj[119] , \la_iena_mprj[118] , \la_iena_mprj[117] , \la_iena_mprj[116] , \la_iena_mprj[115] , \la_iena_mprj[114] , \la_iena_mprj[113] , \la_iena_mprj[112] , \la_iena_mprj[111] , \la_iena_mprj[110] , \la_iena_mprj[109] , \la_iena_mprj[108] , \la_iena_mprj[107] , \la_iena_mprj[106] , \la_iena_mprj[105] , \la_iena_mprj[104] , \la_iena_mprj[103] , \la_iena_mprj[102] , \la_iena_mprj[101] , \la_iena_mprj[100] , \la_iena_mprj[99] , \la_iena_mprj[98] , \la_iena_mprj[97] , \la_iena_mprj[96] , \la_iena_mprj[95] , \la_iena_mprj[94] , \la_iena_mprj[93] , \la_iena_mprj[92] , \la_iena_mprj[91] , \la_iena_mprj[90] , \la_iena_mprj[89] , \la_iena_mprj[88] , \la_iena_mprj[87] , \la_iena_mprj[86] , \la_iena_mprj[85] , \la_iena_mprj[84] , \la_iena_mprj[83] , \la_iena_mprj[82] , \la_iena_mprj[81] , \la_iena_mprj[80] , \la_iena_mprj[79] , \la_iena_mprj[78] , \la_iena_mprj[77] , \la_iena_mprj[76] , \la_iena_mprj[75] , \la_iena_mprj[74] , \la_iena_mprj[73] , \la_iena_mprj[72] , \la_iena_mprj[71] , \la_iena_mprj[70] , \la_iena_mprj[69] , \la_iena_mprj[68] , \la_iena_mprj[67] , \la_iena_mprj[66] , \la_iena_mprj[65] , \la_iena_mprj[64] , \la_iena_mprj[63] , \la_iena_mprj[62] , \la_iena_mprj[61] , \la_iena_mprj[60] , \la_iena_mprj[59] , \la_iena_mprj[58] , \la_iena_mprj[57] , \la_iena_mprj[56] , \la_iena_mprj[55] , \la_iena_mprj[54] , \la_iena_mprj[53] , \la_iena_mprj[52] , \la_iena_mprj[51] , \la_iena_mprj[50] , \la_iena_mprj[49] , \la_iena_mprj[48] , \la_iena_mprj[47] , \la_iena_mprj[46] , \la_iena_mprj[45] , \la_iena_mprj[44] , \la_iena_mprj[43] , \la_iena_mprj[42] , \la_iena_mprj[41] , \la_iena_mprj[40] , \la_iena_mprj[39] , \la_iena_mprj[38] , \la_iena_mprj[37] , \la_iena_mprj[36] , \la_iena_mprj[35] , \la_iena_mprj[34] , \la_iena_mprj[33] , \la_iena_mprj[32] , \la_iena_mprj[31] , \la_iena_mprj[30] , \la_iena_mprj[29] , \la_iena_mprj[28] , \la_iena_mprj[27] , \la_iena_mprj[26] , \la_iena_mprj[25] , \la_iena_mprj[24] , \la_iena_mprj[23] , \la_iena_mprj[22] , \la_iena_mprj[21] , \la_iena_mprj[20] , \la_iena_mprj[19] , \la_iena_mprj[18] , \la_iena_mprj[17] , \la_iena_mprj[16] , \la_iena_mprj[15] , \la_iena_mprj[14] , \la_iena_mprj[13] , \la_iena_mprj[12] , \la_iena_mprj[11] , \la_iena_mprj[10] , \la_iena_mprj[9] , \la_iena_mprj[8] , \la_iena_mprj[7] , \la_iena_mprj[6] , \la_iena_mprj[5] , \la_iena_mprj[4] , \la_iena_mprj[3] , \la_iena_mprj[2] , \la_iena_mprj[1] , \la_iena_mprj[0]  }),
+    .la_input({ \la_data_in_mprj[127] , \la_data_in_mprj[126] , \la_data_in_mprj[125] , \la_data_in_mprj[124] , \la_data_in_mprj[123] , \la_data_in_mprj[122] , \la_data_in_mprj[121] , \la_data_in_mprj[120] , \la_data_in_mprj[119] , \la_data_in_mprj[118] , \la_data_in_mprj[117] , \la_data_in_mprj[116] , \la_data_in_mprj[115] , \la_data_in_mprj[114] , \la_data_in_mprj[113] , \la_data_in_mprj[112] , \la_data_in_mprj[111] , \la_data_in_mprj[110] , \la_data_in_mprj[109] , \la_data_in_mprj[108] , \la_data_in_mprj[107] , \la_data_in_mprj[106] , \la_data_in_mprj[105] , \la_data_in_mprj[104] , \la_data_in_mprj[103] , \la_data_in_mprj[102] , \la_data_in_mprj[101] , \la_data_in_mprj[100] , \la_data_in_mprj[99] , \la_data_in_mprj[98] , \la_data_in_mprj[97] , \la_data_in_mprj[96] , \la_data_in_mprj[95] , \la_data_in_mprj[94] , \la_data_in_mprj[93] , \la_data_in_mprj[92] , \la_data_in_mprj[91] , \la_data_in_mprj[90] , \la_data_in_mprj[89] , \la_data_in_mprj[88] , \la_data_in_mprj[87] , \la_data_in_mprj[86] , \la_data_in_mprj[85] , \la_data_in_mprj[84] , \la_data_in_mprj[83] , \la_data_in_mprj[82] , \la_data_in_mprj[81] , \la_data_in_mprj[80] , \la_data_in_mprj[79] , \la_data_in_mprj[78] , \la_data_in_mprj[77] , \la_data_in_mprj[76] , \la_data_in_mprj[75] , \la_data_in_mprj[74] , \la_data_in_mprj[73] , \la_data_in_mprj[72] , \la_data_in_mprj[71] , \la_data_in_mprj[70] , \la_data_in_mprj[69] , \la_data_in_mprj[68] , \la_data_in_mprj[67] , \la_data_in_mprj[66] , \la_data_in_mprj[65] , \la_data_in_mprj[64] , \la_data_in_mprj[63] , \la_data_in_mprj[62] , \la_data_in_mprj[61] , \la_data_in_mprj[60] , \la_data_in_mprj[59] , \la_data_in_mprj[58] , \la_data_in_mprj[57] , \la_data_in_mprj[56] , \la_data_in_mprj[55] , \la_data_in_mprj[54] , \la_data_in_mprj[53] , \la_data_in_mprj[52] , \la_data_in_mprj[51] , \la_data_in_mprj[50] , \la_data_in_mprj[49] , \la_data_in_mprj[48] , \la_data_in_mprj[47] , \la_data_in_mprj[46] , \la_data_in_mprj[45] , \la_data_in_mprj[44] , \la_data_in_mprj[43] , \la_data_in_mprj[42] , \la_data_in_mprj[41] , \la_data_in_mprj[40] , \la_data_in_mprj[39] , \la_data_in_mprj[38] , \la_data_in_mprj[37] , \la_data_in_mprj[36] , \la_data_in_mprj[35] , \la_data_in_mprj[34] , \la_data_in_mprj[33] , \la_data_in_mprj[32] , \la_data_in_mprj[31] , \la_data_in_mprj[30] , \la_data_in_mprj[29] , \la_data_in_mprj[28] , \la_data_in_mprj[27] , \la_data_in_mprj[26] , \la_data_in_mprj[25] , \la_data_in_mprj[24] , \la_data_in_mprj[23] , \la_data_in_mprj[22] , \la_data_in_mprj[21] , \la_data_in_mprj[20] , \la_data_in_mprj[19] , \la_data_in_mprj[18] , \la_data_in_mprj[17] , \la_data_in_mprj[16] , \la_data_in_mprj[15] , \la_data_in_mprj[14] , \la_data_in_mprj[13] , \la_data_in_mprj[12] , \la_data_in_mprj[11] , \la_data_in_mprj[10] , \la_data_in_mprj[9] , \la_data_in_mprj[8] , \la_data_in_mprj[7] , \la_data_in_mprj[6] , \la_data_in_mprj[5] , \la_data_in_mprj[4] , \la_data_in_mprj[3] , \la_data_in_mprj[2] , \la_data_in_mprj[1] , \la_data_in_mprj[0]  }),
+    .la_oenb({ \la_oenb_mprj[127] , \la_oenb_mprj[126] , \la_oenb_mprj[125] , \la_oenb_mprj[124] , \la_oenb_mprj[123] , \la_oenb_mprj[122] , \la_oenb_mprj[121] , \la_oenb_mprj[120] , \la_oenb_mprj[119] , \la_oenb_mprj[118] , \la_oenb_mprj[117] , \la_oenb_mprj[116] , \la_oenb_mprj[115] , \la_oenb_mprj[114] , \la_oenb_mprj[113] , \la_oenb_mprj[112] , \la_oenb_mprj[111] , \la_oenb_mprj[110] , \la_oenb_mprj[109] , \la_oenb_mprj[108] , \la_oenb_mprj[107] , \la_oenb_mprj[106] , \la_oenb_mprj[105] , \la_oenb_mprj[104] , \la_oenb_mprj[103] , \la_oenb_mprj[102] , \la_oenb_mprj[101] , \la_oenb_mprj[100] , \la_oenb_mprj[99] , \la_oenb_mprj[98] , \la_oenb_mprj[97] , \la_oenb_mprj[96] , \la_oenb_mprj[95] , \la_oenb_mprj[94] , \la_oenb_mprj[93] , \la_oenb_mprj[92] , \la_oenb_mprj[91] , \la_oenb_mprj[90] , \la_oenb_mprj[89] , \la_oenb_mprj[88] , \la_oenb_mprj[87] , \la_oenb_mprj[86] , \la_oenb_mprj[85] , \la_oenb_mprj[84] , \la_oenb_mprj[83] , \la_oenb_mprj[82] , \la_oenb_mprj[81] , \la_oenb_mprj[80] , \la_oenb_mprj[79] , \la_oenb_mprj[78] , \la_oenb_mprj[77] , \la_oenb_mprj[76] , \la_oenb_mprj[75] , \la_oenb_mprj[74] , \la_oenb_mprj[73] , \la_oenb_mprj[72] , \la_oenb_mprj[71] , \la_oenb_mprj[70] , \la_oenb_mprj[69] , \la_oenb_mprj[68] , \la_oenb_mprj[67] , \la_oenb_mprj[66] , \la_oenb_mprj[65] , \la_oenb_mprj[64] , \la_oenb_mprj[63] , \la_oenb_mprj[62] , \la_oenb_mprj[61] , \la_oenb_mprj[60] , \la_oenb_mprj[59] , \la_oenb_mprj[58] , \la_oenb_mprj[57] , \la_oenb_mprj[56] , \la_oenb_mprj[55] , \la_oenb_mprj[54] , \la_oenb_mprj[53] , \la_oenb_mprj[52] , \la_oenb_mprj[51] , \la_oenb_mprj[50] , \la_oenb_mprj[49] , \la_oenb_mprj[48] , \la_oenb_mprj[47] , \la_oenb_mprj[46] , \la_oenb_mprj[45] , \la_oenb_mprj[44] , \la_oenb_mprj[43] , \la_oenb_mprj[42] , \la_oenb_mprj[41] , \la_oenb_mprj[40] , \la_oenb_mprj[39] , \la_oenb_mprj[38] , \la_oenb_mprj[37] , \la_oenb_mprj[36] , \la_oenb_mprj[35] , \la_oenb_mprj[34] , \la_oenb_mprj[33] , \la_oenb_mprj[32] , \la_oenb_mprj[31] , \la_oenb_mprj[30] , \la_oenb_mprj[29] , \la_oenb_mprj[28] , \la_oenb_mprj[27] , \la_oenb_mprj[26] , \la_oenb_mprj[25] , \la_oenb_mprj[24] , \la_oenb_mprj[23] , \la_oenb_mprj[22] , \la_oenb_mprj[21] , \la_oenb_mprj[20] , \la_oenb_mprj[19] , \la_oenb_mprj[18] , \la_oenb_mprj[17] , \la_oenb_mprj[16] , \la_oenb_mprj[15] , \la_oenb_mprj[14] , \la_oenb_mprj[13] , \la_oenb_mprj[12] , \la_oenb_mprj[11] , \la_oenb_mprj[10] , \la_oenb_mprj[9] , \la_oenb_mprj[8] , \la_oenb_mprj[7] , \la_oenb_mprj[6] , \la_oenb_mprj[5] , \la_oenb_mprj[4] , \la_oenb_mprj[3] , \la_oenb_mprj[2] , \la_oenb_mprj[1] , \la_oenb_mprj[0]  }),
+    .la_output({ \la_data_out_mprj[127] , \la_data_out_mprj[126] , \la_data_out_mprj[125] , \la_data_out_mprj[124] , \la_data_out_mprj[123] , \la_data_out_mprj[122] , \la_data_out_mprj[121] , \la_data_out_mprj[120] , \la_data_out_mprj[119] , \la_data_out_mprj[118] , \la_data_out_mprj[117] , \la_data_out_mprj[116] , \la_data_out_mprj[115] , \la_data_out_mprj[114] , \la_data_out_mprj[113] , \la_data_out_mprj[112] , \la_data_out_mprj[111] , \la_data_out_mprj[110] , \la_data_out_mprj[109] , \la_data_out_mprj[108] , \la_data_out_mprj[107] , \la_data_out_mprj[106] , \la_data_out_mprj[105] , \la_data_out_mprj[104] , \la_data_out_mprj[103] , \la_data_out_mprj[102] , \la_data_out_mprj[101] , \la_data_out_mprj[100] , \la_data_out_mprj[99] , \la_data_out_mprj[98] , \la_data_out_mprj[97] , \la_data_out_mprj[96] , \la_data_out_mprj[95] , \la_data_out_mprj[94] , \la_data_out_mprj[93] , \la_data_out_mprj[92] , \la_data_out_mprj[91] , \la_data_out_mprj[90] , \la_data_out_mprj[89] , \la_data_out_mprj[88] , \la_data_out_mprj[87] , \la_data_out_mprj[86] , \la_data_out_mprj[85] , \la_data_out_mprj[84] , \la_data_out_mprj[83] , \la_data_out_mprj[82] , \la_data_out_mprj[81] , \la_data_out_mprj[80] , \la_data_out_mprj[79] , \la_data_out_mprj[78] , \la_data_out_mprj[77] , \la_data_out_mprj[76] , \la_data_out_mprj[75] , \la_data_out_mprj[74] , \la_data_out_mprj[73] , \la_data_out_mprj[72] , \la_data_out_mprj[71] , \la_data_out_mprj[70] , \la_data_out_mprj[69] , \la_data_out_mprj[68] , \la_data_out_mprj[67] , \la_data_out_mprj[66] , \la_data_out_mprj[65] , \la_data_out_mprj[64] , \la_data_out_mprj[63] , \la_data_out_mprj[62] , \la_data_out_mprj[61] , \la_data_out_mprj[60] , \la_data_out_mprj[59] , \la_data_out_mprj[58] , \la_data_out_mprj[57] , \la_data_out_mprj[56] , \la_data_out_mprj[55] , \la_data_out_mprj[54] , \la_data_out_mprj[53] , \la_data_out_mprj[52] , \la_data_out_mprj[51] , \la_data_out_mprj[50] , \la_data_out_mprj[49] , \la_data_out_mprj[48] , \la_data_out_mprj[47] , \la_data_out_mprj[46] , \la_data_out_mprj[45] , \la_data_out_mprj[44] , \la_data_out_mprj[43] , \la_data_out_mprj[42] , \la_data_out_mprj[41] , \la_data_out_mprj[40] , \la_data_out_mprj[39] , \la_data_out_mprj[38] , \la_data_out_mprj[37] , \la_data_out_mprj[36] , \la_data_out_mprj[35] , \la_data_out_mprj[34] , \la_data_out_mprj[33] , \la_data_out_mprj[32] , \la_data_out_mprj[31] , \la_data_out_mprj[30] , \la_data_out_mprj[29] , \la_data_out_mprj[28] , \la_data_out_mprj[27] , \la_data_out_mprj[26] , \la_data_out_mprj[25] , \la_data_out_mprj[24] , \la_data_out_mprj[23] , \la_data_out_mprj[22] , \la_data_out_mprj[21] , \la_data_out_mprj[20] , \la_data_out_mprj[19] , \la_data_out_mprj[18] , \la_data_out_mprj[17] , \la_data_out_mprj[16] , \la_data_out_mprj[15] , \la_data_out_mprj[14] , \la_data_out_mprj[13] , \la_data_out_mprj[12] , \la_data_out_mprj[11] , \la_data_out_mprj[10] , \la_data_out_mprj[9] , \la_data_out_mprj[8] , \la_data_out_mprj[7] , \la_data_out_mprj[6] , \la_data_out_mprj[5] , \la_data_out_mprj[4] , \la_data_out_mprj[3] , \la_data_out_mprj[2] , \la_data_out_mprj[1] , \la_data_out_mprj[0]  }),
+    .mprj_ack_i(mprj_ack_i_core),
+    .mprj_adr_o({ \mprj_adr_o_core[31] , \mprj_adr_o_core[30] , \mprj_adr_o_core[29] , \mprj_adr_o_core[28] , \mprj_adr_o_core[27] , \mprj_adr_o_core[26] , \mprj_adr_o_core[25] , \mprj_adr_o_core[24] , \mprj_adr_o_core[23] , \mprj_adr_o_core[22] , \mprj_adr_o_core[21] , \mprj_adr_o_core[20] , \mprj_adr_o_core[19] , \mprj_adr_o_core[18] , \mprj_adr_o_core[17] , \mprj_adr_o_core[16] , \mprj_adr_o_core[15] , \mprj_adr_o_core[14] , \mprj_adr_o_core[13] , \mprj_adr_o_core[12] , \mprj_adr_o_core[11] , \mprj_adr_o_core[10] , \mprj_adr_o_core[9] , \mprj_adr_o_core[8] , \mprj_adr_o_core[7] , \mprj_adr_o_core[6] , \mprj_adr_o_core[5] , \mprj_adr_o_core[4] , \mprj_adr_o_core[3] , \mprj_adr_o_core[2] , \mprj_adr_o_core[1] , \mprj_adr_o_core[0]  }),
+    .mprj_cyc_o(mprj_cyc_o_core),
+    .mprj_dat_i({ \mprj_dat_i_core[31] , \mprj_dat_i_core[30] , \mprj_dat_i_core[29] , \mprj_dat_i_core[28] , \mprj_dat_i_core[27] , \mprj_dat_i_core[26] , \mprj_dat_i_core[25] , \mprj_dat_i_core[24] , \mprj_dat_i_core[23] , \mprj_dat_i_core[22] , \mprj_dat_i_core[21] , \mprj_dat_i_core[20] , \mprj_dat_i_core[19] , \mprj_dat_i_core[18] , \mprj_dat_i_core[17] , \mprj_dat_i_core[16] , \mprj_dat_i_core[15] , \mprj_dat_i_core[14] , \mprj_dat_i_core[13] , \mprj_dat_i_core[12] , \mprj_dat_i_core[11] , \mprj_dat_i_core[10] , \mprj_dat_i_core[9] , \mprj_dat_i_core[8] , \mprj_dat_i_core[7] , \mprj_dat_i_core[6] , \mprj_dat_i_core[5] , \mprj_dat_i_core[4] , \mprj_dat_i_core[3] , \mprj_dat_i_core[2] , \mprj_dat_i_core[1] , \mprj_dat_i_core[0]  }),
+    .mprj_dat_o({ \mprj_dat_o_core[31] , \mprj_dat_o_core[30] , \mprj_dat_o_core[29] , \mprj_dat_o_core[28] , \mprj_dat_o_core[27] , \mprj_dat_o_core[26] , \mprj_dat_o_core[25] , \mprj_dat_o_core[24] , \mprj_dat_o_core[23] , \mprj_dat_o_core[22] , \mprj_dat_o_core[21] , \mprj_dat_o_core[20] , \mprj_dat_o_core[19] , \mprj_dat_o_core[18] , \mprj_dat_o_core[17] , \mprj_dat_o_core[16] , \mprj_dat_o_core[15] , \mprj_dat_o_core[14] , \mprj_dat_o_core[13] , \mprj_dat_o_core[12] , \mprj_dat_o_core[11] , \mprj_dat_o_core[10] , \mprj_dat_o_core[9] , \mprj_dat_o_core[8] , \mprj_dat_o_core[7] , \mprj_dat_o_core[6] , \mprj_dat_o_core[5] , \mprj_dat_o_core[4] , \mprj_dat_o_core[3] , \mprj_dat_o_core[2] , \mprj_dat_o_core[1] , \mprj_dat_o_core[0]  }),
+    .mprj_sel_o({ \mprj_sel_o_core[3] , \mprj_sel_o_core[2] , \mprj_sel_o_core[1] , \mprj_sel_o_core[0]  }),
+    .mprj_stb_o(mprj_stb_o_core),
+    .mprj_wb_iena(mprj_iena_wb),
+    .mprj_we_o(mprj_we_o_core),
+    .por_l_in(por_l),
+    .por_l_out(por_l_buf),
+    .porb_h_in(por_l),
+    .porb_h_out(porb_h_out_nc),
+    .qspi_enabled(qspi_enabled),
+    .resetn_in(caravel_rstn_buf),
+    .resetn_out(resetn_passthru),
+    .rstb_l_in(rstb_l),
+    .rstb_l_out(rstb_l_buf),
+    .ser_rx(ser_rx),
+    .ser_tx(ser_tx),
+    .serial_clock_in(\gpio_clock_1_shifted[0] ),
+    .serial_clock_out(\gpio_clock_2_shifted[18] ),
+    .serial_data_2_in(mprj_io_loader_data_2),
+    .serial_data_2_out(\gpio_serial_link_2_shifted[18] ),
+    .serial_load_in(\gpio_load_1_shifted[0] ),
+    .serial_load_out(\gpio_load_2_shifted[18] ),
+    .serial_resetn_in(\gpio_resetn_1_shifted[0] ),
+    .serial_resetn_out(\gpio_resetn_2_shifted[18] ),
+    .spi_csb(spi_csb),
+    .spi_enabled(spi_enabled),
+    .spi_sck(spi_sck),
+    .spi_sdi(spi_sdi),
+    .spi_sdo(spi_sdo),
+    .spi_sdoenb(spi_sdoenb),
+    .trap(trap),
+    .uart_enabled(uart_enabled),
+    .user_irq_ena({ \user_irq_ena[2] , \user_irq_ena[1] , \user_irq_ena[0]  })
+  );
+  spare_logic_block \spare_logic[0]  (
+    .spare_xfq({ \spare_xfq_nc[1] , \spare_xfq_nc[0]  }),
+    .spare_xfqn({ \spare_xfqn_nc[1] , \spare_xfqn_nc[0]  }),
+    .spare_xi({ \spare_xi_nc[3] , \spare_xi_nc[2] , \spare_xi_nc[1] , \spare_xi_nc[0]  }),
+    .spare_xib(\spare_xib_nc[0] ),
+    .spare_xmx({ \spare_xmx_nc[1] , \spare_xmx_nc[0]  }),
+    .spare_xna({ \spare_xna_nc[1] , \spare_xna_nc[0]  }),
+    .spare_xno({ \spare_xno_nc[1] , \spare_xno_nc[0]  }),
+    .spare_xz({ \spare_xz_nc[26] , \spare_xz_nc[25] , \spare_xz_nc[24] , \spare_xz_nc[23] , \spare_xz_nc[22] , \spare_xz_nc[21] , \spare_xz_nc[20] , \spare_xz_nc[19] , \spare_xz_nc[18] , \spare_xz_nc[17] , \spare_xz_nc[16] , \spare_xz_nc[15] , \spare_xz_nc[14] , \spare_xz_nc[13] , \spare_xz_nc[12] , \spare_xz_nc[11] , \spare_xz_nc[10] , \spare_xz_nc[9] , \spare_xz_nc[8] , \spare_xz_nc[7] , \spare_xz_nc[6] , \spare_xz_nc[5] , \spare_xz_nc[4] , \spare_xz_nc[3] , \spare_xz_nc[2] , \spare_xz_nc[1] , \spare_xz_nc[0]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[1]  (
+    .spare_xfq({ \spare_xfq_nc[3] , \spare_xfq_nc[2]  }),
+    .spare_xfqn({ \spare_xfqn_nc[3] , \spare_xfqn_nc[2]  }),
+    .spare_xi({ \spare_xi_nc[7] , \spare_xi_nc[6] , \spare_xi_nc[5] , \spare_xi_nc[4]  }),
+    .spare_xib(\spare_xib_nc[1] ),
+    .spare_xmx({ \spare_xmx_nc[3] , \spare_xmx_nc[2]  }),
+    .spare_xna({ \spare_xna_nc[3] , \spare_xna_nc[2]  }),
+    .spare_xno({ \spare_xno_nc[3] , \spare_xno_nc[2]  }),
+    .spare_xz({ \spare_xz_nc[53] , \spare_xz_nc[52] , \spare_xz_nc[51] , \spare_xz_nc[50] , \spare_xz_nc[49] , \spare_xz_nc[48] , \spare_xz_nc[47] , \spare_xz_nc[46] , \spare_xz_nc[45] , \spare_xz_nc[44] , \spare_xz_nc[43] , \spare_xz_nc[42] , \spare_xz_nc[41] , \spare_xz_nc[40] , \spare_xz_nc[39] , \spare_xz_nc[38] , \spare_xz_nc[37] , \spare_xz_nc[36] , \spare_xz_nc[35] , \spare_xz_nc[34] , \spare_xz_nc[33] , \spare_xz_nc[32] , \spare_xz_nc[31] , \spare_xz_nc[30] , \spare_xz_nc[29] , \spare_xz_nc[28] , \spare_xz_nc[27]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[2]  (
+    .spare_xfq({ \spare_xfq_nc[5] , \spare_xfq_nc[4]  }),
+    .spare_xfqn({ \spare_xfqn_nc[5] , \spare_xfqn_nc[4]  }),
+    .spare_xi({ \spare_xi_nc[11] , \spare_xi_nc[10] , \spare_xi_nc[9] , \spare_xi_nc[8]  }),
+    .spare_xib(\spare_xib_nc[2] ),
+    .spare_xmx({ \spare_xmx_nc[5] , \spare_xmx_nc[4]  }),
+    .spare_xna({ \spare_xna_nc[5] , \spare_xna_nc[4]  }),
+    .spare_xno({ \spare_xno_nc[5] , \spare_xno_nc[4]  }),
+    .spare_xz({ \spare_xz_nc[80] , \spare_xz_nc[79] , \spare_xz_nc[78] , \spare_xz_nc[77] , \spare_xz_nc[76] , \spare_xz_nc[75] , \spare_xz_nc[74] , \spare_xz_nc[73] , \spare_xz_nc[72] , \spare_xz_nc[71] , \spare_xz_nc[70] , \spare_xz_nc[69] , \spare_xz_nc[68] , \spare_xz_nc[67] , \spare_xz_nc[66] , \spare_xz_nc[65] , \spare_xz_nc[64] , \spare_xz_nc[63] , \spare_xz_nc[62] , \spare_xz_nc[61] , \spare_xz_nc[60] , \spare_xz_nc[59] , \spare_xz_nc[58] , \spare_xz_nc[57] , \spare_xz_nc[56] , \spare_xz_nc[55] , \spare_xz_nc[54]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  spare_logic_block \spare_logic[3]  (
+    .spare_xfq({ \spare_xfq_nc[7] , \spare_xfq_nc[6]  }),
+    .spare_xfqn({ \spare_xfqn_nc[7] , \spare_xfqn_nc[6]  }),
+    .spare_xi({ \spare_xi_nc[15] , \spare_xi_nc[14] , \spare_xi_nc[13] , \spare_xi_nc[12]  }),
+    .spare_xib(\spare_xib_nc[3] ),
+    .spare_xmx({ \spare_xmx_nc[7] , \spare_xmx_nc[6]  }),
+    .spare_xna({ \spare_xna_nc[7] , \spare_xna_nc[6]  }),
+    .spare_xno({ \spare_xno_nc[7] , \spare_xno_nc[6]  }),
+    .spare_xz({ \spare_xz_nc[107] , \spare_xz_nc[106] , \spare_xz_nc[105] , \spare_xz_nc[104] , \spare_xz_nc[103] , \spare_xz_nc[102] , \spare_xz_nc[101] , \spare_xz_nc[100] , \spare_xz_nc[99] , \spare_xz_nc[98] , \spare_xz_nc[97] , \spare_xz_nc[96] , \spare_xz_nc[95] , \spare_xz_nc[94] , \spare_xz_nc[93] , \spare_xz_nc[92] , \spare_xz_nc[91] , \spare_xz_nc[90] , \spare_xz_nc[89] , \spare_xz_nc[88] , \spare_xz_nc[87] , \spare_xz_nc[86] , \spare_xz_nc[85] , \spare_xz_nc[84] , \spare_xz_nc[83] , \spare_xz_nc[82] , \spare_xz_nc[81]  }),
+    .vccd(vccd_core),
+    .vssd(vssd_core)
+  );
+  user_id_programming user_id_value (
+    .VGND(vssd_core),
+    .VPWR(vccd_core),
+    .mask_rev({ \mask_rev[31] , \mask_rev[30] , \mask_rev[29] , \mask_rev[28] , \mask_rev[27] , \mask_rev[26] , \mask_rev[25] , \mask_rev[24] , \mask_rev[23] , \mask_rev[22] , \mask_rev[21] , \mask_rev[20] , \mask_rev[19] , \mask_rev[18] , \mask_rev[17] , \mask_rev[16] , \mask_rev[15] , \mask_rev[14] , \mask_rev[13] , \mask_rev[12] , \mask_rev[11] , \mask_rev[10] , \mask_rev[9] , \mask_rev[8] , \mask_rev[7] , \mask_rev[6] , \mask_rev[5] , \mask_rev[4] , \mask_rev[3] , \mask_rev[2] , \mask_rev[1] , \mask_rev[0]  })
+  );
+  assign \gpio_serial_link_1_shifted[18]  = \gpio_serial_link_1[17] ;
+  assign \gpio_serial_link_1_shifted[17]  = \gpio_serial_link_1[16] ;
+  assign \gpio_serial_link_1_shifted[16]  = \gpio_serial_link_1[15] ;
+  assign \gpio_serial_link_1_shifted[15]  = \gpio_serial_link_1[14] ;
+  assign \gpio_serial_link_1_shifted[14]  = \gpio_serial_link_1[13] ;
+  assign \gpio_serial_link_1_shifted[13]  = \gpio_serial_link_1[12] ;
+  assign \gpio_serial_link_1_shifted[12]  = \gpio_serial_link_1[11] ;
+  assign \gpio_serial_link_1_shifted[11]  = \gpio_serial_link_1[10] ;
+  assign \gpio_serial_link_1_shifted[10]  = \gpio_serial_link_1[9] ;
+  assign \gpio_serial_link_1_shifted[9]  = \gpio_serial_link_1[8] ;
+  assign \gpio_serial_link_1_shifted[8]  = \gpio_serial_link_1[7] ;
+  assign \gpio_serial_link_1_shifted[7]  = \gpio_serial_link_1[6] ;
+  assign \gpio_serial_link_1_shifted[6]  = \gpio_serial_link_1[5] ;
+  assign \gpio_serial_link_1_shifted[5]  = \gpio_serial_link_1[4] ;
+  assign \gpio_serial_link_1_shifted[4]  = \gpio_serial_link_1[3] ;
+  assign \gpio_serial_link_1_shifted[3]  = \gpio_serial_link_1[2] ;
+  assign \gpio_serial_link_1_shifted[2]  = \gpio_serial_link_1[1] ;
+  assign \gpio_serial_link_1_shifted[1]  = \gpio_serial_link_1[0] ;
+  assign \gpio_load_2_shifted[17]  = \gpio_load_2[18] ;
+  assign \gpio_load_2_shifted[16]  = \gpio_load_2[17] ;
+  assign \gpio_load_2_shifted[15]  = \gpio_load_2[16] ;
+  assign \gpio_load_2_shifted[14]  = \gpio_load_2[15] ;
+  assign \gpio_load_2_shifted[13]  = \gpio_load_2[14] ;
+  assign \gpio_load_2_shifted[12]  = \gpio_load_2[13] ;
+  assign \gpio_load_2_shifted[11]  = \gpio_load_2[12] ;
+  assign \gpio_load_2_shifted[10]  = \gpio_load_2[11] ;
+  assign \gpio_load_2_shifted[9]  = \gpio_load_2[10] ;
+  assign \gpio_load_2_shifted[8]  = \gpio_load_2[9] ;
+  assign \gpio_load_2_shifted[7]  = \gpio_load_2[8] ;
+  assign \gpio_load_2_shifted[6]  = \gpio_load_2[7] ;
+  assign \gpio_load_2_shifted[5]  = \gpio_load_2[6] ;
+  assign \gpio_load_2_shifted[4]  = \gpio_load_2[5] ;
+  assign \gpio_load_2_shifted[3]  = \gpio_load_2[4] ;
+  assign \gpio_load_2_shifted[2]  = \gpio_load_2[3] ;
+  assign \gpio_load_2_shifted[1]  = \gpio_load_2[2] ;
+  assign \gpio_load_2_shifted[0]  = \gpio_load_2[1] ;
+  assign \gpio_clock_1_shifted[18]  = \gpio_clock_1[17] ;
+  assign \gpio_clock_1_shifted[17]  = \gpio_clock_1[16] ;
+  assign \gpio_clock_1_shifted[16]  = \gpio_clock_1[15] ;
+  assign \gpio_clock_1_shifted[15]  = \gpio_clock_1[14] ;
+  assign \gpio_clock_1_shifted[14]  = \gpio_clock_1[13] ;
+  assign \gpio_clock_1_shifted[13]  = \gpio_clock_1[12] ;
+  assign \gpio_clock_1_shifted[12]  = \gpio_clock_1[11] ;
+  assign \gpio_clock_1_shifted[11]  = \gpio_clock_1[10] ;
+  assign \gpio_clock_1_shifted[10]  = \gpio_clock_1[9] ;
+  assign \gpio_clock_1_shifted[9]  = \gpio_clock_1[8] ;
+  assign \gpio_clock_1_shifted[8]  = \gpio_clock_1[7] ;
+  assign \gpio_clock_1_shifted[7]  = \gpio_clock_1[6] ;
+  assign \gpio_clock_1_shifted[6]  = \gpio_clock_1[5] ;
+  assign \gpio_clock_1_shifted[5]  = \gpio_clock_1[4] ;
+  assign \gpio_clock_1_shifted[4]  = \gpio_clock_1[3] ;
+  assign \gpio_clock_1_shifted[3]  = \gpio_clock_1[2] ;
+  assign \gpio_clock_1_shifted[2]  = \gpio_clock_1[1] ;
+  assign \gpio_clock_1_shifted[1]  = \gpio_clock_1[0] ;
+  assign \gpio_resetn_1_shifted[18]  = \gpio_resetn_1[17] ;
+  assign \gpio_resetn_1_shifted[17]  = \gpio_resetn_1[16] ;
+  assign \gpio_resetn_1_shifted[16]  = \gpio_resetn_1[15] ;
+  assign \gpio_resetn_1_shifted[15]  = \gpio_resetn_1[14] ;
+  assign \gpio_resetn_1_shifted[14]  = \gpio_resetn_1[13] ;
+  assign \gpio_resetn_1_shifted[13]  = \gpio_resetn_1[12] ;
+  assign \gpio_resetn_1_shifted[12]  = \gpio_resetn_1[11] ;
+  assign \gpio_resetn_1_shifted[11]  = \gpio_resetn_1[10] ;
+  assign \gpio_resetn_1_shifted[10]  = \gpio_resetn_1[9] ;
+  assign \gpio_resetn_1_shifted[9]  = \gpio_resetn_1[8] ;
+  assign \gpio_resetn_1_shifted[8]  = \gpio_resetn_1[7] ;
+  assign \gpio_resetn_1_shifted[7]  = \gpio_resetn_1[6] ;
+  assign \gpio_resetn_1_shifted[6]  = \gpio_resetn_1[5] ;
+  assign \gpio_resetn_1_shifted[5]  = \gpio_resetn_1[4] ;
+  assign \gpio_resetn_1_shifted[4]  = \gpio_resetn_1[3] ;
+  assign \gpio_resetn_1_shifted[3]  = \gpio_resetn_1[2] ;
+  assign \gpio_resetn_1_shifted[2]  = \gpio_resetn_1[1] ;
+  assign \gpio_resetn_1_shifted[1]  = \gpio_resetn_1[0] ;
+  assign \gpio_clock_2_shifted[17]  = \gpio_clock_2[18] ;
+  assign \gpio_clock_2_shifted[16]  = \gpio_clock_2[17] ;
+  assign \gpio_clock_2_shifted[15]  = \gpio_clock_2[16] ;
+  assign \gpio_clock_2_shifted[14]  = \gpio_clock_2[15] ;
+  assign \gpio_clock_2_shifted[13]  = \gpio_clock_2[14] ;
+  assign \gpio_clock_2_shifted[12]  = \gpio_clock_2[13] ;
+  assign \gpio_clock_2_shifted[11]  = \gpio_clock_2[12] ;
+  assign \gpio_clock_2_shifted[10]  = \gpio_clock_2[11] ;
+  assign \gpio_clock_2_shifted[9]  = \gpio_clock_2[10] ;
+  assign \gpio_clock_2_shifted[8]  = \gpio_clock_2[9] ;
+  assign \gpio_clock_2_shifted[7]  = \gpio_clock_2[8] ;
+  assign \gpio_clock_2_shifted[6]  = \gpio_clock_2[7] ;
+  assign \gpio_clock_2_shifted[5]  = \gpio_clock_2[6] ;
+  assign \gpio_clock_2_shifted[4]  = \gpio_clock_2[5] ;
+  assign \gpio_clock_2_shifted[3]  = \gpio_clock_2[4] ;
+  assign \gpio_clock_2_shifted[2]  = \gpio_clock_2[3] ;
+  assign \gpio_clock_2_shifted[1]  = \gpio_clock_2[2] ;
+  assign \gpio_clock_2_shifted[0]  = \gpio_clock_2[1] ;
+  assign \gpio_load_1_shifted[18]  = \gpio_load_1[17] ;
+  assign \gpio_load_1_shifted[17]  = \gpio_load_1[16] ;
+  assign \gpio_load_1_shifted[16]  = \gpio_load_1[15] ;
+  assign \gpio_load_1_shifted[15]  = \gpio_load_1[14] ;
+  assign \gpio_load_1_shifted[14]  = \gpio_load_1[13] ;
+  assign \gpio_load_1_shifted[13]  = \gpio_load_1[12] ;
+  assign \gpio_load_1_shifted[12]  = \gpio_load_1[11] ;
+  assign \gpio_load_1_shifted[11]  = \gpio_load_1[10] ;
+  assign \gpio_load_1_shifted[10]  = \gpio_load_1[9] ;
+  assign \gpio_load_1_shifted[9]  = \gpio_load_1[8] ;
+  assign \gpio_load_1_shifted[8]  = \gpio_load_1[7] ;
+  assign \gpio_load_1_shifted[7]  = \gpio_load_1[6] ;
+  assign \gpio_load_1_shifted[6]  = \gpio_load_1[5] ;
+  assign \gpio_load_1_shifted[5]  = \gpio_load_1[4] ;
+  assign \gpio_load_1_shifted[4]  = \gpio_load_1[3] ;
+  assign \gpio_load_1_shifted[3]  = \gpio_load_1[2] ;
+  assign \gpio_load_1_shifted[2]  = \gpio_load_1[1] ;
+  assign \gpio_load_1_shifted[1]  = \gpio_load_1[0] ;
+  assign \gpio_serial_link_2_shifted[17]  = \gpio_serial_link_2[18] ;
+  assign \gpio_serial_link_2_shifted[16]  = \gpio_serial_link_2[17] ;
+  assign \gpio_serial_link_2_shifted[15]  = \gpio_serial_link_2[16] ;
+  assign \gpio_serial_link_2_shifted[14]  = \gpio_serial_link_2[15] ;
+  assign \gpio_serial_link_2_shifted[13]  = \gpio_serial_link_2[14] ;
+  assign \gpio_serial_link_2_shifted[12]  = \gpio_serial_link_2[13] ;
+  assign \gpio_serial_link_2_shifted[11]  = \gpio_serial_link_2[12] ;
+  assign \gpio_serial_link_2_shifted[10]  = \gpio_serial_link_2[11] ;
+  assign \gpio_serial_link_2_shifted[9]  = \gpio_serial_link_2[10] ;
+  assign \gpio_serial_link_2_shifted[8]  = \gpio_serial_link_2[9] ;
+  assign \gpio_serial_link_2_shifted[7]  = \gpio_serial_link_2[8] ;
+  assign \gpio_serial_link_2_shifted[6]  = \gpio_serial_link_2[7] ;
+  assign \gpio_serial_link_2_shifted[5]  = \gpio_serial_link_2[6] ;
+  assign \gpio_serial_link_2_shifted[4]  = \gpio_serial_link_2[5] ;
+  assign \gpio_serial_link_2_shifted[3]  = \gpio_serial_link_2[4] ;
+  assign \gpio_serial_link_2_shifted[2]  = \gpio_serial_link_2[3] ;
+  assign \gpio_serial_link_2_shifted[1]  = \gpio_serial_link_2[2] ;
+  assign \gpio_serial_link_2_shifted[0]  = \gpio_serial_link_2[1] ;
+  assign \gpio_resetn_2_shifted[17]  = \gpio_resetn_2[18] ;
+  assign \gpio_resetn_2_shifted[16]  = \gpio_resetn_2[17] ;
+  assign \gpio_resetn_2_shifted[15]  = \gpio_resetn_2[16] ;
+  assign \gpio_resetn_2_shifted[14]  = \gpio_resetn_2[15] ;
+  assign \gpio_resetn_2_shifted[13]  = \gpio_resetn_2[14] ;
+  assign \gpio_resetn_2_shifted[12]  = \gpio_resetn_2[13] ;
+  assign \gpio_resetn_2_shifted[11]  = \gpio_resetn_2[12] ;
+  assign \gpio_resetn_2_shifted[10]  = \gpio_resetn_2[11] ;
+  assign \gpio_resetn_2_shifted[9]  = \gpio_resetn_2[10] ;
+  assign \gpio_resetn_2_shifted[8]  = \gpio_resetn_2[9] ;
+  assign \gpio_resetn_2_shifted[7]  = \gpio_resetn_2[8] ;
+  assign \gpio_resetn_2_shifted[6]  = \gpio_resetn_2[7] ;
+  assign \gpio_resetn_2_shifted[5]  = \gpio_resetn_2[6] ;
+  assign \gpio_resetn_2_shifted[4]  = \gpio_resetn_2[5] ;
+  assign \gpio_resetn_2_shifted[3]  = \gpio_resetn_2[4] ;
+  assign \gpio_resetn_2_shifted[2]  = \gpio_resetn_2[3] ;
+  assign \gpio_resetn_2_shifted[1]  = \gpio_resetn_2[2] ;
+  assign \gpio_resetn_2_shifted[0]  = \gpio_resetn_2[1] ;
+  assign \mgmt_io_in_hk[6]  = \mgmt_io_in[6] ;
+  assign \mgmt_io_in_hk[5]  = \mgmt_io_in[5] ;
+  assign \mgmt_io_in_hk[4]  = \mgmt_io_in[4] ;
+  assign \mgmt_io_in_hk[3]  = \mgmt_io_in[3] ;
+  assign \mgmt_io_in_hk[2]  = \mgmt_io_in[2] ;
+  assign \mgmt_io_in_hk[1]  = \mgmt_io_in[1] ;
+  assign \mgmt_io_in_hk[0]  = \mgmt_io_in[0] ;
+  assign \mgmt_io_out_hk[6]  = \mgmt_io_out[6] ;
+  assign \mgmt_io_out_hk[5]  = \mgmt_io_out[5] ;
+  assign \mgmt_io_out_hk[4]  = \mgmt_io_out[4] ;
+  assign \mgmt_io_out_hk[3]  = \mgmt_io_out[3] ;
+  assign \mgmt_io_out_hk[2]  = \mgmt_io_out[2] ;
+  assign \mgmt_io_out_hk[1]  = \mgmt_io_out[1] ;
+  assign \mgmt_io_out_hk[0]  = \mgmt_io_out[0] ;
+  assign \mgmt_io_oeb_hk[34]  = \mgmt_io_oeb[34] ;
+  assign \mgmt_io_oeb_hk[33]  = \mgmt_io_oeb[33] ;
+  assign \mgmt_io_oeb_hk[32]  = \mgmt_io_oeb[32] ;
+  assign \mgmt_io_oeb_hk[31]  = \mgmt_io_oeb[31] ;
+  assign \mgmt_io_oeb_hk[30]  = \mgmt_io_oeb[30] ;
+  assign \mgmt_io_oeb_hk[29]  = \mgmt_io_oeb[29] ;
+  assign \mgmt_io_oeb_hk[28]  = \mgmt_io_oeb[28] ;
+  assign \mgmt_io_oeb_hk[27]  = \mgmt_io_oeb[27] ;
+  assign \mgmt_io_oeb_hk[26]  = \mgmt_io_oeb[26] ;
+  assign \mgmt_io_oeb_hk[25]  = \mgmt_io_oeb[25] ;
+  assign \mgmt_io_oeb_hk[24]  = \mgmt_io_oeb[24] ;
+  assign \mgmt_io_oeb_hk[23]  = \mgmt_io_oeb[23] ;
+  assign \mgmt_io_oeb_hk[22]  = \mgmt_io_oeb[22] ;
+  assign \mgmt_io_oeb_hk[21]  = \mgmt_io_oeb[21] ;
+  assign \mgmt_io_oeb_hk[20]  = \mgmt_io_oeb[20] ;
+  assign \mgmt_io_oeb_hk[19]  = \mgmt_io_oeb[19] ;
+  assign \mgmt_io_oeb_hk[18]  = \mgmt_io_oeb[18] ;
+  assign \mgmt_io_oeb_hk[17]  = \mgmt_io_oeb[17] ;
+  assign \mgmt_io_oeb_hk[16]  = \mgmt_io_oeb[16] ;
+  assign \mgmt_io_oeb_hk[15]  = \mgmt_io_oeb[15] ;
+  assign \mgmt_io_oeb_hk[14]  = \mgmt_io_oeb[14] ;
+  assign \mgmt_io_oeb_hk[13]  = \mgmt_io_oeb[13] ;
+  assign \mgmt_io_oeb_hk[12]  = \mgmt_io_oeb[12] ;
+  assign \mgmt_io_oeb_hk[11]  = \mgmt_io_oeb[11] ;
+  assign \mgmt_io_oeb_hk[10]  = \mgmt_io_oeb[10] ;
+  assign \mgmt_io_oeb_hk[9]  = \mgmt_io_oeb[9] ;
+  assign \mgmt_io_oeb_hk[8]  = \mgmt_io_oeb[8] ;
+  assign \mgmt_io_oeb_hk[7]  = \mgmt_io_oeb[7] ;
+  assign \mgmt_io_oeb_hk[6]  = \mgmt_io_oeb[6] ;
+  assign \mgmt_io_oeb_hk[5]  = \mgmt_io_oeb[5] ;
+  assign \mgmt_io_oeb_hk[4]  = \mgmt_io_oeb[4] ;
+  assign \mgmt_io_oeb_hk[3]  = \mgmt_io_oeb[3] ;
+  assign \mgmt_io_oeb_hk[2]  = \mgmt_io_oeb[2] ;
+  assign \mgmt_io_oeb_hk[1]  = \mgmt_io_oeb[1] ;
+  assign \mgmt_io_oeb_hk[0]  = \mgmt_io_oeb[0] ;
+  assign mprj_io_loader_data_2_buf = \gpio_serial_link_2_shifted[18] ;
+  assign mprj_io_loader_resetn_buf = \gpio_resetn_2_shifted[18] ;
+  assign mprj_io_loader_strobe_buf = \gpio_load_2_shifted[18] ;
+  assign mprj_io_loader_clock_buf = \gpio_clock_2_shifted[18] ;
+  assign mprj_io_loader_data_1 = \gpio_serial_link_1_shifted[0] ;
+  assign mprj_io_loader_strobe = \gpio_load_1_shifted[0] ;
+  assign mprj_io_loader_clock = \gpio_clock_1_shifted[0] ;
+  assign mprj_io_loader_resetn = \gpio_resetn_1_shifted[0] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v
new file mode 100644
index 0000000..33fbfde
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_0403.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_0403 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_high[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_high[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_low[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_low[12] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v
new file mode 100644
index 0000000..379ba1c
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_0801.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_0801 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_low[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_low[12] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v b/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v
new file mode 100644
index 0000000..13ad29a
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/gpio_defaults_block_1803.v
@@ -0,0 +1,260 @@
+module gpio_defaults_block_1803 (VGND,
+    VPWR,
+    gpio_defaults);
+ input VGND;
+ input VPWR;
+ output [12:0] gpio_defaults;
+
+ wire \gpio_defaults_low[0] ;
+ wire \gpio_defaults_high[10] ;
+ wire \gpio_defaults_low[11] ;
+ wire \gpio_defaults_low[12] ;
+ wire \gpio_defaults_high[1] ;
+ wire \gpio_defaults_low[2] ;
+ wire \gpio_defaults_low[3] ;
+ wire \gpio_defaults_low[4] ;
+ wire \gpio_defaults_low[5] ;
+ wire \gpio_defaults_low[6] ;
+ wire \gpio_defaults_low[7] ;
+ wire \gpio_defaults_low[8] ;
+ wire \gpio_defaults_low[9] ;
+ wire \gpio_defaults_high[0] ;
+ wire \gpio_defaults_high[11] ;
+ wire \gpio_defaults_high[12] ;
+ wire \gpio_defaults_high[2] ;
+ wire \gpio_defaults_high[3] ;
+ wire \gpio_defaults_high[4] ;
+ wire \gpio_defaults_high[5] ;
+ wire \gpio_defaults_high[6] ;
+ wire \gpio_defaults_high[7] ;
+ wire \gpio_defaults_high[8] ;
+ wire \gpio_defaults_high[9] ;
+ wire \gpio_defaults_low[10] ;
+ wire \gpio_defaults_low[1] ;
+
+ sky130_fd_sc_hd__fill_1 FILLER_0_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_6 FILLER_0_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_33 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_38 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_43 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_48 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_2 FILLER_0_60 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_0_9 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_1_39 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_51 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_55 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_1_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_1_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_15 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_27 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_29 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_12 FILLER_2_41 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 FILLER_2_53 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_4 FILLER_2_57 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__fill_1 FILLER_2_61 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_10 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_6 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_7 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_8 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_9 (.VGND(VGND),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[0]  (.HI(\gpio_defaults_high[0] ),
+    .LO(\gpio_defaults_low[0] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[10]  (.HI(\gpio_defaults_high[10] ),
+    .LO(\gpio_defaults_low[10] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[11]  (.HI(\gpio_defaults_high[11] ),
+    .LO(\gpio_defaults_low[11] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[12]  (.HI(\gpio_defaults_high[12] ),
+    .LO(\gpio_defaults_low[12] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[1]  (.HI(\gpio_defaults_high[1] ),
+    .LO(\gpio_defaults_low[1] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[2]  (.HI(\gpio_defaults_high[2] ),
+    .LO(\gpio_defaults_low[2] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[3]  (.HI(\gpio_defaults_high[3] ),
+    .LO(\gpio_defaults_low[3] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[4]  (.HI(\gpio_defaults_high[4] ),
+    .LO(\gpio_defaults_low[4] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[5]  (.HI(\gpio_defaults_high[5] ),
+    .LO(\gpio_defaults_low[5] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[6]  (.HI(\gpio_defaults_high[6] ),
+    .LO(\gpio_defaults_low[6] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[7]  (.HI(\gpio_defaults_high[7] ),
+    .LO(\gpio_defaults_low[7] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[8]  (.HI(\gpio_defaults_high[8] ),
+    .LO(\gpio_defaults_low[8] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ sky130_fd_sc_hd__conb_1 \gpio_default_value[9]  (.HI(\gpio_defaults_high[9] ),
+    .LO(\gpio_defaults_low[9] ),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR));
+ assign gpio_defaults[0] = \gpio_defaults_high[0] ;
+ assign gpio_defaults[1] = \gpio_defaults_high[1] ;
+ assign gpio_defaults[2] = \gpio_defaults_low[2] ;
+ assign gpio_defaults[3] = \gpio_defaults_low[3] ;
+ assign gpio_defaults[4] = \gpio_defaults_low[4] ;
+ assign gpio_defaults[5] = \gpio_defaults_low[5] ;
+ assign gpio_defaults[6] = \gpio_defaults_low[6] ;
+ assign gpio_defaults[7] = \gpio_defaults_low[7] ;
+ assign gpio_defaults[8] = \gpio_defaults_low[8] ;
+ assign gpio_defaults[9] = \gpio_defaults_low[9] ;
+ assign gpio_defaults[10] = \gpio_defaults_low[10] ;
+ assign gpio_defaults[11] = \gpio_defaults_high[11] ;
+ assign gpio_defaults[12] = \gpio_defaults_high[12] ;
+endmodule
diff --git a/tapeout/outputs/verilog/gl/user_id_programming.v b/tapeout/outputs/verilog/gl/user_id_programming.v
new file mode 100644
index 0000000..9d6e204
--- /dev/null
+++ b/tapeout/outputs/verilog/gl/user_id_programming.v
@@ -0,0 +1,786 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+/* Generated by Yosys 0.9+3621 (git sha1 84e9fa7, gcc 8.3.1 -fPIC -Os) */
+
+module user_id_programming(VPWR, VGND, mask_rev);
+  input VGND;
+  input VPWR;
+  output [31:0] mask_rev;
+  wire \user_proj_id_high[0] ;
+  wire \user_proj_id_high[10] ;
+  wire \user_proj_id_high[11] ;
+  wire \user_proj_id_high[12] ;
+  wire \user_proj_id_low[13] ;
+  wire \user_proj_id_low[14] ;
+  wire \user_proj_id_high[15] ;
+  wire \user_proj_id_low[16] ;
+  wire \user_proj_id_high[17] ;
+  wire \user_proj_id_low[18] ;
+  wire \user_proj_id_low[19] ;
+  wire \user_proj_id_high[1] ;
+  wire \user_proj_id_high[20] ;
+  wire \user_proj_id_low[21] ;
+  wire \user_proj_id_high[22] ;
+  wire \user_proj_id_high[23] ;
+  wire \user_proj_id_low[24] ;
+  wire \user_proj_id_high[25] ;
+  wire \user_proj_id_high[26] ;
+  wire \user_proj_id_low[27] ;
+  wire \user_proj_id_low[28] ;
+  wire \user_proj_id_high[29] ;
+  wire \user_proj_id_high[2] ;
+  wire \user_proj_id_high[30] ;
+  wire \user_proj_id_high[31] ;
+  wire \user_proj_id_high[3] ;
+  wire \user_proj_id_high[4] ;
+  wire \user_proj_id_high[5] ;
+  wire \user_proj_id_high[6] ;
+  wire \user_proj_id_high[7] ;
+  wire \user_proj_id_high[8] ;
+  wire \user_proj_id_high[9] ;
+  sky130_fd_sc_hd__decap_3 FILLER_0_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_21 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_0_29 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_0_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_0_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_39 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_0_47 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_0_7 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_1_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_1_20 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_1_24 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_1_33 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_1_45 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_1_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_2_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_2_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_2_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_2_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_2_44 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_18 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_30 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_3_42 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_3_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_10 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_14 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_4_18 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_26 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_4_30 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_4_35 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_4_41 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_4_46 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_5_11 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_5_23 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_5_31 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_5_40 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_5_49 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_5_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_6_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_20 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_24 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 FILLER_6_28 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_6_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_6_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_6_36 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_8 FILLER_6_40 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_2 FILLER_6_48 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_7_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_7_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_7_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_7_36 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__fill_1 FILLER_7_42 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_7_46 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_4 FILLER_8_27 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_12 FILLER_8_32 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_6 FILLER_8_44 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_0 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_1 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_10 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_11 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_12 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_13 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_14 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_15 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_16 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_17 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_18 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_19 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_2 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_20 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_21 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__tapvpwrvgnd_1 PHY_22 (
+    .VGND(VGND),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_3 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_4 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_5 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_6 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_7 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_8 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__decap_3 PHY_9 (
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[0]  (
+    .HI(\user_proj_id_high[0] ),
+    .LO(mask_rev[0]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[10]  (
+    .HI(\user_proj_id_high[10] ),
+    .LO(mask_rev[10]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[11]  (
+    .HI(\user_proj_id_high[11] ),
+    .LO(mask_rev[11]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[12]  (
+    .HI(\user_proj_id_high[12] ),
+    .LO(mask_rev[12]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[13]  (
+    .LO(\user_proj_id_low[13] ),
+    .HI(mask_rev[13]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[14]  (
+    .LO(\user_proj_id_low[14] ),
+    .HI(mask_rev[14]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[15]  (
+    .HI(\user_proj_id_high[15] ),
+    .LO(mask_rev[15]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[16]  (
+    .LO(\user_proj_id_low[16] ),
+    .HI(mask_rev[16]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[17]  (
+    .HI(\user_proj_id_high[17] ),
+    .LO(mask_rev[17]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[18]  (
+    .LO(\user_proj_id_low[18] ),
+    .HI(mask_rev[18]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[19]  (
+    .LO(\user_proj_id_low[19] ),
+    .HI(mask_rev[19]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[1]  (
+    .HI(\user_proj_id_high[1] ),
+    .LO(mask_rev[1]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[20]  (
+    .HI(\user_proj_id_high[20] ),
+    .LO(mask_rev[20]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[21]  (
+    .LO(\user_proj_id_low[21] ),
+    .HI(mask_rev[21]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[22]  (
+    .HI(\user_proj_id_high[22] ),
+    .LO(mask_rev[22]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[23]  (
+    .HI(\user_proj_id_high[23] ),
+    .LO(mask_rev[23]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[24]  (
+    .LO(\user_proj_id_low[24] ),
+    .HI(mask_rev[24]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[25]  (
+    .HI(\user_proj_id_high[25] ),
+    .LO(mask_rev[25]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[26]  (
+    .HI(\user_proj_id_high[26] ),
+    .LO(mask_rev[26]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[27]  (
+    .LO(\user_proj_id_low[27] ),
+    .HI(mask_rev[27]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[28]  (
+    .LO(\user_proj_id_low[28] ),
+    .HI(mask_rev[28]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[29]  (
+    .HI(\user_proj_id_high[29] ),
+    .LO(mask_rev[29]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[2]  (
+    .HI(\user_proj_id_high[2] ),
+    .LO(mask_rev[2]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[30]  (
+    .HI(\user_proj_id_high[30] ),
+    .LO(mask_rev[30]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[31]  (
+    .HI(\user_proj_id_high[31] ),
+    .LO(mask_rev[31]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[3]  (
+    .HI(\user_proj_id_high[3] ),
+    .LO(mask_rev[3]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[4]  (
+    .HI(\user_proj_id_high[4] ),
+    .LO(mask_rev[4]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[5]  (
+    .HI(\user_proj_id_high[5] ),
+    .LO(mask_rev[5]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[6]  (
+    .HI(\user_proj_id_high[6] ),
+    .LO(mask_rev[6]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[7]  (
+    .HI(\user_proj_id_high[7] ),
+    .LO(mask_rev[7]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[8]  (
+    .HI(\user_proj_id_high[8] ),
+    .LO(mask_rev[8]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+  sky130_fd_sc_hd__conb_1 \mask_rev_value[9]  (
+    .HI(\user_proj_id_high[9] ),
+    .LO(mask_rev[9]),
+    .VGND(VGND),
+    .VNB(VGND),
+    .VPB(VPWR),
+    .VPWR(VPWR)
+  );
+endmodule
diff --git a/tapeout/outputs/verilog/rtl/caravel.v b/tapeout/outputs/verilog/rtl/caravel.v
new file mode 100644
index 0000000..084b42b
--- /dev/null
+++ b/tapeout/outputs/verilog/rtl/caravel.v
@@ -0,0 +1,1635 @@
+ `ifdef SIM
+ `default_nettype wire
+ `endif
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+/*--------------------------------------------------------------*/
+/* caravel, a project harness for the Google/SkyWater sky130	*/
+/* fabrication process and open source PDK			*/
+/*                                                          	*/
+/* Copyright 2020 efabless, Inc.                            	*/
+/* Written by Tim Edwards, December 2019                    	*/
+/* and Mohamed Shalan, August 2020			    	*/
+/* This file is open source hardware released under the     	*/
+/* Apache 2.0 license.  See file LICENSE.                   	*/
+/*								*/
+/* Updated 10/15/2021:  Revised using the housekeeping module	*/
+/* from housekeeping.v (refactoring a number of functions from	*/
+/* the management SoC).						*/
+/*                                                          	*/
+/*--------------------------------------------------------------*/
+
+module caravel (
+
+    // All top-level I/O are package-facing pins
+
+    inout vddio,	// Common 3.3V padframe/ESD power
+    inout vddio_2,	// Common 3.3V padframe/ESD power
+    inout vssio,	// Common padframe/ESD ground
+    inout vssio_2,	// Common padframe/ESD ground
+    inout vdda,		// Management 3.3V power
+    inout vssa,		// Common analog ground
+    inout vccd,		// Management/Common 1.8V power
+    inout vssd,		// Common digital ground
+    inout vdda1,	// User area 1 3.3V power
+    inout vdda1_2,	// User area 1 3.3V power
+    inout vdda2,	// User area 2 3.3V power
+    inout vssa1,	// User area 1 analog ground
+    inout vssa1_2,	// User area 1 analog ground
+    inout vssa2,	// User area 2 analog ground
+    inout vccd1,	// User area 1 1.8V power
+    inout vccd2,	// User area 2 1.8V power
+    inout vssd1,	// User area 1 digital ground
+    inout vssd2,	// User area 2 digital ground
+
+    inout gpio,		// Used for external LDO control
+    inout [`MPRJ_IO_PADS-1:0] mprj_io,
+    input clock,    	// CMOS core clock input, not a crystal
+    input resetb,	// Reset input (sense inverted)
+
+    // Note that only two flash data pins are dedicated to the
+    // management SoC wrapper.  The management SoC exports the
+    // quad SPI mode status to make use of the top two mprj_io
+    // pins for io2 and io3.
+
+    output flash_csb,
+    output flash_clk,
+    output flash_io0,
+    output flash_io1
+);
+
+    //------------------------------------------------------------
+    // This value is uniquely defined for each user project.
+    //------------------------------------------------------------
+    parameter USER_PROJECT_ID = 32'h0006b498;
+
+    /*
+     *--------------------------------------------------------------------
+     *
+     * These pins are overlaid on mprj_io space.  They have the function
+     * below when the management processor is in reset, or in the default
+     * configuration.  They are assigned to uses in the user space by the
+     * configuration program running off of the SPI flash.  Note that even
+     * when the user has taken control of these pins, they can be restored
+     * to the original use by setting the resetb pin low.  The SPI pins and
+     * UART pins can be connected directly to an FTDI chip as long as the
+     * FTDI chip sets these lines to high impedence (input function) at
+     * all times except when holding the chip in reset.
+     *
+     * JTAG       = mprj_io[0]		(inout)
+     * SDO 	  = mprj_io[1]		(output)
+     * SDI 	  = mprj_io[2]		(input)
+     * CSB 	  = mprj_io[3]		(input)
+     * SCK	  = mprj_io[4]		(input)
+     * ser_rx     = mprj_io[5]		(input)
+     * ser_tx     = mprj_io[6]		(output)
+     * irq 	  = mprj_io[7]		(input)
+     *
+     * spi_sck    = mprj_io[32]		(output)
+     * spi_csb    = mprj_io[33]		(output)
+     * spi_sdi    = mprj_io[34]		(input)
+     * spi_sdo    = mprj_io[35]		(output)
+     * flash_io2  = mprj_io[36]		(inout) 
+     * flash_io3  = mprj_io[37]		(inout) 
+     *
+     * These pins are reserved for any project that wants to incorporate
+     * its own processor and flash controller.  While a user project can
+     * technically use any available I/O pins for the purpose, these
+     * four pins connect to a pass-through mode from the SPI slave (pins
+     * 1-4 above) so that any SPI flash connected to these specific pins
+     * can be accessed through the SPI slave even when the processor is in
+     * reset.
+     *
+     * user_flash_csb = mprj_io[8]
+     * user_flash_sck = mprj_io[9]
+     * user_flash_io0 = mprj_io[10]
+     * user_flash_io1 = mprj_io[11]
+     *
+     *--------------------------------------------------------------------
+     */
+
+    // One-bit GPIO dedicated to management SoC (outside of user control)
+    wire gpio_out_core;
+    wire gpio_in_core;
+    wire gpio_mode0_core;
+    wire gpio_mode1_core;
+    wire gpio_outenb_core;
+    wire gpio_inenb_core;
+
+    // User Project Control (pad-facing)
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_inp_dis;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_oeb;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_ib_mode_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_vtrip_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_slow_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_holdover;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_en;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_sel;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_analog_pol;
+    wire [`MPRJ_IO_PADS*3-1:0] mprj_io_dm;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_in;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_out;
+    wire [`MPRJ_IO_PADS-1:0] mprj_io_one;
+
+    // User Project Control (user-facing)
+    wire [`MPRJ_IO_PADS-1:0] user_io_oeb;
+    wire [`MPRJ_IO_PADS-1:0] user_io_in;
+    wire [`MPRJ_IO_PADS-1:0] user_io_out;
+    wire [`MPRJ_IO_PADS-10:0] user_analog_io;
+
+    /* Padframe control signals */
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2;
+    wire mprj_io_loader_resetn;
+    wire mprj_io_loader_clock;
+    wire mprj_io_loader_strobe;
+    wire mprj_io_loader_data_1;		/* user1 side serial loader */
+    wire mprj_io_loader_data_2;		/* user2 side serial loader */
+
+    // User Project Control management I/O
+    // There are two types of GPIO connections:
+    // (1) Full Bidirectional: Management connects to in, out, and oeb
+    //     Uses:  JTAG and SDO
+    // (2) Selectable bidirectional:  Management connects to in and out,
+    //	   which are tied together.  oeb is grounded (oeb from the
+    //	   configuration is used)
+
+    // SDI 	 = mprj_io[2]		(input)
+    // CSB 	 = mprj_io[3]		(input)
+    // SCK	 = mprj_io[4]		(input)
+    // ser_rx    = mprj_io[5]		(input)
+    // ser_tx    = mprj_io[6]		(output)
+    // irq 	 = mprj_io[7]		(input)
+
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_in;	/* two- and three-pin data in	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_out;	/* two- and three-pin data out	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb;	/* output enable, used only by	*/
+						/* the three-pin interfaces	*/
+    wire [`MPRJ_PWR_PADS-1:0] pwr_ctrl_nc;	/* no-connects */
+
+    /* Buffers are placed between housekeeping and gpio_control_block		*/
+    /* instances to mitigate timing issues on very long (> 1.5mm) wires.	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_in_hk;	/* mgmt_io_in at housekeeping	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_out_hk;	/* mgmt_io_out at housekeeping	*/
+    wire [`MPRJ_IO_PADS-1:0] mgmt_io_oeb_hk;	/* mgmt_io_oeb at housekeeping	*/
+    
+    wire clock_core;
+
+    // Power-on-reset signal.  The reset pad generates the sense-inverted
+    // reset at 3.3V.  The 1.8V signal and the inverted 1.8V signal are
+    // derived.
+
+    wire porb_h;
+    wire porb_l;
+    wire por_l;
+
+    wire rstb_h;
+    wire rstb_l;
+
+    // Flash SPI communication (management SoC to housekeeping)
+    wire flash_clk_core,     flash_csb_core;
+    wire flash_clk_oeb_core, flash_csb_oeb_core;
+    wire flash_io0_oeb_core, flash_io1_oeb_core;
+    wire flash_io2_oeb_core, flash_io3_oeb_core;
+    wire flash_io0_ieb_core, flash_io1_ieb_core;
+    wire flash_io2_ieb_core, flash_io3_ieb_core;
+    wire flash_io0_do_core,  flash_io1_do_core;
+    wire flash_io2_do_core,  flash_io3_do_core;
+    wire flash_io0_di_core,  flash_io1_di_core;
+    wire flash_io2_di_core,  flash_io3_di_core;
+
+    // Flash SPI communication (
+    wire flash_clk_frame;
+    wire flash_csb_frame;
+    wire flash_clk_oeb, flash_csb_oeb;
+    wire flash_clk_ieb, flash_csb_ieb;
+    wire flash_io0_oeb, flash_io1_oeb;
+    wire flash_io0_ieb, flash_io1_ieb;
+    wire flash_io0_do,  flash_io1_do;
+    wire flash_io0_di,  flash_io1_di;
+
+	// Flash buffered signals
+    wire flash_clk_frame_buf;
+    wire flash_csb_frame_buf;
+    wire flash_clk_ieb_buf, flash_csb_ieb_buf;
+    wire flash_io0_oeb_buf, flash_io1_oeb_buf;
+    wire flash_io0_ieb_buf, flash_io1_ieb_buf;
+    wire flash_io0_do_buf,  flash_io1_do_buf;
+    wire flash_io0_di_buf,  flash_io1_di_buf;
+	
+	// Clock and reset buffered signals
+	wire caravel_clk_buf;
+	wire caravel_rstn_buf;
+	wire clock_core_buf;
+
+	// SoC pass through buffered signals
+	wire mprj_io_loader_clock_buf;
+	wire mprj_io_loader_strobe_buf;
+	wire mprj_io_loader_resetn_buf;
+	wire mprj_io_loader_data_2_buf;
+	wire rstb_l_buf;
+	wire por_l_buf;
+	wire porb_h_buf;
+	
+
+    // SoC core
+    wire caravel_clk;
+    wire caravel_clk2;
+    wire caravel_rstn;
+	
+	// top-level buffers
+	buff_flash_clkrst flash_clkrst_buffers (
+	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+	`endif
+	.in_n({
+		caravel_clk,
+		caravel_rstn,
+		flash_clk_frame, 
+		flash_csb_frame, 
+		flash_clk_oeb, 
+		flash_csb_oeb, 
+		flash_io0_oeb, 
+		flash_io1_oeb,
+		flash_io0_ieb, 
+		flash_io1_ieb,
+		flash_io0_do,  
+		flash_io1_do }), 
+	.in_s({
+		clock_core,
+		flash_io1_di, 
+		flash_io0_di }),
+	.out_s({ 
+		caravel_clk_buf,
+		caravel_rstn_buf,
+		flash_clk_frame_buf, 
+		flash_csb_frame_buf, 
+		flash_clk_oeb_buf, 
+		flash_csb_oeb_buf, 
+		flash_io0_oeb_buf, 
+		flash_io1_oeb_buf,
+		flash_io0_ieb_buf, 
+		flash_io1_ieb_buf,
+		flash_io0_do_buf,  
+		flash_io1_do_buf }), 
+	.out_n({
+		clock_core_buf,
+		flash_io1_di_buf, 
+		flash_io0_di_buf })
+	);
+
+	`ifdef NO_TOP_LEVEL_BUFFERING
+		assign mgmt_io_in_hk = mgmt_io_in;
+		assign mgmt_io_out = mgmt_io_out_hk;
+		assign mgmt_io_oeb = mgmt_io_oeb_hk;
+	`else
+
+		/* NOTE: The first 7 GPIO are unbuffered, and all
+		 * OEB lines except the last three are unbuffered
+		 * (most of these end up being no-connects from
+		 * housekeeping).
+		 */
+		assign mgmt_io_in_hk[6:0] = mgmt_io_in[6:0];
+		assign mgmt_io_out[6:0] = mgmt_io_out_hk[6:0];
+		assign mgmt_io_oeb[34:0] = mgmt_io_oeb_hk[34:0];
+
+		gpio_signal_buffering sigbuf (
+		`ifdef USE_POWER_PINS
+			.vccd(vccd_core),
+			.vssd(vssd_core),
+		`endif
+		.mgmt_io_in_unbuf(mgmt_io_in[37:7]),
+		.mgmt_io_out_unbuf(mgmt_io_out_hk[37:7]),
+		.mgmt_io_oeb_unbuf(mgmt_io_oeb_hk[37:35]),
+		.mgmt_io_in_buf(mgmt_io_in_hk[37:7]),
+		.mgmt_io_out_buf(mgmt_io_out[37:7]),
+		.mgmt_io_oeb_buf(mgmt_io_oeb[37:35])
+		);
+	`endif
+
+	chip_io padframe(
+	`ifndef TOP_ROUTING
+		// Package Pins
+		.vddio_pad	(vddio),		// Common padframe/ESD supply
+		.vddio_pad2	(vddio_2),
+		.vssio_pad	(vssio),		// Common padframe/ESD ground
+		.vssio_pad2	(vssio_2),
+		.vccd_pad	(vccd),			// Common 1.8V supply
+		.vssd_pad	(vssd),			// Common digital ground
+		.vdda_pad	(vdda),			// Management analog 3.3V supply
+		.vssa_pad	(vssa),			// Management analog ground
+		.vdda1_pad	(vdda1),		// User area 1 3.3V supply
+		.vdda1_pad2	(vdda1_2),		
+		.vdda2_pad	(vdda2),		// User area 2 3.3V supply
+		.vssa1_pad	(vssa1),		// User area 1 analog ground
+		.vssa1_pad2	(vssa1_2),
+		.vssa2_pad	(vssa2),		// User area 2 analog ground
+		.vccd1_pad	(vccd1),		// User area 1 1.8V supply
+		.vccd2_pad	(vccd2),		// User area 2 1.8V supply
+		.vssd1_pad	(vssd1),		// User area 1 digital ground
+		.vssd2_pad	(vssd2),		// User area 2 digital ground
+        .vddio	(vddio_core),
+        .vssio	(vssio_core),
+        .vdda	(vdda_core),
+        .vssa	(vssa_core),
+        .vccd	(vccd_core),
+        .vssd	(vssd_core),
+        .vdda1	(vdda1_core),
+        .vdda2	(vdda2_core),
+        .vssa1	(vssa1_core),
+        .vssa2	(vssa2_core),
+        .vccd1	(vccd1_core),
+        .vccd2	(vccd2_core),
+        .vssd1	(vssd1_core),
+        .vssd2	(vssd2_core),
+	`endif
+	// Core Side Pins
+	.gpio(gpio),
+	.mprj_io(mprj_io),
+	.clock(clock),
+	.resetb(resetb),
+	.flash_csb(flash_csb),
+	.flash_clk(flash_clk),
+	.flash_io0(flash_io0),
+	.flash_io1(flash_io1),
+	// SoC Core Interface
+	.porb_h(porb_h),
+	.por(por_l_buf),
+	.resetb_core_h(rstb_h),
+	.clock_core(clock_core),
+	.gpio_out_core(gpio_out_core),
+	.gpio_in_core(gpio_in_core),
+	.gpio_mode0_core(gpio_mode0_core),
+	.gpio_mode1_core(gpio_mode1_core),
+	.gpio_outenb_core(gpio_outenb_core),
+	.gpio_inenb_core(gpio_inenb_core),
+	.flash_csb_core(flash_csb_frame_buf),
+	.flash_clk_core(flash_clk_frame_buf),
+	.flash_csb_oeb_core(flash_csb_oeb_buf),
+	.flash_clk_oeb_core(flash_clk_oeb_buf),
+	.flash_io0_oeb_core(flash_io0_oeb_buf),
+	.flash_io1_oeb_core(flash_io1_oeb_buf),
+	.flash_io0_ieb_core(flash_io0_ieb_buf),
+	.flash_io1_ieb_core(flash_io1_ieb_buf),
+	.flash_io0_do_core(flash_io0_do_buf),
+	.flash_io1_do_core(flash_io1_do_buf),
+	.flash_io0_di_core(flash_io0_di),
+	.flash_io1_di_core(flash_io1_di),
+	.mprj_io_one(mprj_io_one),
+	.mprj_io_in(mprj_io_in),
+	.mprj_io_out(mprj_io_out),
+	.mprj_io_oeb(mprj_io_oeb),
+	.mprj_io_inp_dis(mprj_io_inp_dis),
+	.mprj_io_ib_mode_sel(mprj_io_ib_mode_sel),
+	.mprj_io_vtrip_sel(mprj_io_vtrip_sel),
+	.mprj_io_slow_sel(mprj_io_slow_sel),
+	.mprj_io_holdover(mprj_io_holdover),
+	.mprj_io_analog_en(mprj_io_analog_en),
+	.mprj_io_analog_sel(mprj_io_analog_sel),
+	.mprj_io_analog_pol(mprj_io_analog_pol),
+	.mprj_io_dm(mprj_io_dm),
+	.mprj_analog_io(user_analog_io)
+    );
+
+
+    // Logic analyzer signals
+    wire [127:0] la_data_in_user;  // From CPU to MPRJ
+    wire [127:0] la_data_in_mprj;  // From MPRJ to CPU
+    wire [127:0] la_data_out_mprj; // From CPU to MPRJ
+    wire [127:0] la_data_out_user; // From MPRJ to CPU
+    wire [127:0] la_oenb_user;     // From CPU to MPRJ
+    wire [127:0] la_oenb_mprj;     // From CPU to MPRJ
+    wire [127:0] la_iena_mprj;     // From CPU only
+
+    wire [2:0]   user_irq;	  // From MRPJ to CPU
+    wire [2:0]   user_irq_core;
+    wire [2:0]   user_irq_ena;
+    wire [2:0]	 irq_spi;	  // From SPI and external pins
+
+    // Exported Wishbone Bus (processor facing)
+    wire mprj_iena_wb;
+    wire mprj_cyc_o_core;
+    wire mprj_stb_o_core;
+    wire mprj_we_o_core;
+    wire [3:0] mprj_sel_o_core;
+    wire [31:0] mprj_adr_o_core;
+    wire [31:0] mprj_dat_o_core;
+    wire mprj_ack_i_core;
+    wire [31:0] mprj_dat_i_core;
+
+    wire [31:0] hk_dat_i;
+    wire hk_ack_i;
+    wire hk_stb_o;
+    wire hk_cyc_o;
+
+    // Exported Wishbone Bus (user area facing)
+    wire 	mprj_cyc_o_user;
+    wire 	mprj_stb_o_user;
+    wire 	mprj_we_o_user;
+    wire [3:0]  mprj_sel_o_user;
+    wire [31:0] mprj_adr_o_user;
+    wire [31:0] mprj_dat_o_user;
+    wire [31:0] mprj_dat_i_user;
+    wire	mprj_ack_i_user;
+
+    // Mask revision
+    wire [31:0] mask_rev;
+
+    wire 	mprj_clock;
+    wire 	mprj_clock2;
+    wire 	mprj_reset;
+
+    // Power monitoring 
+    wire	mprj_vcc_pwrgood;
+    wire	mprj2_vcc_pwrgood;
+    wire	mprj_vdd_pwrgood;
+    wire	mprj2_vdd_pwrgood;
+
+`ifdef USE_SRAM_RO_INTERFACE
+    // SRAM read-only access from housekeeping
+    wire 	hkspi_sram_clk;
+    wire 	hkspi_sram_csb;
+    wire [7:0]	hkspi_sram_addr;
+    wire [31:0]	hkspi_sram_data;
+`endif
+
+    // Management processor (wrapper).  Any management core
+    // implementation must match this pinout.
+
+    // Pass thru clock and reset
+    wire 	clk_passthru;
+    wire 	resetn_passthru;
+
+	// NC passthru signal porb_h 
+	wire porb_h_in_nc;
+	wire porb_h_out_nc;
+
+    mgmt_core_wrapper soc (
+	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+	`endif
+
+	// SoC pass through buffered signals
+	.serial_clock_in(mprj_io_loader_clock),
+	.serial_clock_out(mprj_io_loader_clock_buf),
+	.serial_load_in(mprj_io_loader_strobe),
+	.serial_load_out(mprj_io_loader_strobe_buf),
+	.serial_resetn_in(mprj_io_loader_resetn),
+	.serial_resetn_out(mprj_io_loader_resetn_buf),
+	.serial_data_2_in(mprj_io_loader_data_2),
+	.serial_data_2_out(mprj_io_loader_data_2_buf),
+	.rstb_l_in(rstb_l),
+	.rstb_l_out(rstb_l_buf),
+	.porb_h_in(porb_h_in_nc),
+	.porb_h_out(porb_h_out_nc),
+	.por_l_in(por_l),
+	.por_l_out(por_l_buf),
+
+	// Clock and reset
+	.core_clk(caravel_clk_buf),
+	.core_rstn(caravel_rstn_buf),
+
+    // Pass thru Clock and reset
+	.clk_in(caravel_clk_buf),
+	.resetn_in(caravel_rstn_buf),
+	.clk_out(clk_passthru),
+	.resetn_out(resetn_passthru),
+
+	// GPIO (1 pin)
+	.gpio_out_pad(gpio_out_core),
+	.gpio_in_pad(gpio_in_core),
+	.gpio_mode0_pad(gpio_mode0_core),
+	.gpio_mode1_pad(gpio_mode1_core),
+	.gpio_outenb_pad(gpio_outenb_core),
+	.gpio_inenb_pad(gpio_inenb_core),
+
+	// Primary SPI flash controller
+	.flash_csb(flash_csb_core),
+	.flash_clk(flash_clk_core),
+	.flash_io0_oeb(flash_io0_oeb_core),
+	.flash_io0_di(flash_io0_di_core),
+	.flash_io0_do(flash_io0_do_core),
+	.flash_io1_oeb(flash_io1_oeb_core),
+	.flash_io1_di(flash_io1_di_core),
+	.flash_io1_do(flash_io1_do_core),
+	.flash_io2_oeb(flash_io2_oeb_core),
+	.flash_io2_di(flash_io2_di_core),
+	.flash_io2_do(flash_io2_do_core),
+	.flash_io3_oeb(flash_io3_oeb_core),
+	.flash_io3_di(flash_io3_di_core),
+	.flash_io3_do(flash_io3_do_core),
+
+	// Exported Wishbone Bus
+	.mprj_wb_iena(mprj_iena_wb),
+	.mprj_cyc_o(mprj_cyc_o_core),
+	.mprj_stb_o(mprj_stb_o_core),
+	.mprj_we_o(mprj_we_o_core),
+	.mprj_sel_o(mprj_sel_o_core),
+	.mprj_adr_o(mprj_adr_o_core),
+	.mprj_dat_o(mprj_dat_o_core),
+	.mprj_ack_i(mprj_ack_i_core),
+	.mprj_dat_i(mprj_dat_i_core),
+
+	.hk_stb_o(hk_stb_o),
+	.hk_cyc_o(hk_cyc_o),
+	.hk_dat_i(hk_dat_i),
+	.hk_ack_i(hk_ack_i),
+
+	// IRQ
+	.irq({irq_spi, user_irq}),
+	.user_irq_ena(user_irq_ena),
+
+	// Module status (these may or may not be implemented)
+	.qspi_enabled(qspi_enabled),
+	.uart_enabled(uart_enabled),
+	.spi_enabled(spi_enabled),
+	.debug_mode(debug_mode),
+
+	// Module I/O (these may or may not be implemented)
+	// UART
+	.ser_tx(ser_tx),
+	.ser_rx(ser_rx),
+	// SPI master
+	.spi_sdi(spi_sdi),
+	.spi_csb(spi_csb),
+	.spi_sck(spi_sck),
+	.spi_sdo(spi_sdo),
+	.spi_sdoenb(spi_sdoenb),
+	// Debug
+	.debug_in(debug_in),
+	.debug_out(debug_out),
+	.debug_oeb(debug_oeb),
+	// Logic analyzer
+	.la_input(la_data_in_mprj),
+	.la_output(la_data_out_mprj),
+	.la_oenb(la_oenb_mprj),
+	.la_iena(la_iena_mprj),
+
+`ifdef USE_SRAM_RO_INTERFACE
+	// SRAM Read-only access from housekeeping
+	.sram_ro_clk(hkspi_sram_clk),
+	.sram_ro_csb(hkspi_sram_csb),
+	.sram_ro_addr(hkspi_sram_addr),
+	.sram_ro_data(hkspi_sram_data),
+`endif
+
+	// Trap status
+	.trap(trap)
+    );
+
+    /* Clock and reset to user space are passed through a tristate	*/
+    /* buffer like the above, but since they are intended to be		*/
+    /* always active, connect the enable to the logic-1 output from	*/
+    /* the vccd1 domain.						*/
+
+    mgmt_protect mgmt_buffers (
+	`ifdef USE_POWER_PINS
+ 	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+	    .vccd2(vccd2_core),
+	    .vssd2(vssd2_core),
+	    .vdda1(vdda1_core),
+	    .vssa1(vssa1_core),
+	    .vdda2(vdda2_core),
+	    .vssa2(vssa2_core),
+	`endif
+	.caravel_clk(clk_passthru),
+	.caravel_clk2(caravel_clk2),
+	.caravel_rstn(resetn_passthru),
+	.mprj_iena_wb(mprj_iena_wb),
+	.mprj_cyc_o_core(mprj_cyc_o_core),
+	.mprj_stb_o_core(mprj_stb_o_core),
+	.mprj_we_o_core(mprj_we_o_core),
+	.mprj_sel_o_core(mprj_sel_o_core),
+	.mprj_adr_o_core(mprj_adr_o_core),
+	.mprj_dat_o_core(mprj_dat_o_core),
+	.mprj_ack_i_core(mprj_ack_i_core),
+	.mprj_dat_i_core(mprj_dat_i_core),
+	.user_irq_core(user_irq_core),
+	.user_irq_ena(user_irq_ena),
+	.la_data_out_core(la_data_out_user),
+	.la_data_out_mprj(la_data_out_mprj),
+	.la_data_in_core(la_data_in_user),
+	.la_data_in_mprj(la_data_in_mprj),
+	.la_oenb_mprj(la_oenb_mprj),
+	.la_oenb_core(la_oenb_user),
+	.la_iena_mprj(la_iena_mprj),
+
+	.user_clock(mprj_clock),
+	.user_clock2(mprj_clock2),
+	.user_reset(mprj_reset),
+	.mprj_cyc_o_user(mprj_cyc_o_user),
+	.mprj_stb_o_user(mprj_stb_o_user),
+	.mprj_we_o_user(mprj_we_o_user),
+	.mprj_sel_o_user(mprj_sel_o_user),
+	.mprj_adr_o_user(mprj_adr_o_user),
+	.mprj_dat_o_user(mprj_dat_o_user),
+	.mprj_dat_i_user(mprj_dat_i_user),
+	.mprj_ack_i_user(mprj_ack_i_user),
+	.user_irq(user_irq),
+	.user1_vcc_powergood(mprj_vcc_pwrgood),
+	.user2_vcc_powergood(mprj2_vcc_pwrgood),
+	.user1_vdd_powergood(mprj_vdd_pwrgood),
+	.user2_vdd_powergood(mprj2_vdd_pwrgood)
+    );
+
+    /*--------------------------------------------------*/
+    /* Wrapper module around the user project 		*/
+    /*--------------------------------------------------*/
+
+    user_project_wrapper mprj ( 
+        `ifdef USE_POWER_PINS
+	    .vdda1(vdda1_core),		// User area 1 3.3V power
+	    .vdda2(vdda2_core),		// User area 2 3.3V power
+	    .vssa1(vssa1_core),		// User area 1 analog ground
+	    .vssa2(vssa2_core),		// User area 2 analog ground
+	    .vccd1(vccd1_core),		// User area 1 1.8V power
+	    .vccd2(vccd2_core),		// User area 2 1.8V power
+	    .vssd1(vssd1_core),		// User area 1 digital ground
+	    .vssd2(vssd2_core),		// User area 2 digital ground
+    	`endif
+
+    	.wb_clk_i(mprj_clock),
+    	.wb_rst_i(mprj_reset),
+
+	// Management SoC Wishbone bus (exported)
+	.wbs_cyc_i(mprj_cyc_o_user),
+	.wbs_stb_i(mprj_stb_o_user),
+	.wbs_we_i(mprj_we_o_user),
+	.wbs_sel_i(mprj_sel_o_user),
+	.wbs_adr_i(mprj_adr_o_user),
+	.wbs_dat_i(mprj_dat_o_user),
+	.wbs_ack_o(mprj_ack_i_user),
+	.wbs_dat_o(mprj_dat_i_user),
+
+	// GPIO pad 3-pin interface (plus analog)
+	.io_in (user_io_in),
+    	.io_out(user_io_out),
+    	.io_oeb(user_io_oeb),
+	.analog_io(user_analog_io),
+
+	// Logic analyzer
+	.la_data_in(la_data_in_user),
+	.la_data_out(la_data_out_user),
+	.la_oenb(la_oenb_user),
+
+	// Independent clock
+	.user_clock2(mprj_clock2),
+
+	// IRQ
+	.user_irq(user_irq_core)
+    );
+
+    /*------------------------------------------*/
+    /* End user project instantiation		*/
+    /*------------------------------------------*/
+
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_serial_link_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_serial_link_2_shifted;
+
+    assign gpio_serial_link_1_shifted = {gpio_serial_link_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_data_1};
+    // Note that serial_link_2 is backwards compared to serial_link_1, so it
+    // shifts in the other direction.
+    assign gpio_serial_link_2_shifted = {mprj_io_loader_data_2_buf,
+					 gpio_serial_link_2[`MPRJ_IO_PADS_2-1:1]};
+
+    // Propagating clock and reset to mitigate timing and fanout issues
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_load_1;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_load_2;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_clock_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_clock_2_shifted;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_resetn_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_resetn_2_shifted;
+    wire [`MPRJ_IO_PADS_1-1:0] gpio_load_1_shifted;
+    wire [`MPRJ_IO_PADS_2-1:0] gpio_load_2_shifted;
+
+    assign gpio_clock_1_shifted = {gpio_clock_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_clock};
+    assign gpio_clock_2_shifted = {mprj_io_loader_clock_buf,
+					gpio_clock_2[`MPRJ_IO_PADS_2-1:1]};
+    assign gpio_resetn_1_shifted = {gpio_resetn_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_resetn};
+    assign gpio_resetn_2_shifted = {mprj_io_loader_resetn_buf,
+					gpio_resetn_2[`MPRJ_IO_PADS_2-1:1]};
+    assign gpio_load_1_shifted = {gpio_load_1[`MPRJ_IO_PADS_1-2:0],
+					 mprj_io_loader_strobe};
+    assign gpio_load_2_shifted = {mprj_io_loader_strobe_buf,
+					gpio_load_2[`MPRJ_IO_PADS_2-1:1]};
+
+    wire [2:0] spi_pll_sel;
+    wire [2:0] spi_pll90_sel;
+    wire [4:0] spi_pll_div;
+    wire [25:0] spi_pll_trim;
+
+    // Clocking control
+
+    caravel_clocking clock_ctrl (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+        .ext_clk_sel(ext_clk_sel),
+        .ext_clk(clock_core_buf),
+        .pll_clk(pll_clk),
+        .pll_clk90(pll_clk90),
+        .resetb(rstb_l_buf),
+        .sel(spi_pll_sel),
+        .sel2(spi_pll90_sel),
+        .ext_reset(ext_reset),  // From housekeeping SPI
+        .core_clk(caravel_clk),
+        .user_clk(caravel_clk2),
+        .resetb_sync(caravel_rstn)
+    );
+
+    // DCO/Digital Locked Loop
+
+    digital_pll pll (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+        .resetb(rstb_l_buf),
+        .enable(spi_pll_ena),
+        .osc(clock_core_buf),
+        .clockp({pll_clk, pll_clk90}),
+        .div(spi_pll_div),
+        .dco(spi_pll_dco_ena),
+        .ext_trim(spi_pll_trim)
+    );
+
+    // Housekeeping interface
+
+    housekeeping housekeeping (
+    `ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+    `endif
+
+        .wb_clk_i(caravel_clk),
+        .wb_rstn_i(caravel_rstn),
+
+        .wb_adr_i(mprj_adr_o_core),
+        .wb_dat_i(mprj_dat_o_core),
+        .wb_sel_i(mprj_sel_o_core),
+        .wb_we_i(mprj_we_o_core),
+        .wb_cyc_i(hk_cyc_o),
+        .wb_stb_i(hk_stb_o),
+        .wb_ack_o(hk_ack_i),
+        .wb_dat_o(hk_dat_i),
+
+        .porb(porb_l),
+
+        .pll_ena(spi_pll_ena),
+        .pll_dco_ena(spi_pll_dco_ena),
+        .pll_div(spi_pll_div),
+        .pll_sel(spi_pll_sel),
+        .pll90_sel(spi_pll90_sel),
+        .pll_trim(spi_pll_trim),
+        .pll_bypass(ext_clk_sel),
+
+	.qspi_enabled(qspi_enabled),
+	.uart_enabled(uart_enabled),
+	.spi_enabled(spi_enabled),
+	.debug_mode(debug_mode),
+
+	.ser_tx(ser_tx),
+	.ser_rx(ser_rx),
+
+	.spi_sdi(spi_sdi),
+	.spi_csb(spi_csb),
+	.spi_sck(spi_sck),
+	.spi_sdo(spi_sdo),
+	.spi_sdoenb(spi_sdoenb),
+
+	.debug_in(debug_in),
+	.debug_out(debug_out),
+	.debug_oeb(debug_oeb),
+
+        .irq(irq_spi),
+        .reset(ext_reset),
+
+        .serial_clock(mprj_io_loader_clock),
+        .serial_load(mprj_io_loader_strobe),
+        .serial_resetn(mprj_io_loader_resetn),
+        .serial_data_1(mprj_io_loader_data_1),
+        .serial_data_2(mprj_io_loader_data_2),
+
+	.mgmt_gpio_in(mgmt_io_in_hk),
+	.mgmt_gpio_out(mgmt_io_out_hk),
+	.mgmt_gpio_oeb(mgmt_io_oeb_hk),
+
+	.pwr_ctrl_out(pwr_ctrl_nc),	/* Not used in this version */
+
+        .trap(trap),
+
+	.user_clock(caravel_clk2),
+
+        .mask_rev_in(mask_rev),
+
+	.spimemio_flash_csb(flash_csb_core),
+	.spimemio_flash_clk(flash_clk_core),
+	.spimemio_flash_io0_oeb(flash_io0_oeb_core),
+	.spimemio_flash_io1_oeb(flash_io1_oeb_core),
+	.spimemio_flash_io2_oeb(flash_io2_oeb_core),
+	.spimemio_flash_io3_oeb(flash_io3_oeb_core),
+	.spimemio_flash_io0_do(flash_io0_do_core),
+	.spimemio_flash_io1_do(flash_io1_do_core),
+	.spimemio_flash_io2_do(flash_io2_do_core),
+	.spimemio_flash_io3_do(flash_io3_do_core),
+	.spimemio_flash_io0_di(flash_io0_di_core),
+	.spimemio_flash_io1_di(flash_io1_di_core),
+	.spimemio_flash_io2_di(flash_io2_di_core),
+	.spimemio_flash_io3_di(flash_io3_di_core),
+
+	.pad_flash_csb(flash_csb_frame),
+	.pad_flash_csb_oeb(flash_csb_oeb),
+	.pad_flash_clk(flash_clk_frame),
+	.pad_flash_clk_oeb(flash_clk_oeb),
+	.pad_flash_io0_oeb(flash_io0_oeb),
+	.pad_flash_io1_oeb(flash_io1_oeb),
+	.pad_flash_io0_ieb(flash_io0_ieb),
+	.pad_flash_io1_ieb(flash_io1_ieb),
+	.pad_flash_io0_do(flash_io0_do),
+	.pad_flash_io1_do(flash_io1_do),
+	.pad_flash_io0_di(flash_io0_di_buf),
+	.pad_flash_io1_di(flash_io1_di_buf),
+
+`ifdef USE_SRAM_RO_INTERFACE
+	.sram_ro_clk(hkspi_sram_clk),
+	.sram_ro_csb(hkspi_sram_csb),
+	.sram_ro_addr(hkspi_sram_addr),
+	.sram_ro_data(hkspi_sram_data),
+`endif
+
+	.usr1_vcc_pwrgood(mprj_vcc_pwrgood),
+	.usr2_vcc_pwrgood(mprj2_vcc_pwrgood),
+	.usr1_vdd_pwrgood(mprj_vdd_pwrgood),
+	.usr2_vdd_pwrgood(mprj2_vdd_pwrgood)
+    );
+
+    /* GPIO defaults (via programmed) */
+    wire [`MPRJ_IO_PADS*13-1:0] gpio_defaults;
+
+    /* Fixed defaults for the first 5 GPIO pins */
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h1803)
+    ) gpio_defaults_block_0 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[12:0])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h1803)
+    ) gpio_defaults_block_1 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[25:13])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0403)
+    ) gpio_defaults_block_2 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[38:26])
+    );
+
+    // CSB pin is set as an internal pull-up
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0801)
+    ) gpio_defaults_block_3 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[51:39])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(13'h0403)
+    ) gpio_defaults_block_4 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[64:52])
+    );
+
+    /* Via-programmable defaults for the rest of the GPIO pins */
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_5_INIT)
+    ) gpio_defaults_block_5 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[77:65])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_6_INIT)
+    ) gpio_defaults_block_6 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[90:78])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_7_INIT)
+    ) gpio_defaults_block_7 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[103:91])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_8_INIT)
+    ) gpio_defaults_block_8 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[116:104])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_9_INIT)
+    ) gpio_defaults_block_9 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[129:117])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_10_INIT)
+    ) gpio_defaults_block_10 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[142:130])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_11_INIT)
+    ) gpio_defaults_block_11 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[155:143])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_12_INIT)
+    ) gpio_defaults_block_12 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[168:156])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_13_INIT)
+    ) gpio_defaults_block_13 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[181:169])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_14_INIT)
+    ) gpio_defaults_block_14 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[194:182])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_15_INIT)
+    ) gpio_defaults_block_15 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[207:195])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_16_INIT)
+    ) gpio_defaults_block_16 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[220:208])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_17_INIT)
+    ) gpio_defaults_block_17 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[233:221])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_18_INIT)
+    ) gpio_defaults_block_18 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[246:234])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_19_INIT)
+    ) gpio_defaults_block_19 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[259:247])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_20_INIT)
+    ) gpio_defaults_block_20 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[272:260])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_21_INIT)
+    ) gpio_defaults_block_21 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[285:273])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_22_INIT)
+    ) gpio_defaults_block_22 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[298:286])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_23_INIT)
+    ) gpio_defaults_block_23 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[311:299])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_24_INIT)
+    ) gpio_defaults_block_24 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[324:312])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_25_INIT)
+    ) gpio_defaults_block_25 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[337:325])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_26_INIT)
+    ) gpio_defaults_block_26 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[350:338])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_27_INIT)
+    ) gpio_defaults_block_27 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[363:351])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_28_INIT)
+    ) gpio_defaults_block_28 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[376:364])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_29_INIT)
+    ) gpio_defaults_block_29 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[389:377])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_30_INIT)
+    ) gpio_defaults_block_30 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[402:390])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_31_INIT)
+    ) gpio_defaults_block_31 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[415:403])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_32_INIT)
+    ) gpio_defaults_block_32 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[428:416])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_33_INIT)
+    ) gpio_defaults_block_33 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[441:429])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_34_INIT)
+    ) gpio_defaults_block_34 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[454:442])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_35_INIT)
+    ) gpio_defaults_block_35 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[467:455])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_36_INIT)
+    ) gpio_defaults_block_36 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[480:468])
+    );
+
+    gpio_defaults_block #(
+	.GPIO_CONFIG_INIT(`USER_CONFIG_GPIO_37_INIT)
+    ) gpio_defaults_block_37 (
+    	`ifdef USE_POWER_PINS
+	    .VPWR(vccd_core),
+	    .VGND(vssd_core),
+        `endif
+	.gpio_defaults(gpio_defaults[493:481])
+    );
+
+    // Each control block sits next to an I/O pad in the user area.
+    // It gets input through a serial chain from the previous control
+    // block and passes it to the next control block.  Due to the nature
+    // of the shift register, bits are presented in reverse, as the first
+    // bit in ends up as the last bit of the last I/O pad control block.
+
+    // There are two types of block;  the first two and the last two
+    // are configured to be full bidirectional under control of the
+    // management Soc (JTAG and SDO for the first two;  flash_io2 and
+    // flash_io3 for the last two).  The rest are configured to be default
+    // (input).  Note that the first two and last two are the ones closest
+    // to the management SoC on either side, which minimizes the wire length
+    // of the extra signals those pads need.
+
+    /* First two GPIOs (JTAG and SDO) */
+
+    gpio_control_block gpio_control_bidir_1 [1:0] (
+    	`ifdef USE_POWER_PINS
+	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[25:0]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[1:0]),
+    	.serial_clock(gpio_clock_1_shifted[1:0]),
+    	.serial_load(gpio_load_1_shifted[1:0]),
+
+    	.resetn_out(gpio_resetn_1[1:0]),
+    	.serial_clock_out(gpio_clock_1[1:0]),
+    	.serial_load_out(gpio_load_1[1:0]),
+
+    	.mgmt_gpio_in(mgmt_io_in[1:0]),
+	.mgmt_gpio_out(mgmt_io_out[1:0]),
+	.mgmt_gpio_oeb(mgmt_io_oeb[1:0]),
+
+        .one(mprj_io_one[1:0]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[1:0]),
+    	.serial_data_out(gpio_serial_link_1[1:0]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[1:0]),
+    	.user_gpio_oeb(user_io_oeb[1:0]),
+    	.user_gpio_in(user_io_in[1:0]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[1:0]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[1:0]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[1:0]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[1:0]),
+    	.pad_gpio_holdover(mprj_io_holdover[1:0]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[1:0]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[1:0]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[1:0]),
+    	.pad_gpio_dm(mprj_io_dm[5:0]),
+    	.pad_gpio_outenb(mprj_io_oeb[1:0]),
+    	.pad_gpio_out(mprj_io_out[1:0]),
+    	.pad_gpio_in(mprj_io_in[1:0])
+    );
+
+    /* Section 1 GPIOs (GPIO 2 to 7) that start up under management control */
+
+    gpio_control_block gpio_control_in_1a [5:0] (
+        `ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[103:26]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[7:2]),
+    	.serial_clock(gpio_clock_1_shifted[7:2]),
+    	.serial_load(gpio_load_1_shifted[7:2]),
+
+    	.resetn_out(gpio_resetn_1[7:2]),
+    	.serial_clock_out(gpio_clock_1[7:2]),
+    	.serial_load_out(gpio_load_1[7:2]),
+
+	.mgmt_gpio_in(mgmt_io_in[7:2]),
+	.mgmt_gpio_out(mgmt_io_out[7:2]),
+	.mgmt_gpio_oeb(mprj_io_one[7:2]),
+
+        .one(mprj_io_one[7:2]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[7:2]),
+    	.serial_data_out(gpio_serial_link_1[7:2]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[7:2]),
+    	.user_gpio_oeb(user_io_oeb[7:2]),
+    	.user_gpio_in(user_io_in[7:2]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[7:2]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[7:2]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[7:2]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[7:2]),
+    	.pad_gpio_holdover(mprj_io_holdover[7:2]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[7:2]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[7:2]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[7:2]),
+    	.pad_gpio_dm(mprj_io_dm[23:6]),
+    	.pad_gpio_outenb(mprj_io_oeb[7:2]),
+    	.pad_gpio_out(mprj_io_out[7:2]),
+    	.pad_gpio_in(mprj_io_in[7:2])
+    );
+
+    /* Section 1 GPIOs (GPIO 8 to 18) */
+
+    gpio_control_block gpio_control_in_1 [`MPRJ_IO_PADS_1-9:0] (
+        `ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS_1*13-1):104]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_clock(gpio_clock_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_load(gpio_load_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+
+    	.resetn_out(gpio_resetn_1[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_clock_out(gpio_clock_1[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_load_out(gpio_load_1[(`MPRJ_IO_PADS_1-1):8]),
+
+	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS_1-1):8]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS_1-1):8]),
+	.mgmt_gpio_oeb(mprj_io_one[(`MPRJ_IO_PADS_1-1):8]),
+  
+        .one(mprj_io_one[(`MPRJ_IO_PADS_1-1):8]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_1_shifted[(`MPRJ_IO_PADS_1-1):8]),
+    	.serial_data_out(gpio_serial_link_1[(`MPRJ_IO_PADS_1-1):8]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS_1-1):8]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS_1-1):8]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS_1-1):8]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS_1*3-1):24]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS_1-1):8]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS_1-1):8])
+    );
+
+    /* Last three GPIOs (spi_sdo, flash_io2, and flash_io3) */
+
+    gpio_control_block gpio_control_bidir_2 [2:0] (
+    	`ifdef USE_POWER_PINS
+	    .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-1):(`MPRJ_IO_PADS*13-39)]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_clock(gpio_clock_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_load(gpio_load_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	.resetn_out(gpio_resetn_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_clock_out(gpio_clock_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_load_out(gpio_load_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+	.mgmt_gpio_oeb(mgmt_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+
+        .one(mprj_io_one[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+    	.serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-1):(`MPRJ_IO_PADS_2-3)]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-1):(`MPRJ_IO_PADS*3-9)]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-1):(`MPRJ_IO_PADS-3)])
+    );
+
+    /* Section 2 GPIOs (GPIO 19 to 34) */
+
+    gpio_control_block gpio_control_in_2 [`MPRJ_IO_PADS_2-4:0] (
+    	`ifdef USE_POWER_PINS
+            .vccd(vccd_core),
+	    .vssd(vssd_core),
+	    .vccd1(vccd1_core),
+	    .vssd1(vssd1_core),
+        `endif
+
+	.gpio_defaults(gpio_defaults[(`MPRJ_IO_PADS*13-40):(`MPRJ_IO_PADS_1*13)]),
+
+    	// Management Soc-facing signals
+
+    	.resetn(gpio_resetn_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_clock(gpio_clock_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_load(gpio_load_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+
+    	.resetn_out(gpio_resetn_2[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_clock_out(gpio_clock_2[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_load_out(gpio_load_2[(`MPRJ_IO_PADS_2-4):0]),
+
+	.mgmt_gpio_in(mgmt_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+	.mgmt_gpio_out(mgmt_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+	.mgmt_gpio_oeb(mprj_io_one[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+
+
+        .one(mprj_io_one[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+        .zero(),
+
+    	// Serial data chain for pad configuration
+    	.serial_data_in(gpio_serial_link_2_shifted[(`MPRJ_IO_PADS_2-4):0]),
+    	.serial_data_out(gpio_serial_link_2[(`MPRJ_IO_PADS_2-4):0]),
+
+    	// User-facing signals
+    	.user_gpio_out(user_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.user_gpio_oeb(user_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.user_gpio_in(user_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+
+    	// Pad-facing signals (Pad GPIOv2)
+    	.pad_gpio_inenb(mprj_io_inp_dis[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ib_mode_sel(mprj_io_ib_mode_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_vtrip_sel(mprj_io_vtrip_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_slow_sel(mprj_io_slow_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_holdover(mprj_io_holdover[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_en(mprj_io_analog_en[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_sel(mprj_io_analog_sel[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_ana_pol(mprj_io_analog_pol[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_dm(mprj_io_dm[(`MPRJ_IO_PADS*3-10):(`MPRJ_IO_PADS_1*3)]),
+    	.pad_gpio_outenb(mprj_io_oeb[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_out(mprj_io_out[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)]),
+    	.pad_gpio_in(mprj_io_in[(`MPRJ_IO_PADS-4):(`MPRJ_IO_PADS_1)])
+    );
+
+    user_id_programming #(
+	.USER_PROJECT_ID(USER_PROJECT_ID)
+    ) user_id_value (
+	`ifdef USE_POWER_PINS
+		.VPWR(vccd_core),
+		.VGND(vssd_core),
+	`endif
+	.mask_rev(mask_rev)
+    );
+
+    // Power-on-reset circuit
+    simple_por por (
+	`ifdef USE_POWER_PINS
+		.vdd3v3(vddio_core),
+		.vdd1v8(vccd_core),
+		.vss3v3(vssio_core),
+		.vss1v8(vssd_core),
+	`endif
+		.porb_h(porb_h),
+		.porb_l(porb_l),
+		.por_l(por_l)
+    );
+
+    // XRES (chip input pin reset) reset level converter
+    xres_buf rstb_level (
+	`ifdef USE_POWER_PINS
+		.VPWR(vddio_core),
+		.LVPWR(vccd_core),
+		.LVGND(vssd_core),
+		.VGND(vssio_core),
+	`endif
+		.A(rstb_h),
+		.X(rstb_l)
+    );
+
+    /* Spare logic for metal mask fixes */
+    // `define NUM_SPARE_BLOCKS (`MPRJ_IO_PADS+4)
+    `define NUM_SPARE_BLOCKS 4
+
+    wire [(27*`NUM_SPARE_BLOCKS)-1:0] spare_xz_nc;
+    wire [(4*`NUM_SPARE_BLOCKS)-1:0] spare_xi_nc;
+    wire [(1*`NUM_SPARE_BLOCKS)-1:0] spare_xib_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xna_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xno_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xmx_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xfq_nc;
+    wire [(2*`NUM_SPARE_BLOCKS)-1:0] spare_xfqn_nc;
+
+    // Four spare logic blocks above the processor and one per GPIO
+    // control block.
+    spare_logic_block spare_logic [`NUM_SPARE_BLOCKS-1:0] (
+	`ifdef USE_POWER_PINS
+		.vccd(vccd_core),
+		.vssd(vssd_core),
+	`endif
+		.spare_xz(spare_xz_nc),
+		.spare_xi(spare_xi_nc),
+		.spare_xib(spare_xib_nc),
+		.spare_xna(spare_xna_nc),
+		.spare_xno(spare_xno_nc),
+		.spare_xmx(spare_xmx_nc),
+		.spare_xfq(spare_xfq_nc),
+		.spare_xfqn(spare_xfqn_nc)
+    );
+
+    `ifdef TOP_ROUTING
+    caravel_power_routing caravel_power_routing();
+    copyright_block copyright_block();
+    caravel_logo caravel_logo();
+    caravel_motto caravel_motto();
+    open_source open_source();
+    user_id_textblock user_id_textblock();
+    `endif
+
+endmodule
+// `default_nettype wire