Modified cpu RTL to stop clock after HALT instruction
diff --git a/def/user_project_wrapper.def b/def/user_project_wrapper.def
index 4858398..7e8575d 100644
--- a/def/user_project_wrapper.def
+++ b/def/user_project_wrapper.def
@@ -7226,8 +7226,8 @@
NEW met2 ( 1479130 1992570 ) ( * 2220030 )
NEW met2 ( 1770770 1992570 ) ( * 2000220 0 )
NEW met1 ( 1277190 2220030 ) ( 1479130 * )
- NEW met1 ( 1157130 2230230 ) ( 1277190 * )
NEW met1 ( 1479130 1992570 ) ( 1770770 * )
+ NEW met1 ( 1157130 2230230 ) ( 1277190 * )
NEW met1 ( 1157130 2230230 ) M1M2_PR
NEW met1 ( 1277190 2230230 ) M1M2_PR
NEW met1 ( 1277190 2220030 ) M1M2_PR
@@ -7257,8 +7257,8 @@
NEW met2 ( 1158510 2230060 ) ( * 2243660 )
NEW met4 ( 1466020 1989340 ) ( * 2243660 )
NEW met2 ( 1896350 1989340 ) ( * 2000220 0 )
- NEW met3 ( 1158510 2243660 ) ( 1466020 * )
NEW met3 ( 1466020 1989340 ) ( 1896350 * )
+ NEW met3 ( 1158510 2243660 ) ( 1466020 * )
NEW met2 ( 1158510 2243660 ) M2M3_PR
NEW met3 ( 1466020 2243660 ) M3M4_PR
NEW met3 ( 1466020 1989340 ) M3M4_PR
@@ -8230,7 +8230,7 @@
- analog_io[8] ( PIN analog_io[8] ) + USE SIGNAL ;
- analog_io[9] ( PIN analog_io[9] ) + USE SIGNAL ;
- clk ( mprj soc_clk ) ( memLword3 clk0 ) ( memLword2 clk0 ) ( memLword1 clk0 ) ( memLword0 clk0 ) ( memHword3 clk0 ) ( memHword2 clk0 )
- ( memHword1 clk0 ) ( memHword0 clk0 ) ( cpu0 clk ) + USE SIGNAL
+ ( memHword1 clk0 ) ( memHword0 clk0 ) ( cpu0 clkin ) + USE SIGNAL
+ ROUTED met2 ( 1277190 2248420 ) ( * 2253010 )
NEW met2 ( 1282250 2219860 0 ) ( * 2248420 )
NEW met4 ( 1282020 2208300 ) ( * 2220540 )
@@ -8274,10 +8274,10 @@
NEW met3 ( 1497300 3041300 ) ( * 3041670 )
NEW met3 ( 1497300 3041670 ) ( 1500060 * 0 )
NEW met2 ( 1873810 1993420 ) ( * 2000220 0 )
+ NEW met3 ( 1301340 1993420 ) ( 1873810 * )
NEW met1 ( 937250 2253010 ) ( 1277190 * )
NEW met2 ( 1488330 2442050 ) ( * 3041300 )
NEW met1 ( 1460270 2442050 ) ( 2039410 * )
- NEW met3 ( 1301340 1993420 ) ( 1873810 * )
NEW met1 ( 392150 2448510 ) M1M2_PR
NEW met1 ( 392610 2998630 ) M1M2_PR
NEW met2 ( 1277190 2248420 ) M2M3_PR
@@ -8347,15 +8347,15 @@
NEW met1 ( 1920730 2278850 ) M1M2_PR ;
- cpdatin\[12\] ( mprj data_to_cpu[12] ) ( cpu0 datain[12] ) + USE SIGNAL
+ ROUTED met3 ( 1919580 2037620 0 ) ( 1925330 * )
- NEW met2 ( 1469470 2006850 ) ( * 2225810 )
- NEW met2 ( 1925330 2006850 ) ( * 2037620 )
+ NEW met2 ( 1469470 2007870 ) ( * 2225810 )
+ NEW met2 ( 1925330 2007870 ) ( * 2037620 )
NEW met2 ( 1259250 2219860 0 ) ( * 2225810 )
NEW met1 ( 1259250 2225810 ) ( 1469470 * )
- NEW met1 ( 1469470 2006850 ) ( 1925330 * )
+ NEW met1 ( 1469470 2007870 ) ( 1925330 * )
NEW met1 ( 1469470 2225810 ) M1M2_PR
NEW met2 ( 1925330 2037620 ) M2M3_PR
- NEW met1 ( 1469470 2006850 ) M1M2_PR
- NEW met1 ( 1925330 2006850 ) M1M2_PR
+ NEW met1 ( 1469470 2007870 ) M1M2_PR
+ NEW met1 ( 1925330 2007870 ) M1M2_PR
NEW met1 ( 1259250 2225810 ) M1M2_PR ;
- cpdatin\[13\] ( mprj data_to_cpu[13] ) ( cpu0 datain[13] ) + USE SIGNAL
+ ROUTED met2 ( 1263850 2236180 ) ( 1265690 * )
@@ -8371,8 +8371,8 @@
+ ROUTED met2 ( 1272130 2219860 0 ) ( * 2221900 )
NEW met3 ( 1272130 2221900 ) ( 1307780 * )
NEW met4 ( 1307780 1992740 ) ( * 2221900 )
- NEW met2 ( 1580790 1992740 ) ( * 2000220 0 )
NEW met3 ( 1307780 1992740 ) ( 1580790 * )
+ NEW met2 ( 1580790 1992740 ) ( * 2000220 0 )
NEW met2 ( 1272130 2221900 ) M2M3_PR
NEW met3 ( 1307780 2221900 ) M3M4_PR
NEW met3 ( 1307780 1992740 ) M3M4_PR
@@ -8454,9 +8454,9 @@
- cpdatin\[6\] ( mprj data_to_cpu[6] ) ( cpu0 datain[6] ) + USE SIGNAL
+ ROUTED met2 ( 1468550 1993250 ) ( * 2225470 )
NEW met2 ( 1812630 1993250 ) ( * 2000220 0 )
+ NEW met1 ( 1468550 1993250 ) ( 1812630 * )
NEW met2 ( 1220610 2219860 0 ) ( * 2225470 )
NEW met1 ( 1220610 2225470 ) ( 1468550 * )
- NEW met1 ( 1468550 1993250 ) ( 1812630 * )
NEW met1 ( 1468550 2225470 ) M1M2_PR
NEW met1 ( 1468550 1993250 ) M1M2_PR
NEW met1 ( 1812630 1993250 ) M1M2_PR
@@ -8464,13 +8464,13 @@
- cpdatin\[7\] ( mprj data_to_cpu[7] ) ( cpu0 datain[7] ) + USE SIGNAL
+ ROUTED met2 ( 1469010 1992910 ) ( * 2213060 )
NEW met2 ( 1790090 1992910 ) ( * 2000220 0 )
+ NEW met1 ( 1469010 1992910 ) ( 1790090 * )
NEW met4 ( 1227740 2213060 ) ( * 2219860 )
NEW met3 ( 1227510 2219860 ) ( 1227740 * )
NEW met2 ( 1227510 2219350 ) ( * 2219860 )
NEW met2 ( 1227050 2219350 ) ( 1227510 * )
NEW met2 ( 1227050 2219180 0 ) ( * 2219350 )
NEW met3 ( 1227740 2213060 ) ( 1469010 * )
- NEW met1 ( 1469010 1992910 ) ( 1790090 * )
NEW met2 ( 1469010 2213060 ) M2M3_PR
NEW met1 ( 1469010 1992910 ) M1M2_PR
NEW met1 ( 1790090 1992910 ) M1M2_PR
@@ -8505,9 +8505,9 @@
- cpdatout\[0\] ( mprj data_from_cpu[0] ) ( cpu0 dataout[0] ) + USE SIGNAL
+ ROUTED met2 ( 1467630 1992230 ) ( * 2224110 )
NEW met2 ( 1748230 1992230 ) ( * 2000220 0 )
+ NEW met1 ( 1467630 1992230 ) ( 1748230 * )
NEW met2 ( 1177370 2219860 0 ) ( * 2224110 )
NEW met1 ( 1177370 2224110 ) ( 1467630 * )
- NEW met1 ( 1467630 1992230 ) ( 1748230 * )
NEW met1 ( 1467630 2224110 ) M1M2_PR
NEW met1 ( 1467630 1992230 ) M1M2_PR
NEW met1 ( 1748230 1992230 ) M1M2_PR
@@ -8527,11 +8527,11 @@
NEW met2 ( 1831950 1990870 ) ( * 2000220 0 )
NEW met1 ( 1290300 2215950 ) ( * 2216970 )
NEW met1 ( 1290300 2215950 ) ( 1377470 * )
+ NEW met1 ( 1377470 1990870 ) ( 1831950 * )
NEW met2 ( 1248670 2216970 ) ( * 2219350 )
NEW met2 ( 1248210 2219350 ) ( 1248670 * )
NEW met2 ( 1248210 2219180 0 ) ( * 2219350 )
NEW met1 ( 1248670 2216970 ) ( 1290300 * )
- NEW met1 ( 1377470 1990870 ) ( 1831950 * )
NEW met1 ( 1377470 2215950 ) M1M2_PR
NEW met1 ( 1377470 1990870 ) M1M2_PR
NEW met1 ( 1831950 1990870 ) M1M2_PR
@@ -8561,13 +8561,15 @@
NEW met2 ( 1704990 2003620 ) ( 1706370 * 0 )
NEW met2 ( 1704990 2003450 ) ( * 2003620 )
NEW met2 ( 1261090 2219860 0 ) ( * 2243150 )
+ NEW met1 ( 1593900 2003110 ) ( * 2004130 )
NEW met1 ( 1683600 2003450 ) ( 1704990 * )
NEW met1 ( 1683600 2003110 ) ( * 2003450 )
- NEW met1 ( 1466710 2004470 ) ( 1511100 * )
- NEW met1 ( 1511100 2003790 ) ( * 2004470 )
- NEW met1 ( 1573200 2003110 ) ( 1683600 * )
- NEW met1 ( 1573200 2003110 ) ( * 2003790 )
- NEW met1 ( 1511100 2003790 ) ( 1573200 * )
+ NEW met1 ( 1593900 2003110 ) ( 1683600 * )
+ NEW met1 ( 1573200 2004130 ) ( 1593900 * )
+ NEW met1 ( 1466710 2004470 ) ( 1524900 * )
+ NEW met1 ( 1524900 2003790 ) ( * 2004470 )
+ NEW met1 ( 1524900 2003790 ) ( 1573200 * )
+ NEW met1 ( 1573200 2003790 ) ( * 2004130 )
NEW met1 ( 1261090 2243150 ) M1M2_PR
NEW met1 ( 1466710 2243150 ) M1M2_PR
NEW met1 ( 1466710 2004470 ) M1M2_PR
@@ -8610,24 +8612,31 @@
NEW met3 ( 1190250 2220540 ) ( 1190940 * )
NEW met2 ( 1190250 2219860 0 ) ( * 2220540 )
NEW met3 ( 1190940 2212380 ) ( 1464870 * )
- NEW met1 ( 1464870 2005150 ) ( 1504200 * )
- NEW met1 ( 1504200 2005150 ) ( * 2006170 )
- NEW met1 ( 1504200 2006170 ) ( 1518000 * )
- NEW met1 ( 1518000 2006170 ) ( * 2006510 )
- NEW met1 ( 1584930 2004470 ) ( * 2006510 )
- NEW met1 ( 1518000 2006510 ) ( 1584930 * )
- NEW met1 ( 1584930 2004470 ) ( 1600800 * )
- NEW met2 ( 1621730 2003620 ) ( 1622650 * 0 )
- NEW met2 ( 1621730 2003450 ) ( * 2003620 )
- NEW met1 ( 1621730 2003450 ) ( * 2004130 )
- NEW met1 ( 1600800 2004130 ) ( 1621730 * )
- NEW met1 ( 1600800 2004130 ) ( * 2004470 )
+ NEW met2 ( 1621270 2003620 ) ( 1622650 * 0 )
+ NEW met2 ( 1621270 2003450 ) ( * 2003620 )
+ NEW met1 ( 1608850 2003450 ) ( 1621270 * )
+ NEW met1 ( 1608850 2003450 ) ( * 2004810 )
+ NEW met1 ( 1593900 2004810 ) ( 1608850 * )
+ NEW met1 ( 1593900 2004470 ) ( * 2004810 )
+ NEW met1 ( 1587000 2004470 ) ( 1593900 * )
+ NEW met1 ( 1587000 2004470 ) ( * 2005490 )
+ NEW met1 ( 1571130 2005490 ) ( * 2006170 )
+ NEW met1 ( 1571130 2005490 ) ( 1587000 * )
+ NEW met1 ( 1541690 2004810 ) ( * 2005150 )
+ NEW met1 ( 1541690 2004810 ) ( 1546290 * )
+ NEW met1 ( 1546290 2004810 ) ( * 2006170 )
+ NEW met1 ( 1546290 2006170 ) ( 1571130 * )
+ NEW met1 ( 1518000 2005150 ) ( 1541690 * )
+ NEW met1 ( 1493850 2005150 ) ( * 2005490 )
+ NEW met1 ( 1493850 2005490 ) ( 1518000 * )
+ NEW met1 ( 1518000 2005150 ) ( * 2005490 )
+ NEW met1 ( 1464870 2005150 ) ( 1493850 * )
NEW met2 ( 1464870 2212380 ) M2M3_PR
NEW met1 ( 1464870 2005150 ) M1M2_PR
NEW met3 ( 1190940 2212380 ) M3M4_PR
NEW met3 ( 1190940 2220540 ) M3M4_PR
NEW met2 ( 1190250 2220540 ) M2M3_PR
- NEW met1 ( 1621730 2003450 ) M1M2_PR ;
+ NEW met1 ( 1621270 2003450 ) M1M2_PR ;
- cpdatout\[3\] ( mprj data_from_cpu[3] ) ( cpu0 dataout[3] ) + USE SIGNAL
+ ROUTED met3 ( 1486950 2041020 ) ( 1500980 * 0 )
NEW met2 ( 1486950 2041020 ) ( * 2218670 )
@@ -8697,34 +8706,34 @@
NEW met1 ( 1228430 2239070 ) M1M2_PR ;
- cpdatout\[9\] ( mprj data_from_cpu[9] ) ( cpu0 dataout[9] ) + USE SIGNAL
+ ROUTED met2 ( 1467170 2005490 ) ( * 2242810 )
+ NEW met2 ( 1538010 2003450 ) ( * 2003620 )
+ NEW met2 ( 1538010 2003620 ) ( 1538930 * 0 )
NEW met1 ( 1235330 2242810 ) ( 1467170 * )
NEW met2 ( 1490170 2003450 ) ( * 2005490 )
NEW met1 ( 1467170 2005490 ) ( 1490170 * )
+ NEW met1 ( 1490170 2003450 ) ( 1538010 * )
NEW met2 ( 1235330 2219860 0 ) ( * 2242810 )
- NEW met2 ( 1537550 2003450 ) ( * 2003620 )
- NEW met2 ( 1537550 2003620 ) ( 1538930 * 0 )
- NEW met1 ( 1490170 2003450 ) ( 1537550 * )
NEW met1 ( 1467170 2242810 ) M1M2_PR
NEW met1 ( 1467170 2005490 ) M1M2_PR
+ NEW met1 ( 1538010 2003450 ) M1M2_PR
NEW met1 ( 1235330 2242810 ) M1M2_PR
NEW met1 ( 1490170 2005490 ) M1M2_PR
- NEW met1 ( 1490170 2003450 ) M1M2_PR
- NEW met1 ( 1537550 2003450 ) M1M2_PR ;
+ NEW met1 ( 1490170 2003450 ) M1M2_PR ;
- cpuen ( mprj en_from_cpu ) ( cpu0 en ) + USE SIGNAL
+ ROUTED met1 ( 1152070 2215610 ) ( * 2216970 )
NEW met2 ( 1152070 2216970 ) ( * 2220370 )
NEW met2 ( 1151610 2220370 ) ( 1152070 * )
NEW met2 ( 1151610 2219860 0 ) ( * 2220370 )
NEW met2 ( 1377010 1991210 ) ( * 2215610 )
+ NEW met1 ( 1377010 1991210 ) ( 1561470 * )
NEW met1 ( 1269600 2215610 ) ( 1377010 * )
NEW met1 ( 1269600 2215610 ) ( * 2215950 )
+ NEW met2 ( 1561470 1991210 ) ( * 2000220 0 )
NEW met1 ( 1152070 2215610 ) ( 1159200 * )
NEW met1 ( 1159200 2215610 ) ( * 2217310 )
NEW met1 ( 1215090 2215950 ) ( * 2217310 )
NEW met1 ( 1159200 2217310 ) ( 1215090 * )
NEW met1 ( 1215090 2215950 ) ( 1269600 * )
- NEW met2 ( 1561470 1991210 ) ( * 2000220 0 )
- NEW met1 ( 1377010 1991210 ) ( 1561470 * )
NEW met1 ( 1152070 2216970 ) M1M2_PR
NEW met1 ( 1377010 2215610 ) M1M2_PR
NEW met1 ( 1377010 1991210 ) M1M2_PR
@@ -8745,33 +8754,27 @@
NEW met1 ( 1150690 2249610 ) ( 1466250 * )
NEW met2 ( 1662670 2003620 ) ( 1664510 * 0 )
NEW met2 ( 1662670 2003450 ) ( * 2003620 )
- NEW met1 ( 1466250 2004810 ) ( 1518000 * )
- NEW met1 ( 1518000 2004470 ) ( * 2004810 )
- NEW met1 ( 1518000 2004470 ) ( 1559400 * )
- NEW met1 ( 1559400 2004130 ) ( * 2004470 )
- NEW met1 ( 1559400 2004130 ) ( 1573890 * )
- NEW met1 ( 1573890 2003790 ) ( * 2004130 )
- NEW met1 ( 1573890 2003790 ) ( 1600800 * )
- NEW met1 ( 1600800 2003450 ) ( * 2003790 )
- NEW met1 ( 1600800 2003450 ) ( 1620810 * )
- NEW met2 ( 1620810 2002770 ) ( * 2003450 )
- NEW met1 ( 1620810 2002770 ) ( 1624950 * )
- NEW met2 ( 1624950 2002770 ) ( * 2003450 )
- NEW met1 ( 1624950 2003450 ) ( 1662670 * )
+ NEW met1 ( 1635300 2003450 ) ( 1662670 * )
+ NEW met1 ( 1635300 2003450 ) ( * 2006170 )
+ NEW met1 ( 1573200 2006170 ) ( 1635300 * )
+ NEW met1 ( 1573200 2006170 ) ( * 2006510 )
+ NEW met1 ( 1566300 2006510 ) ( 1573200 * )
+ NEW met1 ( 1566300 2006510 ) ( * 2006850 )
+ NEW met2 ( 1486030 2004810 ) ( * 2006850 )
+ NEW met1 ( 1466250 2004810 ) ( 1486030 * )
+ NEW met1 ( 1486030 2006850 ) ( 1566300 * )
NEW met1 ( 1150690 2249610 ) M1M2_PR
NEW met1 ( 1466250 2249610 ) M1M2_PR
NEW met1 ( 1466250 2004810 ) M1M2_PR
NEW met1 ( 1662670 2003450 ) M1M2_PR
- NEW met1 ( 1620810 2003450 ) M1M2_PR
- NEW met1 ( 1620810 2002770 ) M1M2_PR
- NEW met1 ( 1624950 2002770 ) M1M2_PR
- NEW met1 ( 1624950 2003450 ) M1M2_PR ;
+ NEW met1 ( 1486030 2004810 ) M1M2_PR
+ NEW met1 ( 1486030 2006850 ) M1M2_PR ;
- enkbd ( mprj en_keyboard ) ( cpu0 en_inp ) + USE SIGNAL
+ ROUTED met2 ( 1152530 2219860 0 ) ( * 2222750 )
NEW met2 ( 1493390 1991550 ) ( * 2222750 )
+ NEW met1 ( 1493390 1991550 ) ( 1603330 * )
NEW met1 ( 1152530 2222750 ) ( 1493390 * )
NEW met2 ( 1603330 1991550 ) ( * 2000220 0 )
- NEW met1 ( 1493390 1991550 ) ( 1603330 * )
NEW met1 ( 1152530 2222750 ) M1M2_PR
NEW met1 ( 1493390 2222750 ) M1M2_PR
NEW met1 ( 1493390 1991550 ) M1M2_PR
@@ -9087,10 +9090,10 @@
NEW met1 ( 997970 2225810 ) ( 1131370 * )
NEW met3 ( 1131370 2229380 ) ( 1320660 * )
NEW met3 ( 1607700 1994100 ) ( 1608620 * )
+ NEW met3 ( 1560780 1994100 ) ( * 1994780 )
+ NEW met3 ( 1560780 1994780 ) ( 1607700 * )
NEW met3 ( 1607700 1994100 ) ( * 1994780 )
- NEW met3 ( 1573200 1994780 ) ( 1607700 * )
- NEW met3 ( 1573200 1994100 ) ( * 1994780 )
- NEW met3 ( 1320660 1994100 ) ( 1573200 * )
+ NEW met3 ( 1320660 1994100 ) ( 1560780 * )
NEW met1 ( 997970 2225810 ) M1M2_PR
NEW met2 ( 16790 1596300 ) M2M3_PR
NEW met1 ( 16790 1600550 ) M1M2_PR
@@ -9198,8 +9201,8 @@
NEW met1 ( 1498450 2003790 ) ( 1499370 * )
NEW met2 ( 1498450 1991890 ) ( * 2003790 )
NEW met2 ( 1499370 2003790 ) ( * 2222070 )
- NEW met1 ( 1004410 2222070 ) ( 1499370 * )
NEW met1 ( 1498450 1991890 ) ( 1728910 * )
+ NEW met1 ( 1004410 2222070 ) ( 1499370 * )
NEW met2 ( 17250 358020 ) M2M3_PR
NEW met1 ( 17250 358530 ) M1M2_PR
NEW met1 ( 1728910 1991890 ) M1M2_PR
@@ -10035,9 +10038,9 @@
NEW met2 ( 1645190 1995460 ) ( * 2000220 0 )
NEW met2 ( 1116650 2219860 0 ) ( * 2239410 )
NEW met3 ( 1116650 2232780 ) ( 1293060 * )
- NEW met3 ( 1293060 1994780 ) ( 1524900 * )
- NEW met3 ( 1524900 1994780 ) ( * 1995460 )
- NEW met3 ( 1524900 1995460 ) ( 1645190 * )
+ NEW met3 ( 1293060 1994780 ) ( 1559400 * )
+ NEW met3 ( 1559400 1994780 ) ( * 1995460 )
+ NEW met3 ( 1559400 1995460 ) ( 1645190 * )
NEW met1 ( 19090 2239410 ) M1M2_PR
NEW met2 ( 19090 3095700 ) M2M3_PR
NEW met1 ( 1116650 2239410 ) M1M2_PR
@@ -10077,9 +10080,9 @@
NEW met2 ( 1121250 2256300 ) ( 1122170 * )
NEW met2 ( 1121250 2256300 ) ( * 2322030 )
NEW met2 ( 1497070 1993590 ) ( * 2242980 )
+ NEW met1 ( 1497070 1993590 ) ( 1854490 * )
NEW met2 ( 1122170 2219860 0 ) ( * 2256300 )
NEW met3 ( 1122170 2242980 ) ( 1497070 * )
- NEW met1 ( 1497070 1993590 ) ( 1854490 * )
NEW met1 ( 20470 2322030 ) M1M2_PR
NEW met2 ( 20470 2574140 ) M2M3_PR
NEW met1 ( 1854490 1993590 ) M1M2_PR
@@ -10374,10 +10377,10 @@
+ ROUTED met2 ( 2415230 82800 ) ( 2420290 * )
NEW met2 ( 2420290 1700 0 ) ( * 82800 )
NEW met2 ( 2415230 82800 ) ( * 1987300 )
+ NEW met3 ( 1269600 1987300 ) ( 2415230 * )
NEW met3 ( 1239930 1990020 ) ( 1269600 * )
NEW met3 ( 1269600 1987300 ) ( * 1990020 )
NEW met2 ( 1239930 1990020 ) ( * 2000220 0 )
- NEW met3 ( 1269600 1987300 ) ( 2415230 * )
NEW met2 ( 2415230 1987300 ) M2M3_PR
NEW met2 ( 1239930 1990020 ) M2M3_PR ;
- la_data_in[102] ( PIN la_data_in[102] ) ( mprj la_data_in[102] ) + USE SIGNAL
@@ -10396,12 +10399,12 @@
NEW met2 ( 2453870 1700 ) ( * 17850 )
NEW met1 ( 2449730 17850 ) ( 2453870 * )
NEW met3 ( 1290300 1991380 ) ( * 1993420 )
+ NEW met3 ( 1290300 1991380 ) ( 2449730 * )
NEW met2 ( 2449730 17850 ) ( * 1991380 )
NEW met3 ( 1242690 1995460 ) ( 1266380 * )
NEW met2 ( 1242690 1995460 ) ( * 2000220 0 )
NEW met3 ( 1266380 1993420 ) ( * 1995460 )
NEW met3 ( 1266380 1993420 ) ( 1290300 * )
- NEW met3 ( 1290300 1991380 ) ( 2449730 * )
NEW met1 ( 2453870 17850 ) M1M2_PR
NEW met1 ( 2449730 17850 ) M1M2_PR
NEW met2 ( 2449730 1991380 ) M2M3_PR
@@ -10410,10 +10413,10 @@
+ ROUTED met3 ( 1282020 1990700 ) ( * 1992740 )
NEW met2 ( 2470430 82800 ) ( 2473650 * )
NEW met2 ( 2473650 1700 0 ) ( * 82800 )
+ NEW met3 ( 1282020 1990700 ) ( 2470430 * )
NEW met2 ( 2470430 82800 ) ( * 1990700 )
NEW met2 ( 1244070 1992740 ) ( * 2000220 0 )
NEW met3 ( 1244070 1992740 ) ( 1282020 * )
- NEW met3 ( 1282020 1990700 ) ( 2470430 * )
NEW met2 ( 2470430 1990700 ) M2M3_PR
NEW met2 ( 1244070 1992740 ) M2M3_PR ;
- la_data_in[105] ( PIN la_data_in[105] ) ( mprj la_data_in[105] ) + USE SIGNAL
@@ -10449,9 +10452,9 @@
NEW met2 ( 2539430 82800 ) ( 2544490 * )
NEW met2 ( 2544490 1700 0 ) ( * 82800 )
NEW met2 ( 2539430 82800 ) ( * 1990020 )
+ NEW met3 ( 1281100 1990020 ) ( 2539430 * )
NEW met2 ( 1249590 1990700 ) ( * 2000220 0 )
NEW met3 ( 1249590 1990700 ) ( 1281100 * )
- NEW met3 ( 1281100 1990020 ) ( 2539430 * )
NEW met2 ( 2539430 1990020 ) M2M3_PR
NEW met2 ( 1249590 1990700 ) M2M3_PR ;
- la_data_in[109] ( PIN la_data_in[109] ) ( mprj la_data_in[109] ) + USE SIGNAL
@@ -10527,9 +10530,9 @@
NEW met2 ( 2629130 82800 ) ( * 1987470 )
NEW met1 ( 1281330 1987810 ) ( 1290300 * )
NEW met1 ( 1290300 1987470 ) ( * 1987810 )
+ NEW met1 ( 1290300 1987470 ) ( 2629130 * )
NEW met2 ( 1256490 1991380 ) ( * 2000220 0 )
NEW met3 ( 1256490 1991380 ) ( 1281330 * )
- NEW met1 ( 1290300 1987470 ) ( 2629130 * )
NEW met1 ( 1281330 1987810 ) M1M2_PR
NEW met2 ( 1281330 1991380 ) M2M3_PR
NEW met1 ( 2629130 1987470 ) M1M2_PR
@@ -12556,8 +12559,8 @@
+ ROUTED met2 ( 1172770 1986620 ) ( * 2000220 0 )
NEW met2 ( 1552730 82800 ) ( 1557330 * )
NEW met2 ( 1557330 1700 0 ) ( * 82800 )
- NEW met3 ( 1172770 1986620 ) ( 1552730 * )
NEW met2 ( 1552730 82800 ) ( * 1986620 )
+ NEW met3 ( 1172770 1986620 ) ( 1552730 * )
NEW met2 ( 1172770 1986620 ) M2M3_PR
NEW met2 ( 1552730 1986620 ) M2M3_PR ;
- la_data_out[53] ( PIN la_data_out[53] ) ( mprj la_data_out[53] ) + USE SIGNAL
@@ -12663,12 +12666,12 @@
NEW met2 ( 1711430 82800 ) ( 1714650 * )
NEW met2 ( 1714650 1700 ) ( * 82800 )
NEW met2 ( 1711430 82800 ) ( * 1984750 )
+ NEW met1 ( 1269600 1984750 ) ( 1711430 * )
NEW met1 ( 1269600 1984750 ) ( * 1985430 )
NEW met1 ( 1221300 1985430 ) ( 1269600 * )
NEW met1 ( 1185190 1985770 ) ( 1221300 * )
NEW met1 ( 1221300 1985430 ) ( * 1985770 )
NEW met2 ( 1185190 1985770 ) ( * 2000220 0 )
- NEW met1 ( 1269600 1984750 ) ( 1711430 * )
NEW met1 ( 1711430 1984750 ) M1M2_PR
NEW met1 ( 1185190 1985770 ) M1M2_PR ;
- la_data_out[62] ( PIN la_data_out[62] ) ( mprj la_data_out[62] ) + USE SIGNAL
@@ -12866,9 +12869,9 @@
NEW met2 ( 2018250 1700 0 ) ( * 82800 )
NEW met2 ( 2015030 82800 ) ( * 1984410 )
NEW met1 ( 1245450 1984410 ) ( * 1985090 )
+ NEW met1 ( 1245450 1984410 ) ( 2015030 * )
NEW met2 ( 1208650 1985090 ) ( * 2000220 0 )
NEW met1 ( 1208650 1985090 ) ( 1245450 * )
- NEW met1 ( 1245450 1984410 ) ( 2015030 * )
NEW met1 ( 2015030 1984410 ) M1M2_PR
NEW met1 ( 1208650 1985090 ) M1M2_PR ;
- la_data_out[79] ( PIN la_data_out[79] ) ( mprj la_data_out[79] ) + USE SIGNAL
@@ -12970,9 +12973,9 @@
NEW met2 ( 1219690 1994780 ) ( * 2000220 0 )
NEW met2 ( 2159930 5780 ) ( * 1983900 )
NEW met2 ( 1221990 1983900 ) ( * 1993420 )
+ NEW met3 ( 1221990 1983900 ) ( 2159930 * )
NEW met3 ( 1220380 1993420 ) ( * 1994780 )
NEW met3 ( 1220380 1993420 ) ( 1221990 * )
- NEW met3 ( 1221990 1983900 ) ( 2159930 * )
NEW met2 ( 1219690 1994780 ) M2M3_PR
NEW met2 ( 2159930 1983900 ) M2M3_PR
NEW met2 ( 1221990 1993420 ) M2M3_PR
@@ -13480,8 +13483,8 @@
- la_oenb[125] ( PIN la_oenb[125] ) ( mprj la_oenb[125] ) + USE SIGNAL
+ ROUTED met2 ( 1273970 1969790 ) ( * 2000220 0 )
NEW met2 ( 2856830 1700 ) ( 2857750 * 0 )
- NEW met2 ( 2856830 1700 ) ( * 1969790 )
NEW met1 ( 1273970 1969790 ) ( 2856830 * )
+ NEW met2 ( 2856830 1700 ) ( * 1969790 )
NEW met1 ( 1273970 1969790 ) M1M2_PR
NEW met1 ( 2856830 1969790 ) M1M2_PR ;
- la_oenb[126] ( PIN la_oenb[126] ) ( mprj la_oenb[126] ) + USE SIGNAL
@@ -13985,8 +13988,8 @@
NEW met2 ( 1170470 1988150 ) ( * 2000220 0 )
NEW met2 ( 1525130 82800 ) ( 1527890 * )
NEW met2 ( 1527890 1700 0 ) ( * 82800 )
- NEW met1 ( 1172310 1972510 ) ( 1525130 * )
NEW met2 ( 1525130 82800 ) ( * 1972510 )
+ NEW met1 ( 1172310 1972510 ) ( 1525130 * )
NEW met1 ( 1172310 1972510 ) M1M2_PR
NEW met1 ( 1172310 1988150 ) M1M2_PR
NEW met1 ( 1170470 1988150 ) M1M2_PR
@@ -14249,9 +14252,9 @@
NEW met2 ( 1864610 1700 0 ) ( * 82800 )
NEW met2 ( 1863230 82800 ) ( * 1970470 )
NEW met2 ( 1234870 1970470 ) ( * 1988150 )
+ NEW met1 ( 1234870 1970470 ) ( 1863230 * )
NEW met2 ( 1196690 1988150 ) ( * 2000220 0 )
NEW met1 ( 1196690 1988150 ) ( 1234870 * )
- NEW met1 ( 1234870 1970470 ) ( 1863230 * )
NEW met1 ( 1863230 1970470 ) M1M2_PR
NEW met1 ( 1234870 1988150 ) M1M2_PR
NEW met1 ( 1234870 1970470 ) M1M2_PR
@@ -14296,6 +14299,7 @@
+ ROUTED met2 ( 1917970 1700 0 ) ( * 16830 )
NEW met1 ( 1911530 16830 ) ( 1917970 * )
NEW met2 ( 1911530 16830 ) ( * 1970130 )
+ NEW met1 ( 1269600 1970130 ) ( 1911530 * )
NEW met1 ( 1269600 1969450 ) ( * 1970130 )
NEW met1 ( 1200830 1971490 ) ( 1206810 * )
NEW met1 ( 1206810 1970130 ) ( * 1971490 )
@@ -14303,7 +14307,6 @@
NEW met1 ( 1222910 1969450 ) ( * 1970130 )
NEW met1 ( 1206810 1970130 ) ( 1222910 * )
NEW met1 ( 1222910 1969450 ) ( 1269600 * )
- NEW met1 ( 1269600 1970130 ) ( 1911530 * )
NEW met1 ( 1917970 16830 ) M1M2_PR
NEW met1 ( 1911530 16830 ) M1M2_PR
NEW met1 ( 1911530 1970130 ) M1M2_PR
diff --git a/gds/user_project_wrapper.gds b/gds/user_project_wrapper.gds
index 6d7e52d..146a39a 100644
--- a/gds/user_project_wrapper.gds
+++ b/gds/user_project_wrapper.gds
Binary files differ
diff --git a/mag/user_project_wrapper.mag b/mag/user_project_wrapper.mag
index 2775b02..da3944c 100644
--- a/mag/user_project_wrapper.mag
+++ b/mag/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130B
magscale 1 2
-timestamp 1659003055
+timestamp 1659466138
<< metal1 >>
rect 71774 702992 71780 703044
rect 71832 703032 71838 703044
@@ -3877,16 +3877,22 @@
rect 265860 404268 265866 404280
rect 298002 404268 298008 404280
rect 298060 404268 298066 404320
-rect 293862 401344 293868 401396
-rect 293920 401384 293926 401396
-rect 385034 401384 385040 401396
-rect 293920 401356 385040 401384
-rect 293920 401344 293926 401356
-rect 385034 401344 385040 401356
-rect 385092 401344 385098 401396
-rect 303586 401288 317000 401316
-rect 303586 401248 303614 401288
-rect 300826 401220 303614 401248
+rect 293862 401548 293868 401600
+rect 293920 401588 293926 401600
+rect 385034 401588 385040 401600
+rect 293920 401560 385040 401588
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+rect 385034 401548 385040 401560
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+rect 297174 401344 297180 401396
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+rect 297232 401356 313274 401384
+rect 297232 401344 297238 401356
+rect 313246 401316 313274 401356
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+rect 309244 401220 314240 401248
+rect 314626 401220 327074 401248
rect 293402 401072 293408 401124
rect 293460 401112 293466 401124
rect 298002 401112 298008 401124
@@ -3894,22 +3900,33 @@
rect 293460 401072 293466 401084
rect 298002 401072 298008 401084
rect 298060 401072 298066 401124
+rect 298756 401084 303614 401112
rect 292942 401004 292948 401056
rect 293000 401044 293006 401056
-rect 300826 401044 300854 401220
-rect 293000 401016 300854 401044
+rect 298756 401044 298784 401084
+rect 293000 401016 298784 401044
+rect 303586 401044 303614 401084
+rect 303586 401016 308352 401044
rect 293000 401004 293006 401016
rect 293218 400936 293224 400988
rect 293276 400976 293282 400988
-rect 293276 400948 303614 400976
+rect 297174 400976 297180 400988
+rect 293276 400948 297180 400976
rect 293276 400936 293282 400948
+rect 297174 400936 297180 400948
+rect 297232 400936 297238 400988
+rect 308324 400976 308352 401016
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+rect 314212 401084 317414 401112
+rect 308324 400948 309272 400976
rect 293310 400868 293316 400920
rect 293368 400908 293374 400920
-rect 303586 400908 303614 400948
-rect 316972 400908 317000 401288
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-rect 316972 400880 320174 400908
+rect 317386 400908 317414 401084
+rect 318766 400948 321784 400976
+rect 318766 400908 318794 400948
+rect 293368 400880 304994 400908
+rect 317386 400880 318794 400908
rect 293368 400868 293374 400880
rect 299658 400732 299664 400784
rect 299716 400772 299722 400784
@@ -3918,35 +3935,26 @@
rect 299716 400732 299722 400744
rect 299842 400732 299848 400744
rect 299900 400732 299906 400784
-rect 302206 400772 302234 400880
-rect 311866 400840 311894 400880
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-rect 320146 400812 324360 400840
-rect 314764 400772 314792 400812
-rect 302206 400744 314654 400772
-rect 314764 400744 320174 400772
+rect 304966 400772 304994 400880
+rect 314626 400812 318794 400840
+rect 314626 400772 314654 400812
+rect 304966 400744 314654 400772
rect 298002 400664 298008 400716
rect 298060 400704 298066 400716
-rect 307478 400704 307484 400716
-rect 298060 400676 307484 400704
+rect 307570 400704 307576 400716
+rect 298060 400676 307576 400704
rect 298060 400664 298066 400676
-rect 307478 400664 307484 400676
-rect 307536 400664 307542 400716
-rect 314626 400636 314654 400744
-rect 320146 400704 320174 400744
-rect 324332 400716 324360 400812
-rect 324130 400704 324136 400716
-rect 320146 400676 324136 400704
-rect 324130 400664 324136 400676
-rect 324188 400664 324194 400716
-rect 324314 400664 324320 400716
-rect 324372 400664 324378 400716
-rect 324958 400664 324964 400716
-rect 325016 400704 325022 400716
+rect 307570 400664 307576 400676
+rect 307628 400664 307634 400716
+rect 318766 400636 318794 400812
+rect 321756 400704 321784 400948
+rect 324222 400704 324228 400716
+rect 321756 400676 324228 400704
+rect 324222 400664 324228 400676
+rect 324280 400664 324286 400716
+rect 327046 400704 327074 401220
rect 332502 400704 332508 400716
-rect 325016 400676 332508 400704
-rect 325016 400664 325022 400676
+rect 327046 400676 332508 400704
rect 332502 400664 332508 400676
rect 332560 400664 332566 400716
rect 340966 400704 340972 400716
@@ -3954,14 +3962,7 @@
rect 336706 400636 336734 400676
rect 340966 400664 340972 400676
rect 341024 400664 341030 400716
-rect 314626 400608 336734 400636
-rect 324130 400528 324136 400580
-rect 324188 400568 324194 400580
-rect 324958 400568 324964 400580
-rect 324188 400540 324964 400568
-rect 324188 400528 324194 400540
-rect 324958 400528 324964 400540
-rect 325016 400528 325022 400580
+rect 318766 400608 336734 400636
rect 298554 400120 298560 400172
rect 298612 400160 298618 400172
rect 579982 400160 579988 400172
@@ -10139,24 +10140,22 @@
rect 4988 410932 5040 410984
rect 265808 404268 265860 404320
rect 298008 404268 298060 404320
-rect 293868 401344 293920 401396
-rect 385040 401344 385092 401396
+rect 293868 401548 293920 401600
+rect 385040 401548 385092 401600
+rect 297180 401344 297232 401396
rect 293408 401072 293460 401124
rect 298008 401072 298060 401124
rect 292948 401004 293000 401056
rect 293224 400936 293276 400988
+rect 297180 400936 297232 400988
rect 293316 400868 293368 400920
rect 299664 400732 299716 400784
rect 299848 400732 299900 400784
rect 298008 400664 298060 400716
-rect 307484 400664 307536 400716
-rect 324136 400664 324188 400716
-rect 324320 400664 324372 400716
-rect 324964 400664 325016 400716
+rect 307576 400664 307628 400716
+rect 324228 400664 324280 400716
rect 332508 400664 332560 400716
rect 340972 400664 341024 400716
-rect 324136 400528 324188 400580
-rect 324964 400528 325016 400580
rect 298560 400120 298612 400172
rect 579988 400120 580040 400172
rect 252652 399780 252704 399832
@@ -19123,13 +19122,13 @@
rect 293684 398676 293736 398682
rect 293684 398618 293736 398624
rect 293788 398614 293816 442575
-rect 293880 401402 293908 445130
+rect 293880 401606 293908 445130
rect 295892 444508 295944 444514
rect 295892 444450 295944 444456
rect 295800 444032 295852 444038
rect 295800 443974 295852 443980
-rect 293868 401396 293920 401402
-rect 293868 401338 293920 401344
+rect 293868 401600 293920 401606
+rect 293868 401542 293920 401548
rect 293776 398608 293828 398614
rect 293776 398550 293828 398556
rect 295812 398546 295840 443974
@@ -20176,8 +20175,13 @@
rect 298020 404161 298048 404262
rect 298006 404152 298062 404161
rect 298006 404087 298062 404096
+rect 297180 401396 297232 401402
+rect 297180 401338 297232 401344
+rect 297192 400994 297220 401338
rect 298008 401124 298060 401130
rect 298008 401066 298060 401072
+rect 297180 400988 297232 400994
+rect 297180 400930 297232 400936
rect 298020 400722 298048 401066
rect 298008 400716 298060 400722
rect 298008 400658 298060 400664
@@ -20325,29 +20329,25 @@
rect 385038 416327 385094 416336
rect 385038 407552 385094 407561
rect 385038 407487 385094 407496
-rect 385052 401402 385080 407487
+rect 385052 401606 385080 407487
rect 579986 404968 580042 404977
rect 579986 404903 580042 404912
-rect 385040 401396 385092 401402
-rect 385040 401338 385092 401344
+rect 385040 401600 385092 401606
+rect 385040 401542 385092 401548
rect 299848 400784 299900 400790
rect 382738 400752 382794 400761
rect 299848 400726 299900 400732
-rect 307496 400722 307786 400738
-rect 324332 400722 324530 400738
+rect 307588 400722 307786 400738
+rect 324240 400722 324530 400738
rect 332520 400722 332902 400738
rect 340984 400722 341274 400738
-rect 307484 400716 307786 400722
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-rect 324964 400658 325016 400664
+rect 307576 400716 307786 400722
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rect 332508 400716 332902 400722
+rect 324228 400658 324280 400664
rect 332560 400710 332902 400716
rect 340972 400716 341274 400722
rect 332508 400658 332560 400664
@@ -20355,12 +20355,6 @@
rect 382794 400710 383134 400738
rect 382738 400687 382794 400696
rect 340972 400658 341024 400664
-rect 324148 400586 324176 400658
-rect 324976 400586 325004 400658
-rect 324136 400580 324188 400586
-rect 324136 400522 324188 400528
-rect 324964 400580 325016 400586
-rect 324964 400522 325016 400528
rect 299768 400438 300058 400466
rect 390558 400344 390614 400353
rect 390558 400279 390614 400288
@@ -25904,21 +25898,21 @@
rect 252870 398652 252876 398654
rect 252940 398652 252946 398716
rect 253246 398714 253306 399062
-rect 304950 399120 329071 399122
-rect 304950 399064 329010 399120
+rect 311850 399120 329071 399122
+rect 311850 399064 329010 399120
rect 329066 399064 329071 399120
-rect 304950 399062 329071 399064
+rect 311850 399062 329071 399064
rect 258574 398924 258580 398988
rect 258644 398986 258650 398988
-rect 304950 398986 305010 399062
+rect 311850 398986 311910 399062
rect 329005 399059 329071 399062
-rect 258644 398926 305010 398986
-rect 314610 398926 321570 398986
+rect 258644 398926 311910 398986
+rect 312126 398926 321570 398986
rect 258644 398924 258650 398926
rect 264094 398788 264100 398852
rect 264164 398850 264170 398852
-rect 314610 398850 314670 398926
-rect 264164 398790 314670 398850
+rect 312126 398850 312186 398926
+rect 264164 398790 312186 398850
rect 321510 398850 321570 398926
rect 321694 398926 331230 398986
rect 321694 398850 321754 398926
diff --git a/maglef/user_project_wrapper.mag b/maglef/user_project_wrapper.mag
index 67d3f36..2acd4c5 100644
--- a/maglef/user_project_wrapper.mag
+++ b/maglef/user_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130B
magscale 1 2
-timestamp 1659003342
+timestamp 1659466453
<< obsli1 >>
rect 201104 402159 382892 453329
<< obsm1 >>
@@ -3849,8 +3849,8 @@
string FIXED_BBOX 0 0 584000 704000
string LEFclass BLOCK
string LEFview TRUE
-string GDS_END 17903460
-string GDS_FILE /home/aloke/projects/uP16_efabless/openlane/user_project_wrapper/runs/22_07_28_15_18/results/signoff/user_project_wrapper.magic.gds
-string GDS_START 15689722
+string GDS_END 18044492
+string GDS_FILE /home/aloke/projects/uP16_efabless/openlane/user_project_wrapper/runs/22_08_02_23_52/results/signoff/user_project_wrapper.magic.gds
+string GDS_START 15830882
<< end >>
diff --git a/openlane/cpu/config.tcl b/openlane/cpu/config.tcl
index 4c4f528..c8d7763 100755
--- a/openlane/cpu/config.tcl
+++ b/openlane/cpu/config.tcl
@@ -26,7 +26,7 @@
set ::env(DESIGN_IS_CORE) 0
-set ::env(CLOCK_PORT) "clk"
+set ::env(CLOCK_PORT) "clkin"
#set ::env(CLOCK_NET) "counter.clk"
set ::env(CLOCK_PERIOD) "10"
diff --git a/openlane/user_project_wrapper/config.tcl b/openlane/user_project_wrapper/config.tcl
index 7756d86..6a3df17 100755
--- a/openlane/user_project_wrapper/config.tcl
+++ b/openlane/user_project_wrapper/config.tcl
@@ -39,7 +39,7 @@
## Clock configurations
set ::env(CLOCK_PORT) "user_clock2"
-set ::env(CLOCK_NET) "mprj.clk"
+set ::env(CLOCK_NET) "mprj.soc_clk"
set ::env(CLOCK_PERIOD) "10"
diff --git a/spi/lvs/user_project_wrapper.spice b/spi/lvs/user_project_wrapper.spice
index eb50e41..ab99aa6 100644
--- a/spi/lvs/user_project_wrapper.spice
+++ b/spi/lvs/user_project_wrapper.spice
@@ -11,7 +11,7 @@
* Black-box entry subcircuit for cpu abstract view
.subckt cpu addr[0] addr[10] addr[11] addr[1] addr[2] addr[3] addr[4] addr[5] addr[6]
-+ addr[7] addr[8] addr[9] clk datain[0] datain[10] datain[11] datain[12] datain[13]
++ addr[7] addr[8] addr[9] clkin datain[0] datain[10] datain[11] datain[12] datain[13]
+ datain[14] datain[15] datain[1] datain[2] datain[3] datain[4] datain[5] datain[6]
+ datain[7] datain[8] datain[9] dataout[0] dataout[10] dataout[11] dataout[12] dataout[13]
+ dataout[14] dataout[15] dataout[1] dataout[2] dataout[3] dataout[4] dataout[5] dataout[6]
@@ -253,7 +253,7 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memLword1/addr1[0]
+ memLword1/addr1[1] memLword1/addr1[2] memLword1/addr1[3] memLword1/addr1[4] memLword1/addr1[5]
+ memLword1/addr1[6] memLword1/addr1[7] memLword1/addr1[8] memLword1/addr1[9] memLword1/csb0
-+ memLword1/csb1 mprj/rw_to_mem cpu0/clk memLword1/clk1 memLword1/wmask0[0] memLword1/dout0[0]
++ memLword1/csb1 mprj/rw_to_mem cpu0/clkin memLword1/clk1 memLword1/wmask0[0] memLword1/dout0[0]
+ memLword1/dout0[1] memLword1/dout0[2] memLword1/dout0[3] memLword1/dout0[4] memLword1/dout0[5]
+ memLword1/dout0[6] memLword1/dout0[7] memLword1/dout1[0] memLword1/dout1[1] memLword1/dout1[2]
+ memLword1/dout1[3] memLword1/dout1[4] memLword1/dout1[5] memLword1/dout1[6] memLword1/dout1[7]
@@ -264,7 +264,7 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memLword0/addr1[0]
+ memLword0/addr1[1] memLword0/addr1[2] memLword0/addr1[3] memLword0/addr1[4] memLword0/addr1[5]
+ memLword0/addr1[6] memLword0/addr1[7] memLword0/addr1[8] memLword0/addr1[9] memLword0/csb0
-+ memLword0/csb1 mprj/rw_to_mem cpu0/clk memLword0/clk1 memLword0/wmask0[0] memLword0/dout0[0]
++ memLword0/csb1 mprj/rw_to_mem cpu0/clkin memLword0/clk1 memLword0/wmask0[0] memLword0/dout0[0]
+ memLword0/dout0[1] memLword0/dout0[2] memLword0/dout0[3] memLword0/dout0[4] memLword0/dout0[5]
+ memLword0/dout0[6] memLword0/dout0[7] memLword0/dout1[0] memLword0/dout1[1] memLword0/dout1[2]
+ memLword0/dout1[3] memLword0/dout1[4] memLword0/dout1[5] memLword0/dout1[6] memLword0/dout1[7]
@@ -275,7 +275,7 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memLword2/addr1[0]
+ memLword2/addr1[1] memLword2/addr1[2] memLword2/addr1[3] memLword2/addr1[4] memLword2/addr1[5]
+ memLword2/addr1[6] memLword2/addr1[7] memLword2/addr1[8] memLword2/addr1[9] memLword2/csb0
-+ memLword2/csb1 mprj/rw_to_mem cpu0/clk memLword2/clk1 memLword2/wmask0[0] memLword2/dout0[0]
++ memLword2/csb1 mprj/rw_to_mem cpu0/clkin memLword2/clk1 memLword2/wmask0[0] memLword2/dout0[0]
+ memLword2/dout0[1] memLword2/dout0[2] memLword2/dout0[3] memLword2/dout0[4] memLword2/dout0[5]
+ memLword2/dout0[6] memLword2/dout0[7] memLword2/dout1[0] memLword2/dout1[1] memLword2/dout1[2]
+ memLword2/dout1[3] memLword2/dout1[4] memLword2/dout1[5] memLword2/dout1[6] memLword2/dout1[7]
@@ -286,7 +286,7 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memLword3/addr1[0]
+ memLword3/addr1[1] memLword3/addr1[2] memLword3/addr1[3] memLword3/addr1[4] memLword3/addr1[5]
+ memLword3/addr1[6] memLword3/addr1[7] memLword3/addr1[8] memLword3/addr1[9] memLword3/csb0
-+ memLword3/csb1 mprj/rw_to_mem cpu0/clk memLword3/clk1 memLword3/wmask0[0] memLword3/dout0[0]
++ memLword3/csb1 mprj/rw_to_mem cpu0/clkin memLword3/clk1 memLword3/wmask0[0] memLword3/dout0[0]
+ memLword3/dout0[1] memLword3/dout0[2] memLword3/dout0[3] memLword3/dout0[4] memLword3/dout0[5]
+ memLword3/dout0[6] memLword3/dout0[7] memLword3/dout1[0] memLword3/dout1[1] memLword3/dout1[2]
+ memLword3/dout1[3] memLword3/dout1[4] memLword3/dout1[5] memLword3/dout1[6] memLword3/dout1[7]
@@ -297,7 +297,7 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memHword0/addr1[0]
+ memHword0/addr1[1] memHword0/addr1[2] memHword0/addr1[3] memHword0/addr1[4] memHword0/addr1[5]
+ memHword0/addr1[6] memHword0/addr1[7] memHword0/addr1[8] memHword0/addr1[9] memLword0/csb0
-+ memHword0/csb1 mprj/rw_to_mem cpu0/clk memHword0/clk1 memHword0/wmask0[0] memHword0/dout0[0]
++ memHword0/csb1 mprj/rw_to_mem cpu0/clkin memHword0/clk1 memHword0/wmask0[0] memHword0/dout0[0]
+ memHword0/dout0[1] memHword0/dout0[2] memHword0/dout0[3] memHword0/dout0[4] memHword0/dout0[5]
+ memHword0/dout0[6] memHword0/dout0[7] memHword0/dout1[0] memHword0/dout1[1] memHword0/dout1[2]
+ memHword0/dout1[3] memHword0/dout1[4] memHword0/dout1[5] memHword0/dout1[6] memHword0/dout1[7]
@@ -308,13 +308,13 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memHword1/addr1[0]
+ memHword1/addr1[1] memHword1/addr1[2] memHword1/addr1[3] memHword1/addr1[4] memHword1/addr1[5]
+ memHword1/addr1[6] memHword1/addr1[7] memHword1/addr1[8] memHword1/addr1[9] memLword1/csb0
-+ memHword1/csb1 mprj/rw_to_mem cpu0/clk memHword1/clk1 memHword1/wmask0[0] memHword1/dout0[0]
++ memHword1/csb1 mprj/rw_to_mem cpu0/clkin memHword1/clk1 memHword1/wmask0[0] memHword1/dout0[0]
+ memHword1/dout0[1] memHword1/dout0[2] memHword1/dout0[3] memHword1/dout0[4] memHword1/dout0[5]
+ memHword1/dout0[6] memHword1/dout0[7] memHword1/dout1[0] memHword1/dout1[1] memHword1/dout1[2]
+ memHword1/dout1[3] memHword1/dout1[4] memHword1/dout1[5] memHword1/dout1[6] memHword1/dout1[7]
+ vccd1 vssd1 sky130_sram_1kbyte_1rw1r_8x1024_8
Xcpu0 cpu0/addr[0] cpu0/addr[10] cpu0/addr[11] cpu0/addr[1] cpu0/addr[2] cpu0/addr[3]
-+ cpu0/addr[4] cpu0/addr[5] cpu0/addr[6] cpu0/addr[7] cpu0/addr[8] cpu0/addr[9] cpu0/clk
++ cpu0/addr[4] cpu0/addr[5] cpu0/addr[6] cpu0/addr[7] cpu0/addr[8] cpu0/addr[9] cpu0/clkin
+ cpu0/datain[0] cpu0/datain[10] cpu0/datain[11] cpu0/datain[12] cpu0/datain[13] cpu0/datain[14]
+ cpu0/datain[15] cpu0/datain[1] cpu0/datain[2] cpu0/datain[3] cpu0/datain[4] cpu0/datain[5]
+ cpu0/datain[6] cpu0/datain[7] cpu0/datain[8] cpu0/datain[9] cpu0/dataout[0] cpu0/dataout[10]
@@ -330,7 +330,7 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memHword2/addr1[0]
+ memHword2/addr1[1] memHword2/addr1[2] memHword2/addr1[3] memHword2/addr1[4] memHword2/addr1[5]
+ memHword2/addr1[6] memHword2/addr1[7] memHword2/addr1[8] memHword2/addr1[9] memLword2/csb0
-+ memHword2/csb1 mprj/rw_to_mem cpu0/clk memHword2/clk1 memHword2/wmask0[0] memHword2/dout0[0]
++ memHword2/csb1 mprj/rw_to_mem cpu0/clkin memHword2/clk1 memHword2/wmask0[0] memHword2/dout0[0]
+ memHword2/dout0[1] memHword2/dout0[2] memHword2/dout0[3] memHword2/dout0[4] memHword2/dout0[5]
+ memHword2/dout0[6] memHword2/dout0[7] memHword2/dout1[0] memHword2/dout1[1] memHword2/dout1[2]
+ memHword2/dout1[3] memHword2/dout1[4] memHword2/dout1[5] memHword2/dout1[6] memHword2/dout1[7]
@@ -341,7 +341,7 @@
+ memLword3/addr0[6] memLword3/addr0[7] memLword3/addr0[8] memLword3/addr0[9] memHword3/addr1[0]
+ memHword3/addr1[1] memHword3/addr1[2] memHword3/addr1[3] memHword3/addr1[4] memHword3/addr1[5]
+ memHword3/addr1[6] memHword3/addr1[7] memHword3/addr1[8] memHword3/addr1[9] memLword3/csb0
-+ memHword3/csb1 mprj/rw_to_mem cpu0/clk memHword3/clk1 memHword3/wmask0[0] memHword3/dout0[0]
++ memHword3/csb1 mprj/rw_to_mem cpu0/clkin memHword3/clk1 memHword3/wmask0[0] memHword3/dout0[0]
+ memHword3/dout0[1] memHword3/dout0[2] memHword3/dout0[3] memHword3/dout0[4] memHword3/dout0[5]
+ memHword3/dout0[6] memHword3/dout0[7] memHword3/dout1[0] memHword3/dout1[1] memHword3/dout1[2]
+ memHword3/dout1[3] memHword3/dout1[4] memHword3/dout1[5] memHword3/dout1[6] memHword3/dout1[7]
@@ -451,7 +451,7 @@
+ la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84] la_oenb[85] la_oenb[86] la_oenb[87]
+ la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90] la_oenb[91] la_oenb[92] la_oenb[93]
+ la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97] la_oenb[98] la_oenb[99] la_oenb[9]
-+ cpu0/rdwr mprj/rw_to_mem cpu0/clk cpu0/rst user_clock2 vccd1 vssd1 wb_clk_i wb_rst_i
++ cpu0/rdwr mprj/rw_to_mem cpu0/clkin cpu0/rst user_clock2 vccd1 vssd1 wb_clk_i wb_rst_i
+ wbs_ack_o wbs_adr_i[0] wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14]
+ wbs_adr_i[15] wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1]
+ wbs_adr_i[20] wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25]
diff --git a/verilog/gl/user_project_wrapper.v b/verilog/gl/user_project_wrapper.v
index 9a25bdc..c8a9d88 100644
--- a/verilog/gl/user_project_wrapper.v
+++ b/verilog/gl/user_project_wrapper.v
@@ -199,7 +199,7 @@
wire memrwb;
wire rst;
- cpu cpu0 (.clk(clk),
+ cpu cpu0 (.clkin(clk),
.en(cpuen),
.en_inp(enkbd),
.en_out(endisp),
diff --git a/verilog/rtl/cpu.v b/verilog/rtl/cpu.v
index 86c2981..6c20cb0 100644
--- a/verilog/rtl/cpu.v
+++ b/verilog/rtl/cpu.v
@@ -3,7 +3,7 @@
vccd1,
vssd1,
`endif
- clk,
+ clkin,
addr,
datain,
dataout,
@@ -24,7 +24,7 @@
input [15:0] datain;
output [15:0] dataout;
output [11:0] addr;
- input clk, en_inp, en_out, rst;
+ input clkin, en_inp, en_out, rst;
output en, rdwr;
input [7:0] keyboard;
output [7:0] display;
@@ -35,12 +35,10 @@
reg [10:0] t;
wire [7:0] d;
wire rstEn, rstT;
- wire rdwr, en;
+ wire rdwr, en, clk;
-`ifdef DEBUG
- debug debug1(.of(e), .lcd(display), .dcod(d), .fsm(t), .ar(addr), .prgctr(pc), .datr(dr), .accu(ac), .instr(ir));
-`endif
+ assign clk = clkin || (!ir[15] && d[7] && t[3] && ir[0]);
assign dataout = (t[4] && d[3]) ? ac : 16'hzzzz;
assign dataout = (t[4] && d[5]) ? {4'h0, pc} : 16'hzzzz;
assign dataout = (t[6] && d[6]) ? dr : 16'hzzzz;
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_project_wrapper.v
index 7c38e6f..8097cbe 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_project_wrapper.v
@@ -150,7 +150,7 @@
.vssd1(vssd1), // User area 1 digital ground
`endif
- .clk(clk),
+ .clkin(clk),
.addr(adr_cpu),
.datain(cpdatin),
.dataout(cpdatout),
