)]}'
{
  "commit": "ccf85c2839907eb64ad1a900a21733711c976123",
  "tree": "6bec63937d67f9fe746cb93dfeef1b20bb871619",
  "parents": [
    "0f409d288517c034d2000a8d706ee3621c5d66ff"
  ],
  "author": {
    "name": "dineshannayya",
    "email": "dinesh.annayya@gmail.com",
    "time": "Fri Jun 17 17:56:27 2022 +0530"
  },
  "committer": {
    "name": "dineshannayya",
    "email": "dinesh.annayya@gmail.com",
    "time": "Fri Jun 17 17:56:27 2022 +0530"
  },
  "message": "gpio test clean up\n",
  "tree_diff": [
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      "old_path": "verilog/dv/Makefile",
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      "new_mode": 33188,
      "new_path": "verilog/dv/Makefile"
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      "old_mode": 33188,
      "old_path": "verilog/dv/user_gpio/user_gpio_tb.v",
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      "new_path": "verilog/dv/user_gpio/user_gpio_tb.v"
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}